Re: [RFC PATCH v2 18/20] x86/kvm: Enable Secure Memory Encryption of nested page tables
On 09/12/2016 09:35 AM, Borislav Petkov wrote: > On Mon, Aug 22, 2016 at 05:38:49PM -0500, Tom Lendacky wrote: >> Update the KVM support to include the memory encryption mask when creating >> and using nested page tables. >> >> Signed-off-by: Tom Lendacky >> --- >> arch/x86/include/asm/kvm_host.h |3 ++- >> arch/x86/kvm/mmu.c |8 ++-- >> arch/x86/kvm/vmx.c |3 ++- >> arch/x86/kvm/x86.c |3 ++- >> 4 files changed, 12 insertions(+), 5 deletions(-) >> >> diff --git a/arch/x86/include/asm/kvm_host.h >> b/arch/x86/include/asm/kvm_host.h >> index 33ae3a4..c51c1cb 100644 >> --- a/arch/x86/include/asm/kvm_host.h >> +++ b/arch/x86/include/asm/kvm_host.h >> @@ -1039,7 +1039,8 @@ void kvm_mmu_setup(struct kvm_vcpu *vcpu); >> void kvm_mmu_init_vm(struct kvm *kvm); >> void kvm_mmu_uninit_vm(struct kvm *kvm); >> void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, >> -u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask); >> +u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask, >> +u64 me_mask); > > Why do you need a separate mask? > > arch/x86/kvm/mmu.c::set_spte() ORs in shadow_present_mask > unconditionally. So you can simply do: > > > kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK, > PT_DIRTY_MASK, PT64_NX_MASK, 0, > PT_PRESENT_MASK | sme_me_mask); > > and have this change much simpler. Just keeping in step with the way this is done for the other masks. They each have a specific meaning so I was trying not to combine them in case they may be used differently in the future. > >> void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); >> void kvm_mmu_slot_remove_write_access(struct kvm *kvm, >> diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c >> index 3d4cc8cc..a7040f4 100644 >> --- a/arch/x86/kvm/mmu.c >> +++ b/arch/x86/kvm/mmu.c >> @@ -122,7 +122,7 @@ module_param(dbg, bool, 0644); >> * PT32_LEVEL_BITS))) - 1)) >> >> #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | >> shadow_user_mask \ >> -| shadow_x_mask | shadow_nx_mask) >> +| shadow_x_mask | shadow_nx_mask | shadow_me_mask) > > This would be sme_me_mask, of course, like with the baremetal masks. > > Or am I missing something? Given the current patch, this would be shadow_me_mask since that value is set by the call to kvm_mmu_set_mask_ptes. Thanks, Tom > ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
Re: [RFC PATCH v2 18/20] x86/kvm: Enable Secure Memory Encryption of nested page tables
On Mon, Aug 22, 2016 at 05:38:49PM -0500, Tom Lendacky wrote: > Update the KVM support to include the memory encryption mask when creating > and using nested page tables. > > Signed-off-by: Tom Lendacky > --- > arch/x86/include/asm/kvm_host.h |3 ++- > arch/x86/kvm/mmu.c |8 ++-- > arch/x86/kvm/vmx.c |3 ++- > arch/x86/kvm/x86.c |3 ++- > 4 files changed, 12 insertions(+), 5 deletions(-) > > diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h > index 33ae3a4..c51c1cb 100644 > --- a/arch/x86/include/asm/kvm_host.h > +++ b/arch/x86/include/asm/kvm_host.h > @@ -1039,7 +1039,8 @@ void kvm_mmu_setup(struct kvm_vcpu *vcpu); > void kvm_mmu_init_vm(struct kvm *kvm); > void kvm_mmu_uninit_vm(struct kvm *kvm); > void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, > - u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask); > + u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask, > + u64 me_mask); Why do you need a separate mask? arch/x86/kvm/mmu.c::set_spte() ORs in shadow_present_mask unconditionally. So you can simply do: kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK, PT_DIRTY_MASK, PT64_NX_MASK, 0, PT_PRESENT_MASK | sme_me_mask); and have this change much simpler. > void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); > void kvm_mmu_slot_remove_write_access(struct kvm *kvm, > diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c > index 3d4cc8cc..a7040f4 100644 > --- a/arch/x86/kvm/mmu.c > +++ b/arch/x86/kvm/mmu.c > @@ -122,7 +122,7 @@ module_param(dbg, bool, 0644); > * PT32_LEVEL_BITS))) - 1)) > > #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | > shadow_user_mask \ > - | shadow_x_mask | shadow_nx_mask) > + | shadow_x_mask | shadow_nx_mask | shadow_me_mask) This would be sme_me_mask, of course, like with the baremetal masks. Or am I missing something? -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply. ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[RFC PATCH v2 18/20] x86/kvm: Enable Secure Memory Encryption of nested page tables
Update the KVM support to include the memory encryption mask when creating
and using nested page tables.
Signed-off-by: Tom Lendacky
---
arch/x86/include/asm/kvm_host.h |3 ++-
arch/x86/kvm/mmu.c |8 ++--
arch/x86/kvm/vmx.c |3 ++-
arch/x86/kvm/x86.c |3 ++-
4 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 33ae3a4..c51c1cb 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -1039,7 +1039,8 @@ void kvm_mmu_setup(struct kvm_vcpu *vcpu);
void kvm_mmu_init_vm(struct kvm *kvm);
void kvm_mmu_uninit_vm(struct kvm *kvm);
void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
- u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask);
+ u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask,
+ u64 me_mask);
void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 3d4cc8cc..a7040f4 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -122,7 +122,7 @@ module_param(dbg, bool, 0644);
* PT32_LEVEL_BITS))) - 1))
#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | shadow_user_mask \
- | shadow_x_mask | shadow_nx_mask)
+ | shadow_x_mask | shadow_nx_mask | shadow_me_mask)
#define ACC_EXEC_MASK1
#define ACC_WRITE_MASK PT_WRITABLE_MASK
@@ -177,6 +177,7 @@ static u64 __read_mostly shadow_accessed_mask;
static u64 __read_mostly shadow_dirty_mask;
static u64 __read_mostly shadow_mmio_mask;
static u64 __read_mostly shadow_present_mask;
+static u64 __read_mostly shadow_me_mask;
static void mmu_spte_set(u64 *sptep, u64 spte);
static void mmu_free_roots(struct kvm_vcpu *vcpu);
@@ -284,7 +285,8 @@ static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte)
}
void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
- u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask)
+ u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask,
+ u64 me_mask)
{
shadow_user_mask = user_mask;
shadow_accessed_mask = accessed_mask;
@@ -292,6 +294,7 @@ void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
shadow_nx_mask = nx_mask;
shadow_x_mask = x_mask;
shadow_present_mask = p_mask;
+ shadow_me_mask = me_mask;
}
EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
@@ -2553,6 +2556,7 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
pte_access &= ~ACC_WRITE_MASK;
spte |= (u64)pfn << PAGE_SHIFT;
+ spte |= shadow_me_mask;
if (pte_access & ACC_WRITE_MASK) {
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 87eaa6b..9040645 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -6485,7 +6485,8 @@ static __init int hardware_setup(void)
(enable_ept_ad_bits) ? VMX_EPT_DIRTY_BIT : 0ull,
0ull, VMX_EPT_EXECUTABLE_MASK,
cpu_has_vmx_ept_execute_only() ?
- 0ull : VMX_EPT_READABLE_MASK);
+ 0ull : VMX_EPT_READABLE_MASK,
+ 0ull);
ept_set_mmio_spte_mask();
kvm_enable_tdp();
} else
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 19f9f9e..d432894 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -65,6 +65,7 @@
#include
#include
#include
+#include
#define CREATE_TRACE_POINTS
#include "trace.h"
@@ -5875,7 +5876,7 @@ int kvm_arch_init(void *opaque)
kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
PT_DIRTY_MASK, PT64_NX_MASK, 0,
- PT_PRESENT_MASK);
+ PT_PRESENT_MASK, sme_me_mask);
kvm_timer_init();
perf_register_guest_info_callbacks(&kvm_guest_cbs);
___
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