HPET timer 2 will be used to drive the HPET-based hardlockup detector. Reserve such timer to ensure it cannot be used by user space programs or for clock events.
When looking for MSI-capable timers for clock events, skip timer 2 if the HPET hardlockup detector is selected. Cc: "H. Peter Anvin" <h...@zytor.com> Cc: Ashok Raj <ashok....@intel.com> Cc: Andi Kleen <andi.kl...@intel.com> Cc: Tony Luck <tony.l...@intel.com> Cc: Clemens Ladisch <clem...@ladisch.de> Cc: Arnd Bergmann <a...@arndb.de> Cc: Philippe Ombredanne <pombreda...@nexb.com> Cc: Kate Stewart <kstew...@linuxfoundation.org> Cc: "Rafael J. Wysocki" <rafael.j.wyso...@intel.com> Cc: Stephane Eranian <eran...@google.com> Cc: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Cc: "Ravi V. Shankar" <ravi.v.shan...@intel.com> Cc: x...@kernel.org Signed-off-by: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> --- arch/x86/include/asm/hpet.h | 3 +++ arch/x86/kernel/hpet.c | 19 ++++++++++++++++--- 2 files changed, 19 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/asm/hpet.h b/arch/x86/include/asm/hpet.h index e7098740f5ee..6f099e2781ce 100644 --- a/arch/x86/include/asm/hpet.h +++ b/arch/x86/include/asm/hpet.h @@ -61,6 +61,9 @@ */ #define HPET_MIN_PERIOD 100000UL +/* Timer used for the hardlockup detector */ +#define HPET_WD_TIMER_NR 2 + /* hpet memory map physical address */ extern unsigned long hpet_address; extern unsigned long force_hpet_address; diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c index c5c5fc150193..ba0a5cc075d5 100644 --- a/arch/x86/kernel/hpet.c +++ b/arch/x86/kernel/hpet.c @@ -172,7 +172,8 @@ do { \ /* * When the hpet driver (/dev/hpet) is enabled, we need to reserve - * timer 0 and timer 1 in case of RTC emulation. + * timer 0 and timer 1 in case of RTC emulation. Timer 2 is reserved in case + * the HPET-based hardlockup detector is used. */ #ifdef CONFIG_HPET @@ -182,7 +183,7 @@ static void hpet_reserve_platform_timers(unsigned int id) { struct hpet __iomem *hpet = hpet_virt_address; struct hpet_timer __iomem *timer = &hpet->hpet_timers[2]; - unsigned int nrtimers, i; + unsigned int nrtimers, i, start_timer; struct hpet_data hd; nrtimers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1; @@ -197,6 +198,13 @@ static void hpet_reserve_platform_timers(unsigned int id) hpet_reserve_timer(&hd, 1); #endif + if (IS_ENABLED(CONFIG_X86_HARDLOCKUP_DETECTOR_HPET)) { + hpet_reserve_timer(&hd, HPET_WD_TIMER_NR); + start_timer = HPET_WD_TIMER_NR + 1; + } else { + start_timer = HPET_WD_TIMER_NR; + } + /* * NOTE that hd_irq[] reflects IOAPIC input pins (LEGACY_8254 * is wrong for i8259!) not the output IRQ. Many BIOS writers @@ -205,7 +213,7 @@ static void hpet_reserve_platform_timers(unsigned int id) hd.hd_irq[0] = HPET_LEGACY_8254; hd.hd_irq[1] = HPET_LEGACY_RTC; - for (i = 2; i < nrtimers; timer++, i++) { + for (i = start_timer; i < nrtimers; timer++, i++) { hd.hd_irq[i] = (readl(&timer->hpet_config) & Tn_INT_ROUTE_CNF_MASK) >> Tn_INT_ROUTE_CNF_SHIFT; } @@ -648,6 +656,11 @@ static void hpet_msi_capability_lookup(unsigned int start_timer) struct hpet_dev *hdev = &hpet_devs[num_timers_used]; unsigned int cfg = hpet_readl(HPET_Tn_CFG(i)); + /* Do not use timer reserved for the HPET watchdog. */ + if (IS_ENABLED(CONFIG_X86_HARDLOCKUP_DETECTOR_HPET) && + i == HPET_WD_TIMER_NR) + continue; + /* Only consider HPET timer with MSI support */ if (!(cfg & HPET_TN_FSB_CAP)) continue; -- 2.17.1