[valgrind] [Bug 295403] Memory access below SP with some STRD instructions.

[Matt Cowell via KDE Bugzilla]

https://bugs.kde.org/show_bug.cgi?id=295403

Matt Cowell  changed:

   What|Removed |Added

 CC||matt.cow...@nokia.com

--- Comment #1 from Matt Cowell  ---
Created attachment 101695
  --> https://bugs.kde.org/attachment.cgi?id=101695&action=edit
Increase allowed offsets for ARM early writeback of SP base register in strd

GCC 5.4 (and likely all versions 4.8+) have a larger (unlimited?) range for
using strd to allocate the stack frame, at least when compiling with
-mcpu=cortex-a15.  ld.so and libc compiled with GCC 5.4 have offsets up to
#-40: "strdr3, r4, [sp, #-40]!".

Without this fix, hundreds of "Invalid write of size 4" ... "below stack
pointer" errors are logged, starting in ld-*.so, which of course leads to
millions of "uninitialised value" errors being logged, and valgrind becomes
useless on ARMv7 / Cortex A15.

This simply removes the check for a -8 or -16 byte offset, since all offsets
should be allowable for allocating a stack frame.

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[valgrind] [Bug 344802] disInstr(arm): unhandled instruction: 0xEC510F1E

[Matt Cowell via KDE Bugzilla]

https://bugs.kde.org/show_bug.cgi?id=344802

Matt Cowell  changed:

   What|Removed |Added

 CC||matt.cow...@nokia.com

--- Comment #13 from Matt Cowell  ---
Created attachment 101694
  --> https://bugs.kde.org/attachment.cgi?id=101694&action=edit
Add decode for CNTVCT, CNTPCT, and CNTFRQ

I've attached a patch that adds decode support for CNTVCT, CNTPCT, and CNTFRQ
using helpers to execute the real instructions.  It is based on the ARMv8
support for the CNTVCT register.

The patch that is already attached supports only CNTVCT, and hardcodes the
value to 0, which breaks many use cases.

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