[valgrind] [Bug 386425] running valgrind + wine on armv7l gives illegal opcode

2017-11-20 Thread Austin English
https://bugs.kde.org/show_bug.cgi?id=386425

--- Comment #15 from Austin English  ---
(In reply to Julian Seward from comment #14)
> Landed, c470e0c23c6c79deec943cb6a111b572fc86dbba.

Thanks for the quick fix!

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[valgrind] [Bug 386425] running valgrind + wine on armv7l gives illegal opcode

2017-11-20 Thread Julian Seward
https://bugs.kde.org/show_bug.cgi?id=386425

Julian Seward  changed:

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
 Resolution|--- |FIXED

--- Comment #14 from Julian Seward  ---
Landed, c470e0c23c6c79deec943cb6a111b572fc86dbba.

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[valgrind] [Bug 386425] running valgrind + wine on armv7l gives illegal opcode

2017-11-16 Thread Austin English
https://bugs.kde.org/show_bug.cgi?id=386425

--- Comment #13 from Austin English  ---
Created attachment 108909
  --> https://bugs.kde.org/attachment.cgi?id=108909&action=edit
output with patch

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[valgrind] [Bug 386425] running valgrind + wine on armv7l gives illegal opcode

2017-11-16 Thread Austin English
https://bugs.kde.org/show_bug.cgi?id=386425

--- Comment #12 from Austin English  ---
Created attachment 108908
  --> https://bugs.kde.org/attachment.cgi?id=108908&action=edit
output without patch

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[valgrind] [Bug 386425] running valgrind + wine on armv7l gives illegal opcode

2017-11-16 Thread Austin English
https://bugs.kde.org/show_bug.cgi?id=386425

--- Comment #11 from Austin English  ---
(In reply to Julian Seward from comment #10)
> Created attachment 108896 [details]
> TPIDRURW support for 32-bit arm
> 
> This runs the test program shown in comment 6, correctly, both for
> Thumb and ARM encodings.  For 32 bit only.  Austin, can you test this?

Seems to work for me, thanks!

I'm going to attach logs with/without the patch. I used --verbose instead of
-q, which then showed the missing info:
disInstr(arm): unhandled instruction: 0xEE0D4F50
 cond=14(0xE) 27:20=224(0xE0) 4:4=1 3:0=0(0x0)
==4434== valgrind: Unrecognised instruction at address 0x4fc3bb4.
==4434==at 0x4FC3BB4: signal_init_thread (signal_arm.c:974)
==4434==by 0x4FCACF7: thread_init (thread.c:354)
==4434==by 0x4FA1433: __wine_process_init (loader.c:3341)
==4434==by 0x485FBC3: wine_init (loader.c:979)
==4434==by 0x108A27: main (main.c:258)

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[valgrind] [Bug 386425] running valgrind + wine on armv7l gives illegal opcode

2017-11-16 Thread Julian Seward
https://bugs.kde.org/show_bug.cgi?id=386425

--- Comment #10 from Julian Seward  ---
Created attachment 108896
  --> https://bugs.kde.org/attachment.cgi?id=108896&action=edit
TPIDRURW support for 32-bit arm

This runs the test program shown in comment 6, correctly, both for
Thumb and ARM encodings.  For 32 bit only.  Austin, can you test this?

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[valgrind] [Bug 386425] running valgrind + wine on armv7l gives illegal opcode

2017-11-14 Thread Peter Maydell
https://bugs.kde.org/show_bug.cgi?id=386425

--- Comment #9 from Peter Maydell  ---
Yes, I just mean that each thread sees its own copy with the value it last
wrote. On exec() a fresh process image starts out with a zero value. On fork()
or clone() a new thread or process inherits the value from its parent.

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[valgrind] [Bug 386425] running valgrind + wine on armv7l gives illegal opcode

2017-11-14 Thread Julian Seward
https://bugs.kde.org/show_bug.cgi?id=386425

--- Comment #8 from Julian Seward  ---
(In reply to Peter Maydell from comment #5)
> [..] its contents are context-switched when threads are context-switched. [..]

Peter, do you mean by that that its contents are preserved across context
switches like any other GP integer register, so that a thread simply always
sees the last value it wrote to that register?  Or do you mean that the
kernel changes the value in the register in some way?

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[valgrind] [Bug 386425] running valgrind + wine on armv7l gives illegal opcode

2017-11-13 Thread Austin English
https://bugs.kde.org/show_bug.cgi?id=386425

--- Comment #7 from Austin English  ---
Re arm/thumb:
 so you said it's arm encoding. I noticed that configure.ac
requires thumb? Do both get used?
 yes, most of wine should be arm
 what's thumb used for?
 Windows Apps are Thumb-2, and to call into such functions we need the
command "blx" (branch and link while exchanging instruction set if necessary,
or something like that), if the compiler targets non-thumb (e.g. arm-only) it
doesn't like bx and blx
 so it targets both arm and thumb?
 the compiler, yes
 the instruction I'm checking this right now
 the instruction encoding seems to be exactly the same for both arm
and thumb-2
 it's definitely arm

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[valgrind] [Bug 386425] running valgrind + wine on armv7l gives illegal opcode

2017-11-13 Thread Austin English
https://bugs.kde.org/show_bug.cgi?id=386425

--- Comment #6 from Austin English  ---
(In reply to Julian Seward from comment #4)
> (In reply to Julian Seward from comment #3)
> > IIUC, TPIDRURW is a 32 bit register that can be both read and
> > written from user space.  Yes?  Does it require any special handling?
> 
> To clarify .. what I mean to ask is: does TPIDRURW behave like a "normal"
> integer register, in that each thread has its own copy and can read and
> write it independently of other threads?  Or does it have some other
> behaviour?

>From Andre:
>> Sure,
>>
>> it should be ARM encoding. trpidrurw is rw from userspace and needs no 
>> permissions

> Is it specific per thread or shared across?
>

per thread
maybe https://github.com/AndreRH/tpidrurw-test can help to understand it

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[valgrind] [Bug 386425] running valgrind + wine on armv7l gives illegal opcode

2017-11-13 Thread Peter Maydell
https://bugs.kde.org/show_bug.cgi?id=386425

Peter Maydell  changed:

   What|Removed |Added

 CC||peter.mayd...@linaro.org

--- Comment #5 from Peter Maydell  ---
For the hardware, TPIDRURW has no behaviour except that it holds what you write
to it. For the Linux kernel, this register is used to provide per-thread
information, and its contents are context-switched when threads are
context-switched. Looks like Austin will know better than me the exact details
of what happens to the value on fork/clone.

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[valgrind] [Bug 386425] running valgrind + wine on armv7l gives illegal opcode

2017-11-12 Thread Julian Seward
https://bugs.kde.org/show_bug.cgi?id=386425

--- Comment #4 from Julian Seward  ---
(In reply to Julian Seward from comment #3)
> IIUC, TPIDRURW is a 32 bit register that can be both read and
> written from user space.  Yes?  Does it require any special handling?

To clarify .. what I mean to ask is: does TPIDRURW behave like a "normal"
integer register, in that each thread has its own copy and can read and
write it independently of other threads?  Or does it have some other
behaviour?

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[valgrind] [Bug 386425] running valgrind + wine on armv7l gives illegal opcode

2017-11-12 Thread Julian Seward
https://bugs.kde.org/show_bug.cgi?id=386425

--- Comment #3 from Julian Seward  ---
Austin, is this an ARM- or Thumb- encoding that fails?  Can you
show the part of the message that precedes the SIGILL, that is,
whatever the ARM/Thumb front end prints out?

IIUC, TPIDRURW is a 32 bit register that can be both read and
written from user space.  Yes?  Does it require any special handling?

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[valgrind] [Bug 386425] running valgrind + wine on armv7l gives illegal opcode

2017-11-01 Thread Austin English
https://bugs.kde.org/show_bug.cgi?id=386425

--- Comment #2 from Austin English  ---
Forgot to include, some background on why we're doing that:
https://patchwork.kernel.org/patch/2536641/

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[valgrind] [Bug 386425] running valgrind + wine on armv7l gives illegal opcode

2017-11-01 Thread Austin English
https://bugs.kde.org/show_bug.cgi?id=386425

--- Comment #1 from Austin English  ---
(stretch)austin@localhost:~/src/valgrind$ uname -a
Linux localhost 3.14.0 #1 SMP PREEMPT Wed Oct 25 21:59:24 PDT 2017 armv7l
GNU/Linux

(stretch)austin@localhost:~/src/valgrind$ /opt/valgrind/bin/valgrind -v
--version
valgrind-3.14.0.GIT

(confused why that doesn't show the git hash..)
(stretch)austin@localhost:~/src/valgrind$ tail -n 1 include/vgversion.h 
#define VGGIT "2f9cceafa3-20171028"

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