[valgrind] [Bug 489221] Unrecognized instruction: _mm256_cvtps_ph (vcvtps2ph)
https://bugs.kde.org/show_bug.cgi?id=489221 Paul Floyd changed: What|Removed |Added Resolution|--- |WORKSFORME Status|REOPENED|RESOLVED -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 489221] Unrecognized instruction: _mm256_cvtps_ph (vcvtps2ph)
https://bugs.kde.org/show_bug.cgi?id=489221 --- Comment #8 from Steve Hill --- Yes, from my side this looks like a VirtualBox issue, not a Valgrind issue, so can be closed here. Thanks! -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 489221] Unrecognized instruction: _mm256_cvtps_ph (vcvtps2ph)
https://bugs.kde.org/show_bug.cgi?id=489221 --- Comment #7 from Paul Floyd --- Is it OK to close this item then? -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 489221] Unrecognized instruction: _mm256_cvtps_ph (vcvtps2ph)
https://bugs.kde.org/show_bug.cgi?id=489221 --- Comment #6 from Steve Hill --- Argh! You are right. I am running inside a VirtualBox VM and, although the instructions *seem* to work just fine, the feature flag is not set. It looks to be due to this longstanding feature request to add F16C (and FMA/BMI) support to VBox: https://www.virtualbox.org/ticket/15471 Thanks for your help, Steve. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 489221] Unrecognized instruction: _mm256_cvtps_ph (vcvtps2ph)
https://bugs.kde.org/show_bug.cgi?id=489221 --- Comment #5 from Mark Wielaard --- This was implemented in: commit 472b067e39a11a47ae3fa7cd7d3142558f78969d Author: Julian Seward Date: Sun Mar 17 21:41:42 2019 +0100 amd64: Implement RDRAND, VCVTPH2PS and VCVTPS2PH. Bug 398870 - Please add support for instruction vcvtps2ph Bug 353370 - RDRAND amd64->IR: unhandled instruction bytes: 0x48 0xF 0xC7 0xF0 This commit implements: * amd64 RDRAND instruction, on hosts that have it. * amd64 VCVTPH2PS and VCVTPS2PH, on hosts that have it. The presence/absence of these on the host is now reflected in the CPUID results returned to the guest. So code that tests for these features in CPUID and acts accordingly should "just work". * New test cases, none/tests/amd64/rdrand and none/tests/amd64/f16c. These are built if the host's assembler can handle them, in the usual way. And on my machine the reproducer works just fine under valgrind. If it still doesn't for you with latest valgrind could you run with valgrind -v and check the hwcaps detect f16c: --411301-- Arch and hwcaps: AMD64, LittleEndian, amd64-cx16-lzcnt-rdtscp-sse3-ssse3-avx-avx2-bmi-f16c-rdrand-rdseed-fma (and check your machine does actually have f16c set in /proc/cpuinfo) -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 489221] Unrecognized instruction: _mm256_cvtps_ph (vcvtps2ph)
https://bugs.kde.org/show_bug.cgi?id=489221 Paul Floyd changed: What|Removed |Added CC||pjfl...@wanadoo.fr -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 489221] Unrecognized instruction: _mm256_cvtps_ph (vcvtps2ph)
https://bugs.kde.org/show_bug.cgi?id=489221 Gabriel Ravier changed: What|Removed |Added CC||gabrav...@gmail.com -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 489221] Unrecognized instruction: _mm256_cvtps_ph (vcvtps2ph)
https://bugs.kde.org/show_bug.cgi?id=489221 Mark Wielaard changed: What|Removed |Added Status|RESOLVED|REOPENED Ever confirmed|0 |1 Resolution|DUPLICATE |--- --- Comment #4 from Mark Wielaard --- Sorry, looks like you are right. I was confused with the m512 variant, which is AVX512F. The m256 variant is part of F16C. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 489221] Unrecognized instruction: _mm256_cvtps_ph (vcvtps2ph)
https://bugs.kde.org/show_bug.cgi?id=489221 --- Comment #3 from Steve Hill --- According to Intel, this is not part of AVX512F. The repro targets Haswell, which is over 10 years old and does not support any AVX512 at all but still supports this as it is part of F16C: Synopsis __m128i _mm256_cvtps_ph (__m256 a, int imm8) #include Instruction: vcvtps2ph xmm, ymm, imm8 CPUID Flags: F16C Description Convert packed single-precision (32-bit) floating-point elements in a to packed half-precision (16-bit) floating-point elements, and store the results in dst. Rounding is done according to the imm8[2:0] parameter, which can be one of: _MM_FROUND_TO_NEAREST_INT // round to nearest _MM_FROUND_TO_NEG_INF // round down _MM_FROUND_TO_POS_INF // round up _MM_FROUND_TO_ZERO// truncate _MM_FROUND_CUR_DIRECTION // use MXCSR.RC; see _MM_SET_ROUNDING_MODE Hence, I am not convinced that it is a duplicate of bug 383010 as that seems to be AVX512-specific? Of course, if it gets done, I don't really mind that much! -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 489221] Unrecognized instruction: _mm256_cvtps_ph (vcvtps2ph)
https://bugs.kde.org/show_bug.cgi?id=489221 Tom Hughes changed: What|Removed |Added Resolution|--- |DUPLICATE Status|REPORTED|RESOLVED CC||t...@compton.nu --- Comment #2 from Tom Hughes --- It's a dupe of 383010 then. *** This bug has been marked as a duplicate of bug 383010 *** -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 489221] Unrecognized instruction: _mm256_cvtps_ph (vcvtps2ph)
https://bugs.kde.org/show_bug.cgi?id=489221 Mark Wielaard changed: What|Removed |Added CC||m...@klomp.org --- Comment #1 from Mark Wielaard --- The m256 variant is part of AVX512F -- You are receiving this mail because: You are watching all bug changes.
