Hi Sandeep,
On Sat, Mar 2, 2013 at 12:21 PM, sandeep kumar
coolsandyfor...@gmail.com wrote:
Another easy way to make memory(ie..pages) non cacheble is use the
below function,
dma_alloc_coherent(NULL, size, p, GFP_KERNEL);
I did like what you said. With the timings,i can see it is reading directly
from RAM. I have some doubts..
-- What exactly happend here? Here read/write are done by CPU or DMA
controller?
If you have used the virtual address returned by dma_alloc_coherent,
then obviously it is CPU who has done the read/write.
dma_alloc_coherent allocates memory, sets the page table attributes
for this memory as non cacheable.
When ever CPU access this memory, it generates virtual address, MMU
converts this to physical address using page tables.
Page tables has memory attributes which says that this memory is non-cachable.
Thanks,
Arun
I am new to DMA kind of operations, i have one doubt in how to do DMA?
Can you give me some example driver code, for this following case
-- I want to do a DMA from a mem mapped I/O (lets say physical 0x4000)
to RAM location @ 0x8000.
How do you do this?
Thanks
Sandeep
On Fri, Mar 1, 2013 at 10:45 AM, Arun KS getaru...@gmail.com wrote:
On Thu, Feb 28, 2013 at 3:54 PM, sandeep kumar
coolsandyfor...@gmail.com wrote:
1. use early_param to get the physical start address and size of
test_region, or you can just ignore this step and hard code to 510M and
2M
for test purpose only.
2. use ioremap_nocache() to map this region to a virtual region. note
that
this funtion may fail if you are asking a very large vitual memroy
region.
I did the following things,
Thank you so much...It worked. With this i am able to measure RAM
performance.
Another easy way to make memory(ie..pages) non cacheble is use the
below function,
dma_alloc_coherent(NULL, size, p, GFP_KERNEL);
This will set the page tables attributes for this page no-cachable.
All reads writes will always happen from main memory because MMU see
the memory attribute for this page as non cacheble.
Thanks,
Arun
On Thu, Feb 28, 2013 at 11:39 AM, sandeep kumar
coolsandyfor...@gmail.com
wrote:
1. use early_param to get the physical start address and size of
test_region, or you can just ignore this step and hard code to 510M
and 2M
for test purpose only.
2. use ioremap_nocache() to map this region to a virtual region. note
that this funtion may fail if you are asking a very large vitual
memroy
region.
I did the following things,
1) Reserved 3MB memory through ATAGS
2) Wrote small driver to ioremap that memory in following way,
void *tcpm_base = ioremap_nocache(0x03B0, SZ_3MB);
27 if(tcpm_base!=NULL)
28 {
29 printk(Jiffies %x %ld\n\n\n\n, jiffies, jiffies);
30 for(i=0;iSZ_4KB;i++)
31 src = readl(tcpm_base+i);
32 printk(Jiffies %x %ld\n\n\n\n, jiffies, jiffies);
33 }
34 else
35 printk(unable to map 3MB\n);
3) I am getting the following error,
[1.876647] Unable to handle kernel paging request at virtual
address
ea82c000
[1.880950] pgd = c0004000
[1.883636] [ea82c000] *pgd=49818811, *pte=, *ppte=
[1.889892] Internal error: Oops: 7 [#1] PREEMPT
[1.894500] Modules linked in:
[1.897521] CPU: 0Not tainted (3.0.31-g1080f34-dirty #106)
[1.903442] PC is at sand_misc_init+0x4c/0xac
[1.907775] LR is at sand_misc_init+0x3c/0xac
[1.912109] pc : [c0022ee0]lr : [c0022ed0]psr: 8013
[1.912139] sp : e982bf98 ip : fp :
[1.923553] r10: r9 : r8 :
[1.928771] r7 : r6 : c00461b4 r5 : ea828000 r4 :
[1.935272] r3 : 3fff r2 : 3ffd r1 : c07ea2cf r0 :
0063
[1.941802] Flags: Nzcv IRQs on FIQs on Mode SVC_32 ISA ARM
Segment kernel
[1.949096] Control: 10c57c7d Table: 00404059 DAC: 0015
[1.954803]
[1.954833] PC: 0xc0022e60:
[1.959075] 2e60 c09105f0 c0366554 c07ea27e c07ea296 e3a01000
e92d4010
e1a02001 eb0a9acd
[1.967224] 2e80 e59f3008 e5830008 e3a1 e8bd8010 c0dd8380
e92d4037
e3a04000 e3a0063b
[1.975402] 2ea0 e3a01901 e1a02004 e5cd4007 e5cd4006 eb00b9aa
e2505000
0a19 e59f3070
[1.983551] 2ec0 e59f0070 e5931000 e5932000 eb18a072 e58d4000
e3033fff
ea07 e59d2000
[1.991699] 2ee0 e7952002 f57ff04f e6ef2072 e5cd2007 e59d2000
e2822001
e58d2000 e59d2000
[1.999877] 2f00 e1520003 daf4 e59f3024 e59f0024 e5931000
e5932000
e28dd00c e8bd4030
[2.008026] 2f20 ea18a05d e59f0010 e28dd00c e8bd4030 ea18a059
c08ea600
c07ea2cf c07ea2e2
[2.016174] 2f40 e59f3040 e3a01000 e92d4010 e59f0038 e5932000
eb0a845a
e59f3030 e350
[2.024353]
[2.024353] LR: 0xc0022e50:
[2.028594]