Re: Delivery Status Notification (Failure)

2018-05-11 Thread Lucas Stach
Am Freitag, den 11.05.2018, 13:39 +0100 schrieb Russell King - ARM Linux:
> On Fri, May 11, 2018 at 05:07:37PM +0530, Pintu Kumar wrote:
> > Hi,
> > 
> > I need one help.
> > I am using i.MX7 Sabre board with kernel version 4.1.15
> > 
> > Let's say I am interested in GPIO number: 21
> > I wanted to set CPU affinity for particular GPIO->IRQ number, so I
> > tried the below steps:
> > root@10:~# echo 21 > /sys/class/gpio/export
> > root@10:~# echo "rising" > /sys/class/gpio/gpio21/edge
> > root@10:~# cat /proc/interrupts | grep 21
> >   47: 0 0 gpio-mxc 21 Edge gpiolib
> > root@10:~# cat /sys/class/gpio/gpio21/direction
> > in
> > root@10:~# cat /proc/irq/47/smp_affinity
> > 3
> > root@10:~# echo 2 > /proc/irq/47/smp_affinity
> > -bash: echo: write error: Input/output error
> > 
> > But I get input/output error.
> > When I debug further, found that irq_can_set_affinity is returning 0:
> > [0.00] genirq: irq_can_set_affinity (0): balance: 1,
> > irq_data.chip: a81b7e48, irq_set_affinity:   (null)
> > [0.00] write_irq_affinity: FAIL
> > 
> > I also tried first setting /proc/irq/default_smp_affinity to 2 (from 3).
> > This change is working, but the smp_affinity setting for the new IRQ
> > is not working.
> > 
> > When I try to set smp_affinity for mmc0, then it works.
> > # cat /proc/interrupts | grep mmc
> > 295: 55  0 GPCV2  22 Edge  mmc0
> > 296:  0  0 GPCV2  23 Edge  mmc1
> > 297: 52  0 GPCV2  24 Edge  mmc2
> > 
> > root@10:~# echo 2 > /proc/irq/295/smp_affinity
> > root@10:~#
> > 
> > 
> > So, I wanted to know what are the conditions for which setting
> > smp_affinity for an IRQ will work ?
> > 
> > Is there any way by which I can set CPU affinity to a GPIO -> IRQ ?
> > Whether, irq_set_affinity_hint() will work in this case ?
> 
> IRQ affinity is only supported where interrupts are _directly_ wired to
> the GIC.  It's the GIC which does the interrupt steering to the CPU
> cores.
> 
> Interrupts on downstream interrupt controllers (such as GPCV2) have no
> ability to be directed independently to other CPUs - the only possible
> way to change the mapping is to move _all_ interrupts on that controller,
> and any downstream chained interrupts at GIC level.
> 
> Hence why Interrupt 295 has no irq_set_affinity function: there is no way
> for the interrupt controller itself to change the affinity of the input
> interrupt.

The GPCv2 though is a secondary IRQ controller which has a 1:1 mapping
of its input IRQs to the upstream GIC IRQ lines. Affinity can thus be
handled by forwarding the request to the GIC by
irq_chip_set_affinity_parent().

As this is handled correctly in the upstream kernel since the first
commit introducing support for the GPCv2, it seems the issue is only
present in some downstream kernel.

Regards,
Lucas

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Re: Delivery Status Notification (Failure)

2018-05-11 Thread Pintu Kumar
On Fri, May 11, 2018 at 6:34 PM, Lucas Stach  wrote:
> Am Freitag, den 11.05.2018, 13:39 +0100 schrieb Russell King - ARM Linux:
>> On Fri, May 11, 2018 at 05:07:37PM +0530, Pintu Kumar wrote:
>> > Hi,
>> >
>> > I need one help.
>> > I am using i.MX7 Sabre board with kernel version 4.1.15
>> >
>> > Let's say I am interested in GPIO number: 21
>> > I wanted to set CPU affinity for particular GPIO->IRQ number, so I
>> > tried the below steps:
>> > root@10:~# echo 21 > /sys/class/gpio/export
>> > root@10:~# echo "rising" > /sys/class/gpio/gpio21/edge
>> > root@10:~# cat /proc/interrupts | grep 21
>> >   47: 0 0 gpio-mxc 21 Edge gpiolib
>> > root@10:~# cat /sys/class/gpio/gpio21/direction
>> > in
>> > root@10:~# cat /proc/irq/47/smp_affinity
>> > 3
>> > root@10:~# echo 2 > /proc/irq/47/smp_affinity
>> > -bash: echo: write error: Input/output error
>> >
>> > But I get input/output error.
>> > When I debug further, found that irq_can_set_affinity is returning 0:
>> > [0.00] genirq: irq_can_set_affinity (0): balance: 1,
>> > irq_data.chip: a81b7e48, irq_set_affinity:   (null)
>> > [0.00] write_irq_affinity: FAIL
>> >
>> > I also tried first setting /proc/irq/default_smp_affinity to 2 (from 3).
>> > This change is working, but the smp_affinity setting for the new IRQ
>> > is not working.
>> >
>> > When I try to set smp_affinity for mmc0, then it works.
>> > # cat /proc/interrupts | grep mmc
>> > 295: 55  0 GPCV2  22 Edge  mmc0
>> > 296:  0  0 GPCV2  23 Edge  mmc1
>> > 297: 52  0 GPCV2  24 Edge  mmc2
>> >
>> > root@10:~# echo 2 > /proc/irq/295/smp_affinity
>> > root@10:~#
>> >
>> >
>> > So, I wanted to know what are the conditions for which setting
>> > smp_affinity for an IRQ will work ?
>> >
>> > Is there any way by which I can set CPU affinity to a GPIO -> IRQ ?
>> > Whether, irq_set_affinity_hint() will work in this case ?
>>
>> IRQ affinity is only supported where interrupts are _directly_ wired to
>> the GIC.  It's the GIC which does the interrupt steering to the CPU
>> cores.
>>
>> Interrupts on downstream interrupt controllers (such as GPCV2) have no
>> ability to be directed independently to other CPUs - the only possible
>> way to change the mapping is to move _all_ interrupts on that controller,
>> and any downstream chained interrupts at GIC level.
>>
>> Hence why Interrupt 295 has no irq_set_affinity function: there is no way
>> for the interrupt controller itself to change the affinity of the input
>> interrupt.
>
> The GPCv2 though is a secondary IRQ controller which has a 1:1 mapping
> of its input IRQs to the upstream GIC IRQ lines. Affinity can thus be
> handled by forwarding the request to the GIC by
> irq_chip_set_affinity_parent().
>
> As this is handled correctly in the upstream kernel since the first
> commit introducing support for the GPCv2, it seems the issue is only
> present in some downstream kernel.
>

OK. Thanks so much for your reply.

I saw some of the drivers using irq_set_affinity_hint() to force the
IRQ affinity to a particular CPU.
This is the sample:
{
cpumask_clear(mask);
cpumask_set_cpu(cpu, mask);
irq_set_affinity_hint(irq, mask);
}

Whether this logic will work for a particular GPIO pin ?


> Regards,
> Lucas

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Re: Delivery Status Notification (Failure)

2018-05-11 Thread Pintu Kumar
Hi,

I need one help.
I am using i.MX7 Sabre board with kernel version 4.1.15

Let's say I am interested in GPIO number: 21
I wanted to set CPU affinity for particular GPIO->IRQ number, so I
tried the below steps:
root@10:~# echo 21 > /sys/class/gpio/export
root@10:~# echo "rising" > /sys/class/gpio/gpio21/edge
root@10:~# cat /proc/interrupts | grep 21
  47: 0 0 gpio-mxc 21 Edge gpiolib
root@10:~# cat /sys/class/gpio/gpio21/direction
in
root@10:~# cat /proc/irq/47/smp_affinity
3
root@10:~# echo 2 > /proc/irq/47/smp_affinity
-bash: echo: write error: Input/output error

But I get input/output error.
When I debug further, found that irq_can_set_affinity is returning 0:
[0.00] genirq: irq_can_set_affinity (0): balance: 1,
irq_data.chip: a81b7e48, irq_set_affinity:   (null)
[0.00] write_irq_affinity: FAIL

I also tried first setting /proc/irq/default_smp_affinity to 2 (from 3).
This change is working, but the smp_affinity setting for the new IRQ
is not working.

When I try to set smp_affinity for mmc0, then it works.
# cat /proc/interrupts | grep mmc
295: 55  0 GPCV2  22 Edge  mmc0
296:  0  0 GPCV2  23 Edge  mmc1
297: 52  0 GPCV2  24 Edge  mmc2

root@10:~# echo 2 > /proc/irq/295/smp_affinity
root@10:~#


So, I wanted to know what are the conditions for which setting
smp_affinity for an IRQ will work ?

Is there any way by which I can set CPU affinity to a GPIO -> IRQ ?
Whether, irq_set_affinity_hint() will work in this case ?


Thanks,
Pintu

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Not able to set smp_affinity for an IRQ on i.MX7

2018-05-11 Thread Pintu Kumar
Hi,

I need one help.
I am using i.MX7 Sabre board with kernel version 4.1.15

Let's say I am interested in GPIO number: 21
I wanted to set CPU affinity for particular GPIO->IRQ number, so I tried
the below steps:
root@10:~# echo 21 > /sys/class/gpio/export
root@10:~# echo "rising" > /sys/class/gpio/gpio21/edge
root@10:~# cat /proc/interrupts | grep 21
  47: 0 0 gpio-mxc 21 Edge gpiolib
root@10:~# cat /sys/class/gpio/gpio21/direction
in
root@10:~# cat /proc/irq/47/smp_affinity
3
root@10:~# echo 2 > /proc/irq/47/smp_affinity
-bash: echo: write error: Input/output error

But I get input/output error.
When I debug further, found that irq_can_set_affinity is returning 0:
[0.00] genirq: irq_can_set_affinity (0): balance: 1, irq_data.chip:
a81b7e48, irq_set_affinity:   (null)
[0.00] write_irq_affinity: FAIL

I also tried first setting /proc/irq/default_smp_affinity to 2 (from 3).
This change is working, but the smp_affinity setting for the new IRQ is not
working.

When I try to set smp_affinity for mmc0, then it works.
# cat /proc/interrupts | grep mmc
295: 55  0 GPCV2  22 Edge  mmc0
296:  0  0 GPCV2  23 Edge  mmc1
297: 52  0 GPCV2  24 Edge  mmc2

root@10:~# echo 2 > /proc/irq/295/smp_affinity
root@10:~#


So, I wanted to know what are the conditions for which setting smp_affinity
for an IRQ will work ?

Is there any way by which I can set CPU affinity to a GPIO -> IRQ ?
Whether, irq_set_affinity_hint() will work in this case ?


Thanks,
Pintu
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Re: Kernelnewbies Digest, Vol 89, Issue 14

2018-05-11 Thread Gioh Kim
Hi,

Sadly several months ago, the eudyptula announced that they do no get
new challenger.
For old chanllenger, they continues the service.

You cannot join the challenger at the moment.
But it you are already registered, you can send sollution and get feedback.




On Fri, Apr 20, 2018 at 8:28 AM, Aleix Roca Nonell
 wrote:
> Hello,
>
> I just wanted to ask the same question. I'm still doing the challenge
> but it has been amost two months since I sent my last solution and
> there has not been any answer yet (except the usual auto-response of
> task received). Does somebody knows if it is still alive even for old
> challengers?
>
> Thank you.
>
> On Fri, Apr 20, 2018 at 02:07:23AM +0300, Elias Kouskoumvekakis wrote:
>> Hi Tran,
>>
>> there is a github repo which contains all the challenges. Just google it and 
>> it's one of the first hits.
>> Warning: it also has the solutions and sometimes it's difficult to resist 
>> after trying for a lot of hours to solve something!
>>
>> As far as the actual challenge I think it went offline sometime now.
>> However, I've read that whoever runs it accepts solutions from old 
>> challengers.
>>
>> Best,
>> Elias
>> On Apr 19 2018, at 7:38 pm, Tran Ly Vu  wrote:
>> >
>> > Hi,
>> >
>> > Is eudyptula challenge still alive?
>> >
>> > Thanks
>> >
>> > On 20 April 2018 at 00:00, > > (mailto:kernelnewbies-requ...@kernelnewbies.org)> wrote:
>> > > Send Kernelnewbies mailing list submissions to
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>> > >
>> > > When replying, please edit your Subject line so it is more specific
>> > > than "Re: Contents of Kernelnewbies digest..."
>> > >
>> > >
>> > > Today's Topics:
>> > > 1. How can I disable compile optimization in kernel for friendly
>> > > debugging, Thanks (sizel)
>> > >
>> > >
>> > > --
>> > > Message: 1
>> > > Date: Thu, 19 Apr 2018 16:58:40 +0800 (CST)
>> > > From: sizel mailto:si...@163.com)>
>> > > To: kernelnewbies > > > (mailto:kernelnewbies@kernelnewbies.org)>
>> > > Subject: How can I disable compile optimization in kernel for friendly
>> > > debugging, Thanks
>> > > Message-ID: <623d8297.8a0f.162dd208d7b.coremail.si...@163.com 
>> > > (mailto:623d8297.8a0f.162dd208d7b.coremail.si...@163.com)>
>> > > Content-Type: text/plain; charset="gbk"
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>> > > --
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Best regards,
Gioh Kim

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Should I build the perf again when I change the kernel options?

2018-05-11 Thread Gioh Kim
Hi,

Should I build the perf again when I change the kernel options?

I have 4.14.34 kernel on my desktop and I built perf for my self.
I'd like to change some options.
Should I rebuild perf perf again?

And another case.
If there are two machines that have the same kernel version and
different kernel options.
Should I build the perf for each machines?
Or can I build the perf on one machine and use it on another machine?

Thank you in advance!

-- 

Best regards,
Gioh Kim

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