Re: [Kicad-developers] Issue with autoplacing of designator and name in schematic
Hi Nick, Hi Seth, I opened https://gitlab.com/kicad/code/kicad/-/issues/9345 and will have a look into it. Cheers Am So., 10. Okt. 2021 um 21:59 Uhr schrieb Nick Østergaard < oe.n...@gmail.com>: > Hi Bastian, > > You should probably report it as an issue on > https://gitlab.com/kicad/code/kicad/-/issues > > There you can also add a screenshot to help explain what you are > seeing. Remember to add the version information. > > Nick > > On Fri, 8 Oct 2021 at 22:08, Bastian wrote: > > > > Hi > > > > Placing a new IC component on the schematic moves the designator and > component name ontop in the center. Always colliding with VCC pins. > > Running autoplace puts the values below the component colliding with GND > pins. > > > > The components come with a point where the designator and name can be > placed without interfering with pins. But it is never put there. > > > > Is this something I can have a look at or is somebody already working on > that? > > > > Basti > > ___ > > Mailing list: https://launchpad.net/~kicad-developers > > Post to : kicad-developers@lists.launchpad.net > > Unsubscribe : https://launchpad.net/~kicad-developers > > More help : https://help.launchpad.net/ListHelp > ___ Mailing list: https://launchpad.net/~kicad-developers Post to : kicad-developers@lists.launchpad.net Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
[Kicad-developers] Issue with autoplacing of designator and name in schematic
Hi Placing a new IC component on the schematic moves the designator and component name ontop in the center. Always colliding with VCC pins. Running autoplace puts the values below the component colliding with GND pins. The components come with a point where the designator and name can be placed without interfering with pins. But it is never put there. Is this something I can have a look at or is somebody already working on that? Basti ___ Mailing list: https://launchpad.net/~kicad-developers Post to : kicad-developers@lists.launchpad.net Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
Re: [Kicad-developers] GitHub Plugin (my nemesis)
True, I see the problem with everything in one repo with branches. Maybe it was not a good idea after all. 2017-09-22 11:13 GMT+02:00 Simon Küppers : > Good point, actually. > > > Am 22. September 2017 11:08:15 MESZ schrieb Miguel Angel Ajo Pelayo < > majop...@redhat.com>: >> >> I believe it's better if each library type has a single directory on the >> top of the libraries repo, in a single branch. >> >> That would let you have branches like >> >> master >> stable/4 >> stable/5 >> stable/6 later on, >> >> and point the specific versions of kicad to such branches, in a way that >> an old version of kicad would not explode if new features appear in >> libraries in a later version. >> >> >> In that way, it's very easy to backport a change if the library is still >> backwards-compatible >> >> git checkout stable/4 >> git cherry-pick >> git push >> >> >> >> On Fri, Sep 22, 2017 at 11:05 AM, Miguel Angel Ajo Pelayo < >> majop...@redhat.com> wrote: >> >>> Please don't use branches for that. >>> >>> Branches are to track separate development efforts or release >>> cycles/stabilization. >>> >>> Using branches, while it's possible was not the intent when git was >>> designed. >>> >>> If you do it that way, then you won't be able to use branches to track >>> libraries in different stabilization phases, etc. >>> >>> >>> >>> >>> On Fri, Sep 22, 2017 at 10:51 AM, Bastian Neumannn < >>> neumann.bast...@gmail.com> wrote: >>> >>>> I really like the idea of having one repo with all the .pretty folders >>>> in different branches. The master can have meta data about the branches. >>>> >>>> That also gives the ability to manage library downloads as you can >>>> download the branch as a zip. >>>> >>>> Using git for library management is ideally implemented as a plugin. >>>> With the ability to define own repositories as well. The library downloader >>>> can fetch the branch list and present a selection to the user to fetch >>>> whatever the user want to fetch. >>>> >>>> zip files of the branches can be mirrored on other servers as well for >>>> the people not having access to github. >>>> >>>> Cheers, >>>> Basti >>>> >>>> 2017-09-22 10:39 GMT+02:00 Simon Küppers : >>>> >>>>> And by the way, this would be a feature that is completely new to the >>>>> market (correct me if I'm wrong). Git integration into eda software. >>>>> I only know of altium that has an svn interface and a proprietary >>>>> vault. The features both of which could be (at some point) realized using >>>>> git. >>>>> Innovation is fun :-) >>>>> >>>>> The idea of modifying a footprint from the standard lib, and >>>>> generating a patch that could be directly send to the maintainers (maybe >>>>> using the very new library website) would make contributing very easy! >>>>> >>>>> Am 22. September 2017 10:13:49 MESZ schrieb Ingo Kletti < >>>>> ikle...@htwg-konstanz.de>: >>>>> >>>>>> Hi, >>>>>> >>>>>> Am 22.09.2017 um 09:44 schrieb Oliver Walters: >>>>>> >>>>>>> [...] svn has the advantage of being able to >>>>>>> pull selective directories from GitHub. You could present the user >>>>>>> with a >>>>>>> list of which libraries they actually want to pull down >>>>>>> >>>>>> >>>>>> So, just like JS (@tiger12506) I'm excited any time the git integration >>>>>> comes up for discussion. >>>>>> >>>>>> While I understand the initial focus on Github, it's just like Simon >>>>>> stated: >>>>>> >>>>>> Why not just ask the user for a working directory and pull the >>>>>>> libraries there using actual git? >>>>>>> This has the obvious advantage, that anyone can use this not only >>>>>>> >>>>>> with > github but also with his or her own local repository.. >>>>>> >>>>>> Without in-depth knowledge about git vs. g
Re: [Kicad-developers] GitHub Plugin (my nemesis)
I really like the idea of having one repo with all the .pretty folders in different branches. The master can have meta data about the branches. That also gives the ability to manage library downloads as you can download the branch as a zip. Using git for library management is ideally implemented as a plugin. With the ability to define own repositories as well. The library downloader can fetch the branch list and present a selection to the user to fetch whatever the user want to fetch. zip files of the branches can be mirrored on other servers as well for the people not having access to github. Cheers, Basti 2017-09-22 10:39 GMT+02:00 Simon Küppers : > And by the way, this would be a feature that is completely new to the > market (correct me if I'm wrong). Git integration into eda software. > I only know of altium that has an svn interface and a proprietary vault. > The features both of which could be (at some point) realized using git. > Innovation is fun :-) > > The idea of modifying a footprint from the standard lib, and generating a > patch that could be directly send to the maintainers (maybe using the very > new library website) would make contributing very easy! > > Am 22. September 2017 10:13:49 MESZ schrieb Ingo Kletti < > ikle...@htwg-konstanz.de>: > >> Hi, >> >> Am 22.09.2017 um 09:44 schrieb Oliver Walters: >> >>> [...] svn has the advantage of being able to >>> pull selective directories from GitHub. You could present the user with a >>> list of which libraries they actually want to pull down >>> >> >> So, just like JS (@tiger12506) I'm excited any time the git integration >> comes up for discussion. >> >> While I understand the initial focus on Github, it's just like Simon stated: >> >> Why not just ask the user for a working directory and pull the >>> libraries there using actual git? >>> This has the obvious advantage, that anyone can use this not only >>> >> with > github but also with his or her own local repository.. >> >> Without in-depth knowledge about git vs. git-plugin vs. svn: >> >> Will it be possible to use another repository besides Github? >> >> In our case, we require our students to maintain their project on a >> Gitlab server. This server also hosts the KiCad libraries that were >> created for internal purposes. ATM, it's not possible to just pull the >> latest version of the internal KiCad libraries from inside KiCad >> >> And it might not just be us. I think having a proper git integration >> could ease the library handling of many users. >> >> In the end, a proper git and/or svn integration would also open the >> possibility to directly handle version management of KiCad projects from >> inside KiCad. >> >> Regards, >> >> Ingo >> >> -- >> >> Mailing list: https://launchpad.net/~kicad-developers >> Post to : kicad-developers@lists.launchpad.net >> Unsubscribe : https://launchpad.net/~kicad-developers >> More help : https://help.launchpad.net/ListHelp >> >> > ___ > Mailing list: https://launchpad.net/~kicad-developers > Post to : kicad-developers@lists.launchpad.net > Unsubscribe : https://launchpad.net/~kicad-developers > More help : https://help.launchpad.net/ListHelp > > ___ Mailing list: https://launchpad.net/~kicad-developers Post to : kicad-developers@lists.launchpad.net Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
Re: [Kicad-developers] A question about development environments for Kicad...
I use KDevelop under Linux for building and debugging. It works pretty well with cmake. 2017-09-08 7:07 GMT+02:00 Bernhard Stegmaier : > You can run it from build directory also on macOS, no need to install (I > do this all the time). > You have to run the project manager (=> kicad.app) and eeschema, pcbnew, > etc. from there. > Running standalone binaries won’t work. > > > Regards, > Bernhard > > On 8. Sep 2017, at 03:38, Jon Evans wrote: > > On Linux you can run the binaries from the project directory (or at least, > I can). So on my Linux machines I can build and debug individual parts . > On MacOS I do have to run make install like you say, but then can debug > things from my temporary install directory. What do you mean by edit > interactively, though? > > -Jon > > On Thu, Sep 7, 2017 at 9:32 PM, Terry Gray wrote: > >> As a new addition to this group I have a question. What are the >> prevalent dev. environments used by the primary Kicad developers. This >> might seem an inconsequential query, but I have a good reason for asking. >> As far as I can discern (and I am hoping you guys can help clear this up >> for me) the current project structure doesn't seem to lend itself to the >> normal edit, build, debug cycle. At least as far as I can tell. The built >> executables won't execute in place with them in their corresponding project >> directories...that is to say, Kicad will execute but it can't instantiate >> eeschema because it can't find all the libraries. I am currently >> performing a make install, to a local directory, to keep from corrupting my >> working installation, and I can debug from there but I can't edit >> interactively since the embedded .elf code isn't the original source. Can >> someone clear this up for me? >> >> >> ___ >> Mailing list: https://launchpad.net/~kicad-developers >> Post to : kicad-developers@lists.launchpad.net >> Unsubscribe : https://launchpad.net/~kicad-developers >> More help : https://help.launchpad.net/ListHelp >> > > ___ > Mailing list: https://launchpad.net/~kicad-developers > Post to : kicad-developers@lists.launchpad.net > Unsubscribe : https://launchpad.net/~kicad-developers > More help : https://help.launchpad.net/ListHelp > > > > ___ > Mailing list: https://launchpad.net/~kicad-developers > Post to : kicad-developers@lists.launchpad.net > Unsubscribe : https://launchpad.net/~kicad-developers > More help : https://help.launchpad.net/ListHelp > > ___ Mailing list: https://launchpad.net/~kicad-developers Post to : kicad-developers@lists.launchpad.net Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
Re: [Kicad-developers] Concept Idea for schematic page management
Hi, the big designs are mostly mainboards with on board CPU for networking and communications. sometimes there are FPGAs there as well. We use a software called Zuken for that. I like the Symbols and net idea as well I will keep it in mind. Cheers, Basti 2017-09-07 11:59 GMT+02:00 Simon Küppers : > I like the idea that you have posed. I guess this is meant for the > eeschema rewrite that is scheduled in the future? > > Out of curiousity, what kind of monster designs are you doing that > require 40 A3 sheets of paper? :-D motherboards? huge FPGA boards? > > > > Am 07.09.2017 um 11:29 schrieb Bastian Neumannn: > > Hi, > > > > I ususlly work with schematics of around 5 to 15 pages. A3 sized that > > is. Using A4 for schematics that easily bloats up to 30 pages. > > > > For those schematics I am not using KiCad since they are in a > > professional environment. > > > > Given the situation that I am currently working on a big design in KiCad > > that reaches up to 40 pages A3 it is a little bit cumbersome to keep > > track of subsheets. > > > > I propose to add more functionality to the hirarchy browser. > > > > 1. Make the widget dockable so I can easily jump between subsheets > > 2. Have empty sheets that do not have to be placed on the schematic for > > stuff like: > > - Table of contents > > - Block diagramms > > - Change History & Reviews > > - Additional Information > > 3. Have the ability to change the order of the sheets. Since I might add > > one later on and don't want it to be at the end of the list > > > > Here is an inclomplete mock up of what a big schematic for a mainboard > > could look like. > > Inline-Bild 1 > > > > I am looking for more ideas on what to change. I think some of the > > changes will have a big impact so we better talk about a concept > beforehand. > > > > Cheers, > > Basti > > > > > > ___ > > Mailing list: https://launchpad.net/~kicad-developers > > Post to : kicad-developers@lists.launchpad.net > > Unsubscribe : https://launchpad.net/~kicad-developers > > More help : https://help.launchpad.net/ListHelp > > > > ___ > Mailing list: https://launchpad.net/~kicad-developers > Post to : kicad-developers@lists.launchpad.net > Unsubscribe : https://launchpad.net/~kicad-developers > More help : https://help.launchpad.net/ListHelp > ___ Mailing list: https://launchpad.net/~kicad-developers Post to : kicad-developers@lists.launchpad.net Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
[Kicad-developers] Concept Idea for schematic page management
Hi, I ususlly work with schematics of around 5 to 15 pages. A3 sized that is. Using A4 for schematics that easily bloats up to 30 pages. For those schematics I am not using KiCad since they are in a professional environment. Given the situation that I am currently working on a big design in KiCad that reaches up to 40 pages A3 it is a little bit cumbersome to keep track of subsheets. I propose to add more functionality to the hirarchy browser. 1. Make the widget dockable so I can easily jump between subsheets 2. Have empty sheets that do not have to be placed on the schematic for stuff like: - Table of contents - Block diagramms - Change History & Reviews - Additional Information 3. Have the ability to change the order of the sheets. Since I might add one later on and don't want it to be at the end of the list Here is an inclomplete mock up of what a big schematic for a mainboard could look like. [image: Inline-Bild 1] I am looking for more ideas on what to change. I think some of the changes will have a big impact so we better talk about a concept beforehand. Cheers, Basti ___ Mailing list: https://launchpad.net/~kicad-developers Post to : kicad-developers@lists.launchpad.net Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
Re: [Kicad-developers] [PATCH] Select via sizes from design rules
Hi,
I did something similar, but added a little bit more to it.
It is not yet done so no patch but a link to the Github Repo.
https://github.com/DasBasti/KiCad/tree/via_types_in_design_rules
The goal is to have a list of all used vias in the design in your design
rules. So you can enable micro vias for more than just the outer layers.
And not just give all the constraints up.
I am currently working on having the routing tool detect where the via
should go if a mcro via is selected.
Please have a look at my code and maybe yours will fit in.
Cheers,
Basti
2017-09-04 22:18 GMT+02:00 Mathias Grimmberger :
>
> Hi Maciej,
>
> Maciej Sumiński writes:
> > Hi Mathias,
> >
> > I apologize for not replying to the width setting dropbox earlier, now
> > it seems to be too late to change the idea.
> >
> > Your patch is a clever solution to the problem, so if there are no more
> > ideas/patches for setting via sizes, I am going to apply your changes.
>
>
> Below is an updated patch, the original one would not disable the
> dropdown when the "use netclass values" checkbox was checked.
>
>
> Have fun,
>
> MGri
>
>
>
> diff --git a/pcbnew/dialogs/dialog_track_via_properties.cpp
> b/pcbnew/dialogs/dialog_track_via_properties.cpp
> index 28d4c1b30..15db2bc5a 100644
> --- a/pcbnew/dialogs/dialog_track_via_properties.cpp
> +++ b/pcbnew/dialogs/dialog_track_via_properties.cpp
> @@ -189,6 +189,30 @@ DIALOG_TRACK_VIA_PROPERTIES::DIALOG_TRACK_VIA_PROPERTIES(
> PCB_BASE_FRAME* aParen
> setCommonVal( viaY, m_ViaYCtrl, m_viaY );
> setCommonVal( viaDiameter, m_ViaDiameterCtrl, m_viaDiameter );
> setCommonVal( viaDrill, m_ViaDrillCtrl, m_viaDrill );
> +m_DesignRuleViasUnit->SetLabel( GetAbbreviatedUnitsLabel(
> g_UserUnit ) );
> +
> +int viaSelection = wxNOT_FOUND;
> +
> +for( unsigned ii = 0; ii <
> aParent->GetDesignSettings().m_ViasDimensionsList.size();
> ii++ )
> +{
> +VIA_DIMENSION* viaDimension = &aParent->GetDesignSettings().
> m_ViasDimensionsList[ii];
> +wxString msg = StringFromValue( g_UserUnit,
> viaDimension->m_Diameter, false )
> ++ " / " + StringFromValue( g_UserUnit,
> viaDimension->m_Drill, false );
> +m_DesignRuleViasCtrl->Append( msg, viaDimension );
> +
> +if( viaSelection == wxNOT_FOUND && viaDiameter ==
> viaDimension->m_Diameter
> +&& viaDrill == viaDimension->m_Drill )
> +{
> +viaSelection = ii;
> +}
> +}
> +
> +m_DesignRuleViasCtrl->SetSelection( viaSelection );
> +
> +m_DesignRuleViasCtrl->Connect( wxEVT_CHOICE,
> wxCommandEventHandler( DIALOG_TRACK_VIA_PROPERTIES::onViaSelect ), NULL,
> this );
> +m_ViaDiameterCtrl->Connect( wxEVT_TEXT, wxCommandEventHandler(
> DIALOG_TRACK_VIA_PROPERTIES::onViaEdit ), NULL, this );
> +m_ViaDrillCtrl->Connect( wxEVT_TEXT, wxCommandEventHandler(
> DIALOG_TRACK_VIA_PROPERTIES::onViaEdit ), NULL, this );
> +
> m_ViaDiameterCtrl->SetFocus();
> }
> else
> @@ -410,6 +434,10 @@ void DIALOG_TRACK_VIA_PROPERTIES::onViaNetclassCheck(
> wxCommandEvent& aEvent )
> {
> bool enableNC = aEvent.IsChecked();
>
> +m_DesignRuleVias->Enable( !enableNC );
> +m_DesignRuleViasCtrl->Enable( !enableNC );
> +m_DesignRuleViasUnit->Enable( !enableNC );
> +
> m_ViaDiameterLabel->Enable( !enableNC );
> m_ViaDiameterCtrl->Enable( !enableNC );
> m_ViaDiameterUnit->Enable( !enableNC );
> @@ -433,6 +461,24 @@ void DIALOG_TRACK_VIA_PROPERTIES::onOkClick(
> wxCommandEvent& aEvent )
> }
>
>
> +void DIALOG_TRACK_VIA_PROPERTIES::onViaSelect( wxCommandEvent& aEvent )
> +{
> +VIA_DIMENSION* viaDimension = static_cast (
> aEvent.GetClientData() );
> +
> +wxString msg = StringFromValue( g_UserUnit, viaDimension->m_Diameter,
> false );
> +m_ViaDiameterCtrl->ChangeValue( msg );
> +
> +msg = StringFromValue( g_UserUnit, viaDimension->m_Drill, false );
> +m_ViaDrillCtrl->ChangeValue( msg );
> +}
> +
> +
> +void DIALOG_TRACK_VIA_PROPERTIES::onViaEdit( wxCommandEvent& aEvent )
> +{
> +m_DesignRuleViasCtrl->SetSelection( wxNOT_FOUND );
> +}
> +
> +
> bool DIALOG_TRACK_VIA_PROPERTIES::check() const
> {
> bool trackNetclass = m_trackNetclass->IsChecked();
> diff --git a/pcbnew/dialogs/dialog_track_via_properties.h
> b/pcbnew/dialogs/dialog_track_via_properties.h
> index 14e15518c..50909924c 100644
> --- a/pcbnew/dialogs/dialog_track_via_properties.h
> +++ b/pcbnew/dialogs/dialog_track_via_properties.h
> @@ -46,6 +46,8 @@ private:
> void onViaNetclassCheck( wxCommandEvent& aEvent ) override;
> void onCancelClick( wxCommandEvent& aEvent ) override;
> void onOkClick( wxCommandEvent& aEvent ) override;
> +void onViaSelect( wxCommandEvent& aEvent );
> +void onViaEdit( wxCommandEvent& aEvent );
>
> void OnInitDlg( wxInitDialogEvent& event ) override
> {
> diff --git a/pcbnew/dialogs/dialog_tra
[Kicad-developers] Odd behaviour with try catch in pcb parser
Hi,
I am quite new to C++ and can not wrap my head around the issue I
encountered in the code below.
To give a littel background:
I am currently adding information to the via list saved as user_via in the
kicad_pcb file.
Adding more values to the keyword causes the compatibility to break
backwards. Since the parser expects an closing parenthesis at the second
value and can not find it.
But also forwards, since old save files have two valuies and than the
clopsing parenthesis. I came to te conclusion to load up sensible default
data when loading old files is the way to go. So I tried this piece of code:
int viaSize = parseBoardUnits( "user via size" );
int viaDrill = parseBoardUnits( "user via drill" );
try
{
VIATYPE_T viaType = (VIATYPE_T)parseInt( "user via type" );
PCB_LAYER_ID viaStartLayer = (PCB_LAYER_ID)parseInt( "user via start" );
PCB_LAYER_ID viaEndLayer = (PCB_LAYER_ID)parseInt( "user via end" );
designSettings.m_ViasDimensionsList.push_back( VIA_DIMENSION( viaSize,
viaDrill, viaType, viaStartLayer, viaEndLayer ) );
}
catch(const PARSE_ERROR& parse_error )
{
designSettings.m_ViasDimensionsList.push_back( VIA_DIMENSION( viaSize,
viaDrill, VIA_NOT_DEFINED, F_Cu, B_Cu ) );
}
Stepping through line by line leads me to the catch part of the block but
the error is shown and pcbnew closed nonetheless.
This is because it also propagetes down the call stack to the parseBOARD()
function where it end in the else part of the catch block
try
{
return parseBOARD_unchecked(); // <- This parses the board file and
encounters the code above that should catch the PARSE_ERROR
}
catch( const PARSE_ERROR& parse_error )
{
if( m_tooRecent )
throw FUTURE_FORMAT_ERROR( parse_error, GetRequiredVersion() );
else
throw; // we end here anyway
}
I thought having an exception caught does stop its propagation? So why does
it come anyway?
Cheers,
Basti
___
Mailing list: https://launchpad.net/~kicad-developers
Post to : kicad-developers@lists.launchpad.net
Unsubscribe : https://launchpad.net/~kicad-developers
More help : https://help.launchpad.net/ListHelp
Re: [Kicad-developers] Dealing with addition to kicad_pcb files
Having the design rules imported from eagle via a python script is the way to go IMHO. I don't see the benefit of adapting to a proprietary file format. Having a warning shown is a better way than not starting up at all. I might have a look at it tomorrow. Cheers, Basti Am 31.08.2017 10:18 nachm. schrieb "Tomasz Wlostowski" < tomasz.wlostow...@cern.ch>: On 31.08.2017 19:59, Simon Küppers wrote: > Does it make sense to maybe use something like the EAGLE DRU Format? > Maybe make it fully compatible to it? Some fabs give you the EAGLE DRU File. > > Hi all, IMHO a warning on unrecognized token while parsing files is a must - in many cases users run nightlies to benefit from the latest features, but board manufacturers or companies run the stable release (due to IT restrictions or just worries about stability). Current situation makes this difficult (see complaints on the forum...) As for the DRU format - I wouldn't standardize on anything proprietary. Also Eagle's design rules are somewhat simpler than what we're aiming at in Kicad. Tom ___ Mailing list: https://launchpad.net/~kicad-developers Post to : kicad-developers@lists.launchpad.net Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp ___ Mailing list: https://launchpad.net/~kicad-developers Post to : kicad-developers@lists.launchpad.net Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
Re: [Kicad-developers] Dealing with addition to kicad_pcb files
I think this is a feasible solution. Having the possibility to import the values let's you create a database of manufacturing templates. Am 31.08.2017 7:56 nachm. schrieb "José Ignacio" : > I don't see why you couldn't have both, an embedded version of the actual > setup and the ability to import/export from/to an external file. > > On Thu, Aug 31, 2017 at 12:54 PM, Neal Hollingsworth < > nealanth...@gmail.com> wrote: > >> Hi all, >> I've mostly been lurking on the list, but thought I would make a >> suggestion regarding the via stack configuration. It might be nice to store >> the actual configuration/stack-up/DRC settings in an external file. The >> idea is that these are processes paraders that are deaigned to in most >> cases. This would make it possible have have e.g. A configuration file for >> a specific board house and price point. The board file would then only need >> to store a reference to the configuration file. Just a thought, take it for >> whatever it's worth! >> Neal Hollingsworth >> >> On Thu, Aug 31, 2017 at 12:44 PM Wayne Stambaugh >> wrote: >> >>> On 8/31/2017 1:21 PM, Bastian Neumannn wrote: >>> > Hi, >>> > >>> > I am currently building a feature that lets you input a via stack >>> > configuration. >>> > This information needs to be saved with the pcb data. So I tried >>> putting >>> > it into >>> > the kicad_pcb file. >>> > >>> > Now older versions will not load the file because it has additional >>> > values that >>> > it did not expect. >>> > >>> > How do you deal with that problem? >>> >>> The official policy is that file format changes must be backwards >>> compatible not forwards compatible. In other words, the user will have >>> to download the version KiCad where the change was made. >>> >>> If you make any changes to any of the file formats, you must increment >>> the file format rev number. This will cause the appropriate exception >>> to be raised which will warn the user the file version is newer than the >>> file version supported by the version of KiCad they are using. >>> >>> Since this is all very new and has not been planned for the stable 5 >>> release, I would most likely merge this into the master branch after the >>> stable 5 branch is created. >>> >>> Cheers, >>> >>> Wayne >>> >>> > >>> > Cheers, >>> > Basti >>> > >>> > >>> > ___ >>> > Mailing list: https://launchpad.net/~kicad-developers >>> > Post to : kicad-developers@lists.launchpad.net >>> > Unsubscribe : https://launchpad.net/~kicad-developers >>> > More help : https://help.launchpad.net/ListHelp >>> > >>> >>> ___ >>> Mailing list: https://launchpad.net/~kicad-developers >>> Post to : kicad-developers@lists.launchpad.net >>> Unsubscribe : https://launchpad.net/~kicad-developers >>> More help : https://help.launchpad.net/ListHelp >>> >> -- >>Neal >> >> ___ >> Mailing list: https://launchpad.net/~kicad-developers >> Post to : kicad-developers@lists.launchpad.net >> Unsubscribe : https://launchpad.net/~kicad-developers >> More help : https://help.launchpad.net/ListHelp >> >> > > ___ > Mailing list: https://launchpad.net/~kicad-developers > Post to : kicad-developers@lists.launchpad.net > Unsubscribe : https://launchpad.net/~kicad-developers > More help : https://help.launchpad.net/ListHelp > > ___ Mailing list: https://launchpad.net/~kicad-developers Post to : kicad-developers@lists.launchpad.net Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
[Kicad-developers] Dealing with addition to kicad_pcb files
Hi, I am currently building a feature that lets you input a via stack configuration. This information needs to be saved with the pcb data. So I tried putting it into the kicad_pcb file. Now older versions will not load the file because it has additional values that it did not expect. How do you deal with that problem? Cheers, Basti ___ Mailing list: https://launchpad.net/~kicad-developers Post to : kicad-developers@lists.launchpad.net Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
Re: [Kicad-developers] [PATCH] Change track width setting to dropbox
It looks like this right now. now i need to add the information to the kicad_pcb file so it gets saved. 2017-08-31 16:42 GMT+02:00 Greg Smith : > On Thursday, August 31, 2017, 6:58:27 AM CDT, Bastian Neumannn < > neumann.bast...@gmail.com> wrote: > > > "combined with a nice input interface for via types and start/end layer in > the design rules is what I am aiming for" > > > It would be awesome if the interface or at least the specification within > KiCad were similar to or a superset of Eagle DRU. See the "Setup" field and > explanation in the following image. > > https://i.stack.imgur.com/X0zvH.png > > I'm developing the ability to read DRU files[1] and it would be nice to > import the layer specification from the DRU file as well. > > [1] https://forum.kicad.info/t/design-rules-file-load-save/7044/21 > > > ___ Mailing list: https://launchpad.net/~kicad-developers Post to : kicad-developers@lists.launchpad.net Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
Re: [Kicad-developers] [PATCH] Change track width setting to dropbox
I am currently trying something similar to that idea. The ammount of different drill sizes influenced the cost of a board. the acual size of your copper restring around the drill not so much. so having the ability to input different values for the drill _can_ make your board much more expensive. That combined with a nice input interface for via types and start/end layer in the design rules is what I am aiming for. later the via properties dialog can display the dropdown for changing a via. The dropdown in the design frame can be used to select a via type prior to placing it. Cheers, Bastian 2017-08-31 9:39 GMT+02:00 Maciej Sumiński : > Hi Mathias, > > On 08/25/2017 09:55 PM, Mathias Grimmberger wrote: > > > > Hi Maciej, > > > > Maciej Sumiński writes: > > > >> Hi Matthias, > >> > >> Your patch looks good to me. I would love to see the same change done > >> for via hole and diameter text controls. > > > > Let me first describe what I imagined for that, because it may be > > considered too weird. > > > > The problem with the vias is that in the design rules there is a pair of > > values, via diameter and drill. > > > > I imagined turning the via diameter text control into a dropbox. The > > values shown in the dropbox would be the value pairs from the design > > rules, just like shown on the toolbar. > > > > Selecting an entry from the dropbox would then set both the via diameter > > and the drill. > > > > Directly entering something into either control would of course not > > influence the other one. > > > > Does that sound useable or is it too much "magic"? > > I agree, it is not as simple as with track widths, so it requires a bit > of "magic". > > What do you think about putting in each dropbox single values (either > diameter or drill size) followed by value pairs? If the user selects a > single value, the other setting is not affected. In case of choosing a > pair - both values are modified. > > For example, via size settings: > diameter | drill > -+-- >1 | 0.5 > 1.5 | 1 > 1.7 | 1.2 > > Would give the following choices in dropboxes: > > Via diameter: 1 > 1.5 > 1.7 > 1/0.5 > 1.5/1 > 1.7/1.2 > > Via drill:0.5 > 1 > 1.2 > 1/0.5 > 1.5/1 > 1.7/1.2 > > Regards, > Orson > > > Thanks, > > > > MGri > > > > > > ___ > Mailing list: https://launchpad.net/~kicad-developers > Post to : kicad-developers@lists.launchpad.net > Unsubscribe : https://launchpad.net/~kicad-developers > More help : https://help.launchpad.net/ListHelp > > ___ Mailing list: https://launchpad.net/~kicad-developers Post to : kicad-developers@lists.launchpad.net Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
[Kicad-developers] Minor patch for design rules editor
Hi,
I attached a small patch that fixes a bug with the design editor.
Loading a design with micro vias enabled loads the flag and sets the
checkbox.
The two input fields are not enabled when the design is loaded.
Cheers
From 102a83b8919d3bb0042c736e1dfbbf5e64746492 Mon Sep 17 00:00:00 2001
From: Bastian Neumann
Date: Mon, 28 Aug 2017 21:45:50 +0200
Subject: [PATCH 1/1] Micro via input fields are enabled when design is loaded
Loading a design with micro vias enabled did check the box for enabling
micro vias in pcbnew. The value input fields for diameter and drill
size were not enabled.
This patch moves the functionality into an new function and calls that
from the onclick event of the checkbox and the init function of the
dialog.
---
pcbnew/dialogs/dialog_design_rules.cpp | 12 +---
pcbnew/dialogs/dialog_design_rules.h | 1 +
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/pcbnew/dialogs/dialog_design_rules.cpp b/pcbnew/dialogs/dialog_design_rules.cpp
index 1de2f1b..64f5d8f 100644
--- a/pcbnew/dialogs/dialog_design_rules.cpp
+++ b/pcbnew/dialogs/dialog_design_rules.cpp
@@ -291,6 +291,7 @@ void DIALOG_DESIGN_RULES::InitGlobalRules()
m_OptAllowBlindBuriedVias->SetValue( m_BrdSettings->m_BlindBuriedViaAllowed );
m_OptAllowMicroVias->SetValue( m_BrdSettings->m_MicroViasAllowed );
+CheckAllowMicroVias();
PutValueInLocalUnits( *m_SetMicroViasMinSizeCtrl, m_BrdSettings->m_MicroViasMinSize );
PutValueInLocalUnits( *m_SetMicroViasMinDrillCtrl, m_BrdSettings->m_MicroViasMinDrill );
@@ -808,15 +809,20 @@ void DIALOG_DESIGN_RULES::OnRemoveNetclassClick( wxCommandEvent& event )
}
}
+void DIALOG_DESIGN_RULES::CheckAllowMicroVias()
+{
+bool enabled = m_OptAllowMicroVias->GetValue();
+m_SetMicroViasMinSizeCtrl->Enable( enabled );
+m_SetMicroViasMinDrillCtrl->Enable( enabled );
+}
+
/**
* Function OnAllowMicroVias
* is called whenever the AllowMicroVias checkbox is toggled
*/
void DIALOG_DESIGN_RULES::OnAllowMicroVias( wxCommandEvent& event )
{
-bool enabled = m_OptAllowMicroVias->GetValue();
-m_SetMicroViasMinSizeCtrl->Enable( enabled );
-m_SetMicroViasMinDrillCtrl->Enable( enabled );
+CheckAllowMicroVias();
}
void DIALOG_DESIGN_RULES::OnMoveUpSelectedNetClass( wxCommandEvent& event )
diff --git a/pcbnew/dialogs/dialog_design_rules.h b/pcbnew/dialogs/dialog_design_rules.h
index 831ab84..76dcdbe 100644
--- a/pcbnew/dialogs/dialog_design_rules.h
+++ b/pcbnew/dialogs/dialog_design_rules.h
@@ -95,6 +95,7 @@ private:
void OnNetClassesNameRightClick( wxGridEvent& event ) override { event.Skip(); }
void OnAddNetclassClick( wxCommandEvent& event ) override;
void OnRemoveNetclassClick( wxCommandEvent& event ) override;
+void CheckAllowMicroVias();
void OnAllowMicroVias( wxCommandEvent& event ) override;
/*
--
2.7.4
___
Mailing list: https://launchpad.net/~kicad-developers
Post to : kicad-developers@lists.launchpad.net
Unsubscribe : https://launchpad.net/~kicad-developers
More help : https://help.launchpad.net/ListHelp
Re: [Kicad-developers] Routing algorithm used in PCB
KiCad does come with a python interface. Moving to python as native system and other web technologies are not a good idea imho. Not every software is better with web and cloud stuff. 2017-08-28 18:04 GMT+02:00 Arun Kumar : > Documentation of code or the usage of Kicad? I see that there is already > documentation on the user guide. > > Would be happy if Kicad transitions to python or other web technologies. > > On Mon, Aug 28, 2017 at 8:56 PM, Fabrizio Tappero < > fabrizio.tapp...@gmail.com> wrote: > >> Hi Arun, >> if yu like you can contribute with the documentation. >> >> Regards >> Fabrizio >> >> >> On Mon, Aug 28, 2017 at 10:47 AM, Arun Kumar >> wrote: >> >>> I don't know C++ so unable to contribute and I want to build my own >>> FOSS app with the languages I know. I always wanted to contribute to an >>> existing project there isn't a proper documentation about the source code. >>> Have to go through hundreds and thousands of lines of code to understand >>> where they have implemented a specific functionality. >>> >>> I browsed the folders of the source code of Kicad but unable to >>> understand what routing techniques are used and the code associated with >>> it. I found a folder with name algorithm but couldn't understand how >>> they're working with the parts. >>> >>> Thanks, >>> Arun >>> >>> On Mon, Aug 28, 2017 at 12:04 PM, José Ignacio >>> wrote: >>> You already established that you want to extract techniques from kicad for your own project instead of contributing. The code is all there in the repo, free to use under the GPL. On Mon, Aug 28, 2017 at 12:41 AM, Arun Kumar wrote: > Hi Team, > > Which PCB routing algorithm are used in PCB designing in Kicad? > > Thanks > Arun > > ___ > Mailing list: https://launchpad.net/~kicad-developers > Post to : kicad-developers@lists.launchpad.net > Unsubscribe : https://launchpad.net/~kicad-developers > More help : https://help.launchpad.net/ListHelp > > >>> >>> ___ >>> Mailing list: https://launchpad.net/~kicad-developers >>> Post to : kicad-developers@lists.launchpad.net >>> Unsubscribe : https://launchpad.net/~kicad-developers >>> More help : https://help.launchpad.net/ListHelp >>> >>> >> > > ___ > Mailing list: https://launchpad.net/~kicad-developers > Post to : kicad-developers@lists.launchpad.net > Unsubscribe : https://launchpad.net/~kicad-developers > More help : https://help.launchpad.net/ListHelp > > ___ Mailing list: https://launchpad.net/~kicad-developers Post to : kicad-developers@lists.launchpad.net Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
Re: [Kicad-developers] Additional Patch for via properties dialog (2)
Hi > Ultimately is it useful to design a board, if you cannot make it? Right now I can fabricate boards, I can not design. That is also not a good solution. via constraints are tricky bussiness as they are very specific to the manufacturer. > PS: > The current "tracks and vias editor" dialog is (for me) a not finished work: > It does not make any DRC test after editing, and this is *really annoying*. This is what I am working on at the moment. To have a propper mask where one can input constraints for vias. At the moment you can only define some layers. There is much more work to do. Like staggered/stacked µvias [image: Inline-Bild 2] Based on this dialog I plan on having more layer masks to only show layers described here. Cheers 2017-08-22 13:00 GMT+02:00 jp charras : > Le 22/08/2017 à 12:10, Simon Küppers a écrit : > > I second this. Working in a Research Institute I can assure you, that > very often there are circuit > > boards with "interesting" stackups and via configurations... These > boards are not produced by > > quick-turn factories like eurocircuits but companies such as ILFA or > Optiprint. > > > > It would be unwise to cut out those users from KiCad. > > I dont't remember I said we should restrict vias to eurocircuits > constraints. > > Moreover "very often there are circuit boards with "interesting" stackups > and via configurations" > lead me to think there are constraints, unless I missed something. > (if there are "via configurations", there are constraints) > > I don't think eurocircuits is at quick-turn factory (although I have > myself any experience about > blind/buried vias) but I think blind/buried vias can have constraints, > because I saw constraints in > board houses. > > Ultimately is it useful to design a board, if you cannot make it? > > In fact, Pcbnew is really lacking a board stackup editor, to define not > only the stackup layers, but > some other parameters (via parameters, copper thickness, dielectric > thickness and type, and a few > other parameters). > > This board stackup definition is needed not only for vias, but also for > impedance controlled boards. > > PS: > The current "tracks and vias editor" dialog is (for me) a not finished > work: > It does not make any DRC test after editing, and this is *really annoying*. > > > > > > > > Am 2017-08-22 09:57, schrieb hauptmech: > >> On 22/08/17 18:25, jp charras wrote: > >>> Le 22/08/2017 à 05:55, hauptmech a écrit : > Manufacturing techniques vary between manufacturers and continuously > evolve. Why would kicad limit > itself to what eurocircuits can do? They have optimized their process > for quick turn prototyping > and > while they document their process nicely, they are probably not a > good reference for what can be > done. > > On 21/08/17 05:44, jp charras wrote: > > Before working on blind and buried vias dialog, please have a look > at: > > https://www.eurocircuits.com/blog/Blind-and-buried-vias > >>> Currently there is no control in Kicad. > >>> > >>> Sure, but it looks like there are some constraints on blind/buried > vias (microvias are blind/buried > >>> vias) depending on board houses. > >>> > >>> So it could be worth to be able to control these constraints inside > Kicad (at least to have a > >>> minimal control). > >>> > >>> We currently have a DRC which detects too small clearances and track > widths: > >>> this is most of time due to manufacturing constraints which > continuously evolve. > >>> > >> I don't think I have enough understanding of the proposal to have an > >> opinion. I just want to caution against creating unnecessary > >> limitations in kicad. It really depends on the board house. I used to > >> work for one and there were quite a few atypical techniques used for > >> customer specific projects (many kept confidential to that customer). > >> > >> > >> > >> > >> > >> ___ > >> Mailing list: https://launchpad.net/~kicad-developers > >> Post to : kicad-developers@lists.launchpad.net > >> Unsubscribe : https://launchpad.net/~kicad-developers > >> More help : https://help.launchpad.net/ListHelp > > > > ___ > > Mailing list: https://launchpad.net/~kicad-developers > > Post to : kicad-developers@lists.launchpad.net > > Unsubscribe : https://launchpad.net/~kicad-developers > > More help : https://help.launchpad.net/ListHelp > > > -- > Jean-Pierre CHARRAS > > ___ > Mailing list: https://launchpad.net/~kicad-developers > Post to : kicad-developers@lists.launchpad.net > Unsubscribe : https://launchpad.net/~kicad-developers > More help : https://help.launchpad.net/ListHelp > ___ Mailing list: https://launchpad.net/~kicad-developers Post to : kicad-developers@lists.launchpad.net Unsubscribe : https://launchpad.net/~kicad-developers More help : https://hel
Re: [Kicad-developers] Additional Patch for via properties dialog (2)
Oh I did not realize that gmail does not reply to the mailing list, but to you directly. I know how the progress of creating boards work. I know that you can only have symmetrical stackups. What I don't know is why KiCad limits micro-vias to outer to first inner layer only. To know where different via types can start and end, we have to be able to either select start- and end-layer arbitrarily for each via and keep it to the user to make sane decisions. Or we have a dialog that can be configured for the board that sets it globally. The tricky thing with micro-vias is that you can have them stacked, or staggered. When you have them stacked you can go several layers deep. When you have them staggered you can only move one layer for each via and can not have one directly below. Another option would be to allow micro-vias to be only one layer deep, but make it possible to start on inner layers. Right now I can only create one that connects the outer layer to the one below it. That would lead to multiple via elements put on-top of each other. I am designing a board with this stackup: so having arbitrarily selectable start- and end-layer is quite useful. The stackup I attached shows staggered vias on the outer 4 layers. For stacked vias you can go through the 3 prepreg layers on each side of the board. But it is more expensive to fabricate because the vias have to be filled each run. Cheers 2017-08-20 19:44 GMT+02:00 jp charras : > Le 20/08/2017 à 17:12, Bastian Neumannn a écrit : > > On the issue of layers and via types. > > > > The current system allows micro-vias from the outer to the underlying > layer. blind and burried vias > > from the second to the second-last layer and regular vias through all > layers. > > In my current design I have micro-vias going from the outer to the third > and third-last layer > > because I have three layers of sequential buildup. > > > > SIGANL > > GND > > SIGNAL > > IN.4 > > IN.5 > > SIGNAL > > SIGNAL/GND mixed > > SIGNAL > > > > For now I decided to make start- and end-layers arbitrarily selectable. > Maybe we should have a layer > > stackup dialog that gives rules for that? > > > > Let it be a dialog with the three types and start- end layer for > through, start end-layer for blind > > burried and two start- end-layers for micro. > > > > What are your thoughts on that? > > First, please, *send your mails to the developers ML*. > > Before working on blind and buried vias dialog, please have a look at: > https://www.eurocircuits.com/blog/Blind-and-buried-vias > > and like you can see, "make start- and end-layers arbitrarily selectable" > is not a very good idea. > > > > > 2017-08-19 16:47 GMT+02:00 jp charras jp.char...@wanadoo.fr>>: > > > > Le 19/08/2017 à 15:20, Bastian Neumannn a écrit : > > > Ok so basically the dialog asking to change the sizes should come > when you change the type in the > > > dialog, not when you press OK? > > > > Changing the via type is more tricky: > > - One can use the net size as default when changing between micro > vias and other types. > > - But the vias layers must also be set in any case. There are > constraints on layers for each type. > > > > Obviously, this dialog will need a bit of experiments. > > > > > > > > And no dialog should come when the via is smaller than it's net > class when pressing OK? > > > > OK (only an error message the via is smaller than design settings) > > > > > > > > Should be easy to implement it that way. > > > > > > > > > Cheers > > > > > > Am 19.08.2017 2:14 nachm. schrieb "jp charras" < > jp.char...@wanadoo.fr <mailto:jp.char...@wanadoo.fr> jp.char...@wanadoo.fr > > <mailto:jp.char...@wanadoo.fr>>>: > > > > > > Le 19/08/2017 à 09:37, Bastian Neumannn a écrit : > > > > Hi Jean-Pierre > > > > > > > > The other patch I submitted let's you change the via type. > Changing from micro to through > > > gives you > > > > a through hole via that has the size of a micro via. This > additional patch warns the user if that > > > > ist the case. > > > > > > I understand. > > > > > > However I still am thinking: > > > 1 - using a via/track size smaller than its net class value is > a very frequent case > > > 2 - If changing from micro to through ( or t
[Kicad-developers] Additional Patch for via properties dialog (2)
Hi,
the last patch for this function was not correct I am sorry. This patch
gives the correct functionality to notify the user when die via size is
smaller than the minimum size given in the net class.
Cheers
From 07756c6c7d28aac83cf9ee7b0e087c8b6b09bd01 Mon Sep 17 00:00:00 2001
From: Bastian Neumann
Date: Fri, 18 Aug 2017 18:59:33 +0200
Subject: [PATCH] Changing via types into a type that has a bigger minimum
drill and size value shows a dialog to choose whether to get sizes from
netclass or ignore the problem.
---
pcbnew/dialogs/dialog_track_via_properties.cpp | 31 ++
1 file changed, 27 insertions(+), 4 deletions(-)
diff --git a/pcbnew/dialogs/dialog_track_via_properties.cpp b/pcbnew/dialogs/dialog_track_via_properties.cpp
index 2dc12ca..6263765 100644
--- a/pcbnew/dialogs/dialog_track_via_properties.cpp
+++ b/pcbnew/dialogs/dialog_track_via_properties.cpp
@@ -289,6 +289,7 @@ bool DIALOG_TRACK_VIA_PROPERTIES::Apply( COMMIT& aCommit )
bool changeLock = m_lockedCbox->Get3StateValue() != wxCHK_UNDETERMINED;
bool setLock = m_lockedCbox->Get3StateValue() == wxCHK_CHECKED;
+bool setNetclassSizes = false;
for( auto item : m_items )
{
@@ -372,8 +373,33 @@ bool DIALOG_TRACK_VIA_PROPERTIES::Apply( COMMIT& aCommit )
v->SetPosition( pos );
}
+
+if( m_ViaTypeChoice->GetSelection() != VIA_NOT_DEFINED )
+v->SetViaType( (VIATYPE_T)m_ViaTypeChoice->GetSelection() );
+
+if( m_ViaTypeChoice->GetSelection() == VIA_MICROVIA && (
+v->GetWidth() < v->GetNetClass()->GetuViaDiameter()
+ || v->GetDrill() < v->GetNetClass()->GetuViaDrill() ) )
+{
+wxMessageDialog dlg( this, _( "MicroVia sizes are smaller than net class. Use net class instead?" ), wxEmptyString, wxYES_NO );
+if( dlg.ShowModal() == wxID_YES )
+{
+m_viaNetclass->SetValue(true);
+setNetclassSizes = true;
+}
+}
+else if( v->GetWidth() < v->GetNetClass()->GetViaDiameter()
+ || v->GetDrill() < v->GetNetClass()->GetViaDrill() )
+{
+wxMessageDialog dlg( this, _( "Via sizes are smaller than net class. Use net class instead?" ), wxEmptyString, wxYES_NO );
+if( dlg.ShowModal() == wxID_YES )
+{
+m_viaNetclass->SetValue(true);
+setNetclassSizes = true;
+}
+}
-if( m_viaNetclass->IsChecked() )
+if( m_viaNetclass->IsChecked() || setNetclassSizes )
{
switch( v->GetViaType() )
{
@@ -415,9 +441,6 @@ bool DIALOG_TRACK_VIA_PROPERTIES::Apply( COMMIT& aCommit )
if( startLayer != UNDEFINED_LAYER && endLayer != UNDEFINED_LAYER)
v->SetLayerPair( (PCB_LAYER_ID)startLayer, (PCB_LAYER_ID)endLayer );
-if( m_ViaTypeChoice->GetSelection() != VIA_NOT_DEFINED )
-v->SetViaType( (VIATYPE_T)m_ViaTypeChoice->GetSelection() );
-
if( changeLock )
v->SetLocked( setLock );
--
2.7.4
___
Mailing list: https://launchpad.net/~kicad-developers
Post to : kicad-developers@lists.launchpad.net
Unsubscribe : https://launchpad.net/~kicad-developers
More help : https://help.launchpad.net/ListHelp
[Kicad-developers] Additional Patch for via properties dialog
Hi,
I added a check to the dialog that notifies the user if the via type was
changed into a type that has bigger minimal sizes.
The user can select to update from the minimal sizes from the netclass of
the via.
Cheers
From 281ff1b94df4c10fc1d43542dc2bc0c78664da9d Mon Sep 17 00:00:00 2001
From: Bastian Neumann
Date: Fri, 18 Aug 2017 18:59:33 +0200
Subject: [PATCH] Changing via types into a type that has a bigger minimum
drill and size value shows a dialog to choose whether to get sizes from
netclass or ignore the problem.
---
pcbnew/dialogs/dialog_track_via_properties.cpp | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/pcbnew/dialogs/dialog_track_via_properties.cpp b/pcbnew/dialogs/dialog_track_via_properties.cpp
index 2dc12ca..250d07b 100644
--- a/pcbnew/dialogs/dialog_track_via_properties.cpp
+++ b/pcbnew/dialogs/dialog_track_via_properties.cpp
@@ -289,6 +289,7 @@ bool DIALOG_TRACK_VIA_PROPERTIES::Apply( COMMIT& aCommit )
bool changeLock = m_lockedCbox->Get3StateValue() != wxCHK_UNDETERMINED;
bool setLock = m_lockedCbox->Get3StateValue() == wxCHK_CHECKED;
+bool setNetclassSizes = false;
for( auto item : m_items )
{
@@ -373,7 +374,16 @@ bool DIALOG_TRACK_VIA_PROPERTIES::Apply( COMMIT& aCommit )
v->SetPosition( pos );
}
-if( m_viaNetclass->IsChecked() )
+if( v->GetWidth() < v->GetNetClass()->GetViaDiameter()
+ || v->GetDrill() < v->GetNetClass()->GetViaDrill() )
+{
+wxMessageDialog dlg( this, _( "Via sizes are smaller than net class. Use net class instead?" ), wxEmptyString, wxYES_NO );
+if( dlg.ShowModal() != wxID_YES )
+m_viaNetclass->SetValue(true);
+setNetclassSizes = true;
+}
+
+if( m_viaNetclass->IsChecked() || setNetclassSizes )
{
switch( v->GetViaType() )
{
--
2.7.4
___
Mailing list: https://launchpad.net/~kicad-developers
Post to : kicad-developers@lists.launchpad.net
Unsubscribe : https://launchpad.net/~kicad-developers
More help : https://help.launchpad.net/ListHelp
[Kicad-developers] Indroducrion and small patch
Hi,
My Name is Bastian Neumann from Germany. I am working with KiCad for some
time now.
It is a great piece of software and beeing free and open source is what me
brought me to it in 2008.
I am an EE and usually using KiCad for PCB design.
Writing software is usually some embedded C or stuff like that. But I
wanted to have the functionality to change vias. So here is my patch to use
the dropdown menues from the properies dialog.
I hope I am doing this correctly. This is my first time contributing to a
project of that size.
Have a nice day.
From 5963be743e3d5cdb13552b76b358f544105951de Mon Sep 17 00:00:00 2001
From: Bastian Neumann
Date: Thu, 17 Aug 2017 21:04:36 +0200
Subject: [PATCH] Changing via type and start/end layer is now possible in the
properties dialog
---
pcbnew/dialogs/dialog_track_via_properties.cpp | 51 ++
.../dialogs/dialog_track_via_properties_base.cpp | 2 +-
.../dialogs/dialog_track_via_properties_base.fbp | 2 +-
3 files changed, 53 insertions(+), 2 deletions(-)
diff --git a/pcbnew/dialogs/dialog_track_via_properties.cpp b/pcbnew/dialogs/dialog_track_via_properties.cpp
index 4a2c69a..2dc12ca 100644
--- a/pcbnew/dialogs/dialog_track_via_properties.cpp
+++ b/pcbnew/dialogs/dialog_track_via_properties.cpp
@@ -57,6 +57,9 @@ DIALOG_TRACK_VIA_PROPERTIES::DIALOG_TRACK_VIA_PROPERTIES( PCB_BASE_FRAME* aParen
boost::optional viaY = boost::make_optional( false, 0 );
boost::optional viaDiameter = boost::make_optional( false, 0 );
boost::optional viaDrill = boost::make_optional( false, 0 );
+boost::optional viaStartLayer = boost::make_optional( false, (PCB_LAYER_ID) 0 );
+boost::optional viaEndLayer = boost::make_optional( false, (PCB_LAYER_ID) 0 );
+boost::optional viaType = boost::make_optional( false, 0 );
m_haveUniqueNet = true;
int prevNet = -1;
@@ -150,6 +153,12 @@ DIALOG_TRACK_VIA_PROPERTIES::DIALOG_TRACK_VIA_PROPERTIES( PCB_BASE_FRAME* aParen
viaY = v->GetPosition().y;
viaDiameter = v->GetWidth();
viaDrill = v->GetDrillValue();
+PCB_LAYER_ID layerStart;
+PCB_LAYER_ID layerEnd;
+v->LayerPair(&layerStart, &layerEnd);
+viaStartLayer = layerStart;
+viaEndLayer = layerEnd;
+viaType = v->GetViaType();
m_vias = true;
}
else// check if values are the same for every selected via
@@ -165,6 +174,17 @@ DIALOG_TRACK_VIA_PROPERTIES::DIALOG_TRACK_VIA_PROPERTIES( PCB_BASE_FRAME* aParen
if( viaDrill && ( *viaDrill != v->GetDrillValue() ) )
viaDrill = boost::none;
+
+PCB_LAYER_ID layerStart;
+PCB_LAYER_ID layerEnd;
+v->LayerPair(&layerStart, &layerEnd);
+if( viaStartLayer && ( viaStartLayer != layerStart ) )
+viaStartLayer = boost::none;
+if( viaEndLayer && ( viaEndLayer != layerEnd ) )
+viaEndLayer = boost::none;
+
+if( viaType && ( *viaType != v->GetViaType() ) )
+viaType = boost::none;
}
if( v->IsLocked() )
@@ -189,7 +209,29 @@ DIALOG_TRACK_VIA_PROPERTIES::DIALOG_TRACK_VIA_PROPERTIES( PCB_BASE_FRAME* aParen
setCommonVal( viaY, m_ViaYCtrl, m_viaY );
setCommonVal( viaDiameter, m_ViaDiameterCtrl, m_viaDiameter );
setCommonVal( viaDrill, m_ViaDrillCtrl, m_viaDrill );
+
+m_ViaTypeChoice->SetSelection(*viaType);
+m_ViaTypeChoice->Enable();
+
+m_ViaStartLayer->SetLayersHotkeys( false );
+m_ViaStartLayer->SetLayerSet( LSET::AllNonCuMask() );
+m_ViaStartLayer->SetBoardFrame( aParent );
+m_ViaStartLayer->Resync();
+
+if( viaStartLayer )
+m_ViaStartLayer->SetLayerSelection( *viaStartLayer );
+
+m_ViaEndLayer->SetLayersHotkeys( false );
+m_ViaEndLayer->SetLayerSet( LSET::AllNonCuMask() );
+m_ViaEndLayer->SetBoardFrame( aParent );
+m_ViaEndLayer->Resync();
+
+if( viaEndLayer )
+m_ViaEndLayer->SetLayerSelection( *viaEndLayer );
+
m_ViaDiameterCtrl->SetFocus();
+
+
}
else
{
@@ -367,6 +409,15 @@ bool DIALOG_TRACK_VIA_PROPERTIES::Apply( COMMIT& aCommit )
v->SetNetCode( m_NetComboBox->GetSelectedNet() );
}
+LAYER_NUM startLayer = m_ViaStartLayer->GetLayerSelection();
+LAYER_NUM endLayer = m_ViaEndLayer->GetLayerSelection();
+
+if( startLayer != UNDEFINED_LAYER && endLayer != UNDEFINED_LAYER)
+v->SetLayerPair( (PCB_LAYE
