Re: [Kicad-developers] How to handle mounting holes with satellite vias?

2015-06-08 Thread Tomasz Wlostowski
On 08.06.2015 12:24, Cirilo Bernardo wrote:
 One method which comes to mind is to add yet another hole definition in
 software, and that may be the best way to address the problem; this way
 we can also ensure the correct thickness of the annulus and check the
 chosen number/size of vias.

There is another way: don't use a pad to simulate a via. Letting vias
retain their nets (or - in case of footprints - follow the connectivity
starting from pads) is IMHO a way to fix this and many other issues
(thermal via fields, etc.)

Tom
 
 - Cirilo
 
 
 On Mon, Jun 8, 2015 at 5:59 PM, Lorenzo Marcantonio
 l.marcanto...@logossrl.com mailto:l.marcanto...@logossrl.com wrote:
 
 Having troubles getting an useable workflow with a common usage: the
 mounting
 hole with satellite vias (see attachment).
 
 Rationale: when you have a big hole for a screw and need to have plane
 connectivity, a PTH supported pad is often not a good choice. Mostly
 because on
 the wave solder machine they tend to get clogged (requiring an
 expensive peel
 mask). There are other reason, like ground plane impedance, but
 manufacturing
 convenience is the biggest one :P
 
 So I did the following thing:
 
 (module HOLE-M4-NPTH (layer F.Cu) (tedit 557548BB)
 (descr Mechanical Hole, M4)
 (attr virtual)
 (fp_text reference HOLE-M4-NPTH (at 0 0) (layer F.Fab)
  (effects (font (size 1.2 1.2) (thickness 0.12
 (fp_text value HOLE-M4-NPTH (at 0 0) (layer F.Fab) hide
  (effects (font (size 1.2 1.2) (thickness 0.12
 (fp_circle (center 0 0) (end 5.85 0) (layer F.CrtYd)
 (width 0.01))
 (fp_circle (center 0 0) (end 5.85 0) (layer B.CrtYd)
 (width 0.01))
 (fp_circle (center 0 0) (end 5.5 0) (layer F.SilkS) (width
 0.12))
 (fp_circle (center 0 0) (end 2.2 0) (layer F.Fab) (width
 0.12))
 (fp_circle (center 0 0) (end 2.2 0) (layer B.Fab) (width
 0.12))
 (fp_circle (center 0 0) (end 2.2 0) (layer Dwgs.User)
 (width 0.12))
 (pad  np_thru_hole circle (at 0 0) (size 4.4 4.4) (drill
 4.4) (layers *.Cu))
 (pad HOLE smd circle (at 0 0) (size 8.35 8.35) (layers
 *.Cu))
 (pad HOLE thru_hole circle (at 3.2 0) (size 0.8 0.8)
 (drill 0.4) (layers *.Cu)
  (zone_connect 2))
 (pad HOLE thru_hole circle (at -3.2 0) (size 0.8 0.8)
 (drill 0.4) (layers *.Cu)
  (zone_connect 2))
 (pad HOLE thru_hole circle (at 1.6 -2.8) (size 0.8 0.8)
 (drill 0.4) (layers *.Cu)
  (zone_connect 2))
 (pad HOLE thru_hole circle (at -1.6 -2.8) (size 0.8 0.8)
 (drill 0.4) (layers *.Cu)
  (zone_connect 2))
 (pad HOLE thru_hole circle (at -1.6 2.8) (size 0.8 0.8)
 (drill 0.4) (layers *.Cu)
  (zone_connect 2))
 (pad HOLE thru_hole circle (at 1.6 2.8) (size 0.8 0.8)
 (drill 0.4) (layers *.Cu)
  (zone_connect 2)))
 
 I have a big SMD round pad on all layers for the support copper, an
 NPTH hole
 for the drill tape, and common pads for the satellite vias. The
 zone_connect forces solid fill, not that it would have really mattered
 (since there is the big pad covering all). Less cruft in the gerbers...
 
 Problem #1: pad snap always pick the big SMD pad and the track get
 rejected because it falls into the NPTH hole; workaround: disable pad
 snap and locate it by hands. Not a big issue since usually these are
 tied to fills and they attach correctly.
 
 Problem #2: the big pad and the NPTH hole are conflicting in the DRC
 (quite correctly, in theory). However that's a PITA because the message
 can 'obscure' more severe errors.
 
 Any idea on how to solve this?
 
 --
 Lorenzo Marcantonio
 Logos Srl
 
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Re: [Kicad-developers] How to handle mounting holes with satellite vias?

2015-06-08 Thread Cirilo Bernardo
One method which comes to mind is to add yet another hole definition in
software, and that may be the best way to address the problem; this way we
can also ensure the correct thickness of the annulus and check the chosen
number/size of vias.

- Cirilo


On Mon, Jun 8, 2015 at 5:59 PM, Lorenzo Marcantonio 
l.marcanto...@logossrl.com wrote:

 Having troubles getting an useable workflow with a common usage: the
 mounting
 hole with satellite vias (see attachment).

 Rationale: when you have a big hole for a screw and need to have plane
 connectivity, a PTH supported pad is often not a good choice. Mostly
 because on
 the wave solder machine they tend to get clogged (requiring an expensive
 peel
 mask). There are other reason, like ground plane impedance, but
 manufacturing
 convenience is the biggest one :P

 So I did the following thing:

 (module HOLE-M4-NPTH (layer F.Cu) (tedit 557548BB)
 (descr Mechanical Hole, M4)
 (attr virtual)
 (fp_text reference HOLE-M4-NPTH (at 0 0) (layer F.Fab)
  (effects (font (size 1.2 1.2) (thickness 0.12
 (fp_text value HOLE-M4-NPTH (at 0 0) (layer F.Fab) hide
  (effects (font (size 1.2 1.2) (thickness 0.12
 (fp_circle (center 0 0) (end 5.85 0) (layer F.CrtYd) (width
 0.01))
 (fp_circle (center 0 0) (end 5.85 0) (layer B.CrtYd) (width
 0.01))
 (fp_circle (center 0 0) (end 5.5 0) (layer F.SilkS) (width 0.12))
 (fp_circle (center 0 0) (end 2.2 0) (layer F.Fab) (width 0.12))
 (fp_circle (center 0 0) (end 2.2 0) (layer B.Fab) (width 0.12))
 (fp_circle (center 0 0) (end 2.2 0) (layer Dwgs.User) (width
 0.12))
 (pad  np_thru_hole circle (at 0 0) (size 4.4 4.4) (drill 4.4)
 (layers *.Cu))
 (pad HOLE smd circle (at 0 0) (size 8.35 8.35) (layers *.Cu))
 (pad HOLE thru_hole circle (at 3.2 0) (size 0.8 0.8) (drill 0.4)
 (layers *.Cu)
  (zone_connect 2))
 (pad HOLE thru_hole circle (at -3.2 0) (size 0.8 0.8) (drill
 0.4) (layers *.Cu)
  (zone_connect 2))
 (pad HOLE thru_hole circle (at 1.6 -2.8) (size 0.8 0.8) (drill
 0.4) (layers *.Cu)
  (zone_connect 2))
 (pad HOLE thru_hole circle (at -1.6 -2.8) (size 0.8 0.8) (drill
 0.4) (layers *.Cu)
  (zone_connect 2))
 (pad HOLE thru_hole circle (at -1.6 2.8) (size 0.8 0.8) (drill
 0.4) (layers *.Cu)
  (zone_connect 2))
 (pad HOLE thru_hole circle (at 1.6 2.8) (size 0.8 0.8) (drill
 0.4) (layers *.Cu)
  (zone_connect 2)))

 I have a big SMD round pad on all layers for the support copper, an NPTH
 hole
 for the drill tape, and common pads for the satellite vias. The
 zone_connect forces solid fill, not that it would have really mattered
 (since there is the big pad covering all). Less cruft in the gerbers...

 Problem #1: pad snap always pick the big SMD pad and the track get
 rejected because it falls into the NPTH hole; workaround: disable pad
 snap and locate it by hands. Not a big issue since usually these are
 tied to fills and they attach correctly.

 Problem #2: the big pad and the NPTH hole are conflicting in the DRC
 (quite correctly, in theory). However that's a PITA because the message
 can 'obscure' more severe errors.

 Any idea on how to solve this?

 --
 Lorenzo Marcantonio
 Logos Srl

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Re: [Kicad-developers] How to handle mounting holes with satellite vias?

2015-06-08 Thread Lorenzo Marcantonio
On Mon, Jun 08, 2015 at 01:15:39PM +0200, Tomasz Wlostowski wrote:
 There is another way: don't use a pad to simulate a via. Letting vias
 retain their nets (or - in case of footprints - follow the connectivity
 starting from pads) is IMHO a way to fix this and many other issues
 (thermal via fields, etc.)

The main problem is another way: the NPTH conflicts with the main pad;
I don't really care about the vias (since they don't harm DRC)

Maybe special-casing hole in the same module could be a solution, if you
trust people do to correct modules...

-- 
Lorenzo Marcantonio
Logos Srl

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Re: [Kicad-developers] How to handle mounting holes with satellite vias?

2015-06-08 Thread LordBlick

In response to a message written on 08.06.2015, 14:37, from Lorenzo Marcantonio:

On Mon, Jun 08, 2015 at 01:15:39PM +0200, Tomasz Wlostowski wrote:

There is another way: don't use a pad to simulate a via. Letting vias
retain their nets (or - in case of footprints - follow the connectivity
starting from pads) is IMHO a way to fix this and many other issues
(thermal via fields, etc.)


The main problem is another way: the NPTH conflicts with the main pad;
I don't really care about the vias (since they don't harm DRC)

Maybe special-casing hole in the same module could be a solution, if you
trust people do to correct modules...

IMHO, there is no any obstacles, that NPTH pads can have some net, only last 
wall is in peoples minds… ;)


--
Best Regards,
LordBlick

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Re: [Kicad-developers] How to handle mounting holes with satellite vias?

2015-06-08 Thread Lorenzo Marcantonio
On Mon, Jun 08, 2015 at 02:57:46PM +0200, LordBlick wrote:
 IMHO, there is no any obstacles, that NPTH pads can have some net, only last
 wall is in peoples minds… ;)

There *are* issues having a net attached to an NPTH, at least last time
I checked (i.e. when they where added). pcbnew has no handling for holes
which don't connect planes, that's the biggest one :D

At the time I pondered a lot about it and I were with the 'no net to
NPTH pads' peoples.

-- 
Lorenzo Marcantonio
Logos Srl

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Re: [Kicad-developers] How to handle mounting holes with satellite vias?

2015-06-08 Thread easyw

I use this workaround ...

I manually added net number to the NPTH drill pad (with notepad)...
please find attached the pcb module

then you can use this module inside a library (import without editing 
and save lib) and it is possible to wire tracks and there is no DRC 
violations...


maybe to solve this prob in a clean way it could be nice to add the 
option to have pin nbr also for NPTH drill pad...


Regards
Maurice

On 08/06/2015 14.37, Lorenzo Marcantonio wrote:

On Mon, Jun 08, 2015 at 01:15:39PM +0200, Tomasz Wlostowski wrote:

There is another way: don't use a pad to simulate a via. Letting vias
retain their nets (or - in case of footprints - follow the connectivity
starting from pads) is IMHO a way to fix this and many other issues
(thermal via fields, etc.)

The main problem is another way: the NPTH conflicts with the main pad;
I don't really care about the vias (since they don't harm DRC)

Maybe special-casing hole in the same module could be a solution, if you
trust people do to correct modules...



(module a_ANCHORS:1pinD35-NPTH-drilled (layer F.Cu) (tedit 55758F44)
  (fp_text reference J*** (at 0 -4.699) (layer F.SilkS) hide
(effects (font (size 1.00076 1.00076) (thickness 0.2032)))
  )
  (fp_text value anchor (at 0 4.953) (layer F.SilkS) hide
(effects (font (size 1.00076 1.00076) (thickness 0.2032)))
  )
  (fp_circle (center 0 0) (end 0 1.6764) (layer B.SilkS) (width 0.16))
  (fp_circle (center 0 0) (end -0.0254 1.6764) (layer F.SilkS) (width 0.16))
  (fp_circle (center 0 0) (end 0 3.556) (layer B.SilkS) (width 0.16))
  (fp_circle (center 0 0) (end 0 3.556) (layer F.SilkS) (width 0.16))
  (pad 1 thru_hole circle (at 0 -2.2606) (size 0.6 0.6) (drill 0.381) (layers 
*.Cu *.Mask))
  (pad 1 thru_hole circle (at -2.2606 0) (size 0.6 0.6) (drill 0.381) (layers 
*.Cu *.Mask))
  (pad 1 thru_hole circle (at 0 2.2606) (size 0.6 0.6) (drill 0.381) (layers 
*.Cu *.Mask))
  (pad 1 thru_hole circle (at 2.2606 0) (size 0.6 0.6) (drill 0.381) (layers 
*.Cu *.Mask))
  (pad 1 thru_hole circle (at 1.6002 -1.6002) (size 0.6 0.6) (drill 0.381) 
(layers *.Cu *.Mask))
  (pad 1 thru_hole circle (at -1.6002 -1.6002) (size 0.6 0.6) (drill 0.381) 
(layers *.Cu *.Mask))
  (pad 1 thru_hole circle (at -1.6002 1.6002) (size 0.6 0.6) (drill 0.381) 
(layers *.Cu *.Mask))
  (pad 1 thru_hole circle (at 1.6002 1.6002) (size 0.6 0.6) (drill 0.381) 
(layers *.Cu *.Mask))
  (pad 1 np_thru_hole circle (at 0 0) (size 3.5 3.5) (drill 3.5) (layers *.Cu 
*.Mask F.SilkS))
  (pad 1 smd circle (at 0 0) (size 5.6 5.6) (layers F.Cu F.SilkS F.Mask))
  (pad 1 smd circle (at 0 0) (size 5.6 5.6) (layers B.Cu B.SilkS B.Mask))
)
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