[PATCH v2] scsi: Change sense buffer size to 252

2014-03-14 Thread Fam Zheng 
According to SPC-4, section 4.5.2.1, 252 is the limit of sense data. So
increase the values.

Tested by hacking QEMU to fake virtio-scsi request sense len to 252.
Without this patch the driver stops working immediately when it gets the
request.

Signed-off-by: Fam Zheng f...@redhat.com
---
 include/linux/virtio_scsi.h | 2 +-
 include/scsi/scsi_cmnd.h| 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/linux/virtio_scsi.h b/include/linux/virtio_scsi.h
index 4195b97..a437f7f 100644
--- a/include/linux/virtio_scsi.h
+++ b/include/linux/virtio_scsi.h
@@ -28,7 +28,7 @@
 #define _LINUX_VIRTIO_SCSI_H
 
 #define VIRTIO_SCSI_CDB_SIZE   32
-#define VIRTIO_SCSI_SENSE_SIZE 96
+#define VIRTIO_SCSI_SENSE_SIZE 252
 
 /* SCSI command request, followed by data-out */
 struct virtio_scsi_cmd_req {
diff --git a/include/scsi/scsi_cmnd.h b/include/scsi/scsi_cmnd.h
index 91558a1..a64dac03 100644
--- a/include/scsi/scsi_cmnd.h
+++ b/include/scsi/scsi_cmnd.h
@@ -104,7 +104,7 @@ struct scsi_cmnd {
struct request *request;/* The command we are
   working on */
 
-#define SCSI_SENSE_BUFFERSIZE  96
+#define SCSI_SENSE_BUFFERSIZE  252
unsigned char *sense_buffer;
/* obtained by REQUEST SENSE when
 * CHECK CONDITION is received on original
-- 
1.9.0

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Re: I/O redirection Guest VM

2014-03-14 Thread Fam Zheng 
On Fri, 03/14 02:00, Shivaramakrishnan Vaidyanathan wrote:
 Hello Fam,
 Thanks a lot  to your reply.
 I think I needed to bit more clear in my explanation.
 Here is my requirement:
 At first,I have a guest vm with its virtual disk performing no storage
 intrusion detection  running on top of kvm hypervisor. Then later I create
 this new VM app that performs the storage intrusion detection functionality
 again running on top of kvm hypervisor.I run nfs share inside this vm. Once
 I do this,I need the I/O's that is happening on guest vm to undergo the
 intrusion detection functionality before writes are performed on the disks.
 
 
 How could I point the image to the NFS share if the guest vm prior didn't
 had this functionality?
 And If I do the functionality now,Only NFS-shared partitions could be
 intercepted.What about the other partition writes occurring at the guest vm?
 

Sounds like you need to change the backend of VM on flight to you NFS share.
But I don't think it's supported for now. (Assuming you use QEMU as device
virtualizer).

Fam
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Re: I/O redirection Guest VM

2014-03-14 Thread Shiva 
Hello Fam,

Thanks a lot  to your reply.

I think I needed to bit more clear in my explanation.

Here is my requirement:

At first,I have a guest vm with its virtual disk performing no storage

intrusion detection  running on top of kvm hypervisor.

Then later I create this new VM app that performs the storage

 intrusion detection functionality again running on top of kvm hypervisor.

I run nfs share inside this vm. Once I do this,I need the I/O's that is 

happening on guest vm to undergo the intrusion detection functionality 

before writes are performed on the disks.  How could I point the image to the 

NFS share if the guest vm prior didn't had this functionality?

And If I do the functionality now,Only NFS-shared partitions could be 

intercepted.What about the other partition writes occurring at the 

guest vm?

Looking forward to your reply. 

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Re: I/O redirection Guest VM

2014-03-14 Thread Shiva 
Yes,I am using QEMU as device virtualizer.

Is there any suggestion that you could give to achieve it?

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Re: [PATCH v2] scsi: Change sense buffer size to 252

2014-03-14 Thread Hannes Reinecke 
On 03/14/2014 07:00 AM, Fam Zheng wrote:
 According to SPC-4, section 4.5.2.1, 252 is the limit of sense data. So
 increase the values.
 
 Tested by hacking QEMU to fake virtio-scsi request sense len to 252.
 Without this patch the driver stops working immediately when it gets the
 request.
 
 Signed-off-by: Fam Zheng f...@redhat.com
 ---
  include/linux/virtio_scsi.h | 2 +-
  include/scsi/scsi_cmnd.h| 2 +-
  2 files changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/include/linux/virtio_scsi.h b/include/linux/virtio_scsi.h
 index 4195b97..a437f7f 100644
 --- a/include/linux/virtio_scsi.h
 +++ b/include/linux/virtio_scsi.h
 @@ -28,7 +28,7 @@
  #define _LINUX_VIRTIO_SCSI_H
  
  #define VIRTIO_SCSI_CDB_SIZE   32
 -#define VIRTIO_SCSI_SENSE_SIZE 96
 +#define VIRTIO_SCSI_SENSE_SIZE 252
  
  /* SCSI command request, followed by data-out */
  struct virtio_scsi_cmd_req {
 diff --git a/include/scsi/scsi_cmnd.h b/include/scsi/scsi_cmnd.h
 index 91558a1..a64dac03 100644
 --- a/include/scsi/scsi_cmnd.h
 +++ b/include/scsi/scsi_cmnd.h
 @@ -104,7 +104,7 @@ struct scsi_cmnd {
   struct request *request;/* The command we are
  working on */
  
 -#define SCSI_SENSE_BUFFERSIZE96
 +#define SCSI_SENSE_BUFFERSIZE252
   unsigned char *sense_buffer;
   /* obtained by REQUEST SENSE when
* CHECK CONDITION is received on original
 
Not without careful review.
Blindly increasing the buffersize is not a good idea; this define is
used at several locations and even within the drivers themselves.
So we cannot just increase the define for the SCSI stack.

And, btw, so far I haven't come across any issue where a sense
buffer overflow occurred. We first need to implement a proper sense
code handling (descriptor sense parsing etc) before we need to worry
about this.

Cheers,

Hannes
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Re: [PATCH v6 05/11] pvqspinlock, x86: Allow unfair spinlock in a PV guest

2014-03-14 Thread Paolo Bonzini 

Il 14/03/2014 09:30, Peter Zijlstra ha scritto:

Take the situation of 3 (v)CPUs where cpu0 holds the lock but is
preempted. cpu1 queues, cpu2 queues. Then cpu1 gets preempted, after
which cpu0 gets back online.

The simple test-and-set lock will now let cpu2 acquire. Your queue
however will just sit there spinning, waiting for cpu1 to come back from
holiday.

I think you're way over engineering this. Just do the simple
test-and-set lock for virt  !paravirt (as I think Paolo Bonzini
suggested RHEL6 already does).


Exactly.

Paolo
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Re: [Qemu-devel] [PATCH v3 6/9] target-mips: kvm: Add main KVM support for MIPS

2014-03-14 Thread James Hogan 
Hi Andreas,

On 13/03/14 21:28, Andreas Färber wrote:
 diff --git a/target-mips/kvm.c b/target-mips/kvm.c
 new file mode 100644
 index 000..0ec343d
 --- /dev/null
 +++ b/target-mips/kvm.c
 [...]
 +static inline int kvm_mips_put_one_reg(CPUState *cs, int reg_id, int32 
 *addr)
 
 Did you mean int32_t?

 +static inline int kvm_mips_get_one_reg(CPUState *cs, int reg_id, int32 
 *addr)
 
 int32_t?

 +*addr = (int32)val64;
 
 int32_t?

 int32 is a type used in softfloat that has weird at-least-as-wide
 semantics and bit us in the past.

Well spotted, they should indeed be int32_t.

 Otherwise looking good now, thanks for the CPU cleanups! We just had
 another round of CPU refactorings go in today, but I don't spot a
 conflict in this patch. Please rebase your local branch to verify.

It rebased clearly, but I'll double check and send a v4 today anyway.

Thanks
James
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Re: [Qemu-devel] [PATCH v3 6/9] target-mips: kvm: Add main KVM support for MIPS

2014-03-14 Thread James Hogan 
On 13/03/14 22:35, Peter Maydell wrote:
 On 13 March 2014 21:28, Andreas Färber afaer...@suse.de wrote:
 I'm not sure if we have a policy about __u64 etc. in KVM code. Since
 it'll be Linux-only I don't see problems currently; for cross-platform
 parts we prefer uint64_t. Suggest to leave as is unless told otherwise.
 
 For ARM I took the view that __u64 were the kernel's types, not
 ours. The kernel header structs define fields as __u64 but for
 in-QEMU functions and variables we should use the posix uint64_t.

Thanks, I'll follow that way then.

Cheers
James
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Re: [PATCH RFC v6 09/11] pvqspinlock, x86: Add qspinlock para-virtualization support

2014-03-14 Thread Paolo Bonzini 
Il 13/03/2014 20:49, Waiman Long ha scritto:
 On 03/13/2014 09:57 AM, Paolo Bonzini wrote:
 Il 13/03/2014 12:21, David Vrabel ha scritto:
 On 12/03/14 18:54, Waiman Long wrote:
 This patch adds para-virtualization support to the queue spinlock in
 the same way as was done in the PV ticket lock code. In essence, the
 lock waiters will spin for a specified number of times (QSPIN_THRESHOLD
 = 2^14) and then halted itself. The queue head waiter will spins
 2*QSPIN_THRESHOLD times before halting itself. When it has spinned
 QSPIN_THRESHOLD times, the queue head will assume that the lock
 holder may be scheduled out and attempt to kick the lock holder CPU
 if it has the CPU number on hand.

 I don't really understand the reasoning for kicking the lock holder.

 I agree.  If the lock holder isn't running, there's probably a good
 reason for that and going to sleep will not necessarily convince the
 scheduler to give more CPU to the lock holder.  I think there are two
 choices:

 1) use yield_to to donate part of the waiter's quantum to the lock
 holder?For this we probably need a new, separate hypercall
 interface.  For KVM it would be the same as hlt in the guest but with
 an additional yield_to in the host.

 2) do nothing, just go to sleep.

 Could you get (or do you have) numbers for (2)?
 
 I will take out the lock holder kick portion from the patch. I will also
 try to collect more test data.
 

 More important, I think a barrier is missing:

 Lock holder ---

 // queue_spin_unlock
 barrier();
 ACCESS_ONCE(qlock-lock) = 0;
 barrier();

 
 This is not the unlock code that is used when PV spinlock is enabled.

It is __queue_spin_unlock.  But you're right:

 if (static_key_false(paravirt_spinlocks_enabled)) {
 /*
  * Need to atomically clear the lock byte to avoid racing with
  * queue head waiter trying to set _QSPINLOCK_LOCKED_SLOWPATH.
  */
 if (likely(cmpxchg(qlock-lock, _QSPINLOCK_LOCKED, 0)
 == _QSPINLOCK_LOCKED))
 return;
 else
 queue_spin_unlock_slowpath(lock);
 
 } else {
 __queue_spin_unlock(lock);
 }

... indeed the __queue_spin_unlock/pv_kick_node pair is only done if the
waiter has already written _QSPINLOCK_LOCKED_SLOWPATH, and this means
that the lock holder must also observe PV_CPU_HALTED.

So this is correct:

 Nothing protects from writing qlock-lock before pv-cpustate is read,

but this cannot happen:

 leading to this:

 Lock holderWaiter
 ---
 read pv-cpustate
 (it is PV_CPU_ACTIVE)
 pv-cpustate = PV_CPU_HALTED
 lockval = cmpxchg(...)
 hibernate()
 qlock-lock = 0
 if (pv-cpustate != PV_CPU_HALTED)
 return;

 
 The lock holder will read cpustate only if the lock byte has been
 changed to _QSPINLOCK_LOCKED_SLOWPATH. So the setting of the lock byte
 synchronize the 2 threads.

Yes.

 The only thing that I am not certain is when
 the waiter is trying to go to sleep while, at the same time, the lock
 holder is trying to kick it. Will there be a missed wakeup because of
 this timing issue?

This is okay.  The kick_cpu hypercall is sticky until the next halt, if
no halt is pending.  Otherwise, pv ticketlocks would have the same issue.

Paolo
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Re: [PATCH] KVM: SVM: fix cr8 intercept window

2014-03-14 Thread Paolo Bonzini 

Il 13/03/2014 18:08, Radim Krčmář ha scritto:

 I agree that old code is wrong and the patch looks correct, but I only
 see how the bug may cause pending IRR to not be delivered in time,
 not how interrupt can disrupt a higher priority task.


Right.  Also, on SMP guests the effect would likely be just a deadlock
if a lower-priority ISR interrupted a higher priority task and accessed 
shared data (since you need anyway a spinlock in addition to raising the 
IRQL).


A more likely explanation is that if the remote processor delays an IPI 
too much, it will have a stable TLB entry.  The resulting random 
corruption of paged memory is compatible with the BAD_POOL_HEADER error 
codes that Radim observed.



Paolo, can you change the last sentence to , which means we don't
inject pending IRR immediately.?  (or do we just forget it?)


It's already in Linus's tree.

Paolo
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UOB-X1H: Message..

2014-03-14 Thread Cham Tao Soon 


I have proposal for you.
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Re: [fedora-virt] 3.13 - Nested KVM (vmx) totally broken?

2014-03-14 Thread Vasiliy Tolstov 
2014-03-07 1:59 GMT+04:00 Richard W.M. Jones rjo...@redhat.com:
 On Tue, Mar 04, 2014 at 09:13:40AM +0100, Paolo Bonzini wrote:
 Il 04/03/2014 03:40, Ian Pilcher ha scritto:
 Is this a known problem?  I just tried using nested vmx for the first
 time since upgrading my system from F19 (3.12.?? at the time) to F20,
 and I cannot start any L2 guests.  The L2 guest appears to hang almost
 immediately after starting, consuming 100% of one of the L1 guest's
 VCPUs.
 
 If I reboot with kernel-3.12.10-300.fc20.x86_64, the problem does not
 occur.
 
 Any known workaround?  (Other than using 3.12.10?)

 There is a fix on the way to the 3.13 kernel.

 You can open a Fedora bug and ask them to include
 http://article.gmane.org/gmane.linux.kernel.stable/82043/raw in the
 kernel.

 Thanks for fixing this.  It affects a lot of libguestfs users too.

 I opened this bug:

 https://bugzilla.redhat.com/show_bug.cgi?id=1073663

 Rich.


If i use 3.13.6 kernel that have alredy this patch, but sometimes i
get kernel panic, what can i do?
P.S. I'm using nested virt, fault from L2

[   10.942007] PANIC: double fault, error_code: 0x0
[   10.942007] CPU: 0 PID: 182 Comm: systemd-journal Not tainted 3.13.6 #3
[   10.942007] Hardware name: Bochs Bochs, BIOS Bochs 01/01/2011
[   10.942007] task: 88001cc08000 ti: 88001d70e000 task.ti:
88001d70e000
[   10.942007] RIP: 0033:[7fe61b2fce8a]  [7fe61b2fce8a]
0x7fe61b2fce8a
[   10.942007] RSP: 002b:7fffee7468d8  EFLAGS: 00010286
[   10.942007] RAX:  RBX: 0043344e RCX: 00430a70
[   10.942007] RDX: 0010 RSI:  RDI: 00430a70
[   10.942007] RBP: 7fffee747130 R08: 0003 R09: 7fe61be81780
[   10.942007] R10:  R11: 0246 R12: 0001
[   10.942007] R13: 01c9c380 R14: 0003 R15: 7fffee747148
[   10.942007] FS:  7fe61be81780() GS:88001f80()
knlGS:
[   10.942007] CS:  0010 DS:  ES:  CR0: 80050033
[   10.942007] CR2:  CR3: 1e1a2000 CR4: 06f0
[   10.942007]
[   10.942007] Kernel panic - not syncing: Machine halted.


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Re: [fedora-virt] 3.13 - Nested KVM (vmx) totally broken?

2014-03-14 Thread Richard W.M. Jones 
On Fri, Mar 14, 2014 at 03:52:03PM +0400, Vasiliy Tolstov wrote:
 If i use 3.13.6 kernel that have alredy this patch, but sometimes i
 get kernel panic, what can i do?
 P.S. I'm using nested virt, fault from L2

It could be there is another, less frequent, bug in nested KVM.
I'm assuming this is on Intel hardware?

From the libguestfs point of view what you can do is to force TCG:

export LIBGUESTFS_BACKEND_SETTINGS=force_tcg

Unfortunately this only has an effect in libguestfs = 1.25.24.  We're
going to have the new version in Fedora 20 real soon -- probably
before the end of this month.  Or you can compile the Rawhide version
on F20.

Rich.

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Re: [fedora-virt] 3.13 - Nested KVM (vmx) totally broken?

2014-03-14 Thread Vasiliy Tolstov 
2014-03-14 15:58 GMT+04:00 Richard W.M. Jones rjo...@redhat.com:
 It could be there is another, less frequent, bug in nested KVM.
 I'm assuming this is on Intel hardware?

 From the libguestfs point of view what you can do is to force TCG:

 export LIBGUESTFS_BACKEND_SETTINGS=force_tcg

 Unfortunately this only has an effect in libguestfs = 1.25.24.  We're
 going to have the new version in Fedora 20 real soon -- probably
 before the end of this month.  Or you can compile the Rawhide version
 on F20.


Thanks for answer. I'm not using libguestfs. I'm try tun vm inside vm
via libvirt.
is that possible to debug this issue ? How can i help?
P.S. Yes i'm using intel hardware.

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Re: [fedora-virt] 3.13 - Nested KVM (vmx) totally broken?

2014-03-14 Thread Richard W.M. Jones 
On Fri, Mar 14, 2014 at 04:11:13PM +0400, Vasiliy Tolstov wrote:
 2014-03-14 15:58 GMT+04:00 Richard W.M. Jones rjo...@redhat.com:
  It could be there is another, less frequent, bug in nested KVM.
  I'm assuming this is on Intel hardware?
 
  From the libguestfs point of view what you can do is to force TCG:
 
  export LIBGUESTFS_BACKEND_SETTINGS=force_tcg
 
  Unfortunately this only has an effect in libguestfs = 1.25.24.  We're
  going to have the new version in Fedora 20 real soon -- probably
  before the end of this month.  Or you can compile the Rawhide version
  on F20.
 
 
 Thanks for answer. I'm not using libguestfs. I'm try tun vm inside vm
 via libvirt.

You can set the VM domain type=qemu.  Of course it'll run quite
slowly.

 is that possible to debug this issue ? How can i help?

Complete logs from the guest.
Any messages from qemu or the host.
 put all of that into a full bug report.

Rich.

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Re: [fedora-virt] 3.13 - Nested KVM (vmx) totally broken?

2014-03-14 Thread Vasiliy Tolstov 
2014-03-14 16:16 GMT+04:00 Richard W.M. Jones rjo...@redhat.com:
 You can set the VM domain type=qemu.  Of course it'll run quite
 slowly.

 is that possible to debug this issue ? How can i help?

 Complete logs from the guest.
 Any messages from qemu or the host.
  put all of that into a full bug report.


Where i can find submission form for bug report? (I'm using exherbo
linux, but it does not have like debian or sles personal patches and
using only upstream)

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Re: [fedora-virt] 3.13 - Nested KVM (vmx) totally broken?

2014-03-14 Thread Richard W.M. Jones 
On Fri, Mar 14, 2014 at 04:39:48PM +0400, Vasiliy Tolstov wrote:
 2014-03-14 16:16 GMT+04:00 Richard W.M. Jones rjo...@redhat.com:
  You can set the VM domain type=qemu.  Of course it'll run quite
  slowly.
 
  is that possible to debug this issue ? How can i help?
 
  Complete logs from the guest.
  Any messages from qemu or the host.
   put all of that into a full bug report.
 
 
 Where i can find submission form for bug report? (I'm using exherbo
 linux, but it does not have like debian or sles personal patches and
 using only upstream)

I suspect this is going to be a kernel bug, in which case:

https://bugzilla.kernel.org/

For libvirt bugs it would be:

https://bugzilla.redhat.com/enter_bug.cgi?component=libvirtproduct=Virtualization+Tools

Rich.

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[PATCH v4 01/10] hw/mips/cputimer: Don't start periodic timer in KVM mode

2014-03-14 Thread James Hogan 
From: Sanjay Lal sanj...@kymasys.com

Compare/Count timer interrupts are handled in-kernel for KVM, so don't
bother starting it in QEMU.

Signed-off-by: Sanjay Lal sanj...@kymasys.com
Signed-off-by: James Hogan james.ho...@imgtec.com
Reviewed-by: Aurelien Jarno aurel...@aurel32.net
---
Changes in v2:
 - Expand commit message
 - Rebase on v1.7.0
 - Wrap comment
---
 hw/mips/cputimer.c | 13 ++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/hw/mips/cputimer.c b/hw/mips/cputimer.c
index c8b4b00..52570fd 100644
--- a/hw/mips/cputimer.c
+++ b/hw/mips/cputimer.c
@@ -23,6 +23,7 @@
 #include hw/hw.h
 #include hw/mips/cpudevs.h
 #include qemu/timer.h
+#include sysemu/kvm.h
 
 #define TIMER_FREQ 100 * 1000 * 1000
 
@@ -141,7 +142,13 @@ static void mips_timer_cb (void *opaque)
 
 void cpu_mips_clock_init (CPUMIPSState *env)
 {
-env-timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, mips_timer_cb, env);
-env-CP0_Compare = 0;
-cpu_mips_store_count(env, 1);
+/*
+ * If we're in KVM mode, don't start the periodic timer, that is handled in
+ * kernel.
+ */
+if (!kvm_enabled()) {
+env-timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, mips_timer_cb, env);
+env-CP0_Compare = 0;
+cpu_mips_store_count(env, 1);
+}
 }
-- 
1.8.1.2

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[PATCH v4 07/10] hw/mips: In KVM mode, inject IRQ2 (I/O) interupts via ioctls

2014-03-14 Thread James Hogan 
From: Sanjay Lal sanj...@kymasys.com

COP0 emulation is in-kernel for KVM, so inject IRQ2 (I/O) interrupts via
ioctls.

Signed-off-by: Sanjay Lal sanj...@kymasys.com
Signed-off-by: James Hogan james.ho...@imgtec.com
Reviewed-by: Aurelien Jarno aurel...@aurel32.net
Reviewed-by: Andreas Färber afaer...@suse.de
---
Changes in v3:
 - Pass MIPSCPU to kvm_mips_set_[ipi_]interrupt (Andreas Färber).

Changes in v2:
 - Expand commit message
 - Remove #ifdef CONFIG_KVM since it's guarded by kvm_enabled() already
---
 hw/mips/mips_int.c | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/hw/mips/mips_int.c b/hw/mips/mips_int.c
index 7dbd24d..d740046 100644
--- a/hw/mips/mips_int.c
+++ b/hw/mips/mips_int.c
@@ -23,6 +23,8 @@
 #include hw/hw.h
 #include hw/mips/cpudevs.h
 #include cpu.h
+#include sysemu/kvm.h
+#include kvm_mips.h
 
 static void cpu_mips_irq_request(void *opaque, int irq, int level)
 {
@@ -35,8 +37,17 @@ static void cpu_mips_irq_request(void *opaque, int irq, int 
level)
 
 if (level) {
 env-CP0_Cause |= 1  (irq + CP0Ca_IP);
+
+if (kvm_enabled()  irq == 2) {
+kvm_mips_set_interrupt(cpu, irq, level);
+}
+
 } else {
 env-CP0_Cause = ~(1  (irq + CP0Ca_IP));
+
+if (kvm_enabled()  irq == 2) {
+kvm_mips_set_interrupt(cpu, irq, level);
+}
 }
 
 if (env-CP0_Cause  CP0Ca_IP_mask) {
-- 
1.8.1.2

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[PATCH v4 09/10] target-mips: Enable KVM support in build system

2014-03-14 Thread James Hogan 
From: Sanjay Lal sanj...@kymasys.com

Enable KVM support for MIPS in the build system.

Signed-off-by: Sanjay Lal sanj...@kymasys.com
Signed-off-by: James Hogan james.ho...@imgtec.com
Reviewed-by: Aurelien Jarno aurel...@aurel32.net
---
Changes in v2:
 - Expand commit message
 - Remove GIC code
 - Create asm-mips symlink using generic code and move above default
   case (Peter Maydell)
 - Remove redundant check of target_name = cpu = mips
 - Remove mipsel cross compilation fix, which is now fixed by
   commit 61cc919f73ea (configure: detect endian via compile test)
---
 configure | 6 +-
 target-mips/Makefile.objs | 1 +
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/configure b/configure
index 8c2838e..279344f 100755
--- a/configure
+++ b/configure
@@ -4712,6 +4712,9 @@ if test $linux = yes ; then
   aarch64)
 linux_arch=arm64
 ;;
+  mips64)
+linux_arch=mips
+;;
   *)
 # For most CPUs the kernel architecture name and QEMU CPU name match.
 linux_arch=$cpu
@@ -4901,7 +4904,7 @@ case $target_name in
   *)
 esac
 case $target_name in
-  aarch64|arm|i386|x86_64|ppcemb|ppc|ppc64|s390x)
+  aarch64|arm|i386|x86_64|ppcemb|ppc|ppc64|s390x|mipsel|mips)
 # Make sure the target and host cpus are compatible
 if test $kvm = yes -a $target_softmmu = yes -a \
   \( $target_name = $cpu -o \
@@ -4909,6 +4912,7 @@ case $target_name in
   \( $target_name = ppc64  -a $cpu = ppc \) -o \
   \( $target_name = ppc-a $cpu = ppc64 \) -o \
   \( $target_name = ppcemb -a $cpu = ppc64 \) -o \
+  \( $target_name = mipsel -a $cpu = mips \) -o \
   \( $target_name = x86_64 -a $cpu = i386   \) -o \
   \( $target_name = i386   -a $cpu = x86_64 \) \) ; then
   echo CONFIG_KVM=y  $config_target_mak
diff --git a/target-mips/Makefile.objs b/target-mips/Makefile.objs
index 0277d56..716244f 100644
--- a/target-mips/Makefile.objs
+++ b/target-mips/Makefile.objs
@@ -1,3 +1,4 @@
 obj-y += translate.o dsp_helper.o op_helper.o lmi_helper.o helper.o cpu.o
 obj-y += gdbstub.o
 obj-$(CONFIG_SOFTMMU) += machine.o
+obj-$(CONFIG_KVM) += kvm.o
-- 
1.8.1.2

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[PATCH v4 00/10] KVM Support for MIPS32 Processors

2014-03-14 Thread James Hogan 
I'd like to have this squeezed into 2.0 (if at all possible), so any
final review from KVM people would be much appreciated. 

Thanks to everybody who has already taken part in review.

This patchset implements KVM support for MIPS32 processors, using Trap 
Emulation.

In KVM mode, CPU virtualization is handled via the kvm kernel module,
while system and I/O virtualization leverage the Malta model already
present in QEMU.

Both Guest kernel and Guest Userspace execute in UM. The Guest address
space is as folows:
Guest User address space:   0x - 0x4000
Guest Kernel Unmapped:  0x4000 - 0x6000
Guest Kernel Mapped:0x6000 - 0x8000

As a result, Guest Usermode virtual memory is limited to 1GB.

KVM support (by trap and emulate) was added to the Linux kernel in
v3.10.

Changes in v4:

Changes mostly addressing a few review comments from v3 patchset.

A git tag for this version of the patchset can also be found on github:
https://github.com/jahogan/qemu-kvm-mips.git kvm-mips-v4

 - Rebase on v2.0.0-rc0.
 - Use int32_t instead of int32 (which is for softfloat) in kvm register
   accessors (Andreas Färber).
 - Use uint64_t instead of __u64 (which is really just for kernel
   headers) in the kvm register accessors (Andreas Färber).
 - Cast pointer to uintptr_t rather than target_ulong in kvm register
   accessors.
 - Remove some redundant casts in kvm register accessors.
 - Add MAINTAINERS entry for MIPS KVM.

Changes in v3:

Changes mostly addressing review comments from v2 patchset.

A git tag for this version of the patchset can also be found on github:
https://github.com/jahogan/qemu-kvm-mips.git kvm-mips-v3

 - Remove target-mips: Set target page size to 16K in KVM mode. It
   should actually work fine with 4k TARGET_PAGE_SIZE as long as there
   is no cache aliasing or both host and guest kernels are configured to
   a sufficient page size to avoid aliasing (which the kernel
   arch/mips/kvm/00README.txt alludes to anyway).
 - Rewrote kvm sigmask patch to allow sigmask length to be set by
   kvm_arch_init(), so that MIPS can set it to 16 as it has 128 signals.
   This is better than cluttering kvm-all.c with TARGET_* ifdefs (Peter
   Maydell).
 - Set sigmask length to 16 from kvm_arch_init() since MIPS Linux has
   128 signals. This is better than cluttering kvm_all.c with TARGET_*
   ifdefs (Peter Maydell).
 - s/dprintf/DPRINTF/ (Andreas Färber).
 - Use cs rather than cpu or env for CPUState variable names
   (Andreas Färber).
 - Use CPUMIPSState rather than CPUArchState (Andreas Färber).
 - Pass MIPSCPU to cpu_mips_io_interrupts_pending() rather than
   CPUMIPSState (Andreas Färber).
 - Remove spurious parentheses around cpu_mips_io_interrupts_pending()
   call (Andreas Färber).
 - Pass MIPSCPU to kvm_mips_set_[ipi_]interrupt (Andreas Färber).
 - Make use of error_report (Andreas Färber) and clean up error messages
   a little to include __func__.
 - Remove inline kvm_mips_{put,get}_one_[ul]reg() declarations from
   kvm_mips.h. They're only used in target-mips/kvm.c anyway.
 - Make kvm_arch_{put,get}_registers static within target-mips/kvm.c and
   remove from kvm_mips.h.
 - Remove unnecessary includes from Malta patch, especially linux/kvm.h
   which isn't a good idea on non-Linux (Peter Maydell).

Changes in v2:

This patchset is based on Sanjay Lal's V1 patchset from 2nd March 2013:
https://patchwork.kernel.org/project/kvm/list/?submitter=51991state=*q=qemu-devel

I think I've addressed all the V1 feedback. The other main change is the
removal of the boot-CPS ROM code binary blob and GIC/SMP support since
it's all slightly orthogonal to KVM support. Instead the existing
minimal bootloader code for Malta has been updated to work with KVM TE.

A git tag for this version of the patchset can also be found on github:
https://github.com/jahogan/qemu-kvm-mips.git kvm-mips-v2

 - Expand commit messages
 - Rebase on v1.7.0
 - Misc checkpatch and other cleanups
 - Some interrupt bug fixes from Yann Le Du l...@kymasys.com
 - Add get/set register functionality from Yann Le Du l...@kymasys.com
 - Use new 64 bit compatible ABI from Cavium from Sanjay Lal
   sanj...@kymasys.com
 - Add dummy kvm_arch_init_irq_routing()
   The common KVM code insists on calling kvm_arch_init_irq_routing() as
   soon as it sees kernel header support for it (regardless of whether
   QEMU supports it). Provide a dummy function to satisfy this.
 - Remove request_interrupt_window code (Peter Maydell)
 - Remove #ifdef CONFIG_KVM where guarded by kvm_enabled() already
 - Removal of cps / GIC / SMP support
 - Minimal bootloader modified to execute safely from RAM
 - Create asm-mips symlink using generic code and move above default
   case (Peter Maydell)
 - Remove redundant check of target_name = cpu = mips
 - Remove mipsel cross compilation fix, which is now fixed by commit
   61cc919f73ea (configure: detect endian via compile test)
 - Add translation of guest kernel segments to allow an attached gdb to

[PATCH v4 03/10] target-mips: get_physical_address: Add defines for segment bases

2014-03-14 Thread James Hogan 
Add preprocessor definitions for 32bit segment bases for use in
get_physical_address(). These will also be taken advantage of in the
next patch which adds KVM awareness.

Signed-off-by: James Hogan james.ho...@imgtec.com
Reviewed-by: Aurelien Jarno aurel...@aurel32.net
---
 target-mips/helper.c | 18 --
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/target-mips/helper.c b/target-mips/helper.c
index b28ae9b..2b30fc2 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -118,7 +118,13 @@ static int get_physical_address (CPUMIPSState *env, hwaddr 
*physical,
 qemu_log(user mode %d h %08x\n, user_mode, env-hflags);
 #endif
 
-if (address = (int32_t)0x7FFFUL) {
+#define USEG_LIMIT  0x7FFFUL
+#define KSEG0_BASE  0x8000UL
+#define KSEG1_BASE  0xA000UL
+#define KSEG2_BASE  0xC000UL
+#define KSEG3_BASE  0xE000UL
+
+if (address = USEG_LIMIT) {
 /* useg */
 if (env-CP0_Status  (1  CP0St_ERL)) {
 *physical = address  0x;
@@ -160,23 +166,23 @@ static int get_physical_address (CPUMIPSState *env, 
hwaddr *physical,
 ret = TLBRET_BADADDR;
 }
 #endif
-} else if (address  (int32_t)0xA000UL) {
+} else if (address  (int32_t)KSEG1_BASE) {
 /* kseg0 */
 if (kernel_mode) {
-*physical = address - (int32_t)0x8000UL;
+*physical = address - (int32_t)KSEG0_BASE;
 *prot = PAGE_READ | PAGE_WRITE;
 } else {
 ret = TLBRET_BADADDR;
 }
-} else if (address  (int32_t)0xC000UL) {
+} else if (address  (int32_t)KSEG2_BASE) {
 /* kseg1 */
 if (kernel_mode) {
-*physical = address - (int32_t)0xA000UL;
+*physical = address - (int32_t)KSEG1_BASE;
 *prot = PAGE_READ | PAGE_WRITE;
 } else {
 ret = TLBRET_BADADDR;
 }
-} else if (address  (int32_t)0xE000UL) {
+} else if (address  (int32_t)KSEG3_BASE) {
 /* sseg (kseg2) */
 if (supervisor_mode || kernel_mode) {
 ret = env-tlb-map_address(env, physical, prot, address, rw, 
access_type);
-- 
1.8.1.2

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[PATCH v4 05/10] kvm: Allow arch to set sigmask length

2014-03-14 Thread James Hogan 
MIPS/Linux is unusual in having 128 signals rather than just 64 like
most other architectures. This means its sigmask is 16 bytes instead of
8, so allow arches to override the sigmask-len value passed to the
KVM_SET_SIGNAL_MASK ioctl in kvm_set_signal_mask() by calling
kvm_set_sigmask_len() from kvm_arch_init(). Otherwise default to 8
bytes.

Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Aurelien Jarno aurel...@aurel32.net
Cc: Sanjay Lal sanj...@kymasys.com
Cc: Gleb Natapov g...@redhat.com
Cc: Paolo Bonzini pbonz...@redhat.com
Cc: Peter Maydell peter.mayd...@linaro.org
---
Changes in v3:
 - Rewrote to allow sigmask length to be set by kvm_arch_init(), so that
   MIPS can set it to 16 as it has 128 signals. This is better than
   cluttering kvm-all.c with TARGET_* ifdefs (Peter Maydell).

Changes in v2:
 - Expand commit message
 - Reword comment
---
 include/sysemu/kvm.h |  2 ++
 kvm-all.c| 11 ++-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h
index 0bee1e8..e9cdb0c 100644
--- a/include/sysemu/kvm.h
+++ b/include/sysemu/kvm.h
@@ -297,6 +297,8 @@ int kvm_check_extension(KVMState *s, unsigned int 
extension);
 uint32_t kvm_arch_get_supported_cpuid(KVMState *env, uint32_t function,
   uint32_t index, int reg);
 
+void kvm_set_sigmask_len(KVMState *s, unsigned int sigmask_len);
+
 #if !defined(CONFIG_USER_ONLY)
 int kvm_physical_memory_addr_from_host(KVMState *s, void *ram_addr,
hwaddr *phys_addr);
diff --git a/kvm-all.c b/kvm-all.c
index 82a9119..d3be5ae 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -98,6 +98,7 @@ struct KVMState
  * they're not.  Linux, glibc and *BSD all treat ioctl numbers as
  * unsigned, and treating them as signed here can break things */
 unsigned irq_set_ioctl;
+unsigned int sigmask_len;
 #ifdef KVM_CAP_IRQ_ROUTING
 struct kvm_irq_routing *irq_routes;
 int nr_allocated_irq_routes;
@@ -1372,6 +1373,8 @@ int kvm_init(QEMUMachine *machine)
 assert(TARGET_PAGE_SIZE = getpagesize());
 page_size_init();
 
+s-sigmask_len = 8;
+
 #ifdef KVM_CAP_SET_GUEST_DEBUG
 QTAILQ_INIT(s-kvm_sw_breakpoints);
 #endif
@@ -1548,6 +1551,11 @@ err:
 return ret;
 }
 
+void kvm_set_sigmask_len(KVMState *s, unsigned int sigmask_len)
+{
+s-sigmask_len = sigmask_len;
+}
+
 static void kvm_handle_io(uint16_t port, void *data, int direction, int size,
   uint32_t count)
 {
@@ -2068,6 +2076,7 @@ void kvm_remove_all_breakpoints(CPUState *cpu)
 
 int kvm_set_signal_mask(CPUState *cpu, const sigset_t *sigset)
 {
+KVMState *s = kvm_state;
 struct kvm_signal_mask *sigmask;
 int r;
 
@@ -2077,7 +2086,7 @@ int kvm_set_signal_mask(CPUState *cpu, const sigset_t 
*sigset)
 
 sigmask = g_malloc(sizeof(*sigmask) + sizeof(*sigset));
 
-sigmask-len = 8;
+sigmask-len = s-sigmask_len;
 memcpy(sigmask-sigset, sigset, sizeof(*sigset));
 r = kvm_vcpu_ioctl(cpu, KVM_SET_SIGNAL_MASK, sigmask);
 g_free(sigmask);
-- 
1.8.1.2

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[PATCH v4 08/10] hw/mips: malta: Add KVM support

2014-03-14 Thread James Hogan 
In KVM mode the bootrom is loaded and executed from the last 1MB of
DRAM.

Based on [PATCH 12/12] KVM/MIPS: General KVM support and support for
SMP Guests by Sanjay Lal sanj...@kymasys.com.

Signed-off-by: James Hogan james.ho...@imgtec.com
Reviewed-by: Aurelien Jarno aurel...@aurel32.net
Cc: Peter Maydell peter.mayd...@linaro.org
Cc: Sanjay Lal sanj...@kymasys.com
---
Changes in v3:
 - Remove unnecessary includes, especially linux/kvm.h which isn't a
   good idea on non-Linux (Peter Maydell).

Changes in v2:
 - Removal of cps / GIC / SMP support
 - Minimal bootloader modified to execute safely from RAM
 - Remove Writing bootloader to final 1MB of RAM printf
---
 hw/mips/mips_malta.c | 82 ++--
 1 file changed, 60 insertions(+), 22 deletions(-)

diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index ac5ec44..90b20d6 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -51,6 +51,7 @@
 #include sysemu/qtest.h
 #include qemu/error-report.h
 #include hw/empty_slot.h
+#include sysemu/kvm.h
 
 //#define DEBUG_BOARD_INIT
 
@@ -603,29 +604,31 @@ static void network_init(PCIBus *pci_bus)
 */
 
 static void write_bootloader (CPUMIPSState *env, uint8_t *base,
-  int64_t kernel_entry)
+  int64_t run_addr, int64_t kernel_entry)
 {
 uint32_t *p;
 
 /* Small bootloader */
 p = (uint32_t *)base;
-stl_raw(p++, 0x0bf00160);  /* j 
0x1fc00580 */
+
+stl_raw(p++, 0x0800 |  /* j 
0x1fc00580 */
+ ((run_addr + 0x580)  0x0fff)  2);
 stl_raw(p++, 0x);  /* nop */
 
 /* YAMON service vector */
-stl_raw(base + 0x500, 0xbfc00580);  /* start: */
-stl_raw(base + 0x504, 0xbfc0083c);  /* print_count: */
-stl_raw(base + 0x520, 0xbfc00580);  /* start: */
-stl_raw(base + 0x52c, 0xbfc00800);  /* flush_cache: */
-stl_raw(base + 0x534, 0xbfc00808);  /* print: */
-stl_raw(base + 0x538, 0xbfc00800);  /* reg_cpu_isr: */
-stl_raw(base + 0x53c, 0xbfc00800);  /* unred_cpu_isr: */
-stl_raw(base + 0x540, 0xbfc00800);  /* reg_ic_isr: */
-stl_raw(base + 0x544, 0xbfc00800);  /* unred_ic_isr: */
-stl_raw(base + 0x548, 0xbfc00800);  /* reg_esr: */
-stl_raw(base + 0x54c, 0xbfc00800);  /* unreg_esr: */
-stl_raw(base + 0x550, 0xbfc00800);  /* getchar: */
-stl_raw(base + 0x554, 0xbfc00800);  /* syscon_read: */
+stl_raw(base + 0x500, run_addr + 0x0580);  /* start: */
+stl_raw(base + 0x504, run_addr + 0x083c);  /* print_count: */
+stl_raw(base + 0x520, run_addr + 0x0580);  /* start: */
+stl_raw(base + 0x52c, run_addr + 0x0800);  /* flush_cache: */
+stl_raw(base + 0x534, run_addr + 0x0808);  /* print: */
+stl_raw(base + 0x538, run_addr + 0x0800);  /* reg_cpu_isr: */
+stl_raw(base + 0x53c, run_addr + 0x0800);  /* unred_cpu_isr: */
+stl_raw(base + 0x540, run_addr + 0x0800);  /* reg_ic_isr: */
+stl_raw(base + 0x544, run_addr + 0x0800);  /* unred_ic_isr: */
+stl_raw(base + 0x548, run_addr + 0x0800);  /* reg_esr: */
+stl_raw(base + 0x54c, run_addr + 0x0800);  /* unreg_esr: */
+stl_raw(base + 0x550, run_addr + 0x0800);  /* getchar: */
+stl_raw(base + 0x554, run_addr + 0x0800);  /* syscon_read: */
 
 
 /* Second part of the bootloader */
@@ -701,7 +704,7 @@ static void write_bootloader (CPUMIPSState *env, uint8_t 
*base,
 p = (uint32_t *) (base + 0x800);
 stl_raw(p++, 0x03e8); /* jr ra */
 stl_raw(p++, 0x2402); /* li v0,0 */
-   /* 808 YAMON print */
+/* 808 YAMON print */
 stl_raw(p++, 0x03e06821); /* move 
t5,ra */
 stl_raw(p++, 0x00805821); /* move 
t3,a0 */
 stl_raw(p++, 0x00a05021); /* move 
t2,a1 */
@@ -774,6 +777,9 @@ static int64_t load_kernel (void)
 uint32_t *prom_buf;
 long prom_size;
 int prom_index = 0;
+uint64_t (*xlate_to_phys) (void *opaque, uint64_t addr);
+uint64_t (*xlate_to_kseg0) (void *opaque, uint64_t addr);
+
 
 #ifdef TARGET_WORDS_BIGENDIAN
 big_endian = 1;
@@ -781,7 +787,15 @@ static int64_t load_kernel (void)
 big_endian = 0;
 #endif
 
-if (load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL,
+if (kvm_enabled()) {
+xlate_to_phys = cpu_mips_kvm_um_kseg0_to_phys;
+xlate_to_kseg0 = cpu_mips_kvm_um_phys_to_kseg0;
+} else {
+xlate_to_phys = cpu_mips_kseg0_to_phys;
+xlate_to_kseg0 = cpu_mips_phys_to_kseg0;
+}
+
+if (load_elf(loaderparams.kernel_filename, xlate_to_phys, NULL,
  (uint64_t *)kernel_entry, NULL, (uint64_t *)kernel_high,

[PATCH v4 06/10] target-mips: kvm: Add main KVM support for MIPS

2014-03-14 Thread James Hogan 
From: Sanjay Lal sanj...@kymasys.com

Implement the main KVM arch API for MIPS.

Signed-off-by: Sanjay Lal sanj...@kymasys.com
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Aurelien Jarno aurel...@aurel32.net
Cc: Gleb Natapov g...@redhat.com
Cc: Paolo Bonzini pbonz...@redhat.com
Cc: Andreas Färber afaer...@suse.de
Cc: Peter Maydell peter.mayd...@linaro.org
---
Changes in v4:
(No functional changes, assembly output unchanged)
 - Use int32_t instead of int32 (which is for softfloat) in kvm register
   accessors (Andreas Färber).
 - Use uint64_t instead of __u64 (which is really just for kernel
   headers) in the kvm register accessors (Andreas Färber).
 - Cast pointer to uintptr_t rather than target_ulong in kvm register
   accessors.
 - Remove some redundant casts in kvm register accessors.

Changes in v3:
 - s/dprintf/DPRINTF/ (Andreas Färber).
 - Use cs rather than cpu or env for CPUState variable names
   (Andreas Färber).
 - Use CPUMIPSState rather than CPUArchState (Andreas Färber).
 - Pass MIPSCPU to cpu_mips_io_interrupts_pending() rather than
   CPUMIPSState (Andreas Färber).
 - Remove spurious parentheses around cpu_mips_io_interrupts_pending()
   call (Andreas Färber).
 - Pass MIPSCPU to kvm_mips_set_[ipi_]interrupt (Andreas Färber).
 - Make use of error_report (Andreas Färber) and clean up error messages
   a little to include __func__.
 - Remove inline kvm_mips_{put,get}_one_[ul]reg() declarations from
   kvm_mips.h. They're only used in target-mips/kvm.c anyway.
 - Make kvm_arch_{put,get}_registers static within target-mips/kvm.c and
   remove from kvm_mips.h.
 - Set sigmask length to 16 from kvm_arch_init() since MIPS Linux has
   128 signals. This is better than cluttering kvm_all.c with TARGET_*
   ifdefs (Peter Maydell).

Changes in v2:
 - Expand commit message
 - Checkpatch cleanups.
 - Some interrupt bug fixes from Yann Le Du l...@kymasys.com
 - Add get/set register functionality from Yann Le Du l...@kymasys.com
 - Use new 64 bit compatible ABI from Cavium from Sanjay Lal
   sanj...@kymasys.com
 - Add dummy kvm_arch_init_irq_routing()
   The common KVM code insists on calling kvm_arch_init_irq_routing() as
   soon as it sees kernel header support for it (regardless of whether
   QEMU supports it). Provide a dummy function to satisfy this.
 - Remove request_interrupt_window code (Peter Maydell)
---
 target-mips/kvm.c  | 472 +
 target-mips/kvm_mips.h |  19 ++
 2 files changed, 491 insertions(+)
 create mode 100644 target-mips/kvm.c
 create mode 100644 target-mips/kvm_mips.h

diff --git a/target-mips/kvm.c b/target-mips/kvm.c
new file mode 100644
index 000..ee477a3
--- /dev/null
+++ b/target-mips/kvm.c
@@ -0,0 +1,472 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ * KVM/MIPS: MIPS specific KVM APIs
+ *
+ * Copyright (C) 2012-2014 Imagination Technologies Ltd.
+ * Authors: Sanjay Lal sanj...@kymasys.com
+*/
+
+#include sys/types.h
+#include sys/ioctl.h
+#include sys/mman.h
+
+#include linux/kvm.h
+
+#include qemu-common.h
+#include qemu/error-report.h
+#include qemu/timer.h
+#include sysemu/sysemu.h
+#include sysemu/kvm.h
+#include cpu.h
+#include sysemu/cpus.h
+#include kvm_mips.h
+
+#define DEBUG_KVM 0
+
+#define DPRINTF(fmt, ...) \
+do { if (DEBUG_KVM) { fprintf(stderr, fmt, ## __VA_ARGS__); } } while (0)
+
+const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
+KVM_CAP_LAST_INFO
+};
+
+unsigned long kvm_arch_vcpu_id(CPUState *cs)
+{
+return cs-cpu_index;
+}
+
+int kvm_arch_init(KVMState *s)
+{
+/* MIPS has 128 signals */
+kvm_set_sigmask_len(s, 16);
+
+DPRINTF(%s\n, __func__);
+return 0;
+}
+
+int kvm_arch_init_vcpu(CPUState *cs)
+{
+int ret = 0;
+DPRINTF(%s\n, __func__);
+return ret;
+}
+
+void kvm_arch_reset_vcpu(CPUState *cs)
+{
+DPRINTF(%s\n, __func__);
+}
+
+int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp)
+{
+DPRINTF(%s\n, __func__);
+return 0;
+}
+
+int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp)
+{
+DPRINTF(%s\n, __func__);
+return 0;
+}
+
+static inline int cpu_mips_io_interrupts_pending(MIPSCPU *cpu)
+{
+CPUMIPSState *env = cpu-env;
+
+DPRINTF(%s: %#x\n, __func__, env-CP0_Cause  (1  (2 + CP0Ca_IP)));
+return env-CP0_Cause  (0x1  (2 + CP0Ca_IP));
+}
+
+
+void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
+{
+MIPSCPU *cpu = MIPS_CPU(cs);
+int r;
+struct kvm_mips_interrupt intr;
+
+if ((cs-interrupt_request  CPU_INTERRUPT_HARD) 
+cpu_mips_io_interrupts_pending(cpu)) {
+intr.cpu = -1;
+intr.irq = 2;
+r = kvm_vcpu_ioctl(cs, KVM_INTERRUPT, intr);
+if (r  0) {
+error_report(%s: cpu %d: failed to inject IRQ %x,
+ __func__, cs-cpu_index, intr.irq);
+

[PATCH v4 02/10] hw/mips: Add API to convert KVM guest KSEG0 - GPA

2014-03-14 Thread James Hogan 
From: Sanjay Lal sanj...@kymasys.com

Add APIs for converting between KVM guest KSEG0 addresses and guest
physical addresses. These will be used for translating addresses when
loading a kernel ELF in KVM mode.

In KVM trap and emulate mode both the guest kernel and guest userspace
execute in useg:
Guest User address space:   0x..0x3fff
Guest Kernel Unmapped:  0x4000..0x5fff
Guest Kernel Mapped:0x6000..0x7fff

Signed-off-by: Sanjay Lal sanj...@kymasys.com
Signed-off-by: James Hogan james.ho...@imgtec.com
Reviewed-by: Aurelien Jarno aurel...@aurel32.net
---
Changes in v2:
 - Expand commit message
 - Remove unnecessary include
---
 hw/mips/addr.c| 10 ++
 include/hw/mips/cpudevs.h |  4 
 2 files changed, 14 insertions(+)

diff --git a/hw/mips/addr.c b/hw/mips/addr.c
index 99488f1..e62d6f4 100644
--- a/hw/mips/addr.c
+++ b/hw/mips/addr.c
@@ -28,7 +28,17 @@ uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr)
 return addr  0x7fffll;
 }
 
+uint64_t cpu_mips_kvm_um_kseg0_to_phys(void *opaque, uint64_t addr)
+{
+return addr  0x3fffll;
+}
+
 uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr)
 {
 return addr | ~0x7fffll;
 }
+
+uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr)
+{
+return addr | 0x4000ll;
+}
diff --git a/include/hw/mips/cpudevs.h b/include/hw/mips/cpudevs.h
index 6bea24b..9e5af37 100644
--- a/include/hw/mips/cpudevs.h
+++ b/include/hw/mips/cpudevs.h
@@ -6,6 +6,10 @@
 uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr);
 uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr);
 
+uint64_t cpu_mips_kvm_um_kseg0_to_phys(void *opaque, uint64_t addr);
+uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr);
+
+
 /* mips_int.c */
 void cpu_mips_irq_init_cpu(CPUMIPSState *env);
 
-- 
1.8.1.2

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[PATCH v4 10/10] MAINTAINERS: Add entry for MIPS KVM

2014-03-14 Thread James Hogan 
Add MAINTAINERS entry for MIPS KVM.

Signed-off-by: James Hogan james.ho...@imgtec.com
---
Changes in v4:
 - Add MAINTAINERS entry for MIPS KVM.
---
 MAINTAINERS | 5 +
 1 file changed, 5 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 7d17f83..cefe1a1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -169,6 +169,11 @@ M: Peter Maydell peter.mayd...@linaro.org
 S: Maintained
 F: target-arm/kvm.c
 
+MIPS
+M: James Hogan james.ho...@imgtec.com
+S: Maintained
+F: target-mips/kvm.c
+
 PPC
 M: Alexander Graf ag...@suse.de
 S: Maintained
-- 
1.8.1.2

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[PATCH v4 04/10] target-mips: get_physical_address: Add KVM awareness

2014-03-14 Thread James Hogan 
MIPS KVM trap  emulate mode (which is currently the only supported
mode) has to add an extra kseg0/kseg1 at 0x4000 and an extra
kseg2/kseg3 at 0x6000. Take this into account in
get_physical_address() so that debug memory access works.

This is done by translating the address to a standard kseg0 or kseg2
address before doing the normal address translation. The real virtual
address is still used for TLB lookups.

Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Aurelien Jarno aurel...@aurel32.net
---
 target-mips/helper.c | 33 ++---
 1 file changed, 26 insertions(+), 7 deletions(-)

diff --git a/target-mips/helper.c b/target-mips/helper.c
index 2b30fc2..4053d50 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -24,6 +24,7 @@
 #include signal.h
 
 #include cpu.h
+#include sysemu/kvm.h
 
 enum {
 TLBRET_DIRTY = -4,
@@ -100,7 +101,7 @@ int r4k_map_address (CPUMIPSState *env, hwaddr *physical, 
int *prot,
 }
 
 static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
-int *prot, target_ulong address,
+int *prot, target_ulong real_address,
 int rw, int access_type)
 {
 /* User mode can only access useg/xuseg */
@@ -113,6 +114,8 @@ static int get_physical_address (CPUMIPSState *env, hwaddr 
*physical,
 int KX = (env-CP0_Status  (1  CP0St_KX)) != 0;
 #endif
 int ret = TLBRET_MATCH;
+/* effective address (modified for KVM TE kernel segments) */
+target_ulong address = real_address;
 
 #if 0
 qemu_log(user mode %d h %08x\n, user_mode, env-hflags);
@@ -124,19 +127,35 @@ static int get_physical_address (CPUMIPSState *env, 
hwaddr *physical,
 #define KSEG2_BASE  0xC000UL
 #define KSEG3_BASE  0xE000UL
 
+#define KVM_KSEG0_BASE  0x4000UL
+#define KVM_KSEG2_BASE  0x6000UL
+
+if (kvm_enabled()) {
+/* KVM TE adds guest kernel segments in useg */
+if (real_address = KVM_KSEG0_BASE) {
+if (real_address  KVM_KSEG2_BASE) {
+/* kseg0 */
+address += KSEG0_BASE - KVM_KSEG0_BASE;
+} else if (real_address = USEG_LIMIT) {
+/* kseg2/3 */
+address += KSEG2_BASE - KVM_KSEG2_BASE;
+}
+}
+}
+
 if (address = USEG_LIMIT) {
 /* useg */
 if (env-CP0_Status  (1  CP0St_ERL)) {
 *physical = address  0x;
 *prot = PAGE_READ | PAGE_WRITE;
 } else {
-ret = env-tlb-map_address(env, physical, prot, address, rw, 
access_type);
+ret = env-tlb-map_address(env, physical, prot, real_address, rw, 
access_type);
 }
 #if defined(TARGET_MIPS64)
 } else if (address  0x4000ULL) {
 /* xuseg */
 if (UX  address = (0x3FFFULL  env-SEGMask)) {
-ret = env-tlb-map_address(env, physical, prot, address, rw, 
access_type);
+ret = env-tlb-map_address(env, physical, prot, real_address, rw, 
access_type);
 } else {
 ret = TLBRET_BADADDR;
 }
@@ -144,7 +163,7 @@ static int get_physical_address (CPUMIPSState *env, hwaddr 
*physical,
 /* xsseg */
 if ((supervisor_mode || kernel_mode) 
 SX  address = (0x7FFFULL  env-SEGMask)) {
-ret = env-tlb-map_address(env, physical, prot, address, rw, 
access_type);
+ret = env-tlb-map_address(env, physical, prot, real_address, rw, 
access_type);
 } else {
 ret = TLBRET_BADADDR;
 }
@@ -161,7 +180,7 @@ static int get_physical_address (CPUMIPSState *env, hwaddr 
*physical,
 /* xkseg */
 if (kernel_mode  KX 
 address = (0x7FFFULL  env-SEGMask)) {
-ret = env-tlb-map_address(env, physical, prot, address, rw, 
access_type);
+ret = env-tlb-map_address(env, physical, prot, real_address, rw, 
access_type);
 } else {
 ret = TLBRET_BADADDR;
 }
@@ -185,7 +204,7 @@ static int get_physical_address (CPUMIPSState *env, hwaddr 
*physical,
 } else if (address  (int32_t)KSEG3_BASE) {
 /* sseg (kseg2) */
 if (supervisor_mode || kernel_mode) {
-ret = env-tlb-map_address(env, physical, prot, address, rw, 
access_type);
+ret = env-tlb-map_address(env, physical, prot, real_address, rw, 
access_type);
 } else {
 ret = TLBRET_BADADDR;
 }
@@ -193,7 +212,7 @@ static int get_physical_address (CPUMIPSState *env, hwaddr 
*physical,
 /* kseg3 */
 /* XXX: debug segment is not emulated */
 if (kernel_mode) {
-ret = env-tlb-map_address(env, physical, prot, address, rw, 
access_type);
+ret = env-tlb-map_address(env, physical, prot, real_address, rw, 
access_type);
 } else {
 ret = TLBRET_BADADDR;
 }
-- 
1.8.1.2

--
To

Re: [Qemu-devel] [PATCH v3 6/9] target-mips: kvm: Add main KVM support for MIPS

2014-03-14 Thread Paolo Bonzini 

Il 13/03/2014 23:35, Peter Maydell ha scritto:

 I'm not sure if we have a policy about __u64 etc. in KVM code. Since
 it'll be Linux-only I don't see problems currently; for cross-platform
 parts we prefer uint64_t. Suggest to leave as is unless told otherwise.

For ARM I took the view that __u64 were the kernel's types, not
ours. The kernel header structs define fields as __u64 but for
in-QEMU functions and variables we should use the posix uint64_t.


Agree.

Paolo
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[PATCH 1/4] MIPS: KVM: Pass reserved instruction exceptions to guest

2014-03-14 Thread James Hogan 
Previously a reserved instruction exception while in guest code would
cause a KVM internal error if kvm_mips_handle_ri() didn't recognise the
instruction (including a RDHWR from an unrecognised hardware register).

However the guest OS should really have the opportunity to catch the
exception so that it can take the appropriate actions such as sending a
SIGILL to the guest user process or emulating the instruction itself.

Therefore in these cases emulate a guest RI exception and only return
EMULATE_FAIL if that fails, being careful to revert the PC first in case
the exception occurred in a branch delay slot in which case the PC will
already point to the branch target.

Also turn the printk messages relating to these cases into kvm_debug
messages so that they aren't usually visible.

This allows crashme to run in the guest without killing the entire VM.

Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Ralf Baechle r...@linux-mips.org
Cc: Gleb Natapov g...@kernel.org
Cc: Paolo Bonzini pbonz...@redhat.com
Cc: Sanjay Lal sanj...@kymasys.com
Cc: linux-m...@linux-mips.org
Cc: kvm@vger.kernel.org
Cc: sta...@vger.kernel.org
---
 arch/mips/kvm/kvm_mips_emul.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/mips/kvm/kvm_mips_emul.c b/arch/mips/kvm/kvm_mips_emul.c
index 4b6274b47f33..e75ef8219caf 100644
--- a/arch/mips/kvm/kvm_mips_emul.c
+++ b/arch/mips/kvm/kvm_mips_emul.c
@@ -1571,17 +1571,17 @@ kvm_mips_handle_ri(unsigned long cause, uint32_t *opc,
arch-gprs[rt] = kvm_read_c0_guest_userlocal(cop0);
 #else
/* UserLocal not implemented */
-   er = kvm_mips_emulate_ri_exc(cause, opc, run, vcpu);
+   er = EMULATE_FAIL;
 #endif
break;
 
default:
-   printk(RDHWR not supported\n);
+   kvm_debug(RDHWR %#x not supported @ %p\n, rd, opc);
er = EMULATE_FAIL;
break;
}
} else {
-   printk(Emulate RI not supported @ %p: %#x\n, opc, inst);
+   kvm_debug(Emulate RI not supported @ %p: %#x\n, opc, inst);
er = EMULATE_FAIL;
}
 
@@ -1590,6 +1590,7 @@ kvm_mips_handle_ri(unsigned long cause, uint32_t *opc,
 */
if (er == EMULATE_FAIL) {
vcpu-arch.pc = curr_pc;
+   er = kvm_mips_emulate_ri_exc(cause, opc, run, vcpu);
}
return er;
 }
-- 
1.8.1.2

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[PATCH 0/4] MIPS: KVM: RI + RDHWR handling fixes

2014-03-14 Thread James Hogan 
Some misc KVM RI/RDHWR handling fixes.

Patch 1 prevents a reserved instruction (RI) exception from taking out
the entire guest (e.g. crashme inevitably causes lots of these). If the
hypervisor can't handle the RI, it can just emulate a guest RI exception
instead so the guest OS can handle it. I've marked this one for stable
since it allows guest userland to take out the VM.

Patch 3 fixes the RDHWR emulation to actually consult HWREna so that the
guest can catch exceptions of implemented RDHWR if it desires. I've not
marked this for stable since Linux at least enables the hardware
registers with HWREna anyway.

Patch 2 and 4 are cleanups that I noticed while writing patch 3.

Cc: Ralf Baechle r...@linux-mips.org
Cc: Gleb Natapov g...@kernel.org
Cc: Paolo Bonzini pbonz...@redhat.com
Cc: Sanjay Lal sanj...@kymasys.com
Cc: linux-m...@linux-mips.org
Cc: kvm@vger.kernel.org

James Hogan (4):
  MIPS: KVM: Pass reserved instruction exceptions to guest
  MIPS: KVM: asm/kvm_host.h: Clean up whitespace
  MIPS: KVM: Consult HWREna before emulating RDHWR
  MIPS: KVM: Remove dead code in CP0 emulation

 arch/mips/include/asm/kvm_host.h | 417 ---
 arch/mips/kvm/kvm_mips_emul.c|  40 ++--
 2 files changed, 229 insertions(+), 228 deletions(-)

-- 
1.8.1.2

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[PATCH 4/4] MIPS: KVM: Remove dead code in CP0 emulation

2014-03-14 Thread James Hogan 
The code to check whether rd  MIPS_CP0_DESAVE is dead code, since
MIPS_CP0_DESAVE = 31 and rd is already masked with 0x1f. Remove it.

Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Ralf Baechle r...@linux-mips.org
Cc: Gleb Natapov g...@kernel.org
Cc: Paolo Bonzini pbonz...@redhat.com
Cc: Sanjay Lal sanj...@kymasys.com
Cc: linux-m...@linux-mips.org
Cc: kvm@vger.kernel.org
---
 arch/mips/kvm/kvm_mips_emul.c | 7 ---
 1 file changed, 7 deletions(-)

diff --git a/arch/mips/kvm/kvm_mips_emul.c b/arch/mips/kvm/kvm_mips_emul.c
index d562572c2efc..e3fec99941a7 100644
--- a/arch/mips/kvm/kvm_mips_emul.c
+++ b/arch/mips/kvm/kvm_mips_emul.c
@@ -436,13 +436,6 @@ kvm_mips_emulate_CP0(uint32_t inst, uint32_t *opc, 
uint32_t cause,
sel = inst  0x7;
co_bit = (inst  25)  1;
 
-   /* Verify that the register is valid */
-   if (rd  MIPS_CP0_DESAVE) {
-   printk(Invalid rd: %d\n, rd);
-   er = EMULATE_FAIL;
-   goto done;
-   }
-
if (co_bit) {
op = (inst)  0xff;
 
-- 
1.8.1.2

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[PATCH 2/4] MIPS: KVM: asm/kvm_host.h: Clean up whitespace

2014-03-14 Thread James Hogan 
The whitespace in asm/kvm_host.h is quite inconsistent in places. Clean
up the whole file to use tabs more consistently.

When you use the --ignore-space-change argument to git diff this patch
only changes line wrapping in TLB_IS_GLOBAL and TLB_IS_VALID macros.

Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Ralf Baechle r...@linux-mips.org
Cc: Gleb Natapov g...@kernel.org
Cc: Paolo Bonzini pbonz...@redhat.com
Cc: Sanjay Lal sanj...@kymasys.com
Cc: linux-m...@linux-mips.org
Cc: kvm@vger.kernel.org
---
 arch/mips/include/asm/kvm_host.h | 415 ---
 1 file changed, 209 insertions(+), 206 deletions(-)

diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h
index a995fce87791..502c8da08574 100644
--- a/arch/mips/include/asm/kvm_host.h
+++ b/arch/mips/include/asm/kvm_host.h
@@ -30,16 +30,16 @@
 
 
 /* Special address that contains the comm page, used for reducing # of traps */
-#define KVM_GUEST_COMMPAGE_ADDR 0x0
+#define KVM_GUEST_COMMPAGE_ADDR0x0
 
 #define KVM_GUEST_KERNEL_MODE(vcpu)
((kvm_read_c0_guest_status(vcpu-arch.cop0)  (ST0_EXL | ST0_ERL)) || \

((kvm_read_c0_guest_status(vcpu-arch.cop0)  KSU_USER) == 0))
 
-#define KVM_GUEST_KUSEG 0xUL
-#define KVM_GUEST_KSEG0 0x4000UL
-#define KVM_GUEST_KSEG230x6000UL
-#define KVM_GUEST_KSEGX(a)  ((_ACAST32_(a))  0x6000)
-#define KVM_GUEST_CPHYSADDR(a)  ((_ACAST32_(a))  0x1fff)
+#define KVM_GUEST_KUSEG0xUL
+#define KVM_GUEST_KSEG00x4000UL
+#define KVM_GUEST_KSEG23   0x6000UL
+#define KVM_GUEST_KSEGX(a) ((_ACAST32_(a))  0x6000)
+#define KVM_GUEST_CPHYSADDR(a) ((_ACAST32_(a))  0x1fff)
 
 #define KVM_GUEST_CKSEG0ADDR(a)(KVM_GUEST_CPHYSADDR(a) | 
KVM_GUEST_KSEG0)
 #define KVM_GUEST_CKSEG1ADDR(a)(KVM_GUEST_CPHYSADDR(a) | 
KVM_GUEST_KSEG1)
@@ -52,17 +52,17 @@
 #define KVM_GUEST_KSEG1ADDR(a) (KVM_GUEST_CPHYSADDR(a) | 
KVM_GUEST_KSEG1)
 #define KVM_GUEST_KSEG23ADDR(a)(KVM_GUEST_CPHYSADDR(a) | 
KVM_GUEST_KSEG23)
 
-#define KVM_INVALID_PAGE0xdeadbeef
-#define KVM_INVALID_INST0xdeadbeef
-#define KVM_INVALID_ADDR0xdeadbeef
+#define KVM_INVALID_PAGE   0xdeadbeef
+#define KVM_INVALID_INST   0xdeadbeef
+#define KVM_INVALID_ADDR   0xdeadbeef
 
-#define KVM_MALTA_GUEST_RTC_ADDR0xb870UL
+#define KVM_MALTA_GUEST_RTC_ADDR   0xb870UL
 
-#define GUEST_TICKS_PER_JIFFY (4000/HZ)
-#define MS_TO_NS(x) (x * 1E6L)
+#define GUEST_TICKS_PER_JIFFY  (4000/HZ)
+#define MS_TO_NS(x)(x * 1E6L)
 
-#define CAUSEB_DC   27
-#define CAUSEF_DC   (_ULCAST_(1)27)
+#define CAUSEB_DC  27
+#define CAUSEF_DC  (_ULCAST_(1)  27)
 
 struct kvm;
 struct kvm_run;
@@ -126,8 +126,8 @@ struct kvm_arch {
int commpage_tlb;
 };
 
-#define N_MIPS_COPROC_REGS  32
-#define N_MIPS_COPROC_SEL  8
+#define N_MIPS_COPROC_REGS 32
+#define N_MIPS_COPROC_SEL  8
 
 struct mips_coproc {
unsigned long reg[N_MIPS_COPROC_REGS][N_MIPS_COPROC_SEL];
@@ -139,124 +139,124 @@ struct mips_coproc {
 /*
  * Coprocessor 0 register names
  */
-#defineMIPS_CP0_TLB_INDEX  0
-#defineMIPS_CP0_TLB_RANDOM 1
-#defineMIPS_CP0_TLB_LOW2
-#defineMIPS_CP0_TLB_LO02
-#defineMIPS_CP0_TLB_LO13
-#defineMIPS_CP0_TLB_CONTEXT4
-#defineMIPS_CP0_TLB_PG_MASK5
-#defineMIPS_CP0_TLB_WIRED  6
-#defineMIPS_CP0_HWRENA 7
-#defineMIPS_CP0_BAD_VADDR  8
-#defineMIPS_CP0_COUNT  9
-#defineMIPS_CP0_TLB_HI 10
-#defineMIPS_CP0_COMPARE11
-#defineMIPS_CP0_STATUS 12
-#defineMIPS_CP0_CAUSE  13
-#defineMIPS_CP0_EXC_PC 14
-#defineMIPS_CP0_PRID   15
-#defineMIPS_CP0_CONFIG 16
-#defineMIPS_CP0_LLADDR 17
-#defineMIPS_CP0_WATCH_LO   18
-#defineMIPS_CP0_WATCH_HI   19
-#defineMIPS_CP0_TLB_XCONTEXT   20
-#defineMIPS_CP0_ECC26
-#defineMIPS_CP0_CACHE_ERR  27
-#defineMIPS_CP0_TAG_LO 28
-#defineMIPS_CP0_TAG_HI 29
-#defineMIPS_CP0_ERROR_PC   30
-#defineMIPS_CP0_DEBUG  23
-#defineMIPS_CP0_DEPC   24
-#defineMIPS_CP0_PERFCNT25
-#defineMIPS_CP0_ERRCTL 26
-#defineMIPS_CP0_DATA_LO28
-#defineMIPS_CP0_DATA_HI29
-#defineMIPS_CP0_DESAVE 31
-
-#define MIPS_CP0_CONFIG_SEL0
-#define

[PATCH 3/4] MIPS: KVM: Consult HWREna before emulating RDHWR

2014-03-14 Thread James Hogan 
The ability to read hardware registers from userland with the RDHWR
instruction should depend upon the corresponding bit of the HWREna
register being set, otherwise a reserved instruction exception should be
generated.

However KVM's current emulation ignores the guest's HWREna and always
emulates RDHWR instructions even if the guest OS has disallowed them.

Therefore rework the RDHWR emulation code to check for privilege or the
corresponding bit in the guest HWREna bit. Also remove the #if 0 case
for the UserLocal register. I presume it was there for debug purposes
but it seems unnecessary now that the guest can control whether it
causes a guest exception.

Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Ralf Baechle r...@linux-mips.org
Cc: Gleb Natapov g...@kernel.org
Cc: Paolo Bonzini pbonz...@redhat.com
Cc: Sanjay Lal sanj...@kymasys.com
Cc: linux-m...@linux-mips.org
Cc: kvm@vger.kernel.org
---
 arch/mips/include/asm/kvm_host.h |  2 ++
 arch/mips/kvm/kvm_mips_emul.c| 30 --
 2 files changed, 18 insertions(+), 14 deletions(-)

diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h
index 502c8da08574..060aaa6348d7 100644
--- a/arch/mips/include/asm/kvm_host.h
+++ b/arch/mips/include/asm/kvm_host.h
@@ -414,6 +414,8 @@ struct kvm_vcpu_arch {
 #define kvm_write_c0_guest_pagemask(cop0, val) 
(cop0-reg[MIPS_CP0_TLB_PG_MASK][0] = (val))
 #define kvm_read_c0_guest_wired(cop0)  
(cop0-reg[MIPS_CP0_TLB_WIRED][0])
 #define kvm_write_c0_guest_wired(cop0, val)
(cop0-reg[MIPS_CP0_TLB_WIRED][0] = (val))
+#define kvm_read_c0_guest_hwrena(cop0) (cop0-reg[MIPS_CP0_HWRENA][0])
+#define kvm_write_c0_guest_hwrena(cop0, val)   (cop0-reg[MIPS_CP0_HWRENA][0] 
= (val))
 #define kvm_read_c0_guest_badvaddr(cop0)   
(cop0-reg[MIPS_CP0_BAD_VADDR][0])
 #define kvm_write_c0_guest_badvaddr(cop0, val) 
(cop0-reg[MIPS_CP0_BAD_VADDR][0] = (val))
 #define kvm_read_c0_guest_count(cop0)  (cop0-reg[MIPS_CP0_COUNT][0])
diff --git a/arch/mips/kvm/kvm_mips_emul.c b/arch/mips/kvm/kvm_mips_emul.c
index e75ef8219caf..d562572c2efc 100644
--- a/arch/mips/kvm/kvm_mips_emul.c
+++ b/arch/mips/kvm/kvm_mips_emul.c
@@ -1542,8 +1542,15 @@ kvm_mips_handle_ri(unsigned long cause, uint32_t *opc,
}
 
if ((inst  OPCODE) == SPEC3  (inst  FUNC) == RDHWR) {
+   int usermode = !KVM_GUEST_KERNEL_MODE(vcpu);
int rd = (inst  RD)  11;
int rt = (inst  RT)  16;
+   /* If usermode, check RDHWR rd is allowed by guest HWREna */
+   if (usermode  !(kvm_read_c0_guest_hwrena(cop0)  BIT(rd))) {
+   kvm_debug(RDHWR %#x disallowed by HWREna @ %p\n,
+ rd, opc);
+   goto emulate_ri;
+   }
switch (rd) {
case 0: /* CPU number */
arch-gprs[rt] = 0;
@@ -1567,32 +1574,27 @@ kvm_mips_handle_ri(unsigned long cause, uint32_t *opc,
}
break;
case 29:
-#if 1
arch-gprs[rt] = kvm_read_c0_guest_userlocal(cop0);
-#else
-   /* UserLocal not implemented */
-   er = EMULATE_FAIL;
-#endif
break;
 
default:
kvm_debug(RDHWR %#x not supported @ %p\n, rd, opc);
-   er = EMULATE_FAIL;
-   break;
+   goto emulate_ri;
}
} else {
kvm_debug(Emulate RI not supported @ %p: %#x\n, opc, inst);
-   er = EMULATE_FAIL;
+   goto emulate_ri;
}
 
+   return EMULATE_DONE;
+
+emulate_ri:
/*
-* Rollback PC only if emulation was unsuccessful
+* Rollback PC (if in branch delay slot then the PC already points to
+* branch target), and pass the RI exception to the guest OS.
 */
-   if (er == EMULATE_FAIL) {
-   vcpu-arch.pc = curr_pc;
-   er = kvm_mips_emulate_ri_exc(cause, opc, run, vcpu);
-   }
-   return er;
+   vcpu-arch.pc = curr_pc;
+   return kvm_mips_emulate_ri_exc(cause, opc, run, vcpu);
 }
 
 enum emulation_result
-- 
1.8.1.2

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Re: [Qemu-devel] [PATCH v4 00/10] KVM Support for MIPS32 Processors

2014-03-14 Thread Peter Maydell 
On 14 March 2014 12:47, James Hogan james.ho...@imgtec.com wrote:
 I'd like to have this squeezed into 2.0 (if at all possible), so any
 final review from KVM people would be much appreciated.

Unfortunately we're already in hardfreeze, which means
bug fixes only at this point. I don't think we can really
justify putting this patchset in at this point :-(

thanks
-- PMM
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Re: [Qemu-devel] [PATCH v4 00/10] KVM Support for MIPS32 Processors

2014-03-14 Thread James Hogan 
On 14/03/14 13:27, Peter Maydell wrote:
 On 14 March 2014 12:47, James Hogan james.ho...@imgtec.com wrote:
 I'd like to have this squeezed into 2.0 (if at all possible), so any
 final review from KVM people would be much appreciated.
 
 Unfortunately we're already in hardfreeze, which means
 bug fixes only at this point. I don't think we can really
 justify putting this patchset in at this point :-(

Okay, fair enough.

Thanks
James
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Re: [PATCH v3 10/52] arm, kvm: Fix CPU hotplug callback registration

2014-03-14 Thread Christoffer Dall 
On Fri, Mar 14, 2014 at 11:13:29AM +0530, Srivatsa S. Bhat wrote:
 On 03/13/2014 04:51 AM, Christoffer Dall wrote:
  On Tue, Mar 11, 2014 at 02:05:38AM +0530, Srivatsa S. Bhat wrote:
  Subsystems that want to register CPU hotplug callbacks, as well as perform
  initialization for the CPUs that are already online, often do it as shown
  below:
 
 get_online_cpus();
 
 for_each_online_cpu(cpu)
 init_cpu(cpu);
 
 register_cpu_notifier(foobar_cpu_notifier);
 
 put_online_cpus();
 
  This is wrong, since it is prone to ABBA deadlocks involving the
  cpu_add_remove_lock and the cpu_hotplug.lock (when running concurrently
  with CPU hotplug operations).
 
  Instead, the correct and race-free way of performing the callback
  registration is:
 
 cpu_notifier_register_begin();
 
 for_each_online_cpu(cpu)
 init_cpu(cpu);
 
 /* Note the use of the double underscored version of the API */
 __register_cpu_notifier(foobar_cpu_notifier);
 
 cpu_notifier_register_done();
 
 
  Fix the kvm code in arm by using this latter form of callback registration.
 
  Cc: Christoffer Dall christoffer.d...@linaro.org
  Cc: Gleb Natapov g...@kernel.org
  Cc: Russell King li...@arm.linux.org.uk
  Cc: Ingo Molnar mi...@kernel.org
  Cc: kvm...@lists.cs.columbia.edu
  Cc: kvm@vger.kernel.org
  Cc: linux-arm-ker...@lists.infradead.org
  Acked-by: Paolo Bonzini pbonz...@redhat.com
  Signed-off-by: Srivatsa S. Bhat srivatsa.b...@linux.vnet.ibm.com
  ---
 
   arch/arm/kvm/arm.c |7 ++-
   1 file changed, 6 insertions(+), 1 deletion(-)
 
  diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
  index bd18bb8..f0e50a0 100644
  --- a/arch/arm/kvm/arm.c
  +++ b/arch/arm/kvm/arm.c
  @@ -1051,21 +1051,26 @@ int kvm_arch_init(void *opaque)
 }
 }
   
  +  cpu_notifier_register_begin();
  +
 err = init_hyp_mode();
 if (err)
 goto out_err;
   
  -  err = register_cpu_notifier(hyp_init_cpu_nb);
  +  err = __register_cpu_notifier(hyp_init_cpu_nb);
 if (err) {
 kvm_err(Cannot register HYP init CPU notifier (%d)\n, err);
 goto out_err;
 }
   
  +  cpu_notifier_register_done();
  +
 hyp_cpu_pm_init();
   
 kvm_coproc_table_init();
 return 0;
   out_err:
  +  cpu_notifier_register_done();
 return err;
   }
   
 
  
  Just so we're clear, the existing code was simply racy as not prone to
  deadlocks, right?
  
  This makes it clear that the test above for compatible CPUs can be quite
  easily evaded by using CPU hotplug, but we don't really have a good
  solution for handling that yet...  Hmmm, grumble grumble, I guess if you
  hotplug unsupported CPUs on a KVM/ARM system for now, stuff will break.
  
 
 In this particular case, there was no deadlock possibility, rather the
 existing code had insufficient synchronization against CPU hotplug.
 
 init_hyp_mode() would invoke cpu_init_hyp_mode() on currently online CPUs
 using on_each_cpu(). If a CPU came online after this point and before calling
 register_cpu_notifier(), that CPU would remain uninitialized because this
 subsystem would miss the hot-online event. This patch fixes this bug and
 also uses the new synchronization method (instead of get/put_online_cpus())
 to ensure that we don't deadlock with CPU hotplug.
 

Yes, that was my conclusion as well.  Thanks for clarifying.  (It could
be noted in the commit message as well if you should feel so inclined).

  In any case:
  Acked-by: Christoffer Dall christoffer.d...@linaro.org
  
 
 Thanks a lot!
 
Thanks,
-Christoffer
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Re: [PATCH 2/3] bridge: trigger a bridge calculation upon port changes

2014-03-14 Thread Luis R. Rodriguez 
On Thu, Mar 13, 2014 at 11:26:25AM -0700, Cong Wang wrote:
 On Wed, Mar 12, 2014 at 8:15 PM, Luis R. Rodriguez
 mcg...@do-not-panic.com wrote:
  spin_lock_bh(p-br-lock);
  err = br_setport(p, tb);
  +   changed = br_stp_recalculate_bridge_id(p-br);
 
 Looks like you only want to check if the mac addr gets changed here,

Nope, the reason why we want a full thorough check is that br_setport()
may change currently any of these:

  * IFLA_BRPORT_MODE
  * IFLA_BRPORT_GUARD
  * IFLA_BRPORT_FAST_LEAVE
  * IFLA_BRPORT_PROTECT
  * IFLA_BRPORT_LEARNING,
  * IFLA_BRPORT_UNICAST_FLOOD
  * IFLA_BRPORT_COST
  * IFLA_BRPORT_PRIORITY
  * IFLA_BRPORT_STATE

That's good reason to trigger a good inspection. Having the MAC address
change would be simply collateral and its just something we need to do
some additional work for outside of the locking context.

 but br_stp_recalculate_bridge_id() does more than just checking it,
 are you sure the side-effects are all what you want here?

Yeap.

  spin_unlock_bh(p-br-lock);
  +   if (changed)
  +   call_netdevice_notifiers(NETDEV_CHANGEADDR,
  +p-br-dev);
  +   netdev_update_features(p-br-dev);
 
 I think this is supposed to be in netdev event handler of br-dev
 instead of here.

Do you mean netdev_update_features() ? I mimic'd what was being done on
br_del_if() given that root blocking is doing something similar. If
we need to change something for the above then I suppose it means we need
to change br_del_if() too. Let me know if you see any reason for something
else.

  Luis


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Re: [PATCH 3/3] bridge: fix bridge root block on designated port

2014-03-14 Thread Luis R. Rodriguez 
On Thu, Mar 13, 2014 at 03:16:23PM -0700, Stephen Hemminger wrote:
 On Wed, 12 Mar 2014 20:15:27 -0700
 Luis R. Rodriguez mcg...@do-not-panic.com wrote:
 
  --- a/net/bridge/br_private.h
  +++ b/net/bridge/br_private.h
  @@ -150,6 +150,7 @@ struct net_bridge_port
  u8  priority;
  u8  state;
  u16 port_no;
  +   boolroot_block_enabled;
  unsigned char   topology_change_ack;
 
 It seems a bit confusing to have both a ROOT_BLOCK flag in the
 data structure and and additional root_block_enabled flag.
 If nothing else it is a waste of space.

Indeed, however there is a use for it. Consider the case where we loop
over each port and check to see if its root blocked and need to tickle it
or the bridge. In the case that root port block was enabled before and
someone is lifting it the flag would be removed and therefore not on
but it was root blocked though and we need a way to keep track of that.

The flag then is a toggle for userspace, while the bool tells us about
the current state.

 Looks like you are changing the meaning slightly. 

Let me know in what way. I can't see it.

 is possible to have BR_ROOT_BLOCK set but !root_block_enabled? 

Yeah in the case a new request to set it to root block then
BR_ROOT_BLOCK would be set but root_block_enabled would not be set.

 and what about the inverse?

BR_ROOT_BLOCK would not be set when userspace wants to disable root
port block and root_block_enabled would be enabled in this case if
it used to be enabled. So yes, both are possible.

  Luis


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