Re: [PATCH V4] POWERPC: BOOK3S: KVM: Use the saved dar value and generic make_dsisr
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2014-05-05 7:43 GMT-07:00 Alexander Graf ag...@suse.de:
On 05/05/2014 04:26 PM, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On 05/04/2014 07:21 PM, Aneesh Kumar K.V wrote:
Although it's optional IBM POWER cpus always had DAR value set on
alignment interrupt. So don't try to compute these values.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
Changes from V3:
* Use make_dsisr instead of checking feature flag to decide whether to use
saved dsisr or not
ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst)
{
+#ifdef CONFIG_PPC_BOOK3S_64
+ return vcpu-arch.fault_dar;
How about PA6T and G5s?
Paul mentioned that BOOK3S always had DAR value set on alignment
interrupt. And the patch is to enable/collect correct DAR value when
running with Little Endian PR guest. Now to limit the impact and to
enable Little Endian PR guest, I ended up doing the conditional code
only for book3s 64 for which we know for sure that we set DAR value.
Yes, and I'm asking whether we know that this statement holds true for PA6T
and G5 chips which I wouldn't consider IBM POWER. Since the G5 is at least
developed by IBM, I'd assume its semantics here are similar to POWER4, but
for PA6T I wouldn't be so sure.
Thanks for looking out for us, obviously IBM doesn't (based on the
reply a minute ago).
In the end, since there's been no work to enable KVM on PA6T, I'm not
too worried. I guess it's one more thing to sort out (and check for)
whenever someone does that.
I definitely don't have cycles to deal with that myself at this time.
I can help find hardware for someone who wants to, but even then I'm
guessing the interest is pretty limited.
-Olof
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Re: [PATCH V4] POWERPC: BOOK3S: KVM: Use the saved dar value and generic make_dsisr
2014-05-05 8:03 GMT-07:00 Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com:
Olof Johansson ol...@google.com writes:
2014-05-05 7:43 GMT-07:00 Alexander Graf ag...@suse.de:
On 05/05/2014 04:26 PM, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On 05/04/2014 07:21 PM, Aneesh Kumar K.V wrote:
Although it's optional IBM POWER cpus always had DAR value set on
alignment interrupt. So don't try to compute these values.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
Changes from V3:
* Use make_dsisr instead of checking feature flag to decide whether to
use
saved dsisr or not
ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst)
{
+#ifdef CONFIG_PPC_BOOK3S_64
+ return vcpu-arch.fault_dar;
How about PA6T and G5s?
Paul mentioned that BOOK3S always had DAR value set on alignment
interrupt. And the patch is to enable/collect correct DAR value when
running with Little Endian PR guest. Now to limit the impact and to
enable Little Endian PR guest, I ended up doing the conditional code
only for book3s 64 for which we know for sure that we set DAR value.
Yes, and I'm asking whether we know that this statement holds true for
PA6T and G5 chips which I wouldn't consider IBM POWER. Since the G5 is at
least developed by IBM, I'd assume its semantics here are similar to
POWER4, but for PA6T I wouldn't be so sure.
Thanks for looking out for us, obviously IBM doesn't (based on the reply a
minute ago).
The reason I deferred the question to Paul is really because I don't
know enough about PA6T and G5 to comment. I intentionally restricted the
changes to BOOK3S_64 because I wanted to make sure I don't break
anything else. It is in no way to hint that others don't care.
Ah, I see -- the disconnect is that you don't think PA6T and 970 are
64-bit book3s CPUs. They are.
-Olof
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Re: [RFC v2] ARM VM System Specification
On Fri, Mar 28, 2014 at 11:45 AM, Christoffer Dall christoffer.d...@linaro.org wrote: ARM VM System Specification === [not quoting the whole spec here] This looks very sane to me, and aligns very well with non-virtualized images. For what it's worth, even though it's not a patch: Acked-by: Olof Johansson o...@lixom.net What's the plan on how to lock this in? Where's this document going to live? In the kernel sources under Documentation/, or external? -Olof -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL] KVM/ARM Fixes for 3.12-rc2
Paolo, On Wed, Sep 25, 2013 at 2:49 AM, Paolo Bonzini pbonz...@redhat.com wrote: Il 24/09/2013 21:49, Christoffer Dall ha scritto: The following changes since commit 62d228b8c676232eca579f91cc0782b060a59097: Merge branch 'fixes' of git://git.kernel.org/pub/scm/virt/kvm/kvm (2013-09-17 22:20:30 -0400) are available in the git repository at: git://git.linaro.org/people/cdall/linux-kvm-arm.git tags/kvm-arm-fixes-3.12-rc2 for you to fetch changes up to ac570e0493815e0b41681c89cb50d66421429d27: ARM: kvm: rename cpu_reset to avoid name clash (2013-09-24 11:15:05 -0700) KVM/ARM Fixes for 3.12-rc2 Fixes compilation error with KVM/ARM enabled. Olof Johansson (1): ARM: kvm: rename cpu_reset to avoid name clash arch/arm/kvm/reset.c |6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) Pulled, thanks. When do you expect to send your branch to Linus? I haven't seen it land there yet, nor in linux-next. This is keeping us from even building KVM-enabled kernels on ARM. -Olof -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL] KVM/ARM Fixes for 3.12-rc2
On Wed, Oct 2, 2013 at 9:04 PM, Gleb Natapov g...@redhat.com wrote: On Wed, Oct 02, 2013 at 01:14:57PM -0700, Olof Johansson wrote: Paolo, On Wed, Sep 25, 2013 at 2:49 AM, Paolo Bonzini pbonz...@redhat.com wrote: Il 24/09/2013 21:49, Christoffer Dall ha scritto: The following changes since commit 62d228b8c676232eca579f91cc0782b060a59097: Merge branch 'fixes' of git://git.kernel.org/pub/scm/virt/kvm/kvm (2013-09-17 22:20:30 -0400) are available in the git repository at: git://git.linaro.org/people/cdall/linux-kvm-arm.git tags/kvm-arm-fixes-3.12-rc2 for you to fetch changes up to ac570e0493815e0b41681c89cb50d66421429d27: ARM: kvm: rename cpu_reset to avoid name clash (2013-09-24 11:15:05 -0700) KVM/ARM Fixes for 3.12-rc2 Fixes compilation error with KVM/ARM enabled. Olof Johansson (1): ARM: kvm: rename cpu_reset to avoid name clash arch/arm/kvm/reset.c |6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) Pulled, thanks. When do you expect to send your branch to Linus? I haven't seen it land there yet, nor in linux-next. This is keeping us from even building KVM-enabled kernels on ARM. It is in Linus tree for a couple of days now. Weird, I looked at both mainline and -next this morning, or so I thought. Thanks, and apologies for the noise. -Olof -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: kvm: rename cpu_reset to avoid name clash
Hi Christoffer, On Mon, Sep 16, 2013 at 8:47 PM, Christoffer Dall christoffer.d...@linaro.org wrote: On 16 September 2013 19:41, Olof Johansson o...@lixom.net wrote: Hi, On Wed, Sep 11, 2013 at 6:50 PM, Christoffer Dall christoffer.d...@linaro.org wrote: On Wed, Sep 11, 2013 at 03:39:26PM -0700, Olof Johansson wrote: On Wed, Sep 11, 2013 at 3:27 PM, Olof Johansson o...@lixom.net wrote: cpu_reset is already #defined in asm/proc-fns.h as processor.reset, so it expands here and causes problems. Signed-off-by: Olof Johansson o...@lixom.net I just noticed this is broken on 3.10 too, so if/when applying feel free to add: Cc: sta...@vger.kernel.org # 3.10+ Thanks for the fix, applied. I haven't seen this hit linux-next yet? I was waiting for kvm/next to move to 3.12-rc1 and base the patch for kvm-arm-next off there, but I pushed this to kvm-arm-next now and it should land in linux-next as soon as they update. Another week has passed, and -next and mainline are both still broken. Can we please see a fix in mainline and -next within the next few days? -Olof -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: kvm: rename cpu_reset to avoid name clash
Hi, On Wed, Sep 11, 2013 at 6:50 PM, Christoffer Dall christoffer.d...@linaro.org wrote: On Wed, Sep 11, 2013 at 03:39:26PM -0700, Olof Johansson wrote: On Wed, Sep 11, 2013 at 3:27 PM, Olof Johansson o...@lixom.net wrote: cpu_reset is already #defined in asm/proc-fns.h as processor.reset, so it expands here and causes problems. Signed-off-by: Olof Johansson o...@lixom.net I just noticed this is broken on 3.10 too, so if/when applying feel free to add: Cc: sta...@vger.kernel.org # 3.10+ Thanks for the fix, applied. I haven't seen this hit linux-next yet? -Olof -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: kvm: rename cpu_reset to avoid name clash
cpu_reset is already #defined in asm/proc-fns.h as processor.reset,
so it expands here and causes problems.
Signed-off-by: Olof Johansson o...@lixom.net
---
arch/arm/kvm/reset.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/kvm/reset.c b/arch/arm/kvm/reset.c
index 71e08ba..c02ba4a 100644
--- a/arch/arm/kvm/reset.c
+++ b/arch/arm/kvm/reset.c
@@ -58,14 +58,14 @@ static const struct kvm_irq_level a15_vtimer_irq = {
*/
int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
{
- struct kvm_regs *cpu_reset;
+ struct kvm_regs *reset_regs;
const struct kvm_irq_level *cpu_vtimer_irq;
switch (vcpu-arch.target) {
case KVM_ARM_TARGET_CORTEX_A15:
if (vcpu-vcpu_id a15_max_cpu_idx)
return -EINVAL;
- cpu_reset = a15_regs_reset;
+ reset_regs = a15_regs_reset;
vcpu-arch.midr = read_cpuid_id();
cpu_vtimer_irq = a15_vtimer_irq;
break;
@@ -74,7 +74,7 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
}
/* Reset core registers */
- memcpy(vcpu-arch.regs, cpu_reset, sizeof(vcpu-arch.regs));
+ memcpy(vcpu-arch.regs, reset_regs, sizeof(vcpu-arch.regs));
/* Reset CP15 registers */
kvm_reset_coprocs(vcpu);
--
1.7.10.4
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Re: [PATCH] ARM: kvm: rename cpu_reset to avoid name clash
On Wed, Sep 11, 2013 at 3:27 PM, Olof Johansson o...@lixom.net wrote: cpu_reset is already #defined in asm/proc-fns.h as processor.reset, so it expands here and causes problems. Signed-off-by: Olof Johansson o...@lixom.net I just noticed this is broken on 3.10 too, so if/when applying feel free to add: Cc: sta...@vger.kernel.org # 3.10+ -Olof -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 0/12] Hypervisor-mode KVM on POWER7
On Tue, May 31, 2011 at 5:35 AM, Paul Mackerras pau...@samba.org wrote: On Tue, May 31, 2011 at 12:40:31PM +0200, Alexander Graf wrote: Thinking about the testability of this a bit more ... how much effort would it be to get this code running on a 970MP with SLOF? There should only be a few POWER7 specific pieces, right? Do you have a 970MP that has a usable hypervisor mode, i.e. not an Apple machine? The 970s in Apple machines have the HV hard-wired to 1, which means they do have a hypervisor mode but it isn't any use. If you do have such a machine, then we would have to look at some details like the instruction sequence for the partition switch, and make sure we don't try to use SMT4 mode. Also, I believe we will have to flush the TLB on partition switches, since Power processors prior to POWER7 didn't tag the TLB entries with the partition ID. So it should be quite feasible if you have a non-Apple machine. I will check whether the 970MP machines that Terrasoft were distributing would be suitable. We have one of them in the lab. PA6T is closer to power7 than 970 when it comes to hypervisor features (i.e. VRMA, LPCR, mediated interrupts are all available there). I can try to find some old hardware if there's any interest from anyone to use it. Of course, there isn't much of a roadmap. But 970 isn't really going anywhere either. :) -Olof -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 0/12] Hypervisor-mode KVM on POWER7
On Tue, May 31, 2011 at 5:35 AM, Paul Mackerras pau...@samba.org wrote: On Tue, May 31, 2011 at 12:40:31PM +0200, Alexander Graf wrote: Thinking about the testability of this a bit more ... how much effort would it be to get this code running on a 970MP with SLOF? There should only be a few POWER7 specific pieces, right? Do you have a 970MP that has a usable hypervisor mode, i.e. not an Apple machine? The 970s in Apple machines have the HV hard-wired to 1, which means they do have a hypervisor mode but it isn't any use. If you do have such a machine, then we would have to look at some details like the instruction sequence for the partition switch, and make sure we don't try to use SMT4 mode. Also, I believe we will have to flush the TLB on partition switches, since Power processors prior to POWER7 didn't tag the TLB entries with the partition ID. So it should be quite feasible if you have a non-Apple machine. I will check whether the 970MP machines that Terrasoft were distributing would be suitable. We have one of them in the lab. PA6T is closer to power7 than 970 when it comes to hypervisor features (i.e. VRMA, LPCR, mediated interrupts are all available there). I can try to find some old hardware if there's any interest from anyone to use it. Of course, there isn't much of a roadmap. But 970 isn't really going anywhere either. :) -Olof -- To unsubscribe from this list: send the line unsubscribe kvm-ppc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 00/27] Add KVM support for Book3s_64 (PPC64) hosts v5
Not sure which patch in the series this is needed for since I applied them all, but I got: CC arch/powerpc/kvm/timing.o arch/powerpc/kvm/timing.c:205: error: 'THIS_MODULE' undeclared here (not in a function) Signed-off-by: Olof Johansson o...@lixom.net diff --git a/arch/powerpc/kvm/timing.c b/arch/powerpc/kvm/timing.c index 2aa371e..7037855 100644 --- a/arch/powerpc/kvm/timing.c +++ b/arch/powerpc/kvm/timing.c @@ -23,6 +23,7 @@ #include linux/seq_file.h #include linux/debugfs.h #include linux/uaccess.h +#include linux/module.h #include asm/time.h #include asm-generic/div64.h -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 00/27] Add KVM support for Book3s_64 (PPC64) hosts v5
On Oct 26, 2009, at 6:20 PM, Hollis Blanchard wrote: For some reason, I'm not seeing this build break, but the patch is obviously correct. Acked-by: Hollis Blanchard holl...@us.ibm.com I saw it when building with pasemi_defconfig + manually enabled KVM options (all available). -Olof -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 00/27] Add KVM support for Book3s_64 (PPC64) hosts v5
On Oct 26, 2009, at 6:20 PM, Hollis Blanchard wrote: For some reason, I'm not seeing this build break, but the patch is obviously correct. Acked-by: Hollis Blanchard holl...@us.ibm.com I saw it when building with pasemi_defconfig + manually enabled KVM options (all available). -Olof -- To unsubscribe from this list: send the line unsubscribe kvm-ppc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 00/23] Add KVM support for PPC64 (970) hosts
On Wed, Jul 08, 2009 at 04:42:32PM +1000, Benjamin Herrenschmidt wrote: On Tue, 2009-07-07 at 17:49 +0200, Alexander Graf wrote: I'm completely open to naming suggenstions. The code is 100% ppc64 compatible. I'm not aware of any 970 specifics. I just thought all PPC64 cores are called something with 970. :-) So 970 is just the thing also known as G5 which is a light variant of the POWER 4 processor. Basically, the world we support in linux looks like that: Tsk tsk tsk, you forgot PA6T. :-) -Olof -- To unsubscribe from this list: send the line unsubscribe kvm-ppc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 00/23] Add KVM support for PPC64 (970) hosts
On Wed, Jul 08, 2009 at 06:01:26PM +1000, Benjamin Herrenschmidt wrote: The cache line sizes vary between processors, that is, the problem is not only classic 32 32 bytes vs. classic 64 128 bytes, some CPUs have 64 bytes cache line size for example too. Which non-booke CPUs have 64 byte cache line size? I thought all BookS PPC64 ones are on 128 bytes. PA-Semi, maybe rs64 (not sure, I have some vague memories here though the later is only supported on some legacy iSeries which we may not care about... the kernel cputable still says 128 though, but maybe the device-tree says otherwise). Right, I think PPC620 had it, and I doubt anyone runs linux on those. -Olof -- To unsubscribe from this list: send the line unsubscribe kvm-ppc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
