Re: [PATCH 13/38] KVM: PPC: booke: category E.HV (GS-mode) support
>> +/* >> + * Host interrupt handlers may have clobbered these guest-readable >> + * SPRGs, so we need to reload them here with the guest's values. >> + */ >> +lwz r3, VCPU_VRSAVE(r4) >> +lwz r5, VCPU_SHARED_SPRG4(r11) >> +mtspr SPRN_VRSAVE, r3 >> +lwz r6, VCPU_SHARED_SPRG5(r11) >> +mtspr SPRN_SPRG4W, r5 >> +lwz r7, VCPU_SHARED_SPRG6(r11) >> +mtspr SPRN_SPRG5W, r6 >> +lwz r8, VCPU_SHARED_SPRG7(r11) >> +mtspr SPRN_SPRG6W, r7 >> +mtspr SPRN_SPRG7W, r8 >> + That should be here. >> +/* Load some guest volatiles. */ >> +PPC_LL r3, VCPU_LR(r4) >> +PPC_LL r5, VCPU_XER(r4) >> +PPC_LL r6, VCPU_CTR(r4) >> +PPC_LL r7, VCPU_CR(r4) >> +PPC_LL r8, VCPU_PC(r4) >> +#ifndef CONFIG_64BIT >> +lwz r9, (VCPU_SHARED_MSR + 4)(r11) >> +#else >> +ld r9, (VCPU_SHARED_MSR)(r11) >> +#endif >> +PPC_LL r0, VCPU_GPR(r0)(r4) >> +PPC_LL r1, VCPU_GPR(r1)(r4) >> +PPC_LL r2, VCPU_GPR(r2)(r4) >> +PPC_LL r10, VCPU_GPR(r10)(r4) >> +PPC_LL r11, VCPU_GPR(r11)(r4) >> +PPC_LL r12, VCPU_GPR(r12)(r4) >> +PPC_LL r13, VCPU_GPR(r13)(r4) >> +mtlrr3 >> +mtxer r5 >> +mtctr r6 >> +mtcrr7 >> +mtsrr0 r8 >> +mtsrr1 r9 >> + >> +#ifdef CONFIG_KVM_EXIT_TIMING >> +/* save enter time */ >> +1: >> +mfspr r6, SPRN_TBRU >> +mfspr r7, SPRN_TBRL >> +mfspr r8, SPRN_TBRU >> +cmpwr8, r6 > > Is not we should save guest CR after this otherwise this can corrupt it? I think this should be a typo since in our previous kvm implementation, we always did collect kvm exit timing at the above location :) Tiejun > > Thanks > -Bharat > >> +PPC_STL r7, VCPU_TIMING_LAST_ENTER_TBL(r4) >> +bne 1b >> +PPC_STL r8, VCPU_TIMING_LAST_ENTER_TBU(r4) >> +#endif >> + >> +/* Finish loading guest volatiles and jump to guest. */ >> +PPC_LL r5, VCPU_GPR(r5)(r4) >> +PPC_LL r6, VCPU_GPR(r6)(r4) >> +PPC_LL r7, VCPU_GPR(r7)(r4) >> +PPC_LL r8, VCPU_GPR(r8)(r4) >> +PPC_LL r9, VCPU_GPR(r9)(r4) >> + >> +PPC_LL r3, VCPU_GPR(r3)(r4) >> +PPC_LL r4, VCPU_GPR(r4)(r4) >> +rfi -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 13/38] KVM: PPC: booke: category E.HV (GS-mode) support
From: Scott Wood
Chips such as e500mc that implement category E.HV in Power ISA 2.06
provide hardware virtualization features, including a new MSR mode for
guest state. The guest OS can perform many operations without trapping
into the hypervisor, including transitions to and from guest userspace.
Since we can use SRR1[GS] to reliably tell whether an exception came from
guest state, instead of messing around with IVPR, we use DO_KVM similarly
to book3s.
Current issues include:
- Machine checks from guest state are not routed to the host handler.
- The guest can cause a host oops by executing an emulated instruction
in a page that lacks read permission. Existing e500/4xx support has
the same problem.
Includes work by Ashish Kalra ,
Varun Sethi , and
Liu Yu .
Signed-off-by: Scott Wood
[agraf: remove pt_regs usage]
Signed-off-by: Alexander Graf
---
v1 -> v2:
- ESR -> GESR
---
arch/powerpc/include/asm/dbell.h|1 +
arch/powerpc/include/asm/kvm_asm.h |8 +
arch/powerpc/include/asm/kvm_booke_hv_asm.h | 49 +++
arch/powerpc/include/asm/kvm_host.h | 19 +-
arch/powerpc/include/asm/kvm_ppc.h |3 +
arch/powerpc/include/asm/mmu-book3e.h |6 +
arch/powerpc/include/asm/processor.h|3 +
arch/powerpc/include/asm/reg.h |2 +
arch/powerpc/include/asm/reg_booke.h| 34 ++
arch/powerpc/kernel/asm-offsets.c | 15 +-
arch/powerpc/kernel/head_booke.h| 28 ++-
arch/powerpc/kvm/Kconfig|3 +
arch/powerpc/kvm/booke.c| 309 ---
arch/powerpc/kvm/booke.h| 24 +-
arch/powerpc/kvm/booke_emulate.c| 23 +-
arch/powerpc/kvm/bookehv_interrupts.S | 587 +++
arch/powerpc/kvm/powerpc.c |5 +
arch/powerpc/kvm/timing.h |6 +
18 files changed, 1058 insertions(+), 67 deletions(-)
create mode 100644 arch/powerpc/include/asm/kvm_booke_hv_asm.h
create mode 100644 arch/powerpc/kvm/bookehv_interrupts.S
diff --git a/arch/powerpc/include/asm/dbell.h b/arch/powerpc/include/asm/dbell.h
index efa74ac..d7365b0 100644
--- a/arch/powerpc/include/asm/dbell.h
+++ b/arch/powerpc/include/asm/dbell.h
@@ -19,6 +19,7 @@
#define PPC_DBELL_MSG_BRDCAST (0x0400)
#define PPC_DBELL_TYPE(x) (((x) & 0xf) << (63-36))
+#define PPC_DBELL_LPID(x) ((x) << (63 - 49))
enum ppc_dbell {
PPC_DBELL = 0, /* doorbell */
PPC_DBELL_CRIT = 1, /* critical doorbell */
diff --git a/arch/powerpc/include/asm/kvm_asm.h
b/arch/powerpc/include/asm/kvm_asm.h
index 7b1f0e0..0978152 100644
--- a/arch/powerpc/include/asm/kvm_asm.h
+++ b/arch/powerpc/include/asm/kvm_asm.h
@@ -48,6 +48,14 @@
#define BOOKE_INTERRUPT_SPE_FP_DATA 33
#define BOOKE_INTERRUPT_SPE_FP_ROUND 34
#define BOOKE_INTERRUPT_PERFORMANCE_MONITOR 35
+#define BOOKE_INTERRUPT_DOORBELL 36
+#define BOOKE_INTERRUPT_DOORBELL_CRITICAL 37
+
+/* booke_hv */
+#define BOOKE_INTERRUPT_GUEST_DBELL 38
+#define BOOKE_INTERRUPT_GUEST_DBELL_CRIT 39
+#define BOOKE_INTERRUPT_HV_SYSCALL 40
+#define BOOKE_INTERRUPT_HV_PRIV 41
/* book3s */
diff --git a/arch/powerpc/include/asm/kvm_booke_hv_asm.h
b/arch/powerpc/include/asm/kvm_booke_hv_asm.h
new file mode 100644
index 000..30a600f
--- /dev/null
+++ b/arch/powerpc/include/asm/kvm_booke_hv_asm.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright 2010-2011 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef ASM_KVM_BOOKE_HV_ASM_H
+#define ASM_KVM_BOOKE_HV_ASM_H
+
+#ifdef __ASSEMBLY__
+
+/*
+ * All exceptions from guest state must go through KVM
+ * (except for those which are delivered directly to the guest) --
+ * there are no exceptions for which we fall through directly to
+ * the normal host handler.
+ *
+ * Expected inputs (normal exceptions):
+ * SCRATCH0 = saved r10
+ * r10 = thread struct
+ * r11 = appropriate SRR1 variant (currently used as scratch)
+ * r13 = saved CR
+ * *(r10 + THREAD_NORMSAVE(0)) = saved r11
+ * *(r10 + THREAD_NORMSAVE(2)) = saved r13
+ *
+ * Expected inputs (crit/mcheck/debug exceptions):
+ * appropriate SCRATCH = saved r8
+ * r8 = exception level stack frame
+ * r9 = *(r8 + _CCR) = saved CR
+ * r11 = appropriate SRR1 variant (currently used as scratch)
+ * *(r8 + GPR9) = saved r9
+ * *(r8 + GPR10) = saved r10 (r10 not yet clobbered)
+ * *(r8 + GPR11) = saved r11
+ */
+.macro DO_KVM intno srr1
+#ifdef CONFIG_KVM_BOOKE_HV
+BEGIN_FTR_SECTION
+ mtocrf 0x80, r11 /* check MSR[GS] without clobbering reg */
+ bf 3, kvmppc_resume_\intno\()_\srr1
+ b kvmppc_handler_\intno\()_\srr1
+kvmppc_resume_\intno\()_\srr1:
+END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
+#endif
+.endm
+
+#endif /*__ASSEMB
