Re: [PATCH 2/2] AMD IOMMU support

2010-08-17 Thread Kevin O'Connor
On Sun, Aug 15, 2010 at 10:57:27PM +0300, Eduard - Gabriel Munteanu wrote:
> This initializes the AMD IOMMU and creates ACPI tables for it.
> 
> Signed-off-by: Eduard - Gabriel Munteanu 

There's some questions with how best to create ACPI tables in
SeaBIOS/qemu.  Can you separate the iommu init code from the acpi
tables code?

Thanks,
-Kevin
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[PATCH 2/2] AMD IOMMU support

2010-08-15 Thread Eduard - Gabriel Munteanu
This initializes the AMD IOMMU and creates ACPI tables for it.

Signed-off-by: Eduard - Gabriel Munteanu 
---
 Makefile   |2 +-
 src/acpi.c |   79 
 src/iommu.c|   64 +
 src/iommu.h|   12 
 src/pci.h  |4 +++
 src/pci_ids.h  |1 +
 src/pci_regs.h |1 +
 src/pciinit.c  |   11 
 8 files changed, 173 insertions(+), 1 deletions(-)
 create mode 100644 src/iommu.c
 create mode 100644 src/iommu.h

diff --git a/Makefile b/Makefile
index fe0c1ce..98f253d 100644
--- a/Makefile
+++ b/Makefile
@@ -14,7 +14,7 @@ OUT=out/
 SRCBOTH=misc.c pmm.c stacks.c output.c util.c block.c floppy.c ata.c mouse.c \
 kbd.c pci.c serial.c clock.c pic.c cdrom.c ps2port.c smp.c resume.c \
 pnpbios.c pirtable.c vgahooks.c ramdisk.c pcibios.c blockcmd.c \
-usb.c usb-uhci.c usb-ohci.c usb-ehci.c usb-hid.c usb-msc.c
+usb.c usb-uhci.c usb-ohci.c usb-ehci.c usb-hid.c usb-msc.c iommu.c
 SRC16=$(SRCBOTH) system.c disk.c apm.c font.c
 SRC32FLAT=$(SRCBOTH) post.c shadow.c memmap.c coreboot.c boot.c \
   acpi.c smm.c mptable.c smbios.c pciinit.c optionroms.c mtrr.c \
diff --git a/src/acpi.c b/src/acpi.c
index 0559443..7ea9c55 100644
--- a/src/acpi.c
+++ b/src/acpi.c
@@ -6,6 +6,7 @@
 // This file may be distributed under the terms of the GNU LGPLv3 license.
 
 #include "acpi.h" // struct rsdp_descriptor
+#include "iommu.h"
 #include "util.h" // memcpy
 #include "pci.h" // pci_find_device
 #include "biosvar.h" // GET_EBDA
@@ -268,6 +269,36 @@ struct srat_memory_affinity
 u32reserved3[2];
 } PACKED;
 
+/*
+ * IVRS (I/O Virtualization Reporting Structure) table.
+ *
+ * Describes the AMD IOMMU, as per:
+ * "AMD I/O Virtualization Technology (IOMMU) Specification", rev 1.26
+ */
+
+struct ivrs_ivhd
+{
+u8type;
+u8flags;
+u16   length;
+u16   devid;
+u16   capab_off;
+u32   iommu_base_low;
+u32   iommu_base_high;
+u16   pci_seg_group;
+u16   iommu_info;
+u32   reserved;
+u8entry[0];
+} PACKED;
+
+struct ivrs_table
+{
+ACPI_TABLE_HEADER_DEF/* ACPI common table header. */
+u32iv_info;
+u32reserved[2];
+struct ivrs_ivhd   ivhd;
+} PACKED;
+
 #include "acpi-dsdt.hex"
 
 static inline u16 cpu_to_le16(u16 x)
@@ -599,6 +630,53 @@ build_srat(void)
 return srat;
 }
 
+#define IVRS_SIGNATURE 0x53525649 // IVRS
+#define IVRS_MAX_DEVS  32
+static void *
+build_ivrs(void)
+{
+int iommu_bdf, bdf, max, i;
+struct ivrs_table *ivrs;
+struct ivrs_ivhd *ivhd;
+
+iommu_bdf = pci_find_class(PCI_CLASS_SYSTEM_IOMMU);
+if (iommu_bdf < 0)
+return NULL;
+
+ivrs = malloc_high(sizeof(struct ivrs_table) + 4 * IVRS_MAX_DEVS);
+ivrs->iv_info = iommu_get_misc() & ~0x000F;
+
+ivhd = &ivrs->ivhd;
+ivhd->type  = 0x10;
+ivhd->flags = 0;
+ivhd->length= sizeof(struct ivrs_ivhd);
+ivhd->devid = iommu_get_bdf();
+ivhd->capab_off = iommu_get_cap_offset();
+ivhd->iommu_base_low= iommu_get_base();
+ivhd->iommu_base_high   = 0;
+ivhd->pci_seg_group = 0;
+ivhd->iommu_info= 0;
+ivhd->reserved  = 0;
+
+i = 0;
+foreachpci(bdf, max) {
+if (bdf == ivhd->devid)
+continue;
+ivhd->entry[4 * i + 0] = 2;
+ivhd->entry[4 * i + 1] = bdf & 0xFF;
+ivhd->entry[4 * i + 2] = (bdf >> 8) & 0xFF;
+ivhd->entry[4 * i + 3] = ~(1 << 3);
+ivhd->length += 4;
+if (++i >= IVRS_MAX_DEVS)
+break;
+}
+
+build_header((void *) ivrs, IVRS_SIGNATURE,
+ sizeof(struct ivrs_table) + 4 * i, 1);
+
+return ivrs;
+}
+
 struct rsdp_descriptor *RsdpAddr;
 
 #define MAX_ACPI_TABLES 20
@@ -639,6 +717,7 @@ acpi_bios_init(void)
 ACPI_INIT_TABLE(build_madt());
 ACPI_INIT_TABLE(build_hpet());
 ACPI_INIT_TABLE(build_srat());
+ACPI_INIT_TABLE(build_ivrs());
 
 u16 i, external_tables = qemu_cfg_acpi_additional_tables();
 
diff --git a/src/iommu.c b/src/iommu.c
new file mode 100644
index 000..97af24a
--- /dev/null
+++ b/src/iommu.c
@@ -0,0 +1,64 @@
+// AMD IOMMU initialization code.
+//
+// Copyright (C) 2010  Eduard - Gabriel Munteanu 
+//
+// This file may be distributed under the terms of the GNU LGPLv3 license.
+
+#include "iommu.h"
+#include "pci.h"
+#include "types.h"
+
+#define IOMMU_CAP_BAR_LOW   0x04
+#define IOMMU_CAP_BAR_HIGH  0x08
+#define IOMMU_CAP_RANGE 0x0C
+#define IOMMU_CAP_MISC  0x10
+
+static int iommu_bdf = -1;
+static u8 iommu_cap_offset;
+static u32 iommu_base;
+
+void iommu_init(int bdf, u32 base)
+{
+u8 ptr, cap, type;
+
+/* Only one IOMMU is supported. */
+if (iommu_bdf >= 0)
+return;
+
+foreachcap(bdf, ptr, cap) {
+type = pci_config_readb(bdf, cap);
+if (type == PCI_CAP_I