This is the yet unmerged part of the previous round. Changes since v1: - rebase over next - switched APIC_BASE reserved bits check to guest's number of physical bits - addressed small review comment on "Rework interception of IRQs and NMIs" - added fix for improper EXCEPTION_NMI vmexit injection with valid IDT vectoring info
Paolo, did you already look into nested event handling for SVM? I assume you will want to (re-)base it on top of this. Jan Jan Kiszka (4): KVM: x86: Validate guest writes to MSR_IA32_APICBASE KVM: nVMX: Rework interception of IRQs and NMIs KVM: nVMX: Fully emulate preemption timer KVM: nVMX: Do not inject NMI vmexits when L2 has a pending interrupt arch/x86/include/asm/kvm_host.h | 2 + arch/x86/kvm/cpuid.h | 16 +++ arch/x86/kvm/lapic.h | 2 +- arch/x86/kvm/vmx.c | 228 ++++++++++++++++++++++++---------------- arch/x86/kvm/x86.c | 47 +++++++-- 5 files changed, 197 insertions(+), 98 deletions(-) -- 1.8.1.1.298.ge7eed54 -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
