Re: [PATCH v2 3/5] KVM: nVMX: emulate the INVVPID instruction
On 08/10/2015 07:57, Wanpeng Li wrote:
> Add the INVVPID instruction emulation.
>
> Reviewed-by: Wincy Van
> Signed-off-by: Wanpeng Li
> ---
> arch/x86/include/asm/vmx.h | 3 +++
> arch/x86/kvm/vmx.c | 49
> +-
> 2 files changed, 51 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
> index 448b7ca..af5fdaf 100644
> --- a/arch/x86/include/asm/vmx.h
> +++ b/arch/x86/include/asm/vmx.h
> @@ -397,8 +397,10 @@ enum vmcs_field {
> #define IDENTITY_PAGETABLE_PRIVATE_MEMSLOT (KVM_USER_MEM_SLOTS + 2)
>
> #define VMX_NR_VPIDS (1 << 16)
> +#define VMX_VPID_EXTENT_INDIVIDUAL_ADDR 0
> #define VMX_VPID_EXTENT_SINGLE_CONTEXT 1
> #define VMX_VPID_EXTENT_ALL_CONTEXT 2
> +#define VMX_VPID_EXTENT_SHIFT40
This is not used.
Comparing handle_invept with handle_invvpid, some differences are
apparent:
> static int handle_invvpid(struct kvm_vcpu *vcpu)
> {
> - kvm_queue_exception(vcpu, UD_VECTOR);
> + struct vcpu_vmx *vmx = to_vmx(vcpu);
> + u32 vmx_instruction_info;
> + unsigned long type;
> + gva_t gva;
> + struct x86_exception e;
> + int vpid;
> +
> + if (!(vmx->nested.nested_vmx_secondary_ctls_high &
> + SECONDARY_EXEC_ENABLE_VPID)) {
This lacks a check against VMX_VPID_INVVPID_BIT.
> + kvm_queue_exception(vcpu, UD_VECTOR);
> + return 1;
> + }
> +
> + if (!nested_vmx_check_permission(vcpu))
> + return 1;
> +
> + vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
> + type = kvm_register_readl(vcpu, (vmx_instruction_info >> 28) & 0xf);
This is missing the equivalent of this invept code:
types = (vmx->nested.nested_vmx_ept_caps >> VMX_EPT_EXTENT_SHIFT) & 6;
if (!(types & (1UL << type))) {
nested_vmx_failValid(vcpu,
VMXERR_INVALID_OPERAND_TO_INVEPT_INVVPID);
return 1;
}
> + /* according to the intel vmx instruction reference, the memory
> + * operand is read even if it isn't needed (e.g., for type==global)
> + */
> + if (get_vmx_mem_address(vcpu, vmcs_readl(EXIT_QUALIFICATION),
> + vmx_instruction_info, false, &gva))
> + return 1;
> + if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva, &vpid,
> + sizeof(u32), &e)) {
> + kvm_inject_page_fault(vcpu, &e);
> + return 1;
> + }
> +
> + switch (type) {
> + case VMX_VPID_EXTENT_ALL_CONTEXT:
> + if (get_vmcs12(vcpu)->virtual_processor_id == 0) {
> + nested_vmx_failValid(vcpu,
> + VMXERR_INVALID_OPERAND_TO_INVEPT_INVVPID);
> + return 1;
> + }
> + vmx_flush_tlb(vcpu);
> + nested_vmx_succeed(vcpu);
> + break;
> + default:
> + /* Trap single context invalidation invvpid calls */
> + BUG_ON(1);
... which means that this BUG_ON(1) is guest triggerable.
Unit tests would have caught this... :)
Paolo
> + break;
> + }
> +
> + skip_emulated_instruction(vcpu);
> return 1;
> }
>
>
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[PATCH v2 3/5] KVM: nVMX: emulate the INVVPID instruction
Add the INVVPID instruction emulation.
Reviewed-by: Wincy Van
Signed-off-by: Wanpeng Li
---
arch/x86/include/asm/vmx.h | 3 +++
arch/x86/kvm/vmx.c | 49 +-
2 files changed, 51 insertions(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index 448b7ca..af5fdaf 100644
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
@@ -397,8 +397,10 @@ enum vmcs_field {
#define IDENTITY_PAGETABLE_PRIVATE_MEMSLOT (KVM_USER_MEM_SLOTS + 2)
#define VMX_NR_VPIDS (1 << 16)
+#define VMX_VPID_EXTENT_INDIVIDUAL_ADDR0
#define VMX_VPID_EXTENT_SINGLE_CONTEXT 1
#define VMX_VPID_EXTENT_ALL_CONTEXT2
+#define VMX_VPID_EXTENT_SHIFT 40
#define VMX_EPT_EXTENT_INDIVIDUAL_ADDR 0
#define VMX_EPT_EXTENT_CONTEXT 1
@@ -416,6 +418,7 @@ enum vmcs_field {
#define VMX_EPT_EXTENT_CONTEXT_BIT (1ull << 25)
#define VMX_EPT_EXTENT_GLOBAL_BIT (1ull << 26)
+#define VMX_VPID_INVVPID_BIT(1ull << 0) /* (32 - 32) */
#define VMX_VPID_EXTENT_SINGLE_CONTEXT_BIT (1ull << 9) /* (41 - 32) */
#define VMX_VPID_EXTENT_GLOBAL_CONTEXT_BIT (1ull << 10) /* (42 - 32) */
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 215db2b..87d042a 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -7196,7 +7196,54 @@ static int handle_invept(struct kvm_vcpu *vcpu)
static int handle_invvpid(struct kvm_vcpu *vcpu)
{
- kvm_queue_exception(vcpu, UD_VECTOR);
+ struct vcpu_vmx *vmx = to_vmx(vcpu);
+ u32 vmx_instruction_info;
+ unsigned long type;
+ gva_t gva;
+ struct x86_exception e;
+ int vpid;
+
+ if (!(vmx->nested.nested_vmx_secondary_ctls_high &
+ SECONDARY_EXEC_ENABLE_VPID)) {
+ kvm_queue_exception(vcpu, UD_VECTOR);
+ return 1;
+ }
+
+ if (!nested_vmx_check_permission(vcpu))
+ return 1;
+
+ vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
+ type = kvm_register_readl(vcpu, (vmx_instruction_info >> 28) & 0xf);
+
+ /* according to the intel vmx instruction reference, the memory
+* operand is read even if it isn't needed (e.g., for type==global)
+*/
+ if (get_vmx_mem_address(vcpu, vmcs_readl(EXIT_QUALIFICATION),
+ vmx_instruction_info, false, &gva))
+ return 1;
+ if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva, &vpid,
+ sizeof(u32), &e)) {
+ kvm_inject_page_fault(vcpu, &e);
+ return 1;
+ }
+
+ switch (type) {
+ case VMX_VPID_EXTENT_ALL_CONTEXT:
+ if (get_vmcs12(vcpu)->virtual_processor_id == 0) {
+ nested_vmx_failValid(vcpu,
+ VMXERR_INVALID_OPERAND_TO_INVEPT_INVVPID);
+ return 1;
+ }
+ vmx_flush_tlb(vcpu);
+ nested_vmx_succeed(vcpu);
+ break;
+ default:
+ /* Trap single context invalidation invvpid calls */
+ BUG_ON(1);
+ break;
+ }
+
+ skip_emulated_instruction(vcpu);
return 1;
}
--
1.9.1
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