[Patch 2/5] x86_emulator: add Src2 decode set

2008-12-04 Thread Guillaume Thouvenin
Instruction like shld has three operands, so we need to add a Src2
decode set. We start with Src2None, Src2CL, and Src2ImmByte, Src2One to
support shld/shrd and we will expand it later.

Signed-off-by: Guillaume Thouvenin <[EMAIL PROTECTED]>
---
 arch/x86/include/asm/kvm_x86_emulate.h |1 +
 arch/x86/kvm/x86_emulate.c |   29 +
 2 files changed, 30 insertions(+), 0 deletions(-)

diff --git a/arch/x86/include/asm/kvm_x86_emulate.h 
b/arch/x86/include/asm/kvm_x86_emulate.h
index 16a0026..6a15973 100644
--- a/arch/x86/include/asm/kvm_x86_emulate.h
+++ b/arch/x86/include/asm/kvm_x86_emulate.h
@@ -123,6 +123,7 @@ struct decode_cache {
u8 ad_bytes;
u8 rex_prefix;
struct operand src;
+   struct operand src2;
struct operand dst;
bool has_seg_override;
u8 seg_override;
diff --git a/arch/x86/kvm/x86_emulate.c b/arch/x86/kvm/x86_emulate.c
index 7a07ca4..7f5cd62 100644
--- a/arch/x86/kvm/x86_emulate.c
+++ b/arch/x86/kvm/x86_emulate.c
@@ -70,6 +70,12 @@
 #define Group   (1<<14) /* Bits 3:5 of modrm byte extend opcode */
 #define GroupDual   (1<<15) /* Alternate decoding of mod == 3 */
 #define GroupMask   0xff/* Group number stored in bits 0:7 */
+/* Source 2 operand type */
+#define Src2None(0<<29)
+#define Src2CL  (1<<29)
+#define Src2ImmByte (2<<29)
+#define Src2One (3<<29)
+#define Src2Mask(7<<29)
 
 enum {
Group1_80, Group1_81, Group1_82, Group1_83,
@@ -1000,6 +1006,29 @@ done_prefixes:
break;
}
 
+   /*
+* Decode and fetch the second source operand: register, memory
+* or immediate.
+*/
+   switch (c->d & Src2Mask) {
+   case Src2None:
+   break;
+   case Src2CL:
+   c->src2.bytes = 1;
+   c->src2.val = c->regs[VCPU_REGS_RCX] & 0x8;
+   break;
+   case Src2ImmByte:
+   c->src2.type = OP_IMM;
+   c->src2.ptr = (unsigned long *)c->eip;
+   c->src2.bytes = 1;
+   c->src2.val = insn_fetch(u8, 1, c->eip);
+   break;
+   case Src2One:
+   c->src2.bytes = 1;
+   c->src2.val = 1;
+   break;
+   }
+
/* Decode and fetch the destination operand: register or memory. */
switch (c->d & DstMask) {
case ImplicitOps:
-- 
1.6.0.4.623.g171d7

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[Patch 2/5] x86_emulator: add Src2 decode set

2008-11-03 Thread Guillaume Thouvenin
Instruction like shld has three operands, so we need to add a Src2
decode set. We start with Src2None, Src2CL, and Src2ImmByte, Src2One
to support shld/shrd and we will expand it later.

Signed-off-by: Guillaume Thouvenin <[EMAIL PROTECTED]>
---
 arch/x86/include/asm/kvm_x86_emulate.h |1 +
 arch/x86/kvm/x86_emulate.c |   29 +
 2 files changed, 30 insertions(+), 0 deletions(-)

diff --git a/arch/x86/include/asm/kvm_x86_emulate.h 
b/arch/x86/include/asm/kvm_x86_emulate.h
index 16a0026..6a15973 100644
--- a/arch/x86/include/asm/kvm_x86_emulate.h
+++ b/arch/x86/include/asm/kvm_x86_emulate.h
@@ -123,6 +123,7 @@ struct decode_cache {
u8 ad_bytes;
u8 rex_prefix;
struct operand src;
+   struct operand src2;
struct operand dst;
bool has_seg_override;
u8 seg_override;
diff --git a/arch/x86/kvm/x86_emulate.c b/arch/x86/kvm/x86_emulate.c
index f0c7620..4e8ef29 100644
--- a/arch/x86/kvm/x86_emulate.c
+++ b/arch/x86/kvm/x86_emulate.c
@@ -70,6 +70,12 @@
 #define Group   (1<<14) /* Bits 3:5 of modrm byte extend opcode */
 #define GroupDual   (1<<15) /* Alternate decoding of mod == 3 */
 #define GroupMask   0xff/* Group number stored in bits 0:7 */
+/* Source 2 operand type */
+#define Src2None(0<<29)
+#define Src2CL  (1<<29)
+#define Src2ImmByte (2<<29)
+#define Src2One (3<<29)
+#define Src2Mask(7<<29)
 
 enum {
Group1_80, Group1_81, Group1_82, Group1_83,
@@ -1043,6 +1049,29 @@ done_prefixes:
break;
}
 
+   /*
+* Decode and fetch the second source operand: register, memory
+* or immediate.
+*/
+   switch (c->d & Src2Mask) {
+   case Src2None:
+   break;
+   case Src2CL:
+   c->src2.bytes = 1;
+   c->src2.val = c->regs[VCPU_REGS_RCX] & 0x8;
+   break;
+   case Src2ImmByte:
+   c->src2.type = OP_IMM;
+   c->src2.ptr = (unsigned long *)c->eip;
+   c->src2.bytes = 1;
+   c->src2.val = insn_fetch(u8, 1, c->eip);
+   break;
+   case Src2One:
+   c->src2.bytes = 1;
+   c->src2.val = 1;
+   break;
+   }
+
/* Decode and fetch the destination operand: register or memory. */
switch (c->d & DstMask) {
case ImplicitOps:
-- 
1.6.0.3.514.g2f91b

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