Re: [Qemu-devel] Re: [RFC PATCH] AMD IOMMU emulation
On Mon, May 24, 2010 at 08:10:16PM +, Blue Swirl wrote: On Mon, May 24, 2010 at 3:40 PM, Joerg Roedel j...@8bytes.org wrote: + +#define MMIO_SIZE 0x2028 This size should be a power-of-two value. In this case probably 0x4000. Not really, the devices can reserve regions of any size. There were some implementation deficiencies in earlier versions of QEMU, where the whole page would be reserved anyway, but this limitation has been removed long time ago. The drivers for AMD IOMMU expect that to be 0x4000. At least the Linux driver maps the MMIO region with this size. So the emulation should reserve this amount of MMIO space too. Joerg -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [Qemu-devel] Re: [RFC PATCH] AMD IOMMU emulation
On Tue, May 25, 2010 at 10:39:22AM +0200, Joerg Roedel wrote: On Mon, May 24, 2010 at 08:10:16PM +, Blue Swirl wrote: On Mon, May 24, 2010 at 3:40 PM, Joerg Roedel j...@8bytes.org wrote: + +#define MMIO_SIZE ? ? ? ? ? ? ? 0x2028 This size should be a power-of-two value. In this case probably 0x4000. Not really, the devices can reserve regions of any size. There were some implementation deficiencies in earlier versions of QEMU, where the whole page would be reserved anyway, but this limitation has been removed long time ago. The drivers for AMD IOMMU expect that to be 0x4000. At least the Linux driver maps the MMIO region with this size. So the emulation should reserve this amount of MMIO space too. Joerg Yeah, I'll change that, since I already reserve 0x4000 bytes in SeaBIOS for it (I did that to deal with the 16 KiB alignment requirement). Eduard -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [Qemu-devel] Re: [RFC PATCH] AMD IOMMU emulation
On Tue, May 25, 2010 at 8:39 AM, Joerg Roedel j...@8bytes.org wrote: On Mon, May 24, 2010 at 08:10:16PM +, Blue Swirl wrote: On Mon, May 24, 2010 at 3:40 PM, Joerg Roedel j...@8bytes.org wrote: + +#define MMIO_SIZE 0x2028 This size should be a power-of-two value. In this case probably 0x4000. Not really, the devices can reserve regions of any size. There were some implementation deficiencies in earlier versions of QEMU, where the whole page would be reserved anyway, but this limitation has been removed long time ago. The drivers for AMD IOMMU expect that to be 0x4000. At least the Linux driver maps the MMIO region with this size. So the emulation should reserve this amount of MMIO space too. Well, Linux drivers may take a conservative approach so I'd check what's the value in the device specs. In practice, on x86 hardware the size doesn't matter too much, for example on Sparc an access beyond the end of the device region would trap. -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH] AMD IOMMU emulation
Hi Eduard, On Thu, May 20, 2010 at 04:50:07PM +0300, Eduard - Gabriel Munteanu wrote: + --enable-amd-iommu-emul) amd_iommu=yes + ;; A compile-time option is a good idea. +/* MMIO registers */ +#define MMIO_DEVICE_TABLE 0x +#define MMIO_COMMAND_BASE 0x0008 +#define MMIO_EVENT_BASE 0x0010 +#define MMIO_CONTROL0x0018 +#define MMIO_EXCL_BASE 0x0020 +#define MMIO_EXCL_LIMIT 0x0028 +#define MMIO_COMMAND_HEAD 0x2000 +#define MMIO_COMMAND_TAIL 0x2008 +#define MMIO_EVENT_HEAD 0x2010 +#define MMIO_EVENT_TAIL 0x2018 +#define MMIO_STATUS 0x2020 + +#define MMIO_SIZE 0x2028 This size should be a power-of-two value. In this case probably 0x4000. +#define MMIO_DEVTAB_SIZE_MASK ((1UL 12) - 1) +#define MMIO_DEVTAB_BASE_MASK (((1UL 52) - 1) ~MMIO_DEVTAB_SIZE_MASK) You must use ULL to be 32bit safe. This is also true for the defines below. [...] Otherwise the code looks good so far. Seems like the next step should be some work on a qemu dma-layer where you can hook the translation into. Joerg -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [Qemu-devel] Re: [RFC PATCH] AMD IOMMU emulation
On Mon, May 24, 2010 at 3:40 PM, Joerg Roedel j...@8bytes.org wrote: Hi Eduard, On Thu, May 20, 2010 at 04:50:07PM +0300, Eduard - Gabriel Munteanu wrote: + --enable-amd-iommu-emul) amd_iommu=yes + ;; A compile-time option is a good idea. +/* MMIO registers */ +#define MMIO_DEVICE_TABLE 0x +#define MMIO_COMMAND_BASE 0x0008 +#define MMIO_EVENT_BASE 0x0010 +#define MMIO_CONTROL 0x0018 +#define MMIO_EXCL_BASE 0x0020 +#define MMIO_EXCL_LIMIT 0x0028 +#define MMIO_COMMAND_HEAD 0x2000 +#define MMIO_COMMAND_TAIL 0x2008 +#define MMIO_EVENT_HEAD 0x2010 +#define MMIO_EVENT_TAIL 0x2018 +#define MMIO_STATUS 0x2020 + +#define MMIO_SIZE 0x2028 This size should be a power-of-two value. In this case probably 0x4000. Not really, the devices can reserve regions of any size. There were some implementation deficiencies in earlier versions of QEMU, where the whole page would be reserved anyway, but this limitation has been removed long time ago. +#define MMIO_DEVTAB_SIZE_MASK ((1UL 12) - 1) +#define MMIO_DEVTAB_BASE_MASK (((1UL 52) - 1) ~MMIO_DEVTAB_SIZE_MASK) You must use ULL to be 32bit safe. This is also true for the defines below. [...] Otherwise the code looks good so far. Seems like the next step should be some work on a qemu dma-layer where you can hook the translation into. Joerg -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH] AMD IOMMU emulation
This is preliminary work for AMD IOMMU emulation support. Signed-off-by: Eduard - Gabriel Munteanu eduard.munte...@linux360.ro --- Makefile.target |2 + configure |9 + hw/amd_iommu.c | 442 +++ hw/pc.c |2 + hw/pc.h |3 + hw/pci_ids.h|2 + hw/pci_regs.h |1 + 7 files changed, 461 insertions(+), 0 deletions(-) create mode 100644 hw/amd_iommu.c diff --git a/Makefile.target b/Makefile.target index 0bdb184..13f8086 100644 --- a/Makefile.target +++ b/Makefile.target @@ -217,6 +217,8 @@ obj-i386-y += testdev.o obj-i386-$(CONFIG_KVM_PIT) += i8254-kvm.o obj-i386-$(CONFIG_KVM_DEVICE_ASSIGNMENT) += device-assignment.o +obj-i386-$(CONFIG_AMD_IOMMU) += amd_iommu.o + # Hardware support obj-ia64-y += ide.o pckbd.o vga.o $(SOUND_HW) dma.o $(AUDIODRV) obj-ia64-y += fdc.o mc146818rtc.o serial.o i8259.o ipf.o diff --git a/configure b/configure index ed8e17b..34e5194 100755 --- a/configure +++ b/configure @@ -305,6 +305,7 @@ mixemu=no kvm_trace=no kvm_cap_pit= kvm_cap_device_assignment= +amd_iommu=no kerneldir= aix=no blobs=yes @@ -603,6 +604,8 @@ for opt do ;; --enable-kvm-device-assignment) kvm_cap_device_assignment=yes ;; + --enable-amd-iommu-emul) amd_iommu=yes + ;; --enable-profiler) profiler=yes ;; --enable-cocoa) @@ -829,6 +832,8 @@ echo --disable-kvm-pitdisable KVM pit support echo --enable-kvm-pit enable KVM pit support echo --disable-kvm-device-assignment disable KVM device assignment support echo --enable-kvm-device-assignment enable KVM device assignment support +echo --disable-amd-iommu-emul disable AMD IOMMU emulation +echo --enable-amd-iommu-emul enable AMD IOMMU emulation echo --disable-nptl disable usermode NPTL support echo --enable-nptlenable usermode NPTL support echo --enable-system enable all system emulation targets @@ -2185,6 +2190,7 @@ echo KVM support $kvm echo KVM PIT support $kvm_cap_pit echo KVM device assig. $kvm_cap_device_assignment echo KVM trace support $kvm_trace +echo AMD IOMMU emul. $amd_iommu echo fdt support $fdt echo preadv support$preadv echo fdatasync $fdatasync @@ -2599,6 +2605,9 @@ case $target_arch2 in x86_64) TARGET_BASE_ARCH=i386 target_phys_bits=64 +if test $amd_iommu = yes; then + echo CONFIG_AMD_IOMMU=y $config_target_mak +fi ;; ia64) target_phys_bits=64 diff --git a/hw/amd_iommu.c b/hw/amd_iommu.c new file mode 100644 index 000..cde90d0 --- /dev/null +++ b/hw/amd_iommu.c @@ -0,0 +1,442 @@ +/* + * AMD IOMMU emulation + * + * Copyright (c) 2010 Eduard - Gabriel Munteanu + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the Software), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include pc.h +#include hw.h +#include pci.h + +/* Capability registers */ +#define CAPAB_HEADER0x00 +#define CAPAB_REV_TYPE0x02 +#define CAPAB_FLAGS 0x03 +#define CAPAB_BAR_LOW 0x04 +#define CAPAB_BAR_HIGH 0x08 +#define CAPAB_RANGE 0x0C +#define CAPAB_MISC 0x10 + +#define CAPAB_SIZE 0x14 + +/* Capability header data */ +#define CAPAB_FLAG_IOTLBSUP (1 0) +#define CAPAB_FLAG_HTTUNNEL (1 1) +#define CAPAB_FLAG_NPCACHE (1 2) +#define CAPAB_INIT_REV (1 3) +#define CAPAB_INIT_TYPE 3 +#define CAPAB_INIT_REV_TYPE (CAPAB_REV | CAPAB_TYPE) +#define CAPAB_INIT_FLAGS(CAPAB_FLAG_NPCACHE | CAPAB_FLAG_HTTUNNEL) +#define CAPAB_INIT_MISC (64 15) | (48 8) +#define CAPAB_BAR_MASK ~((1UL 14) - 1) + +/* MMIO registers */ +#define MMIO_DEVICE_TABLE 0x +#define MMIO_COMMAND_BASE 0x0008 +#define MMIO_EVENT_BASE 0x0010 +#define MMIO_CONTROL0x0018 +#define MMIO_EXCL_BASE 0x0020 +#define MMIO_EXCL_LIMIT 0x0028 +#define MMIO_COMMAND_HEAD 0x2000 +#define
