Re: KVM: How does is PAT emulation supposed to work?

2015-04-17 Thread Jan Kiszka
On 2015-04-17 18:43, Radim Krčmář wrote:
 2015-04-13 07:16+0200, Jan Kiszka:
 PS: If someone has a good idea for a simple test case on machines
 without IOMMU (like my current boxes), thus without a chance to use
 device pass-through to stress guest PAT settings, I would be all ears.
 
 Not a good one:  KVM sets VMX_EPT_IPAT_BIT for RAM unless
 kvm_arch_has_noncoherent_dma().  You can comment the line in
 vmx_get_mt_mask(), or call kvm_arch_register_noncoherent_dma(),
 for guest PAT to work on normal memory.

That's for VMX (where I do have IOMMUs), but I would need something for
AMD. :)

Jan

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Re: KVM: How does is PAT emulation supposed to work?

2015-04-17 Thread Radim Krčmář
2015-04-13 07:16+0200, Jan Kiszka:
 Hi all,
 
 while digging into the PAT topic for Jailhouse, I also wondered how KVM
 deals with it. And I'm still not getting it complete - or there is a bug:
 
 KVM intercepts all guest writes to the PAT MSR and instead keeps the
 guest value in vcpu-arch.pat. But, besides returning that value back on
 read accesses, arch.pat has no other purpose.
 
 On Intel, we only seem to have proper emulation - through hardware -
 when VMX supports PAT switching (see vmx_set_msr). On AMD, the situation
 is even worse as the g_pat save field is not updated at all on PAT
 writes. That seems to be a low hanging fruit to bring svm on the same
 support level as vmx.
 
 Or am I missing something?

I don't think so, it looks buggy ... we could switch PAT manually, if it
isn't accelerated by hardware.

 PS: If someone has a good idea for a simple test case on machines
 without IOMMU (like my current boxes), thus without a chance to use
 device pass-through to stress guest PAT settings, I would be all ears.

Not a good one:  KVM sets VMX_EPT_IPAT_BIT for RAM unless
kvm_arch_has_noncoherent_dma().  You can comment the line in
vmx_get_mt_mask(), or call kvm_arch_register_noncoherent_dma(),
for guest PAT to work on normal memory.
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Re: KVM: How does is PAT emulation supposed to work?

2015-04-17 Thread Radim Krčmář
2015-04-17 19:12+0200, Jan Kiszka:
 On 2015-04-17 18:43, Radim Krčmář wrote:
  2015-04-13 07:16+0200, Jan Kiszka:
  PS: If someone has a good idea for a simple test case on machines
  without IOMMU (like my current boxes), thus without a chance to use
  device pass-through to stress guest PAT settings, I would be all ears.
  
  Not a good one:  KVM sets VMX_EPT_IPAT_BIT for RAM unless
  kvm_arch_has_noncoherent_dma().  You can comment the line in
  vmx_get_mt_mask(), or call kvm_arch_register_noncoherent_dma(),
  for guest PAT to work on normal memory.
 
 That's for VMX (where I do have IOMMUs), but I would need something for
 AMD. :)

Ah, your patch should be sufficient on AMD ...
(At least the documentation doesn't list other NPT switches.)

The simple test case is 'wrmsr(0x277, 0x0707070707070707)' and RAM
accesses in a bounded loop -- they aren't significantly slower?
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KVM: How does is PAT emulation supposed to work?

2015-04-12 Thread Jan Kiszka
Hi all,

while digging into the PAT topic for Jailhouse, I also wondered how KVM
deals with it. And I'm still not getting it complete - or there is a bug:

KVM intercepts all guest writes to the PAT MSR and instead keeps the
guest value in vcpu-arch.pat. But, besides returning that value back on
read accesses, arch.pat has no other purpose.

On Intel, we only seem to have proper emulation - through hardware -
when VMX supports PAT switching (see vmx_set_msr). On AMD, the situation
is even worse as the g_pat save field is not updated at all on PAT
writes. That seems to be a low hanging fruit to bring svm on the same
support level as vmx.

Or am I missing something?

Jan

PS: If someone has a good idea for a simple test case on machines
without IOMMU (like my current boxes), thus without a chance to use
device pass-through to stress guest PAT settings, I would be all ears.

-- 
Siemens AG, Corporate Technology, CT RTC ITP SES-DE
Corporate Competence Center Embedded Linux
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