Re: [PATCH 04/13] iommu coherency

2008-12-04 Thread Mark McLoughlin
On Tue, 2008-12-02 at 22:22 +0800, Han, Weidong wrote:

> in dmar_domain, more than one iommus may be included in iommu_bmp. Due
> to "Coherency" capability may be different across iommus, set this
> variable to indicate iommu access is coherent or not. Only when all
> related iommus in a dmar_domain are all coherent, iommu access of this
> domain is coherent.
> 
> Signed-off-by: Weidong Han <[EMAIL PROTECTED]>
> ---
>  drivers/pci/intel-iommu.c |6 ++
>  include/linux/dma_remapping.h |2 ++
>  2 files changed, 8 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
> index a18e0b4..fa1507b 100644
> --- a/drivers/pci/intel-iommu.c
> +++ b/drivers/pci/intel-iommu.c
> @@ -982,6 +982,12 @@ static struct dmar_domain * iommu_alloc_domain(struct 
> intel_iommu *iommu)
>   domain->id = num;
>   memset(&domain->iommu_bmp, 0, sizeof(unsigned long));
>   set_bit(iommu->seq_id, &domain->iommu_bmp);
> +
> + if (ecap_coherent(iommu->ecap))
> + domain->iommu_coherency = 1;
> + else
> + domain->iommu_coherency = 0;

If you allocate a non-coherent iommu, followed by a coherent iommu, then
iommu_coherency ends up as 1

In patch 6/13 you add domain_update_iommu_coherency(). It would make
more sense to add that function in this patch and use it here.

Cheers,
Mark.

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RE: [PATCH 04/13] iommu coherency

2008-12-04 Thread Han, Weidong
Mark McLoughlin wrote:
> On Tue, 2008-12-02 at 22:22 +0800, Han, Weidong wrote:
> 
>> in dmar_domain, more than one iommus may be included in iommu_bmp.
>> Due 
>> to "Coherency" capability may be different across iommus, set this
>> variable to indicate iommu access is coherent or not. Only when all
>> related iommus in a dmar_domain are all coherent, iommu access of
>> this 
>> domain is coherent.
>> 
>> Signed-off-by: Weidong Han <[EMAIL PROTECTED]>
>> ---
>>  drivers/pci/intel-iommu.c |6 ++
>>  include/linux/dma_remapping.h |2 ++
>>  2 files changed, 8 insertions(+), 0 deletions(-)
>> 
>> diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
>> index a18e0b4..fa1507b 100644
>> --- a/drivers/pci/intel-iommu.c
>> +++ b/drivers/pci/intel-iommu.c
>> @@ -982,6 +982,12 @@ static struct dmar_domain *
>>  iommu_alloc_domain(struct intel_iommu *iommu)   domain->id = num;
>>  memset(&domain->iommu_bmp, 0, sizeof(unsigned long));
>> set_bit(iommu->seq_id, &domain->iommu_bmp); +
>> +if (ecap_coherent(iommu->ecap))
>> +domain->iommu_coherency = 1;
>> +else
>> +domain->iommu_coherency = 0;
> 
> If you allocate a non-coherent iommu, followed by a coherent iommu,
> then iommu_coherency ends up as 1
> 
> In patch 6/13 you add domain_update_iommu_coherency(). It would make
> more sense to add that function in this patch and use it here.

there is also an assumption that iommu_alloc_domain() is only used by "native 
VT-d", so the domain is related to only one iommu. I will add ASSERT() here.

Regards,
Weidong

> 
> Cheers,
> Mark.

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