Sorry, let me figure this out and resend.
Thanks,
Will
> -Original Message-
> From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On
> Behalf Of Andreas Färber
> Sent: Monday, November 26, 2012 5:51 PM
> To: Auld, Will
> Cc: Will Auld; qemu-devel; Gleb; mtosa...@redhat.com;
> kvm@vger.kernel.org; Dugger, Donald D; Liu, Jinsong; Zhang, Xiantao;
> a...@redhat.com
> Subject: Re: [Qemu-devel] [PATCH V3] target-i386: Enabling
> IA32_TSC_ADJUST for QEMU KVM guest VMs
>
> Am 27.11.2012 02:40, schrieb Will Auld:
> > CPUID.7.0.EBX[1]=1 indicates IA32_TSC_ADJUST MSR 0x3b is supported
> >
> > Basic design is to emulate the MSR by allowing reads and writes to
> the
> > hypervisor vcpu specific locations to store the value of the emulated
> MSRs.
> > In this way the IA32_TSC_ADJUST value will be included in all reads
> to
> > the TSC MSR whether through rdmsr or rdtsc.
> >
> > As this is a new MSR that the guest may access and modify its value
> > needs to be migrated along with the other MRSs. The changes here are
> > specifically for recognizing when IA32_TSC_ADJUST is enabled in CPUID
> > and code added for migrating its value.
> >
> > Signed-off-by: Will Auld
>
> Something went wrong here, none of the V2 review comments are
> addressed.
> Maybe you sent the wrong patch file?
>
> Cheers,
> Andreas
>
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