Re: [SeaBIOS] [PATCH v2] add acpi pmtimer support

2012-09-05 Thread Don Slutz

On 09/05/12 01:27, Gerd Hoffmann wrote:

On 09/02/12 22:42, Kevin O'Connor wrote:

On Tue, Aug 14, 2012 at 07:29:19AM +0200, Gerd Hoffmann wrote:

This patch makes seabios use the acpi pmtimer instead of tsc for
timekeeping.  The pmtimer has a fixed frequency and doesn't need
calibration, thus it doesn't suffer from calibration errors due to a
loaded host machine.

The patch looks okay to me, but is it still needed?  (I recall seeing
something on the kvm list about a bug fix to the main timer.)

It is still a good idea to make timing in a virtual machine more robust.


+u32 pmtimer = inl(ioport);
+return (u64)wraps  24 | pmtimer;

BTW, why is this  24, and if it should be that way, shouldn't the
pmtimer be inl(ioport)  0xff ?

The pmtimer is defined to be 24 bits wide, so the shift is correct.
This is not true in general.  It can be either 24 or 32 bits.  What it 
is depends on ACPI data (acpi_gbl_FADT-tmr_val_ext).  However it is 
valid to only used 24 bits.


*/
/*


But, yes, the ioport read should better be masked to be on the safe
side.  v3 will go out in a minute.

cheers,
   Gerd

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Re: [SeaBIOS] [PATCH v2] add acpi pmtimer support

2012-09-05 Thread Gerd Hoffmann
  Hi,

 +u32 pmtimer = inl(ioport);
 +return (u64)wraps  24 | pmtimer;
 BTW, why is this  24, and if it should be that way, shouldn't the
 pmtimer be inl(ioport)  0xff ?
 The pmtimer is defined to be 24 bits wide, so the shift is correct.
 This is not true in general.  It can be either 24 or 32 bits.  What it
 is depends on ACPI data (acpi_gbl_FADT-tmr_val_ext).

The piix4 emulated by qemu has 24 bits.

  However it is
 valid to only used 24 bits.

And we certainly want to mask the ioport read (as suggested by kevin and
done in v3 of the patch) so we only pick up the 24 bits we actually use.

thanks
  Gerd

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