Re: [kvm-devel] IA64 KVM
Caleb Moore wrote: > On Thu, 2007-11-08 at 09:00 -0700, Alex Williamson wrote: >> Hi Xiantao, >> >>Perhaps more people would be able to help restructure the tree to >> support more architectures if a snapshot of the kvm/ia64 code was >> made available. We might want to think about a kvm-ia64-devel >> mailing list too (such as ppc has already). Thanks, >> >> Alex > > I agree. > > My branch of the Gelato Federation (http://www.gelato.unsw.edu.au/) > Anyway, I'm currently being payed to improve Itanium virtualization > under Linux, is there anything useful I can do here or should I just > stick with working on LoL? During the last few days I've been > attempting to take out the x86 specific stuff from kvm_main.c but I > see that Xiantao already submitted that change yesterday. Do you > Intel guys have it all under control now? Community has begun the split work for two months~. Most code and logic has been taken out from the kvm_main.c. Currently, we try to finalize the work in next few days. If the split work done, we don't see the big hurdles which blocking IA64 code out. Now, I am trying to refine the code per new framework, and will send it out soon. Thanks Xiantao > > - > This SF.net email is sponsored by: Splunk Inc. > Still grepping through log files to find problems? Stop. > Now Search log events and configuration files using AJAX and a > browser. Download your FREE copy of Splunk now >> > http://get.splunk.com/ ___ > kvm-devel mailing list > kvm-devel@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/kvm-devel - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] [PATCH 1/3] include files for kvmclock
> +/*
> + * Guest has page alignment and padding requirements. At the host, it will
> + * only lead to wasted space at the vcpu struct. For this reason, the struct
> + * is not anonymous
> + */
> +union kvm_hv_clock {
> + struct kvm_hv_clock_s {
> + u64 tsc_mult;
> + u64 now_ns;
> + /* That's the wall clock, not the water closet */
> + u64 wc_sec;
> + u64 last_tsc;
> + /* At first, we could use the tsc value as a marker, but Jeremy
> + * well noted that it will cause us locking problems in 32-bit
> + * sys, so we have a special version field */
> + u32 version;
> + } fields;
> + char page_align[PAGE_SIZE];
> +};
What is the point in using a whole page per vcpu? You probably don't
want struct kvm_hv_clock_s cross a page border. Is that the only reason
or are there other constrains too?
As the kvm clock looks quite simliar to what xen does, how about making
the structs binary-compatible or simply reuse the xen version (struct
vcpu_time_info in xen/interface/xen.h)?
cheers,
Gerd
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[kvm-devel] 代理
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Re: [kvm-devel] [PATCH]3/5 Using kvm_arch prefix to define functions, and replace
Hollis Blanchard wrote: > On Thu, 2007-11-08 at 14:49 +0100, Carsten Otte wrote: >> Zhang, Xiantao wrote: >>> +void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu); >>> +void kvm_arch_vcpu_decache(struct kvm_vcpu *vcpu); >>> +void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu); >>> +void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu); >>> +struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int >>> id); >>> + >>> +int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu); >>> +void kvm_arch_hardware_enable(void *garbage); >>> +void kvm_arch_hardware_disable(void *garbage); >>> +int kvm_arch_hardware_setup(void); >>> +void kvm_arch_hardware_unsetup(void); >>> +void kvm_arch_check_processor_compat(void *rtn); >> I don't like the generic introduction of all x86_ops wrappers into the >> arch callbacks. I would rather prefer to work out a different split >> between common and arch specifics - at least in the following cases: >> - unloading the mmu needs to be moved out of kvm_free_vcpus into the >> arch part, because we don't have a shaddow mmu on s390 >> - decache_vcpus_on_cpu should be arch-dependent alltogether, rather >> than having a per cpu callback. We've got nothing to decache, so the >> entire thing is a nop for us. >> - vcpu_reset works very different for our architecture, we'd need an >> initial processor status word. I'd prefer to keep the existence of >> this callback arch dependent. >> - hardware enable/disable/setup/unsetup/check_processor_compat does not >> make any sense for us: all CPUs that have been sold since the 1970s have >> proper hardware virtualization, and there's nothing to enable - it just >> works. > > Sounds fine to me: you're just proposing to move the abstraction one > level higher in some places. That's right, I'd like to drag the bar a little where the common code does something just to call a callback that is nop for us. - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] KVM Test result, kernel 1805646.. , userspace c79baa60.
Hi, all This is today's KVM test result against kvm.git 1805646bfeeea2365d49c46abcd61f2c0d21e677 and kvm-userspace.git c79baa60813812e8d0e34d998d609e848c093000 One new issue has been found, one old issue has been fixed, 9 issues still open. One issue has been fixed: 1. segfault while booting 64bit linux with 4GB mem https://sourceforge.net/tracker/?func=detail&atid=893831&aid=1812050&gro up_id=180599 One new issue: 1. Cannot boot guests on PAE host https://sourceforge.net/tracker/?func=detail&atid=893831&aid=1828760&gro up_id=180599 This one is a new issue, it blocks testing on PAE host. Old issues: Five Windows issues: 2. Cannot boot 64bit Vista "-no-kvm-irqchip" has the same issue. And "-no-kvm" gets blue screen. https://sourceforge.net/tracker/index.php?func=detail&aid=1812072&group_ id=180599&atid=893831 3. 64bit xpsp2 installer crashed when rebooting With "-no-kvm-irqchip", blue screen happens when reboot https://sourceforge.net/tracker/index.php?func=detail&aid=1804990&group_ id=180599&atid=893831 4. xpsp2 with 2vpus may fail to boot "-no-kvm-irqchip" has the same issue. It exists on paxville,woodcrest and clowertown, but doesn't exist on weybridge and santarosa. https://sourceforge.net/tracker/index.php?func=detail&aid=1805017&group_ id=180599&atid=893831 5. Error "Fault when IDT_Vectoring" while running 64bit UP vista and smp 64bit windows guests https://sourceforge.net/tracker/index.php?func=detail&aid=1816460&group_ id=180599&atid=893831 Five Linux guest issues: 6. Cannot boot 32bit smp RHEL5.1 guest Only "-on-kvm" can boot it. https://sourceforge.net/tracker/?func=detail&atid=893831&aid=1812043&gro up_id=180599 7 Some ltp cases fail on KVM guests https://sourceforge.net/tracker/index.php?func=detail&aid=1741316&group_ id=180599&atid=893831 8. 64bit KVM guest fails to save/restore. https://sourceforge.net/tracker/index.php?func=detail&aid=1824525&group_ id=180599&atid=893831 9. Timer of SMP linux guest timer is inaccurate By network timer the time-cost of make kernel is about 180s, while by guest timer it's 137s. https://sourceforge.net/tracker/index.php?func=detail&aid=1826080&group_ id=180599&atid=893831 Test environment Platformwoodcrest CPU 16 Memory size 8G' Details IA32e: 1. boot four 32-bit guest in parallel PASS 2. boot four 64-bit guest in parallel PASS 3. boot 4G 64-bit guest FAIL 4. boot 4G pae guest PASS 5. boot 32-bit linux and 32 bit windows guest in parallelPASS 6. boot 32-bit guest with 1500M memory PASS 7. boot 64-bit guest with 1500M memory PASS 8. boot 32-bit guest with 256M memory PASS 9. boot 64-bit guest with 256M memory PASS 10. boot two 32-bit windows xp in parallel PASS 11. boot four 32-bit different guest in para PASS 12. save/restore 64-bit linux guests FAIL 13. save/restore 32-bit linux guests FAIL 14. boot 32-bit SMP windows 2003 with ACPI enabled FAIL 15. boot 32bit SMP Windows 2000 with ACPI enabled FAIL 16. boot 32-bit SMP Windows xp with ACPI enabled FAIL 17. boot 32-bit Windows 2000 without ACPI PASS 18. boot 64-bit Windows xp with ACPI enabledPASS 19. boot 32-bit Windows xp without ACPI PASS 20. boot 64-bit vista PASS 21. kernel build in 32-bit linux guest OS PASS 22. kernel build in 64-bit linux guest OS PASS 23. LTP on SMP 32-bit linux guest OS PASS 24. LTP on SMP 64-bit linux guest OS PASS 25. boot 64-bit guests with ACPI enabled PASS 26. boot 32-bit x-server PASS 27. boot 64-bit SMP windows XP with ACPI enabledFAIL 28. boot 64-bit SMP windows 2003 with ACPI enabledFAIL Report Summary on IA32e Summary Test Report of Last Session = Total PassFailNoResult Crash = control_panel 15 11 4 00 Restart 3 3 0 00 gtest 22 12 1000 = control_panel 15 11 4 00 :KVM_LM_64_g64 1 0 1 00 :KVM_four_sguest_64_gPAE 1 1 0 00 :KVM_4G_guest_64_g64 1 0 1 00 :KVM_four_sguest_64_g641 1 0 00 :KVM_linux_win_64_gPAE 1 1 0 0
Re: [kvm-devel] [ANNOUNCE] kvm-51 release
Avi Kivity wrote: > If you're having trouble on AMD systems, please try this out. this version worse than kvm-50:-( setup: - host: - Intel(R) Core(TM)2 Quad CPU Q6600 @ 2.40GHz - Intel S3000AHV - 8GB RAM - CentOS-5 - kernel-2.6.18-8.1.14.el5 x86_64 64bit - guest-1: - CentOS-5 - kernel-2.6.18-8.1.14.el5 i386 32bit - guest-2: - CentOS-5 - kernel-2.6.18-8.1.14.el5 x86_64 64bit - guest-3: - Mandrake-9 - kernel-2.4.19.16mdk-1-1mdk 32bit - guest-4: - Windows XP Professional 32bit smp not working on any centos guest (guests are hang during boot). even the host crash. the worst thing is the host crash during boot with another stack trace which i was not able to log. i really would like to see some kind of stable version other then kvm-36. i see there is a huge ongoing work on ia64, virtio, libkmv and arch rearrange, but wouldn't it be better to fix these basic issues first? like running two smp guest (32 and 64) on 64 smp host, just to boot until the login screen. this is when the guest stop and the host dump it: Ignoring de-assert INIT to vcpu 1 SIPI to vcpu 1 vector 0x06 SIPI to vcpu 1 vector 0x06 eth0: topology change detected, propagating eth0: port 3(vnet1) entering forwarding state Ignoring de-assert INIT to vcpu 2 SIPI to vcpu 2 vector 0x06 SIPI to vcpu 2 vector 0x06 Ignoring de-assert INIT to vcpu 3 SIPI to vcpu 3 vector 0x06 SIPI to vcpu 3 vector 0x06 BUG: soft lockup detected on CPU#1! Call Trace: [] softlockup_tick+0xdb/0xed [] update_process_times+0x42/0x68 [] smp_local_timer_interrupt+0x23/0x47 [] smp_apic_timer_interrupt+0x41/0x47 [] apic_timer_interrupt+0x66/0x6c [] :kvm:kvm_flush_remote_tlbs+0x16e/0x188 [] :kvm:kvm_flush_remote_tlbs+0x15b/0x188 [] :kvm:ack_flush+0x0/0x1 [] :kvm:kvm_mmu_pte_write+0x1fc/0x330 [] :kvm:emulator_write_emulated_onepage+0x85/0xe5 [] :kvm:x86_emulate_insn+0x2e03/0x407f [] __pte_alloc+0x122/0x142 [] :kvm_intel:vmcs_readl+0x17/0x1c [] :kvm:emulate_instruction+0x152/0x290 [] :kvm:kvm_mmu_page_fault+0x5e/0xb4 [] :kvm:kvm_arch_vcpu_ioctl_run+0x28a/0x3a6 [] :kvm:kvm_vcpu_ioctl+0xc3/0x388 [] __wake_up_common+0x3e/0x68 [] _spin_unlock_irqrestore+0x8/0x9 [] avc_has_perm+0x43/0x55 [] inode_has_perm+0x56/0x63 [] :kvm:kvm_vm_ioctl+0x277/0x290 [] :kvm_intel:vmx_vcpu_put+0x0/0xa3 [] file_has_perm+0x94/0xa3 [] do_ioctl+0x21/0x6b [] vfs_ioctl+0x248/0x261 [] sys_ioctl+0x59/0x78 [] tracesys+0xd1/0xdc -- Levente "Si vis pacem para bellum!" - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] [PATCH 3/3] virtio PCI device
On Thursday 08 November 2007, Anthony Liguori wrote: > > They already show up underneath of the PCI bus. The issue is that there > are two separate 'struct device's for each virtio device. There's the > PCI device (that's part of the pci_dev structure) and then there's the > virtio_device one. I thought that setting the dev.parent of the > virtio_device struct device would result in having two separate entries > under the PCI bus directory which would be pretty confusing But that's what a device tree means. Think about a USB disk drive: The drive shows up as a child of the USB controller, which in turn is a child of the PCI bridge. Note that I did not suggest having the virtio parent set to the parent of the PCI device, but to the PCI device itself. I find it more confusing to have a device just hanging off the root when it is actually handled by the PCI subsystem. Arnd <>< - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] IA64 KVM
Zhang, Xiantao wrote: >Thanks for your suggestions. It is a surely good idea to create a > IA64 mailing list to talk about the IA64-KVM. But now we have to rebase > them to latest commits before sending out, since the kvm source layout > changed much recently. Once the final source layout comes out, we will > send out the source code soon. I believe it should happen in very near > future. :-) I think this makes sense: we're shuffling the code around too much at the moment. It would be a big burden to have to keep the port up-to-date while doing that. We'll soon be done with our portability split, and I am sure Xiantao will be one of the first to present a port. Nevertheless, Akio, Alex and Caleb you're highly welcome to participate in the review process of our joined protability work to make sure we get everything right for ia64. - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] Bug: cpu0 unhandled rdmsr: 0x1900 and inject_general_protection
Avi, thanks. The patch fixes the issue for the XO image and there are no more MSR read errors. I'm still not sure why when starting the image with kvm enabled the drawing of the GRUB screen is so painfully slow, but without kvm it is fast. Any ideas? TJ. - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] [ANNOUNCE] kvm-51 release
I found that I had to move to a newer kernel (2.6.23.1 is what I used) to get SMP guests to boot on RHEL5 hosts. It appears to be an issue with the host kernel. david Farkas Levente wrote: > Avi Kivity wrote: >> If you're having trouble on AMD systems, please try this out. > > this version worse than kvm-50:-( > setup: > - host: > - Intel(R) Core(TM)2 Quad CPU Q6600 @ 2.40GHz > - Intel S3000AHV > - 8GB RAM > - CentOS-5 > - kernel-2.6.18-8.1.14.el5 x86_64 64bit > - guest-1: > - CentOS-5 > - kernel-2.6.18-8.1.14.el5 i386 32bit > - guest-2: > - CentOS-5 > - kernel-2.6.18-8.1.14.el5 x86_64 64bit > - guest-3: > - Mandrake-9 > - kernel-2.4.19.16mdk-1-1mdk 32bit > - guest-4: > - Windows XP Professional 32bit > smp not working on any centos guest (guests are hang during boot). even > the host crash. the worst thing is the host crash during boot with > another stack trace which i was not able to log. > i really would like to see some kind of stable version other then > kvm-36. i see there is a huge ongoing work on ia64, virtio, libkmv and > arch rearrange, but wouldn't it be better to fix these basic issues > first? like running two smp guest (32 and 64) on 64 smp host, just to > boot until the login screen. > this is when the guest stop and the host dump it: > > Ignoring de-assert INIT to vcpu 1 > SIPI to vcpu 1 vector 0x06 > SIPI to vcpu 1 vector 0x06 > eth0: topology change detected, propagating > eth0: port 3(vnet1) entering forwarding state > Ignoring de-assert INIT to vcpu 2 > SIPI to vcpu 2 vector 0x06 > SIPI to vcpu 2 vector 0x06 > Ignoring de-assert INIT to vcpu 3 > SIPI to vcpu 3 vector 0x06 > SIPI to vcpu 3 vector 0x06 > BUG: soft lockup detected on CPU#1! > > Call Trace: >[] softlockup_tick+0xdb/0xed > [] update_process_times+0x42/0x68 > [] smp_local_timer_interrupt+0x23/0x47 > [] smp_apic_timer_interrupt+0x41/0x47 > [] apic_timer_interrupt+0x66/0x6c >[] :kvm:kvm_flush_remote_tlbs+0x16e/0x188 > [] :kvm:kvm_flush_remote_tlbs+0x15b/0x188 > [] :kvm:ack_flush+0x0/0x1 > [] :kvm:kvm_mmu_pte_write+0x1fc/0x330 > [] :kvm:emulator_write_emulated_onepage+0x85/0xe5 > [] :kvm:x86_emulate_insn+0x2e03/0x407f > [] __pte_alloc+0x122/0x142 > [] :kvm_intel:vmcs_readl+0x17/0x1c > [] :kvm:emulate_instruction+0x152/0x290 > [] :kvm:kvm_mmu_page_fault+0x5e/0xb4 > [] :kvm:kvm_arch_vcpu_ioctl_run+0x28a/0x3a6 > [] :kvm:kvm_vcpu_ioctl+0xc3/0x388 > [] __wake_up_common+0x3e/0x68 > [] _spin_unlock_irqrestore+0x8/0x9 > [] avc_has_perm+0x43/0x55 > [] inode_has_perm+0x56/0x63 > [] :kvm:kvm_vm_ioctl+0x277/0x290 > [] :kvm_intel:vmx_vcpu_put+0x0/0xa3 > [] file_has_perm+0x94/0xa3 > [] do_ioctl+0x21/0x6b > [] vfs_ioctl+0x248/0x261 > [] sys_ioctl+0x59/0x78 > [] tracesys+0xd1/0xdc > > - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] [PATCH] qemu: simulate edge-triggered interrupt in master PIC for time-drift-fix
The following patch fixes 1a483ef4040ed380bf69d684783d06a617073256 so that the
parent PIC pointer is used to send the edge irq0 instead of the PIC pair and
that is an incompatible pointer type as reported in :
/var/tmp/portage/app-emulation/kvm-51/work/kvm-51/qemu/hw/i8259.c: In function
`
pic_read_irq':
/var/tmp/portage/app-emulation/kvm-51/work/kvm-51/qemu/hw/i8259.c:248:
warning: passing arg 1 of `pic_set_irq1' from incompatible pointer type
/var/tmp/portage/app-emulation/kvm-51/work/kvm-51/qemu/hw/i8259.c:249:
warning: passing arg 1 of `pic_set_irq1' from incompatible pointer type
Signed-off-by: Carlo Marcelo Arenas Belon <[EMAIL PROTECTED]>
---
qemu/hw/i8259.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/qemu/hw/i8259.c b/qemu/hw/i8259.c
index 01447d7..60063d4 100644
--- a/qemu/hw/i8259.c
+++ b/qemu/hw/i8259.c
@@ -245,8 +245,8 @@ int pic_read_irq(PicState2 *s)
if (timer_ints_to_push > 0) {
timer_ints_to_push--;
/* simulate an edge irq0, like the one generated by i8254 */
-pic_set_irq1(s, 0, 0);
-pic_set_irq1(s, 0, 1);
+pic_set_irq1(&s->pics[0], 0, 0);
+pic_set_irq1(&s->pics[0], 0, 1);
}
}
--
1.5.2.5
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[kvm-devel] Cannot install Win XP on AMD X2 with kvm-51
Version: kvm-50 and kvm-51 Problem: I am not able to install a Win XP SP2 guest. The Guest always crashes while installing Windows XP devices at T-37 minutes with a blue-screen and IRQL_NOT_LES_OR_EQUAL. cat /proc/cpuinfo: processor : 0 vendor_id : AuthenticAMD cpu family : 15 model : 107 model name : AMD Athlon(tm) X2 Dual Core Processor BE-2350 stepping: 1 cpu MHz : 1000.000 cache size : 512 KB physical id : 0 siblings: 2 core id : 0 cpu cores : 2 fpu : yes fpu_exception : yes cpuid level : 1 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt rdtscp lm 3dnowext 3dnow pni cx16 lahf_lm cmp_legacy svm extapic cr8_legacy misalignsse bogomips: 2005.82 TLB size: 1024 4K pages clflush size: 64 cache_alignment : 64 address sizes : 40 bits physical, 48 bits virtual power management: ts fid vid ttp tm stc 100mhzsteps processor : 1 vendor_id : AuthenticAMD cpu family : 15 model : 107 model name : AMD Athlon(tm) X2 Dual Core Processor BE-2350 stepping: 1 cpu MHz : 1000.000 cache size : 512 KB physical id : 0 siblings: 2 core id : 1 cpu cores : 2 fpu : yes fpu_exception : yes cpuid level : 1 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt rdtscp lm 3dnowext 3dnow pni cx16 lahf_lm cmp_legacy svm extapic cr8_legacy misalignsse bogomips: 2005.82 TLB size: 1024 4K pages clflush size: 64 cache_alignment : 64 address sizes : 40 bits physical, 48 bits virtual power management: ts fid vid ttp tm stc 100mhzsteps uname -r -m -o -s: Linux 2.6.22.9 x86_64 GNU/Linux Guest: Windows XP SP2 32bit Installation with: qemu-system-x86_64 -hda xp.img -cdrom /iso/xp.iso -boot d -m 512 or qemu-system-x86_64 -hda xp.img -no-acpi -cdrom /iso/xp.iso -boot d -m 512 I've also tried to get Standard PC HAL by pressing F7, but it makes no difference. With -no-kvm, qemu-system-x86_64 does not crash the guest, but Win XP seems to be "Installing Devices" for the rest of its life. The session is alive, but no progress anymore. The problem is nearly the same as described here: http://thread.gmane.org/gmane.comp.emulators.kvm.devel/7470 - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] [RFC] qemu: simulate edge-triggered interrupt in master PIC for time-drift-fix
wrong patch, this was meant to go to the slave PIC, so it will use s->pics[1]
instead of s->pics[0].
also from my tests it might seem that tdf is irrelevant anyway with the new
clock work and haven't been able to find a case where enabling it (so
triggering this buggy code path) migh be needed.
any one care to comment on any current users of tdf? and if there are none in
the viability for removing it?
Carlo
On Fri, Nov 09, 2007 at 11:22:10AM -0600, Carlo Marcelo Arenas Belon wrote:
> The following patch fixes 1a483ef4040ed380bf69d684783d06a617073256 so that the
> parent PIC pointer is used to send the edge irq0 instead of the PIC pair and
> that is an incompatible pointer type as reported in :
>
> /var/tmp/portage/app-emulation/kvm-51/work/kvm-51/qemu/hw/i8259.c: In function
> `
> pic_read_irq':
> /var/tmp/portage/app-emulation/kvm-51/work/kvm-51/qemu/hw/i8259.c:248:
> warning: passing arg 1 of `pic_set_irq1' from incompatible pointer type
> /var/tmp/portage/app-emulation/kvm-51/work/kvm-51/qemu/hw/i8259.c:249:
> warning: passing arg 1 of `pic_set_irq1' from incompatible pointer type
>
> Signed-off-by: Carlo Marcelo Arenas Belon <[EMAIL PROTECTED]>
> ---
> qemu/hw/i8259.c |4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/qemu/hw/i8259.c b/qemu/hw/i8259.c
> index 01447d7..60063d4 100644
> --- a/qemu/hw/i8259.c
> +++ b/qemu/hw/i8259.c
> @@ -245,8 +245,8 @@ int pic_read_irq(PicState2 *s)
> if (timer_ints_to_push > 0) {
> timer_ints_to_push--;
> /* simulate an edge irq0, like the one generated by i8254 */
> -pic_set_irq1(s, 0, 0);
> -pic_set_irq1(s, 0, 1);
> +pic_set_irq1(&s->pics[0], 0, 0);
> +pic_set_irq1(&s->pics[0], 0, 1);
> }
> }
>
> --
> 1.5.2.5
>
-
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Re: [kvm-devel] Cannot install Win XP on AMD X2 with kvm-51
On Friday 09 November 2007 22:49:18 Werner Opriel wrote: > Version: > kvm-50 and kvm-51 > > Problem: > I am not able to install a Win XP SP2 guest. > The Guest always crashes while installing Windows XP devices at T-37 > minutes with a blue-screen and IRQL_NOT_LES_OR_EQUAL. This is most likely hidden somewhere in the upgrade to qemu CVS just over a month back. Try the userspace tools from kvm-44 and kernel modules from kvm-51 and let us know if that works (in my limited testing here, it did). Amit. - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] Cannot install Win XP on AMD X2 with kvm-51
Werner Opriel wrote: > Version: > kvm-50 and kvm-51 > > Problem: > I am not able to install a Win XP SP2 guest. > The Guest always crashes while installing Windows XP devices at T-37 minutes > with a blue-screen and IRQL_NOT_LES_OR_EQUAL. > > cat /proc/cpuinfo: > processor : 0 > vendor_id : AuthenticAMD > cpu family : 15 > model : 107 > model name : AMD Athlon(tm) X2 Dual Core Processor BE-2350 > stepping: 1 > cpu MHz : 1000.000 > cache size : 512 KB > physical id : 0 > siblings: 2 > core id : 0 > cpu cores : 2 > fpu : yes > fpu_exception : yes > cpuid level : 1 > wp : yes > flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca > cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt rdtscp > lm 3dnowext 3dnow pni cx16 lahf_lm cmp_legacy svm extapic cr8_legacy > misalignsse > bogomips: 2005.82 > TLB size: 1024 4K pages > clflush size: 64 > cache_alignment : 64 > address sizes : 40 bits physical, 48 bits virtual > power management: ts fid vid ttp tm stc 100mhzsteps > > processor : 1 > vendor_id : AuthenticAMD > cpu family : 15 > model : 107 > model name : AMD Athlon(tm) X2 Dual Core Processor BE-2350 > stepping: 1 > cpu MHz : 1000.000 > cache size : 512 KB > physical id : 0 > siblings: 2 > core id : 1 > cpu cores : 2 > fpu : yes > fpu_exception : yes > cpuid level : 1 > wp : yes > flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca > cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt rdtscp > lm 3dnowext 3dnow pni cx16 lahf_lm cmp_legacy svm extapic cr8_legacy > misalignsse > bogomips: 2005.82 > TLB size: 1024 4K pages > clflush size: 64 > cache_alignment : 64 > address sizes : 40 bits physical, 48 bits virtual > power management: ts fid vid ttp tm stc 100mhzsteps > > uname -r -m -o -s: > Linux 2.6.22.9 x86_64 GNU/Linux > > Guest: > Windows XP SP2 32bit > > Installation with: > qemu-system-x86_64 -hda xp.img -cdrom /iso/xp.iso -boot d -m 512 > or > qemu-system-x86_64 -hda xp.img -no-acpi -cdrom /iso/xp.iso -boot d -m 512 > > I've also tried to get Standard PC HAL by pressing F7, > but it makes no difference. > > With -no-kvm, qemu-system-x86_64 does not crash the guest, but Win XP seems > to be "Installing Devices" for the rest of its life. The session is alive, > but no progress anymore. > The problem is nearly the same as described here: > http://thread.gmane.org/gmane.comp.emulators.kvm.devel/7470 i hope i am not asking too much, but can you please try to completely install and run the installtion with -no-kvm? (another thing i want you to check is what the effect of -no-kvm-irqchip when runing with kvm enabled (it might fix some things) thanks. - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] Cannot install Win XP on AMD X2 with kvm-51
I'm having the same issues as Werner, and using the kvm userspace from kvm-44 and the kernel modules from kvm-51 does not help. Same issue at the same place in the install. AMD turion X2 1.6Ghz, gutsy 2.6.22-14-generic host kernel. It always fails, with either the IRQL_... error, or I've also seen PAGE_FAULT_IN_NONPAGED_AREA (received this morning while trying kvm-51 userspace and kernel). I've also seen INVALID_PFN occasionally, but I haven't seen this with kvm-51 yet. Using -no-kvm-irqchip is much worse.. the boot freezes very early in the boot process with either a stop kernel message or the fading in windows logo screen freezes half way in. commandline used: sudo ./qemu-system-x86_64 -m 256 -boot c -cdrom /imgs/EN_WINDOWS_XP_PRO_WITH_SP2.ISO -hda /imgs/winxp.qcow -vnc :1 -net user -net nic,model=ne2k_pci,mac=00:11:22:33:44:55 -no-kvm-irqchip I will try using -no-kvm now. john.c On Fri, 2007-11-09 at 23:51 +0530, Amit Shah wrote: > On Friday 09 November 2007 22:49:18 Werner Opriel wrote: > > Version: > > kvm-50 and kvm-51 > > > > Problem: > > I am not able to install a Win XP SP2 guest. > > The Guest always crashes while installing Windows XP devices at T-37 > > minutes with a blue-screen and IRQL_NOT_LES_OR_EQUAL. > > This is most likely hidden somewhere in the upgrade to qemu CVS just over a > month back. Try the userspace tools from kvm-44 and kernel modules from > kvm-51 and let us know if that works (in my limited testing here, it did). > > Amit. > > - > This SF.net email is sponsored by: Splunk Inc. > Still grepping through log files to find problems? Stop. > Now Search log events and configuration files using AJAX and a browser. > Download your FREE copy of Splunk now >> http://get.splunk.com/ > ___ > kvm-devel mailing list > kvm-devel@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/kvm-devel - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] [PATCH 2/24] irqflags consolidation
This patch consolidates the irqflags include files containing common
paravirt definitions. The native definition for interrupt handling, halt,
and such, are the same for 32 and 64 bit, and they are kept in irqflags.h.
The differences are split in the arch-specific files.
The syscall function, irq_enable_sysexit, has a very specific i386 naming,
and its name is then changed to a more general one.
Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]>
Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]>
Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]>
---
arch/x86/kernel/asm-offsets_32.c |2 +-
arch/x86/kernel/entry_32.S |8 +-
arch/x86/kernel/paravirt_32.c| 10 +-
arch/x86/kernel/vmi_32.c |4 +-
arch/x86/xen/enlighten.c |2 +-
include/asm-x86/irqflags.h | 246 +-
include/asm-x86/irqflags_32.h| 174 ---
include/asm-x86/irqflags_64.h| 154
include/asm-x86/paravirt.h |9 +-
9 files changed, 261 insertions(+), 348 deletions(-)
diff --git a/arch/x86/kernel/asm-offsets_32.c b/arch/x86/kernel/asm-offsets_32.c
index 0e45981..c1ccfab 100644
--- a/arch/x86/kernel/asm-offsets_32.c
+++ b/arch/x86/kernel/asm-offsets_32.c
@@ -123,7 +123,7 @@ void foo(void)
OFFSET(PV_IRQ_irq_disable, pv_irq_ops, irq_disable);
OFFSET(PV_IRQ_irq_enable, pv_irq_ops, irq_enable);
OFFSET(PV_CPU_iret, pv_cpu_ops, iret);
- OFFSET(PV_CPU_irq_enable_sysexit, pv_cpu_ops, irq_enable_sysexit);
+ OFFSET(PV_CPU_irq_enable_syscall_ret, pv_cpu_ops,
irq_enable_syscall_ret);
OFFSET(PV_CPU_read_cr0, pv_cpu_ops, read_cr0);
#endif
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index dc7f938..d63609d 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -58,7 +58,7 @@
* for paravirtualization. The following will never clobber any registers:
* INTERRUPT_RETURN (aka. "iret")
* GET_CR0_INTO_EAX (aka. "movl %cr0, %eax")
- * ENABLE_INTERRUPTS_SYSEXIT (aka "sti; sysexit").
+ * ENABLE_INTERRUPTS_SYSCALL_RET (aka "sti; sysexit").
*
* For DISABLE_INTERRUPTS/ENABLE_INTERRUPTS (aka "cli"/"sti"), you must
* specify what registers can be overwritten (CLBR_NONE, CLBR_EAX/EDX/ECX/ANY).
@@ -351,7 +351,7 @@ sysenter_past_esp:
xorl %ebp,%ebp
TRACE_IRQS_ON
1: mov PT_FS(%esp), %fs
- ENABLE_INTERRUPTS_SYSEXIT
+ ENABLE_INTERRUPTS_SYSCALL_RET
CFI_ENDPROC
.pushsection .fixup,"ax"
2: movl $0,PT_FS(%esp)
@@ -882,10 +882,10 @@ ENTRY(native_iret)
.previous
END(native_iret)
-ENTRY(native_irq_enable_sysexit)
+ENTRY(native_irq_enable_syscall_ret)
sti
sysexit
-END(native_irq_enable_sysexit)
+END(native_irq_enable_syscall_ret)
#endif
KPROBE_ENTRY(int3)
diff --git a/arch/x86/kernel/paravirt_32.c b/arch/x86/kernel/paravirt_32.c
index 6a80d67..04f51d0 100644
--- a/arch/x86/kernel/paravirt_32.c
+++ b/arch/x86/kernel/paravirt_32.c
@@ -60,7 +60,7 @@ DEF_NATIVE(pv_irq_ops, irq_enable, "sti");
DEF_NATIVE(pv_irq_ops, restore_fl, "push %eax; popf");
DEF_NATIVE(pv_irq_ops, save_fl, "pushf; pop %eax");
DEF_NATIVE(pv_cpu_ops, iret, "iret");
-DEF_NATIVE(pv_cpu_ops, irq_enable_sysexit, "sti; sysexit");
+DEF_NATIVE(pv_cpu_ops, irq_enable_syscall_ret, "sti; sysexit");
DEF_NATIVE(pv_mmu_ops, read_cr2, "mov %cr2, %eax");
DEF_NATIVE(pv_mmu_ops, write_cr3, "mov %eax, %cr3");
DEF_NATIVE(pv_mmu_ops, read_cr3, "mov %cr3, %eax");
@@ -88,7 +88,7 @@ static unsigned native_patch(u8 type, u16 clobbers, void
*ibuf,
SITE(pv_irq_ops, restore_fl);
SITE(pv_irq_ops, save_fl);
SITE(pv_cpu_ops, iret);
- SITE(pv_cpu_ops, irq_enable_sysexit);
+ SITE(pv_cpu_ops, irq_enable_syscall_ret);
SITE(pv_mmu_ops, read_cr2);
SITE(pv_mmu_ops, read_cr3);
SITE(pv_mmu_ops, write_cr3);
@@ -186,7 +186,7 @@ unsigned paravirt_patch_default(u8 type, u16 clobbers, void
*insnbuf,
/* If the operation is a nop, then nop the callsite */
ret = paravirt_patch_nop();
else if (type == PARAVIRT_PATCH(pv_cpu_ops.iret) ||
-type == PARAVIRT_PATCH(pv_cpu_ops.irq_enable_sysexit))
+type == PARAVIRT_PATCH(pv_cpu_ops.irq_enable_syscall_ret))
/* If operation requires a jmp, then jmp */
ret = paravirt_patch_jmp(insnbuf, opfunc, addr, len);
else
@@ -237,7 +237,7 @@ static void native_flush_tlb_single(unsigned long addr)
/* These are in entry.S */
extern void native_iret(void);
-extern void native_irq_enable_sysexit(void);
+extern void native_irq_enable_syscall_ret(void);
static int __init print_banner(void)
{
@@ -384,7 +384,7 @@ struct pv_cpu_ops pv_cpu_ops = {
.write_idt_entry = write_dt_entry,
.load_esp0 = native_load_esp0,
- .irq_enable_sysexit = native_irq_enable_sysexit,
+ .irq_enable_syscall_ret = native_irq_e
[kvm-devel] [PATCH 0/24] paravirt_ops for unified x86 - that's me again!
Hey folks, Here's a new spin of the pvops64 patch series. We didn't get that many comments from the last time, so it should be probably almost ready to get in. Heya! >From the last version, the most notable changes are: * consolidation of system.h, merging jeremy's comments about ordering concerns * consolidation of smp functions that goes through smp_ops. They're sharing a bunch of code now. Other than that, just some issues that arose from the rebase. Please, not that this patch series _does not_ apply over linus git anymore, but rather, over tglx cleanup series. The first patch in this series is already on linus', but not on tglx', so I'm sending it again, because you'll need it if you want to compile it anyway. tglx, in the absense of any outstanding NACKs, or any very big call for improvements, could you please pull it in your tree? Have fun, - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] [PATCH 4/24] tlb functions consolidation
This patch consolidates part of the tlb handling functions for the x86
architecture. In this approach, we start by the parts actually used for
paravirt in i386.
Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]>
Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]>
Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]>
---
arch/x86/kernel/smp_64.c |5 ++-
include/asm-x86/tlbflush.h| 77 +
include/asm-x86/tlbflush_32.h | 77 -
include/asm-x86/tlbflush_64.h | 43 +++
4 files changed, 85 insertions(+), 117 deletions(-)
diff --git a/arch/x86/kernel/smp_64.c b/arch/x86/kernel/smp_64.c
index 62b0f2a..ce3935b 100644
--- a/arch/x86/kernel/smp_64.c
+++ b/arch/x86/kernel/smp_64.c
@@ -166,11 +166,12 @@ out:
add_pda(irq_tlb_count, 1);
}
-static void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
- unsigned long va)
+void native_flush_tlb_others(const cpumask_t *cpumaskp,
+struct mm_struct *mm, unsigned long va)
{
int sender;
union smp_flush_state *f;
+ cpumask_t cpumask = *cpumaskp;
/* Caller has disabled preemption */
sender = smp_processor_id() % NUM_INVALIDATE_TLB_VECTORS;
diff --git a/include/asm-x86/tlbflush.h b/include/asm-x86/tlbflush.h
index 9af4cc8..93283cf 100644
--- a/include/asm-x86/tlbflush.h
+++ b/include/asm-x86/tlbflush.h
@@ -1,5 +1,82 @@
+#ifndef _X86_TLBFLUSH_H_
+#define _X86_TLBFLUSH_H_
+
+#ifdef CONFIG_PARAVIRT
+#include
+#else
+#define __flush_tlb() __native_flush_tlb()
+#define __flush_tlb_global() __native_flush_tlb_global()
+#define __flush_tlb_single(addr) __native_flush_tlb_single(addr)
+#endif
+
+static inline void __native_flush_tlb(void)
+{
+ write_cr3(read_cr3());
+}
+
+static inline void __native_flush_tlb_global(void)
+{
+ unsigned long cr4 = read_cr4();
+ write_cr4(cr4 & ~X86_CR4_PGE); /* clear PGE */
+ write_cr4(cr4); /* write old PGE again and flush TLBs */
+}
+
+#define __native_flush_tlb_single(addr)\
+ __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
+
+#ifdef CONFIG_SMP
+
+#include
+#include
+
+#define local_flush_tlb() \
+ __flush_tlb()
+
+extern void flush_tlb_all(void);
+extern void flush_tlb_current_task(void);
+extern void flush_tlb_mm(struct mm_struct *);
+extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
+
+#define flush_tlb()flush_tlb_current_task()
+
+static inline void flush_tlb_range(struct vm_area_struct *vma,
+ unsigned long start, unsigned long end)
+{
+ flush_tlb_mm(vma->vm_mm);
+}
+
+void native_flush_tlb_others(const cpumask_t *cpumask, struct mm_struct *mm,
+unsigned long va);
+
+#define TLBSTATE_OK1
+#define TLBSTATE_LAZY 2
+
+#ifdef CONFIG_X86_64
+/* Roughly an IPI every 20MB with 4k pages for freeing page table
+ ranges. Cost is about 42k of memory for each CPU. */
+#define ARCH_FREE_PTE_NR 5350
+
+#else /* X86_64 */
+struct tlb_state
+{
+ struct mm_struct *active_mm;
+ int state;
+ char __cacheline_padding[L1_CACHE_BYTES-8];
+};
+DECLARE_PER_CPU(struct tlb_state, cpu_tlbstate);
+#endif /* X86_64 */
+
+#endif
+
+#ifndef CONFIG_PARAVIRT
+#define flush_tlb_others(mask, mm, va) \
+ native_flush_tlb_others(&mask, mm, va)
+#endif
+
#ifdef CONFIG_X86_32
# include "tlbflush_32.h"
#else
# include "tlbflush_64.h"
#endif
+
+#endif
diff --git a/include/asm-x86/tlbflush_32.h b/include/asm-x86/tlbflush_32.h
index 2bd5b95..07eaf37 100644
--- a/include/asm-x86/tlbflush_32.h
+++ b/include/asm-x86/tlbflush_32.h
@@ -1,49 +1,8 @@
#ifndef _I386_TLBFLUSH_H
#define _I386_TLBFLUSH_H
-#include
#include
-#ifdef CONFIG_PARAVIRT
-#include
-#else
-#define __flush_tlb() __native_flush_tlb()
-#define __flush_tlb_global() __native_flush_tlb_global()
-#define __flush_tlb_single(addr) __native_flush_tlb_single(addr)
-#endif
-
-#define __native_flush_tlb() \
- do {\
- unsigned int tmpreg;\
- \
- __asm__ __volatile__( \
- "movl %%cr3, %0; \n" \
- "movl %0, %%cr3; # flush TLB \n" \
- : "=r" (tmpreg) \
- :: "memory"); \
- } while (0)
-
-/*
- * Global pages have to be flushed a bit differently. Not a real
- * performance problem because this does not happen often.
- */
-#define __native_flush_tlb_global()
[kvm-devel] [PATCH 1/24] mm/sparse-vmemmap.c: make sure init_mm is included
mm/sparse-vmemmap.c uses init_mm in some places. However, it is not present in any of the headers currently included in the file. init_mm is defined as extern in sched.h, so we add it to the headers list Up to now, this problem was masked by the fact that functions like set_pte_at() and pmd_populate_kernel() are usually macros that expand to simpler variants that does not use the first parameter at all. Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]> Signed-off-by: Andrew Morton <[EMAIL PROTECTED]> Signed-off-by: Linus Torvalds <[EMAIL PROTECTED]> --- mm/sparse-vmemmap.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/mm/sparse-vmemmap.c b/mm/sparse-vmemmap.c index d3b718b..22620f6 100644 --- a/mm/sparse-vmemmap.c +++ b/mm/sparse-vmemmap.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include -- 1.4.4.2 - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] [PATCH 10/24] paravirt hooks at entry functions.
Those are the hooks needed for paravirt at entry_64.S In general, they follow the way of i386. Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]> Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]> Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]> --- arch/x86/kernel/entry_64.S | 108 +++- 1 files changed, 66 insertions(+), 42 deletions(-) diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S index 3a058bb..b6d7008 100644 --- a/arch/x86/kernel/entry_64.S +++ b/arch/x86/kernel/entry_64.S @@ -50,6 +50,7 @@ #include #include #include +#include .code64 @@ -57,6 +58,20 @@ #define retint_kernel retint_restore_args #endif +#ifdef CONFIG_PARAVIRT +ENTRY(native_irq_enable_syscall_ret) + movq%gs:pda_oldrsp,%rsp + swapgs + sysretq +/* + * This could well be defined as a C function, but as it is only used here, + * let it be locally defined + */ +ENTRY(native_swapgs) + swapgs + retq +#endif /* CONFIG_PARAVIRT */ + .macro TRACE_IRQS_IRETQ offset=ARGOFFSET #ifdef CONFIG_TRACE_IRQFLAGS @@ -216,14 +231,21 @@ ENTRY(system_call) CFI_DEF_CFA rsp,PDA_STACKOFFSET CFI_REGISTERrip,rcx /*CFI_REGISTER rflags,r11*/ - swapgs + SWAPGS_UNSAFE_STACK + /* +* A hypervisor implementation might want to use a label +* after the swapgs, so that it can do the swapgs +* for the guest and jump here on syscall. +*/ +ENTRY(system_call_after_swapgs) + movq%rsp,%gs:pda_oldrsp movq%gs:pda_kernelstack,%rsp /* * No need to follow this irqs off/on section - it's straight * and short: */ - sti + ENABLE_INTERRUPTS(CLBR_NONE) SAVE_ARGS 8,1 movq %rax,ORIG_RAX-ARGOFFSET(%rsp) movq %rcx,RIP-ARGOFFSET(%rsp) @@ -246,7 +268,7 @@ ret_from_sys_call: sysret_check: LOCKDEP_SYS_EXIT GET_THREAD_INFO(%rcx) - cli + DISABLE_INTERRUPTS(CLBR_NONE) TRACE_IRQS_OFF movl threadinfo_flags(%rcx),%edx andl %edi,%edx @@ -260,9 +282,7 @@ sysret_check: CFI_REGISTERrip,rcx RESTORE_ARGS 0,-ARG_SKIP,1 /*CFI_REGISTER rflags,r11*/ - movq%gs:pda_oldrsp,%rsp - swapgs - sysretq + ENABLE_INTERRUPTS_SYSCALL_RET CFI_RESTORE_STATE /* Handle reschedules */ @@ -271,7 +291,7 @@ sysret_careful: bt $TIF_NEED_RESCHED,%edx jnc sysret_signal TRACE_IRQS_ON - sti + ENABLE_INTERRUPTS(CLBR_NONE) pushq %rdi CFI_ADJUST_CFA_OFFSET 8 call schedule @@ -282,7 +302,7 @@ sysret_careful: /* Handle a signal */ sysret_signal: TRACE_IRQS_ON - sti + ENABLE_INTERRUPTS(CLBR_NONE) testl $(_TIF_SIGPENDING|_TIF_SINGLESTEP|_TIF_MCE_NOTIFY),%edx jz1f @@ -295,7 +315,7 @@ sysret_signal: 1: movl $_TIF_NEED_RESCHED,%edi /* Use IRET because user could have changed frame. This works because ptregscall_common has called FIXUP_TOP_OF_STACK. */ - cli + DISABLE_INTERRUPTS(CLBR_NONE) TRACE_IRQS_OFF jmp int_with_check @@ -327,7 +347,7 @@ tracesys: */ .globl int_ret_from_sys_call int_ret_from_sys_call: - cli + DISABLE_INTERRUPTS(CLBR_NONE) TRACE_IRQS_OFF testl $3,CS-ARGOFFSET(%rsp) je retint_restore_args @@ -349,20 +369,20 @@ int_careful: bt $TIF_NEED_RESCHED,%edx jnc int_very_careful TRACE_IRQS_ON - sti + ENABLE_INTERRUPTS(CLBR_NONE) pushq %rdi CFI_ADJUST_CFA_OFFSET 8 call schedule popq %rdi CFI_ADJUST_CFA_OFFSET -8 - cli + DISABLE_INTERRUPTS(CLBR_NONE) TRACE_IRQS_OFF jmp int_with_check /* handle signals and tracing -- both require a full stack frame */ int_very_careful: TRACE_IRQS_ON - sti + ENABLE_INTERRUPTS(CLBR_NONE) SAVE_REST /* Check for syscall exit trace */ testl $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP),%edx @@ -385,7 +405,7 @@ int_signal: 1: movl $_TIF_NEED_RESCHED,%edi int_restore_rest: RESTORE_REST - cli + DISABLE_INTERRUPTS(CLBR_NONE) TRACE_IRQS_OFF jmp int_with_check CFI_ENDPROC @@ -506,7 +526,7 @@ END(stub_rt_sigreturn) CFI_DEF_CFA_REGISTERrbp testl $3,CS(%rdi) je 1f - swapgs + SWAPGS /* irqcount is used to check if a CPU is already on an interrupt stack or not. While this is essentially redundant with preempt_count it is a little cheaper to use a separate counter in the PDA @@ -527,7 +547,7 @@ ENTRY(common_interrupt) interrupt do_IRQ /* 0(%rsp): oldrsp-ARGOFFSET */ ret_from_intr: - cli + DISAB
[kvm-devel] [PATCH 9/24] Wipe out traditional opt from x86_64 Makefile
Among other things, using -traditional as a gcc option stops us from using macro token pasting, which is a feature we heavily rely on. There was still a use of -traditional in arch/x86/kernel/Makefile_64, which this patch removes. I don't see any problems building kernels in my x86_64 box without -traditional. Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]> Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]> Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]> --- arch/x86/kernel/Makefile_64 |1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/arch/x86/kernel/Makefile_64 b/arch/x86/kernel/Makefile_64 index ffee997..0714528 100644 --- a/arch/x86/kernel/Makefile_64 +++ b/arch/x86/kernel/Makefile_64 @@ -3,7 +3,6 @@ # extra-y:= head_64.o head64.o init_task.o vmlinux.lds -EXTRA_AFLAGS := -traditional obj-y := process_64.o signal_64.o entry_64.o traps_64.o irq_64.o \ ptrace_64.o time_64.o ioport_64.o ldt.o setup_64.o i8259_64.o sys_x86_64.o \ x8664_ksyms_64.o i387_64.o syscall_64.o vsyscall_64.o \ -- 1.4.4.2 - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] [PATCH 12/24] provide native irq initialization function
The interrupt initialization routine becomes native_init_IRQ and will
be overriden later in case paravirt is on. The interrupt array is made visible
for guests such lguest, that will need to have their own initialization
mechanism (though using most of the same irq lines) later on.
Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]>
Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]>
Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]>
---
arch/x86/kernel/i8259_64.c |7 +--
include/asm-x86/irq_64.h |3 +++
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/i8259_64.c b/arch/x86/kernel/i8259_64.c
index 3041e59..53955f4 100644
--- a/arch/x86/kernel/i8259_64.c
+++ b/arch/x86/kernel/i8259_64.c
@@ -77,7 +77,7 @@ BUILD_16_IRQS(0xc) BUILD_16_IRQS(0xd) BUILD_16_IRQS(0xe)
BUILD_16_IRQS(0xf)
IRQ(x,c), IRQ(x,d), IRQ(x,e), IRQ(x,f)
/* for the irq vectors */
-static void (*interrupt[NR_VECTORS - FIRST_EXTERNAL_VECTOR])(void) = {
+void (*interrupt[NR_VECTORS - FIRST_EXTERNAL_VECTOR])(void) = {
IRQLIST_16(0x2), IRQLIST_16(0x3),
IRQLIST_16(0x4), IRQLIST_16(0x5), IRQLIST_16(0x6), IRQLIST_16(0x7),
IRQLIST_16(0x8), IRQLIST_16(0x9), IRQLIST_16(0xa), IRQLIST_16(0xb),
@@ -456,7 +456,10 @@ void __init init_ISA_irqs (void)
}
}
-void __init init_IRQ(void)
+/* Overridden in paravirt.c */
+void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ")));
+
+void __init native_init_IRQ(void)
{
int i;
diff --git a/include/asm-x86/irq_64.h b/include/asm-x86/irq_64.h
index 5006c6e..4f02446 100644
--- a/include/asm-x86/irq_64.h
+++ b/include/asm-x86/irq_64.h
@@ -46,6 +46,9 @@ static __inline__ int irq_canonicalize(int irq)
extern void fixup_irqs(cpumask_t map);
#endif
+#include
+void native_init_IRQ(void);
+
#define __ARCH_HAS_DO_SOFTIRQ 1
#endif /* _ASM_IRQ_H */
--
1.4.4.2
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[kvm-devel] [PATCH 8/24] consolidate system.h
This patch consolidates system.h header. For i386, it adds functions
read/write_cr8 that ain't really needed, but will also not hurt. If they are
used somewhere in i386 code, there's a bug anyway, and should be fixed.
Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]>
Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]>
Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]>
---
include/asm-x86/system.h| 134 +++
include/asm-x86/system_32.h | 102
include/asm-x86/system_64.h | 77 -
3 files changed, 134 insertions(+), 179 deletions(-)
diff --git a/include/asm-x86/system.h b/include/asm-x86/system.h
index 692562b..ef20916 100644
--- a/include/asm-x86/system.h
+++ b/include/asm-x86/system.h
@@ -1,5 +1,139 @@
+#ifndef _X86_SYSTEM_H_
+#define _X86_SYSTEM_H_
+
+#include
+
+static inline void native_clts(void)
+{
+ asm volatile ("clts");
+}
+
+/*
+ * Volatile isn't enough to prevent the compiler from reordering the
+ * read/write functions for the control registers and messing everything up.
+ * A memory clobber would solve the problem, but would prevent reordering of
+ * all loads stores around it, which can hurt performance. Solution is to
+ * use a variable and mimic reads and writes to it to enforce serialization
+ */
+static unsigned long __force_order;
+
+static inline unsigned long native_read_cr0(void)
+{
+ unsigned long val;
+ asm volatile("mov %%cr0,%0\n\t" :"=r" (val), "=m" (__force_order));
+ return val;
+}
+
+static inline void native_write_cr0(unsigned long val)
+{
+ asm volatile("mov %0,%%cr0": :"r" (val), "m" (__force_order));
+}
+
+static inline unsigned long native_read_cr2(void)
+{
+ unsigned long val;
+ asm volatile("mov %%cr2,%0\n\t" :"=r" (val), "=m" (__force_order));
+ return val;
+}
+
+static inline void native_write_cr2(unsigned long val)
+{
+ asm volatile("mov %0,%%cr2": :"r" (val), "m" (__force_order));
+}
+
+static inline unsigned long native_read_cr3(void)
+{
+ unsigned long val;
+ asm volatile("mov %%cr3,%0\n\t" :"=r" (val), "=m" (__force_order));
+ return val;
+}
+
+static inline void native_write_cr3(unsigned long val)
+{
+ asm volatile("mov %0,%%cr3": :"r" (val), "m" (__force_order));
+}
+
+static inline unsigned long native_read_cr4(void)
+{
+ unsigned long val;
+ asm volatile("mov %%cr4,%0\n\t" :"=r" (val), "=m" (__force_order));
+ return val;
+}
+
+static inline unsigned long native_read_cr4_safe(void)
+{
+ unsigned long val;
+ /* This could fault if %cr4 does not exist. In x86_64, a cr4 always
+* exists, so it will never fail. */
+#ifdef CONFIG_X86_32
+ asm volatile("1: mov %%cr4, %0 \n"
+ "2: \n"
+ ".section __ex_table,\"a\" \n"
+ ".long 1b,2b\n"
+ ".previous \n"
+ : "=r" (val), "=m" (__force_order) : "0" (0));
+#else
+ val = native_read_cr4();
+#endif
+ return val;
+}
+
+static inline void native_write_cr4(unsigned long val)
+{
+ asm volatile("mov %0,%%cr4": :"r" (val), "m" (__force_order));
+}
+
+static inline unsigned long native_read_cr8(void)
+{
+ unsigned long cr8;
+ asm volatile("mov %%cr8,%0" : "=r" (cr8), "=m" (__force_order));
+ return cr8;
+}
+
+static inline void native_write_cr8(unsigned long val)
+{
+ asm volatile("mov %0,%%cr8" : : "r" (val));
+}
+
+static inline void native_wbinvd(void)
+{
+ asm volatile("wbinvd": : :"memory");
+}
+
+static inline void clflush(volatile void *__p)
+{
+ asm volatile("clflush %0" : "+m" (*(char __force *)__p));
+}
+
+#ifdef CONFIG_PARAVIRT
+#include
+#else
+#define read_cr0() (native_read_cr0())
+#define write_cr0(x) (native_write_cr0(x))
+#define read_cr2() (native_read_cr2())
+#define write_cr2(x) (native_write_cr2(x))
+#define read_cr3() (native_read_cr3())
+#define write_cr3(x) (native_write_cr3(x))
+#define read_cr4() (native_read_cr4())
+#define read_cr4_safe()(native_read_cr4_safe())
+#define write_cr4(x) (native_write_cr4(x))
+#define read_cr8() (native_read_cr8())
+#define write_cr8(x) (native_write_cr8(x))
+#define wbinvd() (native_wbinvd())
+
+/* Clear the 'TS' bit */
+#define clts() (native_clts())
+
+#endif/* CONFIG_PARAVIRT */
+
+#define stts() write_cr0(8 | read_cr0())
+
+#define nop() __asm__ __volatile__ ("nop")
+
#ifdef CONFIG_X86_32
# include "system_32.h"
#else
# include "system_64.h"
#endif
+
+#endif
diff --git a/include/asm-x86/system_32.h b/include/asm-x86/system_32.h
index db6283e..26fc8f5 100644
--- a/include/asm-x86/system_32.h
+++ b/include/asm-x86/system_32.h
@@ -1,7 +1,6 @@
#ifndef __ASM_SYSTEM_H
#define __ASM_SYSTEM_H
-#include
#include
#include
#include
@@ -89,105 +88,6 @@ __asm__ __volatile__ ("movw
[kvm-devel] [PATCH 3/24] consolidate spinlock.h
The cli and sti instructions need to be replaced by paravirt hooks. For the i386 architecture, this is already done. The code requirements aren't much different from x86_64 POV, so this part is consolidated in the common header Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]> Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]> Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]> --- include/asm-x86/spinlock.h| 14 ++ include/asm-x86/spinlock_32.h |9 - include/asm-x86/spinlock_64.h |8 +--- 3 files changed, 19 insertions(+), 12 deletions(-) diff --git a/include/asm-x86/spinlock.h b/include/asm-x86/spinlock.h index d74d85e..e1d555a 100644 --- a/include/asm-x86/spinlock.h +++ b/include/asm-x86/spinlock.h @@ -1,5 +1,19 @@ +#ifndef _X86_SPINLOCK_H_ +#define _X86_SPINLOCK_H_ + +#ifdef CONFIG_PARAVIRT +#include +#else +#define CLI_STRING "cli" +#define STI_STRING "sti" +#define CLI_STI_CLOBBERS +#define CLI_STI_INPUT_ARGS +#endif /* CONFIG_PARAVIRT */ + #ifdef CONFIG_X86_32 # include "spinlock_32.h" #else # include "spinlock_64.h" #endif + +#endif diff --git a/include/asm-x86/spinlock_32.h b/include/asm-x86/spinlock_32.h index d3bcebe..ebbf371 100644 --- a/include/asm-x86/spinlock_32.h +++ b/include/asm-x86/spinlock_32.h @@ -7,15 +7,6 @@ #include #include -#ifdef CONFIG_PARAVIRT -#include -#else -#define CLI_STRING "cli" -#define STI_STRING "sti" -#define CLI_STI_CLOBBERS -#define CLI_STI_INPUT_ARGS -#endif /* CONFIG_PARAVIRT */ - /* * Your basic SMP spinlocks, allowing only a single CPU anywhere * diff --git a/include/asm-x86/spinlock_64.h b/include/asm-x86/spinlock_64.h index 88bf981..e56b17e 100644 --- a/include/asm-x86/spinlock_64.h +++ b/include/asm-x86/spinlock_64.h @@ -48,12 +48,12 @@ static inline void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long fla "jns 5f\n" "testl $0x200, %1\n\t" /* interrupts were disabled? */ "jz 4f\n\t" - "sti\n" + STI_STRING "\n" "3:\t" "rep;nop\n\t" "cmpl $0, %0\n\t" "jle 3b\n\t" - "cli\n\t" + CLI_STRING "\n\t" "jmp 1b\n" "4:\t" "rep;nop\n\t" @@ -61,7 +61,9 @@ static inline void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long fla "jg 1b\n\t" "jmp 4b\n" "5:\n\t" - : "+m" (lock->slock) : "r" ((unsigned)flags) : "memory"); + : "+m" (lock->slock) + : "r" ((unsigned)flags) CLI_STI_INPUT_ARGS + : "memory" CLI_STI_CLOBBERS); } #endif -- 1.4.4.2 - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] [PATCH 11/24] read/write_crX, clts and wbinvd for 64-bit paravirt
This patch introduces, and patch callers when needed, native
versions for read/write_crX functions, clts and wbinvd.
Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]>
Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]>
Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]>
---
arch/x86/mm/pageattr_64.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/x86/mm/pageattr_64.c b/arch/x86/mm/pageattr_64.c
index 14ab327..3a483a8 100644
--- a/arch/x86/mm/pageattr_64.c
+++ b/arch/x86/mm/pageattr_64.c
@@ -13,6 +13,7 @@
#include
#include
#include
+#include
pte_t *lookup_address(unsigned long address)
{
@@ -84,7 +85,7 @@ static void flush_kernel_map(void *arg)
much cheaper than WBINVD. */
/* clflush is still broken. Disable for now. */
if (1 || !cpu_has_clflush) {
- asm volatile("wbinvd" ::: "memory");
+ wbinvd();
} else {
list_for_each_entry(pg, l, lru) {
void *addr = page_address(pg);
--
1.4.4.2
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[kvm-devel] [PATCH 14/24] export math_state_restore
Export math_state_restore symbol, so it can be used for hypervisors.
They are commonly loaded as modules (lguest being an example).
Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]>
Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]>
Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]>
---
arch/x86/kernel/traps_64.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kernel/traps_64.c b/arch/x86/kernel/traps_64.c
index 4d752a8..0876692 100644
--- a/arch/x86/kernel/traps_64.c
+++ b/arch/x86/kernel/traps_64.c
@@ -1069,6 +1069,7 @@ asmlinkage void math_state_restore(void)
task_thread_info(me)->status |= TS_USEDFPU;
me->fpu_counter++;
}
+EXPORT_SYMBOL_GPL(math_state_restore);
void __init trap_init(void)
{
--
1.4.4.2
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[kvm-devel] [PATCH 13/24] report ring kernel is running without paravirt
When paravirtualization is disabled, the kernel is always running at ring 0. So report it in the appropriate macro Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]> Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]> Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]> --- include/asm-x86/segment_64.h |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/include/asm-x86/segment_64.h b/include/asm-x86/segment_64.h index 04b8ab2..240c1bf 100644 --- a/include/asm-x86/segment_64.h +++ b/include/asm-x86/segment_64.h @@ -50,4 +50,8 @@ #define GDT_SIZE (GDT_ENTRIES * 8) #define TLS_SIZE (GDT_ENTRY_TLS_ENTRIES * 8) +#ifndef CONFIG_PARAVIRT +#define get_kernel_rpl() 0 +#endif + #endif -- 1.4.4.2 - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] [PATCH 7/24] consolidate msr.h
This patch goes one step forward in consolidating the msr.h header.
It shares code between i386 and x86_64, instead of duplicating the
code for tsc reading, msr reading/writing, etc.
Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]>
Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]>
Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]>
---
arch/x86/ia32/syscall32.c|2 +-
arch/x86/kernel/setup64.c|6 +-
arch/x86/kernel/tsc_64.c | 17 +++-
arch/x86/kernel/vsyscall_64.c|4 +-
arch/x86/vdso/vgetcpu.c |4 +-
include/asm-x86/alternative_32.h | 17 +++-
include/asm-x86/alternative_64.h | 27 -
include/asm-x86/msr.h| 225 ++
include/asm-x86/tsc.h| 33 +-
9 files changed, 151 insertions(+), 184 deletions(-)
diff --git a/arch/x86/ia32/syscall32.c b/arch/x86/ia32/syscall32.c
index d751d96..a1247ed 100644
--- a/arch/x86/ia32/syscall32.c
+++ b/arch/x86/ia32/syscall32.c
@@ -82,5 +82,5 @@ void syscall32_cpu_init(void)
checking_wrmsrl(MSR_IA32_SYSENTER_ESP, 0ULL);
checking_wrmsrl(MSR_IA32_SYSENTER_EIP, (u64)ia32_sysenter_target);
- wrmsrl(MSR_CSTAR, ia32_cstar_target);
+ wrmsrl(MSR_CSTAR, (u64)ia32_cstar_target);
}
diff --git a/arch/x86/kernel/setup64.c b/arch/x86/kernel/setup64.c
index 3558ac7..50b7514 100644
--- a/arch/x86/kernel/setup64.c
+++ b/arch/x86/kernel/setup64.c
@@ -122,7 +122,7 @@ void pda_init(int cpu)
asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
/* Memory clobbers used to order PDA accessed */
mb();
- wrmsrl(MSR_GS_BASE, pda);
+ wrmsrl(MSR_GS_BASE, (u64)pda);
mb();
pda->cpunumber = cpu;
@@ -161,8 +161,8 @@ void syscall_init(void)
* but only a 32bit target. LSTAR sets the 64bit rip.
*/
wrmsrl(MSR_STAR, ((u64)__USER32_CS)<<48 | ((u64)__KERNEL_CS)<<32);
- wrmsrl(MSR_LSTAR, system_call);
- wrmsrl(MSR_CSTAR, ignore_sysret);
+ wrmsrl(MSR_LSTAR, (u64)system_call);
+ wrmsrl(MSR_CSTAR, (u64)ignore_sysret);
#ifdef CONFIG_IA32_EMULATION
syscall32_cpu_init ();
diff --git a/arch/x86/kernel/tsc_64.c b/arch/x86/kernel/tsc_64.c
index 9c70af4..4502539 100644
--- a/arch/x86/kernel/tsc_64.c
+++ b/arch/x86/kernel/tsc_64.c
@@ -30,7 +30,7 @@ static unsigned long long cycles_2_ns(unsigned long long cyc)
return (cyc * cyc2ns_scale) >> NS_SCALE;
}
-unsigned long long sched_clock(void)
+unsigned long long native_sched_clock(void)
{
unsigned long a = 0;
@@ -44,6 +44,19 @@ unsigned long long sched_clock(void)
return cycles_2_ns(a);
}
+/* We need to define a real function for sched_clock, to override the
+ weak default version */
+#ifdef CONFIG_PARAVIRT
+unsigned long long sched_clock(void)
+{
+ return paravirt_sched_clock();
+}
+#else
+unsigned long long
+sched_clock(void) __attribute__((alias("native_sched_clock")));
+#endif
+
+
static int tsc_unstable;
inline int check_tsc_unstable(void)
@@ -256,7 +269,7 @@ static cycle_t read_tsc(void)
static cycle_t __vsyscall_fn vread_tsc(void)
{
- cycle_t ret = (cycle_t)get_cycles_sync();
+ cycle_t ret = (cycle_t)vget_cycles_sync();
return ret;
}
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index ad4005c..1425d02 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -190,7 +190,7 @@ time_t __vsyscall(1) vtime(time_t *t)
long __vsyscall(2)
vgetcpu(unsigned *cpu, unsigned *node, struct getcpu_cache *tcache)
{
- unsigned int dummy, p;
+ unsigned int p;
unsigned long j = 0;
/* Fast cache - only recompute value once per jiffies and avoid
@@ -205,7 +205,7 @@ vgetcpu(unsigned *cpu, unsigned *node, struct getcpu_cache
*tcache)
p = tcache->blob[1];
} else if (__vgetcpu_mode == VGETCPU_RDTSCP) {
/* Load per CPU data from RDTSCP */
- rdtscp(dummy, dummy, p);
+ native_read_tscp(&p);
} else {
/* Load per CPU data from GDT */
asm("lsl %1,%0" : "=r" (p) : "r" (__PER_CPU_SEG));
diff --git a/arch/x86/vdso/vgetcpu.c b/arch/x86/vdso/vgetcpu.c
index 91f6e85..61d0def 100644
--- a/arch/x86/vdso/vgetcpu.c
+++ b/arch/x86/vdso/vgetcpu.c
@@ -15,7 +15,7 @@
long __vdso_getcpu(unsigned *cpu, unsigned *node, struct getcpu_cache *tcache)
{
- unsigned int dummy, p;
+ unsigned int p;
unsigned long j = 0;
/* Fast cache - only recompute value once per jiffies and avoid
@@ -30,7 +30,7 @@ long __vdso_getcpu(unsigned *cpu, unsigned *node, struct
getcpu_cache *tcache)
p = tcache->blob[1];
} else if (*vdso_vgetcpu_mode == VGETCPU_RDTSCP) {
/* Load per CPU data from RDTSCP */
- rdtscp(dummy, dummy, p);
+ native_read_tscp(&p);
} else {
[kvm-devel] [PATCH 5/24] smp x86 consolidation
This patch consolidates part of the pieces of smp for both architectures.
(i386 and x86_64). It makes part the calls go through smp_ops, and shares
code for those functions in smpcommon.c
There's more room for code sharing here, but it is left as an exercise to
the reader ;-)
Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]>
Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]>
Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]>
---
arch/x86/kernel/Makefile_32|2 +-
arch/x86/kernel/Makefile_64|2 +-
arch/x86/kernel/smp_32.c | 218 --
arch/x86/kernel/smp_64.c | 245 -
arch/x86/kernel/smpboot_64.c |8 +-
arch/x86/kernel/smpcommon.c| 291
arch/x86/kernel/smpcommon_32.c | 81 ---
include/asm-x86/idle.h | 18 +++-
include/asm-x86/smp.h | 66 +
include/asm-x86/smp_32.h | 58
include/asm-x86/smp_64.h |4 -
11 files changed, 379 insertions(+), 614 deletions(-)
diff --git a/arch/x86/kernel/Makefile_32 b/arch/x86/kernel/Makefile_32
index b08179a..b0da543 100644
--- a/arch/x86/kernel/Makefile_32
+++ b/arch/x86/kernel/Makefile_32
@@ -20,7 +20,7 @@ obj-$(CONFIG_MICROCODE) += microcode.o
obj-$(CONFIG_PCI) += early-quirks.o
obj-$(CONFIG_APM) += apm_32.o
obj-$(CONFIG_X86_SMP) += smp_32.o smpboot_32.o tsc_sync.o
-obj-$(CONFIG_SMP) += smpcommon_32.o
+obj-$(CONFIG_SMP) += smpcommon.o
obj-$(CONFIG_X86_TRAMPOLINE) += trampoline_32.o
obj-$(CONFIG_X86_MPPARSE) += mpparse_32.o
obj-$(CONFIG_X86_LOCAL_APIC) += apic_32.o nmi_32.o
diff --git a/arch/x86/kernel/Makefile_64 b/arch/x86/kernel/Makefile_64
index 686de84..ffee997 100644
--- a/arch/x86/kernel/Makefile_64
+++ b/arch/x86/kernel/Makefile_64
@@ -17,7 +17,7 @@ obj-y += acpi/
obj-$(CONFIG_X86_MSR) += msr.o
obj-$(CONFIG_MICROCODE)+= microcode.o
obj-$(CONFIG_X86_CPUID)+= cpuid.o
-obj-$(CONFIG_SMP) += smp_64.o smpboot_64.o trampoline_64.o
tsc_sync.o
+obj-$(CONFIG_SMP) += smp_64.o smpboot_64.o trampoline_64.o
tsc_sync.o smpcommon.o
obj-y += apic_64.o nmi_64.o
obj-y += io_apic_64.o mpparse_64.o genapic_64.o
genapic_flat_64.o
obj-$(CONFIG_KEXEC)+= machine_kexec_64.o relocate_kernel_64.o
crash.o
diff --git a/arch/x86/kernel/smp_32.c b/arch/x86/kernel/smp_32.c
index fcaa026..a7cc319 100644
--- a/arch/x86/kernel/smp_32.c
+++ b/arch/x86/kernel/smp_32.c
@@ -464,213 +464,6 @@ void flush_tlb_all(void)
on_each_cpu(do_flush_tlb_all, NULL, 1, 1);
}
-/*
- * this function sends a 'reschedule' IPI to another CPU.
- * it goes straight through and wastes no time serializing
- * anything. Worst case is that we lose a reschedule ...
- */
-static void native_smp_send_reschedule(int cpu)
-{
- WARN_ON(cpu_is_offline(cpu));
- send_IPI_mask(cpumask_of_cpu(cpu), RESCHEDULE_VECTOR);
-}
-
-/*
- * Structure and data for smp_call_function(). This is designed to minimise
- * static memory requirements. It also looks cleaner.
- */
-static DEFINE_SPINLOCK(call_lock);
-
-struct call_data_struct {
- void (*func) (void *info);
- void *info;
- atomic_t started;
- atomic_t finished;
- int wait;
-};
-
-void lock_ipi_call_lock(void)
-{
- spin_lock_irq(&call_lock);
-}
-
-void unlock_ipi_call_lock(void)
-{
- spin_unlock_irq(&call_lock);
-}
-
-static struct call_data_struct *call_data;
-
-static void __smp_call_function(void (*func) (void *info), void *info,
- int nonatomic, int wait)
-{
- struct call_data_struct data;
- int cpus = num_online_cpus() - 1;
-
- if (!cpus)
- return;
-
- data.func = func;
- data.info = info;
- atomic_set(&data.started, 0);
- data.wait = wait;
- if (wait)
- atomic_set(&data.finished, 0);
-
- call_data = &data;
- mb();
-
- /* Send a message to all other CPUs and wait for them to respond */
- send_IPI_allbutself(CALL_FUNCTION_VECTOR);
-
- /* Wait for response */
- while (atomic_read(&data.started) != cpus)
- cpu_relax();
-
- if (wait)
- while (atomic_read(&data.finished) != cpus)
- cpu_relax();
-}
-
-
-/**
- * smp_call_function_mask(): Run a function on a set of other CPUs.
- * @mask: The set of cpus to run on. Must not include the current cpu.
- * @func: The function to run. This must be fast and non-blocking.
- * @info: An arbitrary pointer to pass to the function.
- * @wait: If true, wait (atomically) until function has completed on other
CPUs.
- *
- * Returns 0 on success, else a negative status code.
- *
- * If @wait is true, then returns once @func has returned; ot
[kvm-devel] [PATCH 15/24] native versions for set pagetables
This patch turns the set_p{te,md,ud,gd} functions into their
native_ versions. There is no need to patch any caller.
Also, it adds pte_update() and pte_update_defer() calls whenever
we modify a page table entry. This last part was coded to match
i386 as close as possible.
Pieces of the header are moved to below the #ifdef CONFIG_PARAVIRT
site, as they are users of the newly defined set_* macros.
Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]>
Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]>
Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]>
---
include/asm-x86/pgtable_64.h | 192 --
1 files changed, 128 insertions(+), 64 deletions(-)
diff --git a/include/asm-x86/pgtable_64.h b/include/asm-x86/pgtable_64.h
index 9b0ff47..592d613 100644
--- a/include/asm-x86/pgtable_64.h
+++ b/include/asm-x86/pgtable_64.h
@@ -57,56 +57,107 @@ extern unsigned long
empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
*/
#define PTRS_PER_PTE 512
-#ifndef __ASSEMBLY__
+#ifdef CONFIG_PARAVIRT
+#include
+#else
+
+#define set_pte native_set_pte
+#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
+#define set_pmd native_set_pmd
+#define set_pud native_set_pud
+#define set_pgd native_set_pgd
+#define pte_clear(mm, addr, xp)\
+do { \
+ set_pte_at(mm, addr, xp, __pte(0)); \
+} while (0)
-#define pte_ERROR(e) \
- printk("%s:%d: bad pte %p(%016lx).\n", __FILE__, __LINE__, &(e),
pte_val(e))
-#define pmd_ERROR(e) \
- printk("%s:%d: bad pmd %p(%016lx).\n", __FILE__, __LINE__, &(e),
pmd_val(e))
-#define pud_ERROR(e) \
- printk("%s:%d: bad pud %p(%016lx).\n", __FILE__, __LINE__, &(e),
pud_val(e))
-#define pgd_ERROR(e) \
- printk("%s:%d: bad pgd %p(%016lx).\n", __FILE__, __LINE__, &(e),
pgd_val(e))
+#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
+#define pud_clear native_pud_clear
+#define pgd_clear native_pgd_clear
+#define pte_update(mm, addr, ptep) do { } while (0)
+#define pte_update_defer(mm, addr, ptep)do { } while (0)
-#define pgd_none(x)(!pgd_val(x))
-#define pud_none(x)(!pud_val(x))
+#endif
-static inline void set_pte(pte_t *dst, pte_t val)
+#ifndef __ASSEMBLY__
+
+static inline void native_set_pte(pte_t *dst, pte_t val)
{
- pte_val(*dst) = pte_val(val);
+ dst->pte = pte_val(val);
}
-#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
-static inline void set_pmd(pmd_t *dst, pmd_t val)
+static inline void native_set_pmd(pmd_t *dst, pmd_t val)
{
-pmd_val(*dst) = pmd_val(val);
+ dst->pmd = pmd_val(val);
}
-static inline void set_pud(pud_t *dst, pud_t val)
+static inline void native_set_pud(pud_t *dst, pud_t val)
{
- pud_val(*dst) = pud_val(val);
+ dst->pud = pud_val(val);
}
-static inline void pud_clear (pud_t *pud)
+static inline void native_set_pgd(pgd_t *dst, pgd_t val)
{
- set_pud(pud, __pud(0));
+ dst->pgd = pgd_val(val);
}
-static inline void set_pgd(pgd_t *dst, pgd_t val)
+static inline void native_pud_clear(pud_t *pud)
{
- pgd_val(*dst) = pgd_val(val);
-}
+ set_pud(pud, __pud(0));
+}
-static inline void pgd_clear (pgd_t * pgd)
+static inline void native_pgd_clear(pgd_t *pgd)
{
set_pgd(pgd, __pgd(0));
}
-#define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte, 0))
+static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
+pte_t *ptep, pte_t pteval)
+{
+ native_set_pte(ptep, pteval);
+}
+
+static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr,
+ pte_t *ptep)
+{
+ native_set_pte_at(mm, addr, ptep, __pte(0));
+}
+
+static inline void native_pmd_clear(pmd_t *pmd)
+{
+ native_set_pmd(pmd, __pmd(0));
+}
+
+
+#define pte_ERROR(e) \
+ printk("%s:%d: bad pte %p(%016llx).\n", \
+ __FILE__, __LINE__, &(e), (u64)pte_val(e))
+#define pmd_ERROR(e) \
+ printk("%s:%d: bad pmd %p(%016llx).\n", \
+ __FILE__, __LINE__, &(e), (u64)pmd_val(e))
+#define pud_ERROR(e) \
+ printk("%s:%d: bad pud %p(%016llx).\n", \
+__FILE__, __LINE__, &(e), (u64)pud_val(e))
+#define pgd_ERROR(e) \
+ printk("%s:%d: bad pgd %p(%016llx).\n", \
+ __FILE__, __LINE__, &(e), (u64)pgd_val(e))
+
+#define pgd_none(x)(!pgd_val(x))
+#define pud_none(x)(!pud_val(x))
struct mm_struct;
-static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned
long addr, pte_t *ptep, int full)
+static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
+ unsigned long addr, pte_t *ptep)
+{
+ pte_t pte = __pte(xchg(&ptep->
[kvm-devel] [PATCH 19/24] turn priviled operation into a macro in head_64.S
under paravirt, read cr2 cannot be issued directly anymore. So wrap it in a macro, defined to the operation itself in case paravirt is off, but to something else if we have paravirt in the game Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]> Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]> Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]> --- arch/x86/kernel/head_64.S |9 - 1 files changed, 8 insertions(+), 1 deletions(-) diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index b6167fe..c31b1c9 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S @@ -19,6 +19,13 @@ #include #include +#ifdef CONFIG_PARAVIRT +#include +#include +#else +#define GET_CR2_INTO_RCX movq %cr2, %rcx +#endif + /* we are not able to switch in one step to the final KERNEL ADRESS SPACE * because we need identity-mapped pages. * @@ -267,7 +274,7 @@ ENTRY(early_idt_handler) xorl %eax,%eax movq 8(%rsp),%rsi # get rip movq (%rsp),%rdx - movq %cr2,%rcx + GET_CR2_INTO_RCX leaq early_idt_msg(%rip),%rdi call early_printk cmpl $2,early_recursion_flag(%rip) -- 1.4.4.2 - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] [PATCH 17/24] This patch add provisions for time related functions so they
can be later replaced by paravirt versions.
it basically encloses {g,s}et_wallclock inside the
already existent functions update_persistent_clock and
read_persistent_clock, and defines {s,g}et_wallclock
to the core of such functions.
it also allow for a later-on-game time initialization, as done
by i386. Paravirt guests can set a function to do their own
initialization this way.
Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]>
Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]>
Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]>
---
arch/x86/kernel/time_64.c | 12 +---
include/asm-x86/time.h| 26 +-
2 files changed, 30 insertions(+), 8 deletions(-)
diff --git a/arch/x86/kernel/time_64.c b/arch/x86/kernel/time_64.c
index f88bf6b..89943d8 100644
--- a/arch/x86/kernel/time_64.c
+++ b/arch/x86/kernel/time_64.c
@@ -21,6 +21,8 @@
#include
#include
#include
+#include
+#include
volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
@@ -54,7 +56,7 @@ static irqreturn_t timer_event_interrupt(int irq, void
*dev_id)
/* calibrate_cpu is used on systems with fixed rate TSCs to determine
* processor frequency */
#define TICK_COUNT 1
-static unsigned int __init tsc_calibrate_cpu_khz(void)
+unsigned long __init native_calculate_cpu_khz(void)
{
int tsc_start, tsc_now;
int i, no_ctr_free;
@@ -104,20 +106,23 @@ static struct irqaction irq0 = {
.name = "timer"
};
-void __init time_init(void)
+void __init hpet_time_init(void)
{
if (!hpet_enable())
setup_pit_timer();
setup_irq(0, &irq0);
+}
+void __init time_init(void)
+{
tsc_calibrate();
cpu_khz = tsc_khz;
if (cpu_has(&boot_cpu_data, X86_FEATURE_CONSTANT_TSC) &&
boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
boot_cpu_data.x86 == 16)
- cpu_khz = tsc_calibrate_cpu_khz();
+ cpu_khz = calculate_cpu_khz();
if (unsynchronized_tsc())
mark_tsc_unstable("TSCs unsynchronized");
@@ -130,4 +135,5 @@ void __init time_init(void)
printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
cpu_khz / 1000, cpu_khz % 1000);
init_tsc_clocksource();
+ late_time_init = choose_time_init();
}
diff --git a/include/asm-x86/time.h b/include/asm-x86/time.h
index b3f94cd..68779b0 100644
--- a/include/asm-x86/time.h
+++ b/include/asm-x86/time.h
@@ -1,8 +1,12 @@
-#ifndef _ASMi386_TIME_H
-#define _ASMi386_TIME_H
+#ifndef _ASMX86_TIME_H
+#define _ASMX86_TIME_H
+
+extern void (*late_time_init)(void);
+extern void hpet_time_init(void);
-#include
#include
+#ifdef CONFIG_X86_32
+#include
static inline unsigned long native_get_wallclock(void)
{
@@ -28,8 +32,20 @@ static inline int native_set_wallclock(unsigned long nowtime)
return retval;
}
-extern void (*late_time_init)(void);
-extern void hpet_time_init(void);
+#else
+extern void native_time_init_hook(void);
+
+static inline unsigned long native_get_wallclock(void)
+{
+ return mach_get_cmos_time();
+}
+
+static inline int native_set_wallclock(unsigned long nowtime)
+{
+ return mach_set_rtc_mmss(nowtime);
+}
+
+#endif
#ifdef CONFIG_PARAVIRT
#include
--
1.4.4.2
-
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[kvm-devel] [PATCH 22/24] prepare x86_64 architecture initialization for paravirt
This patch prepares the x86_64 architecture initialization for
paravirt. It requires a memory initialization step, which is done
by implementing 64-bit version for machine_specific_memory_setup,
and putting an ARCH_SETUP hook, for guest-dependent initialization.
This last step is done akin to i386
Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]>
Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]>
Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]>
---
arch/x86/kernel/e820_64.c |9 +++--
arch/x86/kernel/setup_64.c | 28 +++-
include/asm-x86/setup.h| 11 ---
3 files changed, 42 insertions(+), 6 deletions(-)
diff --git a/arch/x86/kernel/e820_64.c b/arch/x86/kernel/e820_64.c
index 0128b0b..eed900b 100644
--- a/arch/x86/kernel/e820_64.c
+++ b/arch/x86/kernel/e820_64.c
@@ -639,8 +639,10 @@ void early_panic(char *msg)
panic(msg);
}
-void __init setup_memory_region(void)
+/* We're not void only for x86 32-bit compat */
+char * __init machine_specific_memory_setup(void)
{
+ char *who = "BIOS-e820";
/*
* Try to copy the BIOS-supplied E820-map.
*
@@ -651,7 +653,10 @@ void __init setup_memory_region(void)
if (copy_e820_map(boot_params.e820_map, boot_params.e820_entries) < 0)
early_panic("Cannot find a valid memory map");
printk(KERN_INFO "BIOS-provided physical RAM map:\n");
- e820_print_map("BIOS-e820");
+ e820_print_map(who);
+
+ /* In case someone cares... */
+ return who;
}
static int __init parse_memopt(char *p)
diff --git a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c
index 2451a63..1c9f237 100644
--- a/arch/x86/kernel/setup_64.c
+++ b/arch/x86/kernel/setup_64.c
@@ -39,6 +39,7 @@
#include
#include
#include
+#include
#include
#include
@@ -61,6 +62,12 @@
#include
#include
+#ifdef CONFIG_PARAVIRT
+#include
+#else
+#define ARCH_SETUP
+#endif
+
/*
* Machine setup..
*/
@@ -244,6 +251,16 @@ static void discover_ebda(void)
* 4K EBDA area at 0x40E
*/
ebda_addr = *(unsigned short *)__va(EBDA_ADDR_POINTER);
+ /*
+* There can be some situations, like paravirtualized guests,
+* in which there is no available ebda information. In such
+* case, just skip it
+*/
+ if (!ebda_addr) {
+ ebda_size = 0;
+ return;
+ }
+
ebda_addr <<= 4;
ebda_size = *(unsigned short *)__va(ebda_addr);
@@ -257,6 +274,12 @@ static void discover_ebda(void)
ebda_size = 64*1024;
}
+/* Overridden in paravirt.c if CONFIG_PARAVIRT */
+void __attribute__((weak)) memory_setup(void)
+{
+ machine_specific_memory_setup();
+}
+
void __init setup_arch(char **cmdline_p)
{
printk(KERN_INFO "Command line: %s\n", boot_command_line);
@@ -272,7 +295,10 @@ void __init setup_arch(char **cmdline_p)
rd_prompt = ((boot_params.hdr.ram_size & RAMDISK_PROMPT_FLAG) != 0);
rd_doload = ((boot_params.hdr.ram_size & RAMDISK_LOAD_FLAG) != 0);
#endif
- setup_memory_region();
+
+ ARCH_SETUP
+
+ memory_setup();
copy_edd();
if (!boot_params.hdr.root_flags)
diff --git a/include/asm-x86/setup.h b/include/asm-x86/setup.h
index 24d786e..071e054 100644
--- a/include/asm-x86/setup.h
+++ b/include/asm-x86/setup.h
@@ -3,6 +3,13 @@
#define COMMAND_LINE_SIZE 2048
+#ifndef __ASSEMBLY__
+char *machine_specific_memory_setup(void);
+#ifndef CONFIG_PARAVIRT
+#define paravirt_post_allocator_init() do {} while (0)
+#endif
+#endif /* __ASSEMBLY__ */
+
#ifdef __KERNEL__
#ifdef __i386__
@@ -51,9 +58,7 @@ void __init add_memory_region(unsigned long long start,
extern unsigned long init_pg_tables_end;
-#ifndef CONFIG_PARAVIRT
-#define paravirt_post_allocator_init() do {} while (0)
-#endif
+
#endif /* __i386__ */
#endif /* _SETUP */
--
1.4.4.2
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[kvm-devel] [PATCH 21/24] native versions for page table entries values
This patch turns the page operations (set and make a page table)
into native_ versions. The operations itself will be later
overriden by paravirt.
It uses unsigned long long for consistency with 32-bit. So we
have to fix fault_64.c to get rid of warnings.
Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]>
Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]>
Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]>
---
arch/x86/mm/fault_64.c|8 +++---
include/asm-x86/page_64.h | 56 +
2 files changed, 55 insertions(+), 9 deletions(-)
diff --git a/arch/x86/mm/fault_64.c b/arch/x86/mm/fault_64.c
index 161c0d1..86b7307 100644
--- a/arch/x86/mm/fault_64.c
+++ b/arch/x86/mm/fault_64.c
@@ -157,22 +157,22 @@ void dump_pagetable(unsigned long address)
pgd = __va((unsigned long)pgd & PHYSICAL_PAGE_MASK);
pgd += pgd_index(address);
if (bad_address(pgd)) goto bad;
- printk("PGD %lx ", pgd_val(*pgd));
+ printk("PGD %llx ", pgd_val(*pgd));
if (!pgd_present(*pgd)) goto ret;
pud = pud_offset(pgd, address);
if (bad_address(pud)) goto bad;
- printk("PUD %lx ", pud_val(*pud));
+ printk("PUD %llx ", pud_val(*pud));
if (!pud_present(*pud)) goto ret;
pmd = pmd_offset(pud, address);
if (bad_address(pmd)) goto bad;
- printk("PMD %lx ", pmd_val(*pmd));
+ printk("PMD %llx ", pmd_val(*pmd));
if (!pmd_present(*pmd) || pmd_large(*pmd)) goto ret;
pte = pte_offset_kernel(pmd, address);
if (bad_address(pte)) goto bad;
- printk("PTE %lx", pte_val(*pte));
+ printk("PTE %llx", pte_val(*pte));
ret:
printk("\n");
return;
diff --git a/include/asm-x86/page_64.h b/include/asm-x86/page_64.h
index 6fdc904..b8da60c 100644
--- a/include/asm-x86/page_64.h
+++ b/include/asm-x86/page_64.h
@@ -65,16 +65,62 @@ typedef struct { unsigned long pgprot; } pgprot_t;
extern unsigned long phys_base;
-#define pte_val(x) ((x).pte)
-#define pmd_val(x) ((x).pmd)
-#define pud_val(x) ((x).pud)
-#define pgd_val(x) ((x).pgd)
-#define pgprot_val(x) ((x).pgprot)
+static inline unsigned long long native_pte_val(pte_t pte)
+{
+ return pte.pte;
+}
+
+static inline unsigned long long native_pud_val(pud_t pud)
+{
+ return pud.pud;
+}
+
+
+static inline unsigned long long native_pmd_val(pmd_t pmd)
+{
+ return pmd.pmd;
+}
+
+static inline unsigned long long native_pgd_val(pgd_t pgd)
+{
+ return pgd.pgd;
+}
+
+static inline pte_t native_make_pte(unsigned long long pte)
+{
+ return (pte_t){ pte };
+}
+
+static inline pud_t native_make_pud(unsigned long long pud)
+{
+ return (pud_t){ pud };
+}
+
+static inline pmd_t native_make_pmd(unsigned long long pmd)
+{
+ return (pmd_t){ pmd };
+}
+
+static inline pgd_t native_make_pgd(unsigned long long pgd)
+{
+ return (pgd_t){ pgd };
+}
+
+#ifdef CONFIG_PARAVIRT
+#include
+#else
+#define pte_val(x) native_pte_val(x)
+#define pmd_val(x) native_pmd_val(x)
+#define pud_val(x) native_pud_val(x)
+#define pgd_val(x) native_pgd_val(x)
#define __pte(x) ((pte_t) { (x) } )
#define __pmd(x) ((pmd_t) { (x) } )
#define __pud(x) ((pud_t) { (x) } )
#define __pgd(x) ((pgd_t) { (x) } )
+#endif /* CONFIG_PARAVIRT */
+
+#define pgprot_val(x) ((x).pgprot)
#define __pgprot(x)((pgprot_t) { (x) } )
#endif /* !__ASSEMBLY__ */
--
1.4.4.2
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[kvm-devel] [PATCH 16/24] add native functions for descriptors handling
This patch turns the basic descriptor handling into native_
functions. It is basically write_idt, load_idt, write_gdt,
load_gdt, set_ldt, store_tr, load_tls, and the ones
for updating a single entry.
In the process of doing that, we change the definition of
load_LDT_nolock, and caller sites have to be patched. We
also patch call sites that now needs a typecast.
Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]>
Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]>
Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]>
---
include/asm-x86/desc.h | 59
include/asm-x86/desc_32.h| 45 -
include/asm-x86/desc_64.h| 191 ++---
include/asm-x86/mmu_context_64.h | 23 -
4 files changed, 169 insertions(+), 149 deletions(-)
diff --git a/include/asm-x86/desc.h b/include/asm-x86/desc.h
index 6065c50..276dc6e 100644
--- a/include/asm-x86/desc.h
+++ b/include/asm-x86/desc.h
@@ -1,5 +1,64 @@
+#ifndef _ASM_DESC_H_
+#define _ASM_DESC_H_
+
#ifdef CONFIG_X86_32
# include "desc_32.h"
#else
# include "desc_64.h"
#endif
+
+#ifndef __ASSEMBLY__
+#define LDT_entry_a(info) \
+ info)->base_addr & 0x) << 16) | ((info)->limit & 0x0))
+
+#define LDT_entry_b(info) \
+ (((info)->base_addr & 0xff00) | \
+ (((info)->base_addr & 0x00ff) >> 16) | \
+ ((info)->limit & 0xf) | \
+ (((info)->read_exec_only ^ 1) << 9) | \
+ ((info)->contents << 10) | \
+ (((info)->seg_not_present ^ 1) << 15) | \
+ ((info)->seg_32bit << 22) | \
+ ((info)->limit_in_pages << 23) | \
+ ((info)->useable << 20) | \
+ 0x7000)
+
+#define _LDT_empty(info) (\
+ (info)->base_addr == 0&& \
+ (info)->limit == 0&& \
+ (info)->contents== 0&& \
+ (info)->read_exec_only == 1&& \
+ (info)->seg_32bit == 0&& \
+ (info)->limit_in_pages == 0&& \
+ (info)->seg_not_present == 1&& \
+ (info)->useable == 0)
+
+#ifdef CONFIG_X86_64
+#define LDT_empty(info) (_LDT_empty(info) && ((info)->lm == 0))
+#else
+#define LDT_empty(info) _LDT_empty(info)
+#endif
+
+static inline void clear_LDT(void)
+{
+ set_ldt(NULL, 0);
+}
+
+/*
+ * load one particular LDT into the current CPU
+ */
+static inline void load_LDT_nolock(mm_context_t *pc)
+{
+ set_ldt(pc->ldt, pc->size);
+}
+
+static inline void load_LDT(mm_context_t *pc)
+{
+ preempt_disable();
+ load_LDT_nolock(pc);
+ preempt_enable();
+}
+
+#endif /* __ASSEMBLY__ */
+
+#endif
diff --git a/include/asm-x86/desc_32.h b/include/asm-x86/desc_32.h
index c547403..84bb843 100644
--- a/include/asm-x86/desc_32.h
+++ b/include/asm-x86/desc_32.h
@@ -162,51 +162,6 @@ static inline void __set_tss_desc(unsigned int cpu,
unsigned int entry, const vo
#define set_tss_desc(cpu,addr) __set_tss_desc(cpu, GDT_ENTRY_TSS, addr)
-#define LDT_entry_a(info) \
- info)->base_addr & 0x) << 16) | ((info)->limit & 0x0))
-
-#define LDT_entry_b(info) \
- (((info)->base_addr & 0xff00) | \
- (((info)->base_addr & 0x00ff) >> 16) | \
- ((info)->limit & 0xf) | \
- (((info)->read_exec_only ^ 1) << 9) | \
- ((info)->contents << 10) | \
- (((info)->seg_not_present ^ 1) << 15) | \
- ((info)->seg_32bit << 22) | \
- ((info)->limit_in_pages << 23) | \
- ((info)->useable << 20) | \
- 0x7000)
-
-#define LDT_empty(info) (\
- (info)->base_addr == 0&& \
- (info)->limit == 0&& \
- (info)->contents== 0&& \
- (info)->read_exec_only == 1&& \
- (info)->seg_32bit == 0&& \
- (info)->limit_in_pages == 0&& \
- (info)->seg_not_present == 1&& \
- (info)->useable == 0)
-
-static inline void clear_LDT(void)
-{
- set_ldt(NULL, 0);
-}
-
-/*
- * load one particular LDT into the current CPU
- */
-static inline void load_LDT_nolock(mm_context_t *pc)
-{
- set_ldt(pc->ldt, pc->size);
-}
-
-static inline void load_LDT(mm_context_t *pc)
-{
- preempt_disable();
- load_LDT_nolock(pc);
- preempt_enable();
-}
-
static inline unsigned long get_desc_base(unsigned long *desc)
{
unsigned long base;
diff --git a/include/asm-x86/desc_64.h b/include/asm-x86/desc_64.h
index 7d48df7..d12cd07 100644
--- a/include/asm-x86/desc_64.h
+++ b/include/asm-x86/desc_64.h
@@ -16,11 +16,12 @@
extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
-#define load_TR_desc() asm volatile("ltr %w0"::"r" (GDT_ENTRY_TSS*8))
-#define load_LDT_desc() asm volatile("lldt %w0"::"r" (GDT_ENTRY_LDT*8))
-#define clear_LDT() asm volatile("lldt %w0"::"r" (0))
+static inline void native_load_tr_desc(void)
+{
+ asm volatile("ltr %w0"::"r" (GDT_ENTRY_TSS*8));
+}
-static inline unsigned long __store_tr(void)
+static inline unsigned long native_store_tr(void)
{
[kvm-devel] [PATCH 18/24] export cpu_gdt_descr
With paravirualization, hypervisors needs to handle the gdt, that was right to this point only used at very early inialization code. Hypervisors (lguest being the current case) are commonly modules, so make it an export Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]> Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]> Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]> --- arch/x86/kernel/x8664_ksyms_64.c |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/arch/x86/kernel/x8664_ksyms_64.c b/arch/x86/kernel/x8664_ksyms_64.c index 105712e..f97aed4 100644 --- a/arch/x86/kernel/x8664_ksyms_64.c +++ b/arch/x86/kernel/x8664_ksyms_64.c @@ -8,6 +8,7 @@ #include #include #include +#include EXPORT_SYMBOL(kernel_thread); @@ -51,3 +52,8 @@ EXPORT_SYMBOL(__memcpy); EXPORT_SYMBOL(load_gs_index); EXPORT_SYMBOL(_proxy_pda); + +#ifdef CONFIG_PARAVIRT +/* Virtualized guests may want to use it */ +EXPORT_SYMBOL_GPL(cpu_gdt_descr); +#endif -- 1.4.4.2 - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] [PATCH 20/24] tweak io_64.h for paravirt.
We need something here because we can't call in and out instructions
directly. However, we have to be careful, because no indirections are
allowed in misc_64.c , and paravirt_ops is a kind of one. So just
call it directly there
Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]>
Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]>
Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]>
---
arch/x86/boot/compressed/misc_64.c |6 +
include/asm-x86/io_64.h| 37 +--
2 files changed, 36 insertions(+), 7 deletions(-)
diff --git a/arch/x86/boot/compressed/misc_64.c
b/arch/x86/boot/compressed/misc_64.c
index 6ea015a..6640a17 100644
--- a/arch/x86/boot/compressed/misc_64.c
+++ b/arch/x86/boot/compressed/misc_64.c
@@ -9,6 +9,12 @@
* High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996
*/
+/*
+ * we have to be careful, because no indirections are allowed here, and
+ * paravirt_ops is a kind of one. As it will only run in baremetal anyway,
+ * we just keep it from happening
+ */
+#undef CONFIG_PARAVIRT
#define _LINUX_STRING_H_ 1
#define __LINUX_BITMAP_H 1
diff --git a/include/asm-x86/io_64.h b/include/asm-x86/io_64.h
index a037b07..57fcdd9 100644
--- a/include/asm-x86/io_64.h
+++ b/include/asm-x86/io_64.h
@@ -35,12 +35,24 @@
* - Arnaldo Carvalho de Melo <[EMAIL PROTECTED]>
*/
-#define __SLOW_DOWN_IO "\noutb %%al,$0x80"
+static inline void native_io_delay(void)
+{
+ asm volatile("outb %%al,$0x80" : : : "memory");
+}
-#ifdef REALLY_SLOW_IO
-#define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO
__SLOW_DOWN_IO
+#if defined(CONFIG_PARAVIRT)
+#include
#else
-#define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO
+
+static inline void slow_down_io(void)
+{
+ native_io_delay();
+#ifdef REALLY_SLOW_IO
+ native_io_delay();
+ native_io_delay();
+ native_io_delay();
+#endif
+}
#endif
/*
@@ -52,9 +64,15 @@ static inline void out##s(unsigned x value, unsigned short
port) {
#define __OUT2(s,s1,s2) \
__asm__ __volatile__ ("out" #s " %" s1 "0,%" s2 "1"
+#ifndef REALLY_SLOW_IO
+#define REALLY_SLOW_IO
+#define UNSET_REALLY_SLOW_IO
+#endif
+
#define __OUT(s,s1,x) \
__OUT1(s,x) __OUT2(s,s1,"w") : : "a" (value), "Nd" (port)); } \
-__OUT1(s##_p,x) __OUT2(s,s1,"w") __FULL_SLOW_DOWN_IO : : "a" (value), "Nd"
(port));} \
+__OUT1(s##_p, x) __OUT2(s, s1, "w") : : "a" (value), "Nd" (port)); \
+ slow_down_io(); }
#define __IN1(s) \
static inline RETURN_TYPE in##s(unsigned short port) { RETURN_TYPE _v;
@@ -63,8 +81,13 @@ static inline RETURN_TYPE in##s(unsigned short port) {
RETURN_TYPE _v;
__asm__ __volatile__ ("in" #s " %" s2 "1,%" s1 "0"
#define __IN(s,s1,i...) \
-__IN1(s) __IN2(s,s1,"w") : "=a" (_v) : "Nd" (port) ,##i ); return _v; } \
-__IN1(s##_p) __IN2(s,s1,"w") __FULL_SLOW_DOWN_IO : "=a" (_v) : "Nd" (port)
,##i ); return _v; } \
+__IN1(s) __IN2(s, s1, "w") : "=a" (_v) : "Nd" (port), ##i); return _v; } \
+__IN1(s##_p) __IN2(s, s1, "w") : "=a" (_v) : "Nd" (port), ##i); \
+ slow_down_io(); return _v; }
+
+#ifdef UNSET_REALLY_SLOW_IO
+#undef REALLY_SLOW_IO
+#endif
#define __INS(s) \
static inline void ins##s(unsigned short port, void * addr, unsigned long
count) \
--
1.4.4.2
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[kvm-devel] [PATCH 24/24] make vsmp a paravirt client
This patch makes vsmp a paravirt client. It now uses the whole
infrastructure provided by pvops. When we detect we're running
a vsmp box, we change the irq-related paravirt operations (and so,
it have to happen quite early), and the patching function
Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]>
Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]>
Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]>
---
arch/x86/Kconfig.x86_64 |3 +-
arch/x86/kernel/Makefile_64 |3 +-
arch/x86/kernel/setup_64.c |2 +
arch/x86/kernel/vsmp_64.c | 82 +-
include/asm-x86/setup.h |6 ++-
5 files changed, 80 insertions(+), 16 deletions(-)
diff --git a/arch/x86/Kconfig.x86_64 b/arch/x86/Kconfig.x86_64
index 568ba7a..fe4ef61 100644
--- a/arch/x86/Kconfig.x86_64
+++ b/arch/x86/Kconfig.x86_64
@@ -148,15 +148,14 @@ config X86_PC
bool "PC-compatible"
help
Choose this option if your computer is a standard PC or compatible.
-
config X86_VSMP
bool "Support for ScaleMP vSMP"
depends on PCI
+ select PARAVIRT
help
Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is
supposed to run on these EM64T-based machines. Only choose this
option
if you have one of these machines.
-
endchoice
choice
diff --git a/arch/x86/kernel/Makefile_64 b/arch/x86/kernel/Makefile_64
index 0714528..34e5c7d 100644
--- a/arch/x86/kernel/Makefile_64
+++ b/arch/x86/kernel/Makefile_64
@@ -8,7 +8,7 @@ obj-y := process_64.o signal_64.o entry_64.o traps_64.o
irq_64.o \
x8664_ksyms_64.o i387_64.o syscall_64.o vsyscall_64.o \
setup64.o bootflag.o e820_64.o reboot_64.o quirks.o i8237.o \
pci-dma_64.o pci-nommu_64.o alternative.o hpet.o tsc_64.o
bugs_64.o \
- i8253.o rtc.o
+ i8253.o rtc.o vsmp_64.o
obj-$(CONFIG_STACKTRACE) += stacktrace.o
obj-y += cpu/
@@ -29,7 +29,6 @@ obj-$(CONFIG_CALGARY_IOMMU) += pci-calgary_64.o tce_64.o
obj-$(CONFIG_SWIOTLB) += pci-swiotlb_64.o
obj-$(CONFIG_KPROBES) += kprobes_64.o
obj-$(CONFIG_X86_PM_TIMER) += pmtimer_64.o
-obj-$(CONFIG_X86_VSMP) += vsmp_64.o
obj-$(CONFIG_K8_NB)+= k8.o
obj-$(CONFIG_AUDIT)+= audit_64.o
diff --git a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c
index 1c9f237..8cc5915 100644
--- a/arch/x86/kernel/setup_64.c
+++ b/arch/x86/kernel/setup_64.c
@@ -338,6 +338,8 @@ void __init setup_arch(char **cmdline_p)
init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
+ vsmp_init();
+
dmi_scan_machine();
#ifdef CONFIG_SMP
diff --git a/arch/x86/kernel/vsmp_64.c b/arch/x86/kernel/vsmp_64.c
index d971210..24b0541 100644
--- a/arch/x86/kernel/vsmp_64.c
+++ b/arch/x86/kernel/vsmp_64.c
@@ -8,31 +8,95 @@
*
* Ravikiran Thirumalai <[EMAIL PROTECTED]>,
* Shai Fultheim <[EMAIL PROTECTED]>
+ * Paravirt ops integration: Glauber de Oliveira Costa <[EMAIL PROTECTED]>
*/
-
#include
#include
#include
#include
#include
+#include
+
+/*
+ * Interrupt control for the VSMP architecture:
+ */
+
+static inline unsigned long vsmp_save_fl(void)
+{
+ unsigned long flags = native_save_fl();
+
+ if (!(flags & X86_EFLAGS_AC))
+ return X86_EFLAGS_IF;
+ return 0;
+}
+
+static inline void vsmp_restore_fl(unsigned long flags)
+{
+ if (flags & X86_EFLAGS_IF)
+ flags &= ~X86_EFLAGS_AC;
+ if (!(flags & X86_EFLAGS_IF))
+ flags &= X86_EFLAGS_AC;
+ native_restore_fl(flags);
+}
+
+static inline void vsmp_irq_disable(void)
+{
+ unsigned long flags = native_save_fl();
-static int __init vsmp_init(void)
+ vsmp_restore_fl(flags & ~X86_EFLAGS_IF);
+}
+
+static inline void vsmp_irq_enable(void)
+{
+ unsigned long flags = native_save_fl();
+
+ vsmp_restore_fl(flags | X86_EFLAGS_IF);
+}
+
+#ifdef CONFIG_PARAVIRT
+static unsigned __init vsmp_patch(u8 type, u16 clobbers, void *ibuf,
+ unsigned long addr, unsigned len)
+{
+ switch (type) {
+ case PARAVIRT_PATCH(pv_irq_ops.irq_enable):
+ case PARAVIRT_PATCH(pv_irq_ops.irq_disable):
+ case PARAVIRT_PATCH(pv_irq_ops.save_fl):
+ case PARAVIRT_PATCH(pv_irq_ops.restore_fl):
+ return paravirt_patch_default(type, clobbers, ibuf, addr, len);
+ default:
+ return native_patch(type, clobbers, ibuf, addr, len);
+ }
+
+}
+#endif
+
+void __init vsmp_init(void)
{
void *address;
- unsigned int cap, ctl;
+ unsigned int cap, ctl, cfg;
if (!early_pci_allowed())
- return 0;
+ return;
/* Check if we are running on a ScaleMP vSMP box */
if ((read_pci_config_16(0, 0x1f, 0, PCI_VENDOR_ID) !=
PCI_VENDOR_ID_SCALEMP) ||
(read_pci_config_16(0, 0x1f, 0,
[kvm-devel] [PATCH 6/24] Add debugreg/load_rsp native hooks
This patch adds native hooks for debugreg handling functions,
and for the native load_rsp0 function. The later also have its
call sites patched. There's some room for consolidation in the
processor*.h headers, and it is done, for paravirt related functions
Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]>
Signed-off-by: Steven Rostedt <[EMAIL PROTECTED]>
Acked-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]>
---
arch/x86/kernel/process_64.c |2 +-
arch/x86/kernel/smpboot_64.c |2 +-
include/asm-x86/msr.h | 67 --
include/asm-x86/processor.h| 146
include/asm-x86/processor_32.h | 138 +-
include/asm-x86/processor_64.h | 32 -
6 files changed, 165 insertions(+), 222 deletions(-)
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 6472f37..9647a10 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -589,7 +589,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct
*next_p)
/*
* Reload esp0, LDT and the page table pointer:
*/
- tss->rsp0 = next->rsp0;
+ load_esp0(tss, next);
/*
* Switch DS and ES.
diff --git a/arch/x86/kernel/smpboot_64.c b/arch/x86/kernel/smpboot_64.c
index 17e54fa..8fb0f90 100644
--- a/arch/x86/kernel/smpboot_64.c
+++ b/arch/x86/kernel/smpboot_64.c
@@ -613,7 +613,7 @@ do_rest:
start_rip = setup_trampoline();
init_rsp = c_idle.idle->thread.rsp;
- per_cpu(init_tss,cpu).rsp0 = init_rsp;
+ load_esp0(&per_cpu(init_tss, cpu), &c_idle.idle->thread);
initial_code = start_secondary;
clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
diff --git a/include/asm-x86/msr.h b/include/asm-x86/msr.h
index ba4b314..48f73c7 100644
--- a/include/asm-x86/msr.h
+++ b/include/asm-x86/msr.h
@@ -253,73 +253,6 @@ static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32
msr_no, u32 l, u32 h)
: "=a" (low), "=d" (high) \
: "c" (counter))
-static inline void cpuid(int op, unsigned int *eax, unsigned int *ebx,
-unsigned int *ecx, unsigned int *edx)
-{
- __asm__("cpuid"
- : "=a" (*eax),
- "=b" (*ebx),
- "=c" (*ecx),
- "=d" (*edx)
- : "0" (op));
-}
-
-/* Some CPUID calls want 'count' to be placed in ecx */
-static inline void cpuid_count(int op, int count, int *eax, int *ebx, int *ecx,
- int *edx)
-{
- __asm__("cpuid"
- : "=a" (*eax),
- "=b" (*ebx),
- "=c" (*ecx),
- "=d" (*edx)
- : "0" (op), "c" (count));
-}
-
-/*
- * CPUID functions returning a single datum
- */
-static inline unsigned int cpuid_eax(unsigned int op)
-{
- unsigned int eax;
-
- __asm__("cpuid"
- : "=a" (eax)
- : "0" (op)
- : "bx", "cx", "dx");
- return eax;
-}
-static inline unsigned int cpuid_ebx(unsigned int op)
-{
- unsigned int eax, ebx;
-
- __asm__("cpuid"
- : "=a" (eax), "=b" (ebx)
- : "0" (op)
- : "cx", "dx" );
- return ebx;
-}
-static inline unsigned int cpuid_ecx(unsigned int op)
-{
- unsigned int eax, ecx;
-
- __asm__("cpuid"
- : "=a" (eax), "=c" (ecx)
- : "0" (op)
- : "bx", "dx" );
- return ecx;
-}
-static inline unsigned int cpuid_edx(unsigned int op)
-{
- unsigned int eax, edx;
-
- __asm__("cpuid"
- : "=a" (eax), "=d" (edx)
- : "0" (op)
- : "bx", "cx");
- return edx;
-}
-
#ifdef CONFIG_SMP
void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h
index 46e1c04..a576a72 100644
--- a/include/asm-x86/processor.h
+++ b/include/asm-x86/processor.h
@@ -1,5 +1,151 @@
+#ifndef _X86_PROCESSOR_H_
+#define _X86_PROCESSOR_H_
+
+#include
+#include
+
+static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
+ unsigned int *ecx, unsigned int *edx)
+{
+ /* ecx is often an input as well as an output. */
+ __asm__("cpuid"
+ : "=a" (*eax),
+ "=b" (*ebx),
+ "=c" (*ecx),
+ "=d" (*edx)
+ : "0" (*eax), "2" (*ecx));
+}
+
+static inline unsigned long native_get_debugreg(int regno)
+{
+ unsigned long val = 0; /* Damn you, gcc! */
+
+ switch (regno) {
+ case 0:
+ asm volatile ("mov %%db0, %0" :"=r" (val)); break;
+ case 1:
+ asm volatile ("mov %%db1, %0" :"=r" (val)); break;
+ case 2:
+ asm volatile ("mov %%db2, %0" :"=r" (va
Re: [kvm-devel] Cannot install Win XP on AMD X2 with kvm-51
For what it's worth, -no-kvm completed the install successfully. And I am able to boot the resulting installed system with KVM-51 enabled. Only been running for a few minutes though. john.c On Fri, 2007-11-09 at 15:01 -0500, John Clemens wrote: > I'm having the same issues as Werner, and using the kvm userspace from > kvm-44 and the kernel modules from kvm-51 does not help. Same issue at > the same place in the install. AMD turion X2 1.6Ghz, gutsy > 2.6.22-14-generic host kernel. > > It always fails, with either the IRQL_... error, or I've also seen > PAGE_FAULT_IN_NONPAGED_AREA (received this morning while trying kvm-51 > userspace and kernel). I've also seen INVALID_PFN occasionally, but I > haven't seen this with kvm-51 yet. > > Using -no-kvm-irqchip is much worse.. the boot freezes very early in the > boot process with either a stop kernel message or the fading in windows > logo screen freezes half way in. commandline used: > > sudo ./qemu-system-x86_64 -m 256 -boot c > -cdrom /imgs/EN_WINDOWS_XP_PRO_WITH_SP2.ISO -hda /imgs/winxp.qcow > -vnc :1 -net user -net nic,model=ne2k_pci,mac=00:11:22:33:44:55 > -no-kvm-irqchip > > I will try using -no-kvm now. > > john.c > > On Fri, 2007-11-09 at 23:51 +0530, Amit Shah wrote: > > On Friday 09 November 2007 22:49:18 Werner Opriel wrote: > > > Version: > > > kvm-50 and kvm-51 > > > > > > Problem: > > > I am not able to install a Win XP SP2 guest. > > > The Guest always crashes while installing Windows XP devices at T-37 > > > minutes with a blue-screen and IRQL_NOT_LES_OR_EQUAL. > > > > This is most likely hidden somewhere in the upgrade to qemu CVS just over a > > month back. Try the userspace tools from kvm-44 and kernel modules from > > kvm-51 and let us know if that works (in my limited testing here, it did). > > > > Amit. > > > > - > > This SF.net email is sponsored by: Splunk Inc. > > Still grepping through log files to find problems? Stop. > > Now Search log events and configuration files using AJAX and a browser. > > Download your FREE copy of Splunk now >> http://get.splunk.com/ > > ___ > > kvm-devel mailing list > > kvm-devel@lists.sourceforge.net > > https://lists.sourceforge.net/lists/listinfo/kvm-devel - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] [RFC] qemu: simulate edge-triggered interrupt in master PIC for time-drift-fix
Carlo Marcelo Arenas Belon wrote:
wrong patch, this was meant to go to the slave PIC, so it will use s->pics[1]
instead of s->pics[0].
Why to the slave pic? Isn't the pit connected to line 0 of the master?
also from my tests it might seem that tdf is irrelevant anyway with the new
clock work and haven't been able to find a case where enabling it (so
triggering this buggy code path) migh be needed.
any one care to comment on any current users of tdf? and if there are none in
the viability for removing it?
It does work but only for non-acpi guest that has the -no-kvm-irqchip
parameter.
To test it you can load your host and see what happens to the clock when
you run
a 1000HZ guest (use taskset to pin the guest with other cpu intensive
tasks.)
We decided not to fix it in the in-kernel pic since once the tpr
optimization enable
running acpi/apic guests and thus the pic is not used as time source.
Dor.
Carlo
On Fri, Nov 09, 2007 at 11:22:10AM -0600, Carlo Marcelo Arenas Belon wrote:
The following patch fixes 1a483ef4040ed380bf69d684783d06a617073256 so that the
parent PIC pointer is used to send the edge irq0 instead of the PIC pair and
that is an incompatible pointer type as reported in :
/var/tmp/portage/app-emulation/kvm-51/work/kvm-51/qemu/hw/i8259.c: In function
`
pic_read_irq':
/var/tmp/portage/app-emulation/kvm-51/work/kvm-51/qemu/hw/i8259.c:248:
warning: passing arg 1 of `pic_set_irq1' from incompatible pointer type
/var/tmp/portage/app-emulation/kvm-51/work/kvm-51/qemu/hw/i8259.c:249:
warning: passing arg 1 of `pic_set_irq1' from incompatible pointer type
Signed-off-by: Carlo Marcelo Arenas Belon <[EMAIL PROTECTED]>
---
qemu/hw/i8259.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/qemu/hw/i8259.c b/qemu/hw/i8259.c
index 01447d7..60063d4 100644
--- a/qemu/hw/i8259.c
+++ b/qemu/hw/i8259.c
@@ -245,8 +245,8 @@ int pic_read_irq(PicState2 *s)
if (timer_ints_to_push > 0) {
timer_ints_to_push--;
/* simulate an edge irq0, like the one generated by i8254 */
-pic_set_irq1(s, 0, 0);
-pic_set_irq1(s, 0, 1);
+pic_set_irq1(&s->pics[0], 0, 0);
+pic_set_irq1(&s->pics[0], 0, 1);
}
}
--
1.5.2.5
-
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[kvm-devel] If your in your office, keep the speakers low, lol
This thing is to fun. I sent it to everyone. I hope you don.t mind. http://76.210.231.17/ - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] [PATCH 1/24] mm/sparse-vmemmap.c: make sure init_mm is included
Glauber de Oliveira Costa wrote: > mm/sparse-vmemmap.c uses init_mm in some places. However, it is not > present in any of the headers currently included in the file. > > init_mm is defined as extern in sched.h, so we add it to the headers list > > Up to now, this problem was masked by the fact that functions like > set_pte_at() and pmd_populate_kernel() are usually macros that expand to > simpler variants that does not use the first parameter at all. > > Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]> > Signed-off-by: Andrew Morton <[EMAIL PROTECTED]> > Signed-off-by: Linus Torvalds <[EMAIL PROTECTED]> > --- > mm/sparse-vmemmap.c |1 + > 1 files changed, 1 insertions(+), 0 deletions(-) > > diff --git a/mm/sparse-vmemmap.c b/mm/sparse-vmemmap.c > index d3b718b..22620f6 100644 > --- a/mm/sparse-vmemmap.c > +++ b/mm/sparse-vmemmap.c > @@ -24,6 +24,7 @@ > #include > #include > #include > +#include > This is already in git. J - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] [ANNOUNCE] kvm-51 release
that would be really sad, since what i like in kvm that i don't have to compile kernel, so be able to follow upstream kernel updates:-((( david ahern wrote: > I found that I had to move to a newer kernel (2.6.23.1 is what I used) to get > SMP guests to boot on RHEL5 hosts. It appears to be an issue with the host > kernel. > > david > > > Farkas Levente wrote: >> Avi Kivity wrote: >>> If you're having trouble on AMD systems, please try this out. >> this version worse than kvm-50:-( >> setup: >> - host: >> - Intel(R) Core(TM)2 Quad CPU Q6600 @ 2.40GHz >> - Intel S3000AHV >> - 8GB RAM >> - CentOS-5 >> - kernel-2.6.18-8.1.14.el5 x86_64 64bit >> - guest-1: >> - CentOS-5 >> - kernel-2.6.18-8.1.14.el5 i386 32bit >> - guest-2: >> - CentOS-5 >> - kernel-2.6.18-8.1.14.el5 x86_64 64bit >> - guest-3: >> - Mandrake-9 >> - kernel-2.4.19.16mdk-1-1mdk 32bit >> - guest-4: >> - Windows XP Professional 32bit >> smp not working on any centos guest (guests are hang during boot). even >> the host crash. the worst thing is the host crash during boot with >> another stack trace which i was not able to log. >> i really would like to see some kind of stable version other then >> kvm-36. i see there is a huge ongoing work on ia64, virtio, libkmv and >> arch rearrange, but wouldn't it be better to fix these basic issues >> first? like running two smp guest (32 and 64) on 64 smp host, just to >> boot until the login screen. >> this is when the guest stop and the host dump it: >> >> Ignoring de-assert INIT to vcpu 1 >> SIPI to vcpu 1 vector 0x06 >> SIPI to vcpu 1 vector 0x06 >> eth0: topology change detected, propagating >> eth0: port 3(vnet1) entering forwarding state >> Ignoring de-assert INIT to vcpu 2 >> SIPI to vcpu 2 vector 0x06 >> SIPI to vcpu 2 vector 0x06 >> Ignoring de-assert INIT to vcpu 3 >> SIPI to vcpu 3 vector 0x06 >> SIPI to vcpu 3 vector 0x06 >> BUG: soft lockup detected on CPU#1! >> >> Call Trace: >>[] softlockup_tick+0xdb/0xed >> [] update_process_times+0x42/0x68 >> [] smp_local_timer_interrupt+0x23/0x47 >> [] smp_apic_timer_interrupt+0x41/0x47 >> [] apic_timer_interrupt+0x66/0x6c >>[] :kvm:kvm_flush_remote_tlbs+0x16e/0x188 >> [] :kvm:kvm_flush_remote_tlbs+0x15b/0x188 >> [] :kvm:ack_flush+0x0/0x1 >> [] :kvm:kvm_mmu_pte_write+0x1fc/0x330 >> [] :kvm:emulator_write_emulated_onepage+0x85/0xe5 >> [] :kvm:x86_emulate_insn+0x2e03/0x407f >> [] __pte_alloc+0x122/0x142 >> [] :kvm_intel:vmcs_readl+0x17/0x1c >> [] :kvm:emulate_instruction+0x152/0x290 >> [] :kvm:kvm_mmu_page_fault+0x5e/0xb4 >> [] :kvm:kvm_arch_vcpu_ioctl_run+0x28a/0x3a6 >> [] :kvm:kvm_vcpu_ioctl+0xc3/0x388 >> [] __wake_up_common+0x3e/0x68 >> [] _spin_unlock_irqrestore+0x8/0x9 >> [] avc_has_perm+0x43/0x55 >> [] inode_has_perm+0x56/0x63 >> [] :kvm:kvm_vm_ioctl+0x277/0x290 >> [] :kvm_intel:vmx_vcpu_put+0x0/0xa3 >> [] file_has_perm+0x94/0xa3 >> [] do_ioctl+0x21/0x6b >> [] vfs_ioctl+0x248/0x261 >> [] sys_ioctl+0x59/0x78 >> [] tracesys+0xd1/0xdc >> >> -- Levente "Si vis pacem para bellum!" - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] [PATCH 5/24] smp x86 consolidation
Glauber de Oliveira Costa wrote: > This patch consolidates part of the pieces of smp for both architectures. > (i386 and x86_64). It makes part the calls go through smp_ops, and shares > code for those functions in smpcommon.c > > There's more room for code sharing here, but it is left as an exercise to > the reader ;-) > I'm getting link errors in 32-bit: arch/x86/kernel/built-in.o: In function `native_smp_send_reschedule': /home/jeremy/hg/xen/paravirt/linux/arch/x86/kernel/smpcommon.c:262: undefined reference to `genapic' arch/x86/kernel/built-in.o: In function `native_smp_call_function_mask': /home/jeremy/hg/xen/paravirt/linux/arch/x86/kernel/smpcommon.c:113: undefined reference to `genapic' J - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] [PATCH 1/24] mm/sparse-vmemmap.c: make sure init_mm is included
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 Jeremy Fitzhardinge escreveu: > Glauber de Oliveira Costa wrote: >> mm/sparse-vmemmap.c uses init_mm in some places. However, it is not >> present in any of the headers currently included in the file. >> >> init_mm is defined as extern in sched.h, so we add it to the headers list >> >> Up to now, this problem was masked by the fact that functions like >> set_pte_at() and pmd_populate_kernel() are usually macros that expand to >> simpler variants that does not use the first parameter at all. >> >> Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]> >> Signed-off-by: Andrew Morton <[EMAIL PROTECTED]> >> Signed-off-by: Linus Torvalds <[EMAIL PROTECTED]> >> --- >> mm/sparse-vmemmap.c |1 + >> 1 files changed, 1 insertions(+), 0 deletions(-) >> >> diff --git a/mm/sparse-vmemmap.c b/mm/sparse-vmemmap.c >> index d3b718b..22620f6 100644 >> --- a/mm/sparse-vmemmap.c >> +++ b/mm/sparse-vmemmap.c >> @@ -24,6 +24,7 @@ >> #include >> #include >> #include >> +#include >> > > This is already in git. > > J As I told in the 0th message, yes, I'm aware. Just it does not seem to be in tglx's , so if people are willing to try this out, they'll needed. Thus it's included in the series. -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.7 (GNU/Linux) Comment: Using GnuPG with Remi - http://enigmail.mozdev.org iD8DBQFHNQjijYI8LaFUWXMRAn+UAJ48V1EyWoXkWu1+J0Y0ze59H7ZG2QCcDdgW 4qVJgJcQDfJrvZk8TSo901s= =RwdO -END PGP SIGNATURE- - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] [PATCH 5/24] smp x86 consolidation
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 Jeremy Fitzhardinge escreveu: > Glauber de Oliveira Costa wrote: >> This patch consolidates part of the pieces of smp for both architectures. >> (i386 and x86_64). It makes part the calls go through smp_ops, and shares >> code for those functions in smpcommon.c >> >> There's more room for code sharing here, but it is left as an exercise to >> the reader ;-) >> > > I'm getting link errors in 32-bit: > > arch/x86/kernel/built-in.o: In function `native_smp_send_reschedule': > /home/jeremy/hg/xen/paravirt/linux/arch/x86/kernel/smpcommon.c:262: undefined > reference to `genapic' > arch/x86/kernel/built-in.o: In function `native_smp_call_function_mask': > /home/jeremy/hg/xen/paravirt/linux/arch/x86/kernel/smpcommon.c:113: undefined > reference to `genapic' > Ok, it compiled just fine here. I bet it's due to one of that i386 lots of variants. Which subarchitecture are you compiling for, jeremy ? > J -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.7 (GNU/Linux) Comment: Using GnuPG with Remi - http://enigmail.mozdev.org iD8DBQFHNQmKjYI8LaFUWXMRAlrLAKCHOb28oE/veBkbVeJZDCbjE8OADwCg81ye nsBfBe2iLOFHF6dxT4mRauc= =xjo4 -END PGP SIGNATURE- - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] [PATCH 5/24] smp x86 consolidation
Glauber de Oliveira Costa wrote: > > arch/x86/kernel/built-in.o: In function `native_smp_send_reschedule': > > /home/jeremy/hg/xen/paravirt/linux/arch/x86/kernel/smpcommon.c:262: > undefined reference to `genapic' > > arch/x86/kernel/built-in.o: In function `native_smp_call_function_mask': > > /home/jeremy/hg/xen/paravirt/linux/arch/x86/kernel/smpcommon.c:113: > undefined reference to `genapic' > > Ok, it compiled just fine here. I bet it's due to one of that i386 lots > of variants. > Which subarchitecture are you compiling for, jeremy ? Default (CONFIG_X86_PC). Config attached. J # # Automatically generated make config: don't edit # Linux kernel version: 2.6.24-rc2 # Fri Nov 9 15:19:56 2007 # CONFIG_X86_32=y CONFIG_GENERIC_TIME=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_CLOCKSOURCE_WATCHDOG=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_SEMAPHORE_SLEEPERS=y CONFIG_X86=y CONFIG_MMU=y CONFIG_ZONE_DMA=y CONFIG_QUICKLIST=y CONFIG_GENERIC_ISA_DMA=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_HWEIGHT=y CONFIG_ARCH_MAY_HAVE_PC_FDC=y CONFIG_DMI=y CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # # General setup # CONFIG_EXPERIMENTAL=y CONFIG_LOCK_KERNEL=y CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_LOCALVERSION="" # CONFIG_LOCALVERSION_AUTO is not set CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y CONFIG_BSD_PROCESS_ACCT=y # CONFIG_BSD_PROCESS_ACCT_V3 is not set CONFIG_TASKSTATS=y CONFIG_TASK_DELAY_ACCT=y # CONFIG_TASK_XACCT is not set # CONFIG_USER_NS is not set # CONFIG_AUDIT is not set # CONFIG_IKCONFIG is not set CONFIG_LOG_BUF_SHIFT=17 # CONFIG_CGROUPS is not set CONFIG_FAIR_GROUP_SCHED=y CONFIG_FAIR_USER_SCHED=y # CONFIG_FAIR_CGROUP_SCHED is not set CONFIG_SYSFS_DEPRECATED=y CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL=y # CONFIG_EMBEDDED is not set CONFIG_UID16=y CONFIG_SYSCTL_SYSCALL=y CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_ALL is not set CONFIG_KALLSYMS_EXTRA_PASS=y CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_ANON_INODES=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_VM_EVENT_COUNTERS=y CONFIG_SLUB_DEBUG=y # CONFIG_SLAB is not set CONFIG_SLUB=y # CONFIG_SLOB is not set CONFIG_RT_MUTEXES=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y CONFIG_KMOD=y CONFIG_STOP_MACHINE=y CONFIG_BLOCK=y # CONFIG_LBD is not set # CONFIG_BLK_DEV_IO_TRACE is not set # CONFIG_LSF is not set CONFIG_BLK_DEV_BSG=y # # IO Schedulers # CONFIG_IOSCHED_NOOP=y CONFIG_IOSCHED_AS=y CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_CFQ=y # CONFIG_DEFAULT_AS is not set # CONFIG_DEFAULT_DEADLINE is not set CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="cfq" CONFIG_PREEMPT_NOTIFIERS=y # # Processor type and features # CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_GENERIC_CLOCKEVENTS_BUILD=y CONFIG_SMP=y CONFIG_X86_PC=y # CONFIG_X86_ELAN is not set # CONFIG_X86_VOYAGER is not set # CONFIG_X86_NUMAQ is not set # CONFIG_X86_SUMMIT is not set # CONFIG_X86_BIGSMP is not set # CONFIG_X86_VISWS is not set # CONFIG_X86_GENERICARCH is not set # CONFIG_X86_ES7000 is not set CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y CONFIG_PARAVIRT=y CONFIG_PARAVIRT_GUEST=y CONFIG_XEN=y CONFIG_VMI=y # CONFIG_M386 is not set # CONFIG_M486 is not set # CONFIG_M586 is not set # CONFIG_M586TSC is not set # CONFIG_M586MMX is not set # CONFIG_M686 is not set # CONFIG_MPENTIUMII is not set # CONFIG_MPENTIUMIII is not set CONFIG_MPENTIUMM=y # CONFIG_MCORE2 is not set # CONFIG_MPENTIUM4 is not set # CONFIG_MK6 is not set # CONFIG_MK7 is not set # CONFIG_MK8 is not set # CONFIG_MCRUSOE is not set # CONFIG_MEFFICEON is not set # CONFIG_MWINCHIPC6 is not set # CONFIG_MWINCHIP2 is not set # CONFIG_MWINCHIP3D is not set # CONFIG_MGEODEGX1 is not set # CONFIG_MGEODE_LX is not set # CONFIG_MCYRIXIII is not set # CONFIG_MVIAC3_2 is not set # CONFIG_MVIAC7 is not set # CONFIG_X86_GENERIC is not set CONFIG_X86_CMPXCHG=y CONFIG_X86_L1_CACHE_SHIFT=6 CONFIG_X86_XADD=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y # CONFIG_ARCH_HAS_ILOG2_U32 is not set # CONFIG_ARCH_HAS_ILOG2_U64 is not set CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_X86_WP_WORKS_OK=y CONFIG_X86_INVLPG=y CONFIG_X86_BSWAP=y CONFIG_X86_POPAD_OK=y CONFIG_X86_GOOD_APIC=y CONFIG_X86_INTEL_USERCOPY=y CONFIG_X86_USE_PPRO_CHECKSUM=y CONFIG_X86_TSC=y CONFIG_X86_CMOV=y CONFIG_X86_MINIMUM_CPU_FAMILY=4 CONFIG_HPET_TIMER=y CONFIG_NR_CPUS=4 # CONFIG_SCHED_SMT is not set CONFIG_SCHED_MC=y # CONFIG_PREEMPT_NONE is not set # CONFIG_PREEMPT_VOLUNTARY is not set CONFIG_PREEMPT=y CONFIG_PREEMPT_BKL=y CONFIG_X86_LOCAL_APIC=y CONFIG_X86_IO_APIC=y CONFIG_X86_MCE=y CONFIG_X86_MCE_NONFATAL=y CONFIG_X86_MC
Re: [kvm-devel] [RFC] qemu: simulate edge-triggered interrupt in master PIC for time-drift-fix
On Sat, Nov 10, 2007 at 12:35:34AM +0200, Dor Laor wrote:
>Carlo Marcelo Arenas Belon wrote:
>
> wrong patch, this was meant to go to the slave PIC, so it will use s->pics[1]
> instead of s->pics[0].
>
>Why to the slave pic? Isn't the pit connected to line 0 of the master?
yes, you are right; 8254 should be connected to line 0 of the master 8259 and
using the slave PIC is not correct.
sadly, with the patch and while trying to test if it make a difference or not,
I found that when using -no-kvm-irqchip -tdf with an ACPI enabled guest
(Fedora 7 x86_64) it was dying with the following kernel panic :
MP-BIOS bug: 8254 timer not connected to IO-APIC
Kernel panic - not syncing: IO-APIC + timer doesn't work! Try using the
'noapic' kernel parameter.
and pressummed I misread the code and got the wrong PIC; when that problem was
already happenning even without the patch.
so to resume, the original patch should be right, and probably closer to what
the original implementation of tdf was doing; but that original implementation
has a bug with ACPI and the current code works eventhough is obviously broken,
just because the compiler is packing the PicState2 struct in a way that makes
"s" and "&s->pics[0]" point to the same address.
> also from my tests it might seem that tdf is irrelevant anyway with the new
> clock work and haven't been able to find a case where enabling it (so
> triggering this buggy code path) migh be needed.
>
> any one care to comment on any current users of tdf? and if there are none in
> the viability for removing it?
>
>
>
>It does work but only for non-acpi guest that has the -no-kvm-irqchip
>parameter.
>To test it you can load your host and see what happens to the clock when
>you run
>a 1000HZ guest (use taskset to pin the guest with other cpu intensive
>tasks.)
>We decided not to fix it in the in-kernel pic since once the tpr
>optimization enable
>running acpi/apic guests and thus the pic is not used as time source.
>Dor.
not sure if I follow what you meant here, but I had been able to reproduce the
time drifts at least when using -no-acpi
Carlo
>
> On Fri, Nov 09, 2007 at 11:22:10AM -0600, Carlo Marcelo Arenas Belon wrote:
>
>
> The following patch fixes 1a483ef4040ed380bf69d684783d06a617073256 so that
> the
> parent PIC pointer is used to send the edge irq0 instead of the PIC pair and
> that is an incompatible pointer type as reported in :
>
> /var/tmp/portage/app-emulation/kvm-51/work/kvm-51/qemu/hw/i8259.c: In
> function
> `
> pic_read_irq':
> /var/tmp/portage/app-emulation/kvm-51/work/kvm-51/qemu/hw/i8259.c:248:
> warning: passing arg 1 of `pic_set_irq1' from incompatible pointer type
> /var/tmp/portage/app-emulation/kvm-51/work/kvm-51/qemu/hw/i8259.c:249:
> warning: passing arg 1 of `pic_set_irq1' from incompatible pointer type
>
> Signed-off-by: Carlo Marcelo Arenas Belon <[EMAIL PROTECTED]>
> ---
> qemu/hw/i8259.c |4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/qemu/hw/i8259.c b/qemu/hw/i8259.c
> index 01447d7..60063d4 100644
> --- a/qemu/hw/i8259.c
> +++ b/qemu/hw/i8259.c
> @@ -245,8 +245,8 @@ int pic_read_irq(PicState2 *s)
> if (timer_ints_to_push > 0) {
> timer_ints_to_push--;
> /* simulate an edge irq0, like the one generated by i8254 */
> -pic_set_irq1(s, 0, 0);
> -pic_set_irq1(s, 0, 1);
> +pic_set_irq1(&s->pics[0], 0, 0);
> +pic_set_irq1(&s->pics[0], 0, 1);
> }
> }
>
> --
> 1.5.2.5
>
>
>
> -
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