Re: [kvm-devel] [PATCH] Don't explicitly set BAR values for VMware VGA
On 23/02/2008, Anthony Liguori <[EMAIL PROTECTED]> wrote: > andrzej zaborowski wrote: > > I have a very similar patch on my HD but I haven't included it because > > it causes my testing Ms Windows install to stop detecting the card. I > > just tested your patch and the same thing happens, i.e. with the patch > > it works as a vga card but is detected as an Unknown adapter and only > > the 640x480x8 mode can be used. I can't explain this. > > > > > Can you describe how you setup your Windows install? I'll try to > reproduce it and dig into it. Oh, good question, and I think the answer be the reason why it's not working here (*slaps self*). I'll apply the patch if you can confirm that it works with some Ms Windows install. I just launched the VM and checked what kind of Ms Windows set up this is and it's a "Windows XP professional 2002" with VMware Tools installed, and all the files on it have last modification date in 2004 or earlier. Apparently I stole the already set up VM from my dad's computer on which he used VMware, somewhere in 2004. I then converted the image to raw and always performed my tests with -snapshot on. This may be why the system is unwilling to use different base addresses. -- Please do not print this email unless absolutely necessary. Spread environmental awareness. - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] [PATCH] Don't explicitly set BAR values for VMware VGA
andrzej zaborowski wrote: > On 22/02/2008, Anthony Liguori <[EMAIL PROTECTED]> wrote: > >> Right now we set explict base addresses for the PCI IO regions in the VMware >> VGA device. We don't register the second region at all and instead directly >> map the physical memory. >> >> The problem is, the addresses we're setting in the BAR is not taken into >> account in the e820 mapping. >> >> This patch removes the explicit BARs and registers the second region through >> the normal PCI code. >> >> I've only tested with a Linux guest and the open source VMware VGA driver. >> > > I have a very similar patch on my HD but I haven't included it because > it causes my testing Ms Windows install to stop detecting the card. I > just tested your patch and the same thing happens, i.e. with the patch > it works as a vga card but is detected as an Unknown adapter and only > the 640x480x8 mode can be used. I can't explain this. > Can you describe how you setup your Windows install? I'll try to reproduce it and dig into it. Regards, Anthony Liguori > Currently the io port numbers can be set by the guest and the memory > io regions are fixed. Earlier both settings were hardcoded. This is > because in one version of the X driver (which was/is the only > documentation available) these settings were metioned as *the* correct > values for this card. This may of course cause different types of > breakage but so far worked ok, except when it was found that in > various combinations qemu segfaulted due to different PCI cards > registering the same port range as our default. When this happened I > tried to make these settings settable through PCI registers but found > that this broke Ms Windows. Luckily Ms Windows still worked if only > port ranges were assigned dynamically and the segfault went away so I > left it at this but it perhaps needs better looking at. > - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] [PATCH] Don't explicitly set BAR values for VMware VGA
On 22/02/2008, Anthony Liguori <[EMAIL PROTECTED]> wrote: > Right now we set explict base addresses for the PCI IO regions in the VMware > VGA device. We don't register the second region at all and instead directly > map the physical memory. > > The problem is, the addresses we're setting in the BAR is not taken into > account in the e820 mapping. > > This patch removes the explicit BARs and registers the second region through > the normal PCI code. > > I've only tested with a Linux guest and the open source VMware VGA driver. I have a very similar patch on my HD but I haven't included it because it causes my testing Ms Windows install to stop detecting the card. I just tested your patch and the same thing happens, i.e. with the patch it works as a vga card but is detected as an Unknown adapter and only the 640x480x8 mode can be used. I can't explain this. Currently the io port numbers can be set by the guest and the memory io regions are fixed. Earlier both settings were hardcoded. This is because in one version of the X driver (which was/is the only documentation available) these settings were metioned as *the* correct values for this card. This may of course cause different types of breakage but so far worked ok, except when it was found that in various combinations qemu segfaulted due to different PCI cards registering the same port range as our default. When this happened I tried to make these settings settable through PCI registers but found that this broke Ms Windows. Luckily Ms Windows still worked if only port ranges were assigned dynamically and the segfault went away so I left it at this but it perhaps needs better looking at. -- Please do not print this email unless absolutely necessary. Spread environmental awareness. - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] [PATCH] Don't explicitly set BAR values for VMware VGA
Anthony Liguori wrote: > Right now we set explict base addresses for the PCI IO regions in the VMware > VGA device. We don't register the second region at all and instead directly > map the physical memory. > > The problem is, the addresses we're setting in the BAR is not taken into > account in the e820 mapping. > Actually, it looks like the e820 map is okay, but I do get some errors in the gust about remapping that range so I do think this patch is correct. Regards, Anthony Liguori > This patch removes the explicit BARs and registers the second region through > the normal PCI code. > > I've only tested with a Linux guest and the open source VMware VGA driver. > > This patch needs -p2 to apply against the QEMU CVS tree. > > - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] [PATCH 15/15] provide _EJ0 method for processor removal
Signed-off-by: Glauber Costa <[EMAIL PROTECTED]>
---
bios/acpi-dsdt.dsl| 14 ++
qemu/pc-bios/bios.bin | Bin
2 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/bios/acpi-dsdt.dsl b/bios/acpi-dsdt.dsl
index 4ce7b6a..33adfce 100755
--- a/bios/acpi-dsdt.dsl
+++ b/bios/acpi-dsdt.dsl
@@ -44,6 +44,7 @@ DefinitionBlock (
Method (_STA) {
Return(0x1)
}
+Method (_EJ0, 1) { Return (0x0) }
}
Processor (CPU2, 0x02, 0xb010, 0x06) {
Name (TMP, Buffer(0x8) {0x0, 0x8, 0x02, 0x02, 0x1, 0x0, 0x0, 0x0})
@@ -54,6 +55,7 @@ DefinitionBlock (
Method (_STA) {
Return(0x1)
}
+Method (_EJ0,1) { Return (0x0) }
}
Processor (CPU3, 0x03, 0xb010, 0x06) {
Name (TMP, Buffer(0x8) {0x0, 0x8, 0x03, 0x03, 0x1, 0x0, 0x0, 0x0})
@@ -64,6 +66,7 @@ DefinitionBlock (
Method (_STA) {
Return(0x1)
}
+Method (_EJ0,1) { Return (0x0) }
}
Processor (CPU4, 0x04, 0xb010, 0x06) {
Name (TMP, Buffer(0x8) {0x0, 0x8, 0x04, 0x04, 0x1, 0x0, 0x0, 0x0})
@@ -74,6 +77,7 @@ DefinitionBlock (
Method (_STA) {
Return(0x1)
}
+Method (_EJ0,1) { Return (0x0) }
}
Processor (CPU5, 0x05, 0xb010, 0x06) {
Name (TMP, Buffer(0x8) {0x0, 0x8, 0x05, 0x05, 0x1, 0x0, 0x0, 0x0})
@@ -84,6 +88,7 @@ DefinitionBlock (
Method (_STA) {
Return(0x1)
}
+Method (_EJ0,1) { Return (0x0) }
}
Processor (CPU6, 0x06, 0xb010, 0x06) {
Name (TMP, Buffer(0x8) {0x0, 0x8, 0x06, 0x06, 0x1, 0x0, 0x0, 0x0})
@@ -94,6 +99,7 @@ DefinitionBlock (
Method (_STA) {
Return(0x1)
}
+Method (_EJ0,1) { Return (0x0) }
}
Processor (CPU7, 0x07, 0xb010, 0x06) {
Name (TMP, Buffer(0x8) {0x0, 0x8, 0x07, 0x07, 0x1, 0x0, 0x0, 0x0})
@@ -104,6 +110,7 @@ DefinitionBlock (
Method (_STA) {
Return(0x1)
}
+Method (_EJ0,1) { Return (0x0) }
}
Processor (CPU8, 0x08, 0xb010, 0x06) {
Name (TMP, Buffer(0x8) {0x0, 0x8, 0x08, 0x08, 0x1, 0x0, 0x0, 0x0})
@@ -114,6 +121,7 @@ DefinitionBlock (
Method (_STA) {
Return(0x1)
}
+Method (_EJ0,1) { Return (0x0) }
}
Processor (CPU9, 0x09, 0xb010, 0x06) {
Name (TMP, Buffer(0x8) {0x0, 0x8, 0x09, 0x09, 0x1, 0x0, 0x0, 0x0})
@@ -124,6 +132,7 @@ DefinitionBlock (
Method (_STA) {
Return(0x1)
}
+Method (_EJ0,1) { Return (0x0) }
}
Processor (CPUA, 0x0a, 0xb010, 0x06) {
Name (TMP, Buffer(0x8) {0x0, 0x8, 0x0A, 0x0A, 0x1, 0x0, 0x0, 0x0})
@@ -134,6 +143,7 @@ DefinitionBlock (
Method (_STA) {
Return(0x1)
}
+Method (_EJ0,1) { Return (0x0) }
}
Processor (CPUB, 0x0b, 0xb010, 0x06) {
Name (TMP, Buffer(0x8) {0x0, 0x8, 0x0B, 0x0B, 0x1, 0x0, 0x0, 0x0})
@@ -144,6 +154,7 @@ DefinitionBlock (
Method (_STA) {
Return(0x1)
}
+Method (_EJ0,1) { Return (0x0) }
}
Processor (CPUC, 0x0c, 0xb010, 0x06) {
Name (TMP, Buffer(0x8) {0x0, 0x8, 0x0C, 0x0C, 0x1, 0x0, 0x0, 0x0})
@@ -154,6 +165,7 @@ DefinitionBlock (
Method (_STA) {
Return(0x1)
}
+Method (_EJ0,1) { Return (0x0) }
}
Processor (CPUD, 0x0d, 0xb010, 0x06) {
Name (TMP, Buffer(0x8) {0x0, 0x8, 0x0D, 0x0D, 0x1, 0x0, 0x0, 0x0})
@@ -164,6 +176,7 @@ DefinitionBlock (
Method (_STA) {
Return(0x1)
}
+Method (_EJ0,1) { Return (0x0) }
}
Processor (CPUE, 0x0e, 0xb010, 0x06) {
Name (TMP, Buffer(0x8) {0x0, 0x8, 0x0E, 0x0E, 0x1, 0x0, 0x0, 0x0})
@@ -174,6 +187,7 @@ DefinitionBlock (
Method (_STA) {
Return(0x1)
}
+Method (_EJ0,1) { Return (0x0) }
}
}
diff --git a/qemu/pc-bios/bios.bin b/qemu/pc-bios/bios.bin
index 64b7abb..872f073 100644
Binary files a/qemu/pc-bios/bios.bin and b/qemu/pc-bios/bios.bin differ
--
1.4.2
-
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[kvm-devel] [PATCH 13/15] provide _MAT to acpi processor
Signed-off-by: Glauber Costa <[EMAIL PROTECTED]>
---
bios/acpi-dsdt.dsl | 154 +++-
1 files changed, 140 insertions(+), 14 deletions(-)
diff --git a/bios/acpi-dsdt.dsl b/bios/acpi-dsdt.dsl
index bdb591a..4ce7b6a 100755
--- a/bios/acpi-dsdt.dsl
+++ b/bios/acpi-dsdt.dsl
@@ -35,20 +35,146 @@ DefinitionBlock (
}
Processor (CPU0, 0x00, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
-Processor (CPU1, 0x01, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
-Processor (CPU2, 0x02, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
-Processor (CPU3, 0x03, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
-Processor (CPU4, 0x04, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
-Processor (CPU5, 0x05, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
-Processor (CPU6, 0x06, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
-Processor (CPU7, 0x07, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
-Processor (CPU8, 0x08, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
-Processor (CPU9, 0x09, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
-Processor (CPUA, 0x0a, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
-Processor (CPUB, 0x0b, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
-Processor (CPUC, 0x0c, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
-Processor (CPUD, 0x0d, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
-Processor (CPUE, 0x0e, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
+Processor (CPU1, 0x01, 0xb010, 0x06) {
+Name (TMP, Buffer(0x8) {0x0, 0x8, 0x01, 0x01, 0x1, 0x0, 0x0, 0x0})
+Method(_MAT, 0) {
+If (And(\_PR.PRU, 0x2)) { Return(TMP) }
+Else { Return(0x0) }
+}
+Method (_STA) {
+Return(0x1)
+}
+}
+Processor (CPU2, 0x02, 0xb010, 0x06) {
+Name (TMP, Buffer(0x8) {0x0, 0x8, 0x02, 0x02, 0x1, 0x0, 0x0, 0x0})
+Method(_MAT, 0) {
+If (And(\_PR.PRU, 0x4)) { Return(TMP) }
+Else { Return(0x0) }
+}
+Method (_STA) {
+Return(0x1)
+}
+}
+Processor (CPU3, 0x03, 0xb010, 0x06) {
+Name (TMP, Buffer(0x8) {0x0, 0x8, 0x03, 0x03, 0x1, 0x0, 0x0, 0x0})
+Method(_MAT, 0) {
+If (And(\_PR.PRU, 0x8)) { Return(TMP) }
+Else { Return(0x0) }
+}
+Method (_STA) {
+Return(0x1)
+}
+}
+Processor (CPU4, 0x04, 0xb010, 0x06) {
+Name (TMP, Buffer(0x8) {0x0, 0x8, 0x04, 0x04, 0x1, 0x0, 0x0, 0x0})
+Method(_MAT, 0) {
+If (And(\_PR.PRU, 0x10)) { Return(TMP) }
+Else { Return(0x0) }
+}
+Method (_STA) {
+Return(0x1)
+}
+}
+Processor (CPU5, 0x05, 0xb010, 0x06) {
+Name (TMP, Buffer(0x8) {0x0, 0x8, 0x05, 0x05, 0x1, 0x0, 0x0, 0x0})
+Method(_MAT, 0) {
+If (And(\_PR.PRU, 0x20)) { Return(TMP) }
+Else { Return(0x0) }
+}
+Method (_STA) {
+Return(0x1)
+}
+}
+Processor (CPU6, 0x06, 0xb010, 0x06) {
+Name (TMP, Buffer(0x8) {0x0, 0x8, 0x06, 0x06, 0x1, 0x0, 0x0, 0x0})
+Method(_MAT, 0) {
+If (And(\_PR.PRU, 0x40)) { Return(TMP) }
+Else { Return(0x0) }
+}
+Method (_STA) {
+Return(0x1)
+}
+}
+Processor (CPU7, 0x07, 0xb010, 0x06) {
+Name (TMP, Buffer(0x8) {0x0, 0x8, 0x07, 0x07, 0x1, 0x0, 0x0, 0x0})
+Method(_MAT, 0) {
+If (And(\_PR.PRU, 0x80)) { Return(TMP) }
+Else { Return(0x0) }
+}
+Method (_STA) {
+Return(0x1)
+}
+}
+Processor (CPU8, 0x08, 0xb010, 0x06) {
+Name (TMP, Buffer(0x8) {0x0, 0x8, 0x08, 0x08, 0x1, 0x0, 0x0, 0x0})
+Method(_MAT, 0) {
+If (And(\_PR.PRU, 0x100)) { Return(TMP) }
+Else { Return(0x0) }
+}
+Method (_STA) {
+Return(0x1)
+}
+}
+Processor (CPU9, 0x09, 0xb010, 0x06) {
+Name (TMP, Buffer(0x8) {0x0, 0x8, 0x09, 0x09, 0x1, 0x0, 0x0, 0x0})
+Method(_MAT, 0) {
+If (And(\_PR.PRU, 0x200)) { Return(TMP) }
+Else { Return(0x0) }
+}
+Method (_STA) {
+Return(0x1)
+}
+}
+Processor (CPUA, 0x0a, 0xb010, 0x06) {
+Name (TMP, Buffer(0x8) {0x0, 0x8, 0x0A, 0x0A, 0x1, 0x0, 0x0, 0x0})
+Method(_MAT, 0) {
+If (And(\_PR
[kvm-devel] [PATCH 14/15] start a new cpu thread
spin up a new cpu thread if not yet running.
Signed-off-by: Glauber Costa <[EMAIL PROTECTED]>
---
qemu/hw/acpi.c | 16
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/qemu/hw/acpi.c b/qemu/hw/acpi.c
index 038e993..93cbc68 100644
--- a/qemu/hw/acpi.c
+++ b/qemu/hw/acpi.c
@@ -23,6 +23,9 @@ #include "qemu-timer.h"
#include "sysemu.h"
#include "i2c.h"
#include "smbus.h"
+#ifdef USE_KVM
+#include "qemu-kvm.h"
+#endif
//#define DEBUG
@@ -640,6 +643,19 @@ static void disable_processor(struct gpe
void qemu_system_cpu_hot_add(int cpu, int state)
{
+CPUState *env;
+
+if ((state) && (!qemu_kvm_cpu_env(cpu))) {
+env = pc_new_cpu(cpu, model, 1);
+if (!env) {
+fprintf(stderr, "cpu %d creation failed\n", cpu);
+return;
+}
+#ifdef USE_KVM
+kvm_init_new_ap(cpu, env);
+#endif
+}
+
qemu_set_irq(pm_state->irq, 1);
gpe.up = 0;
gpe.down = 0;
--
1.4.2
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[kvm-devel] [PATCH 11/15] manipulate the gpe bits and send sci up the os.
Signed-off-by: Glauber Costa <[EMAIL PROTECTED]>
---
qemu/hw/acpi.c | 42 ++
1 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/qemu/hw/acpi.c b/qemu/hw/acpi.c
index 60d3094..038e993 100644
--- a/qemu/hw/acpi.c
+++ b/qemu/hw/acpi.c
@@ -534,10 +534,13 @@ void qemu_system_powerdown(void)
}
#endif
unsigned long gpe_base = 0xafe0;
+unsigned long status_base = 0xaf00;
struct gpe_regs {
uint16_t sts; /* status */
uint16_t en; /* enabled */
+uint8_t up;
+uint8_t down;
};
static struct gpe_regs gpe;
@@ -547,6 +550,13 @@ static uint32_t gpe_readb(void *opaque,
uint32_t val = 0;
struct gpe_regs *g = opaque;
switch (addr) {
+case 0xaf00:
+val = g->up;
+break;
+case 0xaf01:
+val = g->down;
+break;
+
case 0xafe0:
val = g->sts & 0xFF;
break;
@@ -573,6 +583,13 @@ static void gpe_writeb(void *opaque, uin
{
struct gpe_regs *g = opaque;
switch (addr) {
+case 0xaf00:
+g->up = val;
+break;
+case 0xaf01:
+g->down = val;
+break;
+
case 0xafe0:
g->sts = (g->sts & ~0x) | (val & 0x);
break;
@@ -601,9 +618,34 @@ void qemu_system_hot_add_init(char *cpu_
register_ioport_write(gpe_base, 4, 1, gpe_writeb, &gpe);
register_ioport_read(gpe_base, 4, 1, gpe_readb, &gpe);
+register_ioport_write(status_base, 4, 1, gpe_writeb, &gpe);
+register_ioport_read(status_base, 4, 1, gpe_readb, &gpe);
+
model = cpu_model;
}
+static void enable_processor(struct gpe_regs *g, int cpu)
+{
+g->sts |= 1;
+g->en |= 1;
+g->up |= (1 << cpu);
+}
+
+static void disable_processor(struct gpe_regs *g, int cpu)
+{
+g->sts |= 1;
+g->en |= 1;
+g->down |= (1 << cpu);
+}
+
void qemu_system_cpu_hot_add(int cpu, int state)
{
+qemu_set_irq(pm_state->irq, 1);
+gpe.up = 0;
+gpe.down = 0;
+if (state)
+enable_processor(&gpe, cpu);
+else
+disable_processor(&gpe, cpu);
+qemu_set_irq(pm_state->irq, 0);
}
--
1.4.2
-
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[kvm-devel] [PATCH 12/15] isolate cpu thread creation in qemu-kvm.c
Signed-off-by: Glauber Costa <[EMAIL PROTECTED]>
---
qemu/qemu-kvm.c |9 +++--
qemu/qemu-kvm.h |1 +
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/qemu/qemu-kvm.c b/qemu/qemu-kvm.c
index ffc59d5..59fe9df 100644
--- a/qemu/qemu-kvm.c
+++ b/qemu/qemu-kvm.c
@@ -351,6 +351,11 @@ static void kvm_add_signal(struct qemu_k
sigdelset(&sigtab->negsigset, signum);
}
+void kvm_init_new_ap(int cpu, CPUState *env)
+{
+pthread_create(&vcpu_info[cpu].thread, NULL, ap_main_loop, env);
+}
+
int kvm_init_ap(void)
{
CPUState *env = first_cpu->next_cpu;
@@ -371,8 +376,8 @@ #endif
vcpu->env = first_cpu;
signal(SIG_IPI, sig_ipi_handler);
for (i = 1; i < smp_cpus; ++i) {
- pthread_create(&vcpu_info[i].thread, NULL, ap_main_loop, env);
- env = env->next_cpu;
+kvm_init_new_ap(i, env);
+env = env->next_cpu;
}
return 0;
}
diff --git a/qemu/qemu-kvm.h b/qemu/qemu-kvm.h
index a637d71..8e45f30 100644
--- a/qemu/qemu-kvm.h
+++ b/qemu/qemu-kvm.h
@@ -13,6 +13,7 @@ #include "cpu.h"
int kvm_main_loop(void);
int kvm_qemu_init(void);
int kvm_qemu_create_context(void);
+void kvm_init_new_ap(int cpu, CPUState *env);
int kvm_init_ap(void);
void kvm_qemu_destroy(void);
void kvm_load_registers(CPUState *env);
--
1.4.2
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[kvm-devel] [PATCH 10/15] handle gpe data for pio
actually grab and return data, instead of just being two
bogus functions.
Signed-off-by: Glauber Costa <[EMAIL PROTECTED]>
---
qemu/hw/acpi.c | 36
1 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/qemu/hw/acpi.c b/qemu/hw/acpi.c
index 02f6bab..60d3094 100644
--- a/qemu/hw/acpi.c
+++ b/qemu/hw/acpi.c
@@ -545,6 +545,24 @@ static struct gpe_regs gpe;
static uint32_t gpe_readb(void *opaque, uint32_t addr)
{
uint32_t val = 0;
+struct gpe_regs *g = opaque;
+switch (addr) {
+case 0xafe0:
+val = g->sts & 0xFF;
+break;
+case 0xafe1:
+val = (g->sts >> 8) & 0xFF;
+break;
+case 0xafe2:
+val = g->en & 0xFF;
+break;
+case 0xafe3:
+val = (g->en >> 8) & 0xFF;
+break;
+default:
+break;
+}
+
#if defined(DEBUG)
printf("gpe read %lx == %lx\n", addr, val);
#endif
@@ -553,6 +571,24 @@ #endif
static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val)
{
+struct gpe_regs *g = opaque;
+switch (addr) {
+case 0xafe0:
+g->sts = (g->sts & ~0x) | (val & 0x);
+break;
+case 0xafe1:
+g->sts = (g->sts & 0x) | (val << 8);
+break;
+case 0xafe2:
+g->en = (g->en & ~0x) | (val & 0x);
+break;
+case 0xafe3:
+g->en = (g->en & 0x) | (val << 8);
+break;
+default:
+break;
+ }
+
#if defined(DEBUG)
printf("gpe write %lx <== %d\n", addr, val);
#endif
--
1.4.2
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[kvm-devel] [PATCH 8/15] isolate cpu initialization function in hw/pc.c
This patch wraps up the piece of code in hw/pc.c that
actually allocates and initializates a cpu. After that,
plan is to be able to start it later on.
Signed-off-by: Glauber Costa <[EMAIL PROTECTED]>
---
qemu/hw/pc.c | 40 +++-
qemu/hw/pc.h |1 +
2 files changed, 24 insertions(+), 17 deletions(-)
diff --git a/qemu/hw/pc.c b/qemu/hw/pc.c
index 77a7d53..982377d 100644
--- a/qemu/hw/pc.c
+++ b/qemu/hw/pc.c
@@ -740,6 +740,28 @@ static int load_option_rom(const char *f
return size;
}
+CPUState *pc_new_cpu(int cpu, const char *cpu_model, int pci_enabled)
+{
+CPUState *env = cpu_init(cpu_model);
+if (!env) {
+fprintf(stderr, "Unable to find x86 CPU definition\n");
+exit(1);
+}
+if (cpu != 0)
+env->hflags |= HF_HALTED_MASK;
+if (smp_cpus > 1) {
+/* XXX: enable it in all cases */
+env->cpuid_features |= CPUID_APIC;
+}
+register_savevm("cpu", cpu, 4, cpu_save, cpu_load, env);
+qemu_register_reset(main_cpu_reset, env);
+if (pci_enabled) {
+apic_init(env);
+}
+vmport_init(env);
+ return env;
+}
+
/* PC hardware initialisation */
static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
const char *boot_device, DisplayState *ds,
@@ -779,23 +801,7 @@ #endif
}
for(i = 0; i < smp_cpus; i++) {
-env = cpu_init(cpu_model);
-if (!env) {
-fprintf(stderr, "Unable to find x86 CPU definition\n");
-exit(1);
-}
-if (i != 0)
-env->hflags |= HF_HALTED_MASK;
-if (smp_cpus > 1) {
-/* XXX: enable it in all cases */
-env->cpuid_features |= CPUID_APIC;
-}
-register_savevm("cpu", i, 4, cpu_save, cpu_load, env);
-qemu_register_reset(main_cpu_reset, env);
-if (pci_enabled) {
-apic_init(env);
-}
-vmport_init(env);
+ env = pc_new_cpu(i, cpu_model, pci_enabled);
}
/* allocate RAM */
diff --git a/qemu/hw/pc.h b/qemu/hw/pc.h
index f640395..f70ab55 100644
--- a/qemu/hw/pc.h
+++ b/qemu/hw/pc.h
@@ -85,6 +85,7 @@ extern int fd_bootchk;
void ioport_set_a20(int enable);
int ioport_get_a20(void);
+CPUState *pc_new_cpu(int cpu, const char *cpu_model, int pci_enabled);
/* acpi.c */
extern int acpi_enabled;
--
1.4.2
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[kvm-devel] [PATCH 9/15] initialize hot add system.
Register the pios, and grab cpu_model for future usage.
Signed-off-by: Glauber Costa <[EMAIL PROTECTED]>
---
qemu/hw/acpi.c | 35 +++
qemu/hw/pc.c |1 +
2 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/qemu/hw/acpi.c b/qemu/hw/acpi.c
index 18561e0..02f6bab 100644
--- a/qemu/hw/acpi.c
+++ b/qemu/hw/acpi.c
@@ -533,6 +533,41 @@ void qemu_system_powerdown(void)
}
}
#endif
+unsigned long gpe_base = 0xafe0;
+
+struct gpe_regs {
+uint16_t sts; /* status */
+uint16_t en; /* enabled */
+};
+
+static struct gpe_regs gpe;
+
+static uint32_t gpe_readb(void *opaque, uint32_t addr)
+{
+uint32_t val = 0;
+#if defined(DEBUG)
+printf("gpe read %lx == %lx\n", addr, val);
+#endif
+return val;
+}
+
+static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val)
+{
+#if defined(DEBUG)
+printf("gpe write %lx <== %d\n", addr, val);
+#endif
+}
+
+static char *model;
+
+void qemu_system_hot_add_init(char *cpu_model)
+{
+register_ioport_write(gpe_base, 4, 1, gpe_writeb, &gpe);
+register_ioport_read(gpe_base, 4, 1, gpe_readb, &gpe);
+
+model = cpu_model;
+}
+
void qemu_system_cpu_hot_add(int cpu, int state)
{
}
diff --git a/qemu/hw/pc.c b/qemu/hw/pc.c
index 982377d..ab69e5c 100644
--- a/qemu/hw/pc.c
+++ b/qemu/hw/pc.c
@@ -1020,6 +1020,7 @@ #endif
}
}
+qemu_system_hot_add_init(cpu_model);
#define USE_HYPERCALL
#ifdef USE_HYPERCALL
pci_hypercall_init(pci_bus);
--
1.4.2
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[kvm-devel] [PATCH 7/15] implement method _L00 for GPE0
This corresponds to the cpu hotplug functionality
Signed-off-by: Glauber Costa <[EMAIL PROTECTED]>
---
bios/acpi-dsdt.dsl | 114
1 files changed, 114 insertions(+), 0 deletions(-)
diff --git a/bios/acpi-dsdt.dsl b/bios/acpi-dsdt.dsl
index d738b2f..bdb591a 100755
--- a/bios/acpi-dsdt.dsl
+++ b/bios/acpi-dsdt.dsl
@@ -589,6 +589,120 @@ DefinitionBlock (
Scope (\_GPE)
{
Method(_L00) {
+/* Up status */
+If (And(\_PR.PRU, 0x2)) {
+Notify(\_PR.CPU1,1)
+}
+
+If (And(\_PR.PRU, 0x4)) {
+Notify(\_PR.CPU2,1)
+}
+
+If (And(\_PR.PRU, 0x8)) {
+Notify(\_PR.CPU3,1)
+}
+
+If (And(\_PR.PRU, 0x10)) {
+Notify(\_PR.CPU4,1)
+}
+
+If (And(\_PR.PRU, 0x20)) {
+Notify(\_PR.CPU5,1)
+}
+
+If (And(\_PR.PRU, 0x40)) {
+Notify(\_PR.CPU6,1)
+}
+
+If (And(\_PR.PRU, 0x80)) {
+Notify(\_PR.CPU7,1)
+}
+
+If (And(\_PR.PRU, 0x100)) {
+Notify(\_PR.CPU8,1)
+}
+
+If (And(\_PR.PRU, 0x200)) {
+Notify(\_PR.CPU9,1)
+}
+
+If (And(\_PR.PRU, 0x400)) {
+Notify(\_PR.CPUA,1)
+}
+
+If (And(\_PR.PRU, 0x800)) {
+Notify(\_PR.CPUB,1)
+}
+
+If (And(\_PR.PRU, 0x1000)) {
+Notify(\_PR.CPUC,1)
+}
+
+If (And(\_PR.PRU, 0x2000)) {
+Notify(\_PR.CPUD,1)
+}
+
+If (And(\_PR.PRU, 0x4000)) {
+Notify(\_PR.CPUE,1)
+}
+
+/* down */
+If (And(\_PR.PRD, 0x2)) {
+Notify(\_PR.CPU1,3)
+}
+
+If (And(\_PR.PRD, 0x4)) {
+Notify(\_PR.CPU2,3)
+}
+
+If (And(\_PR.PRD, 0x8)) {
+Notify(\_PR.CPU3,3)
+}
+
+If (And(\_PR.PRD, 0x10)) {
+Notify(\_PR.CPU4,3)
+}
+
+If (And(\_PR.PRD, 0x20)) {
+Notify(\_PR.CPU5,3)
+}
+
+If (And(\_PR.PRD, 0x40)) {
+Notify(\_PR.CPU6,3)
+}
+
+If (And(\_PR.PRD, 0x80)) {
+Notify(\_PR.CPU7,3)
+}
+
+If (And(\_PR.PRD, 0x100)) {
+Notify(\_PR.CPU8,3)
+}
+
+If (And(\_PR.PRD, 0x200)) {
+Notify(\_PR.CPU9,3)
+}
+
+If (And(\_PR.PRD, 0x400)) {
+Notify(\_PR.CPUA,3)
+}
+
+If (And(\_PR.PRD, 0x800)) {
+Notify(\_PR.CPUB,3)
+}
+
+If (And(\_PR.PRD, 0x1000)) {
+Notify(\_PR.CPUC,3)
+}
+
+If (And(\_PR.PRD, 0x2000)) {
+Notify(\_PR.CPUD,3)
+}
+
+If (And(\_PR.PRD, 0x4000)) {
+Notify(\_PR.CPUE,3)
+}
+
Return(0x01)
}
Method(_L01) {
--
1.4.2
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[kvm-devel] [PATCH 6/15] provide operation region for pio to the gpes
Signed-off-by: Glauber Costa <[EMAIL PROTECTED]>
---
bios/acpi-dsdt.dsl |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/bios/acpi-dsdt.dsl b/bios/acpi-dsdt.dsl
index 7c954c3..d738b2f 100755
--- a/bios/acpi-dsdt.dsl
+++ b/bios/acpi-dsdt.dsl
@@ -27,6 +27,13 @@ DefinitionBlock (
{
Scope (\_PR)
{
+ OperationRegion( PRST, SystemIO, 0xaf00, 0x02)
+ Field (PRST, ByteAcc, NoLock, WriteAsZeros)
+ {
+ PRU, 8,
+ PRD, 8,
+ }
+
Processor (CPU0, 0x00, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
Processor (CPU1, 0x01, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
Processor (CPU2, 0x02, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
--
1.4.2
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[kvm-devel] [PATCH 4/15] mark processors as presents
mark processors as present through the _STA method
Signed-off-by: Glauber Costa <[EMAIL PROTECTED]>
---
bios/acpi-dsdt.dsl | 19 +++
1 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/bios/acpi-dsdt.dsl b/bios/acpi-dsdt.dsl
index e900795..cd42e23 100755
--- a/bios/acpi-dsdt.dsl
+++ b/bios/acpi-dsdt.dsl
@@ -25,9 +25,28 @@ DefinitionBlock (
0x1 // OEM Revision
)
{
+ Scope (\_PR)
+ {
+Processor (CPU0, 0x00, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
+Processor (CPU1, 0x01, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
+Processor (CPU2, 0x02, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
+Processor (CPU3, 0x03, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
+Processor (CPU4, 0x04, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
+Processor (CPU5, 0x05, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
+Processor (CPU6, 0x06, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
+Processor (CPU7, 0x07, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
+Processor (CPU8, 0x08, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
+Processor (CPU9, 0x09, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
+Processor (CPUA, 0x0a, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
+Processor (CPUB, 0x0b, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
+Processor (CPUC, 0x0c, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
+Processor (CPUD, 0x0d, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
+Processor (CPUE, 0x0e, 0xb010, 0x06) {Method (_STA) { Return(0x1)}}
+}
Scope (\)
{
+
/* CMOS memory access */
OperationRegion (CMS, SystemIO, 0x70, 0x02)
Field (CMS, ByteAcc, NoLock, Preserve)
--
1.4.2
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[kvm-devel] [PATCH 3/15] introduce cpu_set to qemu monitor
in this patch, cpu_set is introduced to qemu monitor
semantics is : cpu_set x online|offline.
it will then tell the acpi backend to signal cpu x.
Signed-off-by: Glauber Costa <[EMAIL PROTECTED]>
---
qemu/hw/acpi.c |3 +++
qemu/monitor.c | 16
qemu/sysemu.h |3 +++
3 files changed, 22 insertions(+), 0 deletions(-)
diff --git a/qemu/hw/acpi.c b/qemu/hw/acpi.c
index e21ded0..18561e0 100644
--- a/qemu/hw/acpi.c
+++ b/qemu/hw/acpi.c
@@ -533,3 +533,6 @@ void qemu_system_powerdown(void)
}
}
#endif
+void qemu_system_cpu_hot_add(int cpu, int state)
+{
+}
diff --git a/qemu/monitor.c b/qemu/monitor.c
index e8022c8..09f84a9 100644
--- a/qemu/monitor.c
+++ b/qemu/monitor.c
@@ -345,6 +345,21 @@ static void do_cpu_set(int index)
term_printf("Invalid CPU index\n");
}
+static void do_cpu_set_nr(int value, const char *status)
+{
+int state;
+
+if (!strcmp(status, "online"))
+ state = 1;
+else if (!strcmp(status, "offline"))
+ state = 0;
+else {
+ term_printf("invalid status: %s\n", status);
+ return;
+}
+qemu_system_cpu_hot_add(value, state);
+}
+
static void do_info_jit(void)
{
dump_exec_info(NULL, monitor_fprintf);
@@ -1338,6 +1353,7 @@ #endif
"", "cancel the current VM migration" },
{ "migrate_set_speed", "s", do_migrate_set_speed,
"value", "set maximum speed (in bytes) for migrations" },
+{ "cpu_set", "is", do_cpu_set_nr, "cpu [online|offline]", "change cpu
state" },
{ NULL, NULL, },
};
diff --git a/qemu/sysemu.h b/qemu/sysemu.h
index ffc468a..fe929b4 100644
--- a/qemu/sysemu.h
+++ b/qemu/sysemu.h
@@ -153,6 +153,9 @@ int extboot_drive;
extern int drive_get_index(BlockInterfaceType type, int bus, int unit);
extern int drive_get_max_bus(BlockInterfaceType type);
+/* acpi */
+void qemu_system_cpu_hot_add(int cpu, int state);
+
/* vmchannel devices */
#define MAX_VMCHANNEL_DEVICES 4
--
1.4.2
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[kvm-devel] [PATCH 5/15] provide gpe _L0x methods
provide methods for gpe blk 0, even though they do nothing atm
Signed-off-by: Glauber Costa <[EMAIL PROTECTED]>
---
bios/acpi-dsdt.dsl | 51 +++
1 files changed, 51 insertions(+), 0 deletions(-)
diff --git a/bios/acpi-dsdt.dsl b/bios/acpi-dsdt.dsl
index cd42e23..7c954c3 100755
--- a/bios/acpi-dsdt.dsl
+++ b/bios/acpi-dsdt.dsl
@@ -579,4 +579,55 @@ DefinitionBlock (
0x00, // reserved
0x00, // reserved
})
+Scope (\_GPE)
+{
+Method(_L00) {
+Return(0x01)
+}
+Method(_L01) {
+Return(0x01)
+}
+Method(_L02) {
+Return(0x01)
+}
+Method(_L03) {
+Return(0x01)
+}
+Method(_L04) {
+Return(0x01)
+}
+Method(_L05) {
+Return(0x01)
+}
+Method(_L06) {
+Return(0x01)
+}
+Method(_L07) {
+Return(0x01)
+}
+Method(_L08) {
+Return(0x01)
+}
+Method(_L09) {
+Return(0x01)
+}
+Method(_L0A) {
+Return(0x01)
+}
+Method(_L0B) {
+Return(0x01)
+}
+Method(_L0C) {
+Return(0x01)
+}
+Method(_L0D) {
+Return(0x01)
+}
+Method(_L0E) {
+Return(0x01)
+}
+Method(_L0F) {
+Return(0x01)
+}
+}
}
--
1.4.2
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[kvm-devel] [PATCH 2/15] mark extra cpus as present
Mark cpus over smp_cpus as present, but disable.
The OS can then recognize it and make room for future hotplug
Signed-off-by: Glauber Costa <[EMAIL PROTECTED]>
---
bios/rombios.h |2 ++
bios/rombios32.c | 21 +
2 files changed, 15 insertions(+), 8 deletions(-)
diff --git a/bios/rombios.h b/bios/rombios.h
index 412c5e9..2cf2bb3 100644
--- a/bios/rombios.h
+++ b/bios/rombios.h
@@ -58,6 +58,8 @@ #define PM_IO_BASE0xb000
#define SMB_IO_BASE 0xb100
#define CPU_COUNT_ADDR0xf000
+#define MAX_CPUS 16
+
// Define the application NAME
#if defined(BX_QEMU)
# define BX_APPNAME "QEMU"
diff --git a/bios/rombios32.c b/bios/rombios32.c
index 3ec85cb..f2db740 100755
--- a/bios/rombios32.c
+++ b/bios/rombios32.c
@@ -948,20 +948,22 @@ #endif
putstr(&q, "0.1 "); /* vendor id */
putle32(&q, 0); /* OEM table ptr */
putle16(&q, 0); /* OEM table size */
-putle16(&q, smp_cpus + 18); /* entry count */
+putle16(&q, MAX_CPUS + 18); /* entry count */
putle32(&q, 0xfee0); /* local APIC addr */
putle16(&q, 0); /* ext table length */
putb(&q, 0); /* ext table checksum */
putb(&q, 0); /* reserved */
-for(i = 0; i < smp_cpus; i++) {
+for(i = 0; i < MAX_CPUS ; i++) {
putb(&q, 0); /* entry type = processor */
putb(&q, i); /* APIC id */
putb(&q, 0x11); /* local APIC version number */
if (i == 0)
putb(&q, 3); /* cpu flags: enabled, bootstrap cpu */
-else
+else if ( i < smp_cpus)
putb(&q, 1); /* cpu flags: enabled */
+else
+putb(&q, 0); /* cpu flags: disabled */
putb(&q, 0); /* cpu signature */
putb(&q, 6);
putb(&q, 0);
@@ -981,7 +983,7 @@ #endif
putstr(&q, "ISA ");
/* ioapic */
-ioapic_id = smp_cpus;
+ioapic_id = MAX_CPUS;
putb(&q, 2); /* entry type = I/O APIC */
putb(&q, ioapic_id); /* apic ID */
putb(&q, 0x11); /* I/O APIC version number */
@@ -1393,7 +1395,7 @@ #endif
addr = (addr + 7) & ~7;
madt_addr = addr;
madt_size = sizeof(*madt) +
-sizeof(struct madt_processor_apic) * smp_cpus +
+sizeof(struct madt_processor_apic) * MAX_CPUS +
sizeof(struct madt_io_apic);
madt = (void *)(addr);
addr += madt_size;
@@ -1466,18 +1468,21 @@ #endif
madt->local_apic_address = cpu_to_le32(0xfee0);
madt->flags = cpu_to_le32(1);
apic = (void *)(madt + 1);
-for(i=0;itype = APIC_PROCESSOR;
apic->length = sizeof(*apic);
apic->processor_id = i;
apic->local_apic_id = i;
-apic->flags = cpu_to_le32(1);
+if (i < smp_cpus)
+apic->flags = cpu_to_le32(1);
+else
+apic->flags = 0;
apic++;
}
io_apic = (void *)apic;
io_apic->type = APIC_IO;
io_apic->length = sizeof(*io_apic);
-io_apic->io_apic_id = smp_cpus;
+io_apic->io_apic_id = MAX_CPUS;
io_apic->address = cpu_to_le32(0xfec0);
io_apic->interrupt = cpu_to_le32(0);
--
1.4.2
-
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[kvm-devel] [PATCH 0/15] Review: acpi processor hotplug
Hi, In this series, I'm sending the result-so-far of my work with acpi for processor hotplug. I'm able to put a cpu up and down (with the help of some udev scripts I wrote), but it still has some known bugs and issues. For x86_64 linux machines (because the kernel supports it), you can plug cpus that _were not_ listed initially in smp_cpus. The usage is : cpu_set x (online/offline), in qemu monitor. It will then send the proper signals to the cpu #x. However, it is important to note that: * there's no way to know if it suceeded. (ex, if the udev scripts are not running, the cpu will not be put up, and you'll never know) * there's no way to unconditionally send an add signal. (if you send BUS_CHECK again, and the cpu is already marked as present, it will offline it instead) because of that, management gets a bit complicated. The ideal situation is to specify: "I want Y cpus", and have it. Error reported in case it fails. Because of that, I _still_ advocate for an alternative virtio implementation. ACPI still plays its role in this scenario, but not the full role. In my TODO list, you'll find: * fix some more issues in this code, and merge the gently comments I'm sure you'll make * device acpi hotplug * virtio cpu hotplug for linux (meaning refactoring the existing patch) * occupy 24 territories. * conquer 18 territories with at least 2 battalions on each. Besides a bunch of boring personal items I'm sure are not of interest to anybody here. Thanks in advance - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] [PATCH 1/15] Make a GPE register block be acessible.
gpe is acessible when its address listed by BIOS is !0. This patch makes gpe blk 0 available, and 4 bytes in length Signed-off-by: Glauber Costa <[EMAIL PROTECTED]> --- bios/rombios32.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/bios/rombios32.c b/bios/rombios32.c index 5365b5f..3ec85cb 100755 --- a/bios/rombios32.c +++ b/bios/rombios32.c @@ -1441,6 +1441,8 @@ #endif fadt->pm_tmr_len = 4; fadt->plvl2_lat = cpu_to_le16(0x0fff); // C2 state not supported fadt->plvl3_lat = cpu_to_le16(0x0fff); // C3 state not supported +fadt->gpe0_blk = cpu_to_le32(0xafe0); +fadt->gpe0_blk_len = 4; /* WBINVD + PROC_C1 + SLP_BUTTON + FIX_RTC */ fadt->flags = cpu_to_le32((1 << 0) | (1 << 2) | (1 << 5) | (1 << 6)); acpi_build_table_header((struct acpi_table_header *)fadt, "FACP", -- 1.4.2 - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] [ kvm-Bugs-1899961 ] NIC not working properly with WS2008 RC1 x64
Bugs item #1899961, was opened at 2008-02-22 16:19 Message generated for change (Tracker Item Submitted) made by Item Submitter You can respond by visiting: https://sourceforge.net/tracker/?func=detail&atid=893831&aid=1899961&group_id=180599 Please note that this message will contain a full copy of the comment thread, including the initial issue submission, for this request, not just the latest update. Category: None Group: None Status: Open Resolution: None Priority: 5 Private: No Submitted By: Daniel (danielhs) Assigned to: Nobody/Anonymous (nobody) Summary: NIC not working properly with WS2008 RC1 x64 Initial Comment: Using KVM-60 with Windows Server 2008 x64, the NIC is not working properly. Can't do any kind of network activities. The windows network monitor indicates that a lot of data has been received, but none sent. Link to windows server 2008 rc1 standard edition http://www.microsoft.com/downloads/details.aspx?FamilyId=B8144EBA-9EFD-475F-9DD3-A264A00BF5A1&displaylang=en I'm using the install from Ubuntu Hardy. I've had no problems networking using Windows XP x64 under same KVM/Ubuntu install. -- You can respond by visiting: https://sourceforge.net/tracker/?func=detail&atid=893831&aid=1899961&group_id=180599 - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] [PATCH] fix screen corruption bug in vga_draw_graphic()
hi,
the attached patch fixes the screen corruption issues which were
reported by others, see:
http://article.gmane.org/gmane.comp.emulators.kvm.devel/13543
http://article.gmane.org/gmane.comp.emulators.kvm.devel/13409
The bug is kvm specific and can only be observed in graphics mode using
relatively high resolutions (when one line uses more than one page of
memory). As far as I've seen this bug is around since commit
dd9591e0fea25a1414f4a6b2faa61ed733e0acc6 (5 nov 2006).
I've attached two versions of the patch. One just changes the relevant
line and the other one also cleans up formatting (indention) of the kvm
specific code.
cheers,
Andi
--- kvm-61.orig/qemu/hw/vga.c 2008-02-19 15:58:28.0 +0100
+++ kvm-61/qemu/hw/vga.c 2008-02-22 20:46:14.0 +0100
@@ -1558,17 +1558,20 @@ static void vga_draw_graphic(VGAState *s
update = full_update |
cpu_physical_memory_get_dirty(page0, VGA_DIRTY_FLAG) |
cpu_physical_memory_get_dirty(page1, VGA_DIRTY_FLAG);
- if (kvm_enabled()) {
- update |= bitmap_get_dirty(bitmap, (page0 - s->vram_offset) >> TARGET_PAGE_BITS);
- update |= bitmap_get_dirty(bitmap, (page1 - s->vram_offset) >> TARGET_PAGE_BITS);
- }
+if (kvm_enabled()) {
+update |= bitmap_get_dirty(bitmap,
+(page0 - s->vram_offset) >> TARGET_PAGE_BITS);
+update |= bitmap_get_dirty(bitmap,
+(page1 - s->vram_offset) >> TARGET_PAGE_BITS);
+}
if ((page1 - page0) > TARGET_PAGE_SIZE) {
/* if wide line, can use another page */
update |= cpu_physical_memory_get_dirty(page0 + TARGET_PAGE_SIZE,
VGA_DIRTY_FLAG);
- if (kvm_enabled())
- update |= bitmap_get_dirty(bitmap, (page0 - s->vram_offset) >> TARGET_PAGE_BITS);
+if (kvm_enabled())
+update |= bitmap_get_dirty(bitmap, (page0 + TARGET_PAGE_SIZE
+- s->vram_offset) >> TARGET_PAGE_BITS);
}
/* explicit invalidation for the hardware cursor */
update |= (s->invalidated_y_table[y >> 5] >> (y & 0x1f)) & 1;
--- kvm-61.orig/qemu/hw/vga.c 2008-02-19 15:58:28.0 +0100
+++ kvm-61/qemu/hw/vga.c 2008-02-22 21:01:19.0 +0100
@@ -1568,7 +1568,7 @@ static void vga_draw_graphic(VGAState *s
update |= cpu_physical_memory_get_dirty(page0 + TARGET_PAGE_SIZE,
VGA_DIRTY_FLAG);
if (kvm_enabled())
- update |= bitmap_get_dirty(bitmap, (page0 - s->vram_offset) >> TARGET_PAGE_BITS);
+ update |= bitmap_get_dirty(bitmap, (page0 + TARGET_PAGE_SIZE - s->vram_offset) >> TARGET_PAGE_BITS);
}
/* explicit invalidation for the hardware cursor */
update |= (s->invalidated_y_table[y >> 5] >> (y & 0x1f)) & 1;
-
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Re: [kvm-devel] The SMP RHEL 5.1 PAE guest can't boot up issue
On Fri, Feb 22, 2008 at 08:45:00PM +0200, Avi Kivity wrote: > Marcelo Tosatti wrote: > >Another source of problems in this area is that the TSC_OFFSET is > >initialized to represent zero at different times for VCPU0 (at boot) and > >the remaining ones (at APIC_DM_INIT). > > > > > > I added tsc sync in the guest bios some time ago, so this should be > solved now. > > >>This will improve tsc quality for those machines, but we can't depend on > >>it, since some machines don't have constant tsc. Further, I don't think > >>really large machines can have constant tsc since clock distribution > >>becomes difficult or impossible. > >> > > > >As discussed earlier, in case the host kernel does not have the TSC > >stable, it needs to enforce a state which the guest OS will not trust > >the TSC. The easier way to do that is to fake a C3 state. However, QEMU > >does not emulate IO port based wait. This appears to be the reason for > >the high-CPU-usage-on-idle with Windows guests, fixed by disabling C3 > >reporting on rombios (commit cb98751267c2d79f5674301ccac6c6b5c2e0c6b5 of > >kvm-userspace). > > > > > > Oh. Can you point me at documentation for the io port wait thing? ACPI spec 3.0b section 4.7.3.5. Reading LVL2 or LVL3 register will cause the processor to enter the specified C state. See drivers/acpi/processor_idle.c::acpi_idle_do_entry. - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] vmwarevga on recent X
I posted about this on the Qemu mailing list as this behavior occurs on non-kvm Qemu as well, but has anyone used vmwarevga with recent X such as F9 alpha? When I try to run X with vmwarevga I get an error that no supported adapters were found. Has anyone else seen this? Mark Bidewell - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] [PATCH] Don't explicitly set BAR values for VMware VGA
Right now we set explict base addresses for the PCI IO regions in the VMware
VGA device. We don't register the second region at all and instead directly
map the physical memory.
The problem is, the addresses we're setting in the BAR is not taken into
account in the e820 mapping.
This patch removes the explicit BARs and registers the second region through
the normal PCI code.
I've only tested with a Linux guest and the open source VMware VGA driver.
This patch needs -p2 to apply against the QEMU CVS tree.
Signed-off-by: Anthony Liguori <[EMAIL PROTECTED]>
diff --git a/qemu/hw/vmware_vga.c b/qemu/hw/vmware_vga.c
index bd96e6b..ec7b1cd 100644
--- a/qemu/hw/vmware_vga.c
+++ b/qemu/hw/vmware_vga.c
@@ -60,6 +60,8 @@ struct vmsvga_state_s {
int vram_size;
#endif
uint8_t *vram;
+uint32_t vram_addr;
+int iomemtype;
int index;
int scratch_size;
@@ -644,7 +646,7 @@ static uint32_t vmsvga_value_read(void *opaque, uint32_t
address)
return ((s->depth + 7) >> 3) * s->new_width;
case SVGA_REG_FB_START:
-return SVGA_MEM_BASE;
+return s->vram_addr;
case SVGA_REG_FB_OFFSET:
return 0x0;
@@ -671,7 +673,7 @@ static uint32_t vmsvga_value_read(void *opaque, uint32_t
address)
return caps;
case SVGA_REG_MEM_START:
-return SVGA_MEM_BASE + s->vram_size - SVGA_FIFO_SIZE;
+return s->vram_addr + s->vram_size - SVGA_FIFO_SIZE;
case SVGA_REG_MEM_SIZE:
return SVGA_FIFO_SIZE;
@@ -953,7 +955,7 @@ static void vmsvga_screen_dump(void *opaque, const char
*filename)
static uint32_t vmsvga_vram_readb(void *opaque, target_phys_addr_t addr)
{
struct vmsvga_state_s *s = (struct vmsvga_state_s *) opaque;
-addr -= SVGA_MEM_BASE;
+addr -= s->vram_addr;
if (addr < s->fb_size)
return *(uint8_t *) (s->ds->data + addr);
else
@@ -963,7 +965,7 @@ static uint32_t vmsvga_vram_readb(void *opaque,
target_phys_addr_t addr)
static uint32_t vmsvga_vram_readw(void *opaque, target_phys_addr_t addr)
{
struct vmsvga_state_s *s = (struct vmsvga_state_s *) opaque;
-addr -= SVGA_MEM_BASE;
+addr -= s->vram_addr;
if (addr < s->fb_size)
return *(uint16_t *) (s->ds->data + addr);
else
@@ -973,7 +975,7 @@ static uint32_t vmsvga_vram_readw(void *opaque,
target_phys_addr_t addr)
static uint32_t vmsvga_vram_readl(void *opaque, target_phys_addr_t addr)
{
struct vmsvga_state_s *s = (struct vmsvga_state_s *) opaque;
-addr -= SVGA_MEM_BASE;
+addr -= s->vram_addr;
if (addr < s->fb_size)
return *(uint32_t *) (s->ds->data + addr);
else
@@ -984,7 +986,7 @@ static void vmsvga_vram_writeb(void *opaque,
target_phys_addr_t addr,
uint32_t value)
{
struct vmsvga_state_s *s = (struct vmsvga_state_s *) opaque;
-addr -= SVGA_MEM_BASE;
+addr -= s->vram_addr;
if (addr < s->fb_size)
*(uint8_t *) (s->ds->data + addr) = value;
else
@@ -995,7 +997,7 @@ static void vmsvga_vram_writew(void *opaque,
target_phys_addr_t addr,
uint32_t value)
{
struct vmsvga_state_s *s = (struct vmsvga_state_s *) opaque;
-addr -= SVGA_MEM_BASE;
+addr -= s->vram_addr;
if (addr < s->fb_size)
*(uint16_t *) (s->ds->data + addr) = value;
else
@@ -1006,7 +1008,7 @@ static void vmsvga_vram_writel(void *opaque,
target_phys_addr_t addr,
uint32_t value)
{
struct vmsvga_state_s *s = (struct vmsvga_state_s *) opaque;
-addr -= SVGA_MEM_BASE;
+addr -= s->vram_addr;
if (addr < s->fb_size)
*(uint32_t *) (s->ds->data + addr) = value;
else
@@ -1081,10 +1083,10 @@ static void vmsvga_init(struct vmsvga_state_s *s,
DisplayState *ds,
uint8_t *vga_ram_base, unsigned long vga_ram_offset,
int vga_ram_size)
{
-int iomemtype;
s->ds = ds;
s->vram = vga_ram_base;
s->vram_size = vga_ram_size;
+s->vram_addr = 0;
s->scratch_size = SVGA_SCRATCH_SIZE;
s->scratch = (uint32_t *) qemu_malloc(s->scratch_size * 4);
@@ -1092,13 +1094,11 @@ static void vmsvga_init(struct vmsvga_state_s *s,
DisplayState *ds,
vmsvga_reset(s);
#ifdef DIRECT_VRAM
-iomemtype = cpu_register_io_memory(0, vmsvga_vram_read,
-vmsvga_vram_write, s);
+s->iomemtype = cpu_register_io_memory(0, vmsvga_vram_read,
+ vmsvga_vram_write, s);
#else
-iomemtype = vga_ram_offset | IO_MEM_RAM;
+s->iomemtype = vga_ram_offset | IO_MEM_RAM;
#endif
-cpu_register_physical_memory(SVGA_MEM_BASE, vga_ram_size,
-iomemtype);
graphic_console_init(ds, vmsvga_update_display,
vmsvga_invalidate_display, vmsvga_screen_dump, s);
@@ -1133,24 +1133,30 @@ static int pci_vmsvga_load(QEMUFile *f, void *opaque,
int version_id)
return 0;
}
-static void pci_vmsvga_map_ioport(PCIDevice *pci_dev, int region_num,
+static void pci_vm
[kvm-devel] [PATCH 1/3] Move common VGAState attributes to VGA_STATE_COMMON
vmware_vga.c uses functions in vga.c to do some things. They
need to agree on which parts of their state struct is common
and which aren't, otherwise they'll overwrite parts of each
other's state. This patch makes it so.
Signed-off-by: Soren Hansen <[EMAIL PROTECTED]>
Reviewed-by: Anthony Liguori <[EMAIL PROTECTED]>
diff --git a/qemu/hw/cirrus_vga.c b/qemu/hw/cirrus_vga.c
index 1915c73..35cee6b 100644
--- a/qemu/hw/cirrus_vga.c
+++ b/qemu/hw/cirrus_vga.c
@@ -240,9 +240,6 @@ typedef struct CirrusVGAState {
int cirrus_mmio_io_addr;
unsigned long cirrus_lfb_addr;
unsigned long cirrus_lfb_end;
-int aliases_enabled;
-uint32_t aliased_bank_base[2];
-uint32_t aliased_bank_limit[2];
uint32_t cirrus_addr_mask;
uint32_t linear_mmio_mask;
uint8_t cirrus_shadow_gr0;
diff --git a/qemu/hw/vga_int.h b/qemu/hw/vga_int.h
index 912d977..196f8df 100644
--- a/qemu/hw/vga_int.h
+++ b/qemu/hw/vga_int.h
@@ -147,18 +147,14 @@
uint32_t last_palette[256]; \
uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */\
unsigned long map_addr;\
-unsigned long map_end;
+unsigned long map_end; \
+int aliases_enabled; \
+uint32_t aliased_bank_base[2]; \
+uint32_t aliased_bank_limit[2];
typedef struct VGAState {
VGA_STATE_COMMON
-
-int32_t aliases_enabled;
-int32_t pad1;
-uint32_t aliased_bank_base[2];
-uint32_t aliased_bank_limit[2];
-
-
} VGAState;
static inline int c6_to_8(int v)
-
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[kvm-devel] [PATCH 2/3] Factor out the VGA vram mapping updating routine
This function is useful for enabling KVM support in VMware VGA.
Signed-off-by: Anthony Liguori <[EMAIL PROTECTED]>
diff --git a/qemu/hw/vga.c b/qemu/hw/vga.c
index 222a39c..1cfc154 100644
--- a/qemu/hw/vga.c
+++ b/qemu/hw/vga.c
@@ -1813,6 +1813,36 @@ typedef struct PCIVGAState {
VGAState vga_state;
} PCIVGAState;
+void vga_update_vram_mapping(VGAState *s, unsigned long vga_ram_begin,
+unsigned long vga_ram_end)
+{
+void *vram_pointer, *old_vram;
+
+if (vga_ram_begin == s->map_addr &&
+ vga_ram_end == s->map_end) {
+ return;
+}
+
+if (s->map_addr && s->map_end)
+ unset_vram_mapping(s->map_addr, s->map_end);
+
+vram_pointer = set_vram_mapping(vga_ram_begin, vga_ram_end);
+if (!vram_pointer) {
+ fprintf(stderr, "set_vram_mapping failed\n");
+ s->map_addr = s->map_end = 0;
+}
+else {
+ old_vram = vga_update_vram((VGAState *)s, vram_pointer,
+ VGA_RAM_SIZE);
+ if (s->map_addr && s->map_end)
+ munmap(old_vram, s->map_end - s->map_addr);
+ else
+ qemu_free(old_vram);
+ s->map_addr = vga_ram_begin;
+ s->map_end = vga_ram_end;
+}
+}
+
static void vga_map(PCIDevice *pci_dev, int region_num,
uint32_t addr, uint32_t size, int type)
{
@@ -1822,37 +1852,8 @@ static void vga_map(PCIDevice *pci_dev, int region_num,
cpu_register_physical_memory(addr, s->bios_size, s->bios_offset);
} else {
cpu_register_physical_memory(addr, s->vram_size, s->vram_offset);
-if (kvm_enabled()) {
-unsigned long vga_ram_begin, vga_ram_end;
-void *vram_pointer, *old_vram;
-
-vga_ram_begin = addr;
-vga_ram_end = addr + VGA_RAM_SIZE;
-
-if (vga_ram_begin == s->map_addr &&
-vga_ram_end == s->map_end) {
-return;
-}
-
-if (s->map_addr && s->map_end)
-unset_vram_mapping(s->map_addr, s->map_end);
-
-vram_pointer = set_vram_mapping(vga_ram_begin, vga_ram_end);
-if (!vram_pointer) {
-fprintf(stderr, "set_vram_mapping failed\n");
-s->map_addr = s->map_end = 0;
-}
-else {
-old_vram = vga_update_vram((VGAState *)s, vram_pointer,
- VGA_RAM_SIZE);
-if (s->map_addr && s->map_end)
-munmap(old_vram, s->map_end - s->map_addr);
-else
-qemu_free(old_vram);
-s->map_addr = vga_ram_begin;
-s->map_end = vga_ram_end;
-}
-}
+ if (kvm_enabled())
+ vga_update_vram_mapping(s, addr, addr + VGA_RAM_SIZE);
}
}
diff --git a/qemu/hw/vga_int.h b/qemu/hw/vga_int.h
index 196f8df..8d29205 100644
--- a/qemu/hw/vga_int.h
+++ b/qemu/hw/vga_int.h
@@ -192,5 +192,7 @@ void *set_vram_mapping(unsigned long begin, unsigned long
end);
int unset_vram_mapping(unsigned long begin, unsigned long end);
void *vga_update_vram(VGAState *s, void *vga_ram_base, int vga_ram_size);
+void vga_update_vram_mapping(VGAState *s, unsigned long vga_ram_begin,
+unsigned long vga_ram_end);
extern const uint8_t sr_mask[8];
extern const uint8_t gr_mask[16];
-
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[kvm-devel] [PATCH 3/3] Enable VGA optimization for VMware VGA
After the previous patches, this patch is pretty straight forward.
Signed-off-by: Anthony Liguori <[EMAIL PROTECTED]>
diff --git a/qemu/hw/vmware_vga.c b/qemu/hw/vmware_vga.c
index ec7b1cd..f2a298e 100644
--- a/qemu/hw/vmware_vga.c
+++ b/qemu/hw/vmware_vga.c
@@ -36,6 +36,9 @@
# include "vga_int.h"
#endif
+#include "qemu-kvm.h"
+#include "pc.h"
+
struct vmsvga_state_s {
#ifdef EMBED_STDVGA
VGA_STATE_COMMON
@@ -1155,6 +1158,8 @@ static void pci_vmsvga_map(PCIDevice *pci_dev, int
region_num,
} else {
cpu_register_physical_memory(addr, s->vram_size, s->iomemtype);
s->vram_addr = addr;
+if (kvm_enabled())
+ vga_update_vram_mapping((VGAState *)s, addr, addr + VGA_RAM_SIZE);
s->vram = s->vram_ptr;
}
}
-
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Re: [kvm-devel] The SMP RHEL 5.1 PAE guest can't boot up issue
Marcelo Tosatti wrote: > Another source of problems in this area is that the TSC_OFFSET is > initialized to represent zero at different times for VCPU0 (at boot) and > the remaining ones (at APIC_DM_INIT). > > I added tsc sync in the guest bios some time ago, so this should be solved now. >> This will improve tsc quality for those machines, but we can't depend on >> it, since some machines don't have constant tsc. Further, I don't think >> really large machines can have constant tsc since clock distribution >> becomes difficult or impossible. >> > > As discussed earlier, in case the host kernel does not have the TSC > stable, it needs to enforce a state which the guest OS will not trust > the TSC. The easier way to do that is to fake a C3 state. However, QEMU > does not emulate IO port based wait. This appears to be the reason for > the high-CPU-usage-on-idle with Windows guests, fixed by disabling C3 > reporting on rombios (commit cb98751267c2d79f5674301ccac6c6b5c2e0c6b5 of > kvm-userspace). > > Oh. Can you point me at documentation for the io port wait thing? -- Any sufficiently difficult bug is indistinguishable from a feature. - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] [PATCH] QEMU/KVM: report paravirt features on cpuid
Report paravirt features on cpuid.
Signed-off-by: Marcelo Tosatti <[EMAIL PROTECTED]>
Index: kvm-userspace/qemu/qemu-kvm-x86.c
===
--- kvm-userspace.orig/qemu/qemu-kvm-x86.c
+++ kvm-userspace/qemu/qemu-kvm-x86.c
@@ -20,6 +20,8 @@
#define MSR_IA32_TSC 0x10
+#define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0]))
+
static struct kvm_msr_list *kvm_msr_list;
extern unsigned int kvm_shadow_memory;
extern kvm_context_t kvm_context;
@@ -493,6 +495,40 @@ static void do_cpuid_ent(struct kvm_cpui
}
}
+struct kvm_para_features {
+ int cap;
+ int feature;
+} para_features[] = {
+#ifdef KVM_CAP_CLOCKSOURCE
+ { KVM_CAP_CLOCKSOURCE, KVM_FEATURE_CLOCKSOURCE },
+#endif
+#ifdef KVM_CAP_NOP_IO_DELAY
+ { KVM_CAP_NOP_IO_DELAY, KVM_FEATURE_NOP_IO_DELAY },
+#endif
+#ifdef KVM_CAP_MMU_WRITE
+ { KVM_CAP_MMU_WRITE, KVM_FEATURE_MMU_WRITE },
+#endif
+#ifdef KVM_CAP_MULTICALL
+ { KVM_CAP_MULTICALL, KVM_FEATURE_MULTICALL },
+#endif
+#ifdef KVM_CAP_CR3_CACHE
+ { KVM_CAP_CR3_CACHE, KVM_FEATURE_CR3_CACHE },
+#endif
+ { -1, -1 }
+};
+
+static int get_para_features(kvm_context_t kvm_context)
+{
+ int i, features = 0;
+
+ for (i = 0; i < ARRAY_SIZE(para_features)-1; i++) {
+ if (kvm_check_extension(kvm_context, para_features[i].cap))
+ features |= (1 << para_features[i].feature);
+ }
+
+ return features;
+}
+
int kvm_arch_qemu_init_env(CPUState *cenv)
{
struct kvm_cpuid_entry cpuid_ent[100];
@@ -503,10 +539,6 @@ int kvm_arch_qemu_init_env(CPUState *cen
int cpuid_nent = 0;
CPUState copy;
uint32_t i, limit;
-int has_clocksource = 0;
-#ifdef KVM_CAP_CLOCKSOURCE
-has_clocksource = kvm_check_extension(kvm_context, KVM_CAP_CLOCKSOURCE);
-#endif
copy = *cenv;
@@ -524,7 +556,7 @@ int kvm_arch_qemu_init_env(CPUState *cen
pv_ent = &cpuid_ent[cpuid_nent++];
memset(pv_ent, 0, sizeof(*pv_ent));
pv_ent->function = KVM_CPUID_FEATURES;
-pv_ent->eax = (has_clocksource << KVM_FEATURE_CLOCKSOURCE);
+pv_ent->eax = get_para_features(kvm_context);
#endif
copy.regs[R_EAX] = 0;
-
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[kvm-devel] [patch 4/4] KVM: VMX cr3 cache support (v3)
Add support for the cr3 cache feature on Intel VMX CPU's. This avoids
vmexits on context switch if the cr3 value is cached in one of the
entries (currently 4 are present).
This is especially important for Xenner, where each guest syscall
involves a cr3 switch.
v1->v2:
- handle the race which happens when the guest has the cache cleared
in the middle of kvm_write_cr3 by injecting a GP and trapping it to
fallback to hypercall variant (suggested by Avi).
v2->v3:
- one ioctl per paravirt feature
Signed-off-by: Marcelo Tosatti <[EMAIL PROTECTED]>
Index: kvm.paravirt3/arch/x86/kernel/kvm.c
===
--- kvm.paravirt3.orig/arch/x86/kernel/kvm.c
+++ kvm.paravirt3/arch/x86/kernel/kvm.c
@@ -26,14 +26,17 @@
#include
#include
#include
+#include
+#include
#define MAX_MULTICALL_NR (PAGE_SIZE / sizeof(struct kvm_multicall_entry))
struct kvm_para_state {
+ struct kvm_cr3_cache cr3_cache;
struct kvm_multicall_entry queue[MAX_MULTICALL_NR];
int queue_index;
enum paravirt_lazy_mode mode;
-};
+} __attribute__ ((aligned(PAGE_SIZE)));
static DEFINE_PER_CPU(struct kvm_para_state, para_state);
@@ -104,6 +107,116 @@ static void kvm_io_delay(void)
{
}
+static void kvm_new_cr3(unsigned long cr3)
+{
+ kvm_hypercall1(KVM_HYPERCALL_SET_CR3, cr3);
+}
+
+static unsigned long __force_order;
+
+/*
+ * Special, register-to-cr3 instruction based hypercall API
+ * variant to the KVM host. This utilizes the cr3 filter capability
+ * of the hardware - if this works out then no VM exit happens,
+ * if a VM exit happens then KVM will get the virtual address too.
+ */
+static void kvm_write_cr3(unsigned long guest_cr3)
+{
+ struct kvm_para_state *para_state = &get_cpu_var(para_state);
+ struct kvm_cr3_cache *cache = ¶_state->cr3_cache;
+ int idx;
+
+ /*
+* Check the cache (maintained by the host) for a matching
+* guest_cr3 => host_cr3 mapping. Use it if found:
+*/
+ for (idx = 0; idx < cache->max_idx; idx++) {
+ if (cache->entry[idx].guest_cr3 == guest_cr3) {
+ unsigned long trap;
+
+ /*
+* Cache-hit: we load the cached host-CR3 value.
+* Fallback to hypercall variant if it raced with
+* the host clearing the cache after guest_cr3
+* comparison.
+*/
+ __asm__ __volatile__ (
+ "mov %2, %0\n"
+ "0: mov %3, %%cr3\n"
+ "1:\n"
+ ".section .fixup,\"ax\"\n"
+ "2: mov %1, %0\n"
+ "jmp 1b\n"
+ ".previous\n"
+ _ASM_EXTABLE(0b, 2b)
+ : "=&r" (trap)
+ : "n" (1UL), "n" (0UL),
+ "b" (cache->entry[idx].host_cr3),
+ "m" (__force_order));
+ if (!trap)
+ goto out;
+ break;
+ }
+ }
+
+ /*
+* Cache-miss. Tell the host the new cr3 via hypercall (to avoid
+* aliasing problems with a cached host_cr3 == guest_cr3).
+*/
+ kvm_new_cr3(guest_cr3);
+out:
+ put_cpu_var(para_state);
+}
+
+/*
+ * Avoid the VM exit upon cr3 load by using the cached
+ * ->active_mm->pgd value:
+ */
+static void kvm_flush_tlb_user(void)
+{
+ kvm_write_cr3(__pa(current->active_mm->pgd));
+}
+
+/*
+ * Disable global pages, do a flush, then enable global pages:
+ */
+static void kvm_flush_tlb_kernel(void)
+{
+ unsigned long orig_cr4 = read_cr4();
+
+ write_cr4(orig_cr4 & ~X86_CR4_PGE);
+ kvm_flush_tlb_user();
+ write_cr4(orig_cr4);
+}
+
+static void register_cr3_cache(void *cache)
+{
+ struct kvm_para_state *state;
+
+ state = &per_cpu(para_state, raw_smp_processor_id());
+ wrmsrl(KVM_MSR_SET_CR3_CACHE, __pa(&state->cr3_cache));
+}
+
+static unsigned __init kvm_patch(u8 type, u16 clobbers, void *ibuf,
+unsigned long addr, unsigned len)
+{
+ switch (type) {
+ case PARAVIRT_PATCH(pv_mmu_ops.write_cr3):
+ return paravirt_patch_default(type, clobbers, ibuf, addr, len);
+ default:
+ return native_patch(type, clobbers, ibuf, addr, len);
+ }
+}
+
+static void __init setup_guest_cr3_cache(void)
+{
+ on_each_cpu(register_cr3_cache, NULL, 0, 1);
+
+ pv_mmu_ops.write_cr3 = kvm_write_cr3;
+ pv_mmu_ops.flush_tlb_user = kvm_flush_tlb_user;
+ pv_mmu_ops.flush_tlb_kernel = kvm_flush_tlb_kernel;
+}
+
static void kvm_mmu_write(void *dest, const void *src, size_t size)
{
const uint8_t *
[kvm-devel] [patch 3/4] KVM: hypercall batching (v3)
Batch pte updates and tlb flushes in lazy MMU mode.
v1->v2:
- report individual hypercall error code, have multicall return number of
processed entries.
- cover entire multicall duration with slots_lock instead of
acquiring/reacquiring.
v2->v3:
- change to one ioctl per paravirt feature
Signed-off-by: Marcelo Tosatti <[EMAIL PROTECTED]>
Index: kvm.paravirt3/arch/x86/kernel/kvm.c
===
--- kvm.paravirt3.orig/arch/x86/kernel/kvm.c
+++ kvm.paravirt3/arch/x86/kernel/kvm.c
@@ -25,6 +25,77 @@
#include
#include
#include
+#include
+
+#define MAX_MULTICALL_NR (PAGE_SIZE / sizeof(struct kvm_multicall_entry))
+
+struct kvm_para_state {
+ struct kvm_multicall_entry queue[MAX_MULTICALL_NR];
+ int queue_index;
+ enum paravirt_lazy_mode mode;
+};
+
+static DEFINE_PER_CPU(struct kvm_para_state, para_state);
+
+static int can_defer_hypercall(struct kvm_para_state *state, unsigned int nr)
+{
+ if (state->mode == PARAVIRT_LAZY_MMU) {
+ switch (nr) {
+ case KVM_HYPERCALL_MMU_WRITE:
+ case KVM_HYPERCALL_FLUSH_TLB:
+ return 1;
+ }
+ }
+ return 0;
+}
+
+static void hypercall_queue_flush(struct kvm_para_state *state)
+{
+ long ret;
+
+ if (state->queue_index) {
+ ret = kvm_hypercall2(KVM_HYPERCALL_MULTICALL,
+__pa(&state->queue), state->queue_index);
+ WARN_ON (ret != state->queue_index);
+ state->queue_index = 0;
+ }
+}
+
+static void kvm_hypercall_defer(struct kvm_para_state *state,
+ unsigned int nr,
+ unsigned long a0, unsigned long a1,
+ unsigned long a2, unsigned long a3)
+{
+ struct kvm_multicall_entry *entry;
+
+ BUG_ON(preemptible());
+
+ if (state->queue_index == MAX_MULTICALL_NR)
+ hypercall_queue_flush(state);
+
+ entry = &state->queue[state->queue_index++];
+ entry->nr = nr;
+ entry->a0 = a0;
+ entry->a1 = a1;
+ entry->a2 = a2;
+ entry->a3 = a3;
+}
+
+static long kvm_hypercall(unsigned int nr, unsigned long a0,
+ unsigned long a1, unsigned long a2,
+ unsigned long a3)
+{
+ struct kvm_para_state *state = &get_cpu_var(para_state);
+ long ret = 0;
+
+ if (can_defer_hypercall(state, nr))
+ kvm_hypercall_defer(state, nr, a0, a1, a2, a3);
+ else
+ ret = kvm_hypercall4(nr, a0, a1, a2, a3);
+
+ put_cpu_var(para_state);
+ return ret;
+}
/*
* No need for any "IO delay" on KVM
@@ -44,8 +115,8 @@ static void kvm_mmu_write(void *dest, co
if (size == 2)
a1 = *(u32 *)&p[4];
#endif
- kvm_hypercall3(KVM_HYPERCALL_MMU_WRITE, (unsigned long)__pa(dest), a0,
- a1);
+ kvm_hypercall(KVM_HYPERCALL_MMU_WRITE, (unsigned long)__pa(dest), a0,
+ a1, 0);
}
/*
@@ -110,12 +181,31 @@ static void kvm_set_pud(pud_t *pudp, pud
static void kvm_flush_tlb(void)
{
- kvm_hypercall0(KVM_HYPERCALL_FLUSH_TLB);
+ kvm_hypercall(KVM_HYPERCALL_FLUSH_TLB, 0, 0, 0, 0);
}
static void kvm_release_pt(u32 pfn)
{
- kvm_hypercall1(KVM_HYPERCALL_RELEASE_PT, pfn << PAGE_SHIFT);
+ kvm_hypercall(KVM_HYPERCALL_RELEASE_PT, pfn << PAGE_SHIFT, 0, 0, 0);
+}
+
+static void kvm_enter_lazy_mmu(void)
+{
+ struct kvm_para_state *state
+ = &per_cpu(para_state, smp_processor_id());
+
+ paravirt_enter_lazy_mmu();
+ state->mode = paravirt_get_lazy_mode();
+}
+
+static void kvm_leave_lazy_mmu(void)
+{
+ struct kvm_para_state *state
+ = &per_cpu(para_state, smp_processor_id());
+
+ hypercall_queue_flush(state);
+ paravirt_leave_lazy(paravirt_get_lazy_mode());
+ state->mode = paravirt_get_lazy_mode();
}
static void paravirt_ops_setup(void)
@@ -144,6 +234,11 @@ static void paravirt_ops_setup(void)
pv_mmu_ops.release_pt = kvm_release_pt;
pv_mmu_ops.release_pd = kvm_release_pt;
}
+
+ if (kvm_para_has_feature(KVM_FEATURE_MULTICALL)) {
+ pv_mmu_ops.lazy_mode.enter = kvm_enter_lazy_mmu;
+ pv_mmu_ops.lazy_mode.leave = kvm_leave_lazy_mmu;
+ }
}
void __init kvm_guest_init(void)
Index: kvm.paravirt3/arch/x86/kvm/x86.c
===
--- kvm.paravirt3.orig/arch/x86/kvm/x86.c
+++ kvm.paravirt3/arch/x86/kvm/x86.c
@@ -73,6 +73,7 @@ struct kvm_stats_debugfs_item debugfs_en
{ "halt_exits", VCPU_STAT(halt_exits) },
{ "halt_wakeup", VCPU_STAT(halt_wakeup) },
{ "hypercalls", VCPU_STAT(hypercalls) },
+ { "multicalls", VCPU_STAT(multicalls), },
{ "request_irq", VCPU_STAT(request_irq_exits) },
{ "ir
[kvm-devel] [patch 2/4] KVM: hypercall based pte updates and TLB flushes (v3)
Hypercall based pte updates are faster than faults, and also allow use
of the lazy MMU mode to batch operations.
Don't report the feature if two dimensional paging is enabled.
v1->v2:
- guest passes physical destination addr, which is cheaper than doing v->p
translation in the host.
- infer size of pte from guest mode
v2->v3:
- switch to one ioctl per paravirt feature
- move hypercall handling to mmu.c
Signed-off-by: Marcelo Tosatti <[EMAIL PROTECTED]>
Index: kvm.paravirt3/arch/x86/kernel/kvm.c
===
--- kvm.paravirt3.orig/arch/x86/kernel/kvm.c
+++ kvm.paravirt3/arch/x86/kernel/kvm.c
@@ -33,6 +33,91 @@ static void kvm_io_delay(void)
{
}
+static void kvm_mmu_write(void *dest, const void *src, size_t size)
+{
+ const uint8_t *p = src;
+ unsigned long a0 = *(unsigned long *)p;
+ unsigned long a1 = 0;
+
+#ifdef CONFIG_X86_32
+ size >>= 2;
+ if (size == 2)
+ a1 = *(u32 *)&p[4];
+#endif
+ kvm_hypercall3(KVM_HYPERCALL_MMU_WRITE, (unsigned long)__pa(dest), a0,
+ a1);
+}
+
+/*
+ * We only need to hook operations that are MMU writes. We hook these so that
+ * we can use lazy MMU mode to batch these operations. We could probably
+ * improve the performance of the host code if we used some of the information
+ * here to simplify processing of batched writes.
+ */
+static void kvm_set_pte(pte_t *ptep, pte_t pte)
+{
+ kvm_mmu_write(ptep, &pte, sizeof(pte));
+}
+
+static void kvm_set_pte_at(struct mm_struct *mm, unsigned long addr,
+ pte_t *ptep, pte_t pte)
+{
+ kvm_mmu_write(ptep, &pte, sizeof(pte));
+}
+
+static void kvm_set_pmd(pmd_t *pmdp, pmd_t pmd)
+{
+ kvm_mmu_write(pmdp, &pmd, sizeof(pmd));
+}
+
+#if PAGETABLE_LEVELS >= 3
+#ifdef CONFIG_X86_PAE
+static void kvm_set_pte_atomic(pte_t *ptep, pte_t pte)
+{
+ kvm_mmu_write(ptep, &pte, sizeof(pte));
+}
+
+static void kvm_set_pte_present(struct mm_struct *mm, unsigned long addr,
+ pte_t *ptep, pte_t pte)
+{
+ kvm_mmu_write(ptep, &pte, sizeof(pte));
+}
+
+static void kvm_pte_clear(struct mm_struct *mm,
+ unsigned long addr, pte_t *ptep)
+{
+ pte_t pte = __pte(0);
+ kvm_mmu_write(ptep, &pte, sizeof(pte));
+}
+
+static void kvm_pmd_clear(pmd_t *pmdp)
+{
+ pmd_t pmd = __pmd(0);
+ kvm_mmu_write(pmdp, &pmd, sizeof(pmd));
+}
+#endif
+
+static void kvm_set_pgd(pgd_t *pgdp, pgd_t pgd)
+{
+ kvm_mmu_write(pgdp, &pgd, sizeof(pgd));
+}
+
+static void kvm_set_pud(pud_t *pudp, pud_t pud)
+{
+ kvm_mmu_write(pudp, &pud, sizeof(pud));
+}
+#endif /* PAGETABLE_LEVELS >= 3 */
+
+static void kvm_flush_tlb(void)
+{
+ kvm_hypercall0(KVM_HYPERCALL_FLUSH_TLB);
+}
+
+static void kvm_release_pt(u32 pfn)
+{
+ kvm_hypercall1(KVM_HYPERCALL_RELEASE_PT, pfn << PAGE_SHIFT);
+}
+
static void paravirt_ops_setup(void)
{
pv_info.name = "KVM";
@@ -41,6 +126,24 @@ static void paravirt_ops_setup(void)
if (kvm_para_has_feature(KVM_FEATURE_NOP_IO_DELAY))
pv_cpu_ops.io_delay = kvm_io_delay;
+ if (kvm_para_has_feature(KVM_FEATURE_MMU_WRITE)) {
+ pv_mmu_ops.set_pte = kvm_set_pte;
+ pv_mmu_ops.set_pte_at = kvm_set_pte_at;
+ pv_mmu_ops.set_pmd = kvm_set_pmd;
+#if PAGETABLE_LEVELS >= 3
+#ifdef CONFIG_X86_PAE
+ pv_mmu_ops.set_pte_atomic = kvm_set_pte_atomic;
+ pv_mmu_ops.set_pte_present = kvm_set_pte_present;
+ pv_mmu_ops.pte_clear = kvm_pte_clear;
+ pv_mmu_ops.pmd_clear = kvm_pmd_clear;
+#endif
+ pv_mmu_ops.set_pud = kvm_set_pud;
+ pv_mmu_ops.set_pgd = kvm_set_pgd;
+#endif
+ pv_mmu_ops.flush_tlb_user = kvm_flush_tlb;
+ pv_mmu_ops.release_pt = kvm_release_pt;
+ pv_mmu_ops.release_pd = kvm_release_pt;
+ }
}
void __init kvm_guest_init(void)
Index: kvm.paravirt3/arch/x86/kvm/mmu.c
===
--- kvm.paravirt3.orig/arch/x86/kvm/mmu.c
+++ kvm.paravirt3/arch/x86/kvm/mmu.c
@@ -39,7 +39,7 @@
* 2. while doing 1. it walks guest-physical to host-physical
* If the hardware supports that we don't need to do shadow paging.
*/
-static bool tdp_enabled = false;
+bool tdp_enabled = false;
#undef MMU_DEBUG
@@ -1826,6 +1826,46 @@ unsigned int kvm_mmu_calculate_mmu_pages
return nr_mmu_pages;
}
+
+int kvm_hypercall_mmu_write(struct kvm_vcpu *vcpu, gpa_t addr,
+ unsigned long a1, unsigned long a2)
+{
+ u64 value;
+ int bytes;
+
+ if (mmu_topup_memory_caches(vcpu))
+ return -KVM_EFAULT;
+
+ bytes = 8;
+ value = a1;
+
+ if (!is_long_mode(vcpu)) {
+ if (is_pae(vcpu))
+ value = (u64)a2 << 32 | a1;
+ else
+
[kvm-devel] [patch 1/4] KVM: add basic paravirt support (v3)
Add basic KVM paravirt support. Avoid vm-exits on IO delays.
v1->v2:
- replace KVM_CAP_CLOCKSOURCE with KVM_CAP_PARA_FEATURES
- cover FEATURE_CLOCKSOURCE
v2->v3:
- switch to one ioctl per paravirt feature
Signed-off-by: Marcelo Tosatti <[EMAIL PROTECTED]>
Index: kvm.paravirt3/arch/x86/Kconfig
===
--- kvm.paravirt3.orig/arch/x86/Kconfig
+++ kvm.paravirt3/arch/x86/Kconfig
@@ -382,6 +382,14 @@ config KVM_CLOCK
provides the guest with timing infrastructure such as time of day, and
system time
+config KVM_GUEST
+ bool "KVM Guest support"
+ select PARAVIRT
+ depends on !(X86_VISWS || X86_VOYAGER)
+ help
+This option enables various optimizations for running under the KVM
+hypervisor.
+
source "arch/x86/lguest/Kconfig"
config PARAVIRT
Index: kvm.paravirt3/arch/x86/kernel/Makefile
===
--- kvm.paravirt3.orig/arch/x86/kernel/Makefile
+++ kvm.paravirt3/arch/x86/kernel/Makefile
@@ -77,6 +77,7 @@ obj-$(CONFIG_DEBUG_RODATA_TEST) += test_
obj-$(CONFIG_DEBUG_NX_TEST)+= test_nx.o
obj-$(CONFIG_VMI) += vmi_32.o vmiclock_32.o
+obj-$(CONFIG_KVM_GUEST)+= kvm.o
obj-$(CONFIG_KVM_CLOCK)+= kvmclock.o
obj-$(CONFIG_PARAVIRT) += paravirt.o paravirt_patch_$(BITS).o
Index: kvm.paravirt3/arch/x86/kernel/kvm.c
===
--- /dev/null
+++ kvm.paravirt3/arch/x86/kernel/kvm.c
@@ -0,0 +1,52 @@
+/*
+ * KVM paravirt_ops implementation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+ *
+ * Copyright (C) 2007, Red Hat, Inc., Ingo Molnar <[EMAIL PROTECTED]>
+ * Copyright IBM Corporation, 2007
+ * Authors: Anthony Liguori <[EMAIL PROTECTED]>
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+/*
+ * No need for any "IO delay" on KVM
+ */
+static void kvm_io_delay(void)
+{
+}
+
+static void paravirt_ops_setup(void)
+{
+ pv_info.name = "KVM";
+ pv_info.paravirt_enabled = 1;
+
+ if (kvm_para_has_feature(KVM_FEATURE_NOP_IO_DELAY))
+ pv_cpu_ops.io_delay = kvm_io_delay;
+
+}
+
+void __init kvm_guest_init(void)
+{
+ if (!kvm_para_available())
+ return;
+
+ paravirt_ops_setup();
+}
Index: kvm.paravirt3/arch/x86/kernel/setup_32.c
===
--- kvm.paravirt3.orig/arch/x86/kernel/setup_32.c
+++ kvm.paravirt3/arch/x86/kernel/setup_32.c
@@ -783,6 +783,7 @@ void __init setup_arch(char **cmdline_p)
*/
vmi_init();
#endif
+ kvm_guest_init();
/*
* NOTE: before this point _nobody_ is allowed to allocate
Index: kvm.paravirt3/arch/x86/kernel/setup_64.c
===
--- kvm.paravirt3.orig/arch/x86/kernel/setup_64.c
+++ kvm.paravirt3/arch/x86/kernel/setup_64.c
@@ -452,6 +452,8 @@ void __init setup_arch(char **cmdline_p)
init_apic_mappings();
ioapic_init_mappings();
+ kvm_guest_init();
+
/*
* We trust e820 completely. No explicit ROM probing in memory.
*/
Index: kvm.paravirt3/include/linux/kvm_para.h
===
--- kvm.paravirt3.orig/include/linux/kvm_para.h
+++ kvm.paravirt3/include/linux/kvm_para.h
@@ -20,6 +20,12 @@
#include
#ifdef __KERNEL__
+#ifdef CONFIG_KVM_GUEST
+void __init kvm_guest_init(void);
+#else
+#define kvm_guest_init() do { } while (0)
+#endif
+
static inline int kvm_para_has_feature(unsigned int feature)
{
if (kvm_arch_para_features() & (1UL << feature))
Index: kvm.paravirt3/arch/x86/kvm/x86.c
===
--- kvm.paravirt3.orig/arch/x86/kvm/x86.c
+++ kvm.paravirt3/arch/x86/kvm/x86.c
@@ -797,6 +797,7 @@ int kvm_dev_ioctl_check_extension(long e
case KVM_CAP_SET_TSS_ADDR:
case KVM_CAP_EXT_CPUID:
case KVM_CAP_CLOCKSOURCE:
+ case KVM_CAP_NOP_IO_DELAY:
r = 1;
break;
case KVM_CAP_VAPIC:
Index: kvm.paravirt3/include/asm-x86/kvm_para.h
===
-
[kvm-devel] [patch 0/4] KVM paravirt MMU updates and cr3 caching (v3)
The following patchset, based on earlier work by Anthony and Ingo, adds paravirt_ops support for KVM guests enabling hypercall based pte updates, hypercall batching and cr3 caching. -- - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] The SMP RHEL 5.1 PAE guest can't boot up issue
On Fri, Feb 22, 2008 at 06:16:16PM +0200, Avi Kivity wrote: > > 2. The critical one. In normal condition, VCPU0 migrated much more > > frequently than other VCPUs. And the patch add more "delta" (always > > negative > > if host TSC is stable) to TSC_OFFSET each > > time migrated. Then after boot for a while, VCPU0 became much > > slower than others (In my test, VCPU0 was migrated about two times than the > > others, and easily to be more than 100k cycles slower). In the guest > > kernel, > > clocksource TSC is global variable, the variable "cycle_last" may got the > > VCPU1's TSC value, then turn to VCPU0. For VCPU0's TSC_OFFSET is > > smaller than VCPU1's, so it's possible to got the "cycle_last" (from VCPU1) > > bigger than current TSC value (from VCPU0) in next tick. Then "u64 offset = > > clocksource_read() - cycle_last" overflowed and caused the "infinite" loop. > > And it can also explained why Marcelo's patch don't work - it just reduce > > the > > rate of gap increasing. Another source of problems in this area is that the TSC_OFFSET is initialized to represent zero at different times for VCPU0 (at boot) and the remaining ones (at APIC_DM_INIT). > > The freezing didn't happen when using userspace IOAPIC, just because the > > qemu > > APIC didn't implement real LOWPRI(or round_robin) to choose CPU for > > delivery. > > It choose VCPU0 everytime if possible, so CPU1 in guest won't update > > cycle_last. :( > > > > This freezing only occurred on RHEL5/5.1 pae (kernel 2.6.18), because of > > they > > set IO-APIC IRQ0's dest_mask to 0x3 (with 2 vcpus) and dest_mode as > > LOWEST_PRIOITY, then other vcpus had chance to modify "cycle_last". In > > contrast, RHEL5/5.1 32e set IRQ0's dest_mode as FIXED, to CPU0, then don't > > have this problem. So does RHEL4(kernel 2.6.9). > > > > I don't know if the patch was still needed now, since it was posted long > > ago(I > > don't know which issue it solved). I'd like to post a revert patch if > > necessary. > > > > I believe the patch is still necessary, since we still need to guarantee > that a vcpu's tsc is monotonous. I think there are three issues to be > addressed: > > 1. The majority of intel machines don't need the offset adjustment since > they already have a constant rate tsc that is synchronized on all cpus. > I think this is indicated by X86_FEATURE_CONSTANT_TSC (though I'm not > 100% certain if it means that the rate is the same for all cpus, Thomas > can you clarify?) The TSC might be marked unstable for other reasons (C3 state, large machines with clustered APIC, cpufreq). > This will improve tsc quality for those machines, but we can't depend on > it, since some machines don't have constant tsc. Further, I don't think > really large machines can have constant tsc since clock distribution > becomes difficult or impossible. As discussed earlier, in case the host kernel does not have the TSC stable, it needs to enforce a state which the guest OS will not trust the TSC. The easier way to do that is to fake a C3 state. However, QEMU does not emulate IO port based wait. This appears to be the reason for the high-CPU-usage-on-idle with Windows guests, fixed by disabling C3 reporting on rombios (commit cb98751267c2d79f5674301ccac6c6b5c2e0c6b5 of kvm-userspace). > > 2. We should implement round robin and lowest priority like qemu does. > Xen does the same thing: > > > /* HACK: Route IRQ0 only to VCPU0 to prevent time jumps. */ > > #define IRQ0_SPECIAL_ROUTING 1 > in arch/x86/hvm/vioapic.c, at least for irq 0. > > 3. The extra migrations on vcpu 0 are likely due to its role servicing > I/O on behalf of the entire virtual machine. We should move this extra > work to an independent thread. I have done some work in this area. It > is becoming more important as kvm becomes more scalable. - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] The SMP RHEL 5.1 PAE guest can't boot up issue
[copying Thomas for a question about CONSTANT_TSC, below] Yang, Sheng wrote: > I believe I have found the root cause of SMP RHEL5.1 PAE guest can't boot up > issue. The problem was caused by > kvm:6685637b211ad67bdce21bfd9f91bc888b3acb4f > "KVM: VMX: Ensure vcpu time stamp counter is monotonous" (It didn't take me > much time to found the solution, but a lot of time to find the proper > explanation... :( ) > > Thanks for tackling this difficult issue. Many have tried and failed, looks like you finally nailed it :) > As we guessed, the problem was the monotonous of TSC. I have traced to > the 2.6.18 PAE guest kernel, and finally found it caused by a overflow in the > loop of function update_wall_timer()(kernel/timer.c), when using TSC as > clocksource by default. > > The reason is that the patch "KVM: VMX: Ensure vcpu time stamp counter is > monotonous" bring big gap between different VCPUs (error between > TSC_OFFSETs). Though I have proved that the patch can ensure the monotonous > on each VCPU (which rejected my first thought...), the patch > have 2 problems: > > 1. It have accumulated the error. Each vcpu's TSC is monotonous, but get > slower and slower, compared to the host. That's because the TSC is very > accuracy and the interval between reading TSC is big. But this is not very > critical. > > 2. The critical one. In normal condition, VCPU0 migrated much more > frequently than other VCPUs. And the patch add more "delta" (always negative > if host TSC is stable) to TSC_OFFSET each > time migrated. Then after boot for a while, VCPU0 became much > slower than others (In my test, VCPU0 was migrated about two times than the > others, and easily to be more than 100k cycles slower). In the guest kernel, > clocksource TSC is global variable, the variable "cycle_last" may got the > VCPU1's TSC value, then turn to VCPU0. For VCPU0's TSC_OFFSET is > smaller than VCPU1's, so it's possible to got the "cycle_last" (from VCPU1) > bigger than current TSC value (from VCPU0) in next tick. Then "u64 offset = > clocksource_read() - cycle_last" overflowed and caused the "infinite" loop. > And it can also explained why Marcelo's patch don't work - it just reduce the > rate of gap increasing. > > The freezing didn't happen when using userspace IOAPIC, just because the qemu > APIC didn't implement real LOWPRI(or round_robin) to choose CPU for delivery. > It choose VCPU0 everytime if possible, so CPU1 in guest won't update > cycle_last. :( > > This freezing only occurred on RHEL5/5.1 pae (kernel 2.6.18), because of they > set IO-APIC IRQ0's dest_mask to 0x3 (with 2 vcpus) and dest_mode as > LOWEST_PRIOITY, then other vcpus had chance to modify "cycle_last". In > contrast, RHEL5/5.1 32e set IRQ0's dest_mode as FIXED, to CPU0, then don't > have this problem. So does RHEL4(kernel 2.6.9). > > I don't know if the patch was still needed now, since it was posted long > ago(I > don't know which issue it solved). I'd like to post a revert patch if > necessary. > I believe the patch is still necessary, since we still need to guarantee that a vcpu's tsc is monotonous. I think there are three issues to be addressed: 1. The majority of intel machines don't need the offset adjustment since they already have a constant rate tsc that is synchronized on all cpus. I think this is indicated by X86_FEATURE_CONSTANT_TSC (though I'm not 100% certain if it means that the rate is the same for all cpus, Thomas can you clarify?) This will improve tsc quality for those machines, but we can't depend on it, since some machines don't have constant tsc. Further, I don't think really large machines can have constant tsc since clock distribution becomes difficult or impossible. 2. We should implement round robin and lowest priority like qemu does. Xen does the same thing: > /* HACK: Route IRQ0 only to VCPU0 to prevent time jumps. */ > #define IRQ0_SPECIAL_ROUTING 1 in arch/x86/hvm/vioapic.c, at least for irq 0. 3. The extra migrations on vcpu 0 are likely due to its role servicing I/O on behalf of the entire virtual machine. We should move this extra work to an independent thread. I have done some work in this area. It is becoming more important as kvm becomes more scalable. -- Any sufficiently difficult bug is indistinguishable from a feature. - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] Clock off in guest
Koen Vermeer vermeer.tv> writes: > > I upgraded the guest kernel to 2.6.24, and the clock now seems to be > fine (at least 'sleep 10' takes about 10 seconds on the wall clock). > Thanks for all the help! > I upgraded to kernel version 2.6.24 as well (and am using kvm version 60) and time on guests still runs slower than on the host (and real time). I estimate time on a linux client runs about 1% slower and time on a windows client about 2%. Though when load is increased on the latter, I've seen this increase to about 20%. Anyone any ideas? Or Koen, how's your client running? Greets, Steven - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] vmwarevga doesn't work: "get_dirty _pages returned -2"
hi, > This is a known issue. I've sent a patch to this list (twice, actually) > that fixes it, but for some reason, it hasn't been applied. Search for > posts from me with "vga" or something in the subject. I applied the patch from http://people.ubuntu.com/~soren/0001-Move-common-VGAState-attributes-to-VGA_STATE_COMMON.patch against kvm-61 release and I still see the messages "kvm: get_dirty_pages returned -2" scrolling by when I start the VM with -vmwarevga. booting windows xp ends up in a blue screen indicating that something isn't alright with the framebuffer. before the blue screen happens there are some lines "vmport: unknown command 1e" on the console. booting windows with -vmwarevga and -no-kvm is workish, but windows locked up litte later. bye, Andi - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] [PATCH] fix widescreen resolution issues (v2)
Arne Brutschy ulb.ac.be> writes: > > BTW, Leslie: Which patch did you use? I attached a second patch as > Andreas forgot to include the changes in hw/pc.h. > All provided along with an edit to hw/pc.h, same as your second patch. Les - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] [PATCH] fix widescreen resolution issues (v2)
hi, >> @Arne: Could you please test the patch with your setup? I hope it works >> this time... > Yesno. It does (at least kvm does not crash), but it shows the same > dialog problems as reported by Leslie: I'm quite sure that this issue isn't related to the widescreen fixes. This "visual bug" seems to be around since kvm-60 or so and has been verified by some guys (including me) also at lower resolutions like 1400x1050. See this post: http://article.gmane.org/gmane.comp.emulators.kvm.devel/13409 You could try using -no-kvm or an older kvm release for testing. cheers, Andi - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] [PATCH] fix widescreen resolution issues (v3)
hi,
I'm sorry for messing up the last patch, I shouldn't work that late...
I added the changes to pc.h (VGA_RAM_SIZE) and split up the patch in a
qemu part and a vgabios part.
cheers,
Andi
--- kvm-61.orig/qemu/hw/vga_int.h 2008-02-19 15:58:28.0 +0100
+++ kvm-61/qemu/hw/vga_int.h 2008-02-22 13:17:33.0 +0100
@@ -30,8 +30,8 @@
/* bochs VBE support */
#define CONFIG_BOCHS_VBE
-#define VBE_DISPI_MAX_XRES 1600
-#define VBE_DISPI_MAX_YRES 1200
+#define VBE_DISPI_MAX_XRES 2560
+#define VBE_DISPI_MAX_YRES 1600
#define VBE_DISPI_MAX_BPP 32
#define VBE_DISPI_INDEX_ID 0x0
--- kvm-61.orig/qemu/hw/vga.c 2008-02-19 15:58:28.0 +0100
+++ kvm-61/qemu/hw/vga.c 2008-02-22 13:18:05.0 +0100
@@ -1438,7 +1438,7 @@
long page0, page1, page_min, page_max;
vga_draw_line_func *vga_draw_line;
/* HACK ALERT */
-#define VGA_BITMAP_SIZE ((8*1024*1024) / 4096 / 8 / sizeof(long))
+#define VGA_BITMAP_SIZE (VGA_RAM_SIZE / 4096 / 8 / sizeof(long))
unsigned long bitmap[VGA_BITMAP_SIZE];
#ifndef TARGET_IA64
int r;
--- kvm-61.orig/qemu/hw/pc.h 2008-02-19 15:58:28.0 +0100
+++ kvm-61/qemu/hw/pc.h 2008-02-22 13:19:12.0 +0100
@@ -108,9 +108,9 @@
/* vga.c */
#ifndef TARGET_SPARC
-#define VGA_RAM_SIZE (8192 * 1024)
+#define VGA_RAM_SIZE (16 * 1024 * 1024)
#else
-#define VGA_RAM_SIZE (9 * 1024 * 1024)
+#define VGA_RAM_SIZE (17 * 1024 * 1024)
#endif
int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
--- kvm-61.orig/vgabios/vbetables-gen.c 2008-02-19 15:58:28.0 +0100
+++ kvm-61/vgabios/vbetables-gen.c 2008-02-22 13:17:33.0 +0100
@@ -2,7 +2,7 @@
#include
#include
-#define VBE_DISPI_TOTAL_VIDEO_MEMORY_MB 8
+#define VBE_DISPI_TOTAL_VIDEO_MEMORY_MB 16
typedef struct {
int width;
@@ -55,18 +55,27 @@
{ 1152, 864, 16 , 0x14a},
{ 1152, 864, 24 , 0x14b},
{ 1152, 864, 32 , 0x14c},
-{ 1280, 800, 24 , 0x178},
-{ 1280, 800, 32 , 0x179},
-{ 1280, 960, 24 , 0x180},
-{ 1280, 960, 32 , 0x181},
-{ 1280, 960, 24 , 0x182},
-{ 1280, 960, 32 , 0x183},
-{ 1440, 900, 24 , 0x184},
-{ 1440, 900, 32 , 0x185},
-{ 1400, 1050, 24 , 0x186},
-{ 1400, 1050, 32 , 0x187},
-{ 1680, 1050, 24 , 0x188},
-{ 1680, 1050, 32 , 0x189},
+{ 1280, 800, 16 , 0x178},
+{ 1280, 800, 24 , 0x179},
+{ 1280, 800, 32 , 0x17a},
+{ 1280, 960, 16 , 0x17b},
+{ 1280, 960, 24 , 0x17c},
+{ 1280, 960, 32 , 0x17d},
+{ 1440, 900, 16 , 0x17e},
+{ 1440, 900, 24 , 0x17f},
+{ 1440, 900, 32 , 0x180},
+{ 1400, 1050, 16 , 0x181},
+{ 1400, 1050, 24 , 0x182},
+{ 1400, 1050, 32 , 0x183},
+{ 1680, 1050, 16 , 0x184},
+{ 1680, 1050, 24 , 0x185},
+{ 1680, 1050, 32 , 0x186},
+{ 1920, 1200, 16 , 0x187},
+{ 1920, 1200, 24 , 0x188},
+{ 1920, 1200, 32 , 0x189},
+{ 2560, 1600, 16 , 0x18a},
+{ 2560, 1600, 24 , 0x18b},
+{ 2560, 1600, 32 , 0x18c},
{ 0, },
};
-
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Re: [kvm-devel] [PATCH] Move common VGAState attributes to VGA_STATE_COMMON
On Fri, Feb 22, 2008 at 11:12:42AM +0100, Soren Hansen wrote: > vmware_vga.c uses functions in vga.c to do some things. They > need to agree on which parts of their state struct is common > and which aren't, otherwise they'll overwrite parts of each > other's state. This patch makes it so. I tried this an hour or so ago (whenever you last mentioned this). Actually I used that patch from: http://people.ubuntu.com/~soren/0001-Move-common-VGAState-attributes-to-VGA_STATE_COMMON.patch This does not suffice to get X working under linux for me, though it did get a bit further in that the vga window did resize (but then nothing). - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] vmwarevga doesn't work: "get_dirty_pages returned -2"
On Fri, Feb 22, 2008 at 11:44:21AM +0200, Avi Kivity wrote: > I did provide feedback last time: > > The changes to last_ch_attr, map_addr, etc. are gratuitous and will > > cause merge conflicts in the future. Please change only the > > relevant lines. > You probably didn't see it, since you have Mail-Followup-To: set to > kvm-devel instead of yourself. I do that quite explicitly. I read the mailing list, so that should be fine. I'm sorry I somehow managed to miss your response. :( -- Soren Hansen Virtualisation specialist Ubuntu Server Team http://www.ubuntu.com/ signature.asc Description: Digital signature - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
Re: [kvm-devel] [PATCH] Move common VGAState attributes to VGA_STATE_COMMON
vmware_vga.c uses functions in vga.c to do some things. They
need to agree on which parts of their state struct is common
and which aren't, otherwise they'll overwrite parts of each
other's state. This patch makes it so.
Signed-off-by: Soren Hansen <[EMAIL PROTECTED]>
---
qemu/hw/cirrus_vga.c |3 ---
qemu/hw/vga_int.h| 13 +
2 files changed, 5 insertions(+), 11 deletions(-)
diff --git a/qemu/hw/cirrus_vga.c b/qemu/hw/cirrus_vga.c
index 43307d8..4bff503 100644
--- a/qemu/hw/cirrus_vga.c
+++ b/qemu/hw/cirrus_vga.c
@@ -240,9 +240,6 @@ typedef struct CirrusVGAState {
int cirrus_mmio_io_addr;
unsigned long cirrus_lfb_addr;
unsigned long cirrus_lfb_end;
-int aliases_enabled;
-uint32_t aliased_bank_base[2];
-uint32_t aliased_bank_limit[2];
uint32_t cirrus_addr_mask;
uint32_t linear_mmio_mask;
uint8_t cirrus_shadow_gr0;
diff --git a/qemu/hw/vga_int.h b/qemu/hw/vga_int.h
index 912d977..c5a3992 100644
--- a/qemu/hw/vga_int.h
+++ b/qemu/hw/vga_int.h
@@ -147,18 +147,15 @@
uint32_t last_palette[256]; \
uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */\
unsigned long map_addr;\
-unsigned long map_end;
+unsigned long map_end; \
+int32_t aliases_enabled; \
+int32_t pad1; \
+uint32_t aliased_bank_base[2]; \
+uint32_t aliased_bank_limit[2];
typedef struct VGAState {
VGA_STATE_COMMON
-
-int32_t aliases_enabled;
-int32_t pad1;
-uint32_t aliased_bank_base[2];
-uint32_t aliased_bank_limit[2];
-
-
} VGAState;
static inline int c6_to_8(int v)
--
1.5.3.8
--
Soren Hansen
Virtualisation specialist
Ubuntu Server Team
http://www.ubuntu.com/
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Re: [kvm-devel] vmwarevga doesn't work: "get_dirty_pages returned -2"
Soren Hansen wrote: > On Thu, Feb 21, 2008 at 02:23:07PM +0100, Andreas Winkelbauer wrote: > >>> Most likely it only works with Linux; it was probably written by >>> reverse-engineering the Linux driver. >>> >> actually -vmwarevga works for me when using pure qemu (latest cvs >> snapshot) without kqemu (-no-kqemu), but it does not work with kvm >> when using -no-kvm. >> > > This is a known issue. I've sent a patch to this list (twice, actually) > that fixes it, but for some reason, it hasn't been applied. Search for > posts from me with "vga" or something in the subject. > > I did provide feedback last time: > The changes to last_ch_attr, map_addr, etc. are gratuitous and will > cause merge conflicts in the future. Please change only the relevant lines. > You probably didn't see it, since you have Mail-Followup-To: set to kvm-devel instead of yourself. Adding you explicitly this time. -- Do not meddle in the internals of kernels, for they are subtle and quick to panic. - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] KVM Test result, kernel d664df6.., userspace 70d2a9d..
Hi,All This is today's KVM test result against kvm.git d664df6bbf0b6212824340bc70a9b888461dcd36 and kvm-userspace.git 70d2a9dc3594446f3ad66b32abc94c08b74118d. There's no new issue. Five old issues: 1. Fails to save/restore guests https://sourceforge.net/tracker/index.php?func=detail&aid=1824525&group_ id=180599&atid=893831 2. smp windows installer crashes while rebooting https://sourceforge.net/tracker/index.php?func=detail&aid=1877875&group_ id=180599&atid=893831 3. Timer of guest is inaccurate https://sourceforge.net/tracker/?func=detail&atid=893831&aid=1826080&gro up_id=180599 4. Installer of 64bit vista guest will pause for ten minutes after reboot https://sourceforge.net/tracker/?func=detail&atid=893831&aid=1836905&gro up_id=180599 5. Cannot boot 32bit smp RHEL5.1 guest with nic on 64bit host https://sourceforge.net/tracker/?func=detail&atid=893831&aid=1812043&gro up_id=180599 Test environment PlatformWoodcrest CPU 4 Memory size 8G' Details IA32-pae: 1. boot guest with 256M memory PASS 2. boot two windows xp guest PASS 3. boot 4 same guest in parallelPASS 4. boot linux and windows guest in parallel PASS 5. boot guest with 1500M memory PASS 6. boot windows 2003 with ACPI enabled PASS 7. boot Windows xp with ACPI enabled PASS 8. boot Windows 2000 without ACPI PASS 9. kernel build on SMP linux guestPASS 10. LTP on SMP linux guest PASS 11. boot base kernel linux PASS 12. save/restore 32-bit HVM guests PASS 13. live migration 32-bit HVM guests PASS 14. boot SMP Windows xp with ACPI enabledPASS 15. boot SMP Windows 2003 with ACPI enabled PASS 16. boot SMP Windows 2000 with ACPI enabled PASS IA32e: 1. boot four 32-bit guest in parallel PASS 2. boot four 64-bit guest in parallel PASS 3. boot 4G 64-bit guest PASS 4. boot 4G pae guest PASS 5. boot 32-bit linux and 32 bit windows guest in parallelPASS 6. boot 32-bit guest with 1500M memory PASS 7. boot 64-bit guest with 1500M memory PASS 8. boot 32-bit guest with 256M memory PASS 9. boot 64-bit guest with 256M memory PASS 10. boot two 32-bit windows xp in parallel PASS 11. boot four 32-bit different guest in para PASS 12. save/restore 64-bit linux guests PASS 13. save/restore 32-bit linux guests PASS 14. boot 32-bit SMP windows 2003 with ACPI enabled PASS 15. boot 32-bit SMP Windows 2000 with ACPI enabledPASS 16. boot 32-bit SMP Windows xp with ACPI enabledPASS 17. boot 32-bit Windows 2000 without ACPIPASS 18. boot 64-bit Windows xp with ACPI enabledPASS 19. boot 32-bit Windows xp without ACPIPASS 20. boot 64-bit vista PASS 21. kernel build in 32-bit linux guest OS PASS 22. kernel build in 64-bit linux guest OS PASS 23. LTP on SMP 32-bit linux guest OSPASS 24. LTP on SMP 64-bit linux guest OSPASS 25. boot 64-bit guests with ACPI enabled PASS 26. boot 32-bit x-server PASS 27. boot 64-bit SMP windows XP with ACPI enabled PASS 28. boot 64-bit SMP windows 2003 with ACPI enabled PASS 29. live migration 64bit linux guests PASS 30. live migration 32bit linux guests PASS Report Summary on IA32-pae Summary Test Report of Last Session = Total PassFailNoResult Crash = control_panel 6 5 1 00 Restart 2 2 0 00 gtest 14 13 1 00 = control_panel 6 5 1 00 :KVM_LM_PAE_gPAE 1 0 1 00 :KVM_four_sguest_PAE_gPA 1 1 0 00 :KVM_256M_guest_PAE_gPAE 1 1 0 00 :KVM_linux_win_PAE_gPAE1 1 0 00 :KVM_1500M_guest_PAE_gPA 1 1 0 00 :KVM_two_winxp_PAE_gPAE1 1 0 00 Restart 2 2 0 00 :GuestPAE_PAE_g64 1 1 0
Re: [kvm-devel] [PATCH] fix widescreen resolution issues (v2)
Hi all,
On Fr, 2008-02-22 at 03:11 +0100, Andreas Winkelbauer wrote:
> I found out what crashed kvm when I increased VGA_RAM_SIZE in pc.h. The
> crash was caused by a really _dirty_ hack in a kvm specific part of
> vga.c (it took me at least an hour to find this amazing piece of code...
> at least the "HACK ALERT" was a good hint ;-) ).
Ow, that really does qualify as a dirty hack. :) Thanks for finding
that! I currently don't have the time to skim through pages of code, so
sorry for my non-involvement on this issue...
> @Arne: Could you please test the patch with your setup? I hope it works
> this time...
Yesno. It does (at least kvm does not crash), but it shows the same
dialog problems as reported by Leslie:
> I've attached the patch. It works for me (tested with windows xp as
> guest os @ 1680x1050). As always, please test the patch. I'd highly
> appreciate it if somebody could test it with linux as guest os.
BTW, Leslie: Which patch did you use? I attached a second patch as
Andreas forgot to include the changes in hw/pc.h.
Cheers & Good morning to the europeans ;)
Arne
diff -Naur kvm-61.orig/qemu/hw/pc.h kvm-61/qemu/hw/pc.h
--- kvm-61.orig/qemu/hw/pc.h 2008-02-19 15:58:28.0 +0100
+++ kvm-61/qemu/hw/pc.h 2008-02-21 11:52:36.0 +0100
@@ -108,9 +108,9 @@
/* vga.c */
#ifndef TARGET_SPARC
-#define VGA_RAM_SIZE (8192 * 1024)
+#define VGA_RAM_SIZE (16 * 1024 * 1024)
#else
-#define VGA_RAM_SIZE (9 * 1024 * 1024)
+#define VGA_RAM_SIZE (17 * 1024 * 1024)
#endif
int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
diff -Naur kvm-61.orig/qemu/hw/vga.c kvm-61/qemu/hw/vga.c
--- kvm-61.orig/qemu/hw/vga.c 2008-02-19 15:58:28.0 +0100
+++ kvm-61/qemu/hw/vga.c 2008-02-22 10:07:14.0 +0100
@@ -1438,7 +1438,7 @@
long page0, page1, page_min, page_max;
vga_draw_line_func *vga_draw_line;
/* HACK ALERT */
-#define VGA_BITMAP_SIZE ((8*1024*1024) / 4096 / 8 / sizeof(long))
+#define VGA_BITMAP_SIZE ((VGA_RAM_SIZE) / 4096 / 8 / sizeof(long))
unsigned long bitmap[VGA_BITMAP_SIZE];
#ifndef TARGET_IA64
int r;
diff -Naur kvm-61.orig/qemu/hw/vga_int.h kvm-61/qemu/hw/vga_int.h
--- kvm-61.orig/qemu/hw/vga_int.h 2008-02-19 15:58:28.0 +0100
+++ kvm-61/qemu/hw/vga_int.h 2008-02-21 10:54:48.0 +0100
@@ -30,8 +30,8 @@
/* bochs VBE support */
#define CONFIG_BOCHS_VBE
-#define VBE_DISPI_MAX_XRES 1600
-#define VBE_DISPI_MAX_YRES 1200
+#define VBE_DISPI_MAX_XRES 2560
+#define VBE_DISPI_MAX_YRES 1600
#define VBE_DISPI_MAX_BPP 32
#define VBE_DISPI_INDEX_ID 0x0
diff -Naur kvm-61.orig/vgabios/vbetables-gen.c kvm-61/vgabios/vbetables-gen.c
--- kvm-61.orig/vgabios/vbetables-gen.c 2008-02-19 15:58:28.0 +0100
+++ kvm-61/vgabios/vbetables-gen.c 2008-02-21 10:54:48.0 +0100
@@ -2,7 +2,7 @@
#include
#include
-#define VBE_DISPI_TOTAL_VIDEO_MEMORY_MB 8
+#define VBE_DISPI_TOTAL_VIDEO_MEMORY_MB 16
typedef struct {
int width;
@@ -13,60 +13,69 @@
ModeInfo modes[] = {
/* standard VESA modes */
-{ 640, 400, 8 , 0x100},
-{ 640, 480, 8 , 0x101},
-{ 800, 600, 4 , 0x102},
-{ 800, 600, 8 , 0x103},
-{ 1024, 768, 4 , 0x104},
-{ 1024, 768, 8 , 0x105},
-{ 1280, 1024, 4, 0x106},
-{ 1280, 1024, 8, 0x107},
+{ 640, 400, 8, 0x100},
+{ 640, 480, 8, 0x101},
+{ 800, 600, 4, 0x102},
+{ 800, 600, 8, 0x103},
+{ 1024, 768, 4 , 0x104},
+{ 1024, 768, 8 , 0x105},
+{ 1280, 1024, 4 , 0x106},
+{ 1280, 1024, 8 , 0x107},
{ 320, 200, 15 , 0x10D},
-{ 320, 200, 16, 0x10E},
-{ 320, 200, 24, 0x10F},
+{ 320, 200, 16 , 0x10E},
+{ 320, 200, 24 , 0x10F},
{ 640, 480, 15 , 0x110},
-{ 640, 480, 16, 0x111},
-{ 640, 480, 24, 0x112},
+{ 640, 480, 16 , 0x111},
+{ 640, 480, 24 , 0x112},
{ 800, 600, 15 , 0x113},
-{ 800, 600, 16, 0x114},
-{ 800, 600, 24, 0x115},
+{ 800, 600, 16 , 0x114},
+{ 800, 600, 24 , 0x115},
{ 1024, 768, 15 , 0x116},
-{ 1024, 768, 16 , 0x117},
-{ 1024, 768, 24 , 0x118},
+{ 1024, 768, 16 , 0x117},
+{ 1024, 768, 24 , 0x118},
{ 1280, 1024, 15 , 0x119},
-{ 1280, 1024, 16 , 0x11A},
-{ 1280, 1024, 24 ,
Re: [kvm-devel] vmwarevga doesn't work: "get_dirty_pages returned -2"
On Thu, Feb 21, 2008 at 02:23:07PM +0100, Andreas Winkelbauer wrote: >> Most likely it only works with Linux; it was probably written by >> reverse-engineering the Linux driver. > actually -vmwarevga works for me when using pure qemu (latest cvs > snapshot) without kqemu (-no-kqemu), but it does not work with kvm > when using -no-kvm. This is a known issue. I've sent a patch to this list (twice, actually) that fixes it, but for some reason, it hasn't been applied. Search for posts from me with "vga" or something in the subject. -- Soren Hansen Virtualisation specialist Ubuntu Server Team http://www.ubuntu.com/ signature.asc Description: Digital signature - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
[kvm-devel] The SMP RHEL 5.1 PAE guest can't boot up issue
I believe I have found the root cause of SMP RHEL5.1 PAE guest can't boot up issue. The problem was caused by kvm:6685637b211ad67bdce21bfd9f91bc888b3acb4f "KVM: VMX: Ensure vcpu time stamp counter is monotonous" (It didn't take me much time to found the solution, but a lot of time to find the proper explanation... :( ) As we guessed, the problem was the monotonous of TSC. I have traced to the 2.6.18 PAE guest kernel, and finally found it caused by a overflow in the loop of function update_wall_timer()(kernel/timer.c), when using TSC as clocksource by default. The reason is that the patch "KVM: VMX: Ensure vcpu time stamp counter is monotonous" bring big gap between different VCPUs (error between TSC_OFFSETs). Though I have proved that the patch can ensure the monotonous on each VCPU (which rejected my first thought...), the patch have 2 problems: 1. It have accumulated the error. Each vcpu's TSC is monotonous, but get slower and slower, compared to the host. That's because the TSC is very accuracy and the interval between reading TSC is big. But this is not very critical. 2. The critical one. In normal condition, VCPU0 migrated much more frequently than other VCPUs. And the patch add more "delta" (always negative if host TSC is stable) to TSC_OFFSET each time migrated. Then after boot for a while, VCPU0 became much slower than others (In my test, VCPU0 was migrated about two times than the others, and easily to be more than 100k cycles slower). In the guest kernel, clocksource TSC is global variable, the variable "cycle_last" may got the VCPU1's TSC value, then turn to VCPU0. For VCPU0's TSC_OFFSET is smaller than VCPU1's, so it's possible to got the "cycle_last" (from VCPU1) bigger than current TSC value (from VCPU0) in next tick. Then "u64 offset = clocksource_read() - cycle_last" overflowed and caused the "infinite" loop. And it can also explained why Marcelo's patch don't work - it just reduce the rate of gap increasing. The freezing didn't happen when using userspace IOAPIC, just because the qemu APIC didn't implement real LOWPRI(or round_robin) to choose CPU for delivery. It choose VCPU0 everytime if possible, so CPU1 in guest won't update cycle_last. :( This freezing only occurred on RHEL5/5.1 pae (kernel 2.6.18), because of they set IO-APIC IRQ0's dest_mask to 0x3 (with 2 vcpus) and dest_mode as LOWEST_PRIOITY, then other vcpus had chance to modify "cycle_last". In contrast, RHEL5/5.1 32e set IRQ0's dest_mode as FIXED, to CPU0, then don't have this problem. So does RHEL4(kernel 2.6.9). I don't know if the patch was still needed now, since it was posted long ago(I don't know which issue it solved). I'd like to post a revert patch if necessary. -- Thanks Yang, Sheng - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
