Re: [PATCH] KVM: PPC: Don't sync timebase when inside KVM
On 02/28/2012 08:16 PM, Alexander Graf wrote: When we know that we're running inside of a KVM guest, we don't have to worry about synchronizing timebases between different CPUs, since the host already took care of that. This fixes CPU overcommit scenarios where vCPUs could hang forever trying to sync each other while not being scheduled. Reported-by: Stuart Yoder b08...@freescale.com Signed-off-by: Alexander Graf ag...@suse.de This should apply to any hypervisor, not just KVM. On book3e, Power ISA says timebase is read-only on virtualized implementations. My understanding is that book3s is paravirt-only (guest state is not considered an implementation of the Power ISA), and it says Writing the Time Base is privileged, and can be done only in hypervisor state. Which platforms are you seeing this on? If it's on Freescale chips, U-Boot should be doing the sync and Linux should never do it, even in the absence of a hypervisor. -Scott -- To unsubscribe from this list: send the line unsubscribe kvm-ppc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] KVM: PPC: Don't sync timebase when inside KVM
On 29.02.2012, at 18:50, Scott Wood scottw...@freescale.com wrote: On 02/28/2012 08:16 PM, Alexander Graf wrote: When we know that we're running inside of a KVM guest, we don't have to worry about synchronizing timebases between different CPUs, since the host already took care of that. This fixes CPU overcommit scenarios where vCPUs could hang forever trying to sync each other while not being scheduled. Reported-by: Stuart Yoder b08...@freescale.com Signed-off-by: Alexander Graf ag...@suse.de This should apply to any hypervisor, not just KVM. Sure, but do you have a generic function to evaluate that? :) On book3e, Power ISA says timebase is read-only on virtualized implementations. My understanding is that book3s is paravirt-only (guest state is not considered an implementation of the Power ISA), and it says Writing the Time Base is privileged, and can be done only in hypervisor state. For PR non-PAPR KVM, we are non-paravirt, but ignore tb writes iirc. Which platforms are you seeing this on? If it's on Freescale chips, U-Boot should be doing the sync and Linux should never do it, even in the absence of a hypervisor. This is on e500mc. Alex -Scott -- To unsubscribe from this list: send the line unsubscribe kvm-ppc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe kvm-ppc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] KVM: PPC: Don't sync timebase when inside KVM
On 02/29/2012 12:28 PM, Alexander Graf wrote: On 29.02.2012, at 18:50, Scott Wood scottw...@freescale.com wrote: On 02/28/2012 08:16 PM, Alexander Graf wrote: When we know that we're running inside of a KVM guest, we don't have to worry about synchronizing timebases between different CPUs, since the host already took care of that. This fixes CPU overcommit scenarios where vCPUs could hang forever trying to sync each other while not being scheduled. Reported-by: Stuart Yoder b08...@freescale.com Signed-off-by: Alexander Graf ag...@suse.de This should apply to any hypervisor, not just KVM. Sure, but do you have a generic function to evaluate that? :) The presence of a hypervisor node without testing compatible. Might not get them all, but at least it will cover more than just KVM. Which platforms are you seeing this on? If it's on Freescale chips, U-Boot should be doing the sync and Linux should never do it, even in the absence of a hypervisor. This is on e500mc. On e500mc Linux should never by trying to sync the timebase. If it is, let's fix that. -Scott -- To unsubscribe from this list: send the line unsubscribe kvm-ppc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/2] powerpc/e500: make load_up_spe a normal fuction
From: Liu Yu yu@freescale.com So that we can call it when improving SPE switch like book3e did for fp switch. Signed-off-by: Liu Yu yu@freescale.com Signed-off-by: Olivia Yin hong-hua@freescale.com --- v2: add Signed-off-by arch/powerpc/kernel/head_fsl_booke.S | 23 ++- 1 files changed, 6 insertions(+), 17 deletions(-) diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index d5d78c4..c96e025 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S @@ -539,8 +539,10 @@ interrupt_base: /* SPE Unavailable */ START_EXCEPTION(SPEUnavailable) NORMAL_EXCEPTION_PROLOG - bne load_up_spe - addir3,r1,STACK_FRAME_OVERHEAD + beq 1f + bl load_up_spe + b fast_exception_return +1: addir3,r1,STACK_FRAME_OVERHEAD EXC_XFER_EE_LITE(0x2010, KernelSPE) #else EXCEPTION(0x2020, SPEUnavailable, unknown_exception, EXC_XFER_EE) @@ -743,7 +745,7 @@ tlb_write_entry: /* Note that the SPE support is closely modeled after the AltiVec * support. Changes to one are likely to be applicable to the * other! */ -load_up_spe: +_GLOBAL(load_up_spe) /* * Disable SPE for the task which had SPE previously, * and save its SPE registers in its thread_struct. @@ -791,20 +793,7 @@ load_up_spe: subir4,r5,THREAD stw r4,last_task_used_spe@l(r3) #endif /* !CONFIG_SMP */ - /* restore registers and return */ -2: REST_4GPRS(3, r11) - lwz r10,_CCR(r11) - REST_GPR(1, r11) - mtcrr10 - lwz r10,_LINK(r11) - mtlrr10 - REST_GPR(10, r11) - mtspr SPRN_SRR1,r9 - mtspr SPRN_SRR0,r12 - REST_GPR(9, r11) - REST_GPR(12, r11) - lwz r11,GPR11(r11) - rfi + blr /* * SPE unavailable trap from kernel - print a message, but let -- 1.6.4 -- To unsubscribe from this list: send the line unsubscribe kvm-ppc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 2/2] KVM: booke: Improve SPE switch
From: Liu Yu yu@freescale.com
Like book3s did for fp switch,
instead of switch SPE between host and guest,
the patch switch SPE state between qemu and guest.
In this way, we can simulate a host loadup SPE when load guest SPE state,
and let host to decide when to giveup SPE state.
Therefor it cooperates better with host SPE usage,
and so that has some performance benifit in UP host(lazy SPE).
Moreover, since the patch save guest SPE state into linux thread field,
it creates the condition to emulate guest SPE instructions in host,
so that we can avoid injecting SPE exception to guest.
The patch also turns all asm code into C code,
and add SPE stat counts.
Signed-off-by: Liu Yu yu@freescale.com
Signed-off-by: Olivia Yin hong-hua@freescale.com
---
v2:
Keep shadow MSR[SPE] consistent with
thread MSR[SPE] in kvmppc_core_vcpu_load
arch/powerpc/include/asm/kvm_host.h | 11 +-
arch/powerpc/kernel/asm-offsets.c |7
arch/powerpc/kvm/booke.c| 63 +++
arch/powerpc/kvm/booke.h|8 +
arch/powerpc/kvm/booke_interrupts.S | 37
arch/powerpc/kvm/e500.c | 13 ---
arch/powerpc/kvm/timing.c |5 +++
arch/powerpc/kvm/timing.h | 11 ++
8 files changed, 91 insertions(+), 64 deletions(-)
diff --git a/arch/powerpc/include/asm/kvm_host.h
b/arch/powerpc/include/asm/kvm_host.h
index 1843d5d..6186d08 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -117,6 +117,11 @@ struct kvm_vcpu_stat {
u32 st;
u32 st_slow;
#endif
+#ifdef CONFIG_SPE
+ u32 spe_unavail;
+ u32 spe_fp_data;
+ u32 spe_fp_round;
+#endif
};
enum kvm_exit_types {
@@ -147,6 +152,11 @@ enum kvm_exit_types {
FP_UNAVAIL,
DEBUG_EXITS,
TIMEINGUEST,
+#ifdef CONFIG_SPE
+ SPE_UNAVAIL,
+ SPE_FP_DATA,
+ SPE_FP_ROUND,
+#endif
__NUMBER_OF_KVM_EXIT_TYPES
};
@@ -330,7 +340,6 @@ struct kvm_vcpu_arch {
#ifdef CONFIG_SPE
ulong evr[32];
ulong spefscr;
- ulong host_spefscr;
u64 acc;
#endif
#ifdef CONFIG_ALTIVEC
diff --git a/arch/powerpc/kernel/asm-offsets.c
b/arch/powerpc/kernel/asm-offsets.c
index 8e0db0b..ff68f71 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -604,13 +604,6 @@ int main(void)
DEFINE(TLBCAM_MAS7, offsetof(struct tlbcam, MAS7));
#endif
-#if defined(CONFIG_KVM) defined(CONFIG_SPE)
- DEFINE(VCPU_EVR, offsetof(struct kvm_vcpu, arch.evr[0]));
- DEFINE(VCPU_ACC, offsetof(struct kvm_vcpu, arch.acc));
- DEFINE(VCPU_SPEFSCR, offsetof(struct kvm_vcpu, arch.spefscr));
- DEFINE(VCPU_HOST_SPEFSCR, offsetof(struct kvm_vcpu, arch.host_spefscr));
-#endif
-
#ifdef CONFIG_KVM_EXIT_TIMING
DEFINE(VCPU_TIMING_EXIT_TBU, offsetof(struct kvm_vcpu,
arch.timing_exit.tv32.tbu));
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index ee9e1ee..f20010b 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -55,6 +55,11 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
{ dec,VCPU_STAT(dec_exits) },
{ ext_intr, VCPU_STAT(ext_intr_exits) },
{ halt_wakeup, VCPU_STAT(halt_wakeup) },
+#ifdef CONFIG_SPE
+ { spe_unavail, VCPU_STAT(spe_unavail) },
+ { spe_fp_data, VCPU_STAT(spe_fp_data) },
+ { spe_fp_round, VCPU_STAT(spe_fp_round) },
+#endif
{ NULL }
};
@@ -80,11 +85,11 @@ void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
}
#ifdef CONFIG_SPE
-void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
+static void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
{
preempt_disable();
- enable_kernel_spe();
- kvmppc_save_guest_spe(vcpu);
+ if (current-thread.regs-msr MSR_SPE)
+ giveup_spe(current);
vcpu-arch.shadow_msr = ~MSR_SPE;
preempt_enable();
}
@@ -92,8 +97,10 @@ void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
{
preempt_disable();
- enable_kernel_spe();
- kvmppc_load_guest_spe(vcpu);
+ if (!(current-thread.regs-msr MSR_SPE)) {
+ load_up_spe(NULL);
+ current-thread.regs-msr |= MSR_SPE;
+ }
vcpu-arch.shadow_msr |= MSR_SPE;
preempt_enable();
}
@@ -104,7 +111,7 @@ static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
if (!(vcpu-arch.shadow_msr MSR_SPE))
kvmppc_vcpu_enable_spe(vcpu);
} else if (vcpu-arch.shadow_msr MSR_SPE) {
- kvmppc_vcpu_disable_spe(vcpu);
+ vcpu-arch.shadow_msr = ~MSR_SPE;
}
}
#else
@@ -124,7 +131,8 @@ void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
vcpu-arch.shared-msr = new_msr;
kvmppc_mmu_msr_notify(vcpu, old_msr);
-
