Re: [RFC PATCH 03/17] KVM: PPC64: booke: Add EPCR support in sregs
On 06/25/2012 04:24 PM, Caraman Mihai Claudiu-B02008 wrote: >> -Original Message- >> From: Avi Kivity [mailto:a...@redhat.com] >> Sent: Monday, June 25, 2012 4:00 PM >> To: Caraman Mihai Claudiu-B02008 >> Cc: kvm-ppc@vger.kernel.org; k...@vger.kernel.org; linuxppc- >> d...@lists.ozlabs.org; qemu-...@nongnu.org >> Subject: Re: [RFC PATCH 03/17] KVM: PPC64: booke: Add EPCR support in >> sregs >> >> On 06/25/2012 03:26 PM, Mihai Caraman wrote: >> > Add KVM_SREGS_E_64 feature and EPCR spr support in get/set sregs for >> > 64-bit hosts. >> > >> > Signed-off-by: Mihai Caraman >> > --- >> > arch/powerpc/kvm/booke.c | 14 ++ >> > 1 files changed, 14 insertions(+), 0 deletions(-) >> > >> > diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c index >> > f9fa260..d15c4b5 100644 >> > --- a/arch/powerpc/kvm/booke.c >> > +++ b/arch/powerpc/kvm/booke.c >> > @@ -1052,6 +1052,9 @@ static void get_sregs_base(struct kvm_vcpu *vcpu, >> >u64 tb = get_tb(); >> > >> >sregs->u.e.features |= KVM_SREGS_E_BASE; >> > +#ifdef CONFIG_64BIT >> > + sregs->u.e.features |= KVM_SREGS_E_64; #endif >> > >> >> This is an ABI, but I see no trace of it in Documentation. > > The ppc sregs documentation in api.txt redirects to > arch/powerpc/include/asm/kvm.h. > Isn't this enough? I guess it's okay. -- error compiling committee.c: too many arguments to function -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [RFC PATCH 03/17] KVM: PPC64: booke: Add EPCR support in sregs
> -Original Message- > From: Avi Kivity [mailto:a...@redhat.com] > Sent: Monday, June 25, 2012 4:00 PM > To: Caraman Mihai Claudiu-B02008 > Cc: kvm-ppc@vger.kernel.org; k...@vger.kernel.org; linuxppc- > d...@lists.ozlabs.org; qemu-...@nongnu.org > Subject: Re: [RFC PATCH 03/17] KVM: PPC64: booke: Add EPCR support in > sregs > > On 06/25/2012 03:26 PM, Mihai Caraman wrote: > > Add KVM_SREGS_E_64 feature and EPCR spr support in get/set sregs for > > 64-bit hosts. > > > > Signed-off-by: Mihai Caraman > > --- > > arch/powerpc/kvm/booke.c | 14 ++ > > 1 files changed, 14 insertions(+), 0 deletions(-) > > > > diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c index > > f9fa260..d15c4b5 100644 > > --- a/arch/powerpc/kvm/booke.c > > +++ b/arch/powerpc/kvm/booke.c > > @@ -1052,6 +1052,9 @@ static void get_sregs_base(struct kvm_vcpu *vcpu, > > u64 tb = get_tb(); > > > > sregs->u.e.features |= KVM_SREGS_E_BASE; > > +#ifdef CONFIG_64BIT > > + sregs->u.e.features |= KVM_SREGS_E_64; #endif > > > > This is an ABI, but I see no trace of it in Documentation. The ppc sregs documentation in api.txt redirects to arch/powerpc/include/asm/kvm.h. Isn't this enough? Mike -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 03/17] KVM: PPC64: booke: Add EPCR support in sregs
On 06/25/2012 03:26 PM, Mihai Caraman wrote: > Add KVM_SREGS_E_64 feature and EPCR spr support in get/set sregs > for 64-bit hosts. > > Signed-off-by: Mihai Caraman > --- > arch/powerpc/kvm/booke.c | 14 ++ > 1 files changed, 14 insertions(+), 0 deletions(-) > > diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c > index f9fa260..d15c4b5 100644 > --- a/arch/powerpc/kvm/booke.c > +++ b/arch/powerpc/kvm/booke.c > @@ -1052,6 +1052,9 @@ static void get_sregs_base(struct kvm_vcpu *vcpu, > u64 tb = get_tb(); > > sregs->u.e.features |= KVM_SREGS_E_BASE; > +#ifdef CONFIG_64BIT > + sregs->u.e.features |= KVM_SREGS_E_64; > +#endif > This is an ABI, but I see no trace of it in Documentation. -- error compiling committee.c: too many arguments to function -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH 16/17] KVM: PPC: e500: Silence bogus GCC warning in tlb code
64-bit GCC 4.5.1 warns about an uninitialized variable which was guarded
by a flag. Initialize the variable to make it happy.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500_tlb.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/e500_tlb.c b/arch/powerpc/kvm/e500_tlb.c
index 3ed4e7d..6286fbd 100644
--- a/arch/powerpc/kvm/e500_tlb.c
+++ b/arch/powerpc/kvm/e500_tlb.c
@@ -412,7 +412,8 @@ static inline void kvmppc_e500_shadow_map(struct
kvmppc_vcpu_e500 *vcpu_e500,
struct tlbe_ref *ref)
{
struct kvm_memory_slot *slot;
- unsigned long pfn, hva;
+ unsigned long pfn = 0; /* shut up 64-bit GCC */
+ unsigned long hva;
int pfnmap = 0;
int tsize = BOOK3E_PAGESZ_4K;
--
1.7.4.1
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[RFC PATCH 08/17] KVM: PPC: e500mc: Fix tlbilx emulation for 64-bit guests
tlbilxva emulation was using an u32 variable for guest effective address.
Replace it with gva_t type to handle 64-bit guests.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500mc.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c
index db97ee3..1f89d26 100644
--- a/arch/powerpc/kvm/e500mc.c
+++ b/arch/powerpc/kvm/e500mc.c
@@ -57,7 +57,8 @@ void kvmppc_e500_tlbil_one(struct kvmppc_vcpu_e500 *vcpu_e500,
struct kvm_book3e_206_tlb_entry *gtlbe)
{
unsigned int tid, ts;
- u32 val, eaddr, lpid;
+ gva_t eaddr;
+ u32 val, lpid;
unsigned long flags;
ts = get_tlb_ts(gtlbe);
--
1.7.4.1
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[RFC PATCH 05/17] KVM: PPC: booke: Extend MAS2 EPN mask for 64-bit
Extend MAS2 EPN mask for 64-bit hosts, to retain most significant bits.
Change get tlb eaddr to use this mask.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/mmu-book3e.h |2 +-
arch/powerpc/kvm/e500.h |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/mmu-book3e.h
b/arch/powerpc/include/asm/mmu-book3e.h
index eeabcdb..99d43e0 100644
--- a/arch/powerpc/include/asm/mmu-book3e.h
+++ b/arch/powerpc/include/asm/mmu-book3e.h
@@ -59,7 +59,7 @@
#define MAS1_TSIZE_SHIFT 7
#define MAS1_TSIZE(x) (((x) << MAS1_TSIZE_SHIFT) & MAS1_TSIZE_MASK)
-#define MAS2_EPN 0xF000
+#define MAS2_EPN (~0xFFFUL)
#define MAS2_X00x0040
#define MAS2_X10x0020
#define MAS2_W 0x0010
diff --git a/arch/powerpc/kvm/e500.h b/arch/powerpc/kvm/e500.h
index aa8b814..3e31098 100644
--- a/arch/powerpc/kvm/e500.h
+++ b/arch/powerpc/kvm/e500.h
@@ -155,7 +155,7 @@ get_tlb_size(const struct kvm_book3e_206_tlb_entry *tlbe)
static inline gva_t get_tlb_eaddr(const struct kvm_book3e_206_tlb_entry *tlbe)
{
- return tlbe->mas2 & 0xf000;
+ return tlbe->mas2 & MAS2_EPN;
}
static inline u64 get_tlb_bytes(const struct kvm_book3e_206_tlb_entry *tlbe)
--
1.7.4.1
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[RFC PATCH 07/17] KVM: PPC: e500: Mask ea's high 32-bits in 32/64 instr emulation
Mask high 32 bits of effective address in emulation layer, for guests running in 32-bit mode. MAS2's high-order 32 bits represents the upper 32 bits of the effective address of the page. Mask it too for tlbwe instruction emulation. Signed-off-by: Mihai Caraman --- arch/powerpc/kvm/e500_emulate.c |5 - arch/powerpc/kvm/e500_tlb.c |2 ++ 2 files changed, 6 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/kvm/e500_emulate.c b/arch/powerpc/kvm/e500_emulate.c index 81288f7..94305db 100644 --- a/arch/powerpc/kvm/e500_emulate.c +++ b/arch/powerpc/kvm/e500_emulate.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved. + * Copyright (C) 2008-2012 Freescale Semiconductor, Inc. All rights reserved. * * Author: Yu Liu, * @@ -90,6 +90,9 @@ static inline ulong kvmppc_get_ea_indexed(struct kvm_vcpu *vcpu, int ra, int rb) if (ra) ea += kvmppc_get_gpr(vcpu, ra); + if (!(vcpu->arch.shared->msr & MSR_CM)) + ea &= 0xUL; + return ea; } diff --git a/arch/powerpc/kvm/e500_tlb.c b/arch/powerpc/kvm/e500_tlb.c index 2175a58..3ed4e7d 100644 --- a/arch/powerpc/kvm/e500_tlb.c +++ b/arch/powerpc/kvm/e500_tlb.c @@ -862,6 +862,8 @@ int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu) gtlbe->mas1 = vcpu->arch.shared->mas1; gtlbe->mas2 = vcpu->arch.shared->mas2; + if (!(vcpu->arch.shared->msr & MSR_CM)) + gtlbe->mas2 &= 0xUL; gtlbe->mas7_3 = vcpu->arch.shared->mas7_3; trace_kvm_booke206_gtlb_write(vcpu->arch.shared->mas0, gtlbe->mas1, -- 1.7.4.1 -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH 10/17] PowerPC: booke64: Refactor exception prolog for save/restore regs
Refactor exception prolog to allow save/restore register parameters. Add addition none definition for exception prolog usage. This is needed for exceptions like Guest Doorbell that use GSRRx regsiters which do not map on exception type. Signed-off-by: Mihai Caraman --- arch/powerpc/kernel/exceptions-64e.S | 23 --- 1 files changed, 8 insertions(+), 15 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S index 7215cc2..52aa96b 100644 --- a/arch/powerpc/kernel/exceptions-64e.S +++ b/arch/powerpc/kernel/exceptions-64e.S @@ -35,7 +35,7 @@ #defineSPECIAL_EXC_FRAME_SIZE INT_FRAME_SIZE /* Exception prolog code for all exceptions */ -#define EXCEPTION_PROLOG(n, type, addition)\ +#define EXCEPTION_PROLOG(n, type, srr0, srr1, addition) \ mtspr SPRN_SPRG_##type##_SCRATCH,r13; /* get spare registers */ \ mfspr r13,SPRN_SPRG_PACA; /* get PACA */ \ std r10,PACA_EX##type+EX_R10(r13); \ @@ -44,54 +44,47 @@ addition; /* additional code for that exc. */ \ std r1,PACA_EX##type+EX_R1(r13); /* save old r1 in the PACA */ \ stw r10,PACA_EX##type+EX_CR(r13); /* save old CR in the PACA */ \ - mfspr r11,SPRN_##type##_SRR1;/* what are we coming from */\ + mfspr r11,srr1;/* what are we coming from */ \ type##_SET_KSTACK; /* get special stack if necessary */\ andi. r10,r11,MSR_PR; /* save stack pointer */\ beq 1f; /* branch around if supervisor */ \ ld r1,PACAKSAVE(r13); /* get kernel stack coming from usr */\ 1: cmpdi cr1,r1,0; /* check if SP makes sense */ \ bge-cr1,exc_##n##_bad_stack;/* bad stack (TODO: out of line) */ \ - mfspr r10,SPRN_##type##_SRR0; /* read SRR0 before touching stack */ + mfspr r10,srr0; /* read SRR0 before touching stack */ /* Exception type-specific macros */ #defineGEN_SET_KSTACK \ subir1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ -#define SPRN_GEN_SRR0 SPRN_SRR0 -#define SPRN_GEN_SRR1 SPRN_SRR1 #define CRIT_SET_KSTACK \ ld r1,PACA_CRIT_STACK(r13);\ subir1,r1,SPECIAL_EXC_FRAME_SIZE; -#define SPRN_CRIT_SRR0 SPRN_CSRR0 -#define SPRN_CRIT_SRR1 SPRN_CSRR1 #define DBG_SET_KSTACK \ ld r1,PACA_DBG_STACK(r13); \ subir1,r1,SPECIAL_EXC_FRAME_SIZE; -#define SPRN_DBG_SRR0 SPRN_DSRR0 -#define SPRN_DBG_SRR1 SPRN_DSRR1 #define MC_SET_KSTACK \ ld r1,PACA_MC_STACK(r13); \ subir1,r1,SPECIAL_EXC_FRAME_SIZE; -#define SPRN_MC_SRR0 SPRN_MCSRR0 -#define SPRN_MC_SRR1 SPRN_MCSRR1 #define NORMAL_EXCEPTION_PROLOG(n, addition) \ - EXCEPTION_PROLOG(n, GEN, addition##_GEN(n)) + EXCEPTION_PROLOG(n, GEN, SPRN_SRR0, SPRN_SRR1, addition##_GEN(n)) #define CRIT_EXCEPTION_PROLOG(n, addition) \ - EXCEPTION_PROLOG(n, CRIT, addition##_CRIT(n)) + EXCEPTION_PROLOG(n, CRIT, SPRN_CSRR0, SPRN_CSRR1, addition##_CRIT(n)) #define DBG_EXCEPTION_PROLOG(n, addition) \ - EXCEPTION_PROLOG(n, DBG, addition##_DBG(n)) + EXCEPTION_PROLOG(n, DBG, SPRN_DSRR0, SPRN_DSRR1, addition##_DBG(n)) #define MC_EXCEPTION_PROLOG(n, addition) \ - EXCEPTION_PROLOG(n, MC, addition##_MC(n)) + EXCEPTION_PROLOG(n, MC, SPRN_MCSRR0, SPRN_MCSRR1, addition##_MC(n)) /* Variants of the "addition" argument for the prolog */ +#define PROLOG_ADDITION_NONE #define PROLOG_ADDITION_NONE_GEN(n) #define PROLOG_ADDITION_NONE_CRIT(n) #define PROLOG_ADDITION_NONE_DBG(n) -- 1.7.4.1 -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH 14/17] KVM: PPC32: bookehv: Remove GET_VCPU macro from exception handler
GET_VCPU define will not be implemented for 64-bit for performance reasons so get rid of it also on 32-bit. Signed-off-by: Mihai Caraman --- arch/powerpc/kvm/bookehv_interrupts.S |7 ++- 1 files changed, 2 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/kvm/bookehv_interrupts.S b/arch/powerpc/kvm/bookehv_interrupts.S index 6048a00..dff8ed4 100644 --- a/arch/powerpc/kvm/bookehv_interrupts.S +++ b/arch/powerpc/kvm/bookehv_interrupts.S @@ -32,9 +32,6 @@ #include "../kernel/head_booke.h" /* for THREAD_NORMSAVE() */ -#define GET_VCPU(vcpu, thread) \ - PPC_LL vcpu, THREAD_KVM_VCPU(thread) - #define LONGBYTES (BITS_PER_LONG / 8) #define VCPU_GPR(n)(VCPU_GPRS + (n * LONGBYTES)) @@ -210,7 +207,7 @@ */ .macro kvm_handler intno srr0, srr1, flags _GLOBAL(kvmppc_handler_\intno\()_\srr1) - GET_VCPU(r11, r10) + PPC_LL r11, THREAD_KVM_VCPU(r10) PPC_STL r3, VCPU_GPR(r3)(r11) mfspr r3, SPRN_SPRG_RSCRATCH0 PPC_STL r4, VCPU_GPR(r4)(r11) @@ -237,7 +234,7 @@ _GLOBAL(kvmppc_handler_\intno\()_\srr1) .macro kvm_lvl_handler intno scratch srr0, srr1, flags _GLOBAL(kvmppc_handler_\intno\()_\srr1) mfspr r10, SPRN_SPRG_THREAD - GET_VCPU(r11, r10) + PPC_LL r11, THREAD_KVM_VCPU(r10) PPC_STL r3, VCPU_GPR(r3)(r11) mfspr r3, \scratch PPC_STL r4, VCPU_GPR(r4)(r11) -- 1.7.4.1 -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH 02/17] KVM: PPC64: booke: Add EPCR support in mtspr/mfspr emulation
Add EPCR support in booke mtspr/mfspr emulation. EPCR register is defined
only for 64-bit and HV categories, so it shoud be available only on 64-bit
virtual processors. Undefine the support for 32-bit builds.
Define a reusable setter function for vcpu's EPCR.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c | 12 +++-
arch/powerpc/kvm/booke.h |6 ++
arch/powerpc/kvm/booke_emulate.c | 13 -
3 files changed, 29 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 72f13f4..f9fa260 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -13,7 +13,7 @@
* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*
* Copyright IBM Corp. 2007
- * Copyright 2010-2011 Freescale Semiconductor, Inc.
+ * Copyright 2010-2012 Freescale Semiconductor, Inc.
*
* Authors: Hollis Blanchard
* Christian Ehrhardt
@@ -1243,6 +1243,16 @@ void kvmppc_core_commit_memory_region(struct kvm *kvm,
{
}
+#ifdef CONFIG_64BIT
+void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr)
+{
+ vcpu->arch.epcr = new_epcr;
+ vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM;
+ if (vcpu->arch.epcr & SPRN_EPCR_ICM)
+ vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM;
+}
+#endif
+
void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
{
vcpu->arch.tcr = new_tcr;
diff --git a/arch/powerpc/kvm/booke.h b/arch/powerpc/kvm/booke.h
index ba61974..e05b48f 100644
--- a/arch/powerpc/kvm/booke.h
+++ b/arch/powerpc/kvm/booke.h
@@ -69,6 +69,12 @@ extern unsigned long kvmppc_booke_handlers;
void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr);
void kvmppc_mmu_msr_notify(struct kvm_vcpu *vcpu, u32 old_msr);
+#ifdef CONFIG_64BIT
+void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr);
+#else
+static inline void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr) {}
+#endif
+
void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr);
void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits);
void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits);
diff --git a/arch/powerpc/kvm/booke_emulate.c b/arch/powerpc/kvm/booke_emulate.c
index 6c76397..9cf2b95f 100644
--- a/arch/powerpc/kvm/booke_emulate.c
+++ b/arch/powerpc/kvm/booke_emulate.c
@@ -13,7 +13,7 @@
* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*
* Copyright IBM Corp. 2008
- * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011-2012 Freescale Semiconductor, Inc.
*
* Authors: Hollis Blanchard
*/
@@ -207,6 +207,12 @@ int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int
sprn, ulong spr_val)
case SPRN_IVOR15:
vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = spr_val;
break;
+#ifdef CONFIG_64BIT
+ case SPRN_EPCR:
+ kvmppc_set_epcr(vcpu, spr_val);
+ mtspr(SPRN_EPCR, vcpu->arch.shadow_epcr);
+ break;
+#endif
default:
emulated = EMULATE_FAIL;
@@ -293,6 +299,11 @@ int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int
sprn, ulong *spr_val)
case SPRN_IVOR15:
*spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
break;
+#ifdef CONFIG_64BIT
+ case SPRN_EPCR:
+ *spr_val = vcpu->arch.epcr;
+ break;
+#endif
default:
emulated = EMULATE_FAIL;
--
1.7.4.1
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[RFC PATCH 04/17] KVM: PPC64: booke: Add guest computation mode for irq delivery
When delivering guest IRQs, update MSR computaion mode according to guest
interrupt computation mode found in EPCR.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index d15c4b5..93b48e0 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -287,6 +287,7 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu
*vcpu,
bool crit;
bool keep_irq = false;
enum int_class int_class;
+ ulong msr_cm = 0;
/* Truncate crit indicators in 32 bit mode */
if (!(vcpu->arch.shared->msr & MSR_SF)) {
@@ -299,6 +300,10 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu
*vcpu,
/* ... and we're in supervisor mode */
crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
+#ifdef CONFIG_64BIT
+ msr_cm = vcpu->arch.epcr & SPRN_EPCR_ICM ? MSR_CM : 0;
+#endif
+
if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
priority = BOOKE_IRQPRIO_EXTERNAL;
keep_irq = true;
@@ -381,7 +386,8 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu
*vcpu,
set_guest_esr(vcpu, vcpu->arch.queued_esr);
if (update_dear == true)
set_guest_dear(vcpu, vcpu->arch.queued_dear);
- kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask);
+ kvmppc_set_msr(vcpu, (vcpu->arch.shared->msr & msr_mask)
+ | msr_cm);
if (!keep_irq)
clear_bit(priority, &vcpu->arch.pending_exceptions);
--
1.7.4.1
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[RFC PATCH 00/17] KVM: PPC: 64-bit Book3E support
This patchset adds 64-bit Book3E PowerPC support to KVM. It is intended as a request for comment for scratch register changes and for the support limited to bolted TLB miss exception handlers. This work was validated on Freescale's e5500 cores using P5020DS boards. This patchset is based on Alex G. kvm-ppc-next branch. For a ready to use git tree, please check here: git://github.com/mcaraman/kvm.git 64-bit-booke Current limitations: - 64-bit guests must be configured without KVM support. CPU_FTR_EMB_HV setup for 64-bit non-hv will be addressed soon in a different patchset. Prerequisite patches, availabe on top of the git tree: - commit 7cd1afad10d981cbf4a0c8738bf7f5c0add0e50f: Make hard_irq_disable() actually hard-disable interrupts - commit 9a5a0b80cf7e09bd6fadf1a66f27579d0f6d2795, required to run 32-bit guests on e5500 cores: powerpc/e5500: Set r5 to point to cpu spec in setup_cpu_e5500() - commit 6c04342ba5ad7723d8b07d2ad4800607c0985c35, required to run 64-bit SMP guests: KVM: PPC: bookehv64: Add support for std/ld emulation This patchset requires a qemu with e5500 support. For a ready to use git tree, please check here: git://repo.or.cz/qemu/agraf.git ppc-e5500 To use qemu run: $ qemu-system-ppc64 -M mpc8544ds -cpu e5500 -nographic -kernel uImage \ -machine dt_compatible=fsl,,P5020DS Mike Mihai Caraman (17): KVM: PPC64: booke: Set interrupt computation mode for 64-bit host KVM: PPC64: booke: Add EPCR support in mtspr/mfspr emulation KVM: PPC64: booke: Add EPCR support in sregs KVM: PPC64: booke: Add guest computation mode for irq delivery KVM: PPC: booke: Extend MAS2 EPN mask for 64-bit KVM: PPC: e500: Add emulation helper for getting instruction ea KVM: PPC: e500: Mask ea's high 32-bits in 32/64 instr emulation KVM: PPC: e500mc: Fix tlbilx emulation for 64-bit guests KVM: PPC64: booke: Hard disable interrupts when entering guest PowerPC: booke64: Refactor exception prolog for save/restore regs PowerPC: booke64: Fix machine check handler to use the right prolog PowerPC: booke64: Add DO_KVM kernel hooks PowerPC: booke64: Use SPRG0/3 scratch for bolted TLB miss & crit int KVM: PPC32: bookehv: Remove GET_VCPU macro from exception handler KVM: PPC64: bookehv: Add support for interrupt handling KVM: PPC: e500: Silence bogus GCC warning in tlb code KVM: PPC: booke: Fix get_tb() compile error on 64-bit arch/powerpc/include/asm/exception-64e.h| 14 ++-- arch/powerpc/include/asm/kvm_booke_hv_asm.h | 12 +++- arch/powerpc/include/asm/mmu-book3e.h |2 +- arch/powerpc/include/asm/reg.h |6 +- arch/powerpc/kernel/exceptions-64e.S| 127 ++- arch/powerpc/kvm/booke.c| 49 +-- arch/powerpc/kvm/booke.h|6 ++ arch/powerpc/kvm/booke_emulate.c| 13 +++- arch/powerpc/kvm/bookehv_interrupts.S | 127 --- arch/powerpc/kvm/e500.h |8 +- arch/powerpc/kvm/e500_emulate.c | 26 +- arch/powerpc/kvm/e500_tlb.c | 28 ++ arch/powerpc/kvm/e500mc.c |8 ++- arch/powerpc/mm/tlb_low_64e.S | 42 + 14 files changed, 347 insertions(+), 121 deletions(-) -- 1.7.4.1 -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH 17/17] KVM: PPC: booke: Fix get_tb() compile error on 64-bit
Include header file for get_tb() declaration. Signed-off-by: Mihai Caraman --- arch/powerpc/kvm/booke.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c index db05692..a427031 100644 --- a/arch/powerpc/kvm/booke.c +++ b/arch/powerpc/kvm/booke.c @@ -36,6 +36,7 @@ #include #include #include +#include #include "timing.h" #include "booke.h" -- 1.7.4.1 -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH 09/17] KVM: PPC64: booke: Hard disable interrupts when entering guest
64-bit host runs with lazy interrupt disabling, so local_irq_disable() does
not disable interrupts right away and does not protect against preemption
required by __kvmppc_vcpu_run(). Define a macro for 64-bit to use
hard_irq_disable().
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c | 14 ++
1 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 93b48e0..db05692 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -45,6 +45,12 @@ unsigned long kvmppc_booke_handlers;
#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
+#ifdef CONFIG_64BIT
+#define _hard_irq_disable() hard_irq_disable()
+#else
+#define _hard_irq_disable() local_irq_disable()
+#endif
+
struct kvm_stats_debugfs_item debugfs_entries[] = {
{ "mmio", VCPU_STAT(mmio_exits) },
{ "dcr",VCPU_STAT(dcr_exits) },
@@ -456,7 +462,7 @@ int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
local_irq_enable();
kvm_vcpu_block(vcpu);
clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
- local_irq_disable();
+ _hard_irq_disable();
kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
r = 1;
@@ -480,7 +486,7 @@ static int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu)
if (need_resched()) {
local_irq_enable();
cond_resched();
- local_irq_disable();
+ _hard_irq_disable();
continue;
}
@@ -515,7 +521,7 @@ int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct
kvm_vcpu *vcpu)
return -EINVAL;
}
- local_irq_disable();
+ _hard_irq_disable();
if (kvmppc_prepare_to_enter(vcpu)) {
kvm_run->exit_reason = KVM_EXIT_INTR;
ret = -EINTR;
@@ -955,7 +961,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu
*vcpu,
* aren't already exiting to userspace for some other reason.
*/
if (!(r & RESUME_HOST)) {
- local_irq_disable();
+ _hard_irq_disable();
if (kvmppc_prepare_to_enter(vcpu)) {
run->exit_reason = KVM_EXIT_INTR;
r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
--
1.7.4.1
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[RFC PATCH 15/17] KVM: PPC64: bookehv: Add support for interrupt handling
Add bookehv interrupt handling support for 64-bit hosts. Change common stack layout to refer PPC_LR_STKOFF kernel constant. Dispatch the 64-bit execution flow to the existing kvm_handler_common asm macro. Update input register values documentation. Only the bolted version of TLB miss exception handlers is supported now. Signed-off-by: Mihai Caraman --- arch/powerpc/include/asm/kvm_booke_hv_asm.h | 12 +++- arch/powerpc/kvm/bookehv_interrupts.S | 120 +-- 2 files changed, 122 insertions(+), 10 deletions(-) diff --git a/arch/powerpc/include/asm/kvm_booke_hv_asm.h b/arch/powerpc/include/asm/kvm_booke_hv_asm.h index 30a600f..8be6f87 100644 --- a/arch/powerpc/include/asm/kvm_booke_hv_asm.h +++ b/arch/powerpc/include/asm/kvm_booke_hv_asm.h @@ -1,5 +1,5 @@ /* - * Copyright 2010-2011 Freescale Semiconductor, Inc. + * Copyright 2010-2012 Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2, as @@ -17,6 +17,7 @@ * there are no exceptions for which we fall through directly to * the normal host handler. * + * 32-bit host * Expected inputs (normal exceptions): * SCRATCH0 = saved r10 * r10 = thread struct @@ -33,6 +34,15 @@ * *(r8 + GPR9) = saved r9 * *(r8 + GPR10) = saved r10 (r10 not yet clobbered) * *(r8 + GPR11) = saved r11 + * + * 64-bit host + * Expected inputs (exception types GEN/DBG/CRIT/MC): + * r13 = PACA_POINTER + * r10 = saved CR + * SPRN_SPRG_##type##_SCRATCH = saved r13 + * *(r13 + PACA_EX##type + EX_R10) = saved r10 + * *(r13 + PACA_EX##type + EX_R11) = saved r11 + * Only the bolted version of TLB miss exception handlers is supported now. */ .macro DO_KVM intno srr1 #ifdef CONFIG_KVM_BOOKE_HV diff --git a/arch/powerpc/kvm/bookehv_interrupts.S b/arch/powerpc/kvm/bookehv_interrupts.S index dff8ed4..04097de 100644 --- a/arch/powerpc/kvm/bookehv_interrupts.S +++ b/arch/powerpc/kvm/bookehv_interrupts.S @@ -12,10 +12,11 @@ * along with this program; if not, write to the Free Software * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. * - * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. * * Author: Varun Sethi * Author: Scott Wood + * Author: Mihai Caraman * * This file is derived from arch/powerpc/kvm/booke_interrupts.S */ @@ -30,7 +31,11 @@ #include #include +#ifdef CONFIG_64BIT +#include +#else #include "../kernel/head_booke.h" /* for THREAD_NORMSAVE() */ +#endif #define LONGBYTES (BITS_PER_LONG / 8) @@ -38,20 +43,21 @@ #define VCPU_GUEST_SPRG(n) (VCPU_GUEST_SPRGS + (n * LONGBYTES)) /* The host stack layout: */ -#define HOST_R1 (0 * LONGBYTES) /* Implied by stwu. */ -#define HOST_CALLEE_LR (1 * LONGBYTES) -#define HOST_RUN(2 * LONGBYTES) /* struct kvm_run */ +#define HOST_R1 0 /* Implied by stwu. */ +#define HOST_CALLEE_LR PPC_LR_STKOFF +#define HOST_RUN(HOST_CALLEE_LR + LONGBYTES) /* * r2 is special: it holds 'current', and it made nonvolatile in the * kernel with the -ffixed-r2 gcc option. */ -#define HOST_R2 (3 * LONGBYTES) -#define HOST_CR (4 * LONGBYTES) -#define HOST_NV_GPRS(5 * LONGBYTES) +#define HOST_R2 (HOST_RUN + LONGBYTES) +#define HOST_CR (HOST_R2 + LONGBYTES) +#define HOST_NV_GPRS(HOST_CR + LONGBYTES) #define HOST_NV_GPR(n) (HOST_NV_GPRS + ((n - 14) * LONGBYTES)) #define HOST_MIN_STACK_SIZE (HOST_NV_GPR(31) + LONGBYTES) #define HOST_STACK_SIZE ((HOST_MIN_STACK_SIZE + 15) & ~15) /* Align. */ -#define HOST_STACK_LR (HOST_STACK_SIZE + LONGBYTES) /* In caller stack frame. */ +/* LR in caller stack frame. */ +#define HOST_STACK_LR (HOST_STACK_SIZE + PPC_LR_STKOFF) #define NEED_EMU 0x0001 /* emulation -- save nv regs */ #define NEED_DEAR 0x0002 /* save faulting DEAR */ @@ -202,6 +208,102 @@ b kvmppc_resume_host .endm +#ifdef CONFIG_64BIT +/* + * For input register values, see arch/powerpc/include/asm/kvm_booke_hv_asm.h + */ +.macro kvm_handler intno scratch, paca_ex, ex_r10, ex_r11, srr0, srr1, flags + _GLOBAL(kvmppc_handler_\intno\()_\srr1) + mr r11, r4 + /* +* Get vcpu from Paca: paca->__current.thread->kvm_vcpu +*/ + PPC_LL r4, PACACURRENT(r13) + PPC_LL r4, (THREAD + THREAD_KVM_VCPU)(r4) + stw r10, VCPU_CR(r4) + PPC_STL r11, VCPU_GPR(r4)(r4) + PPC_STL r5, VCPU_GPR(r5)(r4) + mfspr r5, \scratch + PPC_STL r6, VCPU_GPR(r6)(r4) + PPC_STL r8, VCPU_GPR(r8)(r4) + PPC_STL r9, VCPU_GPR(r9)(r4) + PPC_STL r5, VCPU_GPR(r13)(r4) + PPC_LL r6, (\paca_ex + \ex_r10)(r13) + PPC_LL r8, (\paca_ex + \ex_r11)(r13) + PPC_STL r3, VCPU_GPR(r3)(r4) + PPC_STL r7, VCPU_GPR(r7)(r4) + PPC_STL r12, VCPU_GPR(r12)(r4) +
[RFC PATCH 12/17] PowerPC: booke64: Add DO_KVM kernel hooks
Hook DO_KVM macro to 64-bit booke in a optimal way similar to 32-bit booke see head_fsl_booke.S file. Extend interrupt handlers' parameter list with interrupt vector numbers to accomodate the macro. Rework Guest Doorbell handler to use the proper GSRRx save/restore registers. Only the bolted version of tlb miss handers is addressed now. Signed-off-by: Mihai Caraman --- arch/powerpc/kernel/exceptions-64e.S | 114 -- arch/powerpc/mm/tlb_low_64e.S| 14 +++- 2 files changed, 92 insertions(+), 36 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S index 06f7aec..a60f81f 100644 --- a/arch/powerpc/kernel/exceptions-64e.S +++ b/arch/powerpc/kernel/exceptions-64e.S @@ -25,6 +25,8 @@ #include #include #include +#include +#include /* XXX This will ultimately add space for a special exception save * structure used to save things like SRR0/SRR1, SPRGs, MAS, etc... @@ -34,13 +36,24 @@ */ #defineSPECIAL_EXC_FRAME_SIZE INT_FRAME_SIZE +#ifdef CONFIG_KVM_BOOKE_HV +#define KVM_BOOKE_HV_MFSPR(reg, spr) \ + BEGIN_FTR_SECTION \ + mfspr reg, spr; \ + END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV) +#else +#define KVM_BOOKE_HV_MFSPR(reg, spr) +#endif + /* Exception prolog code for all exceptions */ -#define EXCEPTION_PROLOG(n, type, srr0, srr1, addition) \ +#define EXCEPTION_PROLOG(n, intnum, type, srr0, srr1, addition) \ mtspr SPRN_SPRG_##type##_SCRATCH,r13; /* get spare registers */ \ mfspr r13,SPRN_SPRG_PACA; /* get PACA */ \ std r10,PACA_EX##type+EX_R10(r13); \ std r11,PACA_EX##type+EX_R11(r13); \ mfcrr10;/* save CR */ \ + KVM_BOOKE_HV_MFSPR(r11,srr1); \ + DO_KVM intnum,srr1;\ addition; /* additional code for that exc. */ \ std r1,PACA_EX##type+EX_R1(r13); /* save old r1 in the PACA */ \ stw r10,PACA_EX##type+EX_CR(r13); /* save old CR in the PACA */ \ @@ -69,17 +82,21 @@ ld r1,PACA_MC_STACK(r13); \ subir1,r1,SPECIAL_EXC_FRAME_SIZE; -#define NORMAL_EXCEPTION_PROLOG(n, addition) \ - EXCEPTION_PROLOG(n, GEN, SPRN_SRR0, SPRN_SRR1, addition##_GEN(n)) +#define NORMAL_EXCEPTION_PROLOG(n, intnum, addition) \ + EXCEPTION_PROLOG(n, intnum, GEN, SPRN_SRR0, SPRN_SRR1, \ +addition##_GEN(n)) -#define CRIT_EXCEPTION_PROLOG(n, addition) \ - EXCEPTION_PROLOG(n, CRIT, SPRN_CSRR0, SPRN_CSRR1, addition##_CRIT(n)) +#define CRIT_EXCEPTION_PROLOG(n, intnum, addition) \ + EXCEPTION_PROLOG(n, intnum, CRIT, SPRN_CSRR0, SPRN_CSRR1, \ +addition##_CRIT(n)) -#define DBG_EXCEPTION_PROLOG(n, addition) \ - EXCEPTION_PROLOG(n, DBG, SPRN_DSRR0, SPRN_DSRR1, addition##_DBG(n)) +#define DBG_EXCEPTION_PROLOG(n, intnum, addition) \ + EXCEPTION_PROLOG(n, intnum, DBG, SPRN_DSRR0, SPRN_DSRR1,\ +addition##_DBG(n)) -#define MC_EXCEPTION_PROLOG(n, addition) \ - EXCEPTION_PROLOG(n, MC, SPRN_MCSRR0, SPRN_MCSRR1, addition##_MC(n)) +#define MC_EXCEPTION_PROLOG(n, intnum, addition) \ + EXCEPTION_PROLOG(n, intnum, MC, SPRN_MCSRR0, SPRN_MCSRR1, \ +addition##_MC(n)) /* Variants of the "addition" argument for the prolog @@ -226,9 +243,9 @@ exc_##n##_bad_stack: \ 1: -#define MASKABLE_EXCEPTION(trapnum, label, hdlr, ack) \ +#define MASKABLE_EXCEPTION(trapnum, intnum, label, hdlr, ack) \ START_EXCEPTION(label); \ - NORMAL_EXCEPTION_PROLOG(trapnum, PROLOG_ADDITION_MASKABLE) \ + NORMAL_EXCEPTION_PROLOG(trapnum, intnum, PROLOG_ADDITION_MASKABLE)\ EXCEPTION_COMMON(trapnum, PACA_EXGEN, INTS_DISABLE) \ ack(r8);\ CHECK_NAPPING();\ @@ -279,7 +296,8 @@ interrupt_end_book3e: /* Critical Input Interrupt */ START_EXCEPTION(critical_input); - CRIT_EXCEPTION_PROLOG(0x100, PROLOG_ADDITION_NONE) + CRIT_EXCEPTION_PROLOG(0x100,
[RFC PATCH 03/17] KVM: PPC64: booke: Add EPCR support in sregs
Add KVM_SREGS_E_64 feature and EPCR spr support in get/set sregs
for 64-bit hosts.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c | 14 ++
1 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index f9fa260..d15c4b5 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -1052,6 +1052,9 @@ static void get_sregs_base(struct kvm_vcpu *vcpu,
u64 tb = get_tb();
sregs->u.e.features |= KVM_SREGS_E_BASE;
+#ifdef CONFIG_64BIT
+ sregs->u.e.features |= KVM_SREGS_E_64;
+#endif
sregs->u.e.csrr0 = vcpu->arch.csrr0;
sregs->u.e.csrr1 = vcpu->arch.csrr1;
@@ -1063,6 +1066,9 @@ static void get_sregs_base(struct kvm_vcpu *vcpu,
sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
sregs->u.e.tb = tb;
sregs->u.e.vrsave = vcpu->arch.vrsave;
+#ifdef CONFIG_64BIT
+ sregs->u.e.epcr = vcpu->arch.epcr;
+#endif
}
static int set_sregs_base(struct kvm_vcpu *vcpu,
@@ -1071,6 +1077,11 @@ static int set_sregs_base(struct kvm_vcpu *vcpu,
if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
return 0;
+#ifdef CONFIG_64BIT
+ if (!(sregs->u.e.features & KVM_SREGS_E_64))
+ return 0;
+#endif
+
vcpu->arch.csrr0 = sregs->u.e.csrr0;
vcpu->arch.csrr1 = sregs->u.e.csrr1;
vcpu->arch.mcsr = sregs->u.e.mcsr;
@@ -1078,6 +1089,9 @@ static int set_sregs_base(struct kvm_vcpu *vcpu,
set_guest_dear(vcpu, sregs->u.e.dear);
vcpu->arch.vrsave = sregs->u.e.vrsave;
kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
+#ifdef CONFIG_64BIT
+ kvmppc_set_epcr(vcpu, sregs->u.e.epcr);
+#endif
if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
vcpu->arch.dec = sregs->u.e.dec;
--
1.7.4.1
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[RFC PATCH 13/17] PowerPC: booke64: Use SPRG0/3 scratch for bolted TLB miss & crit int
Embedded.Hypervisor category defines GSPRG0..3 physical registers for guests. Avoid SPRG4-7 usage as scratch in host exception handlers, otherwise guest SPRG4-7 registers will be clobbered. For bolted TLB miss exception handlers, which is the version currently supported by KVM, use SPRN_SPRG_GEN_SCRATCH (aka SPRG0) instead of SPRN_SPRG_TLB_SCRATCH (aka SPRG6) and replace TLB with GEN PACA slots to keep consitency. For critical exception handler use SPRG3 instead of SPRG7. Signed-off-by: Mihai Caraman --- arch/powerpc/include/asm/exception-64e.h | 14 +++--- arch/powerpc/include/asm/reg.h |6 +++--- arch/powerpc/mm/tlb_low_64e.S| 28 ++-- 3 files changed, 24 insertions(+), 24 deletions(-) diff --git a/arch/powerpc/include/asm/exception-64e.h b/arch/powerpc/include/asm/exception-64e.h index ac13add..c90a9a4 100644 --- a/arch/powerpc/include/asm/exception-64e.h +++ b/arch/powerpc/include/asm/exception-64e.h @@ -38,8 +38,11 @@ */ -/* We are out of SPRGs so we save some things in the PACA. The normal - * exception frame is smaller than the CRIT or MC one though +/* We are out of SPRGs so we save some things in the 8 slots available in PACA. + * The normal exception frame is smaller than the CRIT or MC one though + * + * Bolted TLB miss exception variant also uses these slots which in combination + * with pgd and kernel_pgd fits in one 64-byte cache line. */ #define EX_R1 (0 * 8) #define EX_CR (1 * 8) @@ -47,13 +50,10 @@ #define EX_R11 (3 * 8) #define EX_R14 (4 * 8) #define EX_R15 (5 * 8) +#define EX_R16 (6 * 8) /* - * The TLB miss exception uses different slots. - * - * The bolted variant uses only the first six fields, - * which in combination with pgd and kernel_pgd fits in - * one 64-byte cache line. + * PACA slots offset for standard TLB miss exception. */ #define EX_TLB_R10 ( 0 * 8) diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index f0cb7f4..51c14a7 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -760,10 +760,10 @@ * 64-bit embedded * - SPRG0 generic exception scratch * - SPRG2 TLB exception stack - * - SPRG3 unused (user visible) + * - SPRG3 critical exception scratch (user visible) * - SPRG4 unused (user visible) * - SPRG6 TLB miss scratch (user visible, sorry !) - * - SPRG7 critical exception scratch + * - SPRG7 unused (user visible) * - SPRG8 machine check exception scratch * - SPRG9 debug exception scratch * @@ -857,7 +857,7 @@ #ifdef CONFIG_PPC_BOOK3E_64 #define SPRN_SPRG_MC_SCRATCH SPRN_SPRG8 -#define SPRN_SPRG_CRIT_SCRATCH SPRN_SPRG7 +#define SPRN_SPRG_CRIT_SCRATCH SPRN_SPRG3 #define SPRN_SPRG_DBG_SCRATCH SPRN_SPRG9 #define SPRN_SPRG_TLB_EXFRAME SPRN_SPRG2 #define SPRN_SPRG_TLB_SCRATCH SPRN_SPRG6 diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S index 88feaaa..4192ade 100644 --- a/arch/powerpc/mm/tlb_low_64e.S +++ b/arch/powerpc/mm/tlb_low_64e.S @@ -40,36 +40,36 @@ **/ .macro tlb_prolog_bolted intnum addr - mtspr SPRN_SPRG_TLB_SCRATCH,r13 + mtspr SPRN_SPRG_GEN_SCRATCH,r13 mfspr r13,SPRN_SPRG_PACA - std r10,PACA_EXTLB+EX_TLB_R10(r13) + std r10,PACA_EXGEN+EX_R10(r13) mfcrr10 - std r11,PACA_EXTLB+EX_TLB_R11(r13) + std r11,PACA_EXGEN+EX_R11(r13) #ifdef CONFIG_KVM_BOOKE_HV BEGIN_FTR_SECTION mfspr r11, SPRN_SRR1 END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV) #endif DO_KVM \intnum, SPRN_SRR1 - std r16,PACA_EXTLB+EX_TLB_R16(r13) + std r16,PACA_EXGEN+EX_R16(r13) mfspr r16,\addr /* get faulting address */ - std r14,PACA_EXTLB+EX_TLB_R14(r13) + std r14,PACA_EXGEN+EX_R14(r13) ld r14,PACAPGD(r13) - std r15,PACA_EXTLB+EX_TLB_R15(r13) - std r10,PACA_EXTLB+EX_TLB_CR(r13) + std r15,PACA_EXGEN+EX_R15(r13) + std r10,PACA_EXGEN+EX_CR(r13) TLB_MISS_PROLOG_STATS_BOLTED .endm .macro tlb_epilog_bolted - ld r14,PACA_EXTLB+EX_TLB_CR(r13) - ld r10,PACA_EXTLB+EX_TLB_R10(r13) - ld r11,PACA_EXTLB+EX_TLB_R11(r13) + ld r14,PACA_EXGEN+EX_CR(r13) + ld r10,PACA_EXGEN+EX_R10(r13) + ld r11,PACA_EXGEN+EX_R11(r13) mtcrr14 - ld r14,PACA_EXTLB+EX_TLB_R14(r13) - ld r15,PACA_EXTLB+EX_TLB_R15(r13) + ld r14,PACA_EXGEN+EX_R14(r13) + ld r15,PACA_EXGEN+EX_R15(r13) TLB_MISS_RESTORE_STATS_BOLTED - ld r16,PACA_EXTLB+EX_TLB_R16(r13) - mfspr r13,SPRN_SPRG_TLB_SCRATCH + ld r16,PACA_EXGEN+EX_R16(r13) + mfspr r13,SPRN_SPRG_GEN_SCRATCH .endm /* Data TLB miss */ -- 1.7.4.1 -- To unsubscribe from th
[RFC PATCH 11/17] PowerPC: booke64: Fix machine check handler to use the right prolog
Machine check exception handler was using a wrong prolog. Hypervisors, like KVM, which are called early from the exception handler rely on the interrupt source. Signed-off-by: Mihai Caraman --- arch/powerpc/kernel/exceptions-64e.S |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S index 52aa96b..06f7aec 100644 --- a/arch/powerpc/kernel/exceptions-64e.S +++ b/arch/powerpc/kernel/exceptions-64e.S @@ -290,7 +290,7 @@ interrupt_end_book3e: /* Machine Check Interrupt */ START_EXCEPTION(machine_check); - CRIT_EXCEPTION_PROLOG(0x200, PROLOG_ADDITION_NONE) + MC_EXCEPTION_PROLOG(0x200, PROLOG_ADDITION_NONE) // EXCEPTION_COMMON(0x200, PACA_EXMC, INTS_DISABLE) // bl special_reg_save_mc // addir3,r1,STACK_FRAME_OVERHEAD -- 1.7.4.1 -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH 06/17] KVM: PPC: e500: Add emulation helper for getting instruction ea
Add emulation helper for getting instruction ea and refactor tlb instruction
emulation to use it.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500.h |6 +++---
arch/powerpc/kvm/e500_emulate.c | 21 ++---
arch/powerpc/kvm/e500_tlb.c | 23 ++-
3 files changed, 27 insertions(+), 23 deletions(-)
diff --git a/arch/powerpc/kvm/e500.h b/arch/powerpc/kvm/e500.h
index 3e31098..70bfed4 100644
--- a/arch/powerpc/kvm/e500.h
+++ b/arch/powerpc/kvm/e500.h
@@ -130,9 +130,9 @@ int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500
*vcpu_e500,
ulong value);
int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu);
int kvmppc_e500_emul_tlbre(struct kvm_vcpu *vcpu);
-int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, int ra, int rb);
-int kvmppc_e500_emul_tlbilx(struct kvm_vcpu *vcpu, int rt, int ra, int rb);
-int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *vcpu, int rb);
+int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, gva_t ea);
+int kvmppc_e500_emul_tlbilx(struct kvm_vcpu *vcpu, int rt, gva_t ea);
+int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *vcpu, gva_t ea);
int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500);
void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *vcpu_e500);
diff --git a/arch/powerpc/kvm/e500_emulate.c b/arch/powerpc/kvm/e500_emulate.c
index 8b99e07..81288f7 100644
--- a/arch/powerpc/kvm/e500_emulate.c
+++ b/arch/powerpc/kvm/e500_emulate.c
@@ -82,6 +82,17 @@ static int kvmppc_e500_emul_msgsnd(struct kvm_vcpu *vcpu,
int rb)
}
#endif
+static inline ulong kvmppc_get_ea_indexed(struct kvm_vcpu *vcpu, int ra, int
rb)
+{
+ ulong ea;
+
+ ea = kvmppc_get_gpr(vcpu, rb);
+ if (ra)
+ ea += kvmppc_get_gpr(vcpu, ra);
+
+ return ea;
+}
+
int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
unsigned int inst, int *advance)
{
@@ -89,6 +100,7 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct
kvm_vcpu *vcpu,
int ra = get_ra(inst);
int rb = get_rb(inst);
int rt = get_rt(inst);
+ gva_t ea;
switch (get_op(inst)) {
case 31:
@@ -113,15 +125,18 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct
kvm_vcpu *vcpu,
break;
case XOP_TLBSX:
- emulated = kvmppc_e500_emul_tlbsx(vcpu,rb);
+ ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
+ emulated = kvmppc_e500_emul_tlbsx(vcpu, ea);
break;
case XOP_TLBILX:
- emulated = kvmppc_e500_emul_tlbilx(vcpu, rt, ra, rb);
+ ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
+ emulated = kvmppc_e500_emul_tlbilx(vcpu, rt, ea);
break;
case XOP_TLBIVAX:
- emulated = kvmppc_e500_emul_tlbivax(vcpu, ra, rb);
+ ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
+ emulated = kvmppc_e500_emul_tlbivax(vcpu, ea);
break;
default:
diff --git a/arch/powerpc/kvm/e500_tlb.c b/arch/powerpc/kvm/e500_tlb.c
index c510fc9..2175a58 100644
--- a/arch/powerpc/kvm/e500_tlb.c
+++ b/arch/powerpc/kvm/e500_tlb.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
+ * Copyright (C) 2008-2012 Freescale Semiconductor, Inc. All rights reserved.
*
* Author: Yu Liu, yu@freescale.com
* Scott Wood, scottw...@freescale.com
@@ -680,14 +680,11 @@ int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500
*vcpu_e500, ulong value)
return EMULATE_DONE;
}
-int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, int ra, int rb)
+int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, gva_t ea)
{
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
unsigned int ia;
int esel, tlbsel;
- gva_t ea;
-
- ea = ((ra) ? kvmppc_get_gpr(vcpu, ra) : 0) + kvmppc_get_gpr(vcpu, rb);
ia = (ea >> 2) & 0x1;
@@ -731,14 +728,9 @@ static void tlbilx_all(struct kvmppc_vcpu_e500 *vcpu_e500,
int tlbsel,
}
static void tlbilx_one(struct kvmppc_vcpu_e500 *vcpu_e500, int pid,
- int ra, int rb)
+ gva_t ea)
{
int tlbsel, esel;
- gva_t ea;
-
- ea = kvmppc_get_gpr(&vcpu_e500->vcpu, rb);
- if (ra)
- ea += kvmppc_get_gpr(&vcpu_e500->vcpu, ra);
for (tlbsel = 0; tlbsel < 2; tlbsel++) {
esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel, pid, -1);
@@ -750,7 +742,7 @@ static void tlbilx_one(struct kvmppc_vcpu_e500 *vcpu_e500,
int pid,
}
}
-int kvmppc_e500_emul_tlbilx(struct kvm_vcpu *vcpu, int rt, int ra, int rb)
+int kvmppc_e500_emul_tlbilx(struct kvm_vcpu *vcpu, int rt, gva_t ea)
{
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
[RFC PATCH 01/17] KVM: PPC64: booke: Set interrupt computation mode for 64-bit host
64-bit host needs to remain in 64-bit mode when an exception take place. Set interrupt computaion mode in EPCR register. Signed-off-by: Mihai Caraman --- arch/powerpc/kvm/e500mc.c |5 - 1 files changed, 4 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c index fe6c1de..db97ee3 100644 --- a/arch/powerpc/kvm/e500mc.c +++ b/arch/powerpc/kvm/e500mc.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2010 Freescale Semiconductor, Inc. All rights reserved. + * Copyright (C) 2010,2012 Freescale Semiconductor, Inc. All rights reserved. * * Author: Varun Sethi, * @@ -183,6 +183,9 @@ int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu) vcpu->arch.shadow_epcr = SPRN_EPCR_DSIGS | SPRN_EPCR_DGTMI | \ SPRN_EPCR_DUVD; +#ifdef CONFIG_64BIT + vcpu->arch.shadow_epcr |= SPRN_EPCR_ICM; +#endif vcpu->arch.shadow_msrp = MSRP_UCLEP | MSRP_DEP | MSRP_PMMP; vcpu->arch.eplc = EPC_EGS | (vcpu->kvm->arch.lpid << EPC_ELPID_SHIFT); vcpu->arch.epsc = vcpu->arch.eplc; -- 1.7.4.1 -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
