Re: [PATCH 2/4] KVM: PPC: BOOK3S: PR: Doorbell support
Alexander Graf ag...@suse.de writes:
On 05.06.14 14:08, Aneesh Kumar K.V wrote:
We don't have SMT support yet, hence we should not find a doorbell
message generated
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kvm/book3s_emulate.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/powerpc/kvm/book3s_emulate.c
b/arch/powerpc/kvm/book3s_emulate.c
index 1bb16a59dcbc..d6c87d085182 100644
--- a/arch/powerpc/kvm/book3s_emulate.c
+++ b/arch/powerpc/kvm/book3s_emulate.c
@@ -28,7 +28,9 @@
#define OP_19_XOP_RFI 50
#define OP_31_XOP_MFMSR83
+#define OP_31_XOP_MSGSNDP 142
#define OP_31_XOP_MTMSR146
+#define OP_31_XOP_MSGCLRP 174
#define OP_31_XOP_MTMSRD 178
#define OP_31_XOP_MTSR 210
#define OP_31_XOP_MTSRIN 242
@@ -303,6 +305,22 @@ int kvmppc_core_emulate_op_pr(struct kvm_run *run,
struct kvm_vcpu *vcpu,
break;
}
+case OP_31_XOP_MSGSNDP:
+{
+/*
+ * PR KVM still don't support SMT mode. So we should
still?
+ * not see a MSGSNDP/MSGCLRP used with PR KVM
+ */
+pr_info(KVM: MSGSNDP used in non SMT case\n);
+emulated = EMULATE_FAIL;
What would happen on an HV guest with only 1 thread that MSGSNDs to
thread 0? Would the guest get an illegal instruction trap, a
self-interrupt or would this be a simple nop?
We do get a self-interrupt. I tried the below
tag = mfspr(SPRN_TIR) 0x7f;
ppc_msgsnd(5, 0, tag);
And that results in doorbell exception. That implies we will have to
have full implementation of doorbell. You can drop patch 2 and 3 from
this series. I will rework them.
NOTE: This is not an issue for Linux guest, because we don't send ipi
to self. But to complete the emulation of msgsndp we will need to
emulate it properly.
-aneesh
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Re: [PATCH 2/4] KVM: PPC: BOOK3S: PR: Doorbell support
On 05.06.14 14:08, Aneesh Kumar K.V wrote:
We don't have SMT support yet, hence we should not find a doorbell
message generated
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kvm/book3s_emulate.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/powerpc/kvm/book3s_emulate.c
b/arch/powerpc/kvm/book3s_emulate.c
index 1bb16a59dcbc..d6c87d085182 100644
--- a/arch/powerpc/kvm/book3s_emulate.c
+++ b/arch/powerpc/kvm/book3s_emulate.c
@@ -28,7 +28,9 @@
#define OP_19_XOP_RFI 50
#define OP_31_XOP_MFMSR 83
+#define OP_31_XOP_MSGSNDP 142
#define OP_31_XOP_MTMSR 146
+#define OP_31_XOP_MSGCLRP 174
#define OP_31_XOP_MTMSRD 178
#define OP_31_XOP_MTSR210
#define OP_31_XOP_MTSRIN 242
@@ -303,6 +305,22 @@ int kvmppc_core_emulate_op_pr(struct kvm_run *run, struct
kvm_vcpu *vcpu,
break;
}
+ case OP_31_XOP_MSGSNDP:
+ {
+ /*
+* PR KVM still don't support SMT mode. So we should
still?
+* not see a MSGSNDP/MSGCLRP used with PR KVM
+*/
+ pr_info(KVM: MSGSNDP used in non SMT case\n);
+ emulated = EMULATE_FAIL;
What would happen on an HV guest with only 1 thread that MSGSNDs to
thread 0? Would the guest get an illegal instruction trap, a
self-interrupt or would this be a simple nop?
Alex
+ break;
+ }
+ case OP_31_XOP_MSGCLRP:
+ {
+ pr_info(KVM: MSGCLRP used in non SMT case\n);
+ emulated = EMULATE_FAIL;
+ break;
+ }
default:
emulated = EMULATE_FAIL;
}
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Re: [PATCH 2/4] KVM: PPC: BOOK3S: PR: Doorbell support
On 05.06.14 14:21, Alexander Graf wrote:
On 05.06.14 14:08, Aneesh Kumar K.V wrote:
We don't have SMT support yet, hence we should not find a doorbell
message generated
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kvm/book3s_emulate.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/powerpc/kvm/book3s_emulate.c
b/arch/powerpc/kvm/book3s_emulate.c
index 1bb16a59dcbc..d6c87d085182 100644
--- a/arch/powerpc/kvm/book3s_emulate.c
+++ b/arch/powerpc/kvm/book3s_emulate.c
@@ -28,7 +28,9 @@
#define OP_19_XOP_RFI50
#define OP_31_XOP_MFMSR83
+#define OP_31_XOP_MSGSNDP142
#define OP_31_XOP_MTMSR146
+#define OP_31_XOP_MSGCLRP174
#define OP_31_XOP_MTMSRD178
#define OP_31_XOP_MTSR210
#define OP_31_XOP_MTSRIN242
@@ -303,6 +305,22 @@ int kvmppc_core_emulate_op_pr(struct kvm_run
*run, struct kvm_vcpu *vcpu,
break;
}
+case OP_31_XOP_MSGSNDP:
+{
+/*
+ * PR KVM still don't support SMT mode. So we should
still?
+ * not see a MSGSNDP/MSGCLRP used with PR KVM
+ */
+pr_info(KVM: MSGSNDP used in non SMT case\n);
+emulated = EMULATE_FAIL;
What would happen on an HV guest with only 1 thread that MSGSNDs to
thread 0? Would the guest get an illegal instruction trap, a
self-interrupt or would this be a simple nop?
What I'm trying to say here is that it's ok to treat it as illegal
instructions, but then we don't need this patch :).
Alex
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Re: [PATCH 2/4] KVM: PPC: BOOK3S: PR: Doorbell support
Alexander Graf ag...@suse.de writes:
On 05.06.14 14:21, Alexander Graf wrote:
On 05.06.14 14:08, Aneesh Kumar K.V wrote:
We don't have SMT support yet, hence we should not find a doorbell
message generated
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kvm/book3s_emulate.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/powerpc/kvm/book3s_emulate.c
b/arch/powerpc/kvm/book3s_emulate.c
index 1bb16a59dcbc..d6c87d085182 100644
--- a/arch/powerpc/kvm/book3s_emulate.c
+++ b/arch/powerpc/kvm/book3s_emulate.c
@@ -28,7 +28,9 @@
#define OP_19_XOP_RFI50
#define OP_31_XOP_MFMSR83
+#define OP_31_XOP_MSGSNDP142
#define OP_31_XOP_MTMSR146
+#define OP_31_XOP_MSGCLRP174
#define OP_31_XOP_MTMSRD178
#define OP_31_XOP_MTSR210
#define OP_31_XOP_MTSRIN242
@@ -303,6 +305,22 @@ int kvmppc_core_emulate_op_pr(struct kvm_run
*run, struct kvm_vcpu *vcpu,
break;
}
+case OP_31_XOP_MSGSNDP:
+{
+/*
+ * PR KVM still don't support SMT mode. So we should
still?
+ * not see a MSGSNDP/MSGCLRP used with PR KVM
+ */
+pr_info(KVM: MSGSNDP used in non SMT case\n);
+emulated = EMULATE_FAIL;
What would happen on an HV guest with only 1 thread that MSGSNDs to
thread 0? Would the guest get an illegal instruction trap, a
self-interrupt or would this be a simple nop?
What I'm trying to say here is that it's ok to treat it as illegal
instructions, but then we don't need this patch :).
Agreed. I will verify whether it is treated as a nop. If so will send an
updated patch.
-aneesh
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