Re: [PATCH v6 08/23] irqchip/gic-v4.1: Plumb skeletal VSGI irqchip

2020-03-24 Thread Marc Zyngier
On Tue, 24 Mar 2020 10:27:18 +0800
Zenghui Yu  wrote:

> On 2020/3/21 2:23, Marc Zyngier wrote:
> > +static int its_sgi_set_affinity(struct irq_data *d,
> > +   const struct cpumask *mask_val,
> > +   bool force)
> > +{
> > +   /*
> > +* There is no notion of affinity for virtual SGIs, at least
> > +* not on the host (since they can only be targetting a vPE).
> > +* Tell the kernel we've done whetever it asked for.  
> 
> new typo?
> s/whetever/whatever/

Yeah, I'm that good... :-(.

Fixed now.

M.
-- 
Jazz is not dead. It just smells funny...
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Re: [PATCH v6 08/23] irqchip/gic-v4.1: Plumb skeletal VSGI irqchip

2020-03-23 Thread Zenghui Yu

On 2020/3/21 2:23, Marc Zyngier wrote:

+static int its_sgi_set_affinity(struct irq_data *d,
+   const struct cpumask *mask_val,
+   bool force)
+{
+   /*
+* There is no notion of affinity for virtual SGIs, at least
+* not on the host (since they can only be targetting a vPE).
+* Tell the kernel we've done whetever it asked for.


new typo?
s/whetever/whatever/


+*/
+   return IRQ_SET_MASK_OK;
+}



Thanks,
Zenghui

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[PATCH v6 08/23] irqchip/gic-v4.1: Plumb skeletal VSGI irqchip

2020-03-20 Thread Marc Zyngier
Since GICv4.1 has the capability to inject 16 SGIs into each VPE,
and that I'm keen not to invent too many specific interfaces to
manipulate these interrupts, let's pretend that each of these SGIs
is an actual Linux interrupt.

For that matter, let's introduce a minimal irqchip and irqdomain
setup that will get fleshed up in the following patches.

Signed-off-by: Marc Zyngier 
Reviewed-by: Zenghui Yu 
Reviewed-by: Eric Auger 
Link: https://lore.kernel.org/r/20200304203330.4967-9-...@kernel.org
---
 drivers/irqchip/irq-gic-v3-its.c   | 75 +-
 drivers/irqchip/irq-gic-v4.c   |  8 +++-
 include/linux/irqchip/arm-gic-v4.h |  9 +++-
 3 files changed, 88 insertions(+), 4 deletions(-)

diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 54d6fdf7a28e..8313c3a871a9 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -3870,6 +3870,72 @@ static struct irq_chip its_vpe_4_1_irq_chip = {
.irq_set_vcpu_affinity  = its_vpe_4_1_set_vcpu_affinity,
 };
 
+static int its_sgi_set_affinity(struct irq_data *d,
+   const struct cpumask *mask_val,
+   bool force)
+{
+   /*
+* There is no notion of affinity for virtual SGIs, at least
+* not on the host (since they can only be targetting a vPE).
+* Tell the kernel we've done whetever it asked for.
+*/
+   return IRQ_SET_MASK_OK;
+}
+
+static struct irq_chip its_sgi_irq_chip = {
+   .name   = "GICv4.1-sgi",
+   .irq_set_affinity   = its_sgi_set_affinity,
+};
+
+static int its_sgi_irq_domain_alloc(struct irq_domain *domain,
+   unsigned int virq, unsigned int nr_irqs,
+   void *args)
+{
+   struct its_vpe *vpe = args;
+   int i;
+
+   /* Yes, we do want 16 SGIs */
+   WARN_ON(nr_irqs != 16);
+
+   for (i = 0; i < 16; i++) {
+   vpe->sgi_config[i].priority = 0;
+   vpe->sgi_config[i].enabled = false;
+   vpe->sgi_config[i].group = false;
+
+   irq_domain_set_hwirq_and_chip(domain, virq + i, i,
+ &its_sgi_irq_chip, vpe);
+   irq_set_status_flags(virq + i, IRQ_DISABLE_UNLAZY);
+   }
+
+   return 0;
+}
+
+static void its_sgi_irq_domain_free(struct irq_domain *domain,
+   unsigned int virq,
+   unsigned int nr_irqs)
+{
+   /* Nothing to do */
+}
+
+static int its_sgi_irq_domain_activate(struct irq_domain *domain,
+  struct irq_data *d, bool reserve)
+{
+   return 0;
+}
+
+static void its_sgi_irq_domain_deactivate(struct irq_domain *domain,
+ struct irq_data *d)
+{
+   /* Nothing to do */
+}
+
+static const struct irq_domain_ops its_sgi_domain_ops = {
+   .alloc  = its_sgi_irq_domain_alloc,
+   .free   = its_sgi_irq_domain_free,
+   .activate   = its_sgi_irq_domain_activate,
+   .deactivate = its_sgi_irq_domain_deactivate,
+};
+
 static int its_vpe_id_alloc(void)
 {
return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL);
@@ -4912,8 +4978,15 @@ int __init its_init(struct fwnode_handle *handle, struct 
rdists *rdists,
rdists->has_rvpeid = false;
 
if (has_v4 & rdists->has_vlpis) {
+   const struct irq_domain_ops *sgi_ops;
+
+   if (has_v4_1)
+   sgi_ops = &its_sgi_domain_ops;
+   else
+   sgi_ops = NULL;
+
if (its_init_vpe_domain() ||
-   its_init_v4(parent_domain, &its_vpe_domain_ops)) {
+   its_init_v4(parent_domain, &its_vpe_domain_ops, sgi_ops)) {
rdists->has_vlpis = false;
pr_err("ITS: Disabling GICv4 support\n");
}
diff --git a/drivers/irqchip/irq-gic-v4.c b/drivers/irqchip/irq-gic-v4.c
index 45969927cc81..c01910d53f9e 100644
--- a/drivers/irqchip/irq-gic-v4.c
+++ b/drivers/irqchip/irq-gic-v4.c
@@ -85,6 +85,7 @@
 
 static struct irq_domain *gic_domain;
 static const struct irq_domain_ops *vpe_domain_ops;
+static const struct irq_domain_ops *sgi_domain_ops;
 
 int its_alloc_vcpu_irqs(struct its_vm *vm)
 {
@@ -216,12 +217,15 @@ int its_prop_update_vlpi(int irq, u8 config, bool inv)
return irq_set_vcpu_affinity(irq, &info);
 }
 
-int its_init_v4(struct irq_domain *domain, const struct irq_domain_ops *ops)
+int its_init_v4(struct irq_domain *domain,
+   const struct irq_domain_ops *vpe_ops,
+   const struct irq_domain_ops *sgi_ops)
 {
if (domain) {
pr_info("ITS: Enabling GICv4 support\n");
gic_domain = domain;
-   vpe_domain_ops = ops;
+   vpe_domain_ops = v