Re: [PATCH V2] arm64/cpufeature: Drop open encodings while extracting parange
On Wed, 13 May 2020 14:33:34 +0530, Anshuman Khandual wrote: > Currently there are multiple instances of parange feature width mask open > encodings while fetching it's value. Even the width mask value (0x7) itself > is not accurate. It should be (0xf) per ID_AA64MMFR0_EL1.PARange[3:0] as in > ARM ARM (0487F.a). Replace them with cpuid_feature_extract_unsigned_field() > which can extract given standard feature (4 bits width i.e 0xf mask) field. > > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Marc Zyngier > Cc: James Morse > Cc: kvmarm@lists.cs.columbia.edu > Cc: linux-arm-ker...@lists.infradead.org > Cc: linux-ker...@vger.kernel.org Applied to arm64 (for-next/cpufeature), thanks! [1/1] arm64/cpufeature: Drop open encodings while extracting parange https://git.kernel.org/arm64/c/f73531f0257f Cheers, -- Will https://fixes.arm64.dev https://next.arm64.dev https://will.arm64.dev ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
Re: [PATCH V2] arm64/cpufeature: Drop open encodings while extracting parange
On Wed, 13 May 2020 14:33:34 +0530 Anshuman Khandual wrote: > Currently there are multiple instances of parange feature width mask open > encodings while fetching it's value. Even the width mask value (0x7) itself > is not accurate. It should be (0xf) per ID_AA64MMFR0_EL1.PARange[3:0] as in > ARM ARM (0487F.a). Replace them with cpuid_feature_extract_unsigned_field() > which can extract given standard feature (4 bits width i.e 0xf mask) field. > > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Marc Zyngier > Cc: James Morse > Cc: kvmarm@lists.cs.columbia.edu > Cc: linux-arm-ker...@lists.infradead.org > Cc: linux-ker...@vger.kernel.org > > Signed-off-by: Anshuman Khandual Acked-by: Marc Zyngier M. -- Jazz is not dead. It just smells funny... ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
Re: [PATCH V2] arm64/cpufeature: Drop open encodings while extracting parange
On Mon, 18 May 2020 18:09:34 +0100, Will Deacon wrote: > > On Mon, May 18, 2020 at 05:59:59PM +0100, Will Deacon wrote: > > On Wed, May 13, 2020 at 02:33:34PM +0530, Anshuman Khandual wrote: > > > Currently there are multiple instances of parange feature width mask open > > > encodings while fetching it's value. Even the width mask value (0x7) > > > itself > > > is not accurate. It should be (0xf) per ID_AA64MMFR0_EL1.PARange[3:0] as > > > in > > > ARM ARM (0487F.a). Replace them with > > > cpuid_feature_extract_unsigned_field() > > > which can extract given standard feature (4 bits width i.e 0xf mask) > > > field. > > > > > > Cc: Catalin Marinas > > > Cc: Will Deacon > > > Cc: Marc Zyngier > > > Cc: James Morse > > > Cc: kvmarm@lists.cs.columbia.edu > > > Cc: linux-arm-ker...@lists.infradead.org > > > Cc: linux-ker...@vger.kernel.org > > > > > > Signed-off-by: Anshuman Khandual > > > --- > > > Changes in V2: > > > > > > - Used cpuid_feature_extract_unsigned_field() per Mark > > > > > > Changes in V1: (https://patchwork.kernel.org/patch/11541913/) > > > > > > arch/arm64/kernel/cpufeature.c | 3 ++- > > > arch/arm64/kvm/reset.c | 11 --- > > > 2 files changed, 10 insertions(+), 4 deletions(-) > > > > Acked-by: Will Deacon > > > > I'm assuming Marc will take this, but let me know if it should go via arm64 > > instead (where we have a bunch of other cpufeature stuff queued). > > Hmm, but having just spotted [1], it looks like we might need a bit of > co-ordination here. Marc? Yeah, there is a clear dependency between the two. I'm happy to take both patches via the KVM tree, or to have a shared branch with the arm64 tree (we already have one for Andrew's generic AT patch). Just let me know, M. -- Without deviation from the norm, progress is not possible. ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
Re: [PATCH V2] arm64/cpufeature: Drop open encodings while extracting parange
On Mon, May 18, 2020 at 05:59:59PM +0100, Will Deacon wrote: > On Wed, May 13, 2020 at 02:33:34PM +0530, Anshuman Khandual wrote: > > Currently there are multiple instances of parange feature width mask open > > encodings while fetching it's value. Even the width mask value (0x7) itself > > is not accurate. It should be (0xf) per ID_AA64MMFR0_EL1.PARange[3:0] as in > > ARM ARM (0487F.a). Replace them with cpuid_feature_extract_unsigned_field() > > which can extract given standard feature (4 bits width i.e 0xf mask) field. > > > > Cc: Catalin Marinas > > Cc: Will Deacon > > Cc: Marc Zyngier > > Cc: James Morse > > Cc: kvmarm@lists.cs.columbia.edu > > Cc: linux-arm-ker...@lists.infradead.org > > Cc: linux-ker...@vger.kernel.org > > > > Signed-off-by: Anshuman Khandual > > --- > > Changes in V2: > > > > - Used cpuid_feature_extract_unsigned_field() per Mark > > > > Changes in V1: (https://patchwork.kernel.org/patch/11541913/) > > > > arch/arm64/kernel/cpufeature.c | 3 ++- > > arch/arm64/kvm/reset.c | 11 --- > > 2 files changed, 10 insertions(+), 4 deletions(-) > > Acked-by: Will Deacon > > I'm assuming Marc will take this, but let me know if it should go via arm64 > instead (where we have a bunch of other cpufeature stuff queued). Hmm, but having just spotted [1], it looks like we might need a bit of co-ordination here. Marc? Will [1] https://lore.kernel.org/r/1589248647-22925-1-git-send-email-anshuman.khand...@arm.com ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
Re: [PATCH V2] arm64/cpufeature: Drop open encodings while extracting parange
On Wed, May 13, 2020 at 02:33:34PM +0530, Anshuman Khandual wrote: > Currently there are multiple instances of parange feature width mask open > encodings while fetching it's value. Even the width mask value (0x7) itself > is not accurate. It should be (0xf) per ID_AA64MMFR0_EL1.PARange[3:0] as in > ARM ARM (0487F.a). Replace them with cpuid_feature_extract_unsigned_field() > which can extract given standard feature (4 bits width i.e 0xf mask) field. > > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Marc Zyngier > Cc: James Morse > Cc: kvmarm@lists.cs.columbia.edu > Cc: linux-arm-ker...@lists.infradead.org > Cc: linux-ker...@vger.kernel.org > > Signed-off-by: Anshuman Khandual > --- > Changes in V2: > > - Used cpuid_feature_extract_unsigned_field() per Mark > > Changes in V1: (https://patchwork.kernel.org/patch/11541913/) > > arch/arm64/kernel/cpufeature.c | 3 ++- > arch/arm64/kvm/reset.c | 11 --- > 2 files changed, 10 insertions(+), 4 deletions(-) Acked-by: Will Deacon I'm assuming Marc will take this, but let me know if it should go via arm64 instead (where we have a bunch of other cpufeature stuff queued). Will ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
