Re: What -mfpu option is used with neon, vfpv3 and vfpd32 flag?

[Jeffrey Walton]

On Fri, Jul 22, 2016 at 12:19 AM, Jim Wilson  wrote:
> On Thu, Jul 21, 2016 at 9:13 PM, Jeffrey Walton  wrote:
>> So I guess the question is, what do I use for -mfpu=neon-vfp3 (or
>> -mfpu=neon-vfp3-d32)? Is -mfpu=neon enough?
>
> The -mfpu=neon option is enough.  neon implies vfpv3 and 32 D registers.

Perfect, thanks.

Jeff
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Re: What -mfpu option is used with neon, vfpv3 and vfpd32 flag?

[Jim Wilson]

On Thu, Jul 21, 2016 at 9:13 PM, Jeffrey Walton  wrote:
> So I guess the question is, what do I use for -mfpu=neon-vfp3 (or
> -mfpu=neon-vfp3-d32)? Is -mfpu=neon enough?

The -mfpu=neon option is enough.  neon implies vfpv3 and 32 D registers.

Jim
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Re: What -mfpu option is used with neon, vfpv3 and vfpd32 flag?

[Jim Wilson]

On Thu, Jul 21, 2016 at 8:48 PM, Jeffrey Walton  wrote:
> Is there an arm-msr-tools or similar that has setuid so we can access the 
> MSRs?

I'm not familiar with any such tool, but I haven't looked for one
before.  I found an x86 msr-tools project at github with a web search.
It seems to be a standard part of debian/ubuntu x86 distros.  I don't
see an obvious arm equivalent.

You could ask the kernel developers to add a hardware capability
(hwcap) check for half-precision fp and emit that info into the
/proc/cpuinfo file, though it would take a while for that to be
implemented and propagate to your users.

Jim
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Re: What -mfpu option is used with neon, vfpv3 and vfpd32 flag?

[Jeffrey Walton]

On Thu, Jul 21, 2016 at 11:30 PM, Jim Wilson  wrote:
> On Thu, Jul 21, 2016 at 6:33 PM, Jeffrey Walton  wrote:
>> I think vfpd32 cpu flag means I have 32 D-registers. The cpu flags
>> neon and vfpv3 flags means I want something more than -mfpu=neon-fp16,
>> but I'm not sure what that is.
>
> neon implies vfvp3 and 32 D-registers and asimd/neon support, so that
> part is correct.  it isn't obvious to me if you have the
> half-precision float support.  The "half" printed by the kernel means
> that half-word loads are supported, which is only false for some
> obsolete parts I think.  The kernel doesn't appear to be checking to
> see if the hardware has half-precision float support or not, so you
> can't determine that from /proc/cpuinfo.

OK, so looking at
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dht0002a/ch01s03s02.html,
it appears the "minimum" of the -mfpu option is VFPv3-D16. Since I
have 32 D-regs, I can use the one VFPv3-D32, which should equate to
-mfpu=neon-vfp3 (which does not seem to exist).

I can't use -mfpu=neon-vfpv4 because vfpv4 is not signaled, and it
could be missing the half word and fma extensions implied with vfpv4.

So I guess the question is, what do I use for -mfpu=neon-vfp3 (or
-mfpu=neon-vfp3-d32)? Is -mfpu=neon enough?

Thanks again for the help with this.
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Re: What -mfpu option is used with neon, vfpv3 and vfpd32 flag?

[Jeffrey Walton]

On Thu, Jul 21, 2016 at 11:30 PM, Jim Wilson  wrote:
> On Thu, Jul 21, 2016 at 6:33 PM, Jeffrey Walton  wrote:
>> I think vfpd32 cpu flag means I have 32 D-registers. The cpu flags
>> neon and vfpv3 flags means I want something more than -mfpu=neon-fp16,
>> but I'm not sure what that is.
>
> neon implies vfvp3 and 32 D-registers and asimd/neon support, so that
> part is correct.  it isn't obvious to me if you have the
> half-precision float support.  The "half" printed by the kernel means
> that half-word loads are supported, which is only false for some
> obsolete parts I think.  The kernel doesn't appear to be checking to
> see if the hardware has half-precision float support or not, so you
> can't determine that from /proc/cpuinfo.

Thanks Jim.

Is there an arm-msr-tools or similar that has setuid so we can access the MSRs?

My thinking is, I can tell people to install arm-msr-tools so we can
query for the features directly. I want to avoid telling people to run
a test script as root.

Jeff
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Re: What -mfpu option is used with neon, vfpv3 and vfpd32 flag?

[Jim Wilson]

On Thu, Jul 21, 2016 at 6:33 PM, Jeffrey Walton  wrote:
> I think vfpd32 cpu flag means I have 32 D-registers. The cpu flags
> neon and vfpv3 flags means I want something more than -mfpu=neon-fp16,
> but I'm not sure what that is.

neon implies vfvp3 and 32 D-registers and asimd/neon support, so that
part is correct.  it isn't obvious to me if you have the
half-precision float support.  The "half" printed by the kernel means
that half-word loads are supported, which is only false for some
obsolete parts I think.  The kernel doesn't appear to be checking to
see if the hardware has half-precision float support or not, so you
can't determine that from /proc/cpuinfo.

Jim
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What -mfpu option is used with neon, vfpv3 and vfpd32 flag?

[Jeffrey Walton]

Hi Everyone,

I'm looking at the features of a BeagleBone Black. Its /proc/cpuinfo is below.

I think vfpd32 cpu flag means I have 32 D-registers. The cpu flags
neon and vfpv3 flags means I want something more than -mfpu=neon-fp16,
but I'm not sure what that is.

My question is, what GCC ARM option is used when we encounter the
neon, vfpv3 and vfpd32 flags?

Thanks in advance.

**

$ cat /proc/cpuinfo
processor: 0
model name: ARMv7 Processor rev 2 (v7l)
BogoMIPS: 996.14
Features: half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpd32
CPU implementer: 0x41
CPU architecture: 7
CPU variant: 0x3
CPU part: 0xc08
CPU revision: 2

Hardware: Generic AM33XX (Flattened Device Tree)
Revision: 
Serial: 
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Re: -mfpu=neon-fp-armv8 and unrecognized command line option

[Jim Wilson]

On Thu, Jul 21, 2016 at 1:53 AM, Richard Earnshaw
 wrote:
> On 20/07/16 22:33, Jim Wilson wrote:
>> On Wed, Jul 20, 2016 at 2:14 PM, Jeffrey Walton  wrote:
>>> I'm having trouble with ARMv8/Aarch64. One is an early Mustang server
>>
>> ARMv8 implies 32-bit code (aarch32).  Aaarch64 implies 64-bit code.
>> These are two different compilers, with two different sets of command
>> line options.
>
> Er, no.  ARMv8 (pedantically ARMv8-A, since there are also ARMv8-R and
> ARMv8-M specifications as well) is an architecture, not an ISA.

I think you are confusing the issue.  We are talking about gcc here,
not ARM documentation.  In gcc, arm* means 32-bit code.  An
armv8-linux-gnu compiler is a 32-bit compiler.  If I run uname -a, and
see armv8a, I have a 32-bit user space.  Etc.

The original poster is well aware that ARMv8 is an architecture, with
32-bit and 64-bti execution modes.  What he wasn't aware of was that
the arm and aarch64 compilers are separate, and that if someone
mentions an armv8 compiler on a gcc mailing list, then they are
talking about the 32-bit arm* compiler, not the 64-bit aarch64
compiler.

I did mention that both the arm and aarch64 compilers can emit ARMv8
architecture code.

Jim
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Re: -mfpu=neon-fp-armv8 and unrecognized command line option

[Richard Earnshaw]

On 20/07/16 22:33, Jim Wilson wrote:
> On Wed, Jul 20, 2016 at 2:14 PM, Jeffrey Walton  wrote:
>> I'm having trouble with ARMv8/Aarch64. One is an early Mustang server
>
> ARMv8 implies 32-bit code (aarch32).  Aaarch64 implies 64-bit code.
> These are two different compilers, with two different sets of command
> line options.

Er, no.  ARMv8 (pedantically ARMv8-A, since there are also ARMv8-R and
ARMv8-M specifications as well) is an architecture, not an ISA.  The
ARMv8 architecture defines two execution modes: AArch32 and AArch64.
The AArch32 execution mode further has to states with separate ISAs: A32
and T32, more traditionally known as ARM and Thumb states.

GCC has two separate compilers for ARMv8.  One handles the AArch32
execution mode (configurations based arm-*-* for legacy reasons)  and
the other AArch64 (configurations based on aarch64-*-*).

The -mfpu option only applies to the AArch32 compiler.

R.

>
>> $ g++ -DDEBUG -g3 -O0 -mfpu=neon-fp-armv8 -fPIC -pipe -c cryptlib.cpp
>> g++: error: unrecognized command line option ‘-mfpu=neon-fp-armv8’
>> GNUmakefile:753: recipe for target 'cryptlib.o' failed
>
> -mfpu=neon-fp-armv8 is an arm (32-bit) compiler option.  The aarch64
> (64-bit) compiler will not accept it.
>
> Because FP and Neon support is optional in the 32-bit arm
> architecture, there are compiler options to enable fp and/or neon
> support.  Usually FP support is enabled by default for a linux distro,
> but the neon support usually is not, and you can enable neon by using
> this -mcpu=neon-fp-armv8 option if running 32-bit code on an ARMv8
> architecture part.
>
> Meanwhile, the aarch64 spec requires FP and ASIMD instruction support
> in the linux ABI, so there are no options to enable them, they are on
> by default.  If you really want to disable them, you can do so by
> using a -march= option, e.g. -march=aarch64+fp+simd enables them, and
> -march=aarch64+nofp+nosimd disables them.  However, if you disable fp
> support, you will break the ABI, and your code may not compile or run,
> so don't do that unless perhaps you have an embedded target, and have
> your own OS build and your own ABI. or no code that uses FP  You can
> also enable/.disable crc (crypto) support this way, but a better way
> is to use a -mcpu= option, and let gcc figure out if the target has
> crc instructions.
>
> See the aarch64 compiler docs here
> https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html#AArch64-Options
>
> Jim
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