Re: [ACTIVITY] 04 May -- 08 May

2015-05-10 Thread Kugan


On 11/05/15 15:54, Pinski, Andrew wrote:
> It would be best to file a bug in glibc then and fix it there.

I agree. Let me see if it is present in the trunk as well and file a
bug-report.

Thanks,
Kugan

> 
> From: Kugan 
> Sent: Sunday, May 10, 2015 10:46 PM
> To: Pinski, Andrew; Linaro Toolchain
> Subject: Re: [ACTIVITY] 04 May -- 08 May
> 
> On 11/05/15 15:24, Pinski, Andrew wrote:
>>> - Trunk is broken and narrowed down the failure to
>>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66066
>>
>> No the code is broken in SPEC ;).  SPEC INT has been known to be broken C 
>> and they are not willing to do anything about it after the fact.  This has 
>> been true for all versions of SPEC and one of the reason why we use 
>> -fno-strict-aliasing in some cases.
> 
> Hi Andrew,
> 
> Yes, I understand that this is non complaint code. Unfortunately it is
> not the SPEC code but the code  which is part of the gcc/glibc that is
> showing this. I ran into this when I built the cross toolchain for
> aarch64. I am sure that we are going to have this in tones of places.
> 
> Thanks,
> Kugan
> 
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Re: [ACTIVITY] 04 May -- 08 May

2015-05-10 Thread Pinski, Andrew
It would be best to file a bug in glibc then and fix it there.


From: Kugan 
Sent: Sunday, May 10, 2015 10:46 PM
To: Pinski, Andrew; Linaro Toolchain
Subject: Re: [ACTIVITY] 04 May -- 08 May

On 11/05/15 15:24, Pinski, Andrew wrote:
>> - Trunk is broken and narrowed down the failure to
>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66066
>
> No the code is broken in SPEC ;).  SPEC INT has been known to be broken C and 
> they are not willing to do anything about it after the fact.  This has been 
> true for all versions of SPEC and one of the reason why we use 
> -fno-strict-aliasing in some cases.

Hi Andrew,

Yes, I understand that this is non complaint code. Unfortunately it is
not the SPEC code but the code  which is part of the gcc/glibc that is
showing this. I ran into this when I built the cross toolchain for
aarch64. I am sure that we are going to have this in tones of places.

Thanks,
Kugan
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Re: [ACTIVITY] 04 May -- 08 May

2015-05-10 Thread Kugan


On 11/05/15 15:24, Pinski, Andrew wrote:
>> - Trunk is broken and narrowed down the failure to
>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66066
> 
> No the code is broken in SPEC ;).  SPEC INT has been known to be broken C and 
> they are not willing to do anything about it after the fact.  This has been 
> true for all versions of SPEC and one of the reason why we use 
> -fno-strict-aliasing in some cases.

Hi Andrew,

Yes, I understand that this is non complaint code. Unfortunately it is
not the SPEC code but the code  which is part of the gcc/glibc that is
showing this. I ran into this when I built the cross toolchain for
aarch64. I am sure that we are going to have this in tones of places.

Thanks,
Kugan
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Re: [ACTIVITY] 04 May -- 08 May

2015-05-10 Thread Pinski, Andrew
> - Trunk is broken and narrowed down the failure to
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66066

No the code is broken in SPEC ;).  SPEC INT has been known to be broken C and 
they are not willing to do anything about it after the fact.  This has been 
true for all versions of SPEC and one of the reason why we use 
-fno-strict-aliasing in some cases.




From: linaro-toolchain  on behalf of 
Kugan 
Sent: Sunday, May 10, 2015 9:28 PM
To: Linaro Toolchain
Subject: [ACTIVITY] 04 May -- 08 May

== Progress ==
* Upstream GCC (4/10)
 - TCWG-779 Vector rtx costs for AArch64 ACKed to commit.
 - Asked to do fresh regression and benchmarking
 - re-based to latest trunk
 - Trunk is broken and narrowed down the failure to
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66066
 - Fixed and regression testing finished. Setting up benchmarking for
spec2k before committing.


* IRA (5/10)
 - Looked at https://bugs.linaro.org/show_bug.cgi?id=540 (TCWG-773
Median of three has unneeded register moves)
 - https://bugs.linaro.org/show_bug.cgi?id=1532

* Misc (1/10)
 - gcc-patches, gcc-bugs list
 - Meetings

== Plan ==
- Continue with gcc stage1 activities
- Look at register allocation
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