Re: [PATCH v2] crypto: algif_hash - Only export and import on sockets with data
On Thu, Nov 05, 2015 at 01:12:04PM +0530, Harsh Jain wrote: > Hi herbert, > > Which kernel versions will have this patch? It has to go into 4.4 first before it gets backported. Cheers, -- Email: Herbert XuHome Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3] keys, trusted: select hash algorithm for TPM2 chips
Added 'hash=' option for selecting the hash algorithm for add_key() syscall and documentation for it. Added entry for sm3-256 to the following tables in order to support TPM_ALG_SM3_256: * hash_algo_name * hash_digest_size Includes support for the following hash algorithms: * sha1 * sha256 * sha384 * sha512 * sm3-256 v2: * Added the missing dependency to CRYPTO_HASH_INFO v3: * Squashed patches into a single patch as the commits did not make alone any sense. * Added a klog message when TPM 1.x is used for sealing and other than SHA-1 is used as the hash algorithm. * Got rid of TPM2_HASH_COUNT and moved into ARRAY_SIZE(tpm2_hash_map). Signed-off-by: Jarkko Sakkinen--- Documentation/security/keys-trusted-encrypted.txt | 3 ++ crypto/hash_info.c| 2 ++ drivers/char/tpm/tpm.h| 10 -- drivers/char/tpm/tpm2-cmd.c | 40 +-- include/crypto/hash_info.h| 3 ++ include/keys/trusted-type.h | 1 + include/uapi/linux/hash_info.h| 1 + security/keys/Kconfig | 1 + security/keys/trusted.c | 23 - 9 files changed, 77 insertions(+), 7 deletions(-) diff --git a/Documentation/security/keys-trusted-encrypted.txt b/Documentation/security/keys-trusted-encrypted.txt index e105ae9..fd2565b 100644 --- a/Documentation/security/keys-trusted-encrypted.txt +++ b/Documentation/security/keys-trusted-encrypted.txt @@ -38,6 +38,9 @@ Usage: pcrlock= pcr number to be extended to "lock" blob migratable= 0|1 indicating permission to reseal to new PCR values, default 1 (resealing allowed) + hash= hash algorithm name as a string. For TPM 1.x the only + allowed value is sha1. For TPM 2.x the allowed values + are sha1, sha256, sha384, sha512 and sm3-256. "keyctl print" returns an ascii hex copy of the sealed key, which is in standard TPM_STORED_DATA format. The key length for new keys are always in bytes. diff --git a/crypto/hash_info.c b/crypto/hash_info.c index 3e7ff46..7b1e0b1 100644 --- a/crypto/hash_info.c +++ b/crypto/hash_info.c @@ -31,6 +31,7 @@ const char *const hash_algo_name[HASH_ALGO__LAST] = { [HASH_ALGO_TGR_128] = "tgr128", [HASH_ALGO_TGR_160] = "tgr160", [HASH_ALGO_TGR_192] = "tgr192", + [HASH_ALGO_SM3_256] = "sm3-256", }; EXPORT_SYMBOL_GPL(hash_algo_name); @@ -52,5 +53,6 @@ const int hash_digest_size[HASH_ALGO__LAST] = { [HASH_ALGO_TGR_128] = TGR128_DIGEST_SIZE, [HASH_ALGO_TGR_160] = TGR160_DIGEST_SIZE, [HASH_ALGO_TGR_192] = TGR192_DIGEST_SIZE, + [HASH_ALGO_SM3_256] = SM3256_DIGEST_SIZE, }; EXPORT_SYMBOL_GPL(hash_digest_size); diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h index a4257a3..cdd49cd 100644 --- a/drivers/char/tpm/tpm.h +++ b/drivers/char/tpm/tpm.h @@ -83,16 +83,20 @@ enum tpm2_structures { }; enum tpm2_return_codes { - TPM2_RC_INITIALIZE = 0x0100, - TPM2_RC_TESTING = 0x090A, + TPM2_RC_HASH= 0x0083, /* RC_FMT1 */ + TPM2_RC_INITIALIZE = 0x0100, /* RC_VER1 */ TPM2_RC_DISABLED= 0x0120, + TPM2_RC_TESTING = 0x090A, /* RC_WARN */ }; enum tpm2_algorithms { TPM2_ALG_SHA1 = 0x0004, TPM2_ALG_KEYEDHASH = 0x0008, TPM2_ALG_SHA256 = 0x000B, - TPM2_ALG_NULL = 0x0010 + TPM2_ALG_SHA384 = 0x000C, + TPM2_ALG_SHA512 = 0x000D, + TPM2_ALG_NULL = 0x0010, + TPM2_ALG_SM3_256= 0x0012, }; enum tpm2_command_codes { diff --git a/drivers/char/tpm/tpm2-cmd.c b/drivers/char/tpm/tpm2-cmd.c index bd7039f..3acc7b5 100644 --- a/drivers/char/tpm/tpm2-cmd.c +++ b/drivers/char/tpm/tpm2-cmd.c @@ -16,6 +16,7 @@ */ #include "tpm.h" +#include #include enum tpm2_object_attributes { @@ -104,6 +105,19 @@ struct tpm2_cmd { union tpm2_cmd_params params; } __packed; +struct tpm2_hash { + unsigned int crypto_id; + unsigned int tpm_id; +}; + +static struct tpm2_hash tpm2_hash_map[] = { + {HASH_ALGO_SHA1, TPM2_ALG_SHA1}, + {HASH_ALGO_SHA256, TPM2_ALG_SHA256}, + {HASH_ALGO_SHA384, TPM2_ALG_SHA384}, + {HASH_ALGO_SHA512, TPM2_ALG_SHA512}, + {HASH_ALGO_SM3_256, TPM2_ALG_SM3_256}, +}; + /* * Array with one entry per ordinal defining the maximum amount * of time the chip could take to return the result. The values @@ -429,8 +443,24 @@ int tpm2_seal_trusted(struct tpm_chip *chip, { unsigned int blob_len; struct tpm_buf buf; + u32 hash = TPM2_ALG_SHA256; + int i; int rc; + if (options->hash) { + for (i = 0; i < ARRAY_SIZE(tpm2_hash_map); i++) { +
Re: [PATCH] crypto: sun4i-ss: add missing statesize
Hi, On Thu, Nov 05, 2015 at 08:48:57AM +0100, LABBE Corentin wrote: > sun4i-ss implementaton of md5/sha1 is via ahash algorithms. > A recent change make impossible to load them without giving statesize. Which one? > This patch specifiy statesize for sha1 and md5. > > Signed-off-by: LABBE Corentin> Cc: sta...@vger.kernel.org Please also add a Fixes tag (and the stable version it applies to). Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature
Re: [PATCH v3] keys, trusted: select hash algorithm for TPM2 chips
Hi Jarkko, [auto build test ERROR on: security/next] [also build test ERROR on: next-20151105] [cannot apply to: v4.3] url: https://github.com/0day-ci/linux/commits/Jarkko-Sakkinen/keys-trusted-select-hash-algorithm-for-TPM2-chips/20151106-010236 base: https://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security.git next config: x86_64-randconfig-s4-11060055 (attached as .config) reproduce: # save the attached .config to linux build tree make ARCH=x86_64 All errors (new ones prefixed by >>): >> ERROR: "hash_algo_name" [drivers/char/tpm/tpm.ko] undefined! --- 0-DAY kernel test infrastructureOpen Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation .config.gz Description: Binary data
[PATCH v4] keys, trusted: select hash algorithm for TPM2 chips
Added 'hash=' option for selecting the hash algorithm for add_key() syscall and documentation for it. Added entry for sm3-256 to the following tables in order to support TPM_ALG_SM3_256: * hash_algo_name * hash_digest_size Includes support for the following hash algorithms: * sha1 * sha256 * sha384 * sha512 * sm3-256 v2: * Added missing select CRYPTO_HASH_INFO in security/keys/Kconfig v3: * Squashed patches into a single patch as the commits did not make alone any sense. * Added a klog message when TPM 1.x is used for sealing and other than SHA-1 is used as the hash algorithm. * Got rid of TPM2_HASH_COUNT and moved into ARRAY_SIZE(tpm2_hash_map). v4: * Added missing select CRYPTO_HASH_INFO in drivers/char/tpm/Kconfig Signed-off-by: Jarkko Sakkinen--- Documentation/security/keys-trusted-encrypted.txt | 3 ++ crypto/hash_info.c| 2 ++ drivers/char/tpm/Kconfig | 1 + drivers/char/tpm/tpm.h| 10 -- drivers/char/tpm/tpm2-cmd.c | 40 +-- include/crypto/hash_info.h| 3 ++ include/keys/trusted-type.h | 1 + include/uapi/linux/hash_info.h| 1 + security/keys/Kconfig | 1 + security/keys/trusted.c | 23 - 10 files changed, 78 insertions(+), 7 deletions(-) diff --git a/Documentation/security/keys-trusted-encrypted.txt b/Documentation/security/keys-trusted-encrypted.txt index e105ae9..fd2565b 100644 --- a/Documentation/security/keys-trusted-encrypted.txt +++ b/Documentation/security/keys-trusted-encrypted.txt @@ -38,6 +38,9 @@ Usage: pcrlock= pcr number to be extended to "lock" blob migratable= 0|1 indicating permission to reseal to new PCR values, default 1 (resealing allowed) + hash= hash algorithm name as a string. For TPM 1.x the only + allowed value is sha1. For TPM 2.x the allowed values + are sha1, sha256, sha384, sha512 and sm3-256. "keyctl print" returns an ascii hex copy of the sealed key, which is in standard TPM_STORED_DATA format. The key length for new keys are always in bytes. diff --git a/crypto/hash_info.c b/crypto/hash_info.c index 3e7ff46..7b1e0b1 100644 --- a/crypto/hash_info.c +++ b/crypto/hash_info.c @@ -31,6 +31,7 @@ const char *const hash_algo_name[HASH_ALGO__LAST] = { [HASH_ALGO_TGR_128] = "tgr128", [HASH_ALGO_TGR_160] = "tgr160", [HASH_ALGO_TGR_192] = "tgr192", + [HASH_ALGO_SM3_256] = "sm3-256", }; EXPORT_SYMBOL_GPL(hash_algo_name); @@ -52,5 +53,6 @@ const int hash_digest_size[HASH_ALGO__LAST] = { [HASH_ALGO_TGR_128] = TGR128_DIGEST_SIZE, [HASH_ALGO_TGR_160] = TGR160_DIGEST_SIZE, [HASH_ALGO_TGR_192] = TGR192_DIGEST_SIZE, + [HASH_ALGO_SM3_256] = SM3256_DIGEST_SIZE, }; EXPORT_SYMBOL_GPL(hash_digest_size); diff --git a/drivers/char/tpm/Kconfig b/drivers/char/tpm/Kconfig index 3b84a8b..bd86261 100644 --- a/drivers/char/tpm/Kconfig +++ b/drivers/char/tpm/Kconfig @@ -6,6 +6,7 @@ menuconfig TCG_TPM tristate "TPM Hardware Support" depends on HAS_IOMEM select SECURITYFS + select CRYPTO_HASH_INFO ---help--- If you have a TPM security chip in your system, which implements the Trusted Computing Group's specification, diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h index a4257a3..cdd49cd 100644 --- a/drivers/char/tpm/tpm.h +++ b/drivers/char/tpm/tpm.h @@ -83,16 +83,20 @@ enum tpm2_structures { }; enum tpm2_return_codes { - TPM2_RC_INITIALIZE = 0x0100, - TPM2_RC_TESTING = 0x090A, + TPM2_RC_HASH= 0x0083, /* RC_FMT1 */ + TPM2_RC_INITIALIZE = 0x0100, /* RC_VER1 */ TPM2_RC_DISABLED= 0x0120, + TPM2_RC_TESTING = 0x090A, /* RC_WARN */ }; enum tpm2_algorithms { TPM2_ALG_SHA1 = 0x0004, TPM2_ALG_KEYEDHASH = 0x0008, TPM2_ALG_SHA256 = 0x000B, - TPM2_ALG_NULL = 0x0010 + TPM2_ALG_SHA384 = 0x000C, + TPM2_ALG_SHA512 = 0x000D, + TPM2_ALG_NULL = 0x0010, + TPM2_ALG_SM3_256= 0x0012, }; enum tpm2_command_codes { diff --git a/drivers/char/tpm/tpm2-cmd.c b/drivers/char/tpm/tpm2-cmd.c index bd7039f..3acc7b5 100644 --- a/drivers/char/tpm/tpm2-cmd.c +++ b/drivers/char/tpm/tpm2-cmd.c @@ -16,6 +16,7 @@ */ #include "tpm.h" +#include #include enum tpm2_object_attributes { @@ -104,6 +105,19 @@ struct tpm2_cmd { union tpm2_cmd_params params; } __packed; +struct tpm2_hash { + unsigned int crypto_id; + unsigned int tpm_id; +}; + +static struct tpm2_hash tpm2_hash_map[] = { + {HASH_ALGO_SHA1, TPM2_ALG_SHA1}, +
[PATCH] hw_random: omap3-rom-rng: convert timer to delayed work
We cannot put the HW RNG to idle using a timer because we cannot disable clocks from atomic context. Use a delayed work instead. Fixes a warning with CONFIG_DEBUG_MUTEXES on Nokia N900 during boot. Reported-by: Sebastian ReichelSigned-off-by: Aaro Koskinen --- drivers/char/hw_random/omap3-rom-rng.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/char/hw_random/omap3-rom-rng.c b/drivers/char/hw_random/omap3-rom-rng.c index a405cdc..58191c6 100644 --- a/drivers/char/hw_random/omap3-rom-rng.c +++ b/drivers/char/hw_random/omap3-rom-rng.c @@ -29,11 +29,11 @@ /* param1: ptr, param2: count, param3: flag */ static u32 (*omap3_rom_rng_call)(u32, u32, u32); -static struct timer_list idle_timer; +static struct delayed_work idle_work; static int rng_idle; static struct clk *rng_clk; -static void omap3_rom_rng_idle(unsigned long data) +static void omap3_rom_rng_idle(struct work_struct *work) { int r; @@ -51,7 +51,7 @@ static int omap3_rom_rng_get_random(void *buf, unsigned int count) u32 r; u32 ptr; - del_timer_sync(_timer); + cancel_delayed_work_sync(_work); if (rng_idle) { clk_prepare_enable(rng_clk); r = omap3_rom_rng_call(0, 0, RNG_GEN_PRNG_HW_INIT); @@ -65,7 +65,7 @@ static int omap3_rom_rng_get_random(void *buf, unsigned int count) ptr = virt_to_phys(buf); r = omap3_rom_rng_call(ptr, count, RNG_GEN_HW); - mod_timer(_timer, jiffies + msecs_to_jiffies(500)); + schedule_delayed_work(_work, msecs_to_jiffies(500)); if (r != 0) return -EINVAL; return 0; @@ -102,7 +102,7 @@ static int omap3_rom_rng_probe(struct platform_device *pdev) return -EINVAL; } - setup_timer(_timer, omap3_rom_rng_idle, 0); + INIT_DELAYED_WORK(_work, omap3_rom_rng_idle); rng_clk = devm_clk_get(>dev, "ick"); if (IS_ERR(rng_clk)) { pr_err("unable to get RNG clock\n"); @@ -118,6 +118,7 @@ static int omap3_rom_rng_probe(struct platform_device *pdev) static int omap3_rom_rng_remove(struct platform_device *pdev) { + cancel_delayed_work_sync(_work); hwrng_unregister(_rom_rng_ops); clk_disable_unprepare(rng_clk); return 0; -- 2.4.0 -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] crypto: sun4i-ss: add missing statesize
On Thu, Nov 05, 2015 at 08:07:19AM -0800, Maxime Ripard wrote: > > On Thu, Nov 05, 2015 at 08:48:57AM +0100, LABBE Corentin wrote: > > sun4i-ss implementaton of md5/sha1 is via ahash algorithms. > > A recent change make impossible to load them without giving statesize. > > Which one? We recently disabled ahash drivers that do not declare statesize because it can lead to a crash when the driver is used through algif. Not declaring statesize is a bug anyway but the fact that it is exported through algif makes it much worse. > > This patch specifiy statesize for sha1 and md5. > > > > Signed-off-by: LABBE Corentin> > Cc: sta...@vger.kernel.org > > Please also add a Fixes tag (and the stable version it applies to). I don't see the point for a fixes tag as it would simply refer to the original patch-set that added the driver. Cheers, -- Email: Herbert Xu Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 1/4] Crypto: Crypto driver support aes/des/des3 for rk3288
I guess the subject: "crypto: rockchip: " Maybe better. 在 2015年11月06日 09:17, Zain Wang 写道: The names registered are: ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede) You can alloc tags above in your case. And other algorithms and platforms will be added later on. Signed-off-by: Zain Wang--- Changed in v2: - remove some part about hash - add weak key detection - changed some variate's type Changde in v1: - modify some variate's name - modify some variate's type - modify some return value - remove or modify some print info - use more dev_xxx in probe - modify the prio of cipher [...] +static int rk_crypto_remove(struct platform_device *pdev) +{ + struct crypto_info_t *crypto_tmp = platform_get_drvdata(pdev); + + rk_crypto_unregister(); + tasklet_kill(_tmp->crypto_tasklet); + free_irq(crypto_tmp->irq, crypto_tmp); + crypto_p = NULL; + + return 0; +} + +#ifdef CONFIG_OF +static const struct of_device_id crypto_of_id_table[] = { + { .compatible = "rockchip,rk3288-crypto" }, + {} +}; +#endif /* CONFIG_OF */ I see the rk3368/ rk32xx SoCs the crypto seem the same IP. So, I guess we should put the "of_device_id" before the device probe since we should can compatible for more SoCs. Others, for example the commit need a bit change. + +static struct platform_driver crypto_driver = { + .probe = rk_crypto_probe, + .remove = rk_crypto_remove, + .driver = { + .name = "rockchip,rk3288-crypto", + .of_match_table = of_match_ptr(crypto_of_id_table), + }, +}; + +module_platform_driver(crypto_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Zain Wang"); diff --git a/drivers/crypto/rockchip/rk3288_crypto.h b/drivers/crypto/rockchip/rk3288_crypto.h new file mode 100644 index 000..cf4cd18 --- /dev/null +++ b/drivers/crypto/rockchip/rk3288_crypto.h @@ -0,0 +1,222 @@ +#ifndef __RK3288_CRYPTO_H__ +#define __RK3288_CRYPTO_H__ + +#include +#include +#include +#include +#include +#include +#include + +#define _SBF(v, f) ((v) << (f)) + +/* Crypto control registers*/ +#define RK_CRYPTO_INTSTS 0x +#define RK_CRYPTO_PKA_DONE_INT BIT(5) +#define RK_CRYPTO_HASH_DONE_INTBIT(4) +#define RK_CRYPTO_HRDMA_ERR_INTBIT(3) +#define RK_CRYPTO_HRDMA_DONE_INT BIT(2) +#define RK_CRYPTO_BCDMA_ERR_INTBIT(1) +#define RK_CRYPTO_BCDMA_DONE_INT BIT(0) + +#define RK_CRYPTO_INTENA 0x0004 +#define RK_CRYPTO_PKA_DONE_ENA BIT(5) +#define RK_CRYPTO_HASH_DONE_ENABIT(4) +#define RK_CRYPTO_HRDMA_ERR_ENABIT(3) +#define RK_CRYPTO_HRDMA_DONE_ENA BIT(2) +#define RK_CRYPTO_BCDMA_ERR_ENABIT(1) +#define RK_CRYPTO_BCDMA_DONE_ENA BIT(0) + +#define RK_CRYPTO_CTRL 0x0008 +#define RK_CRYPTO_WRITE_MASK (0x << 16) +#define RK_CRYPTO_TRNG_FLUSH BIT(9) +#define RK_CRYPTO_TRNG_START BIT(8) +#define RK_CRYPTO_PKA_FLUSHBIT(7) +#define RK_CRYPTO_HASH_FLUSH BIT(6) +#define RK_CRYPTO_BLOCK_FLUSH BIT(5) +#define RK_CRYPTO_PKA_STARTBIT(4) +#define RK_CRYPTO_HASH_START BIT(3) +#define RK_CRYPTO_BLOCK_START BIT(2) +#define RK_CRYPTO_TDES_START BIT(1) +#define RK_CRYPTO_AES_STARTBIT(0) + +#define RK_CRYPTO_CONF 0x000c +/* HASH Receive DMA Address Mode: fix | increment */ +#define RK_CRYPTO_HR_ADDR_MODE BIT(8) +/* Block Transmit DMA Address Mode: fix | increment */ +#define RK_CRYPTO_BT_ADDR_MODE BIT(7) +/* Block Receive DMA Address Mode: fix | increment */ +#define RK_CRYPTO_BR_ADDR_MODE BIT(6) +#define RK_CRYPTO_BYTESWAP_HRFIFO BIT(5) +#define RK_CRYPTO_BYTESWAP_BTFIFO BIT(4) +#define RK_CRYPTO_BYTESWAP_BRFIFO BIT(3) +/* AES = 0 OR DES = 1 */ +#define RK_CRYPTO_DESSEL BIT(2) +#define RK_CYYPTO_HASHINSEL_INDEPENDENT_SOURCE _SBF(0x00, 0) +#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_INPUT _SBF(0x01, 0) +#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_OUTPUT_SBF(0x02, 0) + +/* Block Receiving DMA Start Address Register */ +#define RK_CRYPTO_BRDMAS 0x0010 +/* Block Transmitting DMA Start Address Register */ +#define RK_CRYPTO_BTDMAS 0x0014 +/* Block Receiving DMA Length Register */ +#define RK_CRYPTO_BRDMAL 0x0018 +/* Hash Receiving DMA Start Address Register */ +#define RK_CRYPTO_HRDMAS 0x001c +/* Hash Receiving DMA Length Register */ +#define RK_CRYPTO_HRDMAL 0x0020 + +/* AES registers */ +#define RK_CRYPTO_AES_CTRL 0x0080 +#define RK_CRYPTO_AES_BYTESWAP_CNT BIT(11) +#define RK_CRYPTO_AES_BYTESWAP_KEY BIT(10) +#define RK_CRYPTO_AES_BYTESWAP_IV BIT(9) +#define
RE: [PATCH] crypto: add asynchronous compression support
After sync with Joonsoo Kim offline, he agreed to merge this acomp patch with his ccomp patch, thanks Joonsoo! -Original Message- From: Herbert Xu [mailto:herb...@gondor.apana.org.au] Sent: Friday, October 16, 2015 11:14 PM To: Li, Weigang Cc: linux-crypto@vger.kernel.org; Struk, Tadeusz; Joonsoo Kim; Sergey Senozhatsky Subject: Re: [PATCH] crypto: add asynchronous compression support On Fri, Oct 16, 2015 at 11:11:00PM +0800, Weigang Li wrote: > This patch set introduces Asynchronous Compression API. > What is proposed is a new crypto type called crypto_acomp_type, plus > new struct acomp_alg and struct crypto_acomp, together with number of > helper functions to register acomp type algorithms and allocate tfm > instances. This is to make it similar to how the existing crypto API > works for the ablkcipher, and akcipher types. > The operations the new interface will provide are: > > int (*compress)(struct acompress_request *req); > int (*decompress)(struct acompress_request *req); > > The benefits it gives interface are: > - the new interface allows for asynchronous implementations and > scatterlist buffer that can use hardware to offload the compression > operations, the new asynchronous API can be called by the linux kernel > components (i.e., btrfs) who want to use hardware acceleration for data > compression. > > New helper functions have been added to allocate crypto_acomp > instances and invoke the operations to make it easier to use. > > Signed-off-by: Weigang LiThanks for the patch! Joonsoo Kim is also working on the compression interface for zram. Could you two collaborate and come up with one interface rather than two? Cheers, -- Email: Herbert Xu Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 4/4] crypto: rockchip/crypto - add DT bindings documentation
On Fri, Nov 06, 2015 at 09:17:24AM +0800, Zain Wang wrote: > Add DT bindings documentation for the rk3288 crypto drivers. > > Signed-off-by: Zain WangAcked-by: Rob Herring > --- > > Changde in v2: > - None > > Changed in v1: > - remove the _crypto suffix > - use "rockchip,rk3288-crypto" instead of "rockchip,rk3288" > - remove the description of status > > .../devicetree/bindings/crypto/rockchip-crypto.txt | 29 > ++ > 1 file changed, 29 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/crypto/rockchip-crypto.txt > > diff --git a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt > b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt > new file mode 100644 > index 000..d27e203 > --- /dev/null > +++ b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt > @@ -0,0 +1,29 @@ > +Rockchip Electronics And Security Accelerator > + > +Required properties: > +- compatible: Should be "rockchip,rk3288-crypto" > +- reg: base physical address of the engine and length of memory mapped > + region > +- interrupts: interrupt number > +- clocks: reference to the clocks about crypto > +- clock-names: "aclk" used to clock data > +"hclk" used to clock data > +"srst" used to clock crypto accelerator > +"apb_pclk" used to clock dma > + > +Examples: > + > + crypto: cypto-controller@ff8a { > + compatible = "rockchip,rk3288-crypto"; > + reg = <0xff8a 0x4000>; > + interrupts = ; > + clocks = < ACLK_CRYPTO>, > + < HCLK_CRYPTO>, > + < SCLK_CRYPTO>, > + < ACLK_DMAC1>; > + clock-names = "aclk", > + "hclk", > + "sclk", > + "apb_pclk"; > + status = "okay"; > + }; > -- > 1.9.1 > > -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 0/4] Crypto: add crypto accelerator support for rk3288
This commit support three cipher(AES/DES/DES3) and two chainmode(ecb/cbc), and the more algorithms and new hash drivers will be added later on. Changed in v2: - remove some part about hash - add weak key detection - changed some variate's type Changed in v1: - modify some variate's name - modify some variate's type - modify some return value - remove or modify some print info - use more dev_xxx in probe - modify the prio of cipher - add Kconfig Zain Wang (4): Crypto: Crypto driver support aes/des/des3 for rk3288 clk: rockchip: set an id for crypto clk ARM: dts: rockchip: Add Crypto drivers for rk3288 crypto: rockchip/crypto - add DT bindings documentation .../devicetree/bindings/crypto/rockchip-crypto.txt | 29 ++ arch/arm/boot/dts/rk3288.dtsi | 15 + drivers/clk/rockchip/clk-rk3288.c | 2 +- drivers/crypto/Kconfig | 11 + drivers/crypto/Makefile| 1 + drivers/crypto/rockchip/Makefile | 3 + drivers/crypto/rockchip/rk3288_crypto.c| 380 +++ drivers/crypto/rockchip/rk3288_crypto.h| 222 + drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c | 511 + include/dt-bindings/clock/rk3288-cru.h | 1 + 10 files changed, 1174 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/crypto/rockchip-crypto.txt create mode 100644 drivers/crypto/rockchip/Makefile create mode 100644 drivers/crypto/rockchip/rk3288_crypto.c create mode 100644 drivers/crypto/rockchip/rk3288_crypto.h create mode 100644 drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 3/4] ARM: dts: rockchip: Add Crypto drivers for rk3288
Add Crypto drivers for rk3288 including crypto controller and dma clk. Signed-off-by: Zain Wang--- Changed in v2: - None Changed in v1: - remove the _crypto suffix - use "rockchip,rk3288-crypto" instead of "rockchip,rk3288" arch/arm/boot/dts/rk3288.dtsi | 15 +++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 6a79c9c..7b7914e 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -170,6 +170,21 @@ }; }; + crypto: cypto-controller@ff8a { + compatible = "rockchip,rk3288-crypto"; + reg = <0xff8a 0x4000>; + interrupts = ; + clocks = < ACLK_CRYPTO>, +< HCLK_CRYPTO>, +< SCLK_CRYPTO>, +< ACLK_DMAC1>; + clock-names = "aclk", + "hclk", + "sclk", + "apb_pclk"; + status = "okay"; + }; + reserved-memory { #address-cells = <1>; #size-cells = <1>; -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 4/4] crypto: rockchip/crypto - add DT bindings documentation
Add DT bindings documentation for the rk3288 crypto drivers. Signed-off-by: Zain Wang--- Changde in v2: - None Changed in v1: - remove the _crypto suffix - use "rockchip,rk3288-crypto" instead of "rockchip,rk3288" - remove the description of status .../devicetree/bindings/crypto/rockchip-crypto.txt | 29 ++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/rockchip-crypto.txt diff --git a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt new file mode 100644 index 000..d27e203 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt @@ -0,0 +1,29 @@ +Rockchip Electronics And Security Accelerator + +Required properties: +- compatible: Should be "rockchip,rk3288-crypto" +- reg: base physical address of the engine and length of memory mapped + region +- interrupts: interrupt number +- clocks: reference to the clocks about crypto +- clock-names: "aclk" used to clock data + "hclk" used to clock data + "srst" used to clock crypto accelerator + "apb_pclk" used to clock dma + +Examples: + + crypto: cypto-controller@ff8a { + compatible = "rockchip,rk3288-crypto"; + reg = <0xff8a 0x4000>; + interrupts = ; + clocks = < ACLK_CRYPTO>, +< HCLK_CRYPTO>, +< SCLK_CRYPTO>, +< ACLK_DMAC1>; + clock-names = "aclk", + "hclk", + "sclk", + "apb_pclk"; + status = "okay"; + }; -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/4] Crypto: Crypto driver support aes/des/des3 for rk3288
The names registered are: ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede) You can alloc tags above in your case. And other algorithms and platforms will be added later on. Signed-off-by: Zain Wang--- Changed in v2: - remove some part about hash - add weak key detection - changed some variate's type Changde in v1: - modify some variate's name - modify some variate's type - modify some return value - remove or modify some print info - use more dev_xxx in probe - modify the prio of cipher drivers/crypto/Kconfig | 11 + drivers/crypto/Makefile| 1 + drivers/crypto/rockchip/Makefile | 3 + drivers/crypto/rockchip/rk3288_crypto.c| 380 +++ drivers/crypto/rockchip/rk3288_crypto.h| 222 + drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c | 511 + 6 files changed, 1128 insertions(+) create mode 100644 drivers/crypto/rockchip/Makefile create mode 100644 drivers/crypto/rockchip/rk3288_crypto.c create mode 100644 drivers/crypto/rockchip/rk3288_crypto.h create mode 100644 drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig index 2569e04..d1e42cf 100644 --- a/drivers/crypto/Kconfig +++ b/drivers/crypto/Kconfig @@ -498,4 +498,15 @@ config CRYPTO_DEV_SUN4I_SS To compile this driver as a module, choose M here: the module will be called sun4i-ss. +config CRYPTO_DEV_ROCKCHIP + tristate "Rockchip's Cryptographic Engine driver" + + select CRYPTO_AES + select CRYPTO_DES + select CRYPTO_BLKCIPHER + + help + This driver interfaces with the hardware crypto accelerator. + Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode. + endif # CRYPTO_HW diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile index c3ced6f..713de9d 100644 --- a/drivers/crypto/Makefile +++ b/drivers/crypto/Makefile @@ -29,3 +29,4 @@ obj-$(CONFIG_CRYPTO_DEV_QAT) += qat/ obj-$(CONFIG_CRYPTO_DEV_QCE) += qce/ obj-$(CONFIG_CRYPTO_DEV_VMX) += vmx/ obj-$(CONFIG_CRYPTO_DEV_SUN4I_SS) += sunxi-ss/ +obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rockchip/ diff --git a/drivers/crypto/rockchip/Makefile b/drivers/crypto/rockchip/Makefile new file mode 100644 index 000..7051c6c --- /dev/null +++ b/drivers/crypto/rockchip/Makefile @@ -0,0 +1,3 @@ +obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rk_crypto.o +rk_crypto-objs := rk3288_crypto.o \ + rk3288_crypto_ablkcipher.o \ diff --git a/drivers/crypto/rockchip/rk3288_crypto.c b/drivers/crypto/rockchip/rk3288_crypto.c new file mode 100644 index 000..c2a419b --- /dev/null +++ b/drivers/crypto/rockchip/rk3288_crypto.c @@ -0,0 +1,380 @@ +/* + *Crypto acceleration support for Rockchip RK3288 + * + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd + * + * Author: Zain Wang + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * Some ideas are from marvell-cesa.c and s5p-sss.c driver. + */ + +#include "rk3288_crypto.h" +#include +#include +#include +#include +#include + +struct crypto_info_t *crypto_p; + +static int rk_crypto_enable_clk(struct crypto_info_t *dev) +{ + int err; + + err = clk_prepare_enable(dev->sclk); + if (err) { + dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'sclk'\n", + __func__, __LINE__); + goto err_return; + } + err = clk_prepare_enable(dev->aclk); + if (err) { + dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'aclk'\n", + __func__, __LINE__); + goto err_aclk; + } + err = clk_prepare_enable(dev->hclk); + if (err) { + dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'hclk'\n", + __func__, __LINE__); + goto err_hclk; + } + + err = clk_prepare_enable(dev->dmaclk); + if (err) { + dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'dmaclk'\n", + __func__, __LINE__); + goto err_dmaclk; + } + return err; +err_dmaclk: + clk_disable_unprepare(dev->hclk); +err_hclk: + clk_disable_unprepare(dev->aclk); +err_aclk: + clk_disable_unprepare(dev->sclk); +err_return: + return err; +} + +static void rk_crypto_disable_clk(struct crypto_info_t *dev) +{ + clk_disable_unprepare(dev->dmaclk); + clk_disable_unprepare(dev->hclk); + clk_disable_unprepare(dev->aclk); + clk_disable_unprepare(dev->sclk); +} + +static int check_alignment(struct scatterlist *sg_src, + struct scatterlist *sg_dst, + int
Re: [PATCH v3] keys, trusted: select hash algorithm for TPM2 chips
Hi Jarkko, [auto build test ERROR on: security/next] [also build test ERROR on: next-20151105] [cannot apply to: v4.3] url: https://github.com/0day-ci/linux/commits/Jarkko-Sakkinen/keys-trusted-select-hash-algorithm-for-TPM2-chips/20151106-010236 base: https://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security.git next config: i386-randconfig-h0-11060637 (attached as .config) reproduce: # save the attached .config to linux build tree make ARCH=i386 All errors (new ones prefixed by >>): drivers/built-in.o: In function `tpm2_seal_trusted': >> (.text+0xe3617): undefined reference to `hash_algo_name' --- 0-DAY kernel test infrastructureOpen Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation .config.gz Description: Binary data
Re: [PATCH v2 3/4] ARM: dts: rockchip: Add Crypto drivers for rk3288
the subject should be add the node/info for crypto... 在 2015年11月06日 09:17, Zain Wang 写道: Add Crypto drivers for rk3288 including crypto controller and dma clk. Signed-off-by: Zain Wang--- Changed in v2: - None Changed in v1: - remove the _crypto suffix - use "rockchip,rk3288-crypto" instead of "rockchip,rk3288" arch/arm/boot/dts/rk3288.dtsi | 15 +++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 6a79c9c..7b7914e 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -170,6 +170,21 @@ }; }; + crypto: cypto-controller@ff8a { + compatible = "rockchip,rk3288-crypto"; + reg = <0xff8a 0x4000>; + interrupts = ; + clocks = < ACLK_CRYPTO>, +< HCLK_CRYPTO>, +< SCLK_CRYPTO>, +< ACLK_DMAC1>; + clock-names = "aclk", + "hclk", + "sclk", + "apb_pclk"; I guess you can do this: clocks = < ACLK_CRYPTO>, < HCLK_CRYPTO>, < SCLK_CRYPTO>, < ACLK_DMAC1>; clock-names = "aclk", "hclk", "sclk", "apb_pclk"; + status = "okay"; + }; + reserved-memory { #address-cells = <1>; #size-cells = <1>; -- Thanks, Caesar -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html