[PATCH v2 2/4] hw_random: jz4780-rng: Add Ingenic JZ4780 hardware RNG driver
JZ4780 SoC random number generator driver.
Changes since v1:
* Use devm_ioremap_resource and devm_hwrng_register
* Add delay after enabling RNG, before reading data
* Disable RNG after reading data as per Ingenic JZ4780 PM
* Move Makefile and Kconfig entries to the bottom
* Arrange includes in alphabetical order
Adding a delay before reading RNG data and disabling RNG after reading
data was suggested by Jeffery Walton.
Suggested-by: Jeffrey Walton
Signed-off-by: PrasannaKumar Muralidharan
---
MAINTAINERS | 5 ++
drivers/char/hw_random/Kconfig | 14 +
drivers/char/hw_random/Makefile | 1 +
drivers/char/hw_random/jz4780-rng.c | 101
4 files changed, 121 insertions(+)
create mode 100644 drivers/char/hw_random/jz4780-rng.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 320cce8..87a7505 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6008,6 +6008,11 @@ M: Zubair Lutfullah Kakakhel
S: Maintained
F: drivers/dma/dma-jz4780.c
+INGENIC JZ4780 HW RNG Driver
+M: PrasannaKumar Muralidharan
+S: Maintained
+F: drivers/char/hw_random/jz4780-rng.c
+
INTEGRITY MEASUREMENT ARCHITECTURE (IMA)
M: Mimi Zohar
M: Dmitry Kasatkin
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index 56ad5a59..662e415 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -410,6 +410,20 @@ config HW_RANDOM_MESON
If unsure, say Y.
+config HW_RANDOM_JZ4780
+ tristate "JZ4780 HW random number generator support"
+ depends on MACH_INGENIC
+ depends on HAS_IOMEM
+ default HW_RANDOM
+ ---help---
+ This driver provides kernel-side support for the Random Number
+ Generator hardware found on JZ4780 SOCs.
+
+ To compile this driver as a module, choose M here: the
+ module will be called jz4780-rng.
+
+ If unsure, say Y.
+
endif # HW_RANDOM
config UML_RANDOM
diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile
index 04bb0b0..df1dbf6 100644
--- a/drivers/char/hw_random/Makefile
+++ b/drivers/char/hw_random/Makefile
@@ -35,3 +35,4 @@ obj-$(CONFIG_HW_RANDOM_XGENE) += xgene-rng.o
obj-$(CONFIG_HW_RANDOM_STM32) += stm32-rng.o
obj-$(CONFIG_HW_RANDOM_PIC32) += pic32-rng.o
obj-$(CONFIG_HW_RANDOM_MESON) += meson-rng.o
+obj-$(CONFIG_HW_RANDOM_JZ4780) += jz4780-rng.o
diff --git a/drivers/char/hw_random/jz4780-rng.c
b/drivers/char/hw_random/jz4780-rng.c
new file mode 100644
index 000..1c85ed0
--- /dev/null
+++ b/drivers/char/hw_random/jz4780-rng.c
@@ -0,0 +1,101 @@
+/*
+ * jz4780-rng.c - Random Number Generator driver for J4780
+ *
+ * Copyright 2016 (C) PrasannaKumar Muralidharan
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define REG_RNG_CTRL 0x0
+#define REG_RNG_DATA 0x4
+
+struct jz4780_rng {
+ struct device *dev;
+ struct hwrng rng;
+ void __iomem *mem;
+};
+
+static u32 jz4780_rng_readl(struct jz4780_rng *rng, u32 offset)
+{
+ return readl(rng->mem + offset);
+}
+
+static void jz4780_rng_writel(struct jz4780_rng *rng, u32 val, u32 offset)
+{
+ writel(val, rng->mem + offset);
+}
+
+static int jz4780_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
+{
+ struct jz4780_rng *jz4780_rng = container_of(rng, struct jz4780_rng,
+ rng);
+ u32 *data = buf;
+ /*
+* JZ4780 Programmers manual says the RNG should not run continuously
+* for more than 1s. So enable RNG, read data and disable it.
+* NOTE: No issue was observed with MIPS creator CI20 board even when
+* RNG ran continuously for longer periods. This is just a precaution.
+*
+* A delay is required so that the current RNG data is not bit shifted
+* version of previous RNG data which could happen if random data is
+* read continuously from this device.
+*/
+ jz4780_rng_writel(jz4780_rng, 1, REG_RNG_CTRL);
+ /* As the delay is small add it even if wait is false */
+ udelay(20);
+ *data = jz4780_rng_readl(jz4780_rng, REG_RNG_DATA);
+ jz4780_rng_writel(jz4780_rng, 0, REG_RNG_CTRL);
+
+ return 4;
+}
+
+static int jz4780_rng_probe(struct platform_device *pdev)
+{
+ struct jz4780_rng *jz4780_rng;
+ struct resource *res;
+
+ jz4780_rng = devm_kzalloc(&pdev->dev, sizeof(*jz4780_rng), GFP_KERNEL);
+ if (!jz4780_rng)
+ return -ENOMEM;
+
+ jz4780_rng->dev = &pdev->dev;
+ jz4780_rng->rng.name = "jz4780";
+ jz4780_rng->rng.read = jz4780_rng_read;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
[PATCH v2 4/4] hw_random: jz4780-rng: Enable hardware RNG in CI20 defconfig
This patch enables the usage of RNG in MIPS Creator CI20 default config. Signed-off-by: PrasannaKumar Muralidharan --- arch/mips/configs/ci20_defconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/mips/configs/ci20_defconfig b/arch/mips/configs/ci20_defconfig index bf164fe..51a47a4 100644 --- a/arch/mips/configs/ci20_defconfig +++ b/arch/mips/configs/ci20_defconfig @@ -88,7 +88,9 @@ CONFIG_SERIAL_8250_NR_UARTS=5 CONFIG_SERIAL_8250_RUNTIME_UARTS=5 CONFIG_SERIAL_8250_INGENIC=y CONFIG_SERIAL_OF_PLATFORM=y -# CONFIG_HW_RANDOM is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +CONFIG_HW_RANDOM_JZ4780=y CONFIG_I2C=y CONFIG_I2C_JZ4780=y CONFIG_GPIO_SYSFS=y -- 2.5.0 -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 3/4] hw_random: jz4780-rng: Add RNG node to jz4780.dtsi
This patch adds RNG node to jz4780.dtsi.
Signed-off-by: PrasannaKumar Muralidharan
---
arch/mips/boot/dts/ingenic/jz4780.dtsi | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi
b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index b868b42..f11d139 100644
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -36,7 +36,7 @@
cgu: jz4780-cgu@1000 {
compatible = "ingenic,jz4780-cgu";
- reg = <0x1000 0x100>;
+ reg = <0x1000 0xD8>;
clocks = <&ext>, <&rtc>;
clock-names = "ext", "rtc";
@@ -44,6 +44,11 @@
#clock-cells = <1>;
};
+ rng: jz4780-rng@10D8 {
+ compatible = "ingenic,jz4780-rng";
+ reg = <0x10D8 0x8>;
+ };
+
uart0: serial@1003 {
compatible = "ingenic,jz4780-uart";
reg = <0x1003 0x100>;
--
2.5.0
--
To unsubscribe from this list: send the line "unsubscribe linux-crypto" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/4] hw_random: jz4780-rng: Add devicetree bindings for RNG in JZ4780 SoC
Add devicetree bindings for hardware random number generator present in
Ingenic JZ4780 SoC.
Signed-off-by: PrasannaKumar Muralidharan
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/rng/ingenic,jz4780-rng.txt | 12
1 file changed, 12 insertions(+)
create mode 100644 Documentation/devicetree/bindings/rng/ingenic,jz4780-rng.txt
diff --git a/Documentation/devicetree/bindings/rng/ingenic,jz4780-rng.txt
b/Documentation/devicetree/bindings/rng/ingenic,jz4780-rng.txt
new file mode 100644
index 000..03abf56
--- /dev/null
+++ b/Documentation/devicetree/bindings/rng/ingenic,jz4780-rng.txt
@@ -0,0 +1,12 @@
+Ingenic jz4780 RNG driver
+
+Required properties:
+- compatible : Should be "ingenic,jz4780-rng"
+- reg : Specifies base physical address and size of the registers.
+
+Example:
+
+rng: rng@10D8 {
+ compatible = "ingenic,jz4780-rng";
+ reg = <0x10D8 0x8>;
+};
--
2.5.0
--
To unsubscribe from this list: send the line "unsubscribe linux-crypto" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 0/4] hw_random: Add driver for Ingenic JZ4780 SoC RNG
This is the v2 patch series that adds support for random number generator present in Ingenic JZ4780 SoC. Patch 1: Add device tree bindings for RNG in JZ4780 SoC. Patch 2: Add Ingenic JZ4780 hardware RNG driver. Patch 3: Add RNG to jz4780.dtsi. Patch 4: Enable RNG in ci20_defconfig PrasannaKumar Muralidharan (4): hw_random: jz4780-rng: Add devicetree bindings for RNG in JZ4780 SoC hw_random: jz4780-rng: Add Ingenic JZ4780 hardware RNG driver hw_random: jz4780-rng: Add RNG node to jz4780.dtsi hw_random: jz4780-rng: Enable hardware RNG in CI20 defconfig Documentation/devicetree/bindings/rng/ingenic,jz4780-rng.txt | 12 + MAINTAINERS |5 arch/mips/boot/dts/ingenic/jz4780.dtsi |7 arch/mips/configs/ci20_defconfig |4 drivers/char/hw_random/Kconfig | 14 + drivers/char/hw_random/Makefile |1 drivers/char/hw_random/jz4780-rng.c | 102 +++ 7 files changed, 143 insertions(+), 2 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 6/8] hwrng: amd: Replace global variable with private struct
On Sat, Aug 27, 2016 at 02:43:31PM +, Jason Cooper wrote:
> Hi Corentin,
>
> On Fri, Aug 26, 2016 at 01:11:34PM +0200, LABBE Corentin wrote:
> > Instead of having two global variable, it's better to use a
> > private struct. This will permit to remove amd_pdev variable
> >
> > Signed-off-by: LABBE Corentin
> > ---
> > drivers/char/hw_random/amd-rng.c | 57
> > ++--
> > 1 file changed, 38 insertions(+), 19 deletions(-)
> >
> > diff --git a/drivers/char/hw_random/amd-rng.c
> > b/drivers/char/hw_random/amd-rng.c
> > index 383e197..4ef94e9 100644
> > --- a/drivers/char/hw_random/amd-rng.c
> > +++ b/drivers/char/hw_random/amd-rng.c
> > @@ -47,15 +47,18 @@ static const struct pci_device_id pci_tbl[] = {
> > };
> > MODULE_DEVICE_TABLE(pci, pci_tbl);
> >
> > -static struct pci_dev *amd_pdev;
> > +struct amd768_priv {
> > + struct pci_dev *pcidev;
> > + u32 pmbase;
> > +};
> >
> > static int amd_rng_data_present(struct hwrng *rng, int wait)
> > {
> > - u32 pmbase = (u32)rng->priv;
> > + struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
>
> Please remove unnecessary casts...
Hmm, I was assuming that, like other places in the tree, that priv was
declared void*. However, it's unsigned long in hw_random.h.
And, it looks like all users cast it. Either to a struct, or to a void
__iomem *.
So ignore what I said in my previous email. You can add my reviewed-by
without change.
It does look like /priv/ s/unsigned long/void */ would be a great
cleanup.
thx,
Jason.
--
To unsubscribe from this list: send the line "unsubscribe linux-crypto" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 0/8] hwrng: amd: rework of the amd hwrng driver
Hi Corentin, On Fri, Aug 26, 2016 at 01:11:28PM +0200, LABBE Corentin wrote: > Changes since v2: > - split the latest patch in 4 > Changes since v1: > - Keep the hwrng name as "amd" > > LABBE Corentin (8): > hwrng: amd: Fix style problem with blank line > hwrng: amd: use the BIT macro > hwrng: amd: Be consitent with the driver name > hwrng: amd: Remove asm/io.h > hwrng: amd: release_region must be called after hwrng_unregister > hwrng: amd: Replace global variable with private struct > hwrng: amd: Access hardware via ioread32/iowrite32 > hwrng: amd: Convert to new hwrng read() API > > drivers/char/hw_random/amd-rng.c | 150 > +-- > 1 file changed, 96 insertions(+), 54 deletions(-) Once you've fixed up the casting in #6, you can add my Reviewed-by: Jason Cooper to the series. thx, Jason. -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 6/8] hwrng: amd: Replace global variable with private struct
Hi Corentin,
On Fri, Aug 26, 2016 at 01:11:34PM +0200, LABBE Corentin wrote:
> Instead of having two global variable, it's better to use a
> private struct. This will permit to remove amd_pdev variable
>
> Signed-off-by: LABBE Corentin
> ---
> drivers/char/hw_random/amd-rng.c | 57
> ++--
> 1 file changed, 38 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/char/hw_random/amd-rng.c
> b/drivers/char/hw_random/amd-rng.c
> index 383e197..4ef94e9 100644
> --- a/drivers/char/hw_random/amd-rng.c
> +++ b/drivers/char/hw_random/amd-rng.c
> @@ -47,15 +47,18 @@ static const struct pci_device_id pci_tbl[] = {
> };
> MODULE_DEVICE_TABLE(pci, pci_tbl);
>
> -static struct pci_dev *amd_pdev;
> +struct amd768_priv {
> + struct pci_dev *pcidev;
> + u32 pmbase;
> +};
>
> static int amd_rng_data_present(struct hwrng *rng, int wait)
> {
> - u32 pmbase = (u32)rng->priv;
> + struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
Please remove unnecessary casts...
> int data, i;
>
> for (i = 0; i < 20; i++) {
> - data = !!(inl(pmbase + 0xF4) & 1);
> + data = !!(inl(priv->pmbase + 0xF4) & 1);
> if (data || !wait)
> break;
> udelay(10);
> @@ -65,35 +68,37 @@ static int amd_rng_data_present(struct hwrng *rng, int
> wait)
>
> static int amd_rng_data_read(struct hwrng *rng, u32 *data)
> {
> - u32 pmbase = (u32)rng->priv;
> + struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
here,
>
> - *data = inl(pmbase + 0xF0);
> + *data = inl(priv->pmbase + 0xF0);
>
> return 4;
> }
>
> static int amd_rng_init(struct hwrng *rng)
> {
> + struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
here,
> u8 rnen;
>
> - pci_read_config_byte(amd_pdev, 0x40, &rnen);
> + pci_read_config_byte(priv->pcidev, 0x40, &rnen);
> rnen |= BIT(7); /* RNG on */
> - pci_write_config_byte(amd_pdev, 0x40, rnen);
> + pci_write_config_byte(priv->pcidev, 0x40, rnen);
>
> - pci_read_config_byte(amd_pdev, 0x41, &rnen);
> + pci_read_config_byte(priv->pcidev, 0x41, &rnen);
> rnen |= BIT(7); /* PMIO enable */
> - pci_write_config_byte(amd_pdev, 0x41, rnen);
> + pci_write_config_byte(priv->pcidev, 0x41, rnen);
>
> return 0;
> }
>
> static void amd_rng_cleanup(struct hwrng *rng)
> {
> + struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
here,
> u8 rnen;
>
> - pci_read_config_byte(amd_pdev, 0x40, &rnen);
> + pci_read_config_byte(priv->pcidev, 0x40, &rnen);
> rnen &= ~BIT(7);/* RNG off */
> - pci_write_config_byte(amd_pdev, 0x40, rnen);
> + pci_write_config_byte(priv->pcidev, 0x40, rnen);
> }
>
> static struct hwrng amd_rng = {
> @@ -110,6 +115,7 @@ static int __init mod_init(void)
> struct pci_dev *pdev = NULL;
> const struct pci_device_id *ent;
> u32 pmbase;
> + struct amd768_priv *priv;
>
> for_each_pci_dev(pdev) {
> ent = pci_match_id(pci_tbl, pdev);
> @@ -117,24 +123,30 @@ static int __init mod_init(void)
> goto found;
> }
> /* Device not found. */
> - goto out;
> + return -ENODEV;
>
> found:
> err = pci_read_config_dword(pdev, 0x58, &pmbase);
> if (err)
> - goto out;
> - err = -EIO;
> + return err;
> +
> pmbase &= 0xFF00;
> if (pmbase == 0)
> - goto out;
> + return -EIO;
> +
> + priv = kzalloc(sizeof(*priv), GFP_KERNEL);
> + if (!priv)
> + return -ENOMEM;
> +
> if (!request_region(pmbase + 0xF0, 8, DRV_NAME)) {
> dev_err(&pdev->dev, DRV_NAME " region 0x%x already in use!\n",
> pmbase + 0xF0);
> err = -EBUSY;
> goto out;
> }
> - amd_rng.priv = (unsigned long)pmbase;
> - amd_pdev = pdev;
> + amd_rng.priv = (unsigned long)priv;
here,
> + priv->pmbase = pmbase;
> + priv->pcidev = pdev;
>
> pr_info(DRV_NAME " detected\n");
> err = hwrng_register(&amd_rng);
> @@ -143,17 +155,24 @@ found:
> release_region(pmbase + 0xF0, 8);
> goto out;
> }
> + return 0;
> +
> out:
> + kfree(priv);
> return err;
> }
>
> static void __exit mod_exit(void)
> {
> - u32 pmbase = (unsigned long)amd_rng.priv;
> + struct amd768_priv *priv;
> +
> + priv = (struct amd768_priv *)amd_rng.priv;
and here.
thx,
Jason.
>
> hwrng_unregister(&amd_rng);
>
> - release_region(pmbase + 0xF0, 8);
> + release_region(priv->pmbase + 0xF0, 8);
> +
> + kfree(priv);
> }
>
> module_init(mod_init);
> --
> 2.7.3
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-crypto" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at http://vger.kernel.org/maj
Re: Git bisected regression for ipsec/aead
On (08/25/16 16:49), Herbert Xu wrote: > > On Fri, Aug 19, 2016 at 03:21:24PM -0400, Sowmini Varadhan wrote: > >7271b33cb87e80f3a416fb031ad3ca87f0bea80a is the first bad commit > This bisection doesn't make much sense as this patch just causes > cryptd to be used a little more more frequently. But it does > point the finger at cryptd. On additional testing, I think this might be related to some subtle race/timing issue so that git-bisect may not necessarily be able to pin-point the correct bad-commit: if I add a few printks in other parts of the IPsec stack (and change the timing), the problem does not reproduce. Let me try to collect more data on this. Meanwhile, if you can see some bug in the commit above, then it probably makes sense to fix it upstream anyway. --Sowmini -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
