Here is a pre-patch for the support of the SEC ENGINE of MPC88x/MPC82xx
I have tried to make use of defines in order to keep a single driver for the two
TALITOS variants as suggested by Kim, but I'm not too happy about the quantity
of #ifdef
For the time being, it only supports basic crypto operations, not the combined
authentication/encryption ones.
Note that it has been tested on MPC885, but not on MPC82xx
I would be happy to receive comments and suggestions in order to improve this
first try.
Not-yet-signed-off-by: Christophe Leroy
Index: b/drivers/crypto/talitos.c
===
--- a/drivers/crypto/talitos.c
+++ b/drivers/crypto/talitos.c
@@ -53,10 +53,26 @@
#include "talitos.h"
+#ifdef CONFIG_CRYPTO_DEV_TALITOS1
+static u8 padded_hash[64] = { 0x80, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+};
+#endif
+
static void to_talitos_ptr(struct talitos_ptr *talitos_ptr, dma_addr_t
dma_addr)
{
talitos_ptr->ptr = cpu_to_be32(lower_32_bits(dma_addr));
+#ifdef CONFIG_CRYPTO_DEV_TALITOS1
+ talitos_ptr->res = 0;
+#else
talitos_ptr->eptr = upper_32_bits(dma_addr);
+#endif
}
/*
@@ -72,7 +88,11 @@
talitos_ptr->len = cpu_to_be16(len);
to_talitos_ptr(talitos_ptr, dma_addr);
+#ifdef CONFIG_CRYPTO_DEV_TALITOS1
+ talitos_ptr->res = 0;
+#else
talitos_ptr->j_extent = extent;
+#endif
}
/*
@@ -91,9 +111,17 @@
struct talitos_private *priv = dev_get_drvdata(dev);
unsigned int timeout = TALITOS_TIMEOUT;
+#ifdef CONFIG_CRYPTO_DEV_TALITOS1
+ setbits32(priv->chan[ch].reg + TALITOS_CCCR_LO, TALITOS_CCCR_LO_RESET);
+#else
setbits32(priv->chan[ch].reg + TALITOS_CCCR, TALITOS_CCCR_RESET);
+#endif
+#ifdef CONFIG_CRYPTO_DEV_TALITOS1
+ while ((in_be32(priv->chan[ch].reg + TALITOS_CCCR_LO) &
TALITOS_CCCR_LO_RESET)
+#else
while ((in_be32(priv->chan[ch].reg + TALITOS_CCCR) & TALITOS_CCCR_RESET)
+#endif
&& --timeout)
cpu_relax();
@@ -101,10 +129,11 @@
dev_err(dev, "failed to reset channel %d\n", ch);
return -EIO;
}
+dev_err(dev, "success to reset channel %d\n", ch);
/* set 36-bit addressing, done writeback enable and done IRQ enable */
setbits32(priv->chan[ch].reg + TALITOS_CCCR_LO, TALITOS_CCCR_LO_EAE |
- TALITOS_CCCR_LO_CDWE | TALITOS_CCCR_LO_CDIE);
+ TALITOS_CCCR_LO_CDWE | TALITOS_CCCR_LO_CDIE /*|
TALITOS_CCCR_LO_NT*/);
/* and ICCR writeback, if available */
if (priv->features & TALITOS_FTR_HW_AUTH_CHECK)
@@ -169,8 +198,15 @@
}
/* enable channel done and error interrupts */
+#ifdef CONFIG_CRYPTO_DEV_TALITOS1
+ clrbits32(priv->reg + TALITOS_IMR, TALITOS_IMR_INIT);
+ clrbits32(priv->reg + TALITOS_IMR_LO, TALITOS_IMR_LO_INIT);
+ /* disable parity error check in DEU because of erroneous? test vectors
*/
+ setbits32(priv->reg + TALITOS_DEUICR, TALITOS_DEUICR_KPE);
+#else
setbits32(priv->reg + TALITOS_IMR, TALITOS_IMR_INIT);
setbits32(priv->reg + TALITOS_IMR_LO, TALITOS_IMR_LO_INIT);
+#endif
/* disable integrity check error interrupts (use writeback instead) */
if (priv->features & TALITOS_FTR_HW_AUTH_CHECK)
@@ -228,6 +264,7 @@
/* GO! */
wmb();
+
out_be32(priv->chan[ch].reg + TALITOS_FF,
upper_32_bits(request->dma_desc));
out_be32(priv->chan[ch].reg + TALITOS_FF_LO,
@@ -300,6 +337,7 @@
/*
* process completed requests for channels that have done status
*/
+#ifdef CONFIG_CRYPTO_DEV_TALITOS1
#define DEF_TALITOS_DONE(name, ch_done_mask) \
static void talitos_done_##name(unsigned long data)\
{ \
@@ -307,6 +345,33 @@
struct talitos_private *priv = dev_get_drvdata(dev);\
unsigned long flags;\
\
+ if (ch_done_mask & 0x1000)
\
+ flush_channel(dev, 0, 0, 0);\
+ if (priv->num_channels == 1)\
+ goto out; \
+ if (ch_done_mask & 0x4000) \
+ flush_channel(dev, 1, 0, 0);\
+ if (ch_done_mask & 0x0001) \
+ flush_channel(dev, 2, 0, 0);\
+ if (ch_
