OverlayFS documentation appears to be misleading?

2017-04-10 Thread nerdopolis 
Hi

I am trying to find a way to determine filesystems that cannot be used as a 
lowerdir for OverlayFS.

Looking at https://www.kernel.org/doc/Documentation/filesystems/overlayfs.txt , 
it states "any supported filesystem"
however this does not seem to be the case, (where I tried with vfat as an 
example). I get 
overlayfs: filesystem on '/lowerdir' not supported

searching for the string in the source, then searching for the function, I get 
to https://github.com/torvalds/linux/blob/master/fs/overlayfs/util.c#L61 

Where I am not 100% sure what it is checking for, but as far as I was able to 
find, it seems that it is checking with something to do with AutoFS (I think if 
its a mounted autofs filesystem?), 
as well as it is a case insensitive file system. I could be wrong however. (it 
also appears in the past, it didn't support filesystems that had revalidate 
support, but now it does...

Let me know if this is the wrong place for this.

Thanks
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Re: [PATCH v7 resend 00/20] ILP32 for ARM64

2017-04-10 Thread Yury Norov 
Hi Catalin,

According to latest plans figured out on Linaro Connect, ILP32 should
be taken in 4.12 merge window. The window will be opened in less than
a month, so I'd like to remind it to you, and ask if you have any
questions/requests related to ILP32. Is it still realistic idea to take
patches in 4.12? 

This is the rebase of ILP32 on latest linux-next:
https://github.com/norov/linux/tree/ilp32-20170410

And glibc that I use for testing:
https://github.com/norov/glibc/commits/dev9

Yury

On Thu, Mar 02, 2017 at 12:49:08AM +0530, Yury Norov wrote:
> This series enables aarch64 with ilp32 mode.
> 
> As supporting work, it introduces ARCH_32BIT_OFF_T configuration
> option that is enabled for existing 32-bit architectures but disabled
> for new arches (so 64-bit off_t is is used by new userspace). Also it
> deprecates getrlimit and setrlimit syscalls prior to prlimit64.
> 
> This version is based on linux-next from 2017-03-01. It works with
> glibc-2.25, and tested with LTP, glibc testsuite, trinity, lmbench,
> CPUSpec.
> 
> Patches 1, 2, 3 and 8 are general, and may be applied separately.
> 
> This is the rebase of v7 - no major changes has been made.
> 
> Kernel and GLIBC trees:
> https://github.com/norov/linux/tree/ilp32-20170301
> https://github.com/norov/glibc/tree/dev9
> 
> (GLIBC patches are managed by Steve Ellcey, so my tree is only for
> reference.)
> 
> Changes:
> v3: https://lkml.org/lkml/2014/9/3/704
> v4: https://lkml.org/lkml/2015/4/13/691
> v5: https://lkml.org/lkml/2015/9/29/911
> v6: https://lkml.org/lkml/2016/5/23/661
> v7: RFC nowrap:  https://lkml.org/lkml/2016/6/17/990
> v7: RFC2 nowrap: https://lkml.org/lkml/2016/8/17/245
> v7: RFC3 nowrap: https://lkml.org/lkml/2016/10/21/883
> v7: https://lkml.org/lkml/2017/1/9/213
> v7: Resend: fixed couple of typos, rebased on next-20170301
> 
> Andrew Pinski (6):
>   arm64: rename COMPAT to AARCH32_EL0 in Kconfig
>   arm64: ensure the kernel is compiled for LP64
>   arm64:uapi: set __BITS_PER_LONG correctly for ILP32 and LP64
>   arm64: ilp32: add sys_ilp32.c and a separate table (in entry.S) to use
> it
>   arm64: ilp32: introduce ilp32-specific handlers for sigframe and
> ucontext
>   arm64:ilp32: add ARM64_ILP32 to Kconfig
> 
> Philipp Tomsich (1):
>   arm64:ilp32: add vdso-ilp32 and use for signal return
> 
> Yury Norov (13):
>   compat ABI: use non-compat openat and open_by_handle_at variants
>   32-bit ABI: introduce ARCH_32BIT_OFF_T config option
>   asm-generic: Drop getrlimit and setrlimit syscalls from default list
>   arm64: ilp32: add documentation on the ILP32 ABI for ARM64
>   thread: move thread bits accessors to separated file
>   arm64: introduce is_a32_task and is_a32_thread (for AArch32 compat)
>   arm64: ilp32: add is_ilp32_compat_{task,thread} and TIF_32BIT_AARCH64
>   arm64: introduce binfmt_elf32.c
>   arm64: ilp32: introduce binfmt_ilp32.c
>   arm64: ilp32: share aarch32 syscall handlers
>   arm64: signal: share lp64 signal routines to ilp32
>   arm64: signal32: move ilp32 and aarch32 common code to separated file
>   arm64: ptrace: handle ptrace_request differently for aarch32 and ilp32
> 
>  Documentation/arm64/ilp32.txt |  45 +++
>  arch/Kconfig  |   4 +
>  arch/arc/Kconfig  |   1 +
>  arch/arc/include/uapi/asm/unistd.h|   1 +
>  arch/arm/Kconfig  |   1 +
>  arch/arm64/Kconfig|  19 ++-
>  arch/arm64/Makefile   |   5 +
>  arch/arm64/include/asm/compat.h   |  19 +--
>  arch/arm64/include/asm/elf.h  |  32 ++---
>  arch/arm64/include/asm/fpsimd.h   |   2 +-
>  arch/arm64/include/asm/ftrace.h   |   2 +-
>  arch/arm64/include/asm/hwcap.h|   6 +-
>  arch/arm64/include/asm/is_compat.h|  90 ++
>  arch/arm64/include/asm/memory.h   |   5 +-
>  arch/arm64/include/asm/processor.h|  11 +-
>  arch/arm64/include/asm/ptrace.h   |   2 +-
>  arch/arm64/include/asm/seccomp.h  |   2 +-
>  arch/arm64/include/asm/signal32.h |   9 +-
>  arch/arm64/include/asm/signal32_common.h  |  27 
>  arch/arm64/include/asm/signal_common.h|  33 +
>  arch/arm64/include/asm/signal_ilp32.h |  38 ++
>  arch/arm64/include/asm/syscall.h  |   2 +-
>  arch/arm64/include/asm/thread_info.h  |   4 +-
>  arch/arm64/include/asm/unistd.h   |   8 +-
>  arch/arm64/include/asm/vdso.h |   6 +
>  arch/arm64/include/uapi/asm/bitsperlong.h |   9 +-
>  arch/arm64/include/uapi/asm/unistd.h

Re: [PATCH 2/2] devicetree: Document the max31760 device binding.

2017-04-10 Thread Rob Herring 
On Mon, Apr 10, 2017 at 10:42 AM, Rob Herring  wrote:
> On Tue, Apr 04, 2017 at 12:20:34PM -0700, John Muir wrote:
>> Signed-off-by: John Muir 
>> ---
>>  .../devicetree/bindings/hwmon/max31760.txt | 58 
>> ++
>>  1 file changed, 58 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/hwmon/max31760.txt
>>
>> diff --git a/Documentation/devicetree/bindings/hwmon/max31760.txt 
>> b/Documentation/devicetree/bindings/hwmon/max31760.txt
>> new file mode 100644
>> index ..43787a77c322
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/hwmon/max31760.txt
>> @@ -0,0 +1,58 @@
>> +MAX31760 fan controller
>> +---
>> +
>> +This device supports I2C only. Many properties of this device are 
>> configurable
>> +thorugh the hwmon interface. See also Documentation/hwmon/max31760.
>
> I really think we need to describe the fans as separate nodes and
> preferably with a common binding. This is the second fan controller
> binding recently[1].

Forgot the link: https://patchwork.kernel.org/patch/9643643/
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Re: [GIT PULL] PCI: Support for configurable PCI endpoint

2017-04-10 Thread Bjorn Helgaas 
On Wed, Apr 05, 2017 at 02:22:20PM +0530, Kishon Vijay Abraham I wrote:
> Hi Bjorn,
> 
> Please find the pull request for PCI endpoint support below. I've
> also included all the history here.

Thanks, I applied these (with v7 of the first patch) to pci/host-designware
for v4.12.

> Changes from v5:
> *) remove #syscon-cells property added in v5 and used 
>of_parse_phandle_with_fixed_args
> *) fix compilation error in make.cross ARCH=blackfin that was because
>pci_endpoint_test.c driver depends on COMPILE_TEST.
> 
> Changes from v4:
> *) add #syscon-cells property and used of_parse_phandle_with_args
>to perform a configuration in syscon module (as suggested by
>Rob Herring)
> *) Remove unnecessary white space.
> 
> Changes from v3:
> *) fixed a typo and adapted to https://lkml.org/lkml/2017/3/13/562.
> 
> Changes from v2:
> *) changed the configfs structure as suggested by Christoph Hellwig. With
>this change the framework creates configfs entry for EP function driver
>and EP controller. Previously these entries have to be created by the
>the user. (Haven't changed the epc core or epf core except for invoking
>configfs APIs to create entries for EP function driver and EP controller.
>That's mostly because the EP function device can still be created by
>directly invoking the epf core API without using configfs).
> *) Now the user has to use configfs entry 'start' to start the link.
>This was previously done by the function driver. However in the case of
>multi function EP, the function driver shouldn't start the link.
> 
> Changes from v1:
> *) The preparation patches for adding EP support is removed and is sent
>separately
> *) Added device ID for DRA74x/DRA72x and used it instead of
>using "PCI_ANY_ID"
> *) Added userguide for PCI endpoint test function
> 
> Major Improvements from RFC:
>  *) support multi-function devices (hw supported not virtual)
>  *) Access host side buffers
>  *) Raise MSI interrupts
>  *) Add user space program to use the host side PCI driver
>  *) Adapt all other users of designware to use the new design (only
> compile tested. Since I have only dra7xx boards, the new design
> has only been tested in dra7xx. I'd require the help of others
> to test the platforms they have access to).
> 
> This is based on
> git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git
> pci/host-designware
> 
> Thanks
> Kishon
> 
> The following changes since commit 7ea64dcf602c21b3e5062ca90111ca4459fab403:
> 
>   __end__ (2017-04-04 15:29:37 -0500)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/kishon/pci-endpoint.git 
> tags/pci-endpoint-for-4.12
> 
> for you to fetch changes up to a5c85ba45c9682456077d7277196e91f8ea5fd5c:
> 
>   ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to 
> SW_WKUP (2017-04-05 14:05:28 +0530)
> 
> 
> pci: endpoint: for 4.12
> 
>  *) Add PCI endpoint core layer
>  *) Modify designware and dra7xx driver to be configured in EP mode
>  *) Add a PCI endpoint *test* function driver and corresponding host
> driver
> 
> Signed-off-by: Kishon Vijay Abraham I 
> 
> 
> Kishon Vijay Abraham I (23):
>   PCI: endpoint: Add EP core layer to enable EP controller and EP 
> functions
>   Documentation: PCI: Guide to use PCI Endpoint Core Layer
>   PCI: endpoint: Introduce configfs entry for configuring EP functions
>   Documentation: PCI: Guide to use PCI endpoint configfs
>   PCI: endpoint: Create configfs entry for EPC device and EPF driver
>   Documentation: PCI: Add specification for the *PCI test* function device
>   PCI: endpoint: functions: Add an EP function to test PCI
>   Documentation: PCI: Add binding documentation for pci-test endpoint 
> function
>   PCI: dwc: designware: Add EP mode support
>   dt-bindings: PCI: Add DT bindings for PCI designware EP mode
>   PCI: dwc: dra7xx: Facilitate wrapper and MSI interrupts to be enabled 
> independently
>   PCI: dwc: dra7xx: Add EP mode support
>   dt-bindings: PCI: dra7xx: Add DT bindings for PCI dra7xx EP mode
>   PCI: dwc: dra7xx: Workaround for errata id i870
>   dt-bindings: PCI: dra7xx: Add DT bindings to enable unaligned access
>   PCI: Add device IDs for DRA74x and DRA72x
>   misc: Add host side PCI driver for PCI test function device
>   Documentation: misc-devices: Add Documentation for pci-endpoint-test 
> driver
>   tools: PCI: Add a userspace tool to test PCI endpoint
>   tools: PCI: Add sample test script to invoke pcitest
>   Documentation: PCI: Add userguide for PCI endpoint test function
>   MAINTAINERS: Add PCI Endpoint maintainer
>   ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to 
> SW_WKUP
> 
>  Documentation/PCI/00-INDEX

Re: [PATCH 2/2] devicetree: Document the max31760 device binding.

2017-04-10 Thread Rob Herring 
On Tue, Apr 04, 2017 at 12:20:34PM -0700, John Muir wrote:
> Signed-off-by: John Muir 
> ---
>  .../devicetree/bindings/hwmon/max31760.txt | 58 
> ++
>  1 file changed, 58 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/hwmon/max31760.txt
> 
> diff --git a/Documentation/devicetree/bindings/hwmon/max31760.txt 
> b/Documentation/devicetree/bindings/hwmon/max31760.txt
> new file mode 100644
> index ..43787a77c322
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/hwmon/max31760.txt
> @@ -0,0 +1,58 @@
> +MAX31760 fan controller
> +---
> +
> +This device supports I2C only. Many properties of this device are 
> configurable
> +thorugh the hwmon interface. See also Documentation/hwmon/max31760.

I really think we need to describe the fans as separate nodes and 
preferably with a common binding. This is the second fan controller 
binding recently[1].

Features of the "hwmon interface" are not relevant to the binding. 
Bindings describe h/w.

> +
> +Required node properties:
> +- compatible : "maxim,max31760"
> +- reg : The I2C address of the device. This is 0x50 - 0x57 depending on the
> + hardware configuration.
> +
> +Optional node properties:
> +- maxim,fan1-enabled - 1 to enable, 0 to disable. Default: 1.
> +- maxim,fan2-enabled - 1 to enable, 0 to disable. Default: 1.
> +- maxim,fan1-label   - String: Hwmon fan1_label.
> +- maxim,fan2-label   - String: Hwmon fan2_label.

Perhaps 2 fan sub nodes. reg for fan number, status for enabled, and 
label for label.

> +- maxim,fan-fail-full-only   - Set to 1 to assert a fan failure only when the
> +   PWM is at 100%. Default: 0.

Make this a boolean.

> +- maxim,fan-rd-signal- Set to 1 if fan(s) provide a rotation
> +   detection (RD) signal, or 0 if the fan
> +   generates square-wave pulses. Default: 0.

Make this a boolean.

> +- maxim,fan-rd-polarity  - 0: RD is low when the fan is running.
> +   1: RD is high when the fan is running.
> +   Only relevant when fan-rd-signal is 1.
> +   Default: 0.
> +- maxim,fan-signal-enabled   - Set to 1 if externally driving FF/FS low
> +   should force PWM output to 100%. Default: 0.
> +- maxim,fan-spin-up-enabled - For fan startup: Set to 1 to set the PWM to
> +   100% until tach is detected or two seconds
> +   have passed before reducing to the target
> +   value. Default: 0.
> +- maxim,pwm-polarity - 0: 100% PWM is when PWM is high.
> +   1: 100% PWM is when PWM is low.
> +   Default: 0.
> +- maxim,pwm-pulse-stretch-enabled
> + - 1 to enable PWM pulse stretching, 0 to
> +   disable. Default: 0.
> +- maxim,pwm-zero-fan-can-fail- 0: Fan failure detection disabled 
> when PWM is
> +  ramping to 0%.
> +   1: Fan failure detection enabled for all PWM
> +  values.
> +   Default: 0.

All these can be boolean...

> +- maxim,temp1-label  - String: Hwmon temp1_label.
> +- maxim,temp2-label  - String: Hwmon temp2_label.
> +- maxim,temp2-ideality   - Set ideality factor for the remote 
> temperature
> +   sensor. Integer with range 0 to 63,
> +   representing a multiplication factor of 0.9844
> +   to 1.0489. Default: 24 (1.0080).

No maxim,temp1-ideality? Not sure what to do with these, but perhaps 
also as sub-nodes. Surely we have some bindings already for devices with 
multiple temp sensors. Don't invent something custom here.

Rob
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[PATCH v7 01/23] PCI: endpoint: Add EP core layer to enable EP controller and EP functions

2017-04-10 Thread Kishon Vijay Abraham I 
Introduce a new EP core layer in order to support endpoint functions in
linux kernel. This comprises the EPC library (Endpoint Controller Library)
and EPF library (Endpoint Function Library). EPC library implements
functions specific to an endpoint controller and EPF library implements
functions specific to an endpoint function.

Signed-off-by: Kishon Vijay Abraham I 
Acked-by: Joao Pinto 
Signed-off-by: Bjorn Helgaas 
---
Changes from v6:
*) Avoid NULL pointer dereferencing errors in pci-epf-core.c
*) Fixed few cleanups missing in the error handling path

 drivers/Makefile|   2 +
 drivers/pci/Kconfig |   1 +
 drivers/pci/endpoint/Kconfig|  20 ++
 drivers/pci/endpoint/Makefile   |   6 +
 drivers/pci/endpoint/pci-epc-core.c | 576 
 drivers/pci/endpoint/pci-epc-mem.c  | 143 +
 drivers/pci/endpoint/pci-epf-core.c | 355 ++
 include/linux/mod_devicetable.h |  10 +
 include/linux/pci-epc.h | 142 +
 include/linux/pci-epf.h | 160 ++
 10 files changed, 1415 insertions(+)
 create mode 100644 drivers/pci/endpoint/Kconfig
 create mode 100644 drivers/pci/endpoint/Makefile
 create mode 100644 drivers/pci/endpoint/pci-epc-core.c
 create mode 100644 drivers/pci/endpoint/pci-epc-mem.c
 create mode 100644 drivers/pci/endpoint/pci-epf-core.c
 create mode 100644 include/linux/pci-epc.h
 create mode 100644 include/linux/pci-epf.h

diff --git a/drivers/Makefile b/drivers/Makefile
index 2eced9afba53..a5f8e43b2c4d 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -14,7 +14,9 @@ obj-$(CONFIG_GENERIC_PHY) += phy/
 obj-$(CONFIG_PINCTRL)  += pinctrl/
 obj-$(CONFIG_GPIOLIB)  += gpio/
 obj-y  += pwm/
+
 obj-$(CONFIG_PCI)  += pci/
+obj-$(CONFIG_PCI_ENDPOINT) += pci/endpoint/
 # PCI dwc controller drivers
 obj-y  += pci/dwc/
 
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index df141420c902..9747c1ec8c74 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -134,3 +134,4 @@ config PCI_HYPERV
 source "drivers/pci/hotplug/Kconfig"
 source "drivers/pci/dwc/Kconfig"
 source "drivers/pci/host/Kconfig"
+source "drivers/pci/endpoint/Kconfig"
diff --git a/drivers/pci/endpoint/Kconfig b/drivers/pci/endpoint/Kconfig
new file mode 100644
index ..a5442ace7077
--- /dev/null
+++ b/drivers/pci/endpoint/Kconfig
@@ -0,0 +1,20 @@
+#
+# PCI Endpoint Support
+#
+
+menu "PCI Endpoint"
+
+config PCI_ENDPOINT
+   bool "PCI Endpoint Support"
+   help
+  Enable this configuration option to support configurable PCI
+  endpoint. This should be enabled if the platform has a PCI
+  controller that can operate in endpoint mode.
+
+  Enabling this option will build the endpoint library, which
+  includes endpoint controller library and endpoint function
+  library.
+
+  If in doubt, say "N" to disable Endpoint support.
+
+endmenu
diff --git a/drivers/pci/endpoint/Makefile b/drivers/pci/endpoint/Makefile
new file mode 100644
index ..dc1bc16491e6
--- /dev/null
+++ b/drivers/pci/endpoint/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile for PCI Endpoint Support
+#
+
+obj-$(CONFIG_PCI_ENDPOINT) += pci-epc-core.o pci-epf-core.o\
+  pci-epc-mem.o
diff --git a/drivers/pci/endpoint/pci-epc-core.c 
b/drivers/pci/endpoint/pci-epc-core.c
new file mode 100644
index ..7c71dd94721c
--- /dev/null
+++ b/drivers/pci/endpoint/pci-epc-core.c
@@ -0,0 +1,576 @@
+/**
+ * PCI Endpoint *Controller* (EPC) library
+ *
+ * Copyright (C) 2017 Texas Instruments
+ * Author: Kishon Vijay Abraham I 
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+static struct class *pci_epc_class;
+
+static void devm_pci_epc_release(struct device *dev, void *res)
+{
+   struct pci_epc *epc = *(struct pci_epc **)res;
+
+   pci_epc_destroy(epc);
+}
+
+static int devm_pci_epc_match(struct device *dev, void *res, void *match_data)
+{
+   struct pci_epc **epc = res;
+
+   return *epc == match_data;
+}
+
+/**
+ * pci_epc_put() - release the PCI endpoint controller
+ * @epc: epc returned by pci_epc_get()
+ *
+ * release the refcount the caller obtained by invoking pci_epc_get()
+