Re: [PATCH v10 08/12] mfd: intel-peci-client: Add PECI client driver
On 1/14/2019 3:42 AM, Joel Stanley wrote: On Tue, 8 Jan 2019 at 08:11, Jae Hyun Yoo wrote: This commit adds PECI client driver. It looks like it's a PECI driver for the three CPU families, and it implements cpu and dimm temp, with sideband functions deferred to the future. If you add that information with a few more words it would make for a nicer commit message. Yes, that would be nicer. I'll add the description into the commit message. Thanks for your review! Regards, Jae Signed-off-by: Jae Hyun Yoo Reviewed-by: Joel Stanley
Re: [PATCH v10 09/12] Documentation: hwmon: Add documents for PECI hwmon client drivers
On 1/14/2019 3:43 AM, Joel Stanley wrote: On Tue, 8 Jan 2019 at 08:11, Jae Hyun Yoo wrote: This commit adds hwmon documents for PECI cputemp and dimmtemp drivers. Cc: Guenter Roeck Cc: Jean Delvare Cc: Jonathan Corbet Cc: Jason M Biils Cc: Randy Dunlap Signed-off-by: Jae Hyun Yoo Reviewed-by: Haiyue Wang Reviewed-by: James Feist Reviewed-by: Vernon Mauery Acked-by: Guenter Roeck Reviewed-by: Joel Stanley Hi Joel, Thank you so much for your careful review on this patch series. I'll submit v11 soon to address your review comments. Regards, Jae
[PATCH v10 06/12] peci: Add a PECI adapter driver for Aspeed AST24xx/AST25xx
This commit adds PECI adapter driver implementation for Aspeed AST24xx/AST25xx SoCs. Cc: Joel Stanley Cc: Andrew Jeffery Cc: Andy Shevchenko Cc: Greg Kroah-Hartman Cc: Robin Murphy Cc: Ryan Chen Signed-off-by: Jae Hyun Yoo Reviewed-by: Haiyue Wang Reviewed-by: James Feist Reviewed-by: Vernon Mauery --- drivers/peci/Kconfig | 27 ++ drivers/peci/Makefile | 3 + drivers/peci/peci-aspeed.c | 505 + 3 files changed, 535 insertions(+) create mode 100644 drivers/peci/peci-aspeed.c diff --git a/drivers/peci/Kconfig b/drivers/peci/Kconfig index 4ccacb22a356..9e9845ebcff4 100644 --- a/drivers/peci/Kconfig +++ b/drivers/peci/Kconfig @@ -10,3 +10,30 @@ config PECI The Platform Environment Control Interface (PECI) is a one-wire bus interface that provides a communication channel from Intel processors and chipset components to external monitoring or control devices. + + If you want PECI support, you should say Y here and also to the + specific driver for your bus adapter(s) below. + +if PECI + +# +# PECI hardware bus configuration +# + +menu "PECI Hardware Bus support" + +config PECI_ASPEED + tristate "ASPEED PECI support" + select REGMAP_MMIO + depends on OF + depends on ARCH_ASPEED || COMPILE_TEST + help + Say Y here if you want support for the Platform Environment Control + Interface (PECI) bus adapter driver on the ASPEED SoCs. + + This support is also available as a module. If so, the module + will be called peci-aspeed. + +endmenu + +endif # PECI diff --git a/drivers/peci/Makefile b/drivers/peci/Makefile index 9e8615e0d3ff..886285e69765 100644 --- a/drivers/peci/Makefile +++ b/drivers/peci/Makefile @@ -4,3 +4,6 @@ # Core functionality obj-$(CONFIG_PECI) += peci-core.o + +# Hardware specific bus drivers +obj-$(CONFIG_PECI_ASPEED) += peci-aspeed.o diff --git a/drivers/peci/peci-aspeed.c b/drivers/peci/peci-aspeed.c new file mode 100644 index ..2293d4e56e63 --- /dev/null +++ b/drivers/peci/peci-aspeed.c @@ -0,0 +1,505 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2012-2017 ASPEED Technology Inc. +// Copyright (c) 2018-2019 Intel Corporation + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* ASPEED PECI Registers */ +#define ASPEED_PECI_CTRL 0x00 +#define ASPEED_PECI_TIMING 0x04 +#define ASPEED_PECI_CMD 0x08 +#define ASPEED_PECI_CMD_CTRL 0x0c +#define ASPEED_PECI_EXP_FCS 0x10 +#define ASPEED_PECI_CAP_FCS 0x14 +#define ASPEED_PECI_INT_CTRL 0x18 +#define ASPEED_PECI_INT_STS 0x1c +#define ASPEED_PECI_W_DATA0 0x20 +#define ASPEED_PECI_W_DATA1 0x24 +#define ASPEED_PECI_W_DATA2 0x28 +#define ASPEED_PECI_W_DATA3 0x2c +#define ASPEED_PECI_R_DATA0 0x30 +#define ASPEED_PECI_R_DATA1 0x34 +#define ASPEED_PECI_R_DATA2 0x38 +#define ASPEED_PECI_R_DATA3 0x3c +#define ASPEED_PECI_W_DATA4 0x40 +#define ASPEED_PECI_W_DATA5 0x44 +#define ASPEED_PECI_W_DATA6 0x48 +#define ASPEED_PECI_W_DATA7 0x4c +#define ASPEED_PECI_R_DATA4 0x50 +#define ASPEED_PECI_R_DATA5 0x54 +#define ASPEED_PECI_R_DATA6 0x58 +#define ASPEED_PECI_R_DATA7 0x5c + +/* ASPEED_PECI_CTRL - 0x00 : Control Register */ +#define PECI_CTRL_SAMPLING_MASK GENMASK(19, 16) +#define PECI_CTRL_READ_MODE_MASK GENMASK(13, 12) +#define PECI_CTRL_READ_MODE_COUNTBIT(12) +#define PECI_CTRL_READ_MODE_DBG BIT(13) +#define PECI_CTRL_CLK_SOURCE_MASKBIT(11) +#define PECI_CTRL_CLK_DIV_MASK GENMASK(10, 8) +#define PECI_CTRL_INVERT_OUT BIT(7) +#define PECI_CTRL_INVERT_IN BIT(6) +#define PECI_CTRL_BUS_CONTENT_EN BIT(5) +#define PECI_CTRL_PECI_ENBIT(4) +#define PECI_CTRL_PECI_CLK_ENBIT(0) + +/* ASPEED_PECI_TIMING - 0x04 : Timing Negotiation Register */ +#define PECI_TIMING_MESSAGE_MASK GENMASK(15, 8) +#define PECI_TIMING_ADDRESS_MASK GENMASK(7, 0) + +/* ASPEED_PECI_CMD - 0x08 : Command Register */ +#define PECI_CMD_PIN_MON BIT(31) +#define PECI_CMD_STS_MASKGENMASK(27, 24) +#define PECI_CMD_IDLE_MASK (PECI_CMD_STS_MASK | PECI_CMD_PIN_MON) +#define PECI_CMD_FIREBIT(0) + +/* ASPEED_PECI_LEN - 0x0C : Read/Write Length Register */ +#define PECI_AW_FCS_EN BIT(31) +#define PECI_READ_LEN_MASK GENMASK(23, 16) +#define PECI_WRITE_LEN_MASK GENMASK(15, 8) +#define PECI_TAGET_ADDR_MASK GENMASK(7, 0) + +/* ASPEED_PECI_EXP_FCS - 0x10 : Expected FCS Data Register */ +#define PECI_EXPECT_READ_FCS_MASKGENMASK(23, 16) +#define PECI_EXPECT_AW_FCS_AUTO_MASK GENMASK(15, 8) +#define PECI_EXPECT_WRITE_FCS_MASK GENMASK(7, 0) + +/* ASPEED_PECI_CAP_FCS - 0x14 : Captured FCS Data Register */ +#define PECI_CAPTURE_READ_FCS_MASK GENMASK(23, 16) +#define PECI_CAPTURE_WRITE_FCS_MASK GENMASK(7, 0) + +/* ASPEED_PECI_INT_
[PATCH v10 02/12] Documentation: ioctl: Add ioctl numbers for PECI subsystem
This commit updates ioctl-number.txt to reflect ioctl numbers used by the PECI subsystem. Cc: Jonathan Corbet Cc: Greg Kroah-Hartman Cc: Kishon Vijay Abraham I Cc: Lorenzo Pieralisi Cc: Gustavo Pimentel Cc: Darrick J. Wong Cc: Tomohiro Kusumi Cc: Eric Sandeen Cc: Frederic Barrat Cc: Bryant G. Ly Cc: Arnd Bergmann Cc: James Feist Cc: Jason M Biils Cc: Vernon Mauery Signed-off-by: Jae Hyun Yoo --- Documentation/ioctl/ioctl-number.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt index c9558146ac58..aec1215bf6fd 100644 --- a/Documentation/ioctl/ioctl-number.txt +++ b/Documentation/ioctl/ioctl-number.txt @@ -327,6 +327,8 @@ Code Seq#(hex) Include FileComments 0xB4 00-0F linux/gpio.h<mailto:linux-g...@vger.kernel.org> 0xB5 00-0F uapi/linux/rpmsg.h <mailto:linux-remotep...@vger.kernel.org> 0xB6 all linux/fpga-dfl.h +0xB7 00-0F uapi/linux/peci-ioctl.h PECI subsystem + <mailto:jae.hyun@linux.intel.com> 0xC0 00-0F linux/usb/iowarrior.h 0xCA 00-0F uapi/misc/cxl.h 0xCA 10-2F uapi/misc/ocxl.h -- 2.20.1
[PATCH v10 05/12] ARM: dts: aspeed: peci: Add PECI node
This commit adds PECI bus/adapter node of AST24xx/AST25xx into
aspeed-g4 and aspeed-g5.
Cc: Rob Herring
Cc: Mark Rutland
Cc: Joel Stanley
Cc: Andrew Jeffery
Cc: Jason M Biils
Cc: Ryan Chen
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
---
arch/arm/boot/dts/aspeed-g4.dtsi | 26 ++
arch/arm/boot/dts/aspeed-g5.dtsi | 26 ++
2 files changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 69f6b9d2e7e7..fa5c358e199c 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -29,6 +29,7 @@
serial3 = &uart4;
serial4 = &uart5;
serial5 = &vuart;
+ peci0 = &peci0;
};
cpus {
@@ -317,6 +318,13 @@
};
};
+ peci: bus@1e78b000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e78b000 0x60>;
+ };
+
uart2: serial@1e78d000 {
compatible = "ns16550a";
reg = <0x1e78d000 0x20>;
@@ -360,6 +368,24 @@
};
};
+&peci {
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2400-peci";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <15>;
+ clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
+ resets = <&syscon ASPEED_RESET_PECI>;
+ clock-frequency = <2400>;
+ msg-timing = <1>;
+ addr-timing = <1>;
+ rd-sampling-point = <8>;
+ cmd-timeout-ms = <1000>;
+ status = "disabled";
+ };
+};
+
&i2c {
i2c_ic: interrupt-controller@0 {
#interrupt-cells = <1>;
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index d107459fc0f8..63900714fbd7 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -29,6 +29,7 @@
serial3 = &uart4;
serial4 = &uart5;
serial5 = &vuart;
+ peci0 = &peci0;
};
cpus {
@@ -377,6 +378,13 @@
};
};
+ peci: bus@1e78b000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e78b000 0x60>;
+ };
+
uart2: serial@1e78d000 {
compatible = "ns16550a";
reg = <0x1e78d000 0x20>;
@@ -420,6 +428,24 @@
};
};
+&peci {
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2500-peci";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <15>;
+ clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
+ resets = <&syscon ASPEED_RESET_PECI>;
+ clock-frequency = <2400>;
+ msg-timing = <1>;
+ addr-timing = <1>;
+ rd-sampling-point = <8>;
+ cmd-timeout-ms = <1000>;
+ status = "disabled";
+ };
+};
+
&i2c {
i2c_ic: interrupt-controller@0 {
#interrupt-cells = <1>;
--
2.20.1
[PATCH v10 03/12] peci: Add support for PECI bus driver core
This commit adds driver implementation for PECI bus core into linux driver framework. PECI (Platform Environment Control Interface) is a one-wire bus interface that provides a communication channel from Intel processors and chipset components to external monitoring or control devices. PECI is designed to support the following sideband functions: * Processor and DRAM thermal management - Processor fan speed control is managed by comparing Digital Thermal Sensor (DTS) thermal readings acquired via PECI against the processor-specific fan speed control reference point, or TCONTROL. Both TCONTROL and DTS thermal readings are accessible via the processor PECI client. These variables are referenced to a common temperature, the TCC activation point, and are both defined as negative offsets from that reference. - PECI based access to the processor package configuration space provides a means for Baseboard Management Controllers (BMC) or other platform management devices to actively manage the processor and memory power and thermal features. * Platform Manageability - Platform manageability functions including thermal, power, and error monitoring. Note that platform 'power' management includes monitoring and control for both the processor and DRAM subsystem to assist with data center power limiting. - PECI allows read access to certain error registers in the processor MSR space and status monitoring registers in the PCI configuration space within the processor and downstream devices. - PECI permits writes to certain registers in the processor PCI configuration space. * Processor Interface Tuning and Diagnostics - Processor interface tuning and diagnostics capabilities (Intel Interconnect BIST). The processors Intel Interconnect Built In Self Test (Intel IBIST) allows for infield diagnostic capabilities in the Intel UPI and memory controller interfaces. PECI provides a port to execute these diagnostics via its PCI Configuration read and write capabilities. * Failure Analysis - Output the state of the processor after a failure for analysis via Crashdump. PECI uses a single wire for self-clocking and data transfer. The bus requires no additional control lines. The physical layer is a self-clocked one-wire bus that begins each bit with a driven, rising edge from an idle level near zero volts. The duration of the signal driven high depends on whether the bit value is a logic '0' or logic '1'. PECI also includes variable data transfer rate established with every message. In this way, it is highly flexible even though underlying logic is simple. The interface design was optimized for interfacing between an Intel processor and chipset components in both single processor and multiple processor environments. The single wire interface provides low board routing overhead for the multiple load connections in the congested routing area near the processor and chipset components. Bus speed, error checking, and low protocol overhead provides adequate link bandwidth and reliability to transfer critical device operating conditions and configuration information. This implementation provides the basic framework to add PECI extensions to the Linux bus and device models. A hardware specific 'Adapter' driver can be attached to the PECI bus to provide sideband functions described above. It is also possible to access all devices on an adapter from userspace through the /dev interface. A device specific 'Client' driver also can be attached to the PECI bus so each processor client's features can be supported by the 'Client' driver through an adapter connection in the bus. Cc: Greg Kroah-Hartman Cc: Philippe Ombredanne Cc: Gavin Schenk Cc: Vinod Koul Cc: Thomas Gleixner Cc: Sagar Dharia Cc: David Kershner Cc: Johan Hovold Cc: Uwe Kleine-Konig Cc: Viresh Kumar Cc: Randy Dunlap Cc: Cyrille Pitchen Cc: Juergen Gross Cc: Alan Cox Cc: Andrew Lunn Cc: Andy Shevchenko Cc: Arnd Bergmann Cc: Benjamin Herrenschmidt Cc: Fengguang Wu Cc: Jason M Biils Cc: Julia Cartwright Signed-off-by: Jae Hyun Yoo Signed-off-by: Fengguang Wu Reviewed-by: Haiyue Wang Reviewed-by: James Feist Reviewed-by: Vernon Mauery --- drivers/Kconfig |2 + drivers/Makefile|1 + drivers/peci/Kconfig| 12 + drivers/peci/Makefile |6 + drivers/peci/peci-core.c| 1527 +++ include/linux/peci.h| 142 +++ include/uapi/linux/peci-ioctl.h | 403 7 files changed, 2093 insertions(+) create mode 100644 drivers/peci/Kconfig create mode 100644 drivers/peci/Makefile create mode 100644 drivers/peci/peci-core.c create mode 100644 include/linux/peci.h create mode 100644 include/uapi/linux/peci-ioctl.h diff --git a/drivers/Kconfig b/drivers/Kconfig index 4f9f99057ff8..bbb66439
[PATCH v10 00/12] PECI device driver introduction
ion logic to support dynamic creation. - Removed indexing gap on core temperature and DIMM temperature attributes. - Improved hwmon registration and dynamic attribute creation logic. - Fixed structure definitions in PECI uapi header to make that use __u8, __u16 and etc. - Modified wait_for_completion_interruptible_timeout error handling logic in Aspeed PECI driver to deliver errors correctly. - Removed low-level xfer command from ioctl and kept only high-level PECI command suite as ioctls. - Fixed I/O timeout logic in Aspeed PECI driver using ktime. - Added a function into hwmon driver to simplify update delay checking. - Added a function into hwmon driver to convert 10.6 to millidegree. - Dropped non-standard attributes in hwmon driver. - Fixed OF table for hwmon to make it indicate as a PECI client of Intel CPU target. - Added a maintainer of PECI subsystem into MAINTAINERS document. Jae Hyun Yoo (12): dt-bindings: Add a document of PECI subsystem Documentation: ioctl: Add ioctl numbers for PECI subsystem peci: Add support for PECI bus driver core dt-bindings: Add a document of PECI adapter driver for ASPEED AST24xx/25xx SoCs ARM: dts: aspeed: peci: Add PECI node peci: Add a PECI adapter driver for Aspeed AST24xx/AST25xx dt-bindings: mfd: Add a document for PECI client driver mfd: intel-peci-client: Add PECI client driver Documentation: hwmon: Add documents for PECI hwmon client drivers hwmon: Add PECI cputemp driver hwmon: Add PECI dimmtemp driver Add maintainers for the PECI subsystem .../bindings/mfd/intel-peci-client.txt| 34 + .../devicetree/bindings/peci/peci-aspeed.txt | 55 + .../devicetree/bindings/peci/peci.txt | 43 + Documentation/hwmon/peci-cputemp | 78 + Documentation/hwmon/peci-dimmtemp | 50 + Documentation/ioctl/ioctl-number.txt |2 + MAINTAINERS | 22 + arch/arm/boot/dts/aspeed-g4.dtsi | 26 + arch/arm/boot/dts/aspeed-g5.dtsi | 26 + drivers/Kconfig |2 + drivers/Makefile |1 + drivers/hwmon/Kconfig | 28 + drivers/hwmon/Makefile|2 + drivers/hwmon/peci-cputemp.c | 394 + drivers/hwmon/peci-dimmtemp.c | 284 +++ drivers/hwmon/peci-hwmon.h| 49 + drivers/mfd/Kconfig | 14 + drivers/mfd/Makefile |1 + drivers/mfd/intel-peci-client.c | 143 ++ drivers/peci/Kconfig | 39 + drivers/peci/Makefile |9 + drivers/peci/peci-aspeed.c| 505 ++ drivers/peci/peci-core.c | 1527 + include/linux/mfd/intel-peci-client.h | 108 ++ include/linux/peci.h | 142 ++ include/uapi/linux/peci-ioctl.h | 403 + 26 files changed, 3987 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/intel-peci-client.txt create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.txt create mode 100644 Documentation/devicetree/bindings/peci/peci.txt create mode 100644 Documentation/hwmon/peci-cputemp create mode 100644 Documentation/hwmon/peci-dimmtemp create mode 100644 drivers/hwmon/peci-cputemp.c create mode 100644 drivers/hwmon/peci-dimmtemp.c create mode 100644 drivers/hwmon/peci-hwmon.h create mode 100644 drivers/mfd/intel-peci-client.c create mode 100644 drivers/peci/Kconfig create mode 100644 drivers/peci/Makefile create mode 100644 drivers/peci/peci-aspeed.c create mode 100644 drivers/peci/peci-core.c create mode 100644 include/linux/mfd/intel-peci-client.h create mode 100644 include/linux/peci.h create mode 100644 include/uapi/linux/peci-ioctl.h -- 2.20.1
[PATCH v10 09/12] Documentation: hwmon: Add documents for PECI hwmon client drivers
This commit adds hwmon documents for PECI cputemp and dimmtemp drivers. Cc: Guenter Roeck Cc: Jean Delvare Cc: Jonathan Corbet Cc: Jason M Biils Cc: Randy Dunlap Signed-off-by: Jae Hyun Yoo Reviewed-by: Haiyue Wang Reviewed-by: James Feist Reviewed-by: Vernon Mauery Acked-by: Guenter Roeck --- Documentation/hwmon/peci-cputemp | 78 +++ Documentation/hwmon/peci-dimmtemp | 50 2 files changed, 128 insertions(+) create mode 100644 Documentation/hwmon/peci-cputemp create mode 100644 Documentation/hwmon/peci-dimmtemp diff --git a/Documentation/hwmon/peci-cputemp b/Documentation/hwmon/peci-cputemp new file mode 100644 index ..821a9258f2e6 --- /dev/null +++ b/Documentation/hwmon/peci-cputemp @@ -0,0 +1,78 @@ +Kernel driver peci-cputemp +== + +Supported chips: + One of Intel server CPUs listed below which is connected to a PECI bus. + * Intel Xeon E5/E7 v3 server processors + Intel Xeon E5-14xx v3 family + Intel Xeon E5-24xx v3 family + Intel Xeon E5-16xx v3 family + Intel Xeon E5-26xx v3 family + Intel Xeon E5-46xx v3 family + Intel Xeon E7-48xx v3 family + Intel Xeon E7-88xx v3 family + * Intel Xeon E5/E7 v4 server processors + Intel Xeon E5-16xx v4 family + Intel Xeon E5-26xx v4 family + Intel Xeon E5-46xx v4 family + Intel Xeon E7-48xx v4 family + Intel Xeon E7-88xx v4 family + * Intel Xeon Scalable server processors + Intel Xeon Bronze family + Intel Xeon Silver family + Intel Xeon Gold family + Intel Xeon Platinum family + Addresses scanned: PECI client address 0x30 - 0x37 + Datasheet: Available from http://www.intel.com/design/literature.htm + +Author: + Jae Hyun Yoo + +Description +--- + +This driver implements a generic PECI hwmon feature which provides Digital +Thermal Sensor (DTS) thermal readings of the CPU package and CPU cores that are +accessible using the PECI Client Command Suite via the processor PECI client. + +All temperature values are given in millidegree Celsius and will be measurable +only when the target CPU is powered on. + +sysfs attributes + + +temp1_label"Die" +temp1_inputProvides current die temperature of the CPU package. +temp1_max Provides thermal control temperature of the CPU package + which is also known as Tcontrol. +temp1_crit Provides shutdown temperature of the CPU package which + is also known as the maximum processor junction + temperature, Tjmax or Tprochot. +temp1_crit_hystProvides the hysteresis value from Tcontrol to Tjmax of + the CPU package. + +temp2_label"Tcontrol" +temp2_inputProvides current Tcontrol temperature of the CPU + package which is also known as Fan Temperature target. + Indicates the relative value from thermal monitor trip + temperature at which fans should be engaged. +temp2_crit Provides Tcontrol critical value of the CPU package + which is same to Tjmax. + +temp3_label"Tthrottle" +temp3_inputProvides current Tthrottle temperature of the CPU + package. Used for throttling temperature. If this value + is allowed and lower than Tjmax - the throttle will + occur and reported at lower than Tjmax. + +temp4_label"Tjmax" +temp4_inputProvides the maximum junction temperature, Tjmax of the + CPU package. + +temp[5-*]_labelProvides string "Core X", where X is resolved core + number. +temp[5-*]_inputProvides current temperature of each core. +temp[5-*]_max Provides thermal control temperature of the core. +temp[5-*]_crit Provides shutdown temperature of the core. +temp[5-*]_crit_hystProvides the hysteresis value from Tcontrol to Tjmax of + the core. diff --git a/Documentation/hwmon/peci-dimmtemp b/Documentation/hwmon/peci-dimmtemp new file mode 100644 index ..c54f2526188c --- /dev/null +++ b/Documentation/hwmon/peci-dimmtemp @@ -0,0 +1,50 @@ +Kernel driver peci-dimmtemp +=== + +Supported chips: + One of Intel server CPUs listed below which is connected to a PECI bus. + * Intel Xeon E5/E7 v3 server processors +
[PATCH v10 11/12] hwmon: Add PECI dimmtemp driver
This commit adds PECI dimmtemp hwmon driver.
Cc: Guenter Roeck
Cc: Jean Delvare
Cc: Alan Cox
Cc: Andrew Jeffery
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Jason M Biils
Cc: Joel Stanley
Cc: Miguel Ojeda
Cc: Andrew Lunn
Cc: Stef van Os
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Acked-by: Guenter Roeck
---
drivers/hwmon/Kconfig | 14 ++
drivers/hwmon/Makefile| 1 +
drivers/hwmon/peci-dimmtemp.c | 284 ++
3 files changed, 299 insertions(+)
create mode 100644 drivers/hwmon/peci-dimmtemp.c
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index c2eaadcf6525..996e80590b5b 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1324,6 +1324,20 @@ config SENSORS_PECI_CPUTEMP
This driver can also be built as a module. If so, the module
will be called peci-cputemp.
+config SENSORS_PECI_DIMMTEMP
+ tristate "PECI DIMM temperature monitoring support"
+ depends on PECI
+ select MFD_INTEL_PECI_CLIENT
+ help
+ If you say yes here you get support for the generic Intel PECI hwmon
+ driver which provides Digital Thermal Sensor (DTS) thermal readings of
+ DIMM components that are accessible using the PECI Client Command
+ Suite via the processor PECI client.
+ Check Documentation/hwmon/peci-dimmtemp for details.
+
+ This driver can also be built as a module. If so, the module
+ will be called peci-dimmtemp.
+
source "drivers/hwmon/pmbus/Kconfig"
config SENSORS_PWM_FAN
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index f37117fb9af3..c2c8bb55a67a 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -142,6 +142,7 @@ obj-$(CONFIG_SENSORS_PC87360) += pc87360.o
obj-$(CONFIG_SENSORS_PC87427) += pc87427.o
obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o
obj-$(CONFIG_SENSORS_PECI_CPUTEMP) += peci-cputemp.o
+obj-$(CONFIG_SENSORS_PECI_DIMMTEMP)+= peci-dimmtemp.o
obj-$(CONFIG_SENSORS_POWR1220) += powr1220.o
obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o
obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON)+= raspberrypi-hwmon.o
diff --git a/drivers/hwmon/peci-dimmtemp.c b/drivers/hwmon/peci-dimmtemp.c
new file mode 100644
index ..6e90d9bfeb45
--- /dev/null
+++ b/drivers/hwmon/peci-dimmtemp.c
@@ -0,0 +1,284 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018-2019 Intel Corporation
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "peci-hwmon.h"
+
+#define DIMM_MASK_CHECK_DELAY_JIFFIES msecs_to_jiffies(5000)
+#define DIMM_MASK_CHECK_RETRY_MAX 60 /* 60 x 5 secs = 5 minutes */
+
+struct peci_dimmtemp {
+ struct peci_client_manager *mgr;
+ struct device *dev;
+ char name[PECI_NAME_SIZE];
+ const struct cpu_gen_info *gen_info;
+ struct workqueue_struct *work_queue;
+ struct delayed_work work_handler;
+ struct temp_data temp[DIMM_NUMS_MAX];
+ u32 dimm_mask;
+ int retry_count;
+ u32 temp_config[DIMM_NUMS_MAX + 1];
+ struct hwmon_channel_info temp_info;
+ const struct hwmon_channel_info *info[2];
+ struct hwmon_chip_info chip;
+};
+
+static const char *dimmtemp_label[CHAN_RANK_MAX][DIMM_IDX_MAX] = {
+ { "DIMM A1", "DIMM A2", "DIMM A3" },
+ { "DIMM B1", "DIMM B2", "DIMM B3" },
+ { "DIMM C1", "DIMM C2", "DIMM C3" },
+ { "DIMM D1", "DIMM D2", "DIMM D3" },
+ { "DIMM E1", "DIMM E2", "DIMM E3" },
+ { "DIMM F1", "DIMM F2", "DIMM F3" },
+ { "DIMM G1", "DIMM G2", "DIMM G3" },
+ { "DIMM H1", "DIMM H2", "DIMM H3" },
+};
+
+static int get_dimm_temp(struct peci_dimmtemp *priv, int dimm_no)
+{
+ int dimm_order = dimm_no % priv->gen_info->dimm_idx_max;
+ int chan_rank = dimm_no / priv->gen_info->dimm_idx_max;
+ u8 cfg_data[4];
+ int rc;
+
+ if (!peci_temp_need_update(&priv->temp[dimm_no]))
+ return 0;
+
+ rc = peci_client_read_package_config(priv->mgr,
+MBX_INDEX_DDR_DIMM_TEMP,
+chan_rank, cfg_data);
+ if (rc)
+ return rc;
+
+ priv->temp[dimm_no].value = cfg_data[dimm_order] * 1000;
+
+ peci_temp_mark_updated(&priv->temp[dimm_no]);
+
+ return 0;
+}
+
+static int dimmtemp_read_string(struct device *dev,
+ enum hwmon_sensor_types type,
+ u32 attr, int channel, const char **str)
+{
+ struct peci_dimmtemp *priv = dev_get_drvdata(dev);
+
[PATCH v10 07/12] dt-bindings: mfd: Add a document for PECI client driver
This commit adds a dt-bindings document for PECI client driver.
Cc: Lee Jones
Cc: Rob Herring
Cc: Mark Rutland
Cc: Andrew Jeffery
Cc: James Feist
Cc: Jason M Biils
Cc: Joel Stanley
Cc: Vernon Mauery
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Rob Herring
---
.../bindings/mfd/intel-peci-client.txt| 34 +++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/intel-peci-client.txt
diff --git a/Documentation/devicetree/bindings/mfd/intel-peci-client.txt
b/Documentation/devicetree/bindings/mfd/intel-peci-client.txt
new file mode 100644
index ..5d1d5d0a552f
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/intel-peci-client.txt
@@ -0,0 +1,34 @@
+* Intel PECI client bindings
+
+PECI (Platform Environment Control Interface) is a one-wire bus interface that
+provides a communication channel from PECI clients in Intel processors and
+chipset components to external monitoring or control devices. PECI is designed
+to support the following sideband functions:
+
+- Processor and DRAM thermal management
+- Platform Manageability
+- Processor Interface Tuning and Diagnostics
+- Failure Analysis
+
+Required properties:
+- compatible : Should be "intel,peci-client".
+- reg: Should contain address of a client CPU. According to the PECI
+ specification, client addresses start from 0x30.
+
+Example:
+ peci-bus@0 {
+ compatible = "vendor,soc-peci";
+ reg = <0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ peci-client@30 {
+ compatible = "intel,peci-client";
+ reg = <0x30>;
+ };
+
+ peci-client@31 {
+ compatible = "intel,peci-client";
+ reg = <0x31>;
+ };
+ };
--
2.20.1
[PATCH v10 10/12] hwmon: Add PECI cputemp driver
This commit adds PECI cputemp hwmon driver.
Cc: Guenter Roeck
Cc: Jean Delvare
Cc: Alan Cox
Cc: Andrew Jeffery
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Jason M Biils
Cc: Joel Stanley
Cc: Miguel Ojeda
Cc: Andrew Lunn
Cc: Stef van Os
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Acked-by: Guenter Roeck
---
drivers/hwmon/Kconfig| 14 ++
drivers/hwmon/Makefile | 1 +
drivers/hwmon/peci-cputemp.c | 394 +++
drivers/hwmon/peci-hwmon.h | 49 +
4 files changed, 458 insertions(+)
create mode 100644 drivers/hwmon/peci-cputemp.c
create mode 100644 drivers/hwmon/peci-hwmon.h
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 6f929bfa9fcd..c2eaadcf6525 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1310,6 +1310,20 @@ config SENSORS_PCF8591
These devices are hard to detect and rarely found on mainstream
hardware. If unsure, say N.
+config SENSORS_PECI_CPUTEMP
+ tristate "PECI CPU temperature monitoring support"
+ depends on PECI
+ select MFD_INTEL_PECI_CLIENT
+ help
+ If you say yes here you get support for the generic Intel PECI
+ cputemp driver which provides Digital Thermal Sensor (DTS) thermal
+ readings of the CPU package and CPU cores that are accessible using
+ the PECI Client Command Suite via the processor PECI client.
+ Check Documentation/hwmon/peci-cputemp for details.
+
+ This driver can also be built as a module. If so, the module
+ will be called peci-cputemp.
+
source "drivers/hwmon/pmbus/Kconfig"
config SENSORS_PWM_FAN
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index f5c7b442e69e..f37117fb9af3 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -141,6 +141,7 @@ obj-$(CONFIG_SENSORS_NTC_THERMISTOR)+=
ntc_thermistor.o
obj-$(CONFIG_SENSORS_PC87360) += pc87360.o
obj-$(CONFIG_SENSORS_PC87427) += pc87427.o
obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o
+obj-$(CONFIG_SENSORS_PECI_CPUTEMP) += peci-cputemp.o
obj-$(CONFIG_SENSORS_POWR1220) += powr1220.o
obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o
obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON)+= raspberrypi-hwmon.o
diff --git a/drivers/hwmon/peci-cputemp.c b/drivers/hwmon/peci-cputemp.c
new file mode 100644
index ..63796d883c82
--- /dev/null
+++ b/drivers/hwmon/peci-cputemp.c
@@ -0,0 +1,394 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018-2019 Intel Corporation
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include "peci-hwmon.h"
+
+#define DEFAULT_CHANNEL_NUMS 4
+#define CORETEMP_CHANNEL_NUMS CORE_NUMS_MAX
+#define CPUTEMP_CHANNEL_NUMS (DEFAULT_CHANNEL_NUMS + CORETEMP_CHANNEL_NUMS)
+
+/* The RESOLVED_CORES register in PCU of a client CPU */
+#define REG_RESOLVED_CORES_BUS 1
+#define REG_RESOLVED_CORES_DEVICE30
+#define REG_RESOLVED_CORES_FUNCTION 3
+#define REG_RESOLVED_CORES_OFFSET0xB4
+
+struct temp_group {
+ struct temp_data die;
+ struct temp_data tcontrol;
+ struct temp_data tthrottle;
+ struct temp_data tjmax;
+ struct temp_data core[CORETEMP_CHANNEL_NUMS];
+};
+
+struct peci_cputemp {
+ struct peci_client_manager *mgr;
+ struct device *dev;
+ char name[PECI_NAME_SIZE];
+ const struct cpu_gen_info *gen_info;
+ struct temp_group temp;
+ u32 core_mask;
+ u32 temp_config[CPUTEMP_CHANNEL_NUMS + 1];
+ uint config_idx;
+ struct hwmon_channel_info temp_info;
+ const struct hwmon_channel_info *info[2];
+ struct hwmon_chip_info chip;
+};
+
+enum cputemp_channels {
+ channel_die,
+ channel_tcontrol,
+ channel_tthrottle,
+ channel_tjmax,
+ channel_core,
+};
+
+static const u32 config_table[DEFAULT_CHANNEL_NUMS + 1] = {
+ /* Die temperature */
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
+
+ /* Tcontrol temperature */
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_CRIT,
+
+ /* Tthrottle temperature */
+ HWMON_T_LABEL | HWMON_T_INPUT,
+
+ /* Tjmax temperature */
+ HWMON_T_LABEL | HWMON_T_INPUT,
+
+ /* Core temperature - for all core channels */
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
+};
+
+static const char *cputemp_label[CPUTEMP_CHANNEL_NUMS] = {
+ "Die",
+ "Tcontrol",
+ "Tthrottle",
+ "Tjmax",
+ "Core 0", "Core 1", "Core 2", "Core 3",
+ "Core 4", "Core 5", "Core 6", "Core 7",
+ "Core 8", "Core 9", "Core 10", "Core 11",
+ "Core 12", "
[PATCH v10 12/12] Add maintainers for the PECI subsystem
This commit adds maintainer information for the PECI subsystem. Cc: David S. Miller Cc: Mauro Carvalho Chehab Cc: Greg Kroah-Hartman Cc: Andrew Morton Cc: Linus Walleij Cc: Randy Dunlap Cc: Jason M Biils Signed-off-by: Jae Hyun Yoo --- MAINTAINERS | 22 ++ 1 file changed, 22 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 32d76a90..64a4447a6c9f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1372,6 +1372,14 @@ F: arch/arm/mach-aspeed/ F: arch/arm/boot/dts/aspeed-* N: aspeed +ARM/ASPEED PECI DRIVER +M: Jae Hyun Yoo +M: Jason M Biils +L: linux-asp...@lists.ozlabs.org (moderated for non-subscribers) +S: Maintained +F: Documentation/devicetree/bindings/peci/peci-aspeed.txt +F: drivers/peci/peci-aspeed.c + ARM/CALXEDA HIGHBANK ARCHITECTURE M: Rob Herring L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers) @@ -11885,6 +11893,20 @@ L: platform-driver-...@vger.kernel.org S: Maintained F: drivers/platform/x86/peaq-wmi.c +PECI SUBSYSTEM +M: Jae Hyun Yoo +M: Jason M Biils +L: open...@lists.ozlabs.org (moderated for non-subscribers) +S: Maintained +F: Documentation/devicetree/bindings/peci/ +F: drivers/mfd/intel-peci-client.c +F: drivers/peci/ +F: drivers/hwmon/peci-*.c +F: drivers/hwmon/peci-hwmon.h +F: include/linux/mfd/intel-peci-client.h +F: include/linux/peci.h +F: include/uapi/linux/peci-ioctl.h + PER-CPU MEMORY ALLOCATOR M: Dennis Zhou M: Tejun Heo -- 2.20.1
[PATCH v10 08/12] mfd: intel-peci-client: Add PECI client driver
This commit adds PECI client driver.
Cc: Lee Jones
Cc: Randy Dunlap
Cc: Rob Herring
Cc: Andrew Jeffery
Cc: James Feist
Cc: Jason M Biils
Cc: Joel Stanley
Cc: Vernon Mauery
Signed-off-by: Jae Hyun Yoo
---
drivers/mfd/Kconfig | 14 +++
drivers/mfd/Makefile | 1 +
drivers/mfd/intel-peci-client.c | 143 ++
include/linux/mfd/intel-peci-client.h | 108 +++
4 files changed, 266 insertions(+)
create mode 100644 drivers/mfd/intel-peci-client.c
create mode 100644 include/linux/mfd/intel-peci-client.h
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 8c5dfdce4326..d021aa8dfa99 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -604,6 +604,20 @@ config MFD_INTEL_MSIC
Passage) chip. This chip embeds audio, battery, GPIO, etc.
devices used in Intel Medfield platforms.
+config MFD_INTEL_PECI_CLIENT
+ bool "Intel PECI client"
+ depends on (PECI || COMPILE_TEST)
+ select MFD_CORE
+ help
+ If you say yes to this option, support will be included for the
+ Intel PECI (Platform Environment Control Interface) client. PECI is a
+ one-wire bus interface that provides a communication channel from PECI
+ clients in Intel processors and chipset components to external
+ monitoring or control devices.
+
+ Additional drivers must be enabled in order to use the functionality
+ of the device.
+
config MFD_IPAQ_MICRO
bool "Atmel Micro ASIC (iPAQ h3100/h3600/h3700) Support"
depends on SA1100_H3100 || SA1100_H3600
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 12980a4ad460..b8c1da8e748b 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -204,6 +204,7 @@ obj-$(CONFIG_MFD_INTEL_LPSS)+= intel-lpss.o
obj-$(CONFIG_MFD_INTEL_LPSS_PCI) += intel-lpss-pci.o
obj-$(CONFIG_MFD_INTEL_LPSS_ACPI) += intel-lpss-acpi.o
obj-$(CONFIG_MFD_INTEL_MSIC) += intel_msic.o
+obj-$(CONFIG_MFD_INTEL_PECI_CLIENT)+= intel-peci-client.o
obj-$(CONFIG_MFD_PALMAS) += palmas.o
obj-$(CONFIG_MFD_VIPERBOARD)+= viperboard.o
obj-$(CONFIG_MFD_RC5T583) += rc5t583.o rc5t583-irq.o
diff --git a/drivers/mfd/intel-peci-client.c b/drivers/mfd/intel-peci-client.c
new file mode 100644
index ..d62442438512
--- /dev/null
+++ b/drivers/mfd/intel-peci-client.c
@@ -0,0 +1,143 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018-2019 Intel Corporation
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define CPU_ID_MODEL_MASK GENMASK(7, 4)
+#define CPU_ID_FAMILY_MASK GENMASK(11, 8)
+#define CPU_ID_EXT_MODEL_MASK GENMASK(19, 16)
+#define CPU_ID_EXT_FAMILY_MASK GENMASK(27, 20)
+
+#define LOWER_NIBBLE_MASK GENMASK(3, 0)
+#define UPPER_NIBBLE_MASK GENMASK(7, 4)
+#define LOWER_BYTE_MASKGENMASK(7, 0)
+#define UPPER_BYTE_MASKGENMASK(16, 8)
+
+static struct mfd_cell peci_functions[] = {
+ { .name = "peci-cputemp", },
+ { .name = "peci-dimmtemp", },
+ /* TODO: Add additional PECI sideband functions into here */
+};
+
+static const struct cpu_gen_info cpu_gen_info_table[] = {
+ { /* Haswell Xeon */
+ .family= 6, /* Family code */
+ .model = INTEL_FAM6_HASWELL_X,
+ .core_max = CORE_MAX_ON_HSX,
+ .chan_rank_max = CHAN_RANK_MAX_ON_HSX,
+ .dimm_idx_max = DIMM_IDX_MAX_ON_HSX },
+ { /* Broadwell Xeon */
+ .family= 6, /* Family code */
+ .model = INTEL_FAM6_BROADWELL_X,
+ .core_max = CORE_MAX_ON_BDX,
+ .chan_rank_max = CHAN_RANK_MAX_ON_BDX,
+ .dimm_idx_max = DIMM_IDX_MAX_ON_BDX },
+ { /* Skylake Xeon */
+ .family= 6, /* Family code */
+ .model = INTEL_FAM6_SKYLAKE_X,
+ .core_max = CORE_MAX_ON_SKX,
+ .chan_rank_max = CHAN_RANK_MAX_ON_SKX,
+ .dimm_idx_max = DIMM_IDX_MAX_ON_SKX },
+};
+
+static int peci_client_get_cpu_gen_info(struct peci_client_manager *priv)
+{
+ struct device *dev = &priv->client->dev;
+ u32 cpu_id;
+ u16 family;
+ u8 model;
+ int ret;
+ int i;
+
+ ret = peci_get_cpu_id(priv->client->adapter, priv->client->addr,
+ &cpu_id);
+ if (ret)
+ return ret;
+
+ family = FIELD_PREP(LOWER_BYTE_MASK,
+ FIELD_GET(CPU_ID_FAMILY_MASK, cpu_id)) |
+FIELD_PREP(UPPER_BYTE_MASK,
+ FIELD_GET(CPU_ID_EXT_FAMILY_MASK, cpu_id));
+ model = FIELD_PREP(LOWER_NIBBLE_MASK,
+ FIELD_GET(CPU_ID_MODEL_MASK, cpu_id)) |
+ FIELD_PREP(UPPER_NIBBLE_MASK,
+
[PATCH v10 01/12] dt-bindings: Add a document of PECI subsystem
This commit adds a document of generic PECI bus, adapter and client
driver.
Cc: Rob Herring
Cc: Mark Rutland
Cc: Andrew Jeffery
Cc: Joel Stanley
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Reviewed-by: Rob Herring
---
.../devicetree/bindings/peci/peci.txt | 43 +++
1 file changed, 43 insertions(+)
create mode 100644 Documentation/devicetree/bindings/peci/peci.txt
diff --git a/Documentation/devicetree/bindings/peci/peci.txt
b/Documentation/devicetree/bindings/peci/peci.txt
new file mode 100644
index ..71f26c7c6e58
--- /dev/null
+++ b/Documentation/devicetree/bindings/peci/peci.txt
@@ -0,0 +1,43 @@
+Generic device tree configuration for PECI adapters
+===
+
+Required properties:
+- #address-cells : Should be <1>. Read more about client addresses below.
+- #size-cells: Should be <0>. Read more about client addresses below.
+
+The cells properties above define that an address of CPU clients of a PECI bus
+are described by a single value.
+
+Example:
+ peci0: peci-bus@0 {
+ compatible = "vendor,soc-peci";
+ reg = <0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+Generic device tree configuration for PECI clients
+==
+
+Required properties:
+- compatible : Should contain name of PECI client.
+- reg: Should contain address of a client CPU. According to the PECI
+ specification, client addresses start from 0x30.
+
+Example:
+ peci-bus@0 {
+ compatible = "vendor,soc-peci";
+ reg = <0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ peci-client@30 {
+ compatible = "intel,peci-client";
+ reg = <0x30>;
+ };
+
+ peci-client@31 {
+ compatible = "intel,peci-client";
+ reg = <0x31>;
+ };
+ };
--
2.20.1
[PATCH v10 04/12] dt-bindings: Add a document of PECI adapter driver for ASPEED AST24xx/25xx SoCs
This commit adds a dt-bindings document of PECI adapter driver for ASPEED
AST24xx/25xx SoCs.
Cc: Mark Rutland
Cc: Joel Stanley
Cc: Andrew Jeffery
Cc: Benjamin Herrenschmidt
Cc: Greg Kroah-Hartman
Cc: Jason M Biils
Cc: Milton Miller II
Cc: Pavel Machek
Cc: Robin Murphy
Cc: Ryan Chen
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Reviewed-by: Rob Herring
---
.../devicetree/bindings/peci/peci-aspeed.txt | 55 +++
1 file changed, 55 insertions(+)
create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.txt
diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.txt
b/Documentation/devicetree/bindings/peci/peci-aspeed.txt
new file mode 100644
index ..cdca73a3b7d8
--- /dev/null
+++ b/Documentation/devicetree/bindings/peci/peci-aspeed.txt
@@ -0,0 +1,55 @@
+Device tree configuration for PECI buses on the AST24XX and AST25XX SoCs.
+
+Required properties:
+- compatible: Should be one of:
+ "aspeed,ast2400-peci"
+ "aspeed,ast2500-peci"
+- reg : Should contain PECI controller registers location and
+ length.
+- #address-cells: Should be <1> required to define a client address.
+- #size-cells : Should be <0> required to define a client address.
+- interrupts: Should contain PECI controller interrupt.
+- clocks: Should contain clock source for PECI controller. Should
+ reference the external oscillator clock in the second
+ cell.
+- resets: Should contain phandle to reset controller with the reset
+ number in the second cell.
+- clock-frequency : Should contain the operation frequency of PECI controller
+ in units of Hz.
+ 187500 ~ 2400
+
+Optional properties:
+- msg-timing: Message timing negotiation period. This value will
+ determine the period of message timing negotiation to be
+ issued by PECI controller. The unit of the programmed
+ value is four times of PECI clock period.
+ 0 ~ 255 (default: 1)
+- addr-timing : Address timing negotiation period. This value will
+ determine the period of address timing negotiation to be
+ issued by PECI controller. The unit of the programmed
+ value is four times of PECI clock period.
+ 0 ~ 255 (default: 1)
+- rd-sampling-point : Read sampling point selection. The whole period of a bit
+ time will be divided into 16 time frames. This value will
+ determine the time frame in which the controller will
+ sample PECI signal for data read back. Usually in the
+ middle of a bit time is the best.
+ 0 ~ 15 (default: 8)
+- cmd-timeout-ms: Command timeout in units of ms.
+ 1 ~ 6 (default: 1000)
+
+Example:
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2500-peci";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <15>;
+ clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
+ resets = <&syscon ASPEED_RESET_PECI>;
+ clock-frequency = <2400>;
+ msg-timing = <1>;
+ addr-timing = <1>;
+ rd-sampling-point = <8>;
+ cmd-timeout-ms = <1000>;
+ };
--
2.20.1
Re: [PATCH v9 07/12] dt-bindings: mfd: Add a document for PECI client MFD
Hi Lee,
On 12/21/2018 6:47 AM, Lee Jones wrote:
On Tue, 18 Dec 2018, Jae Hyun Yoo wrote:
This commit adds a dt-bindings document for PECI client MFD.
+* Intel PECI client bindings
+PECI (Platform Environment Control Interface) is a one-wire bus interface that
+provides a communication channel from PECI clients in Intel processors and
+chipset components to external monitoring or control devices. PECI is designed
+to support the following sideband functions:
+
+- Processor and DRAM thermal management
+- Platform Manageability
+- Processor Interface Tuning and Diagnostics
+- Failure Analysis
+
+Required properties:
+- compatible : Should be "intel,peci-client".
+- reg: Should contain address of a client CPU. According to the PECI
+ specification, client addresses start from 0x30.
+
+Example:
+ peci-bus@0 {
+ compatible = "vendor,soc-peci";
+ reg = <0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ peci-client@30 {
+ compatible = "intel,peci-client";
+ reg = <0x30>;
+ };
+
+ peci-client@31 {
+ compatible = "intel,peci-client";
+ reg = <0x31>;
+ };
The PECI Client driver (masquerading as an MFD driver in this set)
doesn't actually do anything special. Instead of detailing it here,
register the child devices directly instead.
Main purpose of the PECI client driver is providing 'reg' value to its
child devices. If I add the child nodes directly, compiler will make
warnings while building dtb because the child nodes are using the same
unit address.
Thanks,
Jae
Re: [PATCH v9 08/12] mfd: intel-peci-client: Add PECI client MFD driver
Hi Lee,
On 12/21/2018 6:46 AM, Lee Jones wrote:
On Tue, 18 Dec 2018, Jae Hyun Yoo wrote:
This commit adds PECI client MFD driver.
+config MFD_INTEL_PECI_CLIENT
+ bool "Intel PECI client"
+ depends on (PECI || COMPILE_TEST)
+ select MFD_CORE
+ help
+ If you say yes to this option, support will be included for the
+ Intel PECI (Platform Environment Control Interface) client. PECI is a
+ one-wire bus interface that provides a communication channel from PECI
+ clients in Intel processors and chipset components to external
+ monitoring or control devices.
This driver doesn't appear to actually do anything that can't be done
in a header file i.e. match some static data with a CPU ID. The child
devices can be registered by whatever registers this device.
It seems superfluous. Why do you need it?
The main reason I added it is to provide a way for sharing the same unit
address from multiple side-band function drivers that read 'reg'
property setting from the parent node (this driver's node). The 'reg'
property reading code is not in this driver but it will be performed in
peci-core when this driver is registered using
module_peci_driver(peci_client_driver), and then it will provides
client->addr information for all its child node drivers.
+#include
+#include
+#include
+#include
+#include
+#include
Alphabetical.
Will fix it. Thanks!
+enum cpu_gens {
+ CPU_GEN_HSX = 0, /* Haswell Xeon */
+ CPU_GEN_BRX, /* Broadwell Xeon */
+ CPU_GEN_SKX, /* Skylake Xeon */
+};
This is unused.
This is being used in 8 lines below but actually the static array can be
initialized without using this enum type. Will remove it.
+static struct mfd_cell peci_functions[] = {
+ { .name = "peci-cputemp", },
+ { .name = "peci-dimmtemp", },
+ /* TODO: Add additional PECI sideband functions into here */
+};
+
+static const struct cpu_gen_info cpu_gen_info_table[] = {
+ [CPU_GEN_HSX] = {
+ .family= 6, /* Family code */
+ .model = INTEL_FAM6_HASWELL_X,
+ .core_max = CORE_MAX_ON_HSX,
+ .chan_rank_max = CHAN_RANK_MAX_ON_HSX,
+ .dimm_idx_max = DIMM_IDX_MAX_ON_HSX },
+ [CPU_GEN_BRX] = {
+ .family= 6, /* Family code */
+ .model = INTEL_FAM6_BROADWELL_X,
+ .core_max = CORE_MAX_ON_BDX,
+ .chan_rank_max = CHAN_RANK_MAX_ON_BDX,
+ .dimm_idx_max = DIMM_IDX_MAX_ON_BDX },
+ [CPU_GEN_SKX] = {
+ .family= 6, /* Family code */
+ .model = INTEL_FAM6_SKYLAKE_X,
+ .core_max = CORE_MAX_ON_SKX,
+ .chan_rank_max = CHAN_RANK_MAX_ON_SKX,
+ .dimm_idx_max = DIMM_IDX_MAX_ON_SKX },
+};
+
+static int peci_client_get_cpu_gen_info(struct peci_client_manager *priv)
+{
+ u32 cpu_id;
+ u16 family;
+ u8 model;
+ int rc;
ret is almost ubiquitous in the kernel. Please use it instead.
Okay. Will change rc to ret.
+static int peci_client_probe(struct peci_client *client)
+{
+ struct device *dev = &client->dev;
+ struct peci_client_manager *priv;
+ uint cpu_no;
+ int ret;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ dev_set_drvdata(dev, priv);
+ priv->client = client;
+ priv->dev = dev;
If you have client (Which contains dev, you don't need dev).
Makes sense. Will remove the 'dev' member.
[PATCH v9 00/12] PECI device driver introduction
c. - Fixed structure definitions in PECI uapi header to make that use __u8, __u16 and etc. - Modified wait_for_completion_interruptible_timeout error handling logic in Aspeed PECI driver to deliver errors correctly. - Removed low-level xfer command from ioctl and kept only high-level PECI command suite as ioctls. - Fixed I/O timeout logic in Aspeed PECI driver using ktime. - Added a function into hwmon driver to simplify update delay checking. - Added a function into hwmon driver to convert 10.6 to millidegree. - Dropped non-standard attributes in hwmon driver. - Fixed OF table for hwmon to make it indicate as a PECI client of Intel CPU target. - Added a maintainer of PECI subsystem into MAINTAINERS document. Jae Hyun Yoo (12): dt-bindings: Add a document of PECI subsystem Documentation: ioctl: Add ioctl numbers for PECI subsystem peci: Add support for PECI bus driver core dt-bindings: Add a document of PECI adapter driver for ASPEED AST24xx/25xx SoCs ARM: dts: aspeed: peci: Add PECI node peci: Add a PECI adapter driver for Aspeed AST24xx/AST25xx dt-bindings: mfd: Add a document for PECI client MFD mfd: intel-peci-client: Add PECI client MFD driver Documentation: hwmon: Add documents for PECI hwmon client drivers hwmon: Add PECI cputemp driver hwmon: Add PECI dimmtemp driver Add maintainers for the PECI subsystem .../bindings/mfd/intel-peci-client.txt| 34 + .../devicetree/bindings/peci/peci-aspeed.txt | 55 + .../devicetree/bindings/peci/peci.txt | 43 + Documentation/hwmon/peci-cputemp | 78 + Documentation/hwmon/peci-dimmtemp | 50 + Documentation/ioctl/ioctl-number.txt |2 + MAINTAINERS | 22 + arch/arm/boot/dts/aspeed-g4.dtsi | 26 + arch/arm/boot/dts/aspeed-g5.dtsi | 26 + drivers/Kconfig |2 + drivers/Makefile |1 + drivers/hwmon/Kconfig | 28 + drivers/hwmon/Makefile|2 + drivers/hwmon/peci-cputemp.c | 394 + drivers/hwmon/peci-dimmtemp.c | 284 +++ drivers/hwmon/peci-hwmon.h| 49 + drivers/mfd/Kconfig | 14 + drivers/mfd/Makefile |1 + drivers/mfd/intel-peci-client.c | 150 ++ drivers/peci/Kconfig | 39 + drivers/peci/Makefile |9 + drivers/peci/peci-aspeed.c| 505 ++ drivers/peci/peci-core.c | 1527 + include/linux/mfd/intel-peci-client.h | 110 ++ include/linux/peci.h | 142 ++ include/uapi/linux/peci-ioctl.h | 403 + 26 files changed, 3996 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/intel-peci-client.txt create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.txt create mode 100644 Documentation/devicetree/bindings/peci/peci.txt create mode 100644 Documentation/hwmon/peci-cputemp create mode 100644 Documentation/hwmon/peci-dimmtemp create mode 100644 drivers/hwmon/peci-cputemp.c create mode 100644 drivers/hwmon/peci-dimmtemp.c create mode 100644 drivers/hwmon/peci-hwmon.h create mode 100644 drivers/mfd/intel-peci-client.c create mode 100644 drivers/peci/Kconfig create mode 100644 drivers/peci/Makefile create mode 100644 drivers/peci/peci-aspeed.c create mode 100644 drivers/peci/peci-core.c create mode 100644 include/linux/mfd/intel-peci-client.h create mode 100644 include/linux/peci.h create mode 100644 include/uapi/linux/peci-ioctl.h -- 2.19.1
[PATCH v9 02/12] Documentation: ioctl: Add ioctl numbers for PECI subsystem
This commit updates ioctl-number.txt to reflect ioctl numbers used by the PECI subsystem. Cc: Jonathan Corbet Cc: Greg Kroah-Hartman Cc: Kishon Vijay Abraham I Cc: Lorenzo Pieralisi Cc: Gustavo Pimentel Cc: Darrick J. Wong Cc: Tomohiro Kusumi Cc: Eric Sandeen Cc: Frederic Barrat Cc: Bryant G. Ly Cc: Arnd Bergmann Cc: James Feist Cc: Jason M Biils Cc: Vernon Mauery Signed-off-by: Jae Hyun Yoo --- Documentation/ioctl/ioctl-number.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt index af6f6ba1fe80..aaf0006a7113 100644 --- a/Documentation/ioctl/ioctl-number.txt +++ b/Documentation/ioctl/ioctl-number.txt @@ -326,6 +326,8 @@ Code Seq#(hex) Include FileComments 0xB4 00-0F linux/gpio.h<mailto:linux-g...@vger.kernel.org> 0xB5 00-0F uapi/linux/rpmsg.h <mailto:linux-remotep...@vger.kernel.org> 0xB6 all linux/fpga-dfl.h +0xB7 00-0F uapi/linux/peci-ioctl.h PECI subsystem + <mailto:jae.hyun@linux.intel.com> 0xC0 00-0F linux/usb/iowarrior.h 0xCA 00-0F uapi/misc/cxl.h 0xCA 10-2F uapi/misc/ocxl.h -- 2.19.1
[PATCH v9 01/12] dt-bindings: Add a document of PECI subsystem
This commit adds a document of generic PECI bus, adapter and client
driver.
Cc: Rob Herring
Cc: Mark Rutland
Cc: Andrew Jeffery
Cc: Joel Stanley
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Reviewed-by: Rob Herring
---
.../devicetree/bindings/peci/peci.txt | 43 +++
1 file changed, 43 insertions(+)
create mode 100644 Documentation/devicetree/bindings/peci/peci.txt
diff --git a/Documentation/devicetree/bindings/peci/peci.txt
b/Documentation/devicetree/bindings/peci/peci.txt
new file mode 100644
index ..71f26c7c6e58
--- /dev/null
+++ b/Documentation/devicetree/bindings/peci/peci.txt
@@ -0,0 +1,43 @@
+Generic device tree configuration for PECI adapters
+===
+
+Required properties:
+- #address-cells : Should be <1>. Read more about client addresses below.
+- #size-cells: Should be <0>. Read more about client addresses below.
+
+The cells properties above define that an address of CPU clients of a PECI bus
+are described by a single value.
+
+Example:
+ peci0: peci-bus@0 {
+ compatible = "vendor,soc-peci";
+ reg = <0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+Generic device tree configuration for PECI clients
+==
+
+Required properties:
+- compatible : Should contain name of PECI client.
+- reg: Should contain address of a client CPU. According to the PECI
+ specification, client addresses start from 0x30.
+
+Example:
+ peci-bus@0 {
+ compatible = "vendor,soc-peci";
+ reg = <0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ peci-client@30 {
+ compatible = "intel,peci-client";
+ reg = <0x30>;
+ };
+
+ peci-client@31 {
+ compatible = "intel,peci-client";
+ reg = <0x31>;
+ };
+ };
--
2.19.1
[PATCH v9 03/12] peci: Add support for PECI bus driver core
This commit adds driver implementation for PECI bus core into linux driver framework. PECI (Platform Environment Control Interface) is a one-wire bus interface that provides a communication channel from Intel processors and chipset components to external monitoring or control devices. PECI is designed to support the following sideband functions: * Processor and DRAM thermal management - Processor fan speed control is managed by comparing Digital Thermal Sensor (DTS) thermal readings acquired via PECI against the processor-specific fan speed control reference point, or TCONTROL. Both TCONTROL and DTS thermal readings are accessible via the processor PECI client. These variables are referenced to a common temperature, the TCC activation point, and are both defined as negative offsets from that reference. - PECI based access to the processor package configuration space provides a means for Baseboard Management Controllers (BMC) or other platform management devices to actively manage the processor and memory power and thermal features. * Platform Manageability - Platform manageability functions including thermal, power, and error monitoring. Note that platform 'power' management includes monitoring and control for both the processor and DRAM subsystem to assist with data center power limiting. - PECI allows read access to certain error registers in the processor MSR space and status monitoring registers in the PCI configuration space within the processor and downstream devices. - PECI permits writes to certain registers in the processor PCI configuration space. * Processor Interface Tuning and Diagnostics - Processor interface tuning and diagnostics capabilities (Intel Interconnect BIST). The processors Intel Interconnect Built In Self Test (Intel IBIST) allows for infield diagnostic capabilities in the Intel UPI and memory controller interfaces. PECI provides a port to execute these diagnostics via its PCI Configuration read and write capabilities. * Failure Analysis - Output the state of the processor after a failure for analysis via Crashdump. PECI uses a single wire for self-clocking and data transfer. The bus requires no additional control lines. The physical layer is a self-clocked one-wire bus that begins each bit with a driven, rising edge from an idle level near zero volts. The duration of the signal driven high depends on whether the bit value is a logic '0' or logic '1'. PECI also includes variable data transfer rate established with every message. In this way, it is highly flexible even though underlying logic is simple. The interface design was optimized for interfacing between an Intel processor and chipset components in both single processor and multiple processor environments. The single wire interface provides low board routing overhead for the multiple load connections in the congested routing area near the processor and chipset components. Bus speed, error checking, and low protocol overhead provides adequate link bandwidth and reliability to transfer critical device operating conditions and configuration information. This implementation provides the basic framework to add PECI extensions to the Linux bus and device models. A hardware specific 'Adapter' driver can be attached to the PECI bus to provide sideband functions described above. It is also possible to access all devices on an adapter from userspace through the /dev interface. A device specific 'Client' driver also can be attached to the PECI bus so each processor client's features can be supported by the 'Client' driver through an adapter connection in the bus. Cc: Greg Kroah-Hartman Cc: Philippe Ombredanne Cc: Gavin Schenk Cc: Vinod Koul Cc: Thomas Gleixner Cc: Sagar Dharia Cc: David Kershner Cc: Johan Hovold Cc: Uwe Kleine-Konig Cc: Viresh Kumar Cc: Randy Dunlap Cc: Cyrille Pitchen Cc: Juergen Gross Cc: Alan Cox Cc: Andrew Lunn Cc: Andy Shevchenko Cc: Arnd Bergmann Cc: Benjamin Herrenschmidt Cc: Fengguang Wu Cc: Jason M Biils Cc: Julia Cartwright Signed-off-by: Jae Hyun Yoo Signed-off-by: Fengguang Wu Reviewed-by: Haiyue Wang Reviewed-by: James Feist Reviewed-by: Vernon Mauery --- drivers/Kconfig |2 + drivers/Makefile|1 + drivers/peci/Kconfig| 12 + drivers/peci/Makefile |6 + drivers/peci/peci-core.c| 1527 +++ include/linux/peci.h| 142 +++ include/uapi/linux/peci-ioctl.h | 403 7 files changed, 2093 insertions(+) create mode 100644 drivers/peci/Kconfig create mode 100644 drivers/peci/Makefile create mode 100644 drivers/peci/peci-core.c create mode 100644 include/linux/peci.h create mode 100644 include/uapi/linux/peci-ioctl.h diff --git a/drivers/Kconfig b/drivers/Kconfig index ab4d43923c4d..c633db2b
[PATCH v9 04/12] dt-bindings: Add a document of PECI adapter driver for ASPEED AST24xx/25xx SoCs
This commit adds a dt-bindings document of PECI adapter driver for ASPEED
AST24xx/25xx SoCs.
Cc: Mark Rutland
Cc: Joel Stanley
Cc: Andrew Jeffery
Cc: Benjamin Herrenschmidt
Cc: Greg Kroah-Hartman
Cc: Jason M Biils
Cc: Milton Miller II
Cc: Pavel Machek
Cc: Robin Murphy
Cc: Ryan Chen
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Reviewed-by: Rob Herring
---
.../devicetree/bindings/peci/peci-aspeed.txt | 55 +++
1 file changed, 55 insertions(+)
create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.txt
diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.txt
b/Documentation/devicetree/bindings/peci/peci-aspeed.txt
new file mode 100644
index ..cdca73a3b7d8
--- /dev/null
+++ b/Documentation/devicetree/bindings/peci/peci-aspeed.txt
@@ -0,0 +1,55 @@
+Device tree configuration for PECI buses on the AST24XX and AST25XX SoCs.
+
+Required properties:
+- compatible: Should be one of:
+ "aspeed,ast2400-peci"
+ "aspeed,ast2500-peci"
+- reg : Should contain PECI controller registers location and
+ length.
+- #address-cells: Should be <1> required to define a client address.
+- #size-cells : Should be <0> required to define a client address.
+- interrupts: Should contain PECI controller interrupt.
+- clocks: Should contain clock source for PECI controller. Should
+ reference the external oscillator clock in the second
+ cell.
+- resets: Should contain phandle to reset controller with the reset
+ number in the second cell.
+- clock-frequency : Should contain the operation frequency of PECI controller
+ in units of Hz.
+ 187500 ~ 2400
+
+Optional properties:
+- msg-timing: Message timing negotiation period. This value will
+ determine the period of message timing negotiation to be
+ issued by PECI controller. The unit of the programmed
+ value is four times of PECI clock period.
+ 0 ~ 255 (default: 1)
+- addr-timing : Address timing negotiation period. This value will
+ determine the period of address timing negotiation to be
+ issued by PECI controller. The unit of the programmed
+ value is four times of PECI clock period.
+ 0 ~ 255 (default: 1)
+- rd-sampling-point : Read sampling point selection. The whole period of a bit
+ time will be divided into 16 time frames. This value will
+ determine the time frame in which the controller will
+ sample PECI signal for data read back. Usually in the
+ middle of a bit time is the best.
+ 0 ~ 15 (default: 8)
+- cmd-timeout-ms: Command timeout in units of ms.
+ 1 ~ 6 (default: 1000)
+
+Example:
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2500-peci";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <15>;
+ clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
+ resets = <&syscon ASPEED_RESET_PECI>;
+ clock-frequency = <2400>;
+ msg-timing = <1>;
+ addr-timing = <1>;
+ rd-sampling-point = <8>;
+ cmd-timeout-ms = <1000>;
+ };
--
2.19.1
[PATCH v9 06/12] peci: Add a PECI adapter driver for Aspeed AST24xx/AST25xx
This commit adds PECI adapter driver implementation for Aspeed AST24xx/AST25xx SoCs. Cc: Joel Stanley Cc: Andrew Jeffery Cc: Andy Shevchenko Cc: Greg Kroah-Hartman Cc: Robin Murphy Cc: Ryan Chen Signed-off-by: Jae Hyun Yoo Reviewed-by: Haiyue Wang Reviewed-by: James Feist Reviewed-by: Vernon Mauery --- drivers/peci/Kconfig | 27 ++ drivers/peci/Makefile | 3 + drivers/peci/peci-aspeed.c | 505 + 3 files changed, 535 insertions(+) create mode 100644 drivers/peci/peci-aspeed.c diff --git a/drivers/peci/Kconfig b/drivers/peci/Kconfig index 4ccacb22a356..9e9845ebcff4 100644 --- a/drivers/peci/Kconfig +++ b/drivers/peci/Kconfig @@ -10,3 +10,30 @@ config PECI The Platform Environment Control Interface (PECI) is a one-wire bus interface that provides a communication channel from Intel processors and chipset components to external monitoring or control devices. + + If you want PECI support, you should say Y here and also to the + specific driver for your bus adapter(s) below. + +if PECI + +# +# PECI hardware bus configuration +# + +menu "PECI Hardware Bus support" + +config PECI_ASPEED + tristate "ASPEED PECI support" + select REGMAP_MMIO + depends on OF + depends on ARCH_ASPEED || COMPILE_TEST + help + Say Y here if you want support for the Platform Environment Control + Interface (PECI) bus adapter driver on the ASPEED SoCs. + + This support is also available as a module. If so, the module + will be called peci-aspeed. + +endmenu + +endif # PECI diff --git a/drivers/peci/Makefile b/drivers/peci/Makefile index 9e8615e0d3ff..886285e69765 100644 --- a/drivers/peci/Makefile +++ b/drivers/peci/Makefile @@ -4,3 +4,6 @@ # Core functionality obj-$(CONFIG_PECI) += peci-core.o + +# Hardware specific bus drivers +obj-$(CONFIG_PECI_ASPEED) += peci-aspeed.o diff --git a/drivers/peci/peci-aspeed.c b/drivers/peci/peci-aspeed.c new file mode 100644 index ..51cb2563ceb6 --- /dev/null +++ b/drivers/peci/peci-aspeed.c @@ -0,0 +1,505 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2012-2017 ASPEED Technology Inc. +// Copyright (c) 2018 Intel Corporation + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* ASPEED PECI Registers */ +#define ASPEED_PECI_CTRL 0x00 +#define ASPEED_PECI_TIMING 0x04 +#define ASPEED_PECI_CMD 0x08 +#define ASPEED_PECI_CMD_CTRL 0x0c +#define ASPEED_PECI_EXP_FCS 0x10 +#define ASPEED_PECI_CAP_FCS 0x14 +#define ASPEED_PECI_INT_CTRL 0x18 +#define ASPEED_PECI_INT_STS 0x1c +#define ASPEED_PECI_W_DATA0 0x20 +#define ASPEED_PECI_W_DATA1 0x24 +#define ASPEED_PECI_W_DATA2 0x28 +#define ASPEED_PECI_W_DATA3 0x2c +#define ASPEED_PECI_R_DATA0 0x30 +#define ASPEED_PECI_R_DATA1 0x34 +#define ASPEED_PECI_R_DATA2 0x38 +#define ASPEED_PECI_R_DATA3 0x3c +#define ASPEED_PECI_W_DATA4 0x40 +#define ASPEED_PECI_W_DATA5 0x44 +#define ASPEED_PECI_W_DATA6 0x48 +#define ASPEED_PECI_W_DATA7 0x4c +#define ASPEED_PECI_R_DATA4 0x50 +#define ASPEED_PECI_R_DATA5 0x54 +#define ASPEED_PECI_R_DATA6 0x58 +#define ASPEED_PECI_R_DATA7 0x5c + +/* ASPEED_PECI_CTRL - 0x00 : Control Register */ +#define PECI_CTRL_SAMPLING_MASK GENMASK(19, 16) +#define PECI_CTRL_READ_MODE_MASK GENMASK(13, 12) +#define PECI_CTRL_READ_MODE_COUNTBIT(12) +#define PECI_CTRL_READ_MODE_DBG BIT(13) +#define PECI_CTRL_CLK_SOURCE_MASKBIT(11) +#define PECI_CTRL_CLK_DIV_MASK GENMASK(10, 8) +#define PECI_CTRL_INVERT_OUT BIT(7) +#define PECI_CTRL_INVERT_IN BIT(6) +#define PECI_CTRL_BUS_CONTENT_EN BIT(5) +#define PECI_CTRL_PECI_ENBIT(4) +#define PECI_CTRL_PECI_CLK_ENBIT(0) + +/* ASPEED_PECI_TIMING - 0x04 : Timing Negotiation Register */ +#define PECI_TIMING_MESSAGE_MASK GENMASK(15, 8) +#define PECI_TIMING_ADDRESS_MASK GENMASK(7, 0) + +/* ASPEED_PECI_CMD - 0x08 : Command Register */ +#define PECI_CMD_PIN_MON BIT(31) +#define PECI_CMD_STS_MASKGENMASK(27, 24) +#define PECI_CMD_IDLE_MASK (PECI_CMD_STS_MASK | PECI_CMD_PIN_MON) +#define PECI_CMD_FIREBIT(0) + +/* ASPEED_PECI_LEN - 0x0C : Read/Write Length Register */ +#define PECI_AW_FCS_EN BIT(31) +#define PECI_READ_LEN_MASK GENMASK(23, 16) +#define PECI_WRITE_LEN_MASK GENMASK(15, 8) +#define PECI_TAGET_ADDR_MASK GENMASK(7, 0) + +/* ASPEED_PECI_EXP_FCS - 0x10 : Expected FCS Data Register */ +#define PECI_EXPECT_READ_FCS_MASKGENMASK(23, 16) +#define PECI_EXPECT_AW_FCS_AUTO_MASK GENMASK(15, 8) +#define PECI_EXPECT_WRITE_FCS_MASK GENMASK(7, 0) + +/* ASPEED_PECI_CAP_FCS - 0x14 : Captured FCS Data Register */ +#define PECI_CAPTURE_READ_FCS_MASK GENMASK(23, 16) +#define PECI_CAPTURE_WRITE_FCS_MASK GENMASK(7, 0) + +/* ASPEED_PECI_INT_CTRL/STS - 0
[PATCH v9 05/12] ARM: dts: aspeed: peci: Add PECI node
This commit adds PECI bus/adapter node of AST24xx/AST25xx into
aspeed-g4 and aspeed-g5.
Cc: Rob Herring
Cc: Mark Rutland
Cc: Joel Stanley
Cc: Andrew Jeffery
Cc: Jason M Biils
Cc: Ryan Chen
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
---
arch/arm/boot/dts/aspeed-g4.dtsi | 26 ++
arch/arm/boot/dts/aspeed-g5.dtsi | 26 ++
2 files changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 69f6b9d2e7e7..fa5c358e199c 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -29,6 +29,7 @@
serial3 = &uart4;
serial4 = &uart5;
serial5 = &vuart;
+ peci0 = &peci0;
};
cpus {
@@ -317,6 +318,13 @@
};
};
+ peci: bus@1e78b000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e78b000 0x60>;
+ };
+
uart2: serial@1e78d000 {
compatible = "ns16550a";
reg = <0x1e78d000 0x20>;
@@ -360,6 +368,24 @@
};
};
+&peci {
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2400-peci";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <15>;
+ clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
+ resets = <&syscon ASPEED_RESET_PECI>;
+ clock-frequency = <2400>;
+ msg-timing = <1>;
+ addr-timing = <1>;
+ rd-sampling-point = <8>;
+ cmd-timeout-ms = <1000>;
+ status = "disabled";
+ };
+};
+
&i2c {
i2c_ic: interrupt-controller@0 {
#interrupt-cells = <1>;
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index d107459fc0f8..63900714fbd7 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -29,6 +29,7 @@
serial3 = &uart4;
serial4 = &uart5;
serial5 = &vuart;
+ peci0 = &peci0;
};
cpus {
@@ -377,6 +378,13 @@
};
};
+ peci: bus@1e78b000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e78b000 0x60>;
+ };
+
uart2: serial@1e78d000 {
compatible = "ns16550a";
reg = <0x1e78d000 0x20>;
@@ -420,6 +428,24 @@
};
};
+&peci {
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2500-peci";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <15>;
+ clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
+ resets = <&syscon ASPEED_RESET_PECI>;
+ clock-frequency = <2400>;
+ msg-timing = <1>;
+ addr-timing = <1>;
+ rd-sampling-point = <8>;
+ cmd-timeout-ms = <1000>;
+ status = "disabled";
+ };
+};
+
&i2c {
i2c_ic: interrupt-controller@0 {
#interrupt-cells = <1>;
--
2.19.1
[PATCH v9 07/12] dt-bindings: mfd: Add a document for PECI client MFD
This commit adds a dt-bindings document for PECI client MFD.
Cc: Lee Jones
Cc: Rob Herring
Cc: Mark Rutland
Cc: Andrew Jeffery
Cc: James Feist
Cc: Jason M Biils
Cc: Joel Stanley
Cc: Vernon Mauery
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Rob Herring
---
.../bindings/mfd/intel-peci-client.txt| 34 +++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/intel-peci-client.txt
diff --git a/Documentation/devicetree/bindings/mfd/intel-peci-client.txt
b/Documentation/devicetree/bindings/mfd/intel-peci-client.txt
new file mode 100644
index ..5d1d5d0a552f
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/intel-peci-client.txt
@@ -0,0 +1,34 @@
+* Intel PECI client bindings
+
+PECI (Platform Environment Control Interface) is a one-wire bus interface that
+provides a communication channel from PECI clients in Intel processors and
+chipset components to external monitoring or control devices. PECI is designed
+to support the following sideband functions:
+
+- Processor and DRAM thermal management
+- Platform Manageability
+- Processor Interface Tuning and Diagnostics
+- Failure Analysis
+
+Required properties:
+- compatible : Should be "intel,peci-client".
+- reg: Should contain address of a client CPU. According to the PECI
+ specification, client addresses start from 0x30.
+
+Example:
+ peci-bus@0 {
+ compatible = "vendor,soc-peci";
+ reg = <0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ peci-client@30 {
+ compatible = "intel,peci-client";
+ reg = <0x30>;
+ };
+
+ peci-client@31 {
+ compatible = "intel,peci-client";
+ reg = <0x31>;
+ };
+ };
--
2.19.1
[PATCH v9 09/12] Documentation: hwmon: Add documents for PECI hwmon client drivers
This commit adds hwmon documents for PECI cputemp and dimmtemp drivers. Cc: Guenter Roeck Cc: Jean Delvare Cc: Jonathan Corbet Cc: Jason M Biils Cc: Randy Dunlap Signed-off-by: Jae Hyun Yoo Reviewed-by: Haiyue Wang Reviewed-by: James Feist Reviewed-by: Vernon Mauery Acked-by: Guenter Roeck --- Documentation/hwmon/peci-cputemp | 78 +++ Documentation/hwmon/peci-dimmtemp | 50 2 files changed, 128 insertions(+) create mode 100644 Documentation/hwmon/peci-cputemp create mode 100644 Documentation/hwmon/peci-dimmtemp diff --git a/Documentation/hwmon/peci-cputemp b/Documentation/hwmon/peci-cputemp new file mode 100644 index ..821a9258f2e6 --- /dev/null +++ b/Documentation/hwmon/peci-cputemp @@ -0,0 +1,78 @@ +Kernel driver peci-cputemp +== + +Supported chips: + One of Intel server CPUs listed below which is connected to a PECI bus. + * Intel Xeon E5/E7 v3 server processors + Intel Xeon E5-14xx v3 family + Intel Xeon E5-24xx v3 family + Intel Xeon E5-16xx v3 family + Intel Xeon E5-26xx v3 family + Intel Xeon E5-46xx v3 family + Intel Xeon E7-48xx v3 family + Intel Xeon E7-88xx v3 family + * Intel Xeon E5/E7 v4 server processors + Intel Xeon E5-16xx v4 family + Intel Xeon E5-26xx v4 family + Intel Xeon E5-46xx v4 family + Intel Xeon E7-48xx v4 family + Intel Xeon E7-88xx v4 family + * Intel Xeon Scalable server processors + Intel Xeon Bronze family + Intel Xeon Silver family + Intel Xeon Gold family + Intel Xeon Platinum family + Addresses scanned: PECI client address 0x30 - 0x37 + Datasheet: Available from http://www.intel.com/design/literature.htm + +Author: + Jae Hyun Yoo + +Description +--- + +This driver implements a generic PECI hwmon feature which provides Digital +Thermal Sensor (DTS) thermal readings of the CPU package and CPU cores that are +accessible using the PECI Client Command Suite via the processor PECI client. + +All temperature values are given in millidegree Celsius and will be measurable +only when the target CPU is powered on. + +sysfs attributes + + +temp1_label"Die" +temp1_inputProvides current die temperature of the CPU package. +temp1_max Provides thermal control temperature of the CPU package + which is also known as Tcontrol. +temp1_crit Provides shutdown temperature of the CPU package which + is also known as the maximum processor junction + temperature, Tjmax or Tprochot. +temp1_crit_hystProvides the hysteresis value from Tcontrol to Tjmax of + the CPU package. + +temp2_label"Tcontrol" +temp2_inputProvides current Tcontrol temperature of the CPU + package which is also known as Fan Temperature target. + Indicates the relative value from thermal monitor trip + temperature at which fans should be engaged. +temp2_crit Provides Tcontrol critical value of the CPU package + which is same to Tjmax. + +temp3_label"Tthrottle" +temp3_inputProvides current Tthrottle temperature of the CPU + package. Used for throttling temperature. If this value + is allowed and lower than Tjmax - the throttle will + occur and reported at lower than Tjmax. + +temp4_label"Tjmax" +temp4_inputProvides the maximum junction temperature, Tjmax of the + CPU package. + +temp[5-*]_labelProvides string "Core X", where X is resolved core + number. +temp[5-*]_inputProvides current temperature of each core. +temp[5-*]_max Provides thermal control temperature of the core. +temp[5-*]_crit Provides shutdown temperature of the core. +temp[5-*]_crit_hystProvides the hysteresis value from Tcontrol to Tjmax of + the core. diff --git a/Documentation/hwmon/peci-dimmtemp b/Documentation/hwmon/peci-dimmtemp new file mode 100644 index ..c54f2526188c --- /dev/null +++ b/Documentation/hwmon/peci-dimmtemp @@ -0,0 +1,50 @@ +Kernel driver peci-dimmtemp +=== + +Supported chips: + One of Intel server CPUs listed below which is connected to a PECI bus. + * Intel Xeon E5/E7 v3 server processors +
[PATCH v9 11/12] hwmon: Add PECI dimmtemp driver
This commit adds PECI dimmtemp hwmon driver.
Cc: Guenter Roeck
Cc: Jean Delvare
Cc: Alan Cox
Cc: Andrew Jeffery
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Jason M Biils
Cc: Joel Stanley
Cc: Miguel Ojeda
Cc: Andrew Lunn
Cc: Stef van Os
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Acked-by: Guenter Roeck
---
drivers/hwmon/Kconfig | 14 ++
drivers/hwmon/Makefile| 1 +
drivers/hwmon/peci-dimmtemp.c | 284 ++
3 files changed, 299 insertions(+)
create mode 100644 drivers/hwmon/peci-dimmtemp.c
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index f08b4a670ac5..d2299d850508 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1320,6 +1320,20 @@ config SENSORS_PECI_CPUTEMP
This driver can also be built as a module. If so, the module
will be called peci-cputemp.
+config SENSORS_PECI_DIMMTEMP
+ tristate "PECI DIMM temperature monitoring support"
+ depends on PECI
+ select MFD_INTEL_PECI_CLIENT
+ help
+ If you say yes here you get support for the generic Intel PECI hwmon
+ driver which provides Digital Thermal Sensor (DTS) thermal readings of
+ DIMM components that are accessible using the PECI Client Command
+ Suite via the processor PECI client.
+ Check Documentation/hwmon/peci-dimmtemp for details.
+
+ This driver can also be built as a module. If so, the module
+ will be called peci-dimmtemp.
+
source drivers/hwmon/pmbus/Kconfig
config SENSORS_PWM_FAN
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index 13ebde089ad5..b7cf35bcfbaf 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -142,6 +142,7 @@ obj-$(CONFIG_SENSORS_PC87360) += pc87360.o
obj-$(CONFIG_SENSORS_PC87427) += pc87427.o
obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o
obj-$(CONFIG_SENSORS_PECI_CPUTEMP) += peci-cputemp.o
+obj-$(CONFIG_SENSORS_PECI_DIMMTEMP)+= peci-dimmtemp.o
obj-$(CONFIG_SENSORS_POWR1220) += powr1220.o
obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o
obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON)+= raspberrypi-hwmon.o
diff --git a/drivers/hwmon/peci-dimmtemp.c b/drivers/hwmon/peci-dimmtemp.c
new file mode 100644
index ..86a45a90805b
--- /dev/null
+++ b/drivers/hwmon/peci-dimmtemp.c
@@ -0,0 +1,284 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018 Intel Corporation
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "peci-hwmon.h"
+
+#define DIMM_MASK_CHECK_DELAY_JIFFIES msecs_to_jiffies(5000)
+#define DIMM_MASK_CHECK_RETRY_MAX 60 /* 60 x 5 secs = 5 minutes */
+
+struct peci_dimmtemp {
+ struct peci_client_manager *mgr;
+ struct device *dev;
+ char name[PECI_NAME_SIZE];
+ const struct cpu_gen_info *gen_info;
+ struct workqueue_struct *work_queue;
+ struct delayed_work work_handler;
+ struct temp_data temp[DIMM_NUMS_MAX];
+ u32 dimm_mask;
+ int retry_count;
+ u32 temp_config[DIMM_NUMS_MAX + 1];
+ struct hwmon_channel_info temp_info;
+ const struct hwmon_channel_info *info[2];
+ struct hwmon_chip_info chip;
+};
+
+static const char *dimmtemp_label[CHAN_RANK_MAX][DIMM_IDX_MAX] = {
+ { "DIMM A1", "DIMM A2", "DIMM A3" },
+ { "DIMM B1", "DIMM B2", "DIMM B3" },
+ { "DIMM C1", "DIMM C2", "DIMM C3" },
+ { "DIMM D1", "DIMM D2", "DIMM D3" },
+ { "DIMM E1", "DIMM E2", "DIMM E3" },
+ { "DIMM F1", "DIMM F2", "DIMM F3" },
+ { "DIMM G1", "DIMM G2", "DIMM G3" },
+ { "DIMM H1", "DIMM H2", "DIMM H3" },
+};
+
+static int get_dimm_temp(struct peci_dimmtemp *priv, int dimm_no)
+{
+ int dimm_order = dimm_no % priv->gen_info->dimm_idx_max;
+ int chan_rank = dimm_no / priv->gen_info->dimm_idx_max;
+ u8 cfg_data[4];
+ int rc;
+
+ if (!peci_temp_need_update(&priv->temp[dimm_no]))
+ return 0;
+
+ rc = peci_client_read_package_config(priv->mgr,
+MBX_INDEX_DDR_DIMM_TEMP,
+chan_rank, cfg_data);
+ if (rc)
+ return rc;
+
+ priv->temp[dimm_no].value = cfg_data[dimm_order] * 1000;
+
+ peci_temp_mark_updated(&priv->temp[dimm_no]);
+
+ return 0;
+}
+
+static int dimmtemp_read_string(struct device *dev,
+ enum hwmon_sensor_types type,
+ u32 attr, int channel, const char **str)
+{
+ struct peci_dimmtemp *priv = dev_get_drvdata(dev);
+ u32
[PATCH v9 08/12] mfd: intel-peci-client: Add PECI client MFD driver
This commit adds PECI client MFD driver.
Cc: Lee Jones
Cc: Randy Dunlap
Cc: Rob Herring
Cc: Andrew Jeffery
Cc: James Feist
Cc: Jason M Biils
Cc: Joel Stanley
Cc: Vernon Mauery
Signed-off-by: Jae Hyun Yoo
---
drivers/mfd/Kconfig | 14 +++
drivers/mfd/Makefile | 1 +
drivers/mfd/intel-peci-client.c | 150 ++
include/linux/mfd/intel-peci-client.h | 110 +++
4 files changed, 275 insertions(+)
create mode 100644 drivers/mfd/intel-peci-client.c
create mode 100644 include/linux/mfd/intel-peci-client.h
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 8c5dfdce4326..d021aa8dfa99 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -604,6 +604,20 @@ config MFD_INTEL_MSIC
Passage) chip. This chip embeds audio, battery, GPIO, etc.
devices used in Intel Medfield platforms.
+config MFD_INTEL_PECI_CLIENT
+ bool "Intel PECI client"
+ depends on (PECI || COMPILE_TEST)
+ select MFD_CORE
+ help
+ If you say yes to this option, support will be included for the
+ Intel PECI (Platform Environment Control Interface) client. PECI is a
+ one-wire bus interface that provides a communication channel from PECI
+ clients in Intel processors and chipset components to external
+ monitoring or control devices.
+
+ Additional drivers must be enabled in order to use the functionality
+ of the device.
+
config MFD_IPAQ_MICRO
bool "Atmel Micro ASIC (iPAQ h3100/h3600/h3700) Support"
depends on SA1100_H3100 || SA1100_H3600
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 12980a4ad460..b8c1da8e748b 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -204,6 +204,7 @@ obj-$(CONFIG_MFD_INTEL_LPSS)+= intel-lpss.o
obj-$(CONFIG_MFD_INTEL_LPSS_PCI) += intel-lpss-pci.o
obj-$(CONFIG_MFD_INTEL_LPSS_ACPI) += intel-lpss-acpi.o
obj-$(CONFIG_MFD_INTEL_MSIC) += intel_msic.o
+obj-$(CONFIG_MFD_INTEL_PECI_CLIENT)+= intel-peci-client.o
obj-$(CONFIG_MFD_PALMAS) += palmas.o
obj-$(CONFIG_MFD_VIPERBOARD)+= viperboard.o
obj-$(CONFIG_MFD_RC5T583) += rc5t583.o rc5t583-irq.o
diff --git a/drivers/mfd/intel-peci-client.c b/drivers/mfd/intel-peci-client.c
new file mode 100644
index ..d53e4f1078ac
--- /dev/null
+++ b/drivers/mfd/intel-peci-client.c
@@ -0,0 +1,150 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018 Intel Corporation
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define CPU_ID_MODEL_MASK GENMASK(7, 4)
+#define CPU_ID_FAMILY_MASK GENMASK(11, 8)
+#define CPU_ID_EXT_MODEL_MASK GENMASK(19, 16)
+#define CPU_ID_EXT_FAMILY_MASK GENMASK(27, 20)
+
+#define LOWER_NIBBLE_MASK GENMASK(3, 0)
+#define UPPER_NIBBLE_MASK GENMASK(7, 4)
+#define LOWER_BYTE_MASKGENMASK(7, 0)
+#define UPPER_BYTE_MASKGENMASK(16, 8)
+
+enum cpu_gens {
+ CPU_GEN_HSX = 0, /* Haswell Xeon */
+ CPU_GEN_BRX, /* Broadwell Xeon */
+ CPU_GEN_SKX, /* Skylake Xeon */
+};
+
+static struct mfd_cell peci_functions[] = {
+ { .name = "peci-cputemp", },
+ { .name = "peci-dimmtemp", },
+ /* TODO: Add additional PECI sideband functions into here */
+};
+
+static const struct cpu_gen_info cpu_gen_info_table[] = {
+ [CPU_GEN_HSX] = {
+ .family= 6, /* Family code */
+ .model = INTEL_FAM6_HASWELL_X,
+ .core_max = CORE_MAX_ON_HSX,
+ .chan_rank_max = CHAN_RANK_MAX_ON_HSX,
+ .dimm_idx_max = DIMM_IDX_MAX_ON_HSX },
+ [CPU_GEN_BRX] = {
+ .family= 6, /* Family code */
+ .model = INTEL_FAM6_BROADWELL_X,
+ .core_max = CORE_MAX_ON_BDX,
+ .chan_rank_max = CHAN_RANK_MAX_ON_BDX,
+ .dimm_idx_max = DIMM_IDX_MAX_ON_BDX },
+ [CPU_GEN_SKX] = {
+ .family= 6, /* Family code */
+ .model = INTEL_FAM6_SKYLAKE_X,
+ .core_max = CORE_MAX_ON_SKX,
+ .chan_rank_max = CHAN_RANK_MAX_ON_SKX,
+ .dimm_idx_max = DIMM_IDX_MAX_ON_SKX },
+};
+
+static int peci_client_get_cpu_gen_info(struct peci_client_manager *priv)
+{
+ u32 cpu_id;
+ u16 family;
+ u8 model;
+ int rc;
+ int i;
+
+ rc = peci_get_cpu_id(priv->client->adapter, priv->client->addr,
+&cpu_id);
+ if (rc)
+ return rc;
+
+ family = FIELD_PREP(LOWER_BYTE_MASK,
+ FIELD_GET(CPU_ID_FAMILY_MASK, cpu_id)) |
+FIELD_PREP(UPPER_BYTE_MASK,
+ FIELD_GET(CPU_ID_EXT_FAMILY_MASK, cpu_id));
+ model = FIELD_PREP(LOWER_NIBBLE_MASK,
+ FIELD_GET(
[PATCH v9 12/12] Add maintainers for the PECI subsystem
This commit adds maintainer information for the PECI subsystem. Cc: David S. Miller Cc: Mauro Carvalho Chehab Cc: Greg Kroah-Hartman Cc: Andrew Morton Cc: Linus Walleij Cc: Randy Dunlap Cc: Jason M Biils Signed-off-by: Jae Hyun Yoo --- MAINTAINERS | 22 ++ 1 file changed, 22 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 3318f30903b2..ffdf17cbf5f6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1356,6 +1356,14 @@ F: arch/arm/mach-aspeed/ F: arch/arm/boot/dts/aspeed-* N: aspeed +ARM/ASPEED PECI DRIVER +M: Jae Hyun Yoo +M: Jason M Biils +L: linux-asp...@lists.ozlabs.org (moderated for non-subscribers) +S: Maintained +F: Documentation/devicetree/bindings/peci/peci-aspeed.txt +F: drivers/peci/peci-aspeed.c + ARM/CALXEDA HIGHBANK ARCHITECTURE M: Rob Herring L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers) @@ -11712,6 +11720,20 @@ L: platform-driver-...@vger.kernel.org S: Maintained F: drivers/platform/x86/peaq-wmi.c +PECI SUBSYSTEM +M: Jae Hyun Yoo +M: Jason M Biils +L: open...@lists.ozlabs.org (moderated for non-subscribers) +S: Maintained +F: Documentation/devicetree/bindings/peci/ +F: drivers/mfd/intel-peci-client.c +F: drivers/peci/ +F: drivers/hwmon/peci-*.c +F: drivers/hwmon/peci-hwmon.h +F: include/linux/mfd/intel-peci-client.h +F: include/linux/peci.h +F: include/uapi/linux/peci-ioctl.h + PER-CPU MEMORY ALLOCATOR M: Dennis Zhou M: Tejun Heo -- 2.19.1
[PATCH v9 10/12] hwmon: Add PECI cputemp driver
This commit adds PECI cputemp hwmon driver.
Cc: Guenter Roeck
Cc: Jean Delvare
Cc: Alan Cox
Cc: Andrew Jeffery
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Jason M Biils
Cc: Joel Stanley
Cc: Miguel Ojeda
Cc: Andrew Lunn
Cc: Stef van Os
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Acked-by: Guenter Roeck
---
drivers/hwmon/Kconfig| 14 ++
drivers/hwmon/Makefile | 1 +
drivers/hwmon/peci-cputemp.c | 394 +++
drivers/hwmon/peci-hwmon.h | 49 +
4 files changed, 458 insertions(+)
create mode 100644 drivers/hwmon/peci-cputemp.c
create mode 100644 drivers/hwmon/peci-hwmon.h
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 81da17a42dc9..f08b4a670ac5 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1306,6 +1306,20 @@ config SENSORS_PCF8591
These devices are hard to detect and rarely found on mainstream
hardware. If unsure, say N.
+config SENSORS_PECI_CPUTEMP
+ tristate "PECI CPU temperature monitoring support"
+ depends on PECI
+ select MFD_INTEL_PECI_CLIENT
+ help
+ If you say yes here you get support for the generic Intel PECI
+ cputemp driver which provides Digital Thermal Sensor (DTS) thermal
+ readings of the CPU package and CPU cores that are accessible using
+ the PECI Client Command Suite via the processor PECI client.
+ Check Documentation/hwmon/peci-cputemp for details.
+
+ This driver can also be built as a module. If so, the module
+ will be called peci-cputemp.
+
source drivers/hwmon/pmbus/Kconfig
config SENSORS_PWM_FAN
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index 93f7f41ea4ad..13ebde089ad5 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -141,6 +141,7 @@ obj-$(CONFIG_SENSORS_NTC_THERMISTOR)+=
ntc_thermistor.o
obj-$(CONFIG_SENSORS_PC87360) += pc87360.o
obj-$(CONFIG_SENSORS_PC87427) += pc87427.o
obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o
+obj-$(CONFIG_SENSORS_PECI_CPUTEMP) += peci-cputemp.o
obj-$(CONFIG_SENSORS_POWR1220) += powr1220.o
obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o
obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON)+= raspberrypi-hwmon.o
diff --git a/drivers/hwmon/peci-cputemp.c b/drivers/hwmon/peci-cputemp.c
new file mode 100644
index ..11880c86a854
--- /dev/null
+++ b/drivers/hwmon/peci-cputemp.c
@@ -0,0 +1,394 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018 Intel Corporation
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include "peci-hwmon.h"
+
+#define DEFAULT_CHANNEL_NUMS 4
+#define CORETEMP_CHANNEL_NUMS CORE_NUMS_MAX
+#define CPUTEMP_CHANNEL_NUMS (DEFAULT_CHANNEL_NUMS + CORETEMP_CHANNEL_NUMS)
+
+/* The RESOLVED_CORES register in PCU of a client CPU */
+#define REG_RESOLVED_CORES_BUS 1
+#define REG_RESOLVED_CORES_DEVICE30
+#define REG_RESOLVED_CORES_FUNCTION 3
+#define REG_RESOLVED_CORES_OFFSET0xB4
+
+struct temp_group {
+ struct temp_data die;
+ struct temp_data tcontrol;
+ struct temp_data tthrottle;
+ struct temp_data tjmax;
+ struct temp_data core[CORETEMP_CHANNEL_NUMS];
+};
+
+struct peci_cputemp {
+ struct peci_client_manager *mgr;
+ struct device *dev;
+ char name[PECI_NAME_SIZE];
+ const struct cpu_gen_info *gen_info;
+ struct temp_group temp;
+ u32 core_mask;
+ u32 temp_config[CPUTEMP_CHANNEL_NUMS + 1];
+ uint config_idx;
+ struct hwmon_channel_info temp_info;
+ const struct hwmon_channel_info *info[2];
+ struct hwmon_chip_info chip;
+};
+
+enum cputemp_channels {
+ channel_die,
+ channel_tcontrol,
+ channel_tthrottle,
+ channel_tjmax,
+ channel_core,
+};
+
+static const u32 config_table[DEFAULT_CHANNEL_NUMS + 1] = {
+ /* Die temperature */
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
+
+ /* Tcontrol temperature */
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_CRIT,
+
+ /* Tthrottle temperature */
+ HWMON_T_LABEL | HWMON_T_INPUT,
+
+ /* Tjmax temperature */
+ HWMON_T_LABEL | HWMON_T_INPUT,
+
+ /* Core temperature - for all core channels */
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
+};
+
+static const char *cputemp_label[CPUTEMP_CHANNEL_NUMS] = {
+ "Die",
+ "Tcontrol",
+ "Tthrottle",
+ "Tjmax",
+ "Core 0", "Core 1", "Core 2", "Core 3",
+ "Core 4", "Core 5", "Core 6", "Core 7",
+ "Core 8", "Core 9", "Core 10", "Core 11",
+ "Core 12", "Core 13", "Core 14", &
Re: [PATCH v8 08/12] mfd: intel-peci-client: Add PECI client MFD driver
On 10/24/2018 10:30 PM, Lee Jones wrote:
On Wed, 24 Oct 2018, Jae Hyun Yoo wrote:
On 10/24/2018 3:59 AM, Lee Jones wrote:
On Tue, 18 Sep 2018, Jae Hyun Yoo wrote:
This commit adds PECI client MFD driver.
[...]
+bool peci_temp_need_update(struct temp_data *temp)
+{
+ if (temp->valid &&
+ time_before(jiffies, temp->last_updated + UPDATE_INTERVAL))
+ return false;
+
+ return true;
+}
+EXPORT_SYMBOL_GPL(peci_temp_need_update);
+
+void peci_temp_mark_updated(struct temp_data *temp)
+{
+ temp->valid = 1;
+ temp->last_updated = jiffies;
+}
+EXPORT_SYMBOL_GPL(peci_temp_mark_updated);
These are probably better suited as inline functions to be placed in
a header file. No need to export them, since they only use their own
data.
Also move them into the HWMON header file.
They have no business in MFD.
Agreed. I'll move them into the HWMON header.
[...]
+int peci_client_rd_pkg_cfg_cmd(struct peci_mfd *priv, u8 mbx_idx,
This is gobbledegook. What's rd? Read?
Yes, the 'rd' means 'read'. I intended to keep command names as listed
in the PECI specification such as RdPkgConfig, WrPkgConfig and so on.
Should I change it to 'peci_client_read_package_config_command' ?
I looks/reads a lot nicer, don't you think?
Okay. I'll change it too.
Thanks again for your review, Lee!
Jae
[...]
Re: [PATCH v8 08/12] mfd: intel-peci-client: Add PECI client MFD driver
Hi Lee,
On 10/24/2018 3:59 AM, Lee Jones wrote:
On Tue, 18 Sep 2018, Jae Hyun Yoo wrote:
This commit adds PECI client MFD driver.
+config MFD_INTEL_PECI_CLIENT
+ bool "Intel PECI client"
+ depends on (PECI || COMPILE_TEST)
+ select MFD_CORE
+ help
+ If you say yes to this option, support will be included for the
+ multi-functional Intel PECI (Platform Environment Control Interface)
Remove 'multi-functional' from this sentence.
Will remove the word.
+static struct mfd_cell peci_functions[] = {
+ {
+ .name = "peci-cputemp",
+ },
+ {
+ .name = "peci-dimmtemp",
+ },
{ .name = "peci-cputemp", },
{ .name = "peci-dimmtemp", },
Will change it like you suggested.
Do these have 2 different drivers? Where are you putting them?
Yes, these have 2 different drivers as hwmon subsystem drivers.
I submitted them into this patch series.
Patch 10/12: https://lkml.org/lkml/2018/9/18/1524
Patch 11/12: https://lkml.org/lkml/2018/9/18/1523
+ /* TODO: Add additional PECI sideband functions into here */
When will this be done?
I'm hoping it will be done by the end of this year.
+};
+
+static const struct cpu_gen_info cpu_gen_info_table[] = {
+ [CPU_GEN_HSX] = {
+ .family= 6, /* Family code */
+ .model = INTEL_FAM6_HASWELL_X,
+ .core_max = CORE_MAX_ON_HSX,
+ .chan_rank_max = CHAN_RANK_MAX_ON_HSX,
+ .dimm_idx_max = DIMM_IDX_MAX_ON_HSX },
+ [CPU_GEN_BRX] = {
+ .family= 6, /* Family code */
+ .model = INTEL_FAM6_BROADWELL_X,
+ .core_max = CORE_MAX_ON_BDX,
+ .chan_rank_max = CHAN_RANK_MAX_ON_BDX,
+ .dimm_idx_max = DIMM_IDX_MAX_ON_BDX },
+ [CPU_GEN_SKX] = {
+ .family= 6, /* Family code */
+ .model = INTEL_FAM6_SKYLAKE_X,
+ .core_max = CORE_MAX_ON_SKX,
+ .chan_rank_max = CHAN_RANK_MAX_ON_SKX,
+ .dimm_idx_max = DIMM_IDX_MAX_ON_SKX },
The '},'s should go on the line below.
Okay. Will fix it.
+};
+
+static int peci_client_get_cpu_gen_info(struct peci_mfd *priv)
Remove all mention of 'mfd'. It's not a thing.
Will remove 'mfd'.
+{
+ u32 cpu_id;
+ int i, rc;
+
+ rc = peci_get_cpu_id(priv->adapter, priv->addr, &cpu_id);
+ if (rc)
+ return rc;
+
+ for (i = 0; i < ARRAY_SIZE(cpu_gen_info_table); i++) {
+ if (FIELD_GET(CPU_ID_FAMILY_MASK, cpu_id) +
+ FIELD_GET(CPU_ID_EXT_FAMILY_MASK, cpu_id) ==
+ cpu_gen_info_table[i].family &&
+ FIELD_GET(CPU_ID_MODEL_MASK, cpu_id) ==
+ FIELD_GET(LOWER_NIBBLE_MASK,
+ cpu_gen_info_table[i].model) &&
+ FIELD_GET(CPU_ID_EXT_MODEL_MASK, cpu_id) ==
+ FIELD_GET(UPPER_NIBBLE_MASK,
+ cpu_gen_info_table[i].model)) {
+ break;
+ }
+ }
This is really read. Please reformat it, even if you have to use
local variables to make it more legible.
Will reformat it using local variables for better readability as you
suggest.
+ if (i >= ARRAY_SIZE(cpu_gen_info_table))
+ return -ENODEV;
Do you really want to fail silently?
No. I'll add a dev_err printing.
+ priv->gen_info = &cpu_gen_info_table[i];
If you do this in the for(), you can then test priv->gen_info instead
of seeing if the iterator maxed out. Much nicer I think.
Yes, that would be much nicer. Will fix it.
+ return 0;
+}
+
+bool peci_temp_need_update(struct temp_data *temp)
+{
+ if (temp->valid &&
+ time_before(jiffies, temp->last_updated + UPDATE_INTERVAL))
+ return false;
+
+ return true;
+}
+EXPORT_SYMBOL_GPL(peci_temp_need_update);
+
+void peci_temp_mark_updated(struct temp_data *temp)
+{
+ temp->valid = 1;
+ temp->last_updated = jiffies;
+}
+EXPORT_SYMBOL_GPL(peci_temp_mark_updated);
These are probably better suited as inline functions to be placed in
a header file. No need to export them, since they only use their own
data.
Yes, that makes sense. I'll change these to inline functions.
+int peci_client_command(struct peci_mfd *priv, enum peci_cmd cmd, void *vmsg)
+{
+ return peci_command(priv->adapter, cmd, vmsg);
+}
+EXPORT_SYMBOL_GPL(peci_client_command);
If you share the adaptor with the client, you can call peci_command()
directly. There should also be some locking in here somewhere too.
Yes, the client->adapter can be referenc
Re: [PATCH v8 07/12] dt-bindings: mfd: Add a document for PECI client MFD
Hi Lee, On 10/24/2018 12:25 AM, Lee Jones wrote: On Tue, 18 Sep 2018, Jae Hyun Yoo wrote: +Required properties: +- compatible : Should be "intel,peci-client". +- reg: Should contain address of a client CPU. Address range of CPU + clients starts from 0x30 based on PECI specification. Nit: "start" Would be better worded: "According to the PECI specification client addresses start from 0x30." Yes, that would be better. Will fix it like you suggested. Thanks for the review! Jae
[RESEND PATCH v8 06/12] peci: Add a PECI adapter driver for Aspeed AST24xx/AST25xx
This commit adds PECI adapter driver implementation for Aspeed AST24xx/AST25xx SoCs. Cc: Joel Stanley Cc: Andrew Jeffery Cc: Andy Shevchenko Cc: Greg Kroah-Hartman Cc: Robin Murphy Cc: Ryan Chen Signed-off-by: Jae Hyun Yoo Reviewed-by: Haiyue Wang Reviewed-by: James Feist Reviewed-by: Vernon Mauery --- drivers/peci/Kconfig | 27 ++ drivers/peci/Makefile | 3 + drivers/peci/peci-aspeed.c | 498 + 3 files changed, 528 insertions(+) create mode 100644 drivers/peci/peci-aspeed.c diff --git a/drivers/peci/Kconfig b/drivers/peci/Kconfig index 4ccacb22a356..9e9845ebcff4 100644 --- a/drivers/peci/Kconfig +++ b/drivers/peci/Kconfig @@ -10,3 +10,30 @@ config PECI The Platform Environment Control Interface (PECI) is a one-wire bus interface that provides a communication channel from Intel processors and chipset components to external monitoring or control devices. + + If you want PECI support, you should say Y here and also to the + specific driver for your bus adapter(s) below. + +if PECI + +# +# PECI hardware bus configuration +# + +menu "PECI Hardware Bus support" + +config PECI_ASPEED + tristate "ASPEED PECI support" + select REGMAP_MMIO + depends on OF + depends on ARCH_ASPEED || COMPILE_TEST + help + Say Y here if you want support for the Platform Environment Control + Interface (PECI) bus adapter driver on the ASPEED SoCs. + + This support is also available as a module. If so, the module + will be called peci-aspeed. + +endmenu + +endif # PECI diff --git a/drivers/peci/Makefile b/drivers/peci/Makefile index 9e8615e0d3ff..886285e69765 100644 --- a/drivers/peci/Makefile +++ b/drivers/peci/Makefile @@ -4,3 +4,6 @@ # Core functionality obj-$(CONFIG_PECI) += peci-core.o + +# Hardware specific bus drivers +obj-$(CONFIG_PECI_ASPEED) += peci-aspeed.o diff --git a/drivers/peci/peci-aspeed.c b/drivers/peci/peci-aspeed.c new file mode 100644 index ..8070ec18d484 --- /dev/null +++ b/drivers/peci/peci-aspeed.c @@ -0,0 +1,498 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2012-2017 ASPEED Technology Inc. +// Copyright (c) 2018 Intel Corporation + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* ASPEED PECI Registers */ +#define ASPEED_PECI_CTRL 0x00 +#define ASPEED_PECI_TIMING 0x04 +#define ASPEED_PECI_CMD 0x08 +#define ASPEED_PECI_CMD_CTRL 0x0c +#define ASPEED_PECI_EXP_FCS 0x10 +#define ASPEED_PECI_CAP_FCS 0x14 +#define ASPEED_PECI_INT_CTRL 0x18 +#define ASPEED_PECI_INT_STS 0x1c +#define ASPEED_PECI_W_DATA0 0x20 +#define ASPEED_PECI_W_DATA1 0x24 +#define ASPEED_PECI_W_DATA2 0x28 +#define ASPEED_PECI_W_DATA3 0x2c +#define ASPEED_PECI_R_DATA0 0x30 +#define ASPEED_PECI_R_DATA1 0x34 +#define ASPEED_PECI_R_DATA2 0x38 +#define ASPEED_PECI_R_DATA3 0x3c +#define ASPEED_PECI_W_DATA4 0x40 +#define ASPEED_PECI_W_DATA5 0x44 +#define ASPEED_PECI_W_DATA6 0x48 +#define ASPEED_PECI_W_DATA7 0x4c +#define ASPEED_PECI_R_DATA4 0x50 +#define ASPEED_PECI_R_DATA5 0x54 +#define ASPEED_PECI_R_DATA6 0x58 +#define ASPEED_PECI_R_DATA7 0x5c + +/* ASPEED_PECI_CTRL - 0x00 : Control Register */ +#define PECI_CTRL_SAMPLING_MASK GENMASK(19, 16) +#define PECI_CTRL_READ_MODE_MASK GENMASK(13, 12) +#define PECI_CTRL_READ_MODE_COUNTBIT(12) +#define PECI_CTRL_READ_MODE_DBG BIT(13) +#define PECI_CTRL_CLK_SOURCE_MASKBIT(11) +#define PECI_CTRL_CLK_DIV_MASK GENMASK(10, 8) +#define PECI_CTRL_INVERT_OUT BIT(7) +#define PECI_CTRL_INVERT_IN BIT(6) +#define PECI_CTRL_BUS_CONTENT_EN BIT(5) +#define PECI_CTRL_PECI_ENBIT(4) +#define PECI_CTRL_PECI_CLK_ENBIT(0) + +/* ASPEED_PECI_TIMING - 0x04 : Timing Negotiation Register */ +#define PECI_TIMING_MESSAGE_MASK GENMASK(15, 8) +#define PECI_TIMING_ADDRESS_MASK GENMASK(7, 0) + +/* ASPEED_PECI_CMD - 0x08 : Command Register */ +#define PECI_CMD_PIN_MON BIT(31) +#define PECI_CMD_STS_MASKGENMASK(27, 24) +#define PECI_CMD_IDLE_MASK (PECI_CMD_STS_MASK | PECI_CMD_PIN_MON) +#define PECI_CMD_FIREBIT(0) + +/* ASPEED_PECI_LEN - 0x0C : Read/Write Length Register */ +#define PECI_AW_FCS_EN BIT(31) +#define PECI_READ_LEN_MASK GENMASK(23, 16) +#define PECI_WRITE_LEN_MASK GENMASK(15, 8) +#define PECI_TAGET_ADDR_MASK GENMASK(7, 0) + +/* ASPEED_PECI_EXP_FCS - 0x10 : Expected FCS Data Register */ +#define PECI_EXPECT_READ_FCS_MASKGENMASK(23, 16) +#define PECI_EXPECT_AW_FCS_AUTO_MASK GENMASK(15, 8) +#define PECI_EXPECT_WRITE_FCS_MASK GENMASK(7, 0) + +/* ASPEED_PECI_CAP_FCS - 0x14 : Captured FCS Data Register */ +#define PECI_CAPTURE_READ_FCS_MASK GENMASK(23, 16) +#define PECI_CAPTURE_WRITE_FCS_MASK GENMASK(7, 0) + +/* ASPEED_PECI_INT_CTRL/STS - 0
[RESEND PATCH v8 05/12] ARM: dts: aspeed: peci: Add PECI node
This commit adds PECI bus/adapter node of AST24xx/AST25xx into
aspeed-g4 and aspeed-g5.
Cc: Rob Herring
Cc: Mark Rutland
Cc: Joel Stanley
Cc: Andrew Jeffery
Cc: Jason M Biils
Cc: Ryan Chen
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
---
arch/arm/boot/dts/aspeed-g4.dtsi | 26 ++
arch/arm/boot/dts/aspeed-g5.dtsi | 26 ++
2 files changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 69f6b9d2e7e7..fa5c358e199c 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -29,6 +29,7 @@
serial3 = &uart4;
serial4 = &uart5;
serial5 = &vuart;
+ peci0 = &peci0;
};
cpus {
@@ -317,6 +318,13 @@
};
};
+ peci: bus@1e78b000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e78b000 0x60>;
+ };
+
uart2: serial@1e78d000 {
compatible = "ns16550a";
reg = <0x1e78d000 0x20>;
@@ -360,6 +368,24 @@
};
};
+&peci {
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2400-peci";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <15>;
+ clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
+ resets = <&syscon ASPEED_RESET_PECI>;
+ clock-frequency = <2400>;
+ msg-timing = <1>;
+ addr-timing = <1>;
+ rd-sampling-point = <8>;
+ cmd-timeout-ms = <1000>;
+ status = "disabled";
+ };
+};
+
&i2c {
i2c_ic: interrupt-controller@0 {
#interrupt-cells = <1>;
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index d107459fc0f8..63900714fbd7 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -29,6 +29,7 @@
serial3 = &uart4;
serial4 = &uart5;
serial5 = &vuart;
+ peci0 = &peci0;
};
cpus {
@@ -377,6 +378,13 @@
};
};
+ peci: bus@1e78b000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e78b000 0x60>;
+ };
+
uart2: serial@1e78d000 {
compatible = "ns16550a";
reg = <0x1e78d000 0x20>;
@@ -420,6 +428,24 @@
};
};
+&peci {
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2500-peci";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <15>;
+ clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
+ resets = <&syscon ASPEED_RESET_PECI>;
+ clock-frequency = <2400>;
+ msg-timing = <1>;
+ addr-timing = <1>;
+ rd-sampling-point = <8>;
+ cmd-timeout-ms = <1000>;
+ status = "disabled";
+ };
+};
+
&i2c {
i2c_ic: interrupt-controller@0 {
#interrupt-cells = <1>;
--
2.19.1
[RESEND PATCH v8 04/12] dt-bindings: Add a document of PECI adapter driver for ASPEED AST24xx/25xx SoCs
This commit adds a dt-bindings document of PECI adapter driver for ASPEED
AST24xx/25xx SoCs.
Cc: Mark Rutland
Cc: Joel Stanley
Cc: Andrew Jeffery
Cc: Benjamin Herrenschmidt
Cc: Greg Kroah-Hartman
Cc: Jason M Biils
Cc: Milton Miller II
Cc: Pavel Machek
Cc: Robin Murphy
Cc: Ryan Chen
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Reviewed-by: Rob Herring
---
.../devicetree/bindings/peci/peci-aspeed.txt | 55 +++
1 file changed, 55 insertions(+)
create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.txt
diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.txt
b/Documentation/devicetree/bindings/peci/peci-aspeed.txt
new file mode 100644
index ..cdca73a3b7d8
--- /dev/null
+++ b/Documentation/devicetree/bindings/peci/peci-aspeed.txt
@@ -0,0 +1,55 @@
+Device tree configuration for PECI buses on the AST24XX and AST25XX SoCs.
+
+Required properties:
+- compatible: Should be one of:
+ "aspeed,ast2400-peci"
+ "aspeed,ast2500-peci"
+- reg : Should contain PECI controller registers location and
+ length.
+- #address-cells: Should be <1> required to define a client address.
+- #size-cells : Should be <0> required to define a client address.
+- interrupts: Should contain PECI controller interrupt.
+- clocks: Should contain clock source for PECI controller. Should
+ reference the external oscillator clock in the second
+ cell.
+- resets: Should contain phandle to reset controller with the reset
+ number in the second cell.
+- clock-frequency : Should contain the operation frequency of PECI controller
+ in units of Hz.
+ 187500 ~ 2400
+
+Optional properties:
+- msg-timing: Message timing negotiation period. This value will
+ determine the period of message timing negotiation to be
+ issued by PECI controller. The unit of the programmed
+ value is four times of PECI clock period.
+ 0 ~ 255 (default: 1)
+- addr-timing : Address timing negotiation period. This value will
+ determine the period of address timing negotiation to be
+ issued by PECI controller. The unit of the programmed
+ value is four times of PECI clock period.
+ 0 ~ 255 (default: 1)
+- rd-sampling-point : Read sampling point selection. The whole period of a bit
+ time will be divided into 16 time frames. This value will
+ determine the time frame in which the controller will
+ sample PECI signal for data read back. Usually in the
+ middle of a bit time is the best.
+ 0 ~ 15 (default: 8)
+- cmd-timeout-ms: Command timeout in units of ms.
+ 1 ~ 6 (default: 1000)
+
+Example:
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2500-peci";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <15>;
+ clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
+ resets = <&syscon ASPEED_RESET_PECI>;
+ clock-frequency = <2400>;
+ msg-timing = <1>;
+ addr-timing = <1>;
+ rd-sampling-point = <8>;
+ cmd-timeout-ms = <1000>;
+ };
--
2.19.1
[RESEND PATCH v8 12/12] Add maintainers for the PECI subsystem
This commit adds maintainer information for the PECI subsystem. Cc: David S. Miller Cc: Mauro Carvalho Chehab Cc: Greg Kroah-Hartman Cc: Andrew Morton Cc: Linus Walleij Cc: Randy Dunlap Cc: Jason M Biils Signed-off-by: Jae Hyun Yoo --- MAINTAINERS | 13 + 1 file changed, 13 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index f934a9187f7c..131f583af3a7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11550,6 +11550,19 @@ L: platform-driver-...@vger.kernel.org S: Maintained F: drivers/platform/x86/peaq-wmi.c +PECI SUBSYSTEM +M: Jae Hyun Yoo +M: Jason M Biils +L: open...@lists.ozlabs.org (moderated for non-subscribers) +S: Maintained +F: Documentation/devicetree/bindings/peci/ +F: drivers/mfd/intel-peci-client.c +F: drivers/peci/ +F: drivers/hwmon/peci-*.c +F: include/linux/mfd/intel-peci-client.h +F: include/linux/peci.h +F: include/uapi/linux/peci-ioctl.h + PER-CPU MEMORY ALLOCATOR M: Dennis Zhou M: Tejun Heo -- 2.19.1
[RESEND PATCH v8 09/12] Documentation: hwmon: Add documents for PECI hwmon client drivers
This commit adds hwmon documents for PECI cputemp and dimmtemp drivers. Cc: Guenter Roeck Cc: Jean Delvare Cc: Jonathan Corbet Cc: Jason M Biils Cc: Randy Dunlap Signed-off-by: Jae Hyun Yoo Reviewed-by: Haiyue Wang Reviewed-by: James Feist Reviewed-by: Vernon Mauery Acked-by: Guenter Roeck --- Documentation/hwmon/peci-cputemp | 78 +++ Documentation/hwmon/peci-dimmtemp | 50 2 files changed, 128 insertions(+) create mode 100644 Documentation/hwmon/peci-cputemp create mode 100644 Documentation/hwmon/peci-dimmtemp diff --git a/Documentation/hwmon/peci-cputemp b/Documentation/hwmon/peci-cputemp new file mode 100644 index ..821a9258f2e6 --- /dev/null +++ b/Documentation/hwmon/peci-cputemp @@ -0,0 +1,78 @@ +Kernel driver peci-cputemp +== + +Supported chips: + One of Intel server CPUs listed below which is connected to a PECI bus. + * Intel Xeon E5/E7 v3 server processors + Intel Xeon E5-14xx v3 family + Intel Xeon E5-24xx v3 family + Intel Xeon E5-16xx v3 family + Intel Xeon E5-26xx v3 family + Intel Xeon E5-46xx v3 family + Intel Xeon E7-48xx v3 family + Intel Xeon E7-88xx v3 family + * Intel Xeon E5/E7 v4 server processors + Intel Xeon E5-16xx v4 family + Intel Xeon E5-26xx v4 family + Intel Xeon E5-46xx v4 family + Intel Xeon E7-48xx v4 family + Intel Xeon E7-88xx v4 family + * Intel Xeon Scalable server processors + Intel Xeon Bronze family + Intel Xeon Silver family + Intel Xeon Gold family + Intel Xeon Platinum family + Addresses scanned: PECI client address 0x30 - 0x37 + Datasheet: Available from http://www.intel.com/design/literature.htm + +Author: + Jae Hyun Yoo + +Description +--- + +This driver implements a generic PECI hwmon feature which provides Digital +Thermal Sensor (DTS) thermal readings of the CPU package and CPU cores that are +accessible using the PECI Client Command Suite via the processor PECI client. + +All temperature values are given in millidegree Celsius and will be measurable +only when the target CPU is powered on. + +sysfs attributes + + +temp1_label"Die" +temp1_inputProvides current die temperature of the CPU package. +temp1_max Provides thermal control temperature of the CPU package + which is also known as Tcontrol. +temp1_crit Provides shutdown temperature of the CPU package which + is also known as the maximum processor junction + temperature, Tjmax or Tprochot. +temp1_crit_hystProvides the hysteresis value from Tcontrol to Tjmax of + the CPU package. + +temp2_label"Tcontrol" +temp2_inputProvides current Tcontrol temperature of the CPU + package which is also known as Fan Temperature target. + Indicates the relative value from thermal monitor trip + temperature at which fans should be engaged. +temp2_crit Provides Tcontrol critical value of the CPU package + which is same to Tjmax. + +temp3_label"Tthrottle" +temp3_inputProvides current Tthrottle temperature of the CPU + package. Used for throttling temperature. If this value + is allowed and lower than Tjmax - the throttle will + occur and reported at lower than Tjmax. + +temp4_label"Tjmax" +temp4_inputProvides the maximum junction temperature, Tjmax of the + CPU package. + +temp[5-*]_labelProvides string "Core X", where X is resolved core + number. +temp[5-*]_inputProvides current temperature of each core. +temp[5-*]_max Provides thermal control temperature of the core. +temp[5-*]_crit Provides shutdown temperature of the core. +temp[5-*]_crit_hystProvides the hysteresis value from Tcontrol to Tjmax of + the core. diff --git a/Documentation/hwmon/peci-dimmtemp b/Documentation/hwmon/peci-dimmtemp new file mode 100644 index ..c54f2526188c --- /dev/null +++ b/Documentation/hwmon/peci-dimmtemp @@ -0,0 +1,50 @@ +Kernel driver peci-dimmtemp +=== + +Supported chips: + One of Intel server CPUs listed below which is connected to a PECI bus. + * Intel Xeon E5/E7 v3 server processors +
[RESEND PATCH v8 08/12] mfd: intel-peci-client: Add PECI client MFD driver
This commit adds PECI client MFD driver.
Cc: Lee Jones
Cc: Randy Dunlap
Cc: Rob Herring
Cc: Andrew Jeffery
Cc: James Feist
Cc: Jason M Biils
Cc: Joel Stanley
Cc: Vernon Mauery
Signed-off-by: Jae Hyun Yoo
---
drivers/mfd/Kconfig | 14 ++
drivers/mfd/Makefile | 1 +
drivers/mfd/intel-peci-client.c | 181 ++
include/linux/mfd/intel-peci-client.h | 81
4 files changed, 277 insertions(+)
create mode 100644 drivers/mfd/intel-peci-client.c
create mode 100644 include/linux/mfd/intel-peci-client.h
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 8c5dfdce4326..9dd647975f0d 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -604,6 +604,20 @@ config MFD_INTEL_MSIC
Passage) chip. This chip embeds audio, battery, GPIO, etc.
devices used in Intel Medfield platforms.
+config MFD_INTEL_PECI_CLIENT
+ bool "Intel PECI client"
+ depends on (PECI || COMPILE_TEST)
+ select MFD_CORE
+ help
+ If you say yes to this option, support will be included for the
+ multi-functional Intel PECI (Platform Environment Control Interface)
+ client. PECI is a one-wire bus interface that provides a communication
+ channel from PECI clients in Intel processors and chipset components
+ to external monitoring or control devices.
+
+ Additional drivers must be enabled in order to use the functionality
+ of the device.
+
config MFD_IPAQ_MICRO
bool "Atmel Micro ASIC (iPAQ h3100/h3600/h3700) Support"
depends on SA1100_H3100 || SA1100_H3600
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 12980a4ad460..b8c1da8e748b 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -204,6 +204,7 @@ obj-$(CONFIG_MFD_INTEL_LPSS)+= intel-lpss.o
obj-$(CONFIG_MFD_INTEL_LPSS_PCI) += intel-lpss-pci.o
obj-$(CONFIG_MFD_INTEL_LPSS_ACPI) += intel-lpss-acpi.o
obj-$(CONFIG_MFD_INTEL_MSIC) += intel_msic.o
+obj-$(CONFIG_MFD_INTEL_PECI_CLIENT)+= intel-peci-client.o
obj-$(CONFIG_MFD_PALMAS) += palmas.o
obj-$(CONFIG_MFD_VIPERBOARD)+= viperboard.o
obj-$(CONFIG_MFD_RC5T583) += rc5t583.o rc5t583-irq.o
diff --git a/drivers/mfd/intel-peci-client.c b/drivers/mfd/intel-peci-client.c
new file mode 100644
index ..507e4ac66dfa
--- /dev/null
+++ b/drivers/mfd/intel-peci-client.c
@@ -0,0 +1,181 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018 Intel Corporation
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+enum cpu_gens {
+ CPU_GEN_HSX = 0, /* Haswell Xeon */
+ CPU_GEN_BRX, /* Broadwell Xeon */
+ CPU_GEN_SKX, /* Skylake Xeon */
+};
+
+static struct mfd_cell peci_functions[] = {
+ {
+ .name = "peci-cputemp",
+ },
+ {
+ .name = "peci-dimmtemp",
+ },
+ /* TODO: Add additional PECI sideband functions into here */
+};
+
+static const struct cpu_gen_info cpu_gen_info_table[] = {
+ [CPU_GEN_HSX] = {
+ .family= 6, /* Family code */
+ .model = INTEL_FAM6_HASWELL_X,
+ .core_max = CORE_MAX_ON_HSX,
+ .chan_rank_max = CHAN_RANK_MAX_ON_HSX,
+ .dimm_idx_max = DIMM_IDX_MAX_ON_HSX },
+ [CPU_GEN_BRX] = {
+ .family= 6, /* Family code */
+ .model = INTEL_FAM6_BROADWELL_X,
+ .core_max = CORE_MAX_ON_BDX,
+ .chan_rank_max = CHAN_RANK_MAX_ON_BDX,
+ .dimm_idx_max = DIMM_IDX_MAX_ON_BDX },
+ [CPU_GEN_SKX] = {
+ .family= 6, /* Family code */
+ .model = INTEL_FAM6_SKYLAKE_X,
+ .core_max = CORE_MAX_ON_SKX,
+ .chan_rank_max = CHAN_RANK_MAX_ON_SKX,
+ .dimm_idx_max = DIMM_IDX_MAX_ON_SKX },
+};
+
+static int peci_client_get_cpu_gen_info(struct peci_mfd *priv)
+{
+ u32 cpu_id;
+ int i, rc;
+
+ rc = peci_get_cpu_id(priv->adapter, priv->addr, &cpu_id);
+ if (rc)
+ return rc;
+
+ for (i = 0; i < ARRAY_SIZE(cpu_gen_info_table); i++) {
+ if (FIELD_GET(CPU_ID_FAMILY_MASK, cpu_id) +
+ FIELD_GET(CPU_ID_EXT_FAMILY_MASK, cpu_id) ==
+ cpu_gen_info_table[i].family &&
+ FIELD_GET(CPU_ID_MODEL_MASK, cpu_id) ==
+ FIELD_GET(LOWER_NIBBLE_MASK,
+ cpu_gen_info_table[i].model) &&
+ FIELD_GET(CPU_ID_EXT_MODEL_MASK, cpu_id) ==
+ FIELD_GET(UPPER_NIBBLE_MASK,
+ cpu_gen_info_table[i].model)) {
+ break;
+ }
+ }
+
+ if (i >= ARRAY_SIZE(cpu_gen_info_table))
+
[RESEND PATCH v8 07/12] dt-bindings: mfd: Add a document for PECI client MFD
This commit adds a dt-bindings document for PECI client MFD.
Cc: Lee Jones
Cc: Rob Herring
Cc: Mark Rutland
Cc: Andrew Jeffery
Cc: James Feist
Cc: Jason M Biils
Cc: Joel Stanley
Cc: Vernon Mauery
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Rob Herring
---
.../bindings/mfd/intel-peci-client.txt| 34 +++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/intel-peci-client.txt
diff --git a/Documentation/devicetree/bindings/mfd/intel-peci-client.txt
b/Documentation/devicetree/bindings/mfd/intel-peci-client.txt
new file mode 100644
index ..cb341e363add
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/intel-peci-client.txt
@@ -0,0 +1,34 @@
+* Intel PECI client bindings
+
+PECI (Platform Environment Control Interface) is a one-wire bus interface that
+provides a communication channel from PECI clients in Intel processors and
+chipset components to external monitoring or control devices. PECI is designed
+to support the following sideband functions:
+
+- Processor and DRAM thermal management
+- Platform Manageability
+- Processor Interface Tuning and Diagnostics
+- Failure Analysis
+
+Required properties:
+- compatible : Should be "intel,peci-client".
+- reg: Should contain address of a client CPU. Address range of CPU
+ clients starts from 0x30 based on PECI specification.
+
+Example:
+ peci-bus@0 {
+ compatible = "vendor,soc-peci";
+ reg = <0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ peci-client@30 {
+ compatible = "intel,peci-client";
+ reg = <0x30>;
+ };
+
+ peci-client@31 {
+ compatible = "intel,peci-client";
+ reg = <0x31>;
+ };
+ };
--
2.19.1
[RESEND PATCH v8 10/12] hwmon: Add PECI cputemp driver
This commit adds PECI cputemp hwmon driver.
Cc: Guenter Roeck
Cc: Jean Delvare
Cc: Alan Cox
Cc: Andrew Jeffery
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Jason M Biils
Cc: Joel Stanley
Cc: Miguel Ojeda
Cc: Andrew Lunn
Cc: Stef van Os
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Acked-by: Guenter Roeck
---
drivers/hwmon/Kconfig| 14 ++
drivers/hwmon/Makefile | 1 +
drivers/hwmon/peci-cputemp.c | 392 +++
3 files changed, 407 insertions(+)
create mode 100644 drivers/hwmon/peci-cputemp.c
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 81da17a42dc9..f08b4a670ac5 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1306,6 +1306,20 @@ config SENSORS_PCF8591
These devices are hard to detect and rarely found on mainstream
hardware. If unsure, say N.
+config SENSORS_PECI_CPUTEMP
+ tristate "PECI CPU temperature monitoring support"
+ depends on PECI
+ select MFD_INTEL_PECI_CLIENT
+ help
+ If you say yes here you get support for the generic Intel PECI
+ cputemp driver which provides Digital Thermal Sensor (DTS) thermal
+ readings of the CPU package and CPU cores that are accessible using
+ the PECI Client Command Suite via the processor PECI client.
+ Check Documentation/hwmon/peci-cputemp for details.
+
+ This driver can also be built as a module. If so, the module
+ will be called peci-cputemp.
+
source drivers/hwmon/pmbus/Kconfig
config SENSORS_PWM_FAN
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index 93f7f41ea4ad..13ebde089ad5 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -141,6 +141,7 @@ obj-$(CONFIG_SENSORS_NTC_THERMISTOR)+=
ntc_thermistor.o
obj-$(CONFIG_SENSORS_PC87360) += pc87360.o
obj-$(CONFIG_SENSORS_PC87427) += pc87427.o
obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o
+obj-$(CONFIG_SENSORS_PECI_CPUTEMP) += peci-cputemp.o
obj-$(CONFIG_SENSORS_POWR1220) += powr1220.o
obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o
obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON)+= raspberrypi-hwmon.o
diff --git a/drivers/hwmon/peci-cputemp.c b/drivers/hwmon/peci-cputemp.c
new file mode 100644
index ..20a48200c786
--- /dev/null
+++ b/drivers/hwmon/peci-cputemp.c
@@ -0,0 +1,392 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018 Intel Corporation
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DEFAULT_CHANNEL_NUMS 4
+#define CORETEMP_CHANNEL_NUMS CORE_NUMS_MAX
+#define CPUTEMP_CHANNEL_NUMS (DEFAULT_CHANNEL_NUMS + CORETEMP_CHANNEL_NUMS)
+
+/* The RESOLVED_CORES register in PCU of a client CPU */
+#define REG_RESOLVED_CORES_BUS 1
+#define REG_RESOLVED_CORES_DEVICE 30
+#define REG_RESOLVED_CORES_FUNCTION 3
+#define REG_RESOLVED_CORES_OFFSET 0xB4
+
+struct temp_group {
+ struct temp_data die;
+ struct temp_data tcontrol;
+ struct temp_data tthrottle;
+ struct temp_data tjmax;
+ struct temp_data core[CORETEMP_CHANNEL_NUMS];
+};
+
+struct peci_cputemp {
+ struct peci_mfd *mfd;
+ struct device *dev;
+ char name[PECI_NAME_SIZE];
+ u8 addr;
+ const struct cpu_gen_info *gen_info;
+ struct temp_group temp;
+ u32 core_mask;
+ u32 temp_config[CPUTEMP_CHANNEL_NUMS + 1];
+ uint config_idx;
+ struct hwmon_channel_info temp_info;
+ const struct hwmon_channel_info *info[2];
+ struct hwmon_chip_info chip;
+};
+
+enum cputemp_channels {
+ channel_die,
+ channel_tcontrol,
+ channel_tthrottle,
+ channel_tjmax,
+ channel_core,
+};
+
+static const u32 config_table[DEFAULT_CHANNEL_NUMS + 1] = {
+ /* Die temperature */
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
+
+ /* Tcontrol temperature */
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_CRIT,
+
+ /* Tthrottle temperature */
+ HWMON_T_LABEL | HWMON_T_INPUT,
+
+ /* Tjmax temperature */
+ HWMON_T_LABEL | HWMON_T_INPUT,
+
+ /* Core temperature - for all core channels */
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
+};
+
+static const char *cputemp_label[CPUTEMP_CHANNEL_NUMS] = {
+ "Die",
+ "Tcontrol",
+ "Tthrottle",
+ "Tjmax",
+ "Core 0", "Core 1", "Core 2", "Core 3",
+ "Core 4", "Core 5", "Core 6", "Core 7",
+ "Core 8", "Core 9", "Core 10", "Core 11",
+ "Core 12", "Core 13", "Core 14", "Core 15",
+ "Core 16", "Core 17", "Core 18", "Core 19",
+
[RESEND PATCH v8 11/12] hwmon: Add PECI dimmtemp driver
This commit adds PECI dimmtemp hwmon driver.
Cc: Guenter Roeck
Cc: Jean Delvare
Cc: Alan Cox
Cc: Andrew Jeffery
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Jason M Biils
Cc: Joel Stanley
Cc: Miguel Ojeda
Cc: Andrew Lunn
Cc: Stef van Os
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Acked-by: Guenter Roeck
---
drivers/hwmon/Kconfig | 14 ++
drivers/hwmon/Makefile| 1 +
drivers/hwmon/peci-dimmtemp.c | 286 ++
3 files changed, 301 insertions(+)
create mode 100644 drivers/hwmon/peci-dimmtemp.c
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index f08b4a670ac5..d2299d850508 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1320,6 +1320,20 @@ config SENSORS_PECI_CPUTEMP
This driver can also be built as a module. If so, the module
will be called peci-cputemp.
+config SENSORS_PECI_DIMMTEMP
+ tristate "PECI DIMM temperature monitoring support"
+ depends on PECI
+ select MFD_INTEL_PECI_CLIENT
+ help
+ If you say yes here you get support for the generic Intel PECI hwmon
+ driver which provides Digital Thermal Sensor (DTS) thermal readings of
+ DIMM components that are accessible using the PECI Client Command
+ Suite via the processor PECI client.
+ Check Documentation/hwmon/peci-dimmtemp for details.
+
+ This driver can also be built as a module. If so, the module
+ will be called peci-dimmtemp.
+
source drivers/hwmon/pmbus/Kconfig
config SENSORS_PWM_FAN
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index 13ebde089ad5..b7cf35bcfbaf 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -142,6 +142,7 @@ obj-$(CONFIG_SENSORS_PC87360) += pc87360.o
obj-$(CONFIG_SENSORS_PC87427) += pc87427.o
obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o
obj-$(CONFIG_SENSORS_PECI_CPUTEMP) += peci-cputemp.o
+obj-$(CONFIG_SENSORS_PECI_DIMMTEMP)+= peci-dimmtemp.o
obj-$(CONFIG_SENSORS_POWR1220) += powr1220.o
obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o
obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON)+= raspberrypi-hwmon.o
diff --git a/drivers/hwmon/peci-dimmtemp.c b/drivers/hwmon/peci-dimmtemp.c
new file mode 100644
index ..0b0155fa627b
--- /dev/null
+++ b/drivers/hwmon/peci-dimmtemp.c
@@ -0,0 +1,286 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018 Intel Corporation
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DIMM_MASK_CHECK_DELAY_JIFFIES msecs_to_jiffies(5000)
+#define DIMM_MASK_CHECK_RETRY_MAX 60 /* 60 x 5 secs = 5 minutes */
+
+struct peci_dimmtemp {
+ struct peci_mfd *mfd;
+ struct device *dev;
+ char name[PECI_NAME_SIZE];
+ u8 addr;
+ const struct cpu_gen_info *gen_info;
+ struct workqueue_struct *work_queue;
+ struct delayed_work work_handler;
+ struct temp_data temp[DIMM_NUMS_MAX];
+ u32 dimm_mask;
+ int retry_count;
+ u32 temp_config[DIMM_NUMS_MAX + 1];
+ struct hwmon_channel_info temp_info;
+ const struct hwmon_channel_info *info[2];
+ struct hwmon_chip_info chip;
+};
+
+static const char *dimmtemp_label[CHAN_RANK_MAX][DIMM_IDX_MAX] = {
+ { "DIMM A1", "DIMM A2", "DIMM A3" },
+ { "DIMM B1", "DIMM B2", "DIMM B3" },
+ { "DIMM C1", "DIMM C2", "DIMM C3" },
+ { "DIMM D1", "DIMM D2", "DIMM D3" },
+ { "DIMM E1", "DIMM E2", "DIMM E3" },
+ { "DIMM F1", "DIMM F2", "DIMM F3" },
+ { "DIMM G1", "DIMM G2", "DIMM G3" },
+ { "DIMM H1", "DIMM H2", "DIMM H3" },
+};
+
+static int get_dimm_temp(struct peci_dimmtemp *priv, int dimm_no)
+{
+ int dimm_order = dimm_no % priv->gen_info->dimm_idx_max;
+ int chan_rank = dimm_no / priv->gen_info->dimm_idx_max;
+ u8 cfg_data[4];
+ int rc;
+
+ if (!peci_temp_need_update(&priv->temp[dimm_no]))
+ return 0;
+
+ rc = peci_client_rd_pkg_cfg_cmd(priv->mfd, MBX_INDEX_DDR_DIMM_TEMP,
+ chan_rank, cfg_data);
+ if (rc)
+ return rc;
+
+ priv->temp[dimm_no].value = cfg_data[dimm_order] * 1000;
+
+ peci_temp_mark_updated(&priv->temp[dimm_no]);
+
+ return 0;
+}
+
+static int dimmtemp_read_string(struct device *dev,
+ enum hwmon_sensor_types type,
+ u32 attr, int channel, const char **str)
+{
+ struct peci_dimmtemp *priv = dev_get_drvdata(dev);
+ u32 dimm_idx_max = priv->gen_info->dimm_idx_max;
+ int chan_rank, dimm_idx;
+
[RESEND PATCH v8 03/12] peci: Add support for PECI bus driver core
This commit adds driver implementation for PECI bus core into linux
driver framework.
Cc: Greg Kroah-Hartman
Cc: Philippe Ombredanne
Cc: Gavin Schenk
Cc: Vinod Koul
Cc: Thomas Gleixner
Cc: Sagar Dharia
Cc: David Kershner
Cc: Johan Hovold
Cc: Uwe Kleine-Konig
Cc: Viresh Kumar
Cc: Randy Dunlap
Cc: Cyrille Pitchen
Cc: Juergen Gross
Cc: Alan Cox
Cc: Andrew Lunn
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Benjamin Herrenschmidt
Cc: Fengguang Wu
Cc: Jason M Biils
Cc: Julia Cartwright
Signed-off-by: Jae Hyun Yoo
Signed-off-by: Fengguang Wu
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
---
drivers/Kconfig |2 +
drivers/Makefile|1 +
drivers/peci/Kconfig| 12 +
drivers/peci/Makefile |6 +
drivers/peci/peci-core.c| 1440 +++
include/linux/peci.h| 104 +++
include/uapi/linux/peci-ioctl.h | 265 ++
7 files changed, 1830 insertions(+)
create mode 100644 drivers/peci/Kconfig
create mode 100644 drivers/peci/Makefile
create mode 100644 drivers/peci/peci-core.c
create mode 100644 include/linux/peci.h
create mode 100644 include/uapi/linux/peci-ioctl.h
diff --git a/drivers/Kconfig b/drivers/Kconfig
index ec510981554a..30354be4e969 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -221,4 +221,6 @@ source "drivers/slimbus/Kconfig"
source "drivers/interconnect/Kconfig"
+source "drivers/peci/Kconfig"
+
endmenu
diff --git a/drivers/Makefile b/drivers/Makefile
index 06f68339e2a7..6174e573fb82 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -187,3 +187,4 @@ obj-$(CONFIG_UNISYS_VISORBUS) += visorbus/
obj-$(CONFIG_SIOX) += siox/
obj-$(CONFIG_GNSS) += gnss/
obj-$(CONFIG_INTERCONNECT) += interconnect/
+obj-$(CONFIG_PECI) += peci/
diff --git a/drivers/peci/Kconfig b/drivers/peci/Kconfig
new file mode 100644
index ..4ccacb22a356
--- /dev/null
+++ b/drivers/peci/Kconfig
@@ -0,0 +1,12 @@
+#
+# Platform Environment Control Interface (PECI) subsystem configuration
+#
+
+config PECI
+ bool "PECI support"
+ select RT_MUTEXES
+ select CRC8
+ help
+ The Platform Environment Control Interface (PECI) is a one-wire bus
+ interface that provides a communication channel from Intel processors
+ and chipset components to external monitoring or control devices.
diff --git a/drivers/peci/Makefile b/drivers/peci/Makefile
new file mode 100644
index ..9e8615e0d3ff
--- /dev/null
+++ b/drivers/peci/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile for the PECI core and bus drivers.
+#
+
+# Core functionality
+obj-$(CONFIG_PECI) += peci-core.o
diff --git a/drivers/peci/peci-core.c b/drivers/peci/peci-core.c
new file mode 100644
index ..7a99e823c14b
--- /dev/null
+++ b/drivers/peci/peci-core.c
@@ -0,0 +1,1440 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018 Intel Corporation
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* Mask for getting minor revision number from DIB */
+#define MINOR_REV_NUM_MASK GENMASK(11, 8)
+
+/* CRC8 table for Assure Write Frame Check */
+#define PECI_CRC8_POLYNOMIAL 0x07
+DECLARE_CRC8_TABLE(peci_crc8_table);
+
+static struct device_type peci_adapter_type;
+static struct device_type peci_client_type;
+
+/* Max number of peci cdev */
+#define PECI_CDEV_MAX16
+
+static dev_t peci_devt;
+static bool is_registered;
+
+static DEFINE_MUTEX(core_lock);
+static DEFINE_IDR(peci_adapter_idr);
+
+static struct peci_adapter *peci_get_adapter(int nr)
+{
+ struct peci_adapter *adapter;
+
+ mutex_lock(&core_lock);
+ adapter = idr_find(&peci_adapter_idr, nr);
+ if (!adapter)
+ goto out_unlock;
+
+ if (try_module_get(adapter->owner))
+ get_device(&adapter->dev);
+ else
+ adapter = NULL;
+
+out_unlock:
+ mutex_unlock(&core_lock);
+ return adapter;
+}
+
+static void peci_put_adapter(struct peci_adapter *adapter)
+{
+ if (!adapter)
+ return;
+
+ put_device(&adapter->dev);
+ module_put(adapter->owner);
+}
+
+static ssize_t name_show(struct device *dev,
+struct device_attribute *attr,
+char *buf)
+{
+ return sprintf(buf, "%s\n", dev->type == &peci_client_type ?
+ to_peci_client(dev)->name : to_peci_adapter(dev)->name);
+}
+static DEVICE_ATTR_RO(name);
+
+static void peci_client_dev_release(struct device *dev)
+{
+ struct peci_client *client = to_peci_client(dev);
+
+ dev_dbg(dev, "%s: %s\n", __func__, client->name);
+ peci_put_adapter(client->adapter);
+ kfree(client);
+}
+
+static struct attribute *
[RESEND PATCH v8 00/12] PECI device driver introduction
o millidegree. - Dropped non-standard attributes in hwmon driver. - Fixed OF table for hwmon to make it indicate as a PECI client of Intel CPU target. - Added a maintainer of PECI subsystem into MAINTAINERS document. Jae Hyun Yoo (12): dt-bindings: Add a document of PECI subsystem Documentation: ioctl: Add ioctl numbers for PECI subsystem peci: Add support for PECI bus driver core dt-bindings: Add a document of PECI adapter driver for ASPEED AST24xx/25xx SoCs ARM: dts: aspeed: peci: Add PECI node peci: Add a PECI adapter driver for Aspeed AST24xx/AST25xx dt-bindings: mfd: Add a document for PECI client MFD mfd: intel-peci-client: Add PECI client MFD driver Documentation: hwmon: Add documents for PECI hwmon client drivers hwmon: Add PECI cputemp driver hwmon: Add PECI dimmtemp driver Add maintainers for the PECI subsystem .../bindings/mfd/intel-peci-client.txt| 34 + .../devicetree/bindings/peci/peci-aspeed.txt | 55 + .../devicetree/bindings/peci/peci.txt | 43 + Documentation/hwmon/peci-cputemp | 78 + Documentation/hwmon/peci-dimmtemp | 50 + Documentation/ioctl/ioctl-number.txt |2 + MAINTAINERS | 13 + arch/arm/boot/dts/aspeed-g4.dtsi | 26 + arch/arm/boot/dts/aspeed-g5.dtsi | 26 + drivers/Kconfig |2 + drivers/Makefile |1 + drivers/hwmon/Kconfig | 28 + drivers/hwmon/Makefile|2 + drivers/hwmon/peci-cputemp.c | 392 + drivers/hwmon/peci-dimmtemp.c | 286 drivers/mfd/Kconfig | 14 + drivers/mfd/Makefile |1 + drivers/mfd/intel-peci-client.c | 181 +++ drivers/peci/Kconfig | 39 + drivers/peci/Makefile |9 + drivers/peci/peci-aspeed.c| 498 ++ drivers/peci/peci-core.c | 1440 + include/linux/mfd/intel-peci-client.h | 81 + include/linux/peci.h | 104 ++ include/uapi/linux/peci-ioctl.h | 265 +++ 25 files changed, 3670 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/intel-peci-client.txt create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.txt create mode 100644 Documentation/devicetree/bindings/peci/peci.txt create mode 100644 Documentation/hwmon/peci-cputemp create mode 100644 Documentation/hwmon/peci-dimmtemp create mode 100644 drivers/hwmon/peci-cputemp.c create mode 100644 drivers/hwmon/peci-dimmtemp.c create mode 100644 drivers/mfd/intel-peci-client.c create mode 100644 drivers/peci/Kconfig create mode 100644 drivers/peci/Makefile create mode 100644 drivers/peci/peci-aspeed.c create mode 100644 drivers/peci/peci-core.c create mode 100644 include/linux/mfd/intel-peci-client.h create mode 100644 include/linux/peci.h create mode 100644 include/uapi/linux/peci-ioctl.h -- 2.19.1
[RESEND PATCH v8 02/12] Documentation: ioctl: Add ioctl numbers for PECI subsystem
This commit updates ioctl-number.txt to reflect ioctl numbers used by the PECI subsystem. Cc: Jonathan Corbet Cc: Greg Kroah-Hartman Cc: Kishon Vijay Abraham I Cc: Lorenzo Pieralisi Cc: Gustavo Pimentel Cc: Darrick J. Wong Cc: Tomohiro Kusumi Cc: Eric Sandeen Cc: Frederic Barrat Cc: Bryant G. Ly Cc: Arnd Bergmann Cc: James Feist Cc: Jason M Biils Cc: Vernon Mauery Signed-off-by: Jae Hyun Yoo --- Documentation/ioctl/ioctl-number.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt index af6f6ba1fe80..aaf0006a7113 100644 --- a/Documentation/ioctl/ioctl-number.txt +++ b/Documentation/ioctl/ioctl-number.txt @@ -326,6 +326,8 @@ Code Seq#(hex) Include FileComments 0xB4 00-0F linux/gpio.h<mailto:linux-g...@vger.kernel.org> 0xB5 00-0F uapi/linux/rpmsg.h <mailto:linux-remotep...@vger.kernel.org> 0xB6 all linux/fpga-dfl.h +0xB7 00-0F uapi/linux/peci-ioctl.h PECI subsystem + <mailto:jae.hyun@linux.intel.com> 0xC0 00-0F linux/usb/iowarrior.h 0xCA 00-0F uapi/misc/cxl.h 0xCA 10-2F uapi/misc/ocxl.h -- 2.19.1
[RESEND PATCH v8 01/12] dt-bindings: Add a document of PECI subsystem
This commit adds a document of generic PECI bus, adapter and client
driver.
Cc: Rob Herring
Cc: Mark Rutland
Cc: Andrew Jeffery
Cc: Joel Stanley
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Reviewed-by: Rob Herring
---
.../devicetree/bindings/peci/peci.txt | 43 +++
1 file changed, 43 insertions(+)
create mode 100644 Documentation/devicetree/bindings/peci/peci.txt
diff --git a/Documentation/devicetree/bindings/peci/peci.txt
b/Documentation/devicetree/bindings/peci/peci.txt
new file mode 100644
index ..864b7ab4e9fa
--- /dev/null
+++ b/Documentation/devicetree/bindings/peci/peci.txt
@@ -0,0 +1,43 @@
+Generic device tree configuration for PECI adapters
+===
+
+Required properties:
+- #address-cells : Should be <1>. Read more about client addresses below.
+- #size-cells: Should be <0>. Read more about client addresses below.
+
+The cells properties above define that an address of CPU clients of a PECI bus
+are described by a single value.
+
+Example:
+ peci0: peci-bus@0 {
+ compatible = "vendor,soc-peci";
+ reg = <0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+Generic device tree configuration for PECI clients
+==
+
+Required properties:
+- compatible : Should contain name of PECI client.
+- reg: Should contain address of a client CPU. Address range of CPU
+ clients starts from 0x30 based on PECI specification.
+
+Example:
+ peci-bus@0 {
+ compatible = "vendor,soc-peci";
+ reg = <0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ peci-client@30 {
+ compatible = "intel,peci-client";
+ reg = <0x30>;
+ };
+
+ peci-client@31 {
+ compatible = "intel,peci-client";
+ reg = <0x31>;
+ };
+ };
--
2.19.1
Re: [PATCH v8 07/12] dt-bindings: mfd: Add a document for PECI client MFD
On 9/27/2018 8:15 AM, Rob Herring wrote: On Tue, 18 Sep 2018 14:51:19 -0700, Jae Hyun Yoo wrote: This commit adds a dt-bindings document for PECI client MFD. Cc: Lee Jones Cc: Rob Herring Cc: Mark Rutland Cc: Andrew Jeffery Cc: James Feist Cc: Jason M Biils Cc: Joel Stanley Cc: Vernon Mauery Signed-off-by: Jae Hyun Yoo --- .../bindings/mfd/intel-peci-client.txt| 34 +++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/intel-peci-client.txt Reviewed-by: Rob Herring Thanks for the review, Rob!
Re: [PATCH v8 01/12] dt-bindings: Add a document of PECI subsystem
On 9/27/2018 8:10 AM, Rob Herring wrote: On Tue, 18 Sep 2018 14:51:13 -0700, Jae Hyun Yoo wrote: This commit adds a document of generic PECI bus, adapter and client driver. Cc: Rob Herring Cc: Mark Rutland Cc: Andrew Jeffery Cc: Joel Stanley Signed-off-by: Jae Hyun Yoo Reviewed-by: Haiyue Wang Reviewed-by: James Feist Reviewed-by: Vernon Mauery --- .../devicetree/bindings/peci/peci.txt | 43 +++ 1 file changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/peci/peci.txt Reviewed-by: Rob Herring Thanks for the review, Rob!
[v4 08/11] Documentation: hwmon: Add documents for PECI hwmon client drivers
This commit adds hwmon documents for PECI cputemp and dimmtemp drivers. Signed-off-by: Jae Hyun Yoo Reviewed-by: Haiyue Wang Reviewed-by: James Feist Reviewed-by: Vernon Mauery Cc: Jason M Biils Cc: Randy Dunlap --- Documentation/hwmon/peci-cputemp | 78 +++ Documentation/hwmon/peci-dimmtemp | 50 2 files changed, 128 insertions(+) create mode 100644 Documentation/hwmon/peci-cputemp create mode 100644 Documentation/hwmon/peci-dimmtemp diff --git a/Documentation/hwmon/peci-cputemp b/Documentation/hwmon/peci-cputemp new file mode 100644 index ..821a9258f2e6 --- /dev/null +++ b/Documentation/hwmon/peci-cputemp @@ -0,0 +1,78 @@ +Kernel driver peci-cputemp +== + +Supported chips: + One of Intel server CPUs listed below which is connected to a PECI bus. + * Intel Xeon E5/E7 v3 server processors + Intel Xeon E5-14xx v3 family + Intel Xeon E5-24xx v3 family + Intel Xeon E5-16xx v3 family + Intel Xeon E5-26xx v3 family + Intel Xeon E5-46xx v3 family + Intel Xeon E7-48xx v3 family + Intel Xeon E7-88xx v3 family + * Intel Xeon E5/E7 v4 server processors + Intel Xeon E5-16xx v4 family + Intel Xeon E5-26xx v4 family + Intel Xeon E5-46xx v4 family + Intel Xeon E7-48xx v4 family + Intel Xeon E7-88xx v4 family + * Intel Xeon Scalable server processors + Intel Xeon Bronze family + Intel Xeon Silver family + Intel Xeon Gold family + Intel Xeon Platinum family + Addresses scanned: PECI client address 0x30 - 0x37 + Datasheet: Available from http://www.intel.com/design/literature.htm + +Author: + Jae Hyun Yoo + +Description +--- + +This driver implements a generic PECI hwmon feature which provides Digital +Thermal Sensor (DTS) thermal readings of the CPU package and CPU cores that are +accessible using the PECI Client Command Suite via the processor PECI client. + +All temperature values are given in millidegree Celsius and will be measurable +only when the target CPU is powered on. + +sysfs attributes + + +temp1_label"Die" +temp1_inputProvides current die temperature of the CPU package. +temp1_max Provides thermal control temperature of the CPU package + which is also known as Tcontrol. +temp1_crit Provides shutdown temperature of the CPU package which + is also known as the maximum processor junction + temperature, Tjmax or Tprochot. +temp1_crit_hystProvides the hysteresis value from Tcontrol to Tjmax of + the CPU package. + +temp2_label"Tcontrol" +temp2_inputProvides current Tcontrol temperature of the CPU + package which is also known as Fan Temperature target. + Indicates the relative value from thermal monitor trip + temperature at which fans should be engaged. +temp2_crit Provides Tcontrol critical value of the CPU package + which is same to Tjmax. + +temp3_label"Tthrottle" +temp3_inputProvides current Tthrottle temperature of the CPU + package. Used for throttling temperature. If this value + is allowed and lower than Tjmax - the throttle will + occur and reported at lower than Tjmax. + +temp4_label"Tjmax" +temp4_inputProvides the maximum junction temperature, Tjmax of the + CPU package. + +temp[5-*]_labelProvides string "Core X", where X is resolved core + number. +temp[5-*]_inputProvides current temperature of each core. +temp[5-*]_max Provides thermal control temperature of the core. +temp[5-*]_crit Provides shutdown temperature of the core. +temp[5-*]_crit_hystProvides the hysteresis value from Tcontrol to Tjmax of + the core. diff --git a/Documentation/hwmon/peci-dimmtemp b/Documentation/hwmon/peci-dimmtemp new file mode 100644 index ..c54f2526188c --- /dev/null +++ b/Documentation/hwmon/peci-dimmtemp @@ -0,0 +1,50 @@ +Kernel driver peci-dimmtemp +=== + +Supported chips: + One of Intel server CPUs listed below which is connected to a PECI bus. + * Intel Xeon E5/E7 v3 server processors + Intel Xeon E5-14xx v3 family + Intel Xeon E5-24
[v4 02/11] Documentation: ioctl: Add ioctl numbers for PECI subsystem
This commit updates ioctl-number.txt to reflect ioctl numbers used by the PECI subsystem. Signed-off-by: Jae Hyun Yoo Cc: James Feist Cc: Jason M Biils Cc: Vernon Mauery --- Documentation/ioctl/ioctl-number.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt index 480c8609dc58..1670ca4072b2 100644 --- a/Documentation/ioctl/ioctl-number.txt +++ b/Documentation/ioctl/ioctl-number.txt @@ -322,6 +322,8 @@ Code Seq#(hex) Include FileComments 0xB3 00 linux/mmc/ioctl.h 0xB4 00-0F linux/gpio.h<mailto:linux-g...@vger.kernel.org> 0xB5 00-0F uapi/linux/rpmsg.h <mailto:linux-remotep...@vger.kernel.org> +0xB6 00-0F uapi/linux/peci-ioctl.h PECI subsystem + <mailto:jae.hyun@linux.intel.com> 0xC0 00-0F linux/usb/iowarrior.h 0xCA 00-0F uapi/misc/cxl.h 0xCA 10-2F uapi/misc/ocxl.h -- 2.17.0 -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 00/10] PECI device driver introduction
ess format use reg contents. * Simplified bit manipulations using . * Made client CPU model checking use if available. * Modified adapter heap allocation method to use kobject reference count based. * Added the low-level PECI xfer IOCTL again to support the Redfish requirement. * Added PM domain attach/detach code. * Added logic for device instantiation through sysfs. * Fix a bug of interrupt status checking code in peci-aspeed driver. Changes from v2: * Divided peci-hwmon driver into two drivers, peci-cputemp and peci-dimmtemp. * Added generic dt binding documents for PECI bus, adapter and client. * Removed in_atomic() call from the PECI core driver. * Improved PECI commands masking logic. * Added permission check logic for PECI ioctls. * Removed unnecessary type casts. * Fixed some invalid error return codes. * Added the mark_updated() function to improve update interval checking logic. * Fixed a bug in populated DIMM checking function. * Fixed some typo, grammar and style issues in documents. * Rewrote hwmon drivers to use devm_hwmon_device_register_with_info API. * Made peci_match_id() function as a static. * Replaced a deprecated create_singlethread_workqueue() call with an alloc_ordered_workqueue() call. * Reordered local variable definitions in reversed xmas tree notation. * Listed up client CPUs that can be supported by peci-cputemp and peci-dimmtemp hwmon drivers. * Added CPU generation detection logic which checks CPUID signature through PECI connection. * Improved interrupt handling logic in the Aspeed PECI adapter driver. * Fixed SPDX license identifier style in header files. * Changed some macros in peci.h to static inline functions. * Dropped sleepable context checking code in peci-core. * Adjusted rt_mutex protection scope in peci-core. * Moved adapter->xfer() checking code into peci_register_adapter(). * Improved PECI command retry checking logic. * Changed ioctl base from 'P' to 0xb6 to avoid confiliction and updated ioctl-number.txt to reflect the ioctl number of PECI subsystem. * Added a comment to describe PECI retry action. * Simplified return code handling of peci_ioctl_ping(). * Changed type of peci_ioctl_fn[] to static const. * Fixed range checking code for valid PECI commands. * Fixed the error return code on invalid PECI commands. * Fixed incorrect definitions of PECI ioctl and its handling logic. Changes from v1: * Additionally implemented a core driver to support PECI linux bus driver model. * Modified Aspeed PECI driver to make that to be an adapter driver in PECI bus. * Modified PECI hwmon driver to make that to be a client driver in PECI bus. * Simplified hwmon driver attribute labels and removed redundant strings. * Removed core_nums from device tree setting of hwmon driver and modified core number detection logic to check the resolved_core register in client CPU's local PCI configuration area. * Removed dimm_nums from device tree setting of hwmon driver and added populated DIMM detection logic to support dynamic creation. * Removed indexing gap on core temperature and DIMM temperature attributes. * Improved hwmon registration and dynamic attribute creation logic. * Fixed structure definitions in PECI uapi header to make that use __u8, __u16 and etc. * Modified wait_for_completion_interruptible_timeout error handling logic in Aspeed PECI driver to deliver errors correctly. * Removed low-level xfer command from ioctl and kept only high-level PECI command suite as ioctls. * Fixed I/O timeout logic in Aspeed PECI driver using ktime. * Added a function into hwmon driver to simplify update delay checking. * Added a function into hwmon driver to convert 10.6 to millidegree. * Dropped non-standard attributes in hwmon driver. * Fixed OF table for hwmon to make it indicate as a PECI client of Intel CPU target. * Added a maintainer of PECI subsystem into MAINTAINERS document. Jae Hyun Yoo (11): dt-bindings: Add a document of PECI subsystem Documentation: ioctl: Add ioctl numbers for PECI subsystem drivers/peci: Add support for PECI bus driver core dt-bindings: Add a document of PECI adapter driver for ASPEED AST24xx/25xx SoCs ARM: dts: aspeed: peci: Add PECI node drivers/peci: Add a PECI adapter driver for Aspeed AST24xx/AST25xx dt-bindings: hwmon: Add documents for PECI hwmon client drivers Documentation: hwmon: Add documents for PECI hwmon client drivers drivers/hwmon: Add PECI cputemp driver drivers/hwmon: Add PECI dimmtemp driver Add maintainers for the PECI subsystem .../bindings/hwmon/peci-cputemp.txt | 23 + .../bindings/hwmon/peci-dimmtemp.txt | 24 + .../devicetree/bindings/peci/peci-aspeed.txt | 57 + .../devicetree/bindings/peci/peci.txt | 59 + Documentation/hwmon/peci-cputemp | 78 + Documentation/hwmon/peci-dimmtemp | 50 + Documentation/ioctl/ioctl-number.txt |2 + MAINTAINERS
Re: [PATCH v3 03/10] drivers/peci: Add support for PECI bus driver core
On 4/24/2018 9:01 AM, Andy Shevchenko wrote: On Tue, 2018-04-10 at 11:32 -0700, Jae Hyun Yoo wrote: This commit adds driver implementation for PECI bus core into linux driver framework. All comments you got for patch 6 are applicable here. And perhaps in the rest of the series. The rule of thumb: when you get even single comment in a certain place, re-check _entire_ series for the same / similar patterns! Thanks for your advice. I'll keep that in mind. Jae -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 09/10] drivers/hwmon: Add PECI hwmon client drivers
Hi Andy,
Thanks a lot for your review. Please check my inline answers.
On 4/24/2018 8:56 AM, Andy Shevchenko wrote:
On Tue, 2018-04-10 at 11:32 -0700, Jae Hyun Yoo wrote:
drivers/hwmon/peci-cputemp.c | 783
++
drivers/hwmon/peci-dimmtemp.c | 432 +++
Does it make sense one driver per patch?
Yes, I'll separate it into two patches.
+#define CLIENT_CPU_ID_MASK0xf0ff0 /* Mask for Family / Model
info */
+struct cpu_gen_info {
+ u32 type;
+ u32 cpu_id;
+ u32 core_max;
+};
+static const struct cpu_gen_info cpu_gen_info_table[] = {
+ { .type = CPU_GEN_HSX,
+ .cpu_id = 0x306f0, /* Family code: 6, Model number: 63
(0x3f) */
+ .core_max = CORE_MAX_ON_HSX },
+ { .type = CPU_GEN_BRX,
+ .cpu_id = 0x406f0, /* Family code: 6, Model number: 79
(0x4f) */
+ .core_max = CORE_MAX_ON_BDX },
+ { .type = CPU_GEN_SKX,
+ .cpu_id = 0x50650, /* Family code: 6, Model number: 85
(0x55) */
+ .core_max = CORE_MAX_ON_SKX },
+};
Are we talking about x86 CPU IDs here?
If so, why x86 corresponding headers, including intel-family.h are not
used?
Yes, that would make more sense. I'll include the intel-family.h and
will use these defines instead:
INTEL_FAM6_HASWELL_X
INTEL_FAM6_BROADWELL_X
INTEL_FAM6_SKYLAKE_X
Thanks,
Jae
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Re: [PATCH v3 03/10] drivers/peci: Add support for PECI bus driver core
On 4/23/2018 3:52 AM, Greg KH wrote:
On Tue, Apr 10, 2018 at 11:32:05AM -0700, Jae Hyun Yoo wrote:
+static void peci_adapter_dev_release(struct device *dev)
+{
+ /* do nothing */
+}
As per the in-kernel documentation, I am now allowed to make fun of you.
You are trying to "out smart" the kernel by getting rid of a warning
message that was explicitly put there for you to do something. To think
that by just providing an "empty" function you are somehow fulfilling
the API requirement is quite bold, don't you think?
This has to be fixed. I didn't put that warning in there for no good
reason. Please go read the documentation again...
greg k-h
Hi Greg,
Thanks a lot for your review.
I think, it should contain actual device resource release code which is
being done by peci_del_adapter(), or a coupling logic should be added
between peci_adapter_dev_release() and peci_del_adapter().
As you suggested, I'll check it again after reading documentation and
understanding core.c code more deeply.
Jae
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Re: [PATCH v3 07/10] Documentation: dt-bindings: Add documents for PECI hwmon client drivers
On 4/18/2018 2:57 PM, Jae Hyun Yoo wrote:
On 4/18/2018 2:28 PM, Rob Herring wrote:
On Wed, Apr 18, 2018 at 3:28 PM, Jae Hyun Yoo
wrote:
On 4/18/2018 7:32 AM, Rob Herring wrote:
On Tue, Apr 17, 2018 at 3:40 PM, Jae Hyun Yoo
wrote:
On 4/16/2018 4:51 PM, Jae Hyun Yoo wrote:
On 4/16/2018 4:22 PM, Jae Hyun Yoo wrote:
On 4/16/2018 11:14 AM, Rob Herring wrote:
On Tue, Apr 10, 2018 at 11:32:09AM -0700, Jae Hyun Yoo wrote:
This commit adds dt-bindings documents for PECI cputemp and
dimmtemp
client
drivers.
[...]
+Example:
+ peci-bus@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ < more properties >
+
+ peci-dimmtemp@cpu0 {
unit-address is wrong.
Will fix it using the reg value.
It is a different bus from cputemp? Otherwise, you have conflicting
addresses. If that's the case, probably should make it clear by
showing
different host adapters for each example.
It could be the same bus with cputemp. Also, client address
sharing is
possible by PECI core if the functionality is different. I mean,
cputemp and
dimmtemp targeting the same client is possible case like this.
peci-cputemp@30
peci-dimmtemp@30
Oh, I got your point. Probably, I should change these separate
settings
into one like
peci-client@30 {
compatible = "intel,peci-client";
reg = <0x30>;
};
Then cputemp and dimmtemp drivers could refer the same compatible
string.
Will rewrite it.
I've checked it again and realized that it should use function
based node
name like:
peci-cputemp@30
peci-dimmtemp@30
If it use the same string like 'peci-client@30', the drivers cannot be
selectively enabled. The client address sharing way is well handled in
PECI
core and this way would be better for the future implementations of
other
PECI functional drivers such as crash dump driver and so on. So I'm
going
change the unit-address only.
2 nodes at the same address is wrong (and soon dtc will warn you on
this). You have 2 potential options. The first is you need additional
address information in the DT if these are in fact 2 independent
devices. This could be something like a function number to use
something from PCI addressing. From what I found on PECI, it doesn't
seem to have anything like that. The 2nd option is you have a single
DT node which registers multiple hwmon devices. DT nodes and drivers
don't have to be 1-1. Don't design your DT nodes from how you want to
partition drivers in some OS.
Rob
Please correct me if I'm wrong but I'm still thinking that it is
possible. Also, I did compile it but dtc doesn't make a warning. Let me
show an another use case which is similar to this case:
I did say *soon*. It's in dtc repo, but not the kernel copy yet.
In arch/arm/boot/dts/aspeed-g5.dtsi
[...]
lpc_host: lpc-host@80 {
compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
reg = <0x80 0x1e0>;
reg-io-width = <4>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x80 0x1e0>;
lpc_ctrl: lpc-ctrl@0 {
compatible = "aspeed,ast2500-lpc-ctrl";
reg = <0x0 0x80>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
lpc_snoop: lpc-snoop@0 {
compatible = "aspeed,ast2500-lpc-snoop";
reg = <0x0 0x80>;
interrupts = <8>;
status = "disabled";
};
}
[...]
This is device tree setting for LPC interface and its child nodes.
LPC interface can be used as a multi-functional interface such as
snoop 80, KCS, SIO and so on. In this use case, lpc-ctrl@0 and
lpc-snoop@0 are sharing their address range from their individual
driver modules and they can be registered quite well through both
static dt or dynamic dtoverlay. PECI is also a multi-functional
interface which is similar to the above case, I think.
This case too is poor design and should be fixed as well. Simply put,
you can have 2 devices on a bus at the same address without some sort
of mux or arbitration device in the middle. If you have a device/block
with multiple functions provided to the OS, then it is the OS's
problem to arbitrate access. It is not a DT problem because OS's can
vary in how they handle that both from OS to OS and over time.
Rob
If I change it to a single DT node which registers 2 hwmon devices using
the 2nd option above, then I still have 2 devices on a bus at the same
address. Does it also make a problem to the OS then?
Jae
Additionally, I need to explain that there is one and only bus host
(adapter) and multiple clients on a PECI bus, and PECI spec doesn't
allow multiple originators so only the host device can ori
Re: [PATCH v3 07/10] Documentation: dt-bindings: Add documents for PECI hwmon client drivers
On 4/18/2018 2:28 PM, Rob Herring wrote:
On Wed, Apr 18, 2018 at 3:28 PM, Jae Hyun Yoo
wrote:
On 4/18/2018 7:32 AM, Rob Herring wrote:
On Tue, Apr 17, 2018 at 3:40 PM, Jae Hyun Yoo
wrote:
On 4/16/2018 4:51 PM, Jae Hyun Yoo wrote:
On 4/16/2018 4:22 PM, Jae Hyun Yoo wrote:
On 4/16/2018 11:14 AM, Rob Herring wrote:
On Tue, Apr 10, 2018 at 11:32:09AM -0700, Jae Hyun Yoo wrote:
This commit adds dt-bindings documents for PECI cputemp and dimmtemp
client
drivers.
[...]
+Example:
+peci-bus@0 {
+#address-cells = <1>;
+#size-cells = <0>;
+< more properties >
+
+peci-dimmtemp@cpu0 {
unit-address is wrong.
Will fix it using the reg value.
It is a different bus from cputemp? Otherwise, you have conflicting
addresses. If that's the case, probably should make it clear by
showing
different host adapters for each example.
It could be the same bus with cputemp. Also, client address sharing is
possible by PECI core if the functionality is different. I mean,
cputemp and
dimmtemp targeting the same client is possible case like this.
peci-cputemp@30
peci-dimmtemp@30
Oh, I got your point. Probably, I should change these separate settings
into one like
peci-client@30 {
compatible = "intel,peci-client";
reg = <0x30>;
};
Then cputemp and dimmtemp drivers could refer the same compatible
string.
Will rewrite it.
I've checked it again and realized that it should use function based node
name like:
peci-cputemp@30
peci-dimmtemp@30
If it use the same string like 'peci-client@30', the drivers cannot be
selectively enabled. The client address sharing way is well handled in
PECI
core and this way would be better for the future implementations of other
PECI functional drivers such as crash dump driver and so on. So I'm going
change the unit-address only.
2 nodes at the same address is wrong (and soon dtc will warn you on
this). You have 2 potential options. The first is you need additional
address information in the DT if these are in fact 2 independent
devices. This could be something like a function number to use
something from PCI addressing. From what I found on PECI, it doesn't
seem to have anything like that. The 2nd option is you have a single
DT node which registers multiple hwmon devices. DT nodes and drivers
don't have to be 1-1. Don't design your DT nodes from how you want to
partition drivers in some OS.
Rob
Please correct me if I'm wrong but I'm still thinking that it is
possible. Also, I did compile it but dtc doesn't make a warning. Let me
show an another use case which is similar to this case:
I did say *soon*. It's in dtc repo, but not the kernel copy yet.
In arch/arm/boot/dts/aspeed-g5.dtsi
[...]
lpc_host: lpc-host@80 {
compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
reg = <0x80 0x1e0>;
reg-io-width = <4>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x80 0x1e0>;
lpc_ctrl: lpc-ctrl@0 {
compatible = "aspeed,ast2500-lpc-ctrl";
reg = <0x0 0x80>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
lpc_snoop: lpc-snoop@0 {
compatible = "aspeed,ast2500-lpc-snoop";
reg = <0x0 0x80>;
interrupts = <8>;
status = "disabled";
};
}
[...]
This is device tree setting for LPC interface and its child nodes.
LPC interface can be used as a multi-functional interface such as
snoop 80, KCS, SIO and so on. In this use case, lpc-ctrl@0 and
lpc-snoop@0 are sharing their address range from their individual
driver modules and they can be registered quite well through both
static dt or dynamic dtoverlay. PECI is also a multi-functional
interface which is similar to the above case, I think.
This case too is poor design and should be fixed as well. Simply put,
you can have 2 devices on a bus at the same address without some sort
of mux or arbitration device in the middle. If you have a device/block
with multiple functions provided to the OS, then it is the OS's
problem to arbitrate access. It is not a DT problem because OS's can
vary in how they handle that both from OS to OS and over time.
Rob
If I change it to a single DT node which registers 2 hwmon devices using
the 2nd option above, then I still have 2 devices on a bus at the same
address. Does it also make a problem to the OS then?
Jae
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Re: [PATCH v3 07/10] Documentation: dt-bindings: Add documents for PECI hwmon client drivers
On 4/18/2018 7:32 AM, Rob Herring wrote:
On Tue, Apr 17, 2018 at 3:40 PM, Jae Hyun Yoo
wrote:
On 4/16/2018 4:51 PM, Jae Hyun Yoo wrote:
On 4/16/2018 4:22 PM, Jae Hyun Yoo wrote:
On 4/16/2018 11:14 AM, Rob Herring wrote:
On Tue, Apr 10, 2018 at 11:32:09AM -0700, Jae Hyun Yoo wrote:
This commit adds dt-bindings documents for PECI cputemp and dimmtemp
client
drivers.
[...]
+Example:
+peci-bus@0 {
+#address-cells = <1>;
+#size-cells = <0>;
+< more properties >
+
+peci-dimmtemp@cpu0 {
unit-address is wrong.
Will fix it using the reg value.
It is a different bus from cputemp? Otherwise, you have conflicting
addresses. If that's the case, probably should make it clear by showing
different host adapters for each example.
It could be the same bus with cputemp. Also, client address sharing is
possible by PECI core if the functionality is different. I mean, cputemp and
dimmtemp targeting the same client is possible case like this.
peci-cputemp@30
peci-dimmtemp@30
Oh, I got your point. Probably, I should change these separate settings
into one like
peci-client@30 {
compatible = "intel,peci-client";
reg = <0x30>;
};
Then cputemp and dimmtemp drivers could refer the same compatible string.
Will rewrite it.
I've checked it again and realized that it should use function based node
name like:
peci-cputemp@30
peci-dimmtemp@30
If it use the same string like 'peci-client@30', the drivers cannot be
selectively enabled. The client address sharing way is well handled in PECI
core and this way would be better for the future implementations of other
PECI functional drivers such as crash dump driver and so on. So I'm going
change the unit-address only.
2 nodes at the same address is wrong (and soon dtc will warn you on
this). You have 2 potential options. The first is you need additional
address information in the DT if these are in fact 2 independent
devices. This could be something like a function number to use
something from PCI addressing. From what I found on PECI, it doesn't
seem to have anything like that. The 2nd option is you have a single
DT node which registers multiple hwmon devices. DT nodes and drivers
don't have to be 1-1. Don't design your DT nodes from how you want to
partition drivers in some OS.
Rob
Please correct me if I'm wrong but I'm still thinking that it is
possible. Also, I did compile it but dtc doesn't make a warning. Let me
show an another use case which is similar to this case:
In arch/arm/boot/dts/aspeed-g5.dtsi
[...]
lpc_host: lpc-host@80 {
compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
reg = <0x80 0x1e0>;
reg-io-width = <4>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x80 0x1e0>;
lpc_ctrl: lpc-ctrl@0 {
compatible = "aspeed,ast2500-lpc-ctrl";
reg = <0x0 0x80>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
lpc_snoop: lpc-snoop@0 {
compatible = "aspeed,ast2500-lpc-snoop";
reg = <0x0 0x80>;
interrupts = <8>;
status = "disabled";
};
}
[...]
This is device tree setting for LPC interface and its child nodes.
LPC interface can be used as a multi-functional interface such as
snoop 80, KCS, SIO and so on. In this use case, lpc-ctrl@0 and
lpc-snoop@0 are sharing their address range from their individual
driver modules and they can be registered quite well through both
static dt or dynamic dtoverlay. PECI is also a multi-functional
interface which is similar to the above case, I think.
Thanks,
Jae
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Re: [PATCH v3 04/10] Documentations: dt-bindings: Add a document of PECI adapter driver for Aspeed AST24xx/25xx SoCs
On 4/18/2018 6:59 AM, Rob Herring wrote: On Tue, Apr 17, 2018 at 5:06 PM, Jae Hyun Yoo wrote: On 4/17/2018 11:16 AM, Jae Hyun Yoo wrote: On 4/17/2018 6:16 AM, Rob Herring wrote: On Mon, Apr 16, 2018 at 6:12 PM, Jae Hyun Yoo wrote: On 4/16/2018 11:10 AM, Rob Herring wrote: On Tue, Apr 10, 2018 at 11:32:06AM -0700, Jae Hyun Yoo wrote: This commit adds a dt-bindings document of PECI adapter driver for Aspeed AST24xx/25xx SoCs. [...] +- clocks: Should contain clock source for PECI controller. + Should reference clkin. +- clock_frequency : Should contain the operation frequency of PECI controller + in units of Hz. + 187500 ~ 2400 This is the frequency of the bus or used to derive it? It would be better to specify the bus frequency instead and have the driver calculate its internal freq. And then use "bus-frequency" instead. I agree with you. Actually, it is being used for operation frequency setting of PECI controller module in SoC so it's different from the meaning of "bus-frequency". I'll change it to "operation-frequency". No, now you've gone from a standard property name to something custom. Why do you need to set the frequency in DT if it is not related to the interface frequency? Rob Actually, the interface frequency is affected by the operation frequency but there is no description of its relationship in datasheet. I'll check again about the detail to ASPEED chip vendor and will use 'bus-frequency' if available. I investigated it more deeply. Basically, by the spec, PECI bus speed cannot be set as a fixed speed. A PECI bus can have a wide speed range from 2Kbps to 2Mbps which is dynamically set by a handshaking sequence between an originator and clients called 'timing negotiation' in spec. This timing negotiation behavior happens on every single transaction so the bus speed also can vary on every transactions. So I'm thinking a custom property name for it, 'peci-clk-frequency' if it is acceptable. Okay, seems bus-frequency is not appropriate here. So use 'clock-frequency' (note the '-' not '_' as that is the standard property). Rob Thanks! I'll use 'clock-frequency' for it. Jae -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 04/10] Documentations: dt-bindings: Add a document of PECI adapter driver for Aspeed AST24xx/25xx SoCs
On 4/17/2018 11:16 AM, Jae Hyun Yoo wrote: On 4/17/2018 6:16 AM, Rob Herring wrote: On Mon, Apr 16, 2018 at 6:12 PM, Jae Hyun Yoo wrote: On 4/16/2018 11:10 AM, Rob Herring wrote: On Tue, Apr 10, 2018 at 11:32:06AM -0700, Jae Hyun Yoo wrote: This commit adds a dt-bindings document of PECI adapter driver for Aspeed AST24xx/25xx SoCs. [...] +- clocks : Should contain clock source for PECI controller. + Should reference clkin. +- clock_frequency : Should contain the operation frequency of PECI controller + in units of Hz. + 187500 ~ 2400 This is the frequency of the bus or used to derive it? It would be better to specify the bus frequency instead and have the driver calculate its internal freq. And then use "bus-frequency" instead. I agree with you. Actually, it is being used for operation frequency setting of PECI controller module in SoC so it's different from the meaning of "bus-frequency". I'll change it to "operation-frequency". No, now you've gone from a standard property name to something custom. Why do you need to set the frequency in DT if it is not related to the interface frequency? Rob Actually, the interface frequency is affected by the operation frequency but there is no description of its relationship in datasheet. I'll check again about the detail to ASPEED chip vendor and will use 'bus-frequency' if available. I investigated it more deeply. Basically, by the spec, PECI bus speed cannot be set as a fixed speed. A PECI bus can have a wide speed range from 2Kbps to 2Mbps which is dynamically set by a handshaking sequence between an originator and clients called 'timing negotiation' in spec. This timing negotiation behavior happens on every single transaction so the bus speed also can vary on every transactions. So I'm thinking a custom property name for it, 'peci-clk-frequency' if it is acceptable. Thanks, Jae -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 07/10] Documentation: dt-bindings: Add documents for PECI hwmon client drivers
On 4/16/2018 4:51 PM, Jae Hyun Yoo wrote:
On 4/16/2018 4:22 PM, Jae Hyun Yoo wrote:
On 4/16/2018 11:14 AM, Rob Herring wrote:
On Tue, Apr 10, 2018 at 11:32:09AM -0700, Jae Hyun Yoo wrote:
This commit adds dt-bindings documents for PECI cputemp and dimmtemp
client
drivers.
[...]
+Example:
+ peci-bus@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ < more properties >
+
+ peci-dimmtemp@cpu0 {
unit-address is wrong.
Will fix it using the reg value.
It is a different bus from cputemp? Otherwise, you have conflicting
addresses. If that's the case, probably should make it clear by showing
different host adapters for each example.
It could be the same bus with cputemp. Also, client address sharing is
possible by PECI core if the functionality is different. I mean,
cputemp and dimmtemp targeting the same client is possible case like
this.
peci-cputemp@30
peci-dimmtemp@30
Oh, I got your point. Probably, I should change these separate settings
into one like
peci-client@30 {
compatible = "intel,peci-client";
reg = <0x30>;
};
Then cputemp and dimmtemp drivers could refer the same compatible
string. Will rewrite it.
I've checked it again and realized that it should use function based
node name like:
peci-cputemp@30
peci-dimmtemp@30
If it use the same string like 'peci-client@30', the drivers cannot be
selectively enabled. The client address sharing way is well handled in
PECI core and this way would be better for the future implementations of
other PECI functional drivers such as crash dump driver and so on. So
I'm going change the unit-address only.
Thanks,
Jae
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Re: [PATCH v3 06/10] drivers/peci: Add a PECI adapter driver for Aspeed AST24xx/AST25xx
Hi Robin,
On 4/17/2018 6:37 AM, Robin Murphy wrote:
Just a drive-by nit:
On 10/04/18 19:32, Jae Hyun Yoo wrote:
[...]
+#define PECI_CTRL_SAMPLING_MASK GENMASK(19, 16)
+#define PECI_CTRL_SAMPLING(x) (((x) << 16) &
PECI_CTRL_SAMPLING_MASK)
+#define PECI_CTRL_SAMPLING_GET(x) (((x) & PECI_CTRL_SAMPLING_MASK)
>> 16)
FWIW, already provides functionality like this, so it
might be worth taking a look at FIELD_{GET,PREP}() to save all these
local definitions.
Robin.
Yes, that looks better. Thanks a lot for your pointing it out.
Jae
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Re: [PATCH v3 04/10] Documentations: dt-bindings: Add a document of PECI adapter driver for Aspeed AST24xx/25xx SoCs
On 4/17/2018 6:16 AM, Rob Herring wrote: On Mon, Apr 16, 2018 at 6:12 PM, Jae Hyun Yoo wrote: On 4/16/2018 11:10 AM, Rob Herring wrote: On Tue, Apr 10, 2018 at 11:32:06AM -0700, Jae Hyun Yoo wrote: This commit adds a dt-bindings document of PECI adapter driver for Aspeed AST24xx/25xx SoCs. [...] +- clocks: Should contain clock source for PECI controller. + Should reference clkin. +- clock_frequency : Should contain the operation frequency of PECI controller + in units of Hz. + 187500 ~ 2400 This is the frequency of the bus or used to derive it? It would be better to specify the bus frequency instead and have the driver calculate its internal freq. And then use "bus-frequency" instead. I agree with you. Actually, it is being used for operation frequency setting of PECI controller module in SoC so it's different from the meaning of "bus-frequency". I'll change it to "operation-frequency". No, now you've gone from a standard property name to something custom. Why do you need to set the frequency in DT if it is not related to the interface frequency? Rob Actually, the interface frequency is affected by the operation frequency but there is no description of its relationship in datasheet. I'll check again about the detail to ASPEED chip vendor and will use 'bus-frequency' if available. Thanks, Jae -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 07/10] Documentation: dt-bindings: Add documents for PECI hwmon client drivers
On 4/16/2018 4:22 PM, Jae Hyun Yoo wrote:
On 4/16/2018 11:14 AM, Rob Herring wrote:
On Tue, Apr 10, 2018 at 11:32:09AM -0700, Jae Hyun Yoo wrote:
This commit adds dt-bindings documents for PECI cputemp and dimmtemp
client
drivers.
"dt-bindings: hwmon: ..." for the subject.
I'll change the subject.
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Cc: Alan Cox
Cc: Andrew Jeffery
Cc: Andrew Lunn
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Benjamin Herrenschmidt
Cc: Fengguang Wu
Cc: Greg KH
Cc: Guenter Roeck
Cc: Jason M Biils
Cc: Jean Delvare
Cc: Joel Stanley
Cc: Julia Cartwright
Cc: Miguel Ojeda
Cc: Milton Miller II
Cc: Pavel Machek
Cc: Randy Dunlap
Cc: Stef van Os
Cc: Sumeet R Pawnikar
---
.../devicetree/bindings/hwmon/peci-cputemp.txt | 24
+
.../devicetree/bindings/hwmon/peci-dimmtemp.txt | 25
++
2 files changed, 49 insertions(+)
create mode 100644
Documentation/devicetree/bindings/hwmon/peci-cputemp.txt
create mode 100644
Documentation/devicetree/bindings/hwmon/peci-dimmtemp.txt
diff --git a/Documentation/devicetree/bindings/hwmon/peci-cputemp.txt
b/Documentation/devicetree/bindings/hwmon/peci-cputemp.txt
new file mode 100644
index ..d5530ef9cfd2
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/peci-cputemp.txt
@@ -0,0 +1,24 @@
+Bindings for Intel PECI (Platform Environment Control Interface)
cputemp driver.
+
+Required properties:
+- compatible : Should be "intel,peci-cputemp".
+- reg : Should contain address of a client CPU. Address range
of CPU
+ clients is starting from 0x30 based on PECI specification.
+ <0x30> .. <0x37> (depends on the PECI_OFFSET_MAX definition)
Again, where is PECI_OFFSET_MAX defined? It can't depend on something in
the kernel.
I'll remove the unnecessary description.
+
+Example:
+ peci-bus@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ < more properties >
+
+ peci-cputemp@cpu0 {
+ compatible = "intel,peci-cputemp";
+ reg = <0x30>;
+ };
+
+ peci-cputemp@cpu1 {
+ compatible = "intel,peci-cputemp";
+ reg = <0x31>;
+ };
+ };
diff --git
a/Documentation/devicetree/bindings/hwmon/peci-dimmtemp.txt
b/Documentation/devicetree/bindings/hwmon/peci-dimmtemp.txt
new file mode 100644
index ..56e5deb61e5c
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/peci-dimmtemp.txt
@@ -0,0 +1,25 @@
+Bindings for Intel PECI (Platform Environment Control Interface)
dimmtemp
+driver.
+
+Required properties:
+- compatible : Should be "intel,peci-dimmtemp".
+- reg : Should contain address of a client CPU. Address range
of CPU
+ clients is starting from 0x30 based on PECI specification.
+ <0x30> .. <0x37> (depends on the PECI_OFFSET_MAX definition)
+
+Example:
+ peci-bus@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ < more properties >
+
+ peci-dimmtemp@cpu0 {
unit-address is wrong.
Will fix it using the reg value.
It is a different bus from cputemp? Otherwise, you have conflicting
addresses. If that's the case, probably should make it clear by showing
different host adapters for each example.
It could be the same bus with cputemp. Also, client address sharing is
possible by PECI core if the functionality is different. I mean, cputemp
and dimmtemp targeting the same client is possible case like this.
peci-cputemp@30
peci-dimmtemp@30
Oh, I got your point. Probably, I should change these separate settings
into one like
peci-client@30 {
compatible = "intel,peci-client";
reg = <0x30>;
};
Then cputemp and dimmtemp drivers could refer the same compatible
string. Will rewrite it.
+ compatible = "intel,peci-dimmtemp";
+ reg = <0x30>;
+ };
+
+ peci-dimmtemp@cpu1 {
+ compatible = "intel,peci-dimmtemp";
+ reg = <0x31>;
+ };
+ };
--
2.16.2
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Re: [PATCH v3 07/10] Documentation: dt-bindings: Add documents for PECI hwmon client drivers
On 4/16/2018 11:14 AM, Rob Herring wrote:
On Tue, Apr 10, 2018 at 11:32:09AM -0700, Jae Hyun Yoo wrote:
This commit adds dt-bindings documents for PECI cputemp and dimmtemp client
drivers.
"dt-bindings: hwmon: ..." for the subject.
I'll change the subject.
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Cc: Alan Cox
Cc: Andrew Jeffery
Cc: Andrew Lunn
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Benjamin Herrenschmidt
Cc: Fengguang Wu
Cc: Greg KH
Cc: Guenter Roeck
Cc: Jason M Biils
Cc: Jean Delvare
Cc: Joel Stanley
Cc: Julia Cartwright
Cc: Miguel Ojeda
Cc: Milton Miller II
Cc: Pavel Machek
Cc: Randy Dunlap
Cc: Stef van Os
Cc: Sumeet R Pawnikar
---
.../devicetree/bindings/hwmon/peci-cputemp.txt | 24 +
.../devicetree/bindings/hwmon/peci-dimmtemp.txt| 25 ++
2 files changed, 49 insertions(+)
create mode 100644 Documentation/devicetree/bindings/hwmon/peci-cputemp.txt
create mode 100644 Documentation/devicetree/bindings/hwmon/peci-dimmtemp.txt
diff --git a/Documentation/devicetree/bindings/hwmon/peci-cputemp.txt
b/Documentation/devicetree/bindings/hwmon/peci-cputemp.txt
new file mode 100644
index ..d5530ef9cfd2
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/peci-cputemp.txt
@@ -0,0 +1,24 @@
+Bindings for Intel PECI (Platform Environment Control Interface) cputemp
driver.
+
+Required properties:
+- compatible : Should be "intel,peci-cputemp".
+- reg: Should contain address of a client CPU. Address range of CPU
+ clients is starting from 0x30 based on PECI specification.
+ <0x30> .. <0x37> (depends on the PECI_OFFSET_MAX definition)
Again, where is PECI_OFFSET_MAX defined? It can't depend on something in
the kernel.
I'll remove the unnecessary description.
+
+Example:
+ peci-bus@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ < more properties >
+
+ peci-cputemp@cpu0 {
+ compatible = "intel,peci-cputemp";
+ reg = <0x30>;
+ };
+
+ peci-cputemp@cpu1 {
+ compatible = "intel,peci-cputemp";
+ reg = <0x31>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/hwmon/peci-dimmtemp.txt
b/Documentation/devicetree/bindings/hwmon/peci-dimmtemp.txt
new file mode 100644
index ..56e5deb61e5c
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/peci-dimmtemp.txt
@@ -0,0 +1,25 @@
+Bindings for Intel PECI (Platform Environment Control Interface) dimmtemp
+driver.
+
+Required properties:
+- compatible : Should be "intel,peci-dimmtemp".
+- reg: Should contain address of a client CPU. Address range of CPU
+ clients is starting from 0x30 based on PECI specification.
+ <0x30> .. <0x37> (depends on the PECI_OFFSET_MAX definition)
+
+Example:
+ peci-bus@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ < more properties >
+
+ peci-dimmtemp@cpu0 {
unit-address is wrong.
Will fix it using the reg value.
It is a different bus from cputemp? Otherwise, you have conflicting
addresses. If that's the case, probably should make it clear by showing
different host adapters for each example.
It could be the same bus with cputemp. Also, client address sharing is
possible by PECI core if the functionality is different. I mean, cputemp
and dimmtemp targeting the same client is possible case like this.
peci-cputemp@30
peci-dimmtemp@30
+ compatible = "intel,peci-dimmtemp";
+ reg = <0x30>;
+ };
+
+ peci-dimmtemp@cpu1 {
+ compatible = "intel,peci-dimmtemp";
+ reg = <0x31>;
+ };
+ };
--
2.16.2
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Re: [PATCH v3 04/10] Documentations: dt-bindings: Add a document of PECI adapter driver for Aspeed AST24xx/25xx SoCs
On 4/16/2018 11:10 AM, Rob Herring wrote:
On Tue, Apr 10, 2018 at 11:32:06AM -0700, Jae Hyun Yoo wrote:
This commit adds a dt-bindings document of PECI adapter driver for Aspeed
AST24xx/25xx SoCs.
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Cc: Alan Cox
Cc: Andrew Jeffery
Cc: Andrew Lunn
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Benjamin Herrenschmidt
Cc: Fengguang Wu
Cc: Greg KH
Cc: Guenter Roeck
Cc: Jason M Biils
Cc: Jean Delvare
Cc: Joel Stanley
Cc: Julia Cartwright
Cc: Miguel Ojeda
Cc: Milton Miller II
Cc: Pavel Machek
Cc: Randy Dunlap
Cc: Stef van Os
Cc: Sumeet R Pawnikar
---
.../devicetree/bindings/peci/peci-aspeed.txt | 60 ++
1 file changed, 60 insertions(+)
create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.txt
diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.txt
b/Documentation/devicetree/bindings/peci/peci-aspeed.txt
new file mode 100644
index ..4598bb8c20fa
--- /dev/null
+++ b/Documentation/devicetree/bindings/peci/peci-aspeed.txt
@@ -0,0 +1,60 @@
+Device tree configuration for PECI buses on the AST24XX and AST25XX SoCs.
+
+Required properties:
+- compatible: Should be "aspeed,ast2400-peci" or "aspeed,ast2500-peci"
+ - aspeed,ast2400-peci: Aspeed AST2400 family PECI
+controller
+ - aspeed,ast2500-peci: Aspeed AST2500 family PECI
+controller
+- reg : Should contain PECI controller registers location and
+ length.
+- #address-cells: Should be <1>.
+- #size-cells : Should be <0>.
+- interrupts: Should contain PECI controller interrupt.
+- clocks: Should contain clock source for PECI controller.
+ Should reference clkin.
+- clock_frequency : Should contain the operation frequency of PECI controller
+ in units of Hz.
+ 187500 ~ 2400
This is the frequency of the bus or used to derive it? It would be
better to specify the bus frequency instead and have the driver
calculate its internal freq. And then use "bus-frequency" instead.
I agree with you. Actually, it is being used for operation frequency
setting of PECI controller module in SoC so it's different from the
meaning of "bus-frequency". I'll change it to "operation-frequency".
+
+Optional properties:
+- msg-timing-nego : Message timing negotiation period. This value will
+ determine the period of message timing negotiation to be
+ issued by PECI controller. The unit of the programmed
+ value is four times of PECI clock period.
+ 0 ~ 255 (default: 1)
+- addr-timing-nego : Address timing negotiation period. This value will
+ determine the period of address timing negotiation to be
+ issued by PECI controller. The unit of the programmed
+ value is four times of PECI clock period.
+ 0 ~ 255 (default: 1)
+- rd-sampling-point : Read sampling point selection. The whole period of a bit
+ time will be divided into 16 time frames. This value will
+ determine the time frame in which the controller will
+ sample PECI signal for data read back. Usually in the
+ middle of a bit time is the best.
+ 0 ~ 15 (default: 8)
+- cmd_timeout_ms: Command timeout in units of ms.
+ 1 ~ 6 (default: 1000)
s/_/-/
Will fix it.
All these either need vendor prefixes or should be standard properties
for PECI adapters. I think probably the latter case. If so, the first
2 should probably be in units of clocks (not 4 clocks). And they should
then be documented in the common PECI binding doc.
So far I've checked that these are ASPEED PECI controller specific
properties so it should be listed in here.
+
+Example:
+ peci: peci@1e78b000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e78b000 0x60>;
No need to show this part in examples.
Got it. Will drop the part.
+
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2500-peci";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <15>;
+ clocks = <&clk_clkin>;
+ clock-frequency = <2400>;
+ msg-timing-
Re: [PATCH v3 01/10] Documentations: dt-bindings: Add documents of generic PECI bus, adapter and client drivers
Hi Rob,
Thanks for sharing your time. Please see my answers inline.
On 4/16/2018 10:59 AM, Rob Herring wrote:
On Tue, Apr 10, 2018 at 11:32:03AM -0700, Jae Hyun Yoo wrote:
This commit adds documents of generic PECI bus, adapter and client drivers.
"dt-bindings: ..." for the subject prefix please.
Sure, I'll change the subject.
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Cc: Alan Cox
Cc: Andrew Jeffery
Cc: Andrew Lunn
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Benjamin Herrenschmidt
Cc: Fengguang Wu
Cc: Greg KH
Cc: Guenter Roeck
Cc: Jason M Biils
Cc: Jean Delvare
Cc: Joel Stanley
Cc: Julia Cartwright
Cc: Miguel Ojeda
Cc: Milton Miller II
Cc: Pavel Machek
Cc: Randy Dunlap
Cc: Stef van Os
Cc: Sumeet R Pawnikar
---
.../devicetree/bindings/peci/peci-adapter.txt | 23
.../devicetree/bindings/peci/peci-bus.txt | 15 +
.../devicetree/bindings/peci/peci-client.txt | 25 ++
This should be all one document.
Okay. I'll combine them into one document.
3 files changed, 63 insertions(+)
create mode 100644 Documentation/devicetree/bindings/peci/peci-adapter.txt
create mode 100644 Documentation/devicetree/bindings/peci/peci-bus.txt
create mode 100644 Documentation/devicetree/bindings/peci/peci-client.txt
diff --git a/Documentation/devicetree/bindings/peci/peci-adapter.txt
b/Documentation/devicetree/bindings/peci/peci-adapter.txt
new file mode 100644
index ..9221374f6b11
--- /dev/null
+++ b/Documentation/devicetree/bindings/peci/peci-adapter.txt
@@ -0,0 +1,23 @@
+Generic device tree configuration for PECI adapters.
+
+Required properties:
+- compatible : Should contain hardware specific definition strings that can
+ match an adapter driver implementation.
+- reg: Should contain PECI controller registers location and
length.
No need for these 2 here.
Will drop these 2.
+- #address-cells : Should be <1>.
+- #size-cells: Should be <0>.
Some details on the addressing for PECI would be good.
It is for the PECI client address. Will add details.
+
+Example:
+ peci: peci@1000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1000 0x1000>;
+
This part of the example is not relevant. Just start with the adapter
node.
Will remove that part. Thanks!
+ peci0: peci-bus@0 {
+ compatible = "soc,soc-peci";
+ reg = <0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/peci/peci-bus.txt
b/Documentation/devicetree/bindings/peci/peci-bus.txt
new file mode 100644
index ..90bcc791ccb0
--- /dev/null
+++ b/Documentation/devicetree/bindings/peci/peci-bus.txt
@@ -0,0 +1,15 @@
+Generic device tree configuration for PECI buses.
+
+Required properties:
+- compatible : Should be "simple-bus".
I don't understand what this has to do with PECI? "simple-bus" already
has a defined meaning.
Maybe I'm wrong but I intended to show this node is an umbrella node of
a PECI bus subsystem. What should I use then?
+- #address-cells : Should be <1>.
+- #size-cells: Should be <1>.
+- ranges : Should contain PECI controller registers ranges.
+
+Example:
+ peci: peci@1000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1000 0x1000>;
+ };
diff --git a/Documentation/devicetree/bindings/peci/peci-client.txt
b/Documentation/devicetree/bindings/peci/peci-client.txt
new file mode 100644
index ..8e2bfd8532f6
--- /dev/null
+++ b/Documentation/devicetree/bindings/peci/peci-client.txt
@@ -0,0 +1,25 @@
+Generic device tree configuration for PECI clients.
+
+Required properties:
+- compatible : Should contain target device specific definition strings that
can
+ match a client driver implementation.
Bindings are for h/w, not client drivers.
How are PECI devices defined?
Got it. I'll correct the description. PECI client device is Intel CPU
which is connected through a PECI bus.
+- reg: Should contain address of a client CPU. Address range of CPU
+ clients is starting from 0x30 based on PECI specification.
+ <0x30> .. <0x37> (depends on the PECI_OFFSET_MAX definition)
8 devices should be enough for anyone...
Where is PECI_OFFSET_MAX defined?
PECI_OFFSET_MAX is defined in include/linux/peci.h based on the maximum
C
Re: [PATCH v3 09/10] drivers/hwmon: Add PECI hwmon client drivers
On 4/12/2018 10:37 AM, Guenter Roeck wrote:
On Thu, Apr 12, 2018 at 10:09:51AM -0700, Jae Hyun Yoo wrote:
[ ... ]
+static int find_core_index(struct peci_cputemp *priv, int channel)
+{
+ int core_channel = channel - DEFAULT_CHANNEL_NUMS;
+ int idx, found = 0;
+
+ for (idx = 0; idx < priv->gen_info->core_max; idx++) {
+ if (priv->core_mask & BIT(idx)) {
+ if (core_channel == found)
+ break;
+
+ found++;
+ }
+ }
+
+ return idx;
What if nothing is found ?
Core temperature group will be registered only when it detects at
least one core checked by check_resolved_cores(), so
find_core_index() can be called only when priv->core_mask has a
non-zero value. The 'nothing is found' case will not happen.
That doesn't guarantee a match. If what you are saying is correct
there should always be
a well defined match of channel -> idx, and the search should be
unnecessary.
There could be some disabled cores in the resolved core mask bit
sequence also it should remove indexing gap in channel numbering so it
is the reason why this search function is needed. Well defined match of
channel -> idx would not be always satisfied.
Are you saying that each call to the function, with the same parameters,
can return a different result ?
No, the result will be consistent. After reading the priv->core_mask once in
check_resolved_cores(), the value will not be changed. I'm saying about this
case, for example if core number 2 is unresolved in total 4 cores, then the
idx order will be '0, 1, 3' but channel order will be '5, 6, 7' without
making any indexing gap.
And you yet you claim that this is not well defined ? Or are you concerned
about the amount of memory consumed by providing an array for the mapping ?
Note that an indexing gap is acceptable and, in many cases, preferred.
If the indexing gap is acceptable, the index search function isn't
needed anymore. I'll fix all relating code to make that use direct
mapping of channel -> idx then. Thanks!
[ ... ]
+
+ dev_dbg(dev, "%s: sensor '%s'\n", dev_name(hwmon_dev),
priv->name);
+
Why does this message display the device name twice ?
For an example, dev_name(hwmon_dev) shows 'hwmon5' and priv->name shows
'peci-cputemp0'.
And dev_dbg() shows another device name. So you'll have something like
peci-cputemp0: hwmon5: sensor 'peci-cputemp0'
Practically it shows like
peci-cputemp 0-30:00: hwmon10: sensor 'peci_cputemp.cpu0'
where 0-30:00 is assigned by peci core.
And what message would you see for cpu1 ?
It shows like
peci-cputemp 0-31:00: hwmon10: sensor 'peci_cputemp.cpu1'
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Re: [PATCH v3 09/10] drivers/hwmon: Add PECI hwmon client drivers
On 4/11/2018 8:40 PM, Guenter Roeck wrote:
On 04/11/2018 07:51 PM, Jae Hyun Yoo wrote:
On 4/11/2018 5:34 PM, Guenter Roeck wrote:
On 04/11/2018 02:59 PM, Jae Hyun Yoo wrote:
Hi Guenter,
Thanks a lot for sharing your time. Please see my inline answers.
On 4/10/2018 3:28 PM, Guenter Roeck wrote:
On Tue, Apr 10, 2018 at 11:32:11AM -0700, Jae Hyun Yoo wrote:
This commit adds PECI cputemp and dimmtemp hwmon drivers.
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Cc: Alan Cox
Cc: Andrew Jeffery
Cc: Andrew Lunn
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Benjamin Herrenschmidt
Cc: Fengguang Wu
Cc: Greg KH
Cc: Guenter Roeck
Cc: Jason M Biils
Cc: Jean Delvare
Cc: Joel Stanley
Cc: Julia Cartwright
Cc: Miguel Ojeda
Cc: Milton Miller II
Cc: Pavel Machek
Cc: Randy Dunlap
Cc: Stef van Os
Cc: Sumeet R Pawnikar
---
drivers/hwmon/Kconfig | 28 ++
drivers/hwmon/Makefile | 2 +
drivers/hwmon/peci-cputemp.c | 783
++
drivers/hwmon/peci-dimmtemp.c | 432 +++
4 files changed, 1245 insertions(+)
create mode 100644 drivers/hwmon/peci-cputemp.c
create mode 100644 drivers/hwmon/peci-dimmtemp.c
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index f249a4428458..c52f610f81d0 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1259,6 +1259,34 @@ config SENSORS_NCT7904
This driver can also be built as a module. If so, the module
will be called nct7904.
+config SENSORS_PECI_CPUTEMP
+ tristate "PECI CPU temperature monitoring support"
+ depends on OF
+ depends on PECI
+ help
+ If you say yes here you get support for the generic Intel PECI
+ cputemp driver which provides Digital Thermal Sensor (DTS)
thermal
+ readings of the CPU package and CPU cores that are
accessible using
+ the PECI Client Command Suite via the processor PECI client.
+ Check Documentation/hwmon/peci-cputemp for details.
+
+ This driver can also be built as a module. If so, the module
+ will be called peci-cputemp.
+
+config SENSORS_PECI_DIMMTEMP
+ tristate "PECI DIMM temperature monitoring support"
+ depends on OF
+ depends on PECI
+ help
+ If you say yes here you get support for the generic Intel
PECI hwmon
+ driver which provides Digital Thermal Sensor (DTS) thermal
readings of
+ DIMM components that are accessible using the PECI Client
Command
+ Suite via the processor PECI client.
+ Check Documentation/hwmon/peci-dimmtemp for details.
+
+ This driver can also be built as a module. If so, the module
+ will be called peci-dimmtemp.
+
config SENSORS_NSA320
tristate "ZyXEL NSA320 and compatible fan speed and
temperature sensors"
depends on GPIOLIB && OF
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index e7d52a36e6c4..48d9598fcd3a 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -136,6 +136,8 @@ obj-$(CONFIG_SENSORS_NCT7802) += nct7802.o
obj-$(CONFIG_SENSORS_NCT7904) += nct7904.o
obj-$(CONFIG_SENSORS_NSA320) += nsa320-hwmon.o
obj-$(CONFIG_SENSORS_NTC_THERMISTOR) += ntc_thermistor.o
+obj-$(CONFIG_SENSORS_PECI_CPUTEMP) += peci-cputemp.o
+obj-$(CONFIG_SENSORS_PECI_DIMMTEMP) += peci-dimmtemp.o
obj-$(CONFIG_SENSORS_PC87360) += pc87360.o
obj-$(CONFIG_SENSORS_PC87427) += pc87427.o
obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o
diff --git a/drivers/hwmon/peci-cputemp.c
b/drivers/hwmon/peci-cputemp.c
new file mode 100644
index ..f0bc92687512
--- /dev/null
+++ b/drivers/hwmon/peci-cputemp.c
@@ -0,0 +1,783 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018 Intel Corporation
+
+#include
+#include
+#include
Is this include needed ?
No it isn't. Will drop the line.
+#include
+#include
+#include
+#include
+
+#define TEMP_TYPE_PECI 6 /* Sensor type 6: Intel PECI */
+
+#define CORE_MAX_ON_HSX 18 /* Max number of cores on
Haswell */
+#define CORE_MAX_ON_BDX 24 /* Max number of cores on
Broadwell */
+#define CORE_MAX_ON_SKX 28 /* Max number of cores on
Skylake */
+
+#define DEFAULT_CHANNEL_NUMS 5
+#define CORETEMP_CHANNEL_NUMS CORE_MAX_ON_SKX
+#define CPUTEMP_CHANNEL_NUMS (DEFAULT_CHANNEL_NUMS +
CORETEMP_CHANNEL_NUMS)
+
+#define CLIENT_CPU_ID_MASK 0xf0ff0 /* Mask for Family / Model
info */
+
+#define UPDATE_INTERVAL_MIN HZ
+
+enum cpu_gens {
+ CPU_GEN_HSX, /* Haswell Xeon */
+ CPU_GEN_BRX, /* Broadwell Xeon */
+ CPU_GEN_SKX, /* Skylake Xeon */
+ CPU_GEN_MAX
+};
+
+struct cpu_gen_info {
+ u32 type;
+ u32 cpu_id;
+ u32 core_max;
+};
+
+struct temp_data {
+ bool valid;
+ s32 value;
+ unsigned long last_updated;
+};
+
+struct temp_group {
+ struct temp_data die;
+ struct temp_data dts_margin;
+ struct temp_data tcontrol;
+
Re: [PATCH v3 09/10] drivers/hwmon: Add PECI hwmon client drivers
On 4/11/2018 5:34 PM, Guenter Roeck wrote:
On 04/11/2018 02:59 PM, Jae Hyun Yoo wrote:
Hi Guenter,
Thanks a lot for sharing your time. Please see my inline answers.
On 4/10/2018 3:28 PM, Guenter Roeck wrote:
On Tue, Apr 10, 2018 at 11:32:11AM -0700, Jae Hyun Yoo wrote:
This commit adds PECI cputemp and dimmtemp hwmon drivers.
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Cc: Alan Cox
Cc: Andrew Jeffery
Cc: Andrew Lunn
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Benjamin Herrenschmidt
Cc: Fengguang Wu
Cc: Greg KH
Cc: Guenter Roeck
Cc: Jason M Biils
Cc: Jean Delvare
Cc: Joel Stanley
Cc: Julia Cartwright
Cc: Miguel Ojeda
Cc: Milton Miller II
Cc: Pavel Machek
Cc: Randy Dunlap
Cc: Stef van Os
Cc: Sumeet R Pawnikar
---
drivers/hwmon/Kconfig | 28 ++
drivers/hwmon/Makefile | 2 +
drivers/hwmon/peci-cputemp.c | 783
++
drivers/hwmon/peci-dimmtemp.c | 432 +++
4 files changed, 1245 insertions(+)
create mode 100644 drivers/hwmon/peci-cputemp.c
create mode 100644 drivers/hwmon/peci-dimmtemp.c
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index f249a4428458..c52f610f81d0 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1259,6 +1259,34 @@ config SENSORS_NCT7904
This driver can also be built as a module. If so, the module
will be called nct7904.
+config SENSORS_PECI_CPUTEMP
+ tristate "PECI CPU temperature monitoring support"
+ depends on OF
+ depends on PECI
+ help
+ If you say yes here you get support for the generic Intel PECI
+ cputemp driver which provides Digital Thermal Sensor (DTS)
thermal
+ readings of the CPU package and CPU cores that are accessible
using
+ the PECI Client Command Suite via the processor PECI client.
+ Check Documentation/hwmon/peci-cputemp for details.
+
+ This driver can also be built as a module. If so, the module
+ will be called peci-cputemp.
+
+config SENSORS_PECI_DIMMTEMP
+ tristate "PECI DIMM temperature monitoring support"
+ depends on OF
+ depends on PECI
+ help
+ If you say yes here you get support for the generic Intel
PECI hwmon
+ driver which provides Digital Thermal Sensor (DTS) thermal
readings of
+ DIMM components that are accessible using the PECI Client
Command
+ Suite via the processor PECI client.
+ Check Documentation/hwmon/peci-dimmtemp for details.
+
+ This driver can also be built as a module. If so, the module
+ will be called peci-dimmtemp.
+
config SENSORS_NSA320
tristate "ZyXEL NSA320 and compatible fan speed and
temperature sensors"
depends on GPIOLIB && OF
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index e7d52a36e6c4..48d9598fcd3a 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -136,6 +136,8 @@ obj-$(CONFIG_SENSORS_NCT7802) += nct7802.o
obj-$(CONFIG_SENSORS_NCT7904) += nct7904.o
obj-$(CONFIG_SENSORS_NSA320) += nsa320-hwmon.o
obj-$(CONFIG_SENSORS_NTC_THERMISTOR) += ntc_thermistor.o
+obj-$(CONFIG_SENSORS_PECI_CPUTEMP) += peci-cputemp.o
+obj-$(CONFIG_SENSORS_PECI_DIMMTEMP) += peci-dimmtemp.o
obj-$(CONFIG_SENSORS_PC87360) += pc87360.o
obj-$(CONFIG_SENSORS_PC87427) += pc87427.o
obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o
diff --git a/drivers/hwmon/peci-cputemp.c
b/drivers/hwmon/peci-cputemp.c
new file mode 100644
index ..f0bc92687512
--- /dev/null
+++ b/drivers/hwmon/peci-cputemp.c
@@ -0,0 +1,783 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018 Intel Corporation
+
+#include
+#include
+#include
Is this include needed ?
No it isn't. Will drop the line.
+#include
+#include
+#include
+#include
+
+#define TEMP_TYPE_PECI 6 /* Sensor type 6: Intel PECI */
+
+#define CORE_MAX_ON_HSX 18 /* Max number of cores on Haswell */
+#define CORE_MAX_ON_BDX 24 /* Max number of cores on
Broadwell */
+#define CORE_MAX_ON_SKX 28 /* Max number of cores on Skylake */
+
+#define DEFAULT_CHANNEL_NUMS 5
+#define CORETEMP_CHANNEL_NUMS CORE_MAX_ON_SKX
+#define CPUTEMP_CHANNEL_NUMS (DEFAULT_CHANNEL_NUMS +
CORETEMP_CHANNEL_NUMS)
+
+#define CLIENT_CPU_ID_MASK 0xf0ff0 /* Mask for Family / Model
info */
+
+#define UPDATE_INTERVAL_MIN HZ
+
+enum cpu_gens {
+ CPU_GEN_HSX, /* Haswell Xeon */
+ CPU_GEN_BRX, /* Broadwell Xeon */
+ CPU_GEN_SKX, /* Skylake Xeon */
+ CPU_GEN_MAX
+};
+
+struct cpu_gen_info {
+ u32 type;
+ u32 cpu_id;
+ u32 core_max;
+};
+
+struct temp_data {
+ bool valid;
+ s32 value;
+ unsigned long last_updated;
+};
+
+struct temp_group {
+ struct temp_data die;
+ struct temp_data dts_margin;
+ struct temp_data tcontrol;
+ struct temp_data tthrottle;
+ struct temp_data tjmax;
+ struct temp_data
Re: [PATCH v3 05/10] ARM: dts: aspeed: peci: Add PECI node
On 4/11/2018 4:52 AM, Joel Stanley wrote: On 11 April 2018 at 04:02, Jae Hyun Yoo wrote: This commit adds PECI bus/adapter node of AST24xx/AST25xx into aspeed-g4 and aspeed-g5. The patches to the device trees get merged by the ASPEED maintainer (me). Once you have the bindings reviewed you can send the patches to me and the linux-aspeed list (I've got a pending patch to maintainers that will ensure get_maintainers.pl does the right thing as far as email addresses go). I'd suggest dropping it from your series and re-sending once the bindings and driver are reviewed. Cheers, Joel Do you mean that bindings and driver of ASPEED peci adapter driver including documents? Thanks, -Jae -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 04/10] Documentations: dt-bindings: Add a document of PECI adapter driver for Aspeed AST24xx/25xx SoCs
Hi Joel,
On 4/11/2018 4:52 AM, Joel Stanley wrote:
On 11 April 2018 at 04:02, Jae Hyun Yoo wrote:
This commit adds a dt-bindings document of PECI adapter driver for Aspeed
We try to capitalise ASPEED.
Got it. Will capitalize all Aspeed words.
AST24xx/25xx SoCs.
---
.../devicetree/bindings/peci/peci-aspeed.txt | 60 ++
1 file changed, 60 insertions(+)
create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.txt
diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.txt
b/Documentation/devicetree/bindings/peci/peci-aspeed.txt
new file mode 100644
index ..4598bb8c20fa
--- /dev/null
+++ b/Documentation/devicetree/bindings/peci/peci-aspeed.txt
@@ -0,0 +1,60 @@
+Device tree configuration for PECI buses on the AST24XX and AST25XX SoCs.
+
+Required properties:
+- compatible: Should be "aspeed,ast2400-peci" or "aspeed,ast2500-peci"
+ - aspeed,ast2400-peci: Aspeed AST2400 family PECI
+controller
+ - aspeed,ast2500-peci: Aspeed AST2500 family PECI
+controller
+- reg : Should contain PECI controller registers location and
+ length.
+- #address-cells: Should be <1>.
+- #size-cells : Should be <0>.
+- interrupts: Should contain PECI controller interrupt.
+- clocks: Should contain clock source for PECI controller.
+ Should reference clkin.
Are you sure that this is driven by clkin? Most peripherals on the
Aspeed are attached to the apb, so should reference that clock.
According to the datasheet, PECI controller module is attached to apb
but its clock source is the 24MHz external clock.
+- clock_frequency : Should contain the operation frequency of PECI controller
+ in units of Hz.
+ 187500 ~ 2400
Can you explain why you need both the parent clock and this frequency
to be specified?
Based on this setting, driver code makes clock divisor value to set
operation clock of PECI controller which is adjustable.
+
+Optional properties:
+- msg-timing-nego : Message timing negotiation period. This value will
Perhaps msg-timing-period? Or just msg-timing?
Will use msg-timing instead.
+ determine the period of message timing negotiation to be
+ issued by PECI controller. The unit of the programmed
+ value is four times of PECI clock period.
+ 0 ~ 255 (default: 1)
+- addr-timing-nego : Address timing negotiation period. This value will
+ determine the period of address timing negotiation to be
+ issued by PECI controller. The unit of the programmed
+ value is four times of PECI clock period.
+ 0 ~ 255 (default: 1)
+- rd-sampling-point : Read sampling point selection. The whole period of a bit
+ time will be divided into 16 time frames. This value will
+ determine the time frame in which the controller will
+ sample PECI signal for data read back. Usually in the
+ middle of a bit time is the best.
+ 0 ~ 15 (default: 8)
+- cmd_timeout_ms: Command timeout in units of ms.
+ 1 ~ 6 (default: 1000)
+
+Example:
+ peci: peci@1e78b000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e78b000 0x60>;
+
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2500-peci";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <15>;
+ clocks = <&clk_clkin>;
+ clock-frequency = <2400>;
+ msg-timing-nego = <1>;
+ addr-timing-nego = <1>;
+ rd-sampling-point = <8>;
+ cmd-timeout-ms = <1000>;
+ };
+ };
--
2.16.2
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Re: [PATCH v3 01/10] Documentations: dt-bindings: Add documents of generic PECI bus, adapter and client drivers
Hi Joel,
On 4/11/2018 4:52 AM, Joel Stanley wrote:
Hi Jae,
On 11 April 2018 at 04:02, Jae Hyun Yoo wrote:
This commit adds documents of generic PECI bus, adapter and client drivers.
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Cc: Alan Cox
Cc: Andrew Jeffery
Cc: Andrew Lunn
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Benjamin Herrenschmidt
Cc: Fengguang Wu
Cc: Greg KH
Cc: Guenter Roeck
Cc: Jason M Biils
Cc: Jean Delvare
Cc: Joel Stanley
Cc: Julia Cartwright
Cc: Miguel Ojeda
Cc: Milton Miller II
Cc: Pavel Machek
Cc: Randy Dunlap
Cc: Stef van Os
Cc: Sumeet R Pawnikar
That's a hefty cc list. I can't see Rob Herring though, and he's
usually the person who you need to convince to get your bindings
accepted.
I recommend using ./scripts/get_maintainers.pl to build your CC list,
and then add others you think are relevant.
I'm not sure what the guidelines are for generic bindings, so I'll
defer to Rob for this patch.
Cheers,
Joel
Thanks a lot for letting me know that. I'll do as you suggested.
-Jae
---
.../devicetree/bindings/peci/peci-adapter.txt | 23
.../devicetree/bindings/peci/peci-bus.txt | 15 +
.../devicetree/bindings/peci/peci-client.txt | 25 ++
3 files changed, 63 insertions(+)
create mode 100644 Documentation/devicetree/bindings/peci/peci-adapter.txt
create mode 100644 Documentation/devicetree/bindings/peci/peci-bus.txt
create mode 100644 Documentation/devicetree/bindings/peci/peci-client.txt
diff --git a/Documentation/devicetree/bindings/peci/peci-adapter.txt
b/Documentation/devicetree/bindings/peci/peci-adapter.txt
new file mode 100644
index ..9221374f6b11
--- /dev/null
+++ b/Documentation/devicetree/bindings/peci/peci-adapter.txt
@@ -0,0 +1,23 @@
+Generic device tree configuration for PECI adapters.
+
+Required properties:
+- compatible : Should contain hardware specific definition strings that can
+ match an adapter driver implementation.
+- reg: Should contain PECI controller registers location and
length.
+- #address-cells : Should be <1>.
+- #size-cells: Should be <0>.
+
+Example:
+ peci: peci@1000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1000 0x1000>;
+
+ peci0: peci-bus@0 {
+ compatible = "soc,soc-peci";
+ reg = <0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/peci/peci-bus.txt
b/Documentation/devicetree/bindings/peci/peci-bus.txt
new file mode 100644
index ..90bcc791ccb0
--- /dev/null
+++ b/Documentation/devicetree/bindings/peci/peci-bus.txt
@@ -0,0 +1,15 @@
+Generic device tree configuration for PECI buses.
+
+Required properties:
+- compatible : Should be "simple-bus".
+- #address-cells : Should be <1>.
+- #size-cells: Should be <1>.
+- ranges : Should contain PECI controller registers ranges.
+
+Example:
+ peci: peci@1000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1000 0x1000>;
+ };
diff --git a/Documentation/devicetree/bindings/peci/peci-client.txt
b/Documentation/devicetree/bindings/peci/peci-client.txt
new file mode 100644
index ..8e2bfd8532f6
--- /dev/null
+++ b/Documentation/devicetree/bindings/peci/peci-client.txt
@@ -0,0 +1,25 @@
+Generic device tree configuration for PECI clients.
+
+Required properties:
+- compatible : Should contain target device specific definition strings that
can
+ match a client driver implementation.
+- reg: Should contain address of a client CPU. Address range of CPU
+ clients is starting from 0x30 based on PECI specification.
+ <0x30> .. <0x37> (depends on the PECI_OFFSET_MAX definition)
+
+Example:
+ peci-bus@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ < more properties >
+
+ function@cpu0 {
+ compatible = "device,function";
+ reg = <0x30>;
+ };
+
+ function@cpu1 {
+ compatible = "device,function";
+ reg = <0x31>;
+ };
+ };
--
2.16.2
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Re: [PATCH v3 06/10] drivers/peci: Add a PECI adapter driver for Aspeed AST24xx/AST25xx
Hello Joel, Thanks for sharing your time. Please see my answers inline. On 4/11/2018 4:51 AM, Joel Stanley wrote: Hello Jae, On 11 April 2018 at 04:02, Jae Hyun Yoo wrote: This commit adds PECI adapter driver implementation for Aspeed AST24xx/AST25xx. The driver is looking good! It looks like you've done some kind of review that we weren't allowed to see, which is a double edged sword - I might be asking about things that you've already spoken about with someone else. I'm only just learning about PECI, but I do have some general comments below. Yes, it took a hidden review process between v2 and v3. I know it's an unusual process but it was requested. Hopefully, change logs in cover letter could roughly provide the details. Thanks for your comments. --- drivers/peci/Kconfig | 28 +++ drivers/peci/Makefile | 3 + drivers/peci/peci-aspeed.c | 504 + 3 files changed, 535 insertions(+) create mode 100644 drivers/peci/peci-aspeed.c diff --git a/drivers/peci/Kconfig b/drivers/peci/Kconfig index 1fbc13f9e6c2..0e33420365de 100644 --- a/drivers/peci/Kconfig +++ b/drivers/peci/Kconfig @@ -14,4 +14,32 @@ config PECI processors and chipset components to external monitoring or control devices. + If you want PECI support, you should say Y here and also to the + specific driver for your bus adapter(s) below. + +if PECI + +# +# PECI hardware bus configuration +# + +menu "PECI Hardware Bus support" + +config PECI_ASPEED + tristate "Aspeed AST24xx/AST25xx PECI support" I think just saying ASPEED PECI support is enough. That way if the next ASPEED SoC happens to have PECI we don't need to update all of the help text :) Agreed. I'll change the description. + select REGMAP_MMIO + depends on OF + depends on ARCH_ASPEED || COMPILE_TEST + help + Say Y here if you want support for the Platform Environment Control + Interface (PECI) bus adapter driver on the Aspeed AST24XX and AST25XX + SoCs. + + This support is also available as a module. If so, the module + will be called peci-aspeed. + +endmenu + +endif # PECI + endmenu diff --git a/drivers/peci/Makefile b/drivers/peci/Makefile index 9e8615e0d3ff..886285e69765 100644 --- a/drivers/peci/Makefile +++ b/drivers/peci/Makefile @@ -4,3 +4,6 @@ # Core functionality obj-$(CONFIG_PECI) += peci-core.o + +# Hardware specific bus drivers +obj-$(CONFIG_PECI_ASPEED) += peci-aspeed.o diff --git a/drivers/peci/peci-aspeed.c b/drivers/peci/peci-aspeed.c new file mode 100644 index ..be2a1f327eb1 --- /dev/null +++ b/drivers/peci/peci-aspeed.c @@ -0,0 +1,504 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2012-2017 ASPEED Technology Inc. +// Copyright (c) 2018 Intel Corporation + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DUMP_DEBUG 0 + +/* Aspeed PECI Registers */ +#define AST_PECI_CTRL 0x00 Nit: we use ASPEED instead of AST in the upstream kernel to distingush from the aspeed sdk drivers. If you feel strongly about this then I won't insist you change. Okay then, better change it now than later. Will change all defines. +#define AST_PECI_TIMING 0x04 +#define AST_PECI_CMD 0x08 +#define AST_PECI_CMD_CTRL 0x0c +#define AST_PECI_EXP_FCS 0x10 +#define AST_PECI_CAP_FCS 0x14 +#define AST_PECI_INT_CTRL 0x18 +#define AST_PECI_INT_STS 0x1c +#define AST_PECI_W_DATA0 0x20 +#define AST_PECI_W_DATA1 0x24 +#define AST_PECI_W_DATA2 0x28 +#define AST_PECI_W_DATA3 0x2c +#define AST_PECI_R_DATA0 0x30 +#define AST_PECI_R_DATA1 0x34 +#define AST_PECI_R_DATA2 0x38 +#define AST_PECI_R_DATA3 0x3c +#define AST_PECI_W_DATA4 0x40 +#define AST_PECI_W_DATA5 0x44 +#define AST_PECI_W_DATA6 0x48 +#define AST_PECI_W_DATA7 0x4c +#define AST_PECI_R_DATA4 0x50 +#define AST_PECI_R_DATA5 0x54 +#define AST_PECI_R_DATA6 0x58 +#define AST_PECI_R_DATA7 0x5c + +/* AST_PECI_CTRL - 0x00 : Control Register */ +#define PECI_CTRL_SAMPLING_MASK GENMASK(19, 16) +#define PECI_CTRL_SAMPLING(x) (((x) << 16) & PECI_CTRL_SAMPLING_MASK) +#define PECI_CTRL_SAMPLING_GET(x) (((x) & PECI_CTRL_SAMPLING_MASK) >> 16) +#define PECI_CTRL_READ_MODE_MASKGENMASK(13, 12) +#define PECI_CTRL_READ_MODE(x) (((x) << 12) & PECI_CTRL_READ_MODE_MASK) +#define PECI_CTRL_READ_MODE_GET(x) (((x) & PECI_CTRL_READ_MODE_MASK) >> 12) +#define PECI_CTRL_READ_MODE_COUNT BIT(12) +#define PECI_CTRL_READ_MODE_DBG BIT(13) +#define PECI_CTRL_CLK_SOURCE_MASK BIT(11) +#define PECI_CTRL_CLK_SOURCE(x) (((x) << 11) & PECI_CTRL_CLK_SOURCE_MASK) +#define PECI_CTRL_CLK_SOURCE_GET(x) (((x) & PECI_CTRL_CLK_SOURCE_MASK) >> 11) +#define PECI_CTRL_CLK_DIV_MASK GENMASK(10, 8) +#define PECI_CTRL_CLK
Re: [PATCH v3 09/10] drivers/hwmon: Add PECI hwmon client drivers
Hi Guenter,
Thanks a lot for sharing your time. Please see my inline answers.
On 4/10/2018 3:28 PM, Guenter Roeck wrote:
On Tue, Apr 10, 2018 at 11:32:11AM -0700, Jae Hyun Yoo wrote:
This commit adds PECI cputemp and dimmtemp hwmon drivers.
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Cc: Alan Cox
Cc: Andrew Jeffery
Cc: Andrew Lunn
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Benjamin Herrenschmidt
Cc: Fengguang Wu
Cc: Greg KH
Cc: Guenter Roeck
Cc: Jason M Biils
Cc: Jean Delvare
Cc: Joel Stanley
Cc: Julia Cartwright
Cc: Miguel Ojeda
Cc: Milton Miller II
Cc: Pavel Machek
Cc: Randy Dunlap
Cc: Stef van Os
Cc: Sumeet R Pawnikar
---
drivers/hwmon/Kconfig | 28 ++
drivers/hwmon/Makefile| 2 +
drivers/hwmon/peci-cputemp.c | 783 ++
drivers/hwmon/peci-dimmtemp.c | 432 +++
4 files changed, 1245 insertions(+)
create mode 100644 drivers/hwmon/peci-cputemp.c
create mode 100644 drivers/hwmon/peci-dimmtemp.c
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index f249a4428458..c52f610f81d0 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1259,6 +1259,34 @@ config SENSORS_NCT7904
This driver can also be built as a module. If so, the module
will be called nct7904.
+config SENSORS_PECI_CPUTEMP
+ tristate "PECI CPU temperature monitoring support"
+ depends on OF
+ depends on PECI
+ help
+ If you say yes here you get support for the generic Intel PECI
+ cputemp driver which provides Digital Thermal Sensor (DTS) thermal
+ readings of the CPU package and CPU cores that are accessible using
+ the PECI Client Command Suite via the processor PECI client.
+ Check Documentation/hwmon/peci-cputemp for details.
+
+ This driver can also be built as a module. If so, the module
+ will be called peci-cputemp.
+
+config SENSORS_PECI_DIMMTEMP
+ tristate "PECI DIMM temperature monitoring support"
+ depends on OF
+ depends on PECI
+ help
+ If you say yes here you get support for the generic Intel PECI hwmon
+ driver which provides Digital Thermal Sensor (DTS) thermal readings of
+ DIMM components that are accessible using the PECI Client Command
+ Suite via the processor PECI client.
+ Check Documentation/hwmon/peci-dimmtemp for details.
+
+ This driver can also be built as a module. If so, the module
+ will be called peci-dimmtemp.
+
config SENSORS_NSA320
tristate "ZyXEL NSA320 and compatible fan speed and temperature sensors"
depends on GPIOLIB && OF
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index e7d52a36e6c4..48d9598fcd3a 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -136,6 +136,8 @@ obj-$(CONFIG_SENSORS_NCT7802) += nct7802.o
obj-$(CONFIG_SENSORS_NCT7904) += nct7904.o
obj-$(CONFIG_SENSORS_NSA320) += nsa320-hwmon.o
obj-$(CONFIG_SENSORS_NTC_THERMISTOR) += ntc_thermistor.o
+obj-$(CONFIG_SENSORS_PECI_CPUTEMP) += peci-cputemp.o
+obj-$(CONFIG_SENSORS_PECI_DIMMTEMP)+= peci-dimmtemp.o
obj-$(CONFIG_SENSORS_PC87360) += pc87360.o
obj-$(CONFIG_SENSORS_PC87427) += pc87427.o
obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o
diff --git a/drivers/hwmon/peci-cputemp.c b/drivers/hwmon/peci-cputemp.c
new file mode 100644
index ..f0bc92687512
--- /dev/null
+++ b/drivers/hwmon/peci-cputemp.c
@@ -0,0 +1,783 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018 Intel Corporation
+
+#include
+#include
+#include
Is this include needed ?
No it isn't. Will drop the line.
+#include
+#include
+#include
+#include
+
+#define TEMP_TYPE_PECI6 /* Sensor type 6: Intel PECI */
+
+#define CORE_MAX_ON_HSX 18 /* Max number of cores on Haswell */
+#define CORE_MAX_ON_BDX 24 /* Max number of cores on Broadwell */
+#define CORE_MAX_ON_SKX 28 /* Max number of cores on Skylake */
+
+#define DEFAULT_CHANNEL_NUMS 5
+#define CORETEMP_CHANNEL_NUMS CORE_MAX_ON_SKX
+#define CPUTEMP_CHANNEL_NUMS (DEFAULT_CHANNEL_NUMS + CORETEMP_CHANNEL_NUMS)
+
+#define CLIENT_CPU_ID_MASK0xf0ff0 /* Mask for Family / Model info */
+
+#define UPDATE_INTERVAL_MIN HZ
+
+enum cpu_gens {
+ CPU_GEN_HSX, /* Haswell Xeon */
+ CPU_GEN_BRX, /* Broadwell Xeon */
+ CPU_GEN_SKX, /* Skylake Xeon */
+ CPU_GEN_MAX
+};
+
+struct cpu_gen_info {
+ u32 type;
+ u32 cpu_id;
+ u32 core_max;
+};
+
+struct temp_data {
+ bool valid;
+ s32 value;
+ unsigned long last_updated;
+};
+
+struct temp_group {
+ struct temp_data die;
+ struct temp_data dts_margin;
+ struct temp_data tcontrol;
+ struct temp_data tthrottle;
+ struct temp_data tjmax;
+ struct temp_data
[PATCH v3 01/10] Documentations: dt-bindings: Add documents of generic PECI bus, adapter and client drivers
This commit adds documents of generic PECI bus, adapter and client drivers.
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Cc: Alan Cox
Cc: Andrew Jeffery
Cc: Andrew Lunn
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Benjamin Herrenschmidt
Cc: Fengguang Wu
Cc: Greg KH
Cc: Guenter Roeck
Cc: Jason M Biils
Cc: Jean Delvare
Cc: Joel Stanley
Cc: Julia Cartwright
Cc: Miguel Ojeda
Cc: Milton Miller II
Cc: Pavel Machek
Cc: Randy Dunlap
Cc: Stef van Os
Cc: Sumeet R Pawnikar
---
.../devicetree/bindings/peci/peci-adapter.txt | 23
.../devicetree/bindings/peci/peci-bus.txt | 15 +
.../devicetree/bindings/peci/peci-client.txt | 25 ++
3 files changed, 63 insertions(+)
create mode 100644 Documentation/devicetree/bindings/peci/peci-adapter.txt
create mode 100644 Documentation/devicetree/bindings/peci/peci-bus.txt
create mode 100644 Documentation/devicetree/bindings/peci/peci-client.txt
diff --git a/Documentation/devicetree/bindings/peci/peci-adapter.txt
b/Documentation/devicetree/bindings/peci/peci-adapter.txt
new file mode 100644
index ..9221374f6b11
--- /dev/null
+++ b/Documentation/devicetree/bindings/peci/peci-adapter.txt
@@ -0,0 +1,23 @@
+Generic device tree configuration for PECI adapters.
+
+Required properties:
+- compatible : Should contain hardware specific definition strings that can
+ match an adapter driver implementation.
+- reg: Should contain PECI controller registers location and
length.
+- #address-cells : Should be <1>.
+- #size-cells: Should be <0>.
+
+Example:
+ peci: peci@1000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1000 0x1000>;
+
+ peci0: peci-bus@0 {
+ compatible = "soc,soc-peci";
+ reg = <0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/peci/peci-bus.txt
b/Documentation/devicetree/bindings/peci/peci-bus.txt
new file mode 100644
index ..90bcc791ccb0
--- /dev/null
+++ b/Documentation/devicetree/bindings/peci/peci-bus.txt
@@ -0,0 +1,15 @@
+Generic device tree configuration for PECI buses.
+
+Required properties:
+- compatible : Should be "simple-bus".
+- #address-cells : Should be <1>.
+- #size-cells: Should be <1>.
+- ranges : Should contain PECI controller registers ranges.
+
+Example:
+ peci: peci@1000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1000 0x1000>;
+ };
diff --git a/Documentation/devicetree/bindings/peci/peci-client.txt
b/Documentation/devicetree/bindings/peci/peci-client.txt
new file mode 100644
index ..8e2bfd8532f6
--- /dev/null
+++ b/Documentation/devicetree/bindings/peci/peci-client.txt
@@ -0,0 +1,25 @@
+Generic device tree configuration for PECI clients.
+
+Required properties:
+- compatible : Should contain target device specific definition strings that
can
+ match a client driver implementation.
+- reg: Should contain address of a client CPU. Address range of CPU
+ clients is starting from 0x30 based on PECI specification.
+ <0x30> .. <0x37> (depends on the PECI_OFFSET_MAX definition)
+
+Example:
+ peci-bus@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ < more properties >
+
+ function@cpu0 {
+ compatible = "device,function";
+ reg = <0x30>;
+ };
+
+ function@cpu1 {
+ compatible = "device,function";
+ reg = <0x31>;
+ };
+ };
--
2.16.2
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[PATCH v3 00/10] PECI device driver introduction
onnection. * Improved interrupt handling logic in the Aspeed PECI adapter driver. * Fixed SPDX license identifier style in header files. * Changed some macros in peci.h to static inline functions. * Dropped sleepable context checking code in peci-core. * Adjusted rt_mutex protection scope in peci-core. * Moved adapter->xfer() checking code into peci_register_adapter(). * Improved PECI command retry checking logic. * Changed ioctl base from 'P' to 0xb6 to avoid confiliction and updated ioctl-number.txt to reflect the ioctl number of PECI subsystem. * Added a comment to describe PECI retry action. * Simplified return code handling of peci_ioctl_ping(). * Changed type of peci_ioctl_fn[] to static const. * Fixed range checking code for valid PECI commands. * Fixed the error return code on invalid PECI commands. * Fixed incorrect definitions of PECI ioctl and its handling logic. Changes from v1: * Additionally implemented a core driver to support PECI linux bus driver model. * Modified Aspeed PECI driver to make that to be an adapter driver in PECI bus. * Modified PECI hwmon driver to make that to be a client driver in PECI bus. * Simplified hwmon driver attribute labels and removed redundant strings. * Removed core_nums from device tree setting of hwmon driver and modified core number detection logic to check the resolved_core register in client CPU's local PCI configuration area. * Removed dimm_nums from device tree setting of hwmon driver and added populated DIMM detection logic to support dynamic creation. * Removed indexing gap on core temperature and DIMM temperature attributes. * Improved hwmon registration and dynamic attribute creation logic. * Fixed structure definitions in PECI uapi header to make that use __u8, __u16 and etc. * Modified wait_for_completion_interruptible_timeout error handling logic in Aspeed PECI driver to deliver errors correctly. * Removed low-level xfer command from ioctl and kept only high-level PECI command suite as ioctls. * Fixed I/O timeout logic in Aspeed PECI driver using ktime. * Added a function into hwmon driver to simplify update delay checking. * Added a function into hwmon driver to convert 10.6 to millidegree. * Dropped non-standard attributes in hwmon driver. * Fixed OF table for hwmon to make it indicate as a PECI client of Intel CPU target. * Added a maintainer of PECI subsystem into MAINTAINERS document. Fengguang Wu (1): drivers/peci: Add support for PECI bus driver core Jae Hyun Yoo (10): Documentations: dt-bindings: Add documents of generic PECI bus, adapter and client drivers Documentations: ioctl: Add ioctl numbers for PECI subsystem drivers/peci: Add support for PECI bus driver core Documentations: dt-bindings: Add a document of PECI adapter driver for Aspeed AST24xx/25xx SoCs ARM: dts: aspeed: peci: Add PECI node drivers/peci: Add a PECI adapter driver for Aspeed AST24xx/AST25xx Documentation: dt-bindings: Add documents for PECI hwmon client drivers Documentation: hwmon: Add documents for PECI hwmon client drivers drivers/hwmon: Add PECI hwmon client drivers Add a maintainer for the PECI subsystem .../devicetree/bindings/hwmon/peci-cputemp.txt | 24 + .../devicetree/bindings/hwmon/peci-dimmtemp.txt| 25 + .../devicetree/bindings/peci/peci-adapter.txt | 23 + .../devicetree/bindings/peci/peci-aspeed.txt | 60 + .../devicetree/bindings/peci/peci-bus.txt | 15 + .../devicetree/bindings/peci/peci-client.txt | 25 + Documentation/hwmon/peci-cputemp | 88 ++ Documentation/hwmon/peci-dimmtemp | 50 + Documentation/ioctl/ioctl-number.txt |2 + MAINTAINERS| 10 + arch/arm/boot/dts/aspeed-g4.dtsi | 25 + arch/arm/boot/dts/aspeed-g5.dtsi | 25 + drivers/Kconfig|2 + drivers/Makefile |1 + drivers/hwmon/Kconfig | 28 + drivers/hwmon/Makefile |2 + drivers/hwmon/peci-cputemp.c | 783 drivers/hwmon/peci-dimmtemp.c | 432 +++ drivers/peci/Kconfig | 45 + drivers/peci/Makefile |9 + drivers/peci/peci-aspeed.c | 504 drivers/peci/peci-core.c | 1291 include/linux/peci.h | 107 ++ include/uapi/linux/peci-ioctl.h| 200 +++ 24 files changed, 3776 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwmon/peci-cputemp.txt create mode 100644 Documentation/devicetree/bindings/hwmon/peci-dimmtemp.txt create mode 100644 Documentation/devicetree/bindings/peci/peci-adapter.txt create mode 100644 Documentation/de
[PATCH v3 03/10] drivers/peci: Add support for PECI bus driver core
This commit adds driver implementation for PECI bus core into linux driver framework. Signed-off-by: Jae Hyun Yoo Signed-off-by: Fengguang Wu Reviewed-by: Haiyue Wang Reviewed-by: James Feist Reviewed-by: Vernon Mauery Cc: Alan Cox Cc: Andrew Jeffery Cc: Andrew Lunn Cc: Andy Shevchenko Cc: Arnd Bergmann Cc: Benjamin Herrenschmidt Cc: Fengguang Wu Cc: Greg KH Cc: Guenter Roeck Cc: Jason M Biils Cc: Jean Delvare Cc: Joel Stanley Cc: Julia Cartwright Cc: Miguel Ojeda Cc: Milton Miller II Cc: Pavel Machek Cc: Randy Dunlap Cc: Stef van Os Cc: Sumeet R Pawnikar --- drivers/Kconfig |2 + drivers/Makefile|1 + drivers/peci/Kconfig| 17 + drivers/peci/Makefile |6 + drivers/peci/peci-core.c| 1291 +++ include/linux/peci.h| 107 include/uapi/linux/peci-ioctl.h | 200 ++ 7 files changed, 1624 insertions(+) create mode 100644 drivers/peci/Kconfig create mode 100644 drivers/peci/Makefile create mode 100644 drivers/peci/peci-core.c create mode 100644 include/linux/peci.h create mode 100644 include/uapi/linux/peci-ioctl.h diff --git a/drivers/Kconfig b/drivers/Kconfig index 95b9ccc08165..8c44d9738377 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -217,4 +217,6 @@ source "drivers/siox/Kconfig" source "drivers/slimbus/Kconfig" +source "drivers/peci/Kconfig" + endmenu diff --git a/drivers/Makefile b/drivers/Makefile index 24cd47014657..250fe3d0fa7e 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -185,3 +185,4 @@ obj-$(CONFIG_TEE) += tee/ obj-$(CONFIG_MULTIPLEXER) += mux/ obj-$(CONFIG_UNISYS_VISORBUS) += visorbus/ obj-$(CONFIG_SIOX) += siox/ +obj-$(CONFIG_PECI) += peci/ diff --git a/drivers/peci/Kconfig b/drivers/peci/Kconfig new file mode 100644 index ..1fbc13f9e6c2 --- /dev/null +++ b/drivers/peci/Kconfig @@ -0,0 +1,17 @@ +# +# Platform Environment Control Interface (PECI) subsystem configuration +# + +menu "PECI support" + +config PECI + bool "PECI support" + select RT_MUTEXES + select CRC8 + help + The Platform Environment Control Interface (PECI) is a one-wire bus + interface that provides a communication channel between Intel + processors and chipset components to external monitoring or control + devices. + +endmenu diff --git a/drivers/peci/Makefile b/drivers/peci/Makefile new file mode 100644 index ..9e8615e0d3ff --- /dev/null +++ b/drivers/peci/Makefile @@ -0,0 +1,6 @@ +# +# Makefile for the PECI core and bus drivers. +# + +# Core functionality +obj-$(CONFIG_PECI) += peci-core.o diff --git a/drivers/peci/peci-core.c b/drivers/peci/peci-core.c new file mode 100644 index ..9b45869b7c39 --- /dev/null +++ b/drivers/peci/peci-core.c @@ -0,0 +1,1291 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2018 Intel Corporation + +#include +#include +#include +#include +#include +#include +#include +#include + +/* Device Specific Completion Code (CC) Definition */ +#define DEV_PECI_CC_SUCCESS 0x40 +#define DEV_PECI_CC_TIMEOUT 0x80 +#define DEV_PECI_CC_OUT_OF_RESOURCE 0x81 +#define DEV_PECI_CC_UNAVAIL_RESOURCE 0x82 +#define DEV_PECI_CC_INVALID_REQ 0x90 + +/* Completion Code mask to check retry needs */ +#define DEV_PECI_CC_RETRY_CHECK_MASK 0xf0 +#define DEV_PECI_CC_NEED_RETRY 0x80 + +/* Skylake EDS says to retry for 250ms */ +#define DEV_PECI_RETRY_TIME_MS 250 +#define DEV_PECI_RETRY_INTERVAL_MS 10 +#define DEV_PECI_RETRY_BIT 0x01 + +#define GET_TEMP_WR_LEN 1 +#define GET_TEMP_RD_LEN 2 +#define GET_TEMP_PECI_CMD 0x01 + +#define GET_DIB_WR_LEN 1 +#define GET_DIB_RD_LEN 8 +#define GET_DIB_PECI_CMD 0xf7 + +#define RDPKGCFG_WRITE_LEN 5 +#define RDPKGCFG_READ_LEN_BASE 1 +#define RDPKGCFG_PECI_CMD 0xa1 + +#define WRPKGCFG_WRITE_LEN_BASE 6 +#define WRPKGCFG_READ_LEN 1 +#define WRPKGCFG_PECI_CMD 0xa5 + +#define RDIAMSR_WRITE_LEN 5 +#define RDIAMSR_READ_LEN 9 +#define RDIAMSR_PECI_CMD 0xb1 + +#define WRIAMSR_PECI_CMD 0xb5 + +#define RDPCICFG_WRITE_LEN 6 +#define RDPCICFG_READ_LEN 5 +#define RDPCICFG_PECI_CMD 0x61 + +#define WRPCICFG_PECI_CMD 0x65 + +#define RDPCICFGLOCAL_WRITE_LEN 5 +#define RDPCICFGLOCAL_READ_LEN_BASE 1 +#define RDPCICFGLOCAL_PECI_CMD 0xe1 + +#define WRPCICFGLOCAL_WRITE_LEN_BASE 6 +#define WRPCICFGLOCAL_READ_LEN 1 +#define WRPCICFGLOCAL_PECI_CMD 0xe5 + +/* Macro for getting minor revision number from DIB */ +#define GET_MINOR_REV_NUM(x) (((x) >> 8) & 0xF) + +/* CRC8 table for Assure Write Frame Check */ +#define PECI_CRC8_POLYNOMIAL 0x07 +DECLARE_CRC8_TABLE(peci_crc8_table); + +static struct device_type peci_adapter_type; +static struct device_type peci_client_type; + +/* Max number of peci cdev */ +#define PECI_CDEV_
[PATCH v3 02/10] Documentations: ioctl: Add ioctl numbers for PECI subsystem
This commit Updates ioctl-number.txt to reflect ioctl numbers being used by the PECI subsystem. Signed-off-by: Jae Hyun Yoo Cc: Alan Cox Cc: Andrew Jeffery Cc: Andrew Lunn Cc: Andy Shevchenko Cc: Arnd Bergmann Cc: Benjamin Herrenschmidt Cc: Fengguang Wu Cc: Greg KH Cc: Guenter Roeck Cc: Haiyue Wang Cc: James Feist Cc: Jason M Biils Cc: Jean Delvare Cc: Joel Stanley Cc: Julia Cartwright Cc: Miguel Ojeda Cc: Milton Miller II Cc: Pavel Machek Cc: Randy Dunlap Cc: Stef van Os Cc: Sumeet R Pawnikar Cc: Vernon Mauery --- Documentation/ioctl/ioctl-number.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt index 84bb74dcae12..4bc3a65d7204 100644 --- a/Documentation/ioctl/ioctl-number.txt +++ b/Documentation/ioctl/ioctl-number.txt @@ -323,6 +323,8 @@ Code Seq#(hex) Include FileComments 0xB3 00 linux/mmc/ioctl.h 0xB4 00-0F linux/gpio.h<mailto:linux-g...@vger.kernel.org> 0xB5 00-0F uapi/linux/rpmsg.h <mailto:linux-remotep...@vger.kernel.org> +0xB6 00-0F uapi/linux/peci-ioctl.h PECI subsystem + <mailto:jae.hyun@linux.intel.com> 0xC0 00-0F linux/usb/iowarrior.h 0xCA 00-0F uapi/misc/cxl.h 0xCA 10-2F uapi/misc/ocxl.h -- 2.16.2 -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 05/10] ARM: dts: aspeed: peci: Add PECI node
This commit adds PECI bus/adapter node of AST24xx/AST25xx into
aspeed-g4 and aspeed-g5.
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Cc: Alan Cox
Cc: Andrew Jeffery
Cc: Andrew Lunn
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Benjamin Herrenschmidt
Cc: Fengguang Wu
Cc: Greg KH
Cc: Guenter Roeck
Cc: Jason M Biils
Cc: Jean Delvare
Cc: Joel Stanley
Cc: Julia Cartwright
Cc: Miguel Ojeda
Cc: Milton Miller II
Cc: Pavel Machek
Cc: Randy Dunlap
Cc: Stef van Os
Cc: Sumeet R Pawnikar
---
arch/arm/boot/dts/aspeed-g4.dtsi | 25 +
arch/arm/boot/dts/aspeed-g5.dtsi | 25 +
2 files changed, 50 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 518d2bc7c7fc..f7992eee4d1f 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -29,6 +29,7 @@
serial3 = &uart4;
serial4 = &uart5;
serial5 = &vuart;
+ peci0 = &peci0;
};
cpus {
@@ -270,6 +271,13 @@
};
};
+ peci: peci@1e78b000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e78b000 0x60>;
+ };
+
uart2: serial@1e78d000 {
compatible = "ns16550a";
reg = <0x1e78d000 0x20>;
@@ -313,6 +321,23 @@
};
};
+&peci {
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2400-peci";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <15>;
+ clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
+ clock-frequency = <2400>;
+ msg-timing-nego = <1>;
+ addr-timing-nego = <1>;
+ rd-sampling-point = <8>;
+ cmd-timeout-ms = <1000>;
+ status = "disabled";
+ };
+};
+
&i2c {
i2c_ic: interrupt-controller@0 {
#interrupt-cells = <1>;
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index f9917717dd08..278791dba8a0 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -29,6 +29,7 @@
serial3 = &uart4;
serial4 = &uart5;
serial5 = &vuart;
+ peci0 = &peci0;
};
cpus {
@@ -320,6 +321,13 @@
};
};
+ peci: peci@1e78b000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e78b000 0x60>;
+ };
+
uart2: serial@1e78d000 {
compatible = "ns16550a";
reg = <0x1e78d000 0x20>;
@@ -363,6 +371,23 @@
};
};
+&peci {
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2500-peci";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <15>;
+ clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
+ clock-frequency = <2400>;
+ msg-timing-nego = <1>;
+ addr-timing-nego = <1>;
+ rd-sampling-point = <8>;
+ cmd-timeout-ms = <1000>;
+ status = "disabled";
+ };
+};
+
&i2c {
i2c_ic: interrupt-controller@0 {
#interrupt-cells = <1>;
--
2.16.2
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[PATCH v3 06/10] drivers/peci: Add a PECI adapter driver for Aspeed AST24xx/AST25xx
This commit adds PECI adapter driver implementation for Aspeed AST24xx/AST25xx. Signed-off-by: Jae Hyun Yoo Reviewed-by: Haiyue Wang Reviewed-by: James Feist Reviewed-by: Vernon Mauery Cc: Alan Cox Cc: Andrew Jeffery Cc: Andrew Lunn Cc: Andy Shevchenko Cc: Arnd Bergmann Cc: Benjamin Herrenschmidt Cc: Fengguang Wu Cc: Greg KH Cc: Guenter Roeck Cc: Jason M Biils Cc: Jean Delvare Cc: Joel Stanley Cc: Julia Cartwright Cc: Miguel Ojeda Cc: Milton Miller II Cc: Pavel Machek Cc: Randy Dunlap Cc: Stef van Os Cc: Sumeet R Pawnikar --- drivers/peci/Kconfig | 28 +++ drivers/peci/Makefile | 3 + drivers/peci/peci-aspeed.c | 504 + 3 files changed, 535 insertions(+) create mode 100644 drivers/peci/peci-aspeed.c diff --git a/drivers/peci/Kconfig b/drivers/peci/Kconfig index 1fbc13f9e6c2..0e33420365de 100644 --- a/drivers/peci/Kconfig +++ b/drivers/peci/Kconfig @@ -14,4 +14,32 @@ config PECI processors and chipset components to external monitoring or control devices. + If you want PECI support, you should say Y here and also to the + specific driver for your bus adapter(s) below. + +if PECI + +# +# PECI hardware bus configuration +# + +menu "PECI Hardware Bus support" + +config PECI_ASPEED + tristate "Aspeed AST24xx/AST25xx PECI support" + select REGMAP_MMIO + depends on OF + depends on ARCH_ASPEED || COMPILE_TEST + help + Say Y here if you want support for the Platform Environment Control + Interface (PECI) bus adapter driver on the Aspeed AST24XX and AST25XX + SoCs. + + This support is also available as a module. If so, the module + will be called peci-aspeed. + +endmenu + +endif # PECI + endmenu diff --git a/drivers/peci/Makefile b/drivers/peci/Makefile index 9e8615e0d3ff..886285e69765 100644 --- a/drivers/peci/Makefile +++ b/drivers/peci/Makefile @@ -4,3 +4,6 @@ # Core functionality obj-$(CONFIG_PECI) += peci-core.o + +# Hardware specific bus drivers +obj-$(CONFIG_PECI_ASPEED) += peci-aspeed.o diff --git a/drivers/peci/peci-aspeed.c b/drivers/peci/peci-aspeed.c new file mode 100644 index ..be2a1f327eb1 --- /dev/null +++ b/drivers/peci/peci-aspeed.c @@ -0,0 +1,504 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2012-2017 ASPEED Technology Inc. +// Copyright (c) 2018 Intel Corporation + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DUMP_DEBUG 0 + +/* Aspeed PECI Registers */ +#define AST_PECI_CTRL 0x00 +#define AST_PECI_TIMING 0x04 +#define AST_PECI_CMD 0x08 +#define AST_PECI_CMD_CTRL 0x0c +#define AST_PECI_EXP_FCS 0x10 +#define AST_PECI_CAP_FCS 0x14 +#define AST_PECI_INT_CTRL 0x18 +#define AST_PECI_INT_STS 0x1c +#define AST_PECI_W_DATA0 0x20 +#define AST_PECI_W_DATA1 0x24 +#define AST_PECI_W_DATA2 0x28 +#define AST_PECI_W_DATA3 0x2c +#define AST_PECI_R_DATA0 0x30 +#define AST_PECI_R_DATA1 0x34 +#define AST_PECI_R_DATA2 0x38 +#define AST_PECI_R_DATA3 0x3c +#define AST_PECI_W_DATA4 0x40 +#define AST_PECI_W_DATA5 0x44 +#define AST_PECI_W_DATA6 0x48 +#define AST_PECI_W_DATA7 0x4c +#define AST_PECI_R_DATA4 0x50 +#define AST_PECI_R_DATA5 0x54 +#define AST_PECI_R_DATA6 0x58 +#define AST_PECI_R_DATA7 0x5c + +/* AST_PECI_CTRL - 0x00 : Control Register */ +#define PECI_CTRL_SAMPLING_MASK GENMASK(19, 16) +#define PECI_CTRL_SAMPLING(x) (((x) << 16) & PECI_CTRL_SAMPLING_MASK) +#define PECI_CTRL_SAMPLING_GET(x) (((x) & PECI_CTRL_SAMPLING_MASK) >> 16) +#define PECI_CTRL_READ_MODE_MASKGENMASK(13, 12) +#define PECI_CTRL_READ_MODE(x) (((x) << 12) & PECI_CTRL_READ_MODE_MASK) +#define PECI_CTRL_READ_MODE_GET(x) (((x) & PECI_CTRL_READ_MODE_MASK) >> 12) +#define PECI_CTRL_READ_MODE_COUNT BIT(12) +#define PECI_CTRL_READ_MODE_DBG BIT(13) +#define PECI_CTRL_CLK_SOURCE_MASK BIT(11) +#define PECI_CTRL_CLK_SOURCE(x) (((x) << 11) & PECI_CTRL_CLK_SOURCE_MASK) +#define PECI_CTRL_CLK_SOURCE_GET(x) (((x) & PECI_CTRL_CLK_SOURCE_MASK) >> 11) +#define PECI_CTRL_CLK_DIV_MASK GENMASK(10, 8) +#define PECI_CTRL_CLK_DIV(x)(((x) << 8) & PECI_CTRL_CLK_DIV_MASK) +#define PECI_CTRL_CLK_DIV_GET(x)(((x) & PECI_CTRL_CLK_DIV_MASK) >> 8) +#define PECI_CTRL_INVERT_OUTBIT(7) +#define PECI_CTRL_INVERT_IN BIT(6) +#define PECI_CTRL_BUS_CONTENT_ENBIT(5) +#define PECI_CTRL_PECI_EN BIT(4) +#define PECI_CTRL_PECI_CLK_EN BIT(0) + +/* AST_PECI_TIMING - 0x04 : Timing Negotiation Register */ +#define PECI_TIMING_MESSAGE_MASK GENMASK(15, 8) +#define PECI_TIMING_MESSAGE(x) (((x) << 8) & PECI_TIMING_MESSAGE_MASK) +#define PECI_TIMING_MESSAGE_GET(x) (((x) & PECI_TIMING_MESSAGE_MASK) >> 8) +#define PECI_TIMING_ADDRESS_MASK GE
[PATCH v3 08/10] Documentation: hwmon: Add documents for PECI hwmon client drivers
This commit adds hwmon documents for PECI cputemp and dimmtemp drivers. Signed-off-by: Jae Hyun Yoo Reviewed-by: Haiyue Wang Reviewed-by: James Feist Reviewed-by: Vernon Mauery Cc: Alan Cox Cc: Andrew Jeffery Cc: Andrew Lunn Cc: Andy Shevchenko Cc: Arnd Bergmann Cc: Benjamin Herrenschmidt Cc: Fengguang Wu Cc: Greg KH Cc: Guenter Roeck Cc: Jason M Biils Cc: Jean Delvare Cc: Joel Stanley Cc: Julia Cartwright Cc: Miguel Ojeda Cc: Milton Miller II Cc: Pavel Machek Cc: Randy Dunlap Cc: Stef van Os Cc: Sumeet R Pawnikar --- Documentation/hwmon/peci-cputemp | 88 +++ Documentation/hwmon/peci-dimmtemp | 50 ++ 2 files changed, 138 insertions(+) create mode 100644 Documentation/hwmon/peci-cputemp create mode 100644 Documentation/hwmon/peci-dimmtemp diff --git a/Documentation/hwmon/peci-cputemp b/Documentation/hwmon/peci-cputemp new file mode 100644 index ..cdd5ea49a4a2 --- /dev/null +++ b/Documentation/hwmon/peci-cputemp @@ -0,0 +1,88 @@ +Kernel driver peci-cputemp +== + +Supported chips: + One of Intel server CPUs listed below which is connected to a PECI bus. + * Intel Xeon E5/E7 v3 server processors + Intel Xeon E5-14xx v3 family + Intel Xeon E5-24xx v3 family + Intel Xeon E5-16xx v3 family + Intel Xeon E5-26xx v3 family + Intel Xeon E5-46xx v3 family + Intel Xeon E7-48xx v3 family + Intel Xeon E7-88xx v3 family + * Intel Xeon E5/E7 v4 server processors + Intel Xeon E5-16xx v4 family + Intel Xeon E5-26xx v4 family + Intel Xeon E5-46xx v4 family + Intel Xeon E7-48xx v4 family + Intel Xeon E7-88xx v4 family + * Intel Xeon Scalable server processors + Intel Xeon Bronze family + Intel Xeon Silver family + Intel Xeon Gold family + Intel Xeon Platinum family + Addresses scanned: PECI client address 0x30 - 0x37 + Datasheet: Available from http://www.intel.com/design/literature.htm + +Author: + Jae Hyun Yoo + +Description +--- + +This driver implements a generic PECI hwmon feature which provides Digital +Thermal Sensor (DTS) thermal readings of the CPU package and CPU cores that are +accessible using the PECI Client Command Suite via the processor PECI client. + +All temperature values are given in millidegree Celsius and will be measurable +only when the target CPU is powered on. + +sysfs attributes + + +temp1_label"Die" +temp1_inputProvides current die temperature of the CPU package. +temp1_max Provides thermal control temperature of the CPU package + which is also known as Tcontrol. +temp1_crit Provides shutdown temperature of the CPU package which + is also known as the maximum processor junction + temperature, Tjmax or Tprochot. +temp1_crit_hystProvides the hysteresis value from Tcontrol to Tjmax of + the CPU package. + +temp2_label"DTS margin" +temp2_inputProvides current DTS thermal margin to Tcontrol of the + CPU package. Value 0 means it reaches to Tcontrol + temperature. Sub-zero value means the die temperature + goes across Tconrtol to Tjmax. +temp2_min Provides the minimum DTS thermal margin to Tcontrol of + the CPU package. +temp2_lcritProvides the value when the CPU package temperature + reaches to Tjmax. + +temp3_label"Tcontrol" +temp3_inputProvides current Tcontrol temperature of the CPU + package which is also known as Fan Temperature target. + Indicates the relative value from thermal monitor trip + temperature at which fans should be engaged. +temp3_crit Provides Tcontrol critical value of the CPU package + which is same to Tjmax. + +temp4_label"Tthrottle" +temp4_inputProvides current Tthrottle temperature of the CPU + package. Used for throttling temperature. If this value + is allowed and lower than Tjmax - the throttle will + occur and reported at lower than Tjmax. + +temp5_label"Tjmax" +temp5_inputProvides the maximum junction temperature, Tjmax of the + CPU package. + +temp[6-*]_labelProvides string "Core X&quo
[PATCH v3 04/10] Documentations: dt-bindings: Add a document of PECI adapter driver for Aspeed AST24xx/25xx SoCs
This commit adds a dt-bindings document of PECI adapter driver for Aspeed
AST24xx/25xx SoCs.
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Cc: Alan Cox
Cc: Andrew Jeffery
Cc: Andrew Lunn
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Benjamin Herrenschmidt
Cc: Fengguang Wu
Cc: Greg KH
Cc: Guenter Roeck
Cc: Jason M Biils
Cc: Jean Delvare
Cc: Joel Stanley
Cc: Julia Cartwright
Cc: Miguel Ojeda
Cc: Milton Miller II
Cc: Pavel Machek
Cc: Randy Dunlap
Cc: Stef van Os
Cc: Sumeet R Pawnikar
---
.../devicetree/bindings/peci/peci-aspeed.txt | 60 ++
1 file changed, 60 insertions(+)
create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.txt
diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.txt
b/Documentation/devicetree/bindings/peci/peci-aspeed.txt
new file mode 100644
index ..4598bb8c20fa
--- /dev/null
+++ b/Documentation/devicetree/bindings/peci/peci-aspeed.txt
@@ -0,0 +1,60 @@
+Device tree configuration for PECI buses on the AST24XX and AST25XX SoCs.
+
+Required properties:
+- compatible: Should be "aspeed,ast2400-peci" or "aspeed,ast2500-peci"
+ - aspeed,ast2400-peci: Aspeed AST2400 family PECI
+controller
+ - aspeed,ast2500-peci: Aspeed AST2500 family PECI
+controller
+- reg : Should contain PECI controller registers location and
+ length.
+- #address-cells: Should be <1>.
+- #size-cells : Should be <0>.
+- interrupts: Should contain PECI controller interrupt.
+- clocks: Should contain clock source for PECI controller.
+ Should reference clkin.
+- clock_frequency : Should contain the operation frequency of PECI controller
+ in units of Hz.
+ 187500 ~ 2400
+
+Optional properties:
+- msg-timing-nego : Message timing negotiation period. This value will
+ determine the period of message timing negotiation to be
+ issued by PECI controller. The unit of the programmed
+ value is four times of PECI clock period.
+ 0 ~ 255 (default: 1)
+- addr-timing-nego : Address timing negotiation period. This value will
+ determine the period of address timing negotiation to be
+ issued by PECI controller. The unit of the programmed
+ value is four times of PECI clock period.
+ 0 ~ 255 (default: 1)
+- rd-sampling-point : Read sampling point selection. The whole period of a bit
+ time will be divided into 16 time frames. This value will
+ determine the time frame in which the controller will
+ sample PECI signal for data read back. Usually in the
+ middle of a bit time is the best.
+ 0 ~ 15 (default: 8)
+- cmd_timeout_ms: Command timeout in units of ms.
+ 1 ~ 6 (default: 1000)
+
+Example:
+ peci: peci@1e78b000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e78b000 0x60>;
+
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2500-peci";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <15>;
+ clocks = <&clk_clkin>;
+ clock-frequency = <2400>;
+ msg-timing-nego = <1>;
+ addr-timing-nego = <1>;
+ rd-sampling-point = <8>;
+ cmd-timeout-ms = <1000>;
+ };
+ };
--
2.16.2
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[PATCH v3 07/10] Documentation: dt-bindings: Add documents for PECI hwmon client drivers
This commit adds dt-bindings documents for PECI cputemp and dimmtemp client
drivers.
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Cc: Alan Cox
Cc: Andrew Jeffery
Cc: Andrew Lunn
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Benjamin Herrenschmidt
Cc: Fengguang Wu
Cc: Greg KH
Cc: Guenter Roeck
Cc: Jason M Biils
Cc: Jean Delvare
Cc: Joel Stanley
Cc: Julia Cartwright
Cc: Miguel Ojeda
Cc: Milton Miller II
Cc: Pavel Machek
Cc: Randy Dunlap
Cc: Stef van Os
Cc: Sumeet R Pawnikar
---
.../devicetree/bindings/hwmon/peci-cputemp.txt | 24 +
.../devicetree/bindings/hwmon/peci-dimmtemp.txt| 25 ++
2 files changed, 49 insertions(+)
create mode 100644 Documentation/devicetree/bindings/hwmon/peci-cputemp.txt
create mode 100644 Documentation/devicetree/bindings/hwmon/peci-dimmtemp.txt
diff --git a/Documentation/devicetree/bindings/hwmon/peci-cputemp.txt
b/Documentation/devicetree/bindings/hwmon/peci-cputemp.txt
new file mode 100644
index ..d5530ef9cfd2
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/peci-cputemp.txt
@@ -0,0 +1,24 @@
+Bindings for Intel PECI (Platform Environment Control Interface) cputemp
driver.
+
+Required properties:
+- compatible : Should be "intel,peci-cputemp".
+- reg: Should contain address of a client CPU. Address range of CPU
+ clients is starting from 0x30 based on PECI specification.
+ <0x30> .. <0x37> (depends on the PECI_OFFSET_MAX definition)
+
+Example:
+ peci-bus@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ < more properties >
+
+ peci-cputemp@cpu0 {
+ compatible = "intel,peci-cputemp";
+ reg = <0x30>;
+ };
+
+ peci-cputemp@cpu1 {
+ compatible = "intel,peci-cputemp";
+ reg = <0x31>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/hwmon/peci-dimmtemp.txt
b/Documentation/devicetree/bindings/hwmon/peci-dimmtemp.txt
new file mode 100644
index ..56e5deb61e5c
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/peci-dimmtemp.txt
@@ -0,0 +1,25 @@
+Bindings for Intel PECI (Platform Environment Control Interface) dimmtemp
+driver.
+
+Required properties:
+- compatible : Should be "intel,peci-dimmtemp".
+- reg: Should contain address of a client CPU. Address range of CPU
+ clients is starting from 0x30 based on PECI specification.
+ <0x30> .. <0x37> (depends on the PECI_OFFSET_MAX definition)
+
+Example:
+ peci-bus@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ < more properties >
+
+ peci-dimmtemp@cpu0 {
+ compatible = "intel,peci-dimmtemp";
+ reg = <0x30>;
+ };
+
+ peci-dimmtemp@cpu1 {
+ compatible = "intel,peci-dimmtemp";
+ reg = <0x31>;
+ };
+ };
--
2.16.2
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[PATCH v3 09/10] drivers/hwmon: Add PECI hwmon client drivers
This commit adds PECI cputemp and dimmtemp hwmon drivers.
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Haiyue Wang
Reviewed-by: James Feist
Reviewed-by: Vernon Mauery
Cc: Alan Cox
Cc: Andrew Jeffery
Cc: Andrew Lunn
Cc: Andy Shevchenko
Cc: Arnd Bergmann
Cc: Benjamin Herrenschmidt
Cc: Fengguang Wu
Cc: Greg KH
Cc: Guenter Roeck
Cc: Jason M Biils
Cc: Jean Delvare
Cc: Joel Stanley
Cc: Julia Cartwright
Cc: Miguel Ojeda
Cc: Milton Miller II
Cc: Pavel Machek
Cc: Randy Dunlap
Cc: Stef van Os
Cc: Sumeet R Pawnikar
---
drivers/hwmon/Kconfig | 28 ++
drivers/hwmon/Makefile| 2 +
drivers/hwmon/peci-cputemp.c | 783 ++
drivers/hwmon/peci-dimmtemp.c | 432 +++
4 files changed, 1245 insertions(+)
create mode 100644 drivers/hwmon/peci-cputemp.c
create mode 100644 drivers/hwmon/peci-dimmtemp.c
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index f249a4428458..c52f610f81d0 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1259,6 +1259,34 @@ config SENSORS_NCT7904
This driver can also be built as a module. If so, the module
will be called nct7904.
+config SENSORS_PECI_CPUTEMP
+ tristate "PECI CPU temperature monitoring support"
+ depends on OF
+ depends on PECI
+ help
+ If you say yes here you get support for the generic Intel PECI
+ cputemp driver which provides Digital Thermal Sensor (DTS) thermal
+ readings of the CPU package and CPU cores that are accessible using
+ the PECI Client Command Suite via the processor PECI client.
+ Check Documentation/hwmon/peci-cputemp for details.
+
+ This driver can also be built as a module. If so, the module
+ will be called peci-cputemp.
+
+config SENSORS_PECI_DIMMTEMP
+ tristate "PECI DIMM temperature monitoring support"
+ depends on OF
+ depends on PECI
+ help
+ If you say yes here you get support for the generic Intel PECI hwmon
+ driver which provides Digital Thermal Sensor (DTS) thermal readings of
+ DIMM components that are accessible using the PECI Client Command
+ Suite via the processor PECI client.
+ Check Documentation/hwmon/peci-dimmtemp for details.
+
+ This driver can also be built as a module. If so, the module
+ will be called peci-dimmtemp.
+
config SENSORS_NSA320
tristate "ZyXEL NSA320 and compatible fan speed and temperature sensors"
depends on GPIOLIB && OF
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index e7d52a36e6c4..48d9598fcd3a 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -136,6 +136,8 @@ obj-$(CONFIG_SENSORS_NCT7802) += nct7802.o
obj-$(CONFIG_SENSORS_NCT7904) += nct7904.o
obj-$(CONFIG_SENSORS_NSA320) += nsa320-hwmon.o
obj-$(CONFIG_SENSORS_NTC_THERMISTOR) += ntc_thermistor.o
+obj-$(CONFIG_SENSORS_PECI_CPUTEMP) += peci-cputemp.o
+obj-$(CONFIG_SENSORS_PECI_DIMMTEMP)+= peci-dimmtemp.o
obj-$(CONFIG_SENSORS_PC87360) += pc87360.o
obj-$(CONFIG_SENSORS_PC87427) += pc87427.o
obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o
diff --git a/drivers/hwmon/peci-cputemp.c b/drivers/hwmon/peci-cputemp.c
new file mode 100644
index ..f0bc92687512
--- /dev/null
+++ b/drivers/hwmon/peci-cputemp.c
@@ -0,0 +1,783 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018 Intel Corporation
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define TEMP_TYPE_PECI6 /* Sensor type 6: Intel PECI */
+
+#define CORE_MAX_ON_HSX 18 /* Max number of cores on Haswell */
+#define CORE_MAX_ON_BDX 24 /* Max number of cores on Broadwell */
+#define CORE_MAX_ON_SKX 28 /* Max number of cores on Skylake */
+
+#define DEFAULT_CHANNEL_NUMS 5
+#define CORETEMP_CHANNEL_NUMS CORE_MAX_ON_SKX
+#define CPUTEMP_CHANNEL_NUMS (DEFAULT_CHANNEL_NUMS + CORETEMP_CHANNEL_NUMS)
+
+#define CLIENT_CPU_ID_MASK0xf0ff0 /* Mask for Family / Model info */
+
+#define UPDATE_INTERVAL_MIN HZ
+
+enum cpu_gens {
+ CPU_GEN_HSX, /* Haswell Xeon */
+ CPU_GEN_BRX, /* Broadwell Xeon */
+ CPU_GEN_SKX, /* Skylake Xeon */
+ CPU_GEN_MAX
+};
+
+struct cpu_gen_info {
+ u32 type;
+ u32 cpu_id;
+ u32 core_max;
+};
+
+struct temp_data {
+ bool valid;
+ s32 value;
+ unsigned long last_updated;
+};
+
+struct temp_group {
+ struct temp_data die;
+ struct temp_data dts_margin;
+ struct temp_data tcontrol;
+ struct temp_data tthrottle;
+ struct temp_data tjmax;
+ struct temp_data core[CORETEMP_CHANNEL_NUMS];
+};
+
+struct peci_cputemp {
+ struct peci_client *client;
+ struct device *dev;
+ char name[PECI_NAME_SIZE];
+ struct temp_group temp;
+ u8 addr;
+ uint cpu_no;
+ const struct cpu_gen_info *gen_in
[PATCH v3 10/10] Add a maintainer for the PECI subsystem
This commit adds a maintainer information for the PECI subsystem. Signed-off-by: Jae Hyun Yoo Reviewed-by: Haiyue Wang Reviewed-by: James Feist Reviewed-by: Vernon Mauery Cc: Alan Cox Cc: Andrew Jeffery Cc: Andrew Lunn Cc: Andy Shevchenko Cc: Arnd Bergmann Cc: Benjamin Herrenschmidt Cc: Fengguang Wu Cc: Greg KH Cc: Guenter Roeck Cc: Jason M Biils Cc: Jean Delvare Cc: Joel Stanley Cc: Julia Cartwright Cc: Miguel Ojeda Cc: Milton Miller II Cc: Pavel Machek Cc: Randy Dunlap Cc: Stef van Os Cc: Sumeet R Pawnikar --- MAINTAINERS | 10 ++ 1 file changed, 10 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 5cd5ff0e4428..3e6917e1ad31 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10965,6 +10965,16 @@ L: platform-driver-...@vger.kernel.org S: Maintained F: drivers/platform/x86/peaq-wmi.c +PECI SUBSYSTEM +M: Jae Hyun Yoo +M: Jason M Biils +S: Maintained +F: Documentation/devicetree/bindings/peci/ +F: drivers/peci/ +F: drivers/hwmon/peci-*.c +F: include/linux/peci.h +F: include/uapi/linux/peci-ioctl.h + PER-CPU MEMORY ALLOCATOR M: Tejun Heo M: Christoph Lameter -- 2.16.2 -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 7/8] [PATCH 7/8] drivers/hwmon: Add a generic PECI hwmon client driver
Hi Stef,
Thanks for sharing your time to test it.
That is expected result in v2. Previously in v1, it used delayed
creation on core temperature group so it was okay if hwmon driver is
registered when client CPU is powered down, but in v2, the driver should
check resolved cores at probing time to prevent the delayed creation on
core temperature group and indexing gap which breaks hwmon subsystem's
common rule, so I added peci_detect() into peci_new_device() in PECI
core driver to check online status of the client CPU when registering a
new device.
You may need to use dynamic dtoverlay for loading/unloading a PECI hwmon
driver according to the current client CPU power state. It means a PECI
hwmon driver can be registered only when the client CPU is powered on.
This design will be kept in v3 as well.
Thanks,
Jae
On 3/13/2018 2:32 AM, Stef van Os wrote:
Hi Jae,
I tried version 1 and 2 of your PECI patch on our (AST2500 / Xeon E5 v4)
system. The V1 patchset works as expected (reading back temperature 0
until PECI is up), but the hwmon driver probe fails with version 2. It
communicates with the Xeon and assumes during kernel boot of the Aspeed
that PECI to the Xeon's is already up and running, but our system
enables the main Xeon supplies from AST2500 userspace.
If I load the hwmon driver as a module to load later on, the driver does
not call probe like e.g. a I2C driver on the I2C bus does. Am I using V2
wrongly?
BR,
Stef
On 02/21/2018 05:16 PM, Jae Hyun Yoo wrote:
This commit adds a generic PECI hwmon client driver implementation.
Signed-off-by: Jae Hyun Yoo
---
drivers/hwmon/Kconfig | 10 +
drivers/hwmon/Makefile | 1 +
drivers/hwmon/peci-hwmon.c | 928
+
3 files changed, 939 insertions(+)
create mode 100644 drivers/hwmon/peci-hwmon.c
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index ef23553ff5cb..f22e0c31f597 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1246,6 +1246,16 @@ config SENSORS_NCT7904
This driver can also be built as a module. If so, the module
will be called nct7904.
+config SENSORS_PECI_HWMON
+ tristate "PECI hwmon support"
+ depends on PECI
+ help
+ If you say yes here you get support for the generic PECI hwmon
+ driver.
+
+ This driver can also be built as a module. If so, the module
+ will be called peci-hwmon.
+
config SENSORS_NSA320
tristate "ZyXEL NSA320 and compatible fan speed and temperature
sensors"
depends on GPIOLIB && OF
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index f814b4ace138..946f54b168e5 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -135,6 +135,7 @@ obj-$(CONFIG_SENSORS_NCT7802) += nct7802.o
obj-$(CONFIG_SENSORS_NCT7904) += nct7904.o
obj-$(CONFIG_SENSORS_NSA320) += nsa320-hwmon.o
obj-$(CONFIG_SENSORS_NTC_THERMISTOR) += ntc_thermistor.o
+obj-$(CONFIG_SENSORS_PECI_HWMON) += peci-hwmon.o
obj-$(CONFIG_SENSORS_PC87360) += pc87360.o
obj-$(CONFIG_SENSORS_PC87427) += pc87427.o
obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o
diff --git a/drivers/hwmon/peci-hwmon.c b/drivers/hwmon/peci-hwmon.c
new file mode 100644
index ..edd27744adcb
--- /dev/null
+++ b/drivers/hwmon/peci-hwmon.c
@@ -0,0 +1,928 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018 Intel Corporation
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DIMM_SLOT_NUMS_MAX 12 /* Max DIMM numbers (channel ranks
x 2) */
+#define CORE_NUMS_MAX 28 /* Max core numbers (max on SKX
Platinum) */
+#define TEMP_TYPE_PECI 6 /* Sensor type 6: Intel PECI */
+
+#define CORE_TEMP_ATTRS 5
+#define DIMM_TEMP_ATTRS 2
+#define ATTR_NAME_LEN 24
+
+#define DEFAULT_ATTR_GRP_NUMS 5
+
+#define UPDATE_INTERVAL_MIN HZ
+#define DIMM_MASK_CHECK_DELAY msecs_to_jiffies(5000)
+
+enum sign {
+ POS,
+ NEG
+};
+
+struct temp_data {
+ bool valid;
+ s32 value;
+ unsigned long last_updated;
+};
+
+struct temp_group {
+ struct temp_data tjmax;
+ struct temp_data tcontrol;
+ struct temp_data tthrottle;
+ struct temp_data dts_margin;
+ struct temp_data die;
+ struct temp_data core[CORE_NUMS_MAX];
+ struct temp_data dimm[DIMM_SLOT_NUMS_MAX];
+};
+
+struct core_temp_group {
+ struct sensor_device_attribute sd_attrs[CORE_TEMP_ATTRS];
+ char attr_name[CORE_TEMP_ATTRS][ATTR_NAME_LEN];
+ struct attribute *attrs[CORE_TEMP_ATTRS + 1];
+ struct attribute_group attr_group;
+};
+
+struct dimm_temp_group {
+ struct sensor_device_attribute sd_attrs[DIMM_TEMP_ATTRS];
+ char attr_name[DIMM_TEMP_ATTRS][ATTR_NAME_LEN];
+ struct attribute *attrs[DIMM_TEMP_ATTRS + 1];
+ struct attribute_group attr_group;
+};
+
+struct peci_hwmon {
+ struct peci_client *client;
+ struct device *dev;
+
Re: [PATCH v2 2/8] [PATCH 2/8] Documentations: dt-bindings: Add a document of PECI adapter driver for Aspeed AST24xx/25xx SoCs
Hi Milton, Thanks for sharing your time to review this patch. Please see my answer inline. Jae On 3/9/2018 3:41 PM, Milton Miller II wrote: About 03/07/2018 04:12PM in some time zone, Pavel Machek wrote: Subject: Re: [PATCH v2 2/8] [PATCH 2/8] Documentations: dt-bindings: Add a document of PECI adapter driver for Aspeed AST24xx/25xx SoCs Hi! Are these SoCs x86-based? Yes, these are ARM SoCs. Please see Andrew's answer as well. Understood, thanks. + Read sampling point selection. The whole period of a bit time will be + divided into 16 time frames. This value will determine which time frame + this controller will sample PECI signal for data read back. Usually in + the middle of a bit time is the best. English? "This value will determine when this controller"? Could I change it like below?: "This value will determine in which time frame this controller samples PECI signal for data read back" I guess... I'm not native speaker, I guess this could be improved some more. I agree this wording is still confusing. The problem is that the key subject, the time of the sampling, is in the descriptive clause "in which time frame". "This value will determine the time frame in which the controller will sample" or perhaps phrase it as saving a specific sample from the over-clock, or a phase of the clock. Yes, that looks more better. I'll change the wording as you suggested. Thanks a lot! Jae Best regards, Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html milton -- Speaking for myself not IBM. -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 1/8] [PATCH 1/8] drivers/peci: Add support for PECI bus driver core
Hi Julia,
Thanks for sharing your time on reviewing it. Please see my inline answers.
Jae
On 3/6/2018 7:19 PM, Julia Cartwright wrote:
On Wed, Feb 21, 2018 at 08:15:59AM -0800, Jae Hyun Yoo wrote:
This commit adds driver implementation for PECI bus into linux
driver framework.
Signed-off-by: Jae Hyun Yoo
---
[..]
+static int peci_locked_xfer(struct peci_adapter *adapter,
+ struct peci_xfer_msg *msg,
+ bool do_retry,
+ bool has_aw_fcs)
_locked generally means that this function is invoked with some critical
lock held, what lock does the caller need to acquire before invoking
this function?
I intended to show that this function has a mutex locking inside for
serialization of PECI data transactions from multiple callers, but as
you commented out below, the mutex protection scope should be adjusted
to make that covers the peci_scan_cmd_mask() function too. I'll rewrite
the mutex protection scope then this function will be in the locked scope.
+{
+ ktime_t start, end;
+ s64 elapsed_ms;
+ int rc = 0;
+
+ if (!adapter->xfer) {
Is this really an optional feature of an adapter? If this is not
optional, then this check should be in place when the adapter is
registered, not here. (And it should WARN_ON(), because it's a driver
developer error).
I agree with you. I'll move this code into the peci_register_adapter()
function.
+ dev_dbg(&adapter->dev, "PECI level transfers not supported\n");
+ return -ENODEV;
+ }
+
+ if (in_atomic() || irqs_disabled()) {
As Andrew mentioned, this is broken.
You don't even need a might_sleep(). The locking functions you use here
will already include a might_sleep() w/ CONFIG_DEBUG_ATOMIC_SLEEP.
Thanks for letting me know that. I'll drop that checking code and
might_sleep() too.
+ rt_mutex_trylock(&adapter->bus_lock);
+ if (!rc)
+ return -EAGAIN; /* PECI activity is ongoing */
+ } else {
+ rt_mutex_lock(&adapter->bus_lock);
+ }
+
+ if (do_retry)
+ start = ktime_get();
+
+ do {
+ rc = adapter->xfer(adapter, msg);
+
+ if (!do_retry)
+ break;
+
+ /* Per the PECI spec, need to retry commands that return 0x8x */
+ if (!(!rc && ((msg->rx_buf[0] & DEV_PECI_CC_RETRY_ERR_MASK) ==
+ DEV_PECI_CC_TIMEOUT)))
+ break;
This is pretty difficult to parse. Can you split it into two different
conditions?
Sure. I'll split it out.
+
+ /* Set the retry bit to indicate a retry attempt */
+ msg->tx_buf[1] |= DEV_PECI_RETRY_BIT;
Are you sure this bit is to be set in the _second_ byte of tx_buf?
Yes, I'm pretty sure. The first byte contains a PECI command value and
the second byte contains 'HostID[7:1] & Retry[0]' value.
+
+ /* Recalculate the AW FCS if it has one */
+ if (has_aw_fcs)
+ msg->tx_buf[msg->tx_len - 1] = 0x80 ^
+ peci_aw_fcs((u8 *)msg,
+ 2 + msg->tx_len);
+
+ /* Retry for at least 250ms before returning an error */
+ end = ktime_get();
+ elapsed_ms = ktime_to_ms(ktime_sub(end, start));
+ if (elapsed_ms >= DEV_PECI_RETRY_TIME_MS) {
+ dev_dbg(&adapter->dev, "Timeout retrying xfer!\n");
+ break;
+ }
+ } while (true);
+
+ rt_mutex_unlock(&adapter->bus_lock);
+
+ return rc;
+}
+
+static int peci_xfer(struct peci_adapter *adapter, struct peci_xfer_msg *msg)
+{
+ return peci_locked_xfer(adapter, msg, false, false);
+}
+
+static int peci_xfer_with_retries(struct peci_adapter *adapter,
+ struct peci_xfer_msg *msg,
+ bool has_aw_fcs)
+{
+ return peci_locked_xfer(adapter, msg, true, has_aw_fcs);
+}
+
+static int peci_scan_cmd_mask(struct peci_adapter *adapter)
+{
+ struct peci_xfer_msg msg;
+ u32 dib;
+ int rc = 0;
+
+ /* Update command mask just once */
+ if (adapter->cmd_mask & BIT(PECI_CMD_PING))
+ return 0;
+
+ msg.addr = PECI_BASE_ADDR;
+ msg.tx_len= GET_DIB_WR_LEN;
+ msg.rx_len= GET_DIB_RD_LEN;
+ msg.tx_buf[0] = GET_DIB_PECI_CMD;
+
+ rc = peci_xfer(adapter, &msg);
+ if (rc < 0) {
+ dev_dbg(&adapter->dev, "PECI xfer error, rc : %d\n", rc);
+ return rc;
+ }
+
+ dib = msg.rx_buf[0] | (msg.rx_buf[1] <
Re: [PATCH v2 6/8] [PATCH 6/8] Documentation: hwmon: Add a document for PECI hwmon client driver
Hi Randy, On 3/6/2018 12:28 PM, Randy Dunlap wrote: Hi, On 02/21/2018 08:16 AM, Jae Hyun Yoo wrote: +temp_labelProvides DDR DIMM temperature if this label indicates + 'DIMM #'. +temp_inputProvides current temperature of the DDR DIMM. + +Note: + DIMM temperature group will be appeared when the client CPU's BIOS will appear when I'll fix this description as you suggested. Thanks a lot! Jae + completes memory training and testing. -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 0/8] PECI device driver introduction
Hi Pavel, Please see my answer inline. On 3/6/2018 4:40 AM, Pavel Machek wrote: Hi! Introduction of the Platform Environment Control Interface (PECI) bus device driver. PECI is a one-wire bus interface that provides a communication channel between Intel processor and chipset components to external monitoring or control devices. PECI is designed to support the following sideband functions: * Processor and DRAM thermal management - Processor fan speed control is managed by comparing Digital Thermal Sensor (DTS) thermal readings acquired via PECI against the processor-specific fan speed control reference point, or TCONTROL. Both TCONTROL and DTS thermal readings are accessible via the processor PECI client. These variables are referenced to a common temperature, the TCC activation point, and are both defined as negative offsets from that reference. - PECI based access to the processor package configuration space provides a means for Baseboard Management Controllers (BMC) or other platform management devices to actively manage the processor and memory power and thermal features. * Platform Manageability - Platform manageability functions including thermal, power, and error monitoring. Note that platform 'power' management includes monitoring and control for both the processor and DRAM subsystem to assist with data center power limiting. - PECI allows read access to certain error registers in the processor MSR space and status monitoring registers in the PCI configuration space within the processor and downstream devices. - PECI permits writes to certain registers in the processor PCI configuration space. * Processor Interface Tuning and Diagnostics - Processor interface tuning and diagnostics capabilities (Intel(c) Interconnect BIST). The processors Intel(c) Interconnect Built In Self Test (Intel(c) IBIST) allows for infield diagnostic capabilities in the Intel UPI and memory controller interfaces. PECI provides a port to execute these diagnostics via its PCI Configuration read and write capabilities. * Failure Analysis - Output the state of the processor after a failure for analysis via Crashdump. PECI uses a single wire for self-clocking and data transfer. The bus requires no additional control lines. The physical layer is a self-clocked one-wire bus that begins each bit with a driven, rising edge from an idle level near zero volts. The duration of the signal driven high depends on whether the bit value is a logic '0' or logic '1'. PECI also includes variable data transfer rate established with every message. In this way, it is highly flexible even though underlying logic is simple. The interface design was optimized for interfacing to Intel processor and chipset components in both single processor and multiple processor environments. The single wire interface provides low board routing overhead for the multiple load connections in the congested routing area near the processor and chipset components. Bus speed, error checking, and low protocol overhead provides adequate link bandwidth and reliability to transfer critical device operating conditions and configuration information. This implementation provides the basic framework to add PECI extensions to the Linux bus and device models. A hardware specific 'Adapter' driver can be attached to the PECI bus to provide sideband functions described above. It is also possible to access all devices on an adapter from userspace through the /dev interface. A device specific 'Client' driver also can be attached to the PECI bus so each processor client's features can be supported by the 'Client' driver through an adapter connection in the bus. This patch set includes Aspeed 24xx/25xx PECI driver and a generic PECI hwmon driver as the first implementation for both adapter and client drivers on the PECI bus framework. Ok, how does this interact with ACPI/SMM BIOS/Secure mode code? Does Linux _need_ to control the fan? Or is SMM BIOS capable of doing all the work itself and Linux has just read-only access for monitoring purposes? This driver is not for local CPUs which this driver is running on. Instead, this driver will be running on BMC (Baseboard Management Controller) kernel which is separated from the server machine. In this implementation, it provides just read-only access for monitoring the server's CPU and DIMM temperatures remotely through a PECI connection. The BMC can control fans according to the monitoring data if the BMC has a fan control interface and feature, but it depends on baseboard hardware and software designs. Thanks, Jae Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majord...@vger.kernel.org More majordo
Re: [PATCH v2 2/8] [PATCH 2/8] Documentations: dt-bindings: Add a document of PECI adapter driver for Aspeed AST24xx/25xx SoCs
Hi Pavel,
Thanks for sharing your time on reviewing it. Please see my answers inline.
-Jae
On 3/6/2018 4:40 AM, Pavel Machek wrote:
Hi!
Signed-off-by: Jae Hyun Yoo
---
.../devicetree/bindings/peci/peci-aspeed.txt | 73 ++
1 file changed, 73 insertions(+)
create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.txt
diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.txt
b/Documentation/devicetree/bindings/peci/peci-aspeed.txt
new file mode 100644
index ..8a86f346d550
--- /dev/null
+++ b/Documentation/devicetree/bindings/peci/peci-aspeed.txt
@@ -0,0 +1,73 @@
+Device tree configuration for PECI buses on the AST24XX and AST25XX SoCs.
Are these SoCs x86-based?
Yes, these are ARM SoCs. Please see Andrew's answer as well.
+Required properties:
+- compatible
+ "aspeed,ast2400-peci" or "aspeed,ast2500-peci"
+ - aspeed,ast2400-peci: Aspeed AST2400 family PECI controller
+ - aspeed,ast2500-peci: Aspeed AST2500 family PECI controller
+
+- reg
+ Should contain PECI registers location and length.
Other dts documents put it on one line, reg: Should contain ...
+- clock_frequency
+ Should contain the operation frequency of PECI hardware module.
+ 187500 ~ 2400
specify this is Hz?
I'll add a description. Thanks!
+- rd-sampling-point
+ Read sampling point selection. The whole period of a bit time will be
+ divided into 16 time frames. This value will determine which time frame
+ this controller will sample PECI signal for data read back. Usually in
+ the middle of a bit time is the best.
English? "This value will determine when this controller"?
Could I change it like below?:
"This value will determine in which time frame this controller samples
PECI signal for data read back"
+ 0 ~ 15 (default: 8)
+
+- cmd_timeout_ms
+ Command timeout in units of ms.
+ 1 ~ 6 (default: 1000)
+
+Example:
+ peci: peci@1e78b000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e78b000 0x60>;
+
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2500-peci";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <15>;
+ clocks = <&clk_clkin>;
+ clock-frequency = <2400>;
+ msg-timing-nego = <1>;
+ addr-timing-nego = <1>;
+ rd-sampling-point = <8>;
+ cmd-timeout-ms = <1000>;
+ };
+ };
\ No newline at end of file
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Re: [PATCH v2 7/8] [PATCH 7/8] drivers/hwmon: Add a generic PECI hwmon client driver
On 2/23/2018 4:00 PM, Miguel Ojeda wrote: On Thu, Feb 22, 2018 at 2:29 AM, Jae Hyun Yoo wrote: On 2/21/2018 4:37 PM, Andrew Lunn wrote: But even with this change, it still needs to use delayed creation because BMC side kernel doesn't know how many DIMMs are populated on a remote server before the remote server completes its memory training and testing in BIOS, but it needs to check the remote server's CPU temperature as immediate as possible to make appropriate thermal control based on the remote CPU's temperature to avoid any critical thermal issue. What would be a better solution in this case? You could change this driver so that it supports one DIMM. Move the 'hotplug' part into another driver which creates and destroys instances of the hwmon DIMM device as the DIMMS come and go. Also, do you need to handle CPU hotplug? You could split the CPU temperature part into a separate hwmon driver? And again create and destroy devices as CPUs come and go? Andrew That seems like a possible option. I'll rewrite the hwmon driver again like that. Thanks for the good idea. :) By the way, in the rewrite, please try to avoid the create*workqueue() functions (they are deprecated :). Cheers, Miguel Hi Miguel, Thanks for letting me know that. I'll replace that with alloc_workqueue(). :) Regards, Jae Jae -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH] drivers/peci: peci_match_id() can be static
On 2/21/2018 11:01 PM, kbuild test robot wrote:
Fixes: 99f5d2b99ecd ("drivers/peci: Add support for PECI bus driver core")
Signed-off-by: Fengguang Wu
---
peci-core.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/peci/peci-core.c b/drivers/peci/peci-core.c
index d976c73..4709b8c 100644
--- a/drivers/peci/peci-core.c
+++ b/drivers/peci/peci-core.c
@@ -770,8 +770,8 @@ peci_of_match_device(const struct of_device_id *matches,
}
#endif
-const struct peci_device_id *peci_match_id(const struct peci_device_id *id,
- struct peci_client *client)
+static const struct peci_device_id *peci_match_id(const struct peci_device_id
*id,
+ struct peci_client *client)
{
if (!(id && client))
return NULL;
Hi Fengguang,
Thanks a lot for the fix. I'll merge your patch in v3 submission.
BR,
Jae
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Re: [PATCH v2 1/8] [PATCH 1/8] drivers/peci: Add support for PECI bus driver core
On 2/21/2018 10:54 PM, Greg KH wrote: On Wed, Feb 21, 2018 at 12:42:30PM -0800, Jae Hyun Yoo wrote: On 2/21/2018 9:58 AM, Greg KH wrote: On Wed, Feb 21, 2018 at 08:15:59AM -0800, Jae Hyun Yoo wrote: This commit adds driver implementation for PECI bus into linux driver framework. Signed-off-by: Jae Hyun Yoo --- Why is there no other Intel developers willing to review and sign off on this patch? Please get their review first before asking us to do their work for them :) thanks, greg k-h Hi Greg, This patch set got our internal review process. Sorry if it's code quality is under your expectation but it's the reason why I'm asking you to review the code. Could you please share your time to review it? Nope. If no other Intel developer thinks it is good enough to put their name on it as part of their review process, why should I? Again, please use the resources you have, to fix the obvious problems in your code, BEFORE asking the community to do that work for you. greg k-h Okay. I'll take our internal review process again on this patch set and collect more credit tags before submitting v3. Thanks for your advice! Jae -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 7/8] [PATCH 7/8] drivers/hwmon: Add a generic PECI hwmon client driver
On 2/21/2018 4:37 PM, Andrew Lunn wrote: But even with this change, it still needs to use delayed creation because BMC side kernel doesn't know how many DIMMs are populated on a remote server before the remote server completes its memory training and testing in BIOS, but it needs to check the remote server's CPU temperature as immediate as possible to make appropriate thermal control based on the remote CPU's temperature to avoid any critical thermal issue. What would be a better solution in this case? You could change this driver so that it supports one DIMM. Move the 'hotplug' part into another driver which creates and destroys instances of the hwmon DIMM device as the DIMMS come and go. Also, do you need to handle CPU hotplug? You could split the CPU temperature part into a separate hwmon driver? And again create and destroy devices as CPUs come and go? Andrew That seems like a possible option. I'll rewrite the hwmon driver again like that. Thanks for the good idea. :) Jae -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 7/8] [PATCH 7/8] drivers/hwmon: Add a generic PECI hwmon client driver
On 2/21/2018 1:48 PM, Guenter Roeck wrote:
On Wed, Feb 21, 2018 at 01:24:48PM -0800, Jae Hyun Yoo wrote:
Hi Guenter,
Thanks for sharing your time to review this code. Please check my answers
inline.
On 2/21/2018 10:26 AM, Guenter Roeck wrote:
On Wed, Feb 21, 2018 at 08:16:05AM -0800, Jae Hyun Yoo wrote:
This commit adds a generic PECI hwmon client driver implementation.
Signed-off-by: Jae Hyun Yoo
---
drivers/hwmon/Kconfig | 10 +
drivers/hwmon/Makefile | 1 +
drivers/hwmon/peci-hwmon.c | 928 +
3 files changed, 939 insertions(+)
create mode 100644 drivers/hwmon/peci-hwmon.c
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index ef23553ff5cb..f22e0c31f597 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1246,6 +1246,16 @@ config SENSORS_NCT7904
This driver can also be built as a module. If so, the module
will be called nct7904.
+config SENSORS_PECI_HWMON
+ tristate "PECI hwmon support"
+ depends on PECI
+ help
+ If you say yes here you get support for the generic PECI hwmon
+ driver.
+
+ This driver can also be built as a module. If so, the module
+ will be called peci-hwmon.
+
config SENSORS_NSA320
tristate "ZyXEL NSA320 and compatible fan speed and temperature sensors"
depends on GPIOLIB && OF
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index f814b4ace138..946f54b168e5 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -135,6 +135,7 @@ obj-$(CONFIG_SENSORS_NCT7802) += nct7802.o
obj-$(CONFIG_SENSORS_NCT7904) += nct7904.o
obj-$(CONFIG_SENSORS_NSA320) += nsa320-hwmon.o
obj-$(CONFIG_SENSORS_NTC_THERMISTOR) += ntc_thermistor.o
+obj-$(CONFIG_SENSORS_PECI_HWMON) += peci-hwmon.o
obj-$(CONFIG_SENSORS_PC87360) += pc87360.o
obj-$(CONFIG_SENSORS_PC87427) += pc87427.o
obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o
diff --git a/drivers/hwmon/peci-hwmon.c b/drivers/hwmon/peci-hwmon.c
new file mode 100644
index ..edd27744adcb
--- /dev/null
+++ b/drivers/hwmon/peci-hwmon.c
@@ -0,0 +1,928 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018 Intel Corporation
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DIMM_SLOT_NUMS_MAX12 /* Max DIMM numbers (channel ranks x 2) */
+#define CORE_NUMS_MAX 28 /* Max core numbers (max on SKX Platinum) */
+#define TEMP_TYPE_PECI6 /* Sensor type 6: Intel PECI */
+
+#define CORE_TEMP_ATTRS 5
+#define DIMM_TEMP_ATTRS 2
+#define ATTR_NAME_LEN 24
+
+#define DEFAULT_ATTR_GRP_NUMS 5
+
+#define UPDATE_INTERVAL_MIN HZ
+#define DIMM_MASK_CHECK_DELAY msecs_to_jiffies(5000)
+
+enum sign {
+ POS,
+ NEG
+};
+
+struct temp_data {
+ bool valid;
+ s32 value;
+ unsigned long last_updated;
+};
+
+struct temp_group {
+ struct temp_data tjmax;
+ struct temp_data tcontrol;
+ struct temp_data tthrottle;
+ struct temp_data dts_margin;
+ struct temp_data die;
+ struct temp_data core[CORE_NUMS_MAX];
+ struct temp_data dimm[DIMM_SLOT_NUMS_MAX];
+};
+
+struct core_temp_group {
+ struct sensor_device_attribute sd_attrs[CORE_TEMP_ATTRS];
+ char attr_name[CORE_TEMP_ATTRS][ATTR_NAME_LEN];
+ struct attribute *attrs[CORE_TEMP_ATTRS + 1];
+ struct attribute_group attr_group;
+};
+
+struct dimm_temp_group {
+ struct sensor_device_attribute sd_attrs[DIMM_TEMP_ATTRS];
+ char attr_name[DIMM_TEMP_ATTRS][ATTR_NAME_LEN];
+ struct attribute *attrs[DIMM_TEMP_ATTRS + 1];
+ struct attribute_group attr_group;
+};
+
+struct peci_hwmon {
+ struct peci_client *client;
+ struct device *dev;
+ struct device *hwmon_dev;
+ struct workqueue_struct *work_queue;
+ struct delayed_work work_handler;
+ char name[PECI_NAME_SIZE];
+ struct temp_group temp;
+ u8 addr;
+ uint cpu_no;
+ u32 core_mask;
+ u32 dimm_mask;
+ const struct attribute_group *core_attr_groups[CORE_NUMS_MAX + 1];
+ const struct attribute_group *dimm_attr_groups[DIMM_SLOT_NUMS_MAX + 1];
+ uint global_idx;
+ uint core_idx;
+ uint dimm_idx;
+};
+
+enum label {
+ L_DIE,
+ L_DTS,
+ L_TCONTROL,
+ L_TTHROTTLE,
+ L_TJMAX,
+ L_MAX
+};
+
+static const char *peci_label[L_MAX] = {
+ "Die\n",
+ "DTS margin to Tcontrol\n",
+ "Tcontrol\n",
+ "Tthrottle\n",
+ "Tjmax\n",
+};
+
+static int send_peci_cmd(struct peci_hwmon *priv, enum peci_cmd cmd, void *msg)
+{
+ return peci_command(priv->client->adapter, cmd, msg);
+}
+
+static int need_update(struct temp_data *temp)
+{
+ if (temp->valid &&
+ time_before(jiffies, temp->l
Re: [PATCH v2 1/8] [PATCH 1/8] drivers/peci: Add support for PECI bus driver core
On 2/21/2018 1:51 PM, Andrew Lunn wrote:
Is there a real need to do transfers in atomic context, or with
interrupts disabled?
Actually, no. Generally, this function will be called in sleep-able context
so this code is for an exceptional case handling.
I'll rewrite this code like below:
if (in_atomic() || irqs_disabled()) {
dev_dbg(&adapter->dev,
"xfer in non-sleepable context is not supported\n");
return -EWOULDBLOCK;
}
I would not even do that. Just add a call to
might_sleep(). CONFIG_DEBUG_ATOMIC_SLEEP will then find bad calls.
Thanks for the suggestion. I've learned one thing. :)
+static int peci_ioctl_get_temp(struct peci_adapter *adapter, void *vmsg)
+{
+ struct peci_get_temp_msg *umsg = vmsg;
+ struct peci_xfer_msg msg;
+ int rc;
+
Is this getting the temperature?
Yes, this is getting the 'die' temperature of a processor package.
So the hwmon driver provides this. No need to have both.
This this common API in core driver of PECI bus. The hwmon is also uses
it through peci_command call.
+static long peci_ioctl(struct file *file, unsigned int iocmd, unsigned long
arg)
+{
+ struct peci_adapter *adapter = file->private_data;
+ void __user *argp = (void __user *)arg;
+ unsigned int msg_len;
+ enum peci_cmd cmd;
+ u8 *msg;
+ int rc = 0;
+
+ dev_dbg(&adapter->dev, "ioctl, cmd=0x%x, arg=0x%lx\n", iocmd, arg);
+
+ switch (iocmd) {
+ case PECI_IOC_PING:
+ case PECI_IOC_GET_DIB:
+ case PECI_IOC_GET_TEMP:
+ case PECI_IOC_RD_PKG_CFG:
+ case PECI_IOC_WR_PKG_CFG:
+ case PECI_IOC_RD_IA_MSR:
+ case PECI_IOC_RD_PCI_CFG:
+ case PECI_IOC_RD_PCI_CFG_LOCAL:
+ case PECI_IOC_WR_PCI_CFG_LOCAL:
+ cmd = _IOC_TYPE(iocmd) - PECI_IOC_BASE;
+ msg_len = _IOC_SIZE(iocmd);
+ break;
Adding new ioctl calls is pretty frowned up. Can you export this info
via /sysfs?
Most of these are not simple IOs so ioctl is better suited, I think.
Lets see what other reviewers say, but i think ioctls are
wrong.
Andrew
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Re: [PATCH v2 7/8] [PATCH 7/8] drivers/hwmon: Add a generic PECI hwmon client driver
Hi Guenter,
Thanks for sharing your time to review this code. Please check my
answers inline.
On 2/21/2018 10:26 AM, Guenter Roeck wrote:
On Wed, Feb 21, 2018 at 08:16:05AM -0800, Jae Hyun Yoo wrote:
This commit adds a generic PECI hwmon client driver implementation.
Signed-off-by: Jae Hyun Yoo
---
drivers/hwmon/Kconfig | 10 +
drivers/hwmon/Makefile | 1 +
drivers/hwmon/peci-hwmon.c | 928 +
3 files changed, 939 insertions(+)
create mode 100644 drivers/hwmon/peci-hwmon.c
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index ef23553ff5cb..f22e0c31f597 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1246,6 +1246,16 @@ config SENSORS_NCT7904
This driver can also be built as a module. If so, the module
will be called nct7904.
+config SENSORS_PECI_HWMON
+ tristate "PECI hwmon support"
+ depends on PECI
+ help
+ If you say yes here you get support for the generic PECI hwmon
+ driver.
+
+ This driver can also be built as a module. If so, the module
+ will be called peci-hwmon.
+
config SENSORS_NSA320
tristate "ZyXEL NSA320 and compatible fan speed and temperature sensors"
depends on GPIOLIB && OF
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index f814b4ace138..946f54b168e5 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -135,6 +135,7 @@ obj-$(CONFIG_SENSORS_NCT7802) += nct7802.o
obj-$(CONFIG_SENSORS_NCT7904) += nct7904.o
obj-$(CONFIG_SENSORS_NSA320) += nsa320-hwmon.o
obj-$(CONFIG_SENSORS_NTC_THERMISTOR) += ntc_thermistor.o
+obj-$(CONFIG_SENSORS_PECI_HWMON) += peci-hwmon.o
obj-$(CONFIG_SENSORS_PC87360) += pc87360.o
obj-$(CONFIG_SENSORS_PC87427) += pc87427.o
obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o
diff --git a/drivers/hwmon/peci-hwmon.c b/drivers/hwmon/peci-hwmon.c
new file mode 100644
index ..edd27744adcb
--- /dev/null
+++ b/drivers/hwmon/peci-hwmon.c
@@ -0,0 +1,928 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018 Intel Corporation
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DIMM_SLOT_NUMS_MAX12 /* Max DIMM numbers (channel ranks x 2) */
+#define CORE_NUMS_MAX 28 /* Max core numbers (max on SKX Platinum) */
+#define TEMP_TYPE_PECI6 /* Sensor type 6: Intel PECI */
+
+#define CORE_TEMP_ATTRS 5
+#define DIMM_TEMP_ATTRS 2
+#define ATTR_NAME_LEN 24
+
+#define DEFAULT_ATTR_GRP_NUMS 5
+
+#define UPDATE_INTERVAL_MIN HZ
+#define DIMM_MASK_CHECK_DELAY msecs_to_jiffies(5000)
+
+enum sign {
+ POS,
+ NEG
+};
+
+struct temp_data {
+ bool valid;
+ s32 value;
+ unsigned long last_updated;
+};
+
+struct temp_group {
+ struct temp_data tjmax;
+ struct temp_data tcontrol;
+ struct temp_data tthrottle;
+ struct temp_data dts_margin;
+ struct temp_data die;
+ struct temp_data core[CORE_NUMS_MAX];
+ struct temp_data dimm[DIMM_SLOT_NUMS_MAX];
+};
+
+struct core_temp_group {
+ struct sensor_device_attribute sd_attrs[CORE_TEMP_ATTRS];
+ char attr_name[CORE_TEMP_ATTRS][ATTR_NAME_LEN];
+ struct attribute *attrs[CORE_TEMP_ATTRS + 1];
+ struct attribute_group attr_group;
+};
+
+struct dimm_temp_group {
+ struct sensor_device_attribute sd_attrs[DIMM_TEMP_ATTRS];
+ char attr_name[DIMM_TEMP_ATTRS][ATTR_NAME_LEN];
+ struct attribute *attrs[DIMM_TEMP_ATTRS + 1];
+ struct attribute_group attr_group;
+};
+
+struct peci_hwmon {
+ struct peci_client *client;
+ struct device *dev;
+ struct device *hwmon_dev;
+ struct workqueue_struct *work_queue;
+ struct delayed_work work_handler;
+ char name[PECI_NAME_SIZE];
+ struct temp_group temp;
+ u8 addr;
+ uint cpu_no;
+ u32 core_mask;
+ u32 dimm_mask;
+ const struct attribute_group *core_attr_groups[CORE_NUMS_MAX + 1];
+ const struct attribute_group *dimm_attr_groups[DIMM_SLOT_NUMS_MAX + 1];
+ uint global_idx;
+ uint core_idx;
+ uint dimm_idx;
+};
+
+enum label {
+ L_DIE,
+ L_DTS,
+ L_TCONTROL,
+ L_TTHROTTLE,
+ L_TJMAX,
+ L_MAX
+};
+
+static const char *peci_label[L_MAX] = {
+ "Die\n",
+ "DTS margin to Tcontrol\n",
+ "Tcontrol\n",
+ "Tthrottle\n",
+ "Tjmax\n",
+};
+
+static int send_peci_cmd(struct peci_hwmon *priv, enum peci_cmd cmd, void *msg)
+{
+ return peci_command(priv->client->adapter, cmd, msg);
+}
+
+static int need_update(struct temp_data *temp)
+{
+ if (temp->valid &&
+ time_before(jiffies, temp->last_updated + UPDATE_INTERVAL_MIN))
+ return 0;
+
+ return 1;
+}
+
+static s32 ten_dot_six_to_millid
Re: [PATCH v2 1/8] [PATCH 1/8] drivers/peci: Add support for PECI bus driver core
On 2/21/2018 9:58 AM, Greg KH wrote: On Wed, Feb 21, 2018 at 08:15:59AM -0800, Jae Hyun Yoo wrote: This commit adds driver implementation for PECI bus into linux driver framework. Signed-off-by: Jae Hyun Yoo --- Why is there no other Intel developers willing to review and sign off on this patch? Please get their review first before asking us to do their work for them :) thanks, greg k-h Hi Greg, This patch set got our internal review process. Sorry if it's code quality is under your expectation but it's the reason why I'm asking you to review the code. Could you please share your time to review it? Thanks a lot, Jae -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 2/8] [PATCH 2/8] Documentations: dt-bindings: Add a document of PECI adapter driver for Aspeed AST24xx/25xx SoCs
On 2/21/2018 9:13 AM, Andrew Lunn wrote: On Wed, Feb 21, 2018 at 08:16:00AM -0800, Jae Hyun Yoo wrote: This commit adds a dt-bindings document of PECI adapter driver for Aspeed AST24xx/25xx SoCs. Hi Jae It would be good to separate this into two. One binding document for a generic adaptor, with a generic PECI bus, and generic client devices. List all the properties you expect at the generic level. Then have an aspeed specific binding for those properties which are specific to the Aspeed adaptor. That makes sense. I'll add generic PECI bus/adapter/client and Aspeed specific documents as separated. Andrew Thanks again for sharing your time to review it. I really appreciate it. BR, Jae -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
