Re: [PATCH v13 0/9] coresight: enable debug module
On Mon, May 29, 2017 at 10:41:17AM -0600, Mathieu Poirier wrote: > On 25 May 2017 at 09:57, Leo Yan wrote: > > ARMv8 architecture reference manual (ARM DDI 0487A.k) Chapter H7 "The > > Sample-based Profiling Extension" has description for sampling > > registers, we can utilize these registers to check program counter > > value with combined CPU exception level, secure state, etc. So this is > > helpful for CPU lockup bugs, e.g. if one CPU has run into infinite loop > > with IRQ disabled; the 'hang' CPU cannot switch context and handle any > > interrupt, so it cannot handle SMP call for stack dump, etc. > > > > This patch series is to enable coresight debug module with sample-based > > registers and register call back notifier for PCSR register dumping > > when panic happens, so we can see below dumping info for panic; and > > this patch series has considered the conditions for access permission > > for debug registers self, so this can avoid access debug registers when > > CPU power domain is off; the driver also try to figure out the CPU is > > in secure or non-secure state. > > I have queued patches 1 to 7 to my tree. I can't do anything about > patches 8 and 9 because they haven't been ack'ed. From here you can > either chase them to get an ACK or send a separate patch to them > directly. Thanks a lot, Mathieu. I will ping Wei and Andy/David saperately. > Thanks, > Mathieu -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v13 0/9] coresight: enable debug module
On 25 May 2017 at 09:57, Leo Yan wrote: > ARMv8 architecture reference manual (ARM DDI 0487A.k) Chapter H7 "The > Sample-based Profiling Extension" has description for sampling > registers, we can utilize these registers to check program counter > value with combined CPU exception level, secure state, etc. So this is > helpful for CPU lockup bugs, e.g. if one CPU has run into infinite loop > with IRQ disabled; the 'hang' CPU cannot switch context and handle any > interrupt, so it cannot handle SMP call for stack dump, etc. > > This patch series is to enable coresight debug module with sample-based > registers and register call back notifier for PCSR register dumping > when panic happens, so we can see below dumping info for panic; and > this patch series has considered the conditions for access permission > for debug registers self, so this can avoid access debug registers when > CPU power domain is off; the driver also try to figure out the CPU is > in secure or non-secure state. I have queued patches 1 to 7 to my tree. I can't do anything about patches 8 and 9 because they haven't been ack'ed. From here you can either chase them to get an ACK or send a separate patch to them directly. Thanks, Mathieu > > Patch 0001 is to document the dt binding; patch 0002 adds one detailed > document to describe the Coresight debug module implementation, the > clock and power domain impaction on the driver, some examples for usage. > > Patch 0003 is to document boot parameters used in kernel command line. > > Patch 0004 is to add file entries for MAINTAINERS. > > Patch 0005 is used to fix the func of_get_coresight_platform_data() > doesn't properly drop the reference to the CPU node pointer; and > patch 0006 is refactor to add new function of_coresight_get_cpu(). > > Patch 0007 is the driver for CPU debug module. > > Patch 0008 in this series are to enable debug unit on 96boards Hikey, > Patch 0009 is to enable debug on 96boards DB410c. Have verified on both > two boards. > > We can enable debugging with two methods, adding parameters into kernel > command line for build-in module: > coresight_cpu_debug.enable=1 > > Or we can wait the system has booted up to use debugfs nodes to enable > debugging: > # echo 1 > /sys/kernel/debug/coresight_cpu_debug/enable > > As result we can get below log after input command: > echo c > /proc/sysrq-trigger: > > ARM external debug module: > coresight-cpu-debug 85.debug: CPU[0]: > coresight-cpu-debug 85.debug: EDPRSR: 0001 (Power:On DLK:Unlock) > coresight-cpu-debug 85.debug: EDPCSR: [] > handle_IPI+0x174/0x1d8 > coresight-cpu-debug 85.debug: EDCIDSR: > coresight-cpu-debug 85.debug: EDVIDSR: 9000 (State:Non-secure > Mode:EL1/0 Width:64bits VMID:0) > coresight-cpu-debug 852000.debug: CPU[1]: > coresight-cpu-debug 852000.debug: EDPRSR: 0001 (Power:On DLK:Unlock) > coresight-cpu-debug 852000.debug: EDPCSR: [] > debug_notifier_call+0x23c/0x358 > coresight-cpu-debug 852000.debug: EDCIDSR: > coresight-cpu-debug 852000.debug: EDVIDSR: 9000 (State:Non-secure > Mode:EL1/0 Width:64bits VMID:0) > > [...] > > Changes from v12: > * Fix build warning for 'ARCH=arm' reported by kbuild test robot. > > Changes from v11: > * Dismissed checkpatch.pl warning about "quoted string split across > multiple lines" and "line over 80 characters". > > Changes from v10: > * Followed Liviu suggestion to improve readability of the documentation. > * ARM Juno DTS binding patch has been picked by Sudeep, so this patch > set has not included anymore. Great! > > Changes from v9: > * Used dev_xyz() to replace pr_xyz() for print log. > * Added DT binding patch for Juno shared by Suzuki. > > Changes from v8: > * According to Mathieu suggestions to split the doc into two patches, > one is for kernel parameter and another is for driver documentation. > * Add file entries to MAINTAINERS. > * According to Mathieu suggestions, refined functions > debug_enable_func()/debug_disable_func(). > > Changes from v7: > * Fix operator priority bug. > * Minor sequence adjustment for function debug_func_exit(). > > Changes from v6: > * According to Suzuki and Mathieu suggestions, refined debug module > driver to install panic notifier when insmod module; refined function > debug_force_cpu_powered_up() for CPU power state checking; some minor > fixing for output log, adding comments for memory barrier, code > alignment. > > Changes from v5: > * According to Suzuki and Mathieu suggestions, refined debug module > driver to drop unused structure members, refactored initialization > code to distinguish hardware implementation features, refactored > flow for forcing CPU powered up, supported pm_runtime operations. > * Added one new doc file: Documentation/trace/coresight-cpu-debug.txt, > which is used to describe detailed info for implementation, clock > and power domain impaction on debug module, and exmaples for common > usage. > * Removed
[PATCH v13 0/9] coresight: enable debug module
ARMv8 architecture reference manual (ARM DDI 0487A.k) Chapter H7 "The Sample-based Profiling Extension" has description for sampling registers, we can utilize these registers to check program counter value with combined CPU exception level, secure state, etc. So this is helpful for CPU lockup bugs, e.g. if one CPU has run into infinite loop with IRQ disabled; the 'hang' CPU cannot switch context and handle any interrupt, so it cannot handle SMP call for stack dump, etc. This patch series is to enable coresight debug module with sample-based registers and register call back notifier for PCSR register dumping when panic happens, so we can see below dumping info for panic; and this patch series has considered the conditions for access permission for debug registers self, so this can avoid access debug registers when CPU power domain is off; the driver also try to figure out the CPU is in secure or non-secure state. Patch 0001 is to document the dt binding; patch 0002 adds one detailed document to describe the Coresight debug module implementation, the clock and power domain impaction on the driver, some examples for usage. Patch 0003 is to document boot parameters used in kernel command line. Patch 0004 is to add file entries for MAINTAINERS. Patch 0005 is used to fix the func of_get_coresight_platform_data() doesn't properly drop the reference to the CPU node pointer; and patch 0006 is refactor to add new function of_coresight_get_cpu(). Patch 0007 is the driver for CPU debug module. Patch 0008 in this series are to enable debug unit on 96boards Hikey, Patch 0009 is to enable debug on 96boards DB410c. Have verified on both two boards. We can enable debugging with two methods, adding parameters into kernel command line for build-in module: coresight_cpu_debug.enable=1 Or we can wait the system has booted up to use debugfs nodes to enable debugging: # echo 1 > /sys/kernel/debug/coresight_cpu_debug/enable As result we can get below log after input command: echo c > /proc/sysrq-trigger: ARM external debug module: coresight-cpu-debug 85.debug: CPU[0]: coresight-cpu-debug 85.debug: EDPRSR: 0001 (Power:On DLK:Unlock) coresight-cpu-debug 85.debug: EDPCSR: [] handle_IPI+0x174/0x1d8 coresight-cpu-debug 85.debug: EDCIDSR: coresight-cpu-debug 85.debug: EDVIDSR: 9000 (State:Non-secure Mode:EL1/0 Width:64bits VMID:0) coresight-cpu-debug 852000.debug: CPU[1]: coresight-cpu-debug 852000.debug: EDPRSR: 0001 (Power:On DLK:Unlock) coresight-cpu-debug 852000.debug: EDPCSR: [] debug_notifier_call+0x23c/0x358 coresight-cpu-debug 852000.debug: EDCIDSR: coresight-cpu-debug 852000.debug: EDVIDSR: 9000 (State:Non-secure Mode:EL1/0 Width:64bits VMID:0) [...] Changes from v12: * Fix build warning for 'ARCH=arm' reported by kbuild test robot. Changes from v11: * Dismissed checkpatch.pl warning about "quoted string split across multiple lines" and "line over 80 characters". Changes from v10: * Followed Liviu suggestion to improve readability of the documentation. * ARM Juno DTS binding patch has been picked by Sudeep, so this patch set has not included anymore. Great! Changes from v9: * Used dev_xyz() to replace pr_xyz() for print log. * Added DT binding patch for Juno shared by Suzuki. Changes from v8: * According to Mathieu suggestions to split the doc into two patches, one is for kernel parameter and another is for driver documentation. * Add file entries to MAINTAINERS. * According to Mathieu suggestions, refined functions debug_enable_func()/debug_disable_func(). Changes from v7: * Fix operator priority bug. * Minor sequence adjustment for function debug_func_exit(). Changes from v6: * According to Suzuki and Mathieu suggestions, refined debug module driver to install panic notifier when insmod module; refined function debug_force_cpu_powered_up() for CPU power state checking; some minor fixing for output log, adding comments for memory barrier, code alignment. Changes from v5: * According to Suzuki and Mathieu suggestions, refined debug module driver to drop unused structure members, refactored initialization code to distinguish hardware implementation features, refactored flow for forcing CPU powered up, supported pm_runtime operations. * Added one new doc file: Documentation/trace/coresight-cpu-debug.txt, which is used to describe detailed info for implementation, clock and power domain impaction on debug module, and exmaples for common usage. * Removed "idle constraints" from debug driver. Changes from v4: * This version is mainly credit to ARM colleagues many contribution ideas for better quality (Thanks a lot Suzuki, Mike and Sudeep!). * According to Suzuki suggestion, refined debug module driver to avoid memory leak for drvdata struct, handle PCSAMPLE_MODE=1, use flag drvdata.pc_has_offset to indicate if PCSR has offset, minor fixes. * According to Mathieu suggestion, refined dt binding description.
