[PATCH 2/7 v3] i2c-eg20t: Modify returned value s32 to long
Type of wait_event_timeout is long not s32.
This patch replaces s32 with long.
Additionally, delete negative processing(ret < 0).
Signed-off-by: Tomoya MORINAGA
---
drivers/i2c/busses/i2c-eg20t.c |6 +-
1 files changed, 1 insertions(+), 5 deletions(-)
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index 35d819a..c5b9924 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -313,13 +313,9 @@ static void pch_i2c_start(struct i2c_algo_pch_data *adap)
*/
static s32 pch_i2c_wait_for_xfer_complete(struct i2c_algo_pch_data *adap)
{
- s32 ret;
+ long ret;
ret = wait_event_timeout(pch_event,
(adap->pch_event_flag != 0), msecs_to_jiffies(50));
- if (ret < 0) {
- pch_err(adap, "timeout: %x\n", adap->pch_event_flag);
- return ret;
- }
if (ret == 0) {
pch_err(adap, "timeout: %x\n", adap->pch_event_flag);
--
1.7.4.4
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[PATCH 3/7 v1] i2c-eg20t: Fix 10bit access issue
Reported-by: Jeffrey (Sheng-Hui) Chu
Signed-off-by: Tomoya MORINAGA
---
drivers/i2c/busses/i2c-eg20t.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index c5b9924..aa1705e 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -410,7 +410,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,
}
if (msgs->flags & I2C_M_TEN) {
- addr_2_msb = ((addr & I2C_MSB_2B_MSK) >> 7);
+ addr_2_msb = ((addr & I2C_MSB_2B_MSK) >> 7) & 0x06;
iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
if (first)
pch_i2c_start(adap);
@@ -515,7 +515,6 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap,
struct i2c_msg *msgs,
if (msgs->flags & I2C_M_TEN) {
addr_2_msb = (((addr & I2C_MSB_2B_MSK) >> 7) | (I2C_RD));
iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
-
} else {
/* 7 address bits + R/W bit */
addr = (((addr) << 1) | (I2C_RD));
--
1.7.4.4
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[PATCH 4/7 v3] i2c-eg20t: Separate error processing
From: Tomoya MORINAGA
Error processing for NACK or wait-event must be precessed separately.
So divide wait-event error processing into NACK-receiving and timeout.
Add arbitration lost processing.
Signed-off-by: Tomoya MORINAGA
---
drivers/i2c/busses/i2c-eg20t.c | 171 ++--
1 files changed, 113 insertions(+), 58 deletions(-)
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index aa1705e..0b29ea6 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -392,6 +392,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,
u32 addr_2_msb;
u32 addr_8_lsb;
s32 wrcount;
+ s32 rtn;
void __iomem *p = adap->pch_base_address;
length = msgs->len;
@@ -414,11 +415,23 @@ static s32 pch_i2c_writebytes(struct i2c_adapter
*i2c_adap,
iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
if (first)
pch_i2c_start(adap);
- if (pch_i2c_wait_for_xfer_complete(adap) == 0 &&
- pch_i2c_getack(adap) == 0) {
+
+ rtn = pch_i2c_wait_for_xfer_complete(adap);
+ if (rtn == 0) {
+ if (pch_i2c_getack(adap)) {
+ pch_err(adap, "Receive NACK for slave address\
+ setting\n");
+ return -EIO;
+ }
addr_8_lsb = (addr & I2C_ADDR_MSK);
iowrite32(addr_8_lsb, p + PCH_I2CDR);
- } else {
+ } else if (rtn == -EIO) { /* Arbitration Lost */
+ pch_err(adap, "Lost Arbitration\n");
+ pch_clrbit(adap->pch_base_address, PCH_I2CSR,
I2CMAL_BIT);
+ pch_clrbit(adap->pch_base_address, PCH_I2CSR,
I2CMIF_BIT);
+ pch_i2c_init(adap);
+ return -EAGAIN;
+ } else { /* wait-event timeout */
pch_i2c_stop(adap);
return -ETIME;
}
@@ -429,30 +442,48 @@ static s32 pch_i2c_writebytes(struct i2c_adapter
*i2c_adap,
pch_i2c_start(adap);
}
- if ((pch_i2c_wait_for_xfer_complete(adap) == 0) &&
- (pch_i2c_getack(adap) == 0)) {
- for (wrcount = 0; wrcount < length; ++wrcount) {
- /* write buffer value to I2C data register */
- iowrite32(buf[wrcount], p + PCH_I2CDR);
- pch_dbg(adap, "writing %x to Data register\n",
- buf[wrcount]);
+ rtn = pch_i2c_wait_for_xfer_complete(adap);
+ if (rtn == 0) {
+ if (pch_i2c_getack(adap)) {
+ pch_err(adap, "Receive NACK for slave address\
+ setting\n");
+ return -EIO;
+ }
+ } else if (rtn == -EIO) { /* Arbitration Lost */
+ pch_err(adap, "Lost Arbitration\n");
+ pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMAL_BIT);
+ pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT);
+ return -EAGAIN;
+ } else { /* wait-event timeout */
+ return -ETIME;
+ }
- if (pch_i2c_wait_for_xfer_complete(adap) != 0)
- return -ETIME;
+ for (wrcount = 0; wrcount < length; ++wrcount) {
+ /* write buffer value to I2C data register */
+ iowrite32(buf[wrcount], p + PCH_I2CDR);
+ pch_dbg(adap, "writing %x to Data register\n", buf[wrcount]);
- if (pch_i2c_getack(adap))
+ rtn = pch_i2c_wait_for_xfer_complete(adap);
+ if (rtn == 0) {
+ if (pch_i2c_getack(adap)) {
+ pch_err(adap, "Receive NACK for slave address\
+ setting\n");
return -EIO;
+ }
+ pch_clrbit(adap->pch_base_address, PCH_I2CSR,
+ I2CMCF_BIT);
+ pch_clrbit(adap->pch_base_address, PCH_I2CSR,
+ I2CMIF_BIT);
+ } else { /* wait-event timeout */
+ return -ETIME;
}
+ }
- /* check if this is the last message */
- if (last)
- pch_i2c_stop(adap);
- else
- pch_i2c_repstart(adap);
- } else {
+ /* check if this is the last message */
+ if (last)
pch_i2c_stop(adap);
- return -EIO;
- }
+ else
+ pch_i2c_repstart(adap);
pch_dbg(adap, "return=%d\n", wrcount);
@@ -499,6 +530,7 @@ static
[PATCH 6/7 v3] i2c-eg20t: Fix flag setting issue
Currently, in case occurring abnormal event,
internal flag variable(=pch_event_flag) is not reset.
This patch fixes the issue.
Signed-off-by: Tomoya MORINAGA
---
drivers/i2c/busses/i2c-eg20t.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index 5cdf9cb..20c0f34 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -319,11 +319,13 @@ static s32 pch_i2c_wait_for_xfer_complete(struct
i2c_algo_pch_data *adap)
if (ret == 0) {
pch_err(adap, "timeout: %x\n", adap->pch_event_flag);
+ adap->pch_event_flag = 0;
return -ETIMEDOUT;
}
if (adap->pch_event_flag & I2C_ERROR_MASK) {
pch_err(adap, "error bits set: %x\n", adap->pch_event_flag);
+ adap->pch_event_flag = 0;
return -EIO;
}
--
1.7.4.4
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[PATCH 5/7 v3] i2c-eg20t: add stop sequence in case wait-event timeout occurs
add stop sequence in case wait-event timeout in write processing.
(read processing already had it)
Signed-off-by: Tomoya MORINAGA
---
drivers/i2c/busses/i2c-eg20t.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index 0b29ea6..5cdf9cb 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -455,6 +455,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,
pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT);
return -EAGAIN;
} else { /* wait-event timeout */
+ pch_i2c_stop(adap);
return -ETIME;
}
@@ -475,6 +476,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,
pch_clrbit(adap->pch_base_address, PCH_I2CSR,
I2CMIF_BIT);
} else { /* wait-event timeout */
+ pch_i2c_stop(adap);
return -ETIME;
}
}
@@ -570,6 +572,7 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap,
struct i2c_msg *msgs,
pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT);
return -EAGAIN;
} else { /* wait-event timeout */
+ pch_i2c_stop(adap);
return -ETIME;
}
--
1.7.4.4
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[PATCH 3/7 v3] i2c-eg20t: delete 10bit access processing
From: Tomoya MORINAGA
Linux I2C core doesn't support 10bit access formally.
Additionally, we can't test with 10bit mode.
This patch deletes the 10bit access processing.
Signed-off-by: Tomoya MORINAGA
---
drivers/i2c/busses/i2c-eg20t.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index c5b9924..aa1705e 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -410,7 +410,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,
}
if (msgs->flags & I2C_M_TEN) {
- addr_2_msb = ((addr & I2C_MSB_2B_MSK) >> 7);
+ addr_2_msb = ((addr & I2C_MSB_2B_MSK) >> 7) & 0x06;
iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
if (first)
pch_i2c_start(adap);
@@ -515,7 +515,6 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap,
struct i2c_msg *msgs,
if (msgs->flags & I2C_M_TEN) {
addr_2_msb = (((addr & I2C_MSB_2B_MSK) >> 7) | (I2C_RD));
iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
-
} else {
/* 7 address bits + R/W bit */
addr = (((addr) << 1) | (I2C_RD));
--
1.7.4.4
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[PATCH 7/7 v3] i2c-eg20t: Add initialize processing in case i2c-error occurs
In case disconnecting physical connection,
need to initialize i2c device for retry access.
This patch adds initialize process in case bus-idle fails and Lost arbitration.
Signed-off-by: Tomoya MORINAGA
---
drivers/i2c/busses/i2c-eg20t.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index 20c0f34..d3b0f4f 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -290,6 +290,7 @@ static s32 pch_i2c_wait_for_bus_idle(struct
i2c_algo_pch_data *adap,
pch_dbg(adap, "I2CSR = %x\n", ioread32(p + PCH_I2CSR));
pch_err(adap, "%s: Timeout Error.return%d\n", __func__, -ETIME);
+ pch_i2c_init(adap);
return -ETIME;
}
@@ -455,6 +456,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,
pch_err(adap, "Lost Arbitration\n");
pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMAL_BIT);
pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT);
+ pch_i2c_init(adap);
return -EAGAIN;
} else { /* wait-event timeout */
pch_i2c_stop(adap);
@@ -572,6 +574,7 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap,
struct i2c_msg *msgs,
pch_err(adap, "Lost Arbitration\n");
pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMAL_BIT);
pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT);
+ pch_i2c_init(adap);
return -EAGAIN;
} else { /* wait-event timeout */
pch_i2c_stop(adap);
--
1.7.4.4
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[PATCH 1/7 v3] i2c-eg20t: Fix bus-idle waiting issue
Currently, when checking whether bus is idle or not,
if timeout occurs,
this function always returns success(zero).
This patch fixes the issue.
Signed-off-by: Tomoya MORINAGA
---
drivers/i2c/busses/i2c-eg20t.c | 18 +-
1 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index 6565009..35d819a 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -275,23 +275,23 @@ static s32 pch_i2c_wait_for_bus_idle(struct
i2c_algo_pch_data *adap,
s32 timeout)
{
void __iomem *p = adap->pch_base_address;
+ ktime_t ns_val;
+
+ if ((ioread32(p + PCH_I2CSR) & I2CMBB_BIT) == 0)
+ return 0;
/* MAX timeout value is timeout*1000*1000nsec */
- ktime_t ns_val = ktime_add_ns(ktime_get(), timeout*1000*1000);
+ ns_val = ktime_add_ns(ktime_get(), timeout*1000*1000);
do {
- if ((ioread32(p + PCH_I2CSR) & I2CMBB_BIT) == 0)
- break;
msleep(20);
+ if ((ioread32(p + PCH_I2CSR) & I2CMBB_BIT) == 0)
+ return 0;
} while (ktime_lt(ktime_get(), ns_val));
pch_dbg(adap, "I2CSR = %x\n", ioread32(p + PCH_I2CSR));
+ pch_err(adap, "%s: Timeout Error.return%d\n", __func__, -ETIME);
- if (timeout == 0) {
- pch_err(adap, "%s: Timeout Error.return%d\n", __func__, -ETIME);
- return -ETIME;
- }
-
- return 0;
+ return -ETIME;
}
/**
--
1.7.4.4
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Re: [PATCH 2/7 v2] i2c-eg20t: delete 10bit access processing
(2011/10/06 2:29), Jeffrey (Sheng-Hui) Chu wrote: Is there any way I can help getting the code fixed instead of removed? OK. I will add a 10bit access code again. I will post v3 patch series soon. Please check the code. -- tomoya ROHM Co., Ltd. -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 2/7 v2] i2c-eg20t: delete 10bit access processing
Is there any way I can help getting the code fixed instead of removed?
Regards,
-Jeffrey
-Original Message-
From: linux-i2c-ow...@vger.kernel.org [mailto:linux-i2c-ow...@vger.kernel.org]
On Behalf Of Tomoya MORINAGA
Sent: Wednesday, October 05, 2011 12:18 AM
To: Jean Delvare; Ben Dooks; Wolfram Sang; Qi Wang; Linus Walleij;
linux-i2c@vger.kernel.org; linux-ker...@vger.kernel.org
Cc: yong.y.w...@intel.com; joel.cl...@intel.com; kok.howg@intel.com;
toshiharu-li...@dsn.lapis-semi.com; Tomoya MORINAGA
Subject: [PATCH 2/7 v2] i2c-eg20t: delete 10bit access processing
Linux I2C core doesn't support 10bit access formally.
Additionally, we can't test with 10bit mode.
This patch deletes the 10bit access processing.
Signed-off-by: Tomoya MORINAGA
---
drivers/i2c/busses/i2c-eg20t.c | 27 +++
1 files changed, 7 insertions(+), 20 deletions(-)
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index f8ccdec..c18210e 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -387,8 +387,6 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,
u8 *buf;
u32 length;
u32 addr;
- u32 addr_2_msb;
- u32 addr_8_lsb;
s32 wrcount;
void __iomem *p = adap->pch_base_address;
@@ -408,25 +406,16 @@ static s32 pch_i2c_writebytes(struct i2c_adapter
*i2c_adap,
}
if (msgs->flags & I2C_M_TEN) {
- addr_2_msb = ((addr & I2C_MSB_2B_MSK) >> 7);
- iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
- if (first)
- pch_i2c_start(adap);
- if (pch_i2c_wait_for_xfer_complete(adap) == 0 &&
- pch_i2c_getack(adap) == 0) {
- addr_8_lsb = (addr & I2C_ADDR_MSK);
- iowrite32(addr_8_lsb, p + PCH_I2CDR);
- } else {
- pch_i2c_stop(adap);
- return -ETIME;
- }
+ pch_err(adap, "10Bit access is not supported\n");
+ return -EINVAL;
} else {
/* set 7 bit slave address and R/W bit as 0 */
iowrite32(addr << 1, p + PCH_I2CDR);
- if (first)
- pch_i2c_start(adap);
}
+ if (first)
+ pch_i2c_start(adap);
+
if ((pch_i2c_wait_for_xfer_complete(adap) == 0) &&
(pch_i2c_getack(adap) == 0)) {
for (wrcount = 0; wrcount < length; ++wrcount) { @@ -495,7
+484,6 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct
i2c_msg *msgs,
u32 count;
u32 length;
u32 addr;
- u32 addr_2_msb;
void __iomem *p = adap->pch_base_address;
length = msgs->len;
@@ -511,9 +499,8 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap,
struct i2c_msg *msgs,
}
if (msgs->flags & I2C_M_TEN) {
- addr_2_msb = (((addr & I2C_MSB_2B_MSK) >> 7) | (I2C_RD));
- iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
-
+ pch_err(adap, "10Bit access is not supported\n");
+ return -EINVAL;
} else {
/* 7 address bits + R/W bit */
addr = (((addr) << 1) | (I2C_RD));
--
1.7.6.4
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Re: [GIT PULL] I2C: OMAP: misc. cleanup for v3.2
Ben Dooks writes: > On Mon, Sep 26, 2011 at 03:30:50PM -0700, Kevin Hilman wrote: >> ping >> >> On 09/06/2011 03:31 PM, Kevin Hilman wrote: >> >Hi Ben, >> > >> >On 08/23/2011 05:10 PM, Kevin Hilman wrote: >> >>Ben, >> >> >> >>Here's one more I2C cleanup series for v3.2. >> >> >> >>It applies on top of my for_3.2/i2c-fixes branch just submitted. >> >> >> >>Please pull into your tree for linux-next. >> > >> >I see you pulled the other two, can you pull this one as well? > > I've tried, but it seems to note that everything is up to date. > > Is this a suitable branch to pull onto latest so I can reset > my next tree? Yes. The i2c-cleanup branch[1] is based on top of the previous two (i2c-andy and i2c-fixes) so if you reset your next-i2c branch and just pull i2c-cleanup, you'll get all three. Kevin [1] git://github.com/khilman/linux-omap-pm.git for_3.2/i2c-cleanup -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
