[PATCH 3/7 v2] i2c-eg20t: Fix 10bit access issue
Reported-by: Jeffrey (Sheng-Hui) Chu
Signed-off-by: Tomoya MORINAGA
---
V2: Update Jeffrey's comments.
---
drivers/i2c/busses/i2c-eg20t.c | 65 ++-
1 files changed, 63 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index 5ecbee0..6ee719c 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -64,6 +64,7 @@
#define TEN_BIT_ADDR_DEFAULT 0xF000
#define TEN_BIT_ADDR_MASK 0xF0
#define PCH_START 0x0020
+#define PCH_RESTART0x0004
#define PCH_ESR_START 0x0001
#define PCH_BUFF_START 0x1
#define PCH_REPSTART 0x0004
@@ -411,7 +412,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,
}
if (msgs->flags & I2C_M_TEN) {
- addr_2_msb = ((addr & I2C_MSB_2B_MSK) >> 7);
+ addr_2_msb = ((addr & I2C_MSB_2B_MSK) >> 7) & 0x06;
iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
if (first)
pch_i2c_start(adap);
@@ -483,6 +484,19 @@ static void pch_i2c_sendnack(struct i2c_algo_pch_data
*adap)
}
/**
+ * pch_i2c_restart() - Generate I2C restart condition in normal mode.
+ * @adap: Pointer to struct i2c_algo_pch_data.
+ *
+ * Generate I2C restart condition in normal mode by setting I2CCTL.I2CRSTA.
+ */
+static void pch_i2c_restart(struct i2c_algo_pch_data *adap)
+{
+ void __iomem *p = adap->pch_base_address;
+ pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
+ pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_RESTART);
+}
+
+/**
* pch_i2c_readbytes() - read data from I2C bus in normal mode.
* @i2c_adap: Pointer to the struct i2c_adapter.
* @msgs: Pointer to i2c_msg structure.
@@ -499,6 +513,7 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap,
struct i2c_msg *msgs,
u32 length;
u32 addr;
u32 addr_2_msb;
+ u32 addr_8_lsb;
void __iomem *p = adap->pch_base_address;
length = msgs->len;
@@ -514,9 +529,55 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap,
struct i2c_msg *msgs,
}
if (msgs->flags & I2C_M_TEN) {
- addr_2_msb = (((addr & I2C_MSB_2B_MSK) >> 7) | (I2C_RD));
+ addr_2_msb = ((addr & I2C_MSB_2B_MSK) >> 7);
iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
+ if (first)
+ pch_i2c_start(adap);
+ rtn = pch_i2c_wait_for_xfer_complete(adap);
+ if (rtn == 0) {
+ if (pch_i2c_getack(adap)) {
+ pch_dbg(adap, "Receive NACK for slave address"
+ "setting\n");
+ return -EIO;
+ }
+ addr_8_lsb = (addr & I2C_ADDR_MSK);
+ iowrite32(addr_8_lsb, p + PCH_I2CDR);
+ } else if (rtn == -EIO) { /* Arbitration Lost */
+ pch_err(adap, "Lost Arbitration\n");
+ pch_clrbit(adap->pch_base_address, PCH_I2CSR,
+ I2CMAL_BIT);
+ pch_clrbit(adap->pch_base_address, PCH_I2CSR,
+ I2CMIF_BIT);
+ pch_i2c_init(adap);
+ return -EAGAIN;
+ } else { /* wait-event timeout */
+ pch_i2c_stop(adap);
+ return -ETIME;
+ }
+ pch_i2c_restart(adap);
+ rtn = pch_i2c_wait_for_xfer_complete(adap);
+ if (rtn == 0) {
+ if (pch_i2c_getack(adap)) {
+ pch_dbg(adap, "Receive NACK for slave address"
+ "setting\n");
+ return -EIO;
+ }
+ addr_2_msb |= I2C_RD;
+ iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK,
+ p + PCH_I2CDR);
+ } else if (rtn == -EIO) { /* Arbitration Lost */
+ pch_err(adap, "Lost Arbitration\n");
+ pch_clrbit(adap->pch_base_address, PCH_I2CSR,
+ I2CMAL_BIT);
+ pch_clrbit(adap->pch_base_address, PCH_I2CSR,
+ I2CMIF_BIT);
+ pch_i2c_init(adap);
+ return -EAGAIN;
+ } else { /* wait-event timeout */
+ pch_i2c_stop(adap);
+ return -ETIME;
+ }
} else {
/* 7 address bits + R/W bit */
addr = (((addr) << 1) | (I2C_RD));
--
1.7.4.4
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[PATCH 4/7 v4] i2c-eg20t: Separate error processing
From: Tomoya MORINAGA
Error processing for NACK or wait-event must be precessed separately.
So divide wait-event error processing into NACK-receiving and timeout.
Add arbitration lost processing.
Signed-off-by: Tomoya MORINAGA
---
drivers/i2c/busses/i2c-eg20t.c | 173 ++-
1 files changed, 115 insertions(+), 58 deletions(-)
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index 6ee719c..0693246 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -394,6 +394,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,
u32 addr_2_msb;
u32 addr_8_lsb;
s32 wrcount;
+ s32 rtn;
void __iomem *p = adap->pch_base_address;
length = msgs->len;
@@ -416,11 +417,25 @@ static s32 pch_i2c_writebytes(struct i2c_adapter
*i2c_adap,
iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
if (first)
pch_i2c_start(adap);
- if (pch_i2c_wait_for_xfer_complete(adap) == 0 &&
- pch_i2c_getack(adap) == 0) {
+
+ rtn = pch_i2c_wait_for_xfer_complete(adap);
+ if (rtn == 0) {
+ if (pch_i2c_getack(adap)) {
+ pch_dbg(adap, "Receive NACK for slave address"
+ "setting\n");
+ return -EIO;
+ }
addr_8_lsb = (addr & I2C_ADDR_MSK);
iowrite32(addr_8_lsb, p + PCH_I2CDR);
- } else {
+ } else if (rtn == -EIO) { /* Arbitration Lost */
+ pch_err(adap, "Lost Arbitration\n");
+ pch_clrbit(adap->pch_base_address, PCH_I2CSR,
+ I2CMAL_BIT);
+ pch_clrbit(adap->pch_base_address, PCH_I2CSR,
+ I2CMIF_BIT);
+ pch_i2c_init(adap);
+ return -EAGAIN;
+ } else { /* wait-event timeout */
pch_i2c_stop(adap);
return -ETIME;
}
@@ -431,30 +446,48 @@ static s32 pch_i2c_writebytes(struct i2c_adapter
*i2c_adap,
pch_i2c_start(adap);
}
- if ((pch_i2c_wait_for_xfer_complete(adap) == 0) &&
- (pch_i2c_getack(adap) == 0)) {
- for (wrcount = 0; wrcount < length; ++wrcount) {
- /* write buffer value to I2C data register */
- iowrite32(buf[wrcount], p + PCH_I2CDR);
- pch_dbg(adap, "writing %x to Data register\n",
- buf[wrcount]);
+ rtn = pch_i2c_wait_for_xfer_complete(adap);
+ if (rtn == 0) {
+ if (pch_i2c_getack(adap)) {
+ pch_dbg(adap, "Receive NACK for slave address"
+ "setting\n");
+ return -EIO;
+ }
+ } else if (rtn == -EIO) { /* Arbitration Lost */
+ pch_err(adap, "Lost Arbitration\n");
+ pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMAL_BIT);
+ pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT);
+ return -EAGAIN;
+ } else { /* wait-event timeout */
+ return -ETIME;
+ }
- if (pch_i2c_wait_for_xfer_complete(adap) != 0)
- return -ETIME;
+ for (wrcount = 0; wrcount < length; ++wrcount) {
+ /* write buffer value to I2C data register */
+ iowrite32(buf[wrcount], p + PCH_I2CDR);
+ pch_dbg(adap, "writing %x to Data register\n", buf[wrcount]);
- if (pch_i2c_getack(adap))
+ rtn = pch_i2c_wait_for_xfer_complete(adap);
+ if (rtn == 0) {
+ if (pch_i2c_getack(adap)) {
+ pch_dbg(adap, "Receive NACK for slave address"
+ "setting\n");
return -EIO;
+ }
+ pch_clrbit(adap->pch_base_address, PCH_I2CSR,
+ I2CMCF_BIT);
+ pch_clrbit(adap->pch_base_address, PCH_I2CSR,
+ I2CMIF_BIT);
+ } else { /* wait-event timeout */
+ return -ETIME;
}
+ }
- /* check if this is the last message */
- if (last)
- pch_i2c_stop(adap);
- else
- pch_i2c_repstart(adap);
- } else {
+ /* check if this is the last message */
+ if (last)
pch_i2c_stop(adap);
- return -EIO;
- }
+ else
+ pch_i2c_repstart(adap);
[PATCH 5/7 v4] i2c-eg20t: add stop sequence in case wait-event timeout occurs
add stop sequence in case wait-event timeout in write processing.
(read processing already had it)
Signed-off-by: Tomoya MORINAGA
---
drivers/i2c/busses/i2c-eg20t.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index 0693246..116708d 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -459,6 +459,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,
pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT);
return -EAGAIN;
} else { /* wait-event timeout */
+ pch_i2c_stop(adap);
return -ETIME;
}
@@ -479,6 +480,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,
pch_clrbit(adap->pch_base_address, PCH_I2CSR,
I2CMIF_BIT);
} else { /* wait-event timeout */
+ pch_i2c_stop(adap);
return -ETIME;
}
}
@@ -635,6 +637,7 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap,
struct i2c_msg *msgs,
pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT);
return -EAGAIN;
} else { /* wait-event timeout */
+ pch_i2c_stop(adap);
return -ETIME;
}
--
1.7.4.4
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[PATCH 7/7 v4] i2c-eg20t: Add initialize processing in case i2c-error occurs
In case disconnecting physical connection,
need to initialize i2c device for retry access.
This patch adds initialize process in case bus-idle fails and Lost arbitration.
Signed-off-by: Tomoya MORINAGA
---
drivers/i2c/busses/i2c-eg20t.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index e25b8eb..5521099 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -292,6 +292,7 @@ static s32 pch_i2c_wait_for_bus_idle(struct
i2c_algo_pch_data *adap,
pch_dbg(adap, "I2CSR = %x\n", ioread32(p + PCH_I2CSR));
pch_err(adap, "%s: Timeout Error.return%d\n", __func__, -ETIME);
+ pch_i2c_init(adap);
return -ETIME;
}
@@ -459,6 +460,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,
pch_err(adap, "Lost Arbitration\n");
pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMAL_BIT);
pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT);
+ pch_i2c_init(adap);
return -EAGAIN;
} else { /* wait-event timeout */
pch_i2c_stop(adap);
@@ -637,6 +639,7 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap,
struct i2c_msg *msgs,
pch_err(adap, "Lost Arbitration\n");
pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMAL_BIT);
pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT);
+ pch_i2c_init(adap);
return -EAGAIN;
} else { /* wait-event timeout */
pch_i2c_stop(adap);
--
1.7.4.4
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[PATCH 1/7 v4] i2c-eg20t: Fix bus-idle waiting issue
Currently, when checking whether bus is idle or not,
if timeout occurs,
this function always returns success(zero).
This patch fixes the issue.
Signed-off-by: Tomoya MORINAGA
---
drivers/i2c/busses/i2c-eg20t.c | 18 +-
1 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index 2ab238b..d1cd304 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -276,23 +276,23 @@ static s32 pch_i2c_wait_for_bus_idle(struct
i2c_algo_pch_data *adap,
s32 timeout)
{
void __iomem *p = adap->pch_base_address;
+ ktime_t ns_val;
+
+ if ((ioread32(p + PCH_I2CSR) & I2CMBB_BIT) == 0)
+ return 0;
/* MAX timeout value is timeout*1000*1000nsec */
- ktime_t ns_val = ktime_add_ns(ktime_get(), timeout*1000*1000);
+ ns_val = ktime_add_ns(ktime_get(), timeout*1000*1000);
do {
- if ((ioread32(p + PCH_I2CSR) & I2CMBB_BIT) == 0)
- break;
msleep(20);
+ if ((ioread32(p + PCH_I2CSR) & I2CMBB_BIT) == 0)
+ return 0;
} while (ktime_lt(ktime_get(), ns_val));
pch_dbg(adap, "I2CSR = %x\n", ioread32(p + PCH_I2CSR));
+ pch_err(adap, "%s: Timeout Error.return%d\n", __func__, -ETIME);
- if (timeout == 0) {
- pch_err(adap, "%s: Timeout Error.return%d\n", __func__, -ETIME);
- return -ETIME;
- }
-
- return 0;
+ return -ETIME;
}
/**
--
1.7.4.4
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[PATCH 6/7 v4] i2c-eg20t: Fix flag setting issue
Currently, in case occurring abnormal event,
internal flag variable(=pch_event_flag) is not reset.
This patch fixes the issue.
Signed-off-by: Tomoya MORINAGA
---
drivers/i2c/busses/i2c-eg20t.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index 116708d..e25b8eb 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -321,11 +321,13 @@ static s32 pch_i2c_wait_for_xfer_complete(struct
i2c_algo_pch_data *adap)
if (ret == 0) {
pch_err(adap, "timeout: %x\n", adap->pch_event_flag);
+ adap->pch_event_flag = 0;
return -ETIMEDOUT;
}
if (adap->pch_event_flag & I2C_ERROR_MASK) {
pch_err(adap, "error bits set: %x\n", adap->pch_event_flag);
+ adap->pch_event_flag = 0;
return -EIO;
}
--
1.7.4.4
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[PATCH 2/7 v4] i2c-eg20t: Modify returned value s32 to long
Type of wait_event_timeout is long not s32.
This patch replaces s32 with long.
Additionally, delete negative processing(ret < 0).
Signed-off-by: Tomoya MORINAGA
---
drivers/i2c/busses/i2c-eg20t.c |6 +-
1 files changed, 1 insertions(+), 5 deletions(-)
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index d1cd304..5ecbee0 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -314,13 +314,9 @@ static void pch_i2c_start(struct i2c_algo_pch_data *adap)
*/
static s32 pch_i2c_wait_for_xfer_complete(struct i2c_algo_pch_data *adap)
{
- s32 ret;
+ long ret;
ret = wait_event_timeout(pch_event,
(adap->pch_event_flag != 0), msecs_to_jiffies(50));
- if (ret < 0) {
- pch_err(adap, "timeout: %x\n", adap->pch_event_flag);
- return ret;
- }
if (ret == 0) {
pch_err(adap, "timeout: %x\n", adap->pch_event_flag);
--
1.7.4.4
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Re: [PATCH] i2c: boilerplate function for byte swapped smbus_write/read_word_data
On 10/11/11 12:49, Jean Delvare wrote: > On Mon, 10 Oct 2011 13:50:14 +0200, Jean Delvare wrote: >> On Mon, 10 Oct 2011 10:07:43 +0100, Jonathan Cameron wrote: >>> Reimplemented at least 17 times discounting error mangling cases >>> where it could be used. >>> >>> Signed-off-by: Jonathan Cameron >>> --- >>> Documentation/i2c/smbus-protocol |8 >>> include/linux/i2c.h | 17 + >>> 2 files changed, 25 insertions(+), 0 deletions(-) >> >> Applied, thanks. > > BTW... I have a patch ready converting all concerned hwmon drivers to > use the new functions. I would appreciate if you could take care of all > other drivers. > > Thanks, Will do. Have IIO patch queued locally. Will get the others covered shortly. -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] i2c: boilerplate function for byte swapped smbus_write/read_word_data
On Mon, 10 Oct 2011 13:50:14 +0200, Jean Delvare wrote: > On Mon, 10 Oct 2011 10:07:43 +0100, Jonathan Cameron wrote: > > Reimplemented at least 17 times discounting error mangling cases > > where it could be used. > > > > Signed-off-by: Jonathan Cameron > > --- > > Documentation/i2c/smbus-protocol |8 > > include/linux/i2c.h | 17 + > > 2 files changed, 25 insertions(+), 0 deletions(-) > > Applied, thanks. BTW... I have a patch ready converting all concerned hwmon drivers to use the new functions. I would appreciate if you could take care of all other drivers. Thanks, -- Jean Delvare -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH RESEND] drivers: i2c: s3c2410: add support for HDMIPHY dedicated controller
Marek Szyprowski wrote:
>
> From: Tomasz Stanislawski
>
> This patch adds support for I2C HDMIPHY dedicated controller. It has
> different timeout handling and reset conditions.
>
> Signed-off-by: Tomasz Stanislawski
> Signed-off-by: Kyungmin Park
> Signed-off-by: Marek Szyprowski
Acked-by: Kukjin Kim
Hi Ben,
If you're ok with this, please apply this to go to upstream via your i2c
tree.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim , Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
> ---
> drivers/i2c/busses/i2c-s3c2410.c | 36
> +++-
> 1 files changed, 35 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-s3c2410.c
b/drivers/i2c/busses/i2c-s3c2410.c
> index f84a63c..e456cf9 100644
> --- a/drivers/i2c/busses/i2c-s3c2410.c
> +++ b/drivers/i2c/busses/i2c-s3c2410.c
> @@ -54,6 +54,7 @@ enum s3c24xx_i2c_state {
> enum s3c24xx_i2c_type {
> TYPE_S3C2410,
> TYPE_S3C2440,
> + TYPE_S3C2440_HDMIPHY,
> };
>
> struct s3c24xx_i2c {
> @@ -96,7 +97,21 @@ static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c
*i2c)
> enum s3c24xx_i2c_type type;
>
> type = platform_get_device_id(pdev)->driver_data;
> - return type == TYPE_S3C2440;
> + return type == TYPE_S3C2440 || type == TYPE_S3C2440_HDMIPHY;
> +}
> +
> +/* s3c24xx_i2c_is2440_hdmiphy()
> + *
> + * return true is this is an s3c2440 dedicated for HDMIPHY interface
> +*/
> +
> +static inline int s3c24xx_i2c_is2440_hdmiphy(struct s3c24xx_i2c *i2c)
> +{
> + struct platform_device *pdev = to_platform_device(i2c->dev);
> + enum s3c24xx_i2c_type type;
> +
> + type = platform_get_device_id(pdev)->driver_data;
> + return type == TYPE_S3C2440_HDMIPHY;
> }
>
> /* s3c24xx_i2c_master_complete
> @@ -460,6 +475,13 @@ static int s3c24xx_i2c_set_master(struct s3c24xx_i2c
*i2c)
> unsigned long iicstat;
> int timeout = 400;
>
> + /* if hang-up of HDMIPHY occured reduce timeout
> + * The controller will work after reset, so waiting
> + * 400 ms will cause unneccessary system hangup
> + */
> + if (s3c24xx_i2c_is2440_hdmiphy(i2c))
> + timeout = 10;
> +
> while (timeout-- > 0) {
> iicstat = readl(i2c->regs + S3C2410_IICSTAT);
>
> @@ -469,6 +491,15 @@ static int s3c24xx_i2c_set_master(struct s3c24xx_i2c
*i2c)
> msleep(1);
> }
>
> + /* hang-up of bus dedicated for HDMIPHY occured, resetting */
> + if (s3c24xx_i2c_is2440_hdmiphy(i2c)) {
> + writel(0, i2c->regs + S3C2410_IICCON);
> + writel(0, i2c->regs + S3C2410_IICSTAT);
> + writel(0, i2c->regs + S3C2410_IICDS);
> +
> + return 0;
> + }
> +
> return -ETIMEDOUT;
> }
>
> @@ -1008,6 +1039,9 @@ static struct platform_device_id
s3c24xx_driver_ids[] = {
> }, {
> .name = "s3c2440-i2c",
> .driver_data= TYPE_S3C2440,
> + }, {
> + .name = "s3c2440-hdmiphy-i2c",
> + .driver_data= TYPE_S3C2440_HDMIPHY,
> }, { },
> };
> MODULE_DEVICE_TABLE(platform, s3c24xx_driver_ids);
> --
> 1.7.1.569.g6f426
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