Re: [PATCH 2/2] MXS: Implement DMA support into mxs-i2c
On Sun, May 27, 2012 at 04:10:56AM +0200, Marek Vasut wrote:
> This patch implements DMA support into mxs-i2c. DMA transfers are now enabled
> via DT. The DMA operation is enabled by default.
>
> Signed-off-by: Marek Vasut
> Cc: Detlev Zundel
> CC: Dong Aisheng
> CC: Fabio Estevam
> Cc: Linux ARM kernel
> Cc: linux-i2c@vger.kernel.org
> CC: Sascha Hauer
> CC: Shawn Guo
> Cc: Stefano Babic
> CC: Uwe Kleine-König
> Cc: Wolfgang Denk
> Cc: Wolfram Sang
> ---
> Documentation/devicetree/bindings/i2c/i2c-mxs.txt |3 +
> arch/arm/boot/dts/imx28.dtsi |2 +
> drivers/i2c/busses/i2c-mxs.c | 268
> +++--
> 3 files changed, 251 insertions(+), 22 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
> b/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
> index 790b5c6..f4b6244 100644
> --- a/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
> +++ b/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
> @@ -6,6 +6,9 @@ Required properties:
> - interrupts: Should contain ERROR and DMA interrupts
> - speed: Speed of the bus in kHz (400 or 100 are supported)
>
> +Optional properties:
> +- use-pio: Use PIO transfers instead of DMA, useful for debug
It should be "fsl,use-pio" which is the one used in code?
> +
> Examples:
>
> i2c0: i2c@80058000 {
> diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
> index d927155..d470276 100644
> --- a/arch/arm/boot/dts/imx28.dtsi
> +++ b/arch/arm/boot/dts/imx28.dtsi
> @@ -381,6 +381,7 @@
> compatible = "fsl,imx28-i2c";
> reg = <0x80058000 2000>;
> interrupts = <111 68>;
> + fsl,i2c-dma-channel = <6>;
You may need to document this property in binding doc as well.
> fsl,speed = <400>;
> status = "disabled";
> };
> @@ -391,6 +392,7 @@
> compatible = "fsl,imx28-i2c";
> reg = <0x8005a000 2000>;
> interrupts = <110 69>;
> + fsl,i2c-dma-channel = <7>;
> fsl,speed = <400>;
> status = "disabled";
> };
--
Regards,
Shawn
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Re: [PATCH 1/2] MXS: Set I2C timing registers for mxs-i2c
Welcome to mxs device tree, Marek :)
On Sun, May 27, 2012 at 04:10:55AM +0200, Marek Vasut wrote:
> This patch configures the I2C bus timing registers according
> to information passed via DT. Currently, 100kHz and 400kHz
> modes are supported.
>
> Signed-off-by: Marek Vasut
> Cc: Detlev Zundel
> CC: Dong Aisheng
> CC: Fabio Estevam
> Cc: Linux ARM kernel
> Cc: linux-i2c@vger.kernel.org
> CC: Sascha Hauer
> CC: Shawn Guo
> Cc: Stefano Babic
> CC: Uwe Kleine-König
> Cc: Wolfgang Denk
> Cc: Wolfram Sang
> ---
> Documentation/devicetree/bindings/i2c/i2c-mxs.txt |1 +
> arch/arm/boot/dts/imx28.dtsi |2 +
> drivers/i2c/busses/i2c-mxs.c | 64
> +
> 3 files changed, 67 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
> b/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
> index 1bfc02d..790b5c6 100644
> --- a/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
> +++ b/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
> @@ -4,6 +4,7 @@ Required properties:
> - compatible: Should be "fsl,-i2c"
> - reg: Should contain registers location and length
> - interrupts: Should contain ERROR and DMA interrupts
> +- speed: Speed of the bus in kHz (400 or 100 are supported)
>
> Examples:
>
> diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
> index 4634cb8..d927155 100644
> --- a/arch/arm/boot/dts/imx28.dtsi
> +++ b/arch/arm/boot/dts/imx28.dtsi
> @@ -381,6 +381,7 @@
> compatible = "fsl,imx28-i2c";
> reg = <0x80058000 2000>;
> interrupts = <111 68>;
> + fsl,speed = <400>;
> status = "disabled";
> };
>
> @@ -390,6 +391,7 @@
> compatible = "fsl,imx28-i2c";
> reg = <0x8005a000 2000>;
> interrupts = <110 69>;
> + fsl,speed = <400>;
> status = "disabled";
> };
>
> diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c
> index 04eb441..fff0a09 100644
> --- a/drivers/i2c/busses/i2c-mxs.c
> +++ b/drivers/i2c/busses/i2c-mxs.c
> @@ -46,6 +46,10 @@
> #define MXS_I2C_CTRL0_DIRECTION 0x0001
> #define MXS_I2C_CTRL0_XFER_COUNT(v) ((v) & 0x)
>
> +#define MXS_I2C_TIMING0 (0x10)
> +#define MXS_I2C_TIMING1 (0x20)
> +#define MXS_I2C_TIMING2 (0x30)
> +
> #define MXS_I2C_CTRL1(0x40)
> #define MXS_I2C_CTRL1_SET(0x44)
> #define MXS_I2C_CTRL1_CLR(0x48)
> @@ -97,6 +101,24 @@
> #define MXS_CMD_I2C_READ (MXS_I2C_CTRL0_SEND_NAK_ON_LAST | \
>MXS_I2C_CTRL0_MASTER_MODE)
>
> +struct mxs_i2c_speed_config {
> + uint32_ttiming0;
> + uint32_ttiming1;
> + uint32_ttiming2;
> +};
> +
> +const struct mxs_i2c_speed_config mxs_i2c_95kHz_config = {
> + .timing0= 0x00780030,
> + .timing1= 0x00800030,
> + .timing2= 0x0015000d,
> +};
> +
> +const struct mxs_i2c_speed_config mxs_i2c_400kHz_config = {
> + .timing0= 0x000f0007,
> + .timing1= 0x001f000f,
> + .timing2= 0x0015000d,
> +};
> +
> /**
> * struct mxs_i2c_dev - per device, private MXS-I2C data
> *
> @@ -112,11 +134,17 @@ struct mxs_i2c_dev {
> struct completion cmd_complete;
> u32 cmd_err;
> struct i2c_adapter adapter;
> + const struct mxs_i2c_speed_config *speed;
> };
>
> static void mxs_i2c_reset(struct mxs_i2c_dev *i2c)
> {
> stmp_reset_block(i2c->regs);
> +
> + writel(i2c->speed->timing0, i2c->regs + MXS_I2C_TIMING0);
> + writel(i2c->speed->timing1, i2c->regs + MXS_I2C_TIMING1);
> + writel(i2c->speed->timing2, i2c->regs + MXS_I2C_TIMING2);
> +
> writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET);
> writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE,
> i2c->regs + MXS_I2C_QUEUECTRL_SET);
> @@ -319,6 +347,38 @@ static const struct i2c_algorithm mxs_i2c_algo = {
> .functionality = mxs_i2c_func,
> };
>
> +#ifdef CONFIG_OF
We already force ARCH_MXS to select USE_OF while I2C_MXS only depends
on SOC_IMX28, so this #ifdef is not really needed?
> +static int mxs_i2c_get_ofdata(struct platform_device *pdev,
> + struct mxs_i2c_dev *i2c)
> +{
> + const __be32 *speed;
> + uint32_t speed_khz;
> + struct device_node *node = pdev->dev.of_node;
> +
> + if (!node)
> + return -EINVAL;
> +
> + i2c->speed = &mxs_i2c_95kHz_config;
> + speed = of_get_property(node, "fsl,speed", NULL);
> + if (!speed)
> + dev_warn(&pdev->dev,
> + "No I2C speed selected, using 100kHz\n");
> +
> + speed_k
Re: [PATCH 0/4] i2c: tegra: Bug fixes, cleanups and M_NOSTART support
On Tuesday 05 June 2012 09:44 PM, Stephen Warren wrote: On 06/05/2012 07:09 AM, Laxman Dewangan wrote: This patch series having the: - Handling of late register write due to Tegra PPSB design. - support for I2C_M_NOSTART - Use devm_* for all allocation. The series, Acked-by: Stephen Warren Note that patch 4 touches context adjacent to Prashant's "i2c: tegra: Add clk_prepare/clk_unprepare" patch, which I hope to take through the Tegra tree since it's a requirement for the Tegra common clock conversion. I don't think this will cause any significant conflict, but perhaps it's worth resolving it explicitly. Wolfram, perhaps we should put these 4 patches and Prashan'ts into their own topic branch so that you can merge it into the I2C tree, and I can merge it into the Tegra tree too? Or, I can take everything through Tegra if you want, and ack it. Laxman, do you expect any more I2C-related changes this kernel cycle? I have two more changes in plan: -I2c controller require two clock source and the fixes towards that. This can go on Tegra tree as changes are require in mach-tegra/tegra30_clock.c, tegra20_clock.c files also. - Run time PM support but can be done later. -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PULL REQUEST] i2c-embedded for 3.5-rc2
Linus, here is a pull request which only contains one new driver which had multiple dependencies (pinctrl, i2c-mux-rework, new devm_* functions), so I decided to wait for rc1. Plus, it had to wait a little for the ack of a devicetree-maintainer since the bindings were not trivial enough for me to pass through. So, given that, I hope there is still something like the "new driver rule", so we could have the driver in 3.5 and people can start using it. That would make merging support for some boards easier for 3.6 since the dependency on this driver is gone then. Thanks, Wolfram The following changes since commit f8f5701bdaf9134b1f90e5044a82c66324d2073f: Linux 3.5-rc1 (2012-06-02 18:29:26 -0700) are available in the git repository at: git://git.pengutronix.de/git/wsa/linux.git i2c-embedded/for-current for you to fetch changes up to ae58d1e406986f31d1e88b32f5ac601506c196d8: i2c: Add generic I2C multiplexer using pinctrl API (2012-06-04 16:49:43 +0200) Stephen Warren (1): i2c: Add generic I2C multiplexer using pinctrl API .../devicetree/bindings/i2c/i2c-mux-pinctrl.txt| 93 +++ drivers/i2c/muxes/Kconfig | 12 + drivers/i2c/muxes/Makefile |1 + drivers/i2c/muxes/i2c-mux-pinctrl.c| 279 include/linux/i2c-mux-pinctrl.h| 41 +++ 5 files changed, 426 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.txt create mode 100644 drivers/i2c/muxes/i2c-mux-pinctrl.c create mode 100644 include/linux/i2c-mux-pinctrl.h -- Pengutronix e.K. | Wolfram Sang| Industrial Linux Solutions | http://www.pengutronix.de/ | signature.asc Description: Digital signature
Re: [PATCH 0/4] i2c: tegra: Bug fixes, cleanups and M_NOSTART support
On 06/05/2012 07:09 AM, Laxman Dewangan wrote: > This patch series having the: > - Handling of late register write due to Tegra PPSB design. > - support for I2C_M_NOSTART > - Use devm_* for all allocation. The series, Acked-by: Stephen Warren Note that patch 4 touches context adjacent to Prashant's "i2c: tegra: Add clk_prepare/clk_unprepare" patch, which I hope to take through the Tegra tree since it's a requirement for the Tegra common clock conversion. I don't think this will cause any significant conflict, but perhaps it's worth resolving it explicitly. Wolfram, perhaps we should put these 4 patches and Prashan'ts into their own topic branch so that you can merge it into the I2C tree, and I can merge it into the Tegra tree too? Or, I can take everything through Tegra if you want, and ack it. Laxman, do you expect any more I2C-related changes this kernel cycle? -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 4/4] i2c: i2c-ocores: support for 16bit and 32bit IO
From: Ganesan Ramalingam
Some architectures supports only 16-bit or 32-bit read/write access to
their IO space. Add a 'reg-io-width' platform and OF parameter which
specifies the IO width to support these platforms.
reg-io-width can be specified as 1, 2 or 4, and has a default value
of 1 if it is unspecified.
Signed-off-by: Ganesan Ramalingam
Signed-off-by: Jayachandran C
---
.../devicetree/bindings/i2c/i2c-ocores.txt |2 ++
drivers/i2c/busses/i2c-ocores.c| 21 ++--
include/linux/i2c-ocores.h |1 +
3 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
index 1c9334b..c15781f 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
@@ -10,6 +10,7 @@ Required properties:
Optional properties:
- reg-shift : device register offsets are shifted by this value
+- reg-io-width: io register width in bytes (1, 2 or 4)
- regstep : deprecated, use reg-shift above
Example:
@@ -23,6 +24,7 @@ Example:
clock-frequency = <2000>;
reg-shift = <0>;/* 8 bit registers */
+ reg-io-width = <1>; /* 8 bit read/write */
dummy@60 {
compatible = "dummy";
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index 9617ec1..034d1d5 100644
--- a/drivers/i2c/busses/i2c-ocores.c
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -30,6 +30,7 @@
struct ocores_i2c {
void __iomem *base;
int reg_shift;
+ int reg_io_width;
wait_queue_head_t wait;
struct i2c_adapter adap;
struct i2c_msg *msg;
@@ -72,12 +73,22 @@ struct ocores_i2c {
static inline void oc_setreg(struct ocores_i2c *i2c, int reg, u8 value)
{
- iowrite8(value, i2c->base + (reg << i2c->reg_shift));
+ if (i2c->reg_io_width == 4)
+ iowrite32(value, i2c->base + (reg << i2c->reg_shift));
+ else if (i2c->reg_io_width == 2)
+ iowrite16(value, i2c->base + (reg << i2c->reg_shift));
+ else
+ iowrite8(value, i2c->base + (reg << i2c->reg_shift));
}
static inline u8 oc_getreg(struct ocores_i2c *i2c, int reg)
{
- return ioread8(i2c->base + (reg << i2c->reg_shift));
+ if (i2c->reg_io_width == 4)
+ return ioread32(i2c->base + (reg << i2c->reg_shift));
+ else if (i2c->reg_io_width == 2)
+ return ioread16(i2c->base + (reg << i2c->reg_shift));
+ else
+ return ioread8(i2c->base + (reg << i2c->reg_shift));
}
static void ocores_process(struct ocores_i2c *i2c)
@@ -244,6 +255,8 @@ static int ocores_i2c_of_probe(struct platform_device *pdev,
}
i2c->clock_khz = val / 1000;
+ of_property_read_u32(pdev->dev.of_node, "reg-io-width",
+ &i2c->reg_io_width);
return 0;
}
#else
@@ -286,6 +299,7 @@ static int __devinit ocores_i2c_probe(struct
platform_device *pdev)
pdata = pdev->dev.platform_data;
if (pdata) {
i2c->reg_shift = pdata->reg_shift;
+ i2c->reg_io_width = pdata->reg_io_width;
i2c->clock_khz = pdata->clock_khz;
} else {
ret = ocores_i2c_of_probe(pdev, i2c);
@@ -293,6 +307,9 @@ static int __devinit ocores_i2c_probe(struct
platform_device *pdev)
return ret;
}
+ if (i2c->reg_io_width == 0)
+ i2c->reg_io_width = 1; /* Set to default value */
+
ocores_init(i2c);
init_waitqueue_head(&i2c->wait);
diff --git a/include/linux/i2c-ocores.h b/include/linux/i2c-ocores.h
index bb58c7d..1d99ebd 100644
--- a/include/linux/i2c-ocores.h
+++ b/include/linux/i2c-ocores.h
@@ -13,6 +13,7 @@
struct ocores_i2c_platform_data {
u32 reg_shift; /* register offset shift value */
+ u32 reg_io_width; /* register io read/write width */
u32 clock_khz; /* input clock in kHz */
u8 num_devices; /* number of devices in the devices list */
struct i2c_board_info const *devices; /* devices connected to the bus */
--
1.7.9.5
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[PATCH 3/4] V4L/DVB: mfd: use reg_shift instead of regstep
Update for change in i2c-ocores.h which uses reg_shift to
specify the register offset shifts instead of regstep.
Signed-off-by: Jayachandran C
---
drivers/mfd/timberdale.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mfd/timberdale.c b/drivers/mfd/timberdale.c
index 0ba26fb..a447f4e 100644
--- a/drivers/mfd/timberdale.c
+++ b/drivers/mfd/timberdale.c
@@ -83,7 +83,7 @@ timberdale_xiic_platform_data = {
static __devinitdata struct ocores_i2c_platform_data
timberdale_ocores_platform_data = {
- .regstep = 4,
+ .reg_shift = 2,
.clock_khz = 62500,
.devices = timberdale_i2c_board_info,
.num_devices = ARRAY_SIZE(timberdale_i2c_board_info)
--
1.7.9.5
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[PATCH 2/4] i2c: i2c-ocores: Use reg-shift property
From: Ganesan Ramalingam
Deprecate 'regstep' property and use the standard 'reg-shift' property
for register offset shifts. 'regstep' will still be supported as an
optional property, but will give a warning when used.
Signed-off-by: Ganesan Ramalingam
Signed-off-by: Jayachandran C
---
.../devicetree/bindings/i2c/i2c-ocores.txt |8 +++--
drivers/i2c/busses/i2c-ocores.c| 36
include/linux/i2c-ocores.h |6 ++--
3 files changed, 31 insertions(+), 19 deletions(-)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
index bfec894..1c9334b 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
@@ -4,11 +4,14 @@ Required properties:
- compatible : "opencores,i2c-ocores"
- reg : bus address start and address range size of device
- interrupts : interrupt number
-- regstep : size of device registers in bytes
- clock-frequency : frequency of bus clock in Hz
- #address-cells : should be <1>
- #size-cells : should be <0>
+Optional properties:
+- reg-shift : device register offsets are shifted by this value
+- regstep : deprecated, use reg-shift above
+
Example:
i2c0: ocores@a000 {
@@ -17,9 +20,10 @@ Example:
compatible = "opencores,i2c-ocores";
reg = <0xa000 0x8>;
interrupts = <10>;
- regstep = <1>;
clock-frequency = <2000>;
+ reg-shift = <0>;/* 8 bit registers */
+
dummy@60 {
compatible = "dummy";
reg = <0x60>;
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index e8159db..9617ec1 100644
--- a/drivers/i2c/busses/i2c-ocores.c
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -25,10 +25,11 @@
#include
#include
#include
+#include
struct ocores_i2c {
void __iomem *base;
- int regstep;
+ int reg_shift;
wait_queue_head_t wait;
struct i2c_adapter adap;
struct i2c_msg *msg;
@@ -71,12 +72,12 @@ struct ocores_i2c {
static inline void oc_setreg(struct ocores_i2c *i2c, int reg, u8 value)
{
- iowrite8(value, i2c->base + reg * i2c->regstep);
+ iowrite8(value, i2c->base + (reg << i2c->reg_shift));
}
static inline u8 oc_getreg(struct ocores_i2c *i2c, int reg)
{
- return ioread8(i2c->base + reg * i2c->regstep);
+ return ioread8(i2c->base + (reg << i2c->reg_shift));
}
static void ocores_process(struct ocores_i2c *i2c)
@@ -219,22 +220,29 @@ static struct i2c_adapter ocores_adapter = {
static int ocores_i2c_of_probe(struct platform_device *pdev,
struct ocores_i2c *i2c)
{
- const __be32* val;
-
- val = of_get_property(pdev->dev.of_node, "regstep", NULL);
- if (!val) {
- dev_err(&pdev->dev, "Missing required parameter 'regstep'\n");
- return -ENODEV;
+ struct device_node *np = pdev->dev.of_node;
+ u32 val;
+
+ if (of_property_read_u32(np, "reg-shift", &i2c->reg_shift)) {
+ /* no 'reg-shift', check for deprecated 'regstep' */
+ if (!of_property_read_u32(np, "regstep", &val)) {
+ if (!is_power_of_2(val)) {
+ dev_err(&pdev->dev, "invalid regstep %d\n",
+ val);
+ return -EINVAL;
+ }
+ i2c->reg_shift = ilog2(val);
+ dev_warn(&pdev->dev,
+ "regstep property deprecated, use reg-shift\n");
+ }
}
- i2c->regstep = be32_to_cpup(val);
- val = of_get_property(pdev->dev.of_node, "clock-frequency", NULL);
- if (!val) {
+ if (of_property_read_u32(np, "clock-frequency", &val)) {
dev_err(&pdev->dev,
"Missing required parameter 'clock-frequency'\n");
return -ENODEV;
}
- i2c->clock_khz = be32_to_cpup(val) / 1000;
+ i2c->clock_khz = val / 1000;
return 0;
}
@@ -277,7 +285,7 @@ static int __devinit ocores_i2c_probe(struct
platform_device *pdev)
pdata = pdev->dev.platform_data;
if (pdata) {
- i2c->regstep = pdata->regstep;
+ i2c->reg_shift = pdata->reg_shift;
i2c->clock_khz = pdata->clock_khz;
} else {
ret = ocores_i2c_of_probe(pdev, i2c);
diff --git a/include/linux/i2c-ocores.h b/include/linux/i2c-ocores.h
index 4d5e57f..bb58c7d 100644
--- a/include/linux/i2c-ocores.h
+++ b/include/linux/i2c-ocores.h
@@ -12,9 +12,9 @@
#define _LINUX_I2C_OCORES_H
struct ocores_i2c_platform_data {
- u32 regstep; /* distance between register
[PATCH 1/4] i2c: i2c-ocores - DT bindings and minor fixes.
Cleanups to i2c-cores, no change in logic, changes are:
* Move i2c-ocores device tree documentation from source file to
Documentation/devicetree/bindings/i2c/i2c-ocores.txt.
* Add \n to dev_warn and dev_err messages where missing
* Minor updates to the text and formatting fixes.
Signed-off-by: Jayachandran C
---
.../devicetree/bindings/i2c/i2c-ocores.txt | 27
drivers/i2c/busses/i2c-ocores.c| 45 +++-
2 files changed, 34 insertions(+), 38 deletions(-)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-ocores.txt
diff --git a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
new file mode 100644
index 000..bfec894
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
@@ -0,0 +1,27 @@
+Device tree configuration for i2c-ocores
+
+Required properties:
+- compatible : "opencores,i2c-ocores"
+- reg : bus address start and address range size of device
+- interrupts : interrupt number
+- regstep : size of device registers in bytes
+- clock-frequency : frequency of bus clock in Hz
+- #address-cells : should be <1>
+- #size-cells : should be <0>
+
+Example:
+
+ i2c0: ocores@a000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "opencores,i2c-ocores";
+ reg = <0xa000 0x8>;
+ interrupts = <10>;
+ regstep = <1>;
+ clock-frequency = <2000>;
+
+ dummy@60 {
+ compatible = "dummy";
+ reg = <0x60>;
+ };
+ };
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index 75194c5..e8159db 100644
--- a/drivers/i2c/busses/i2c-ocores.c
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -10,40 +10,9 @@
*/
/*
- * Device tree configuration:
- *
- * Required properties:
- * - compatible : "opencores,i2c-ocores"
- * - reg : bus address start and address range size of device
- * - interrupts : interrupt number
- * - regstep : size of device registers in bytes
- * - clock-frequency : frequency of bus clock in Hz
- *
- * Example:
- *
- * i2c0: ocores@a000 {
- * compatible = "opencores,i2c-ocores";
- * reg = <0xa000 0x8>;
- * interrupts = <10>;
- *
- * regstep = <1>;
- * clock-frequency = <2000>;
- *
- * -- Devices connected on this I2C bus get
- * -- defined here; address- and size-cells
- * -- apply to these child devices
- *
- * #address-cells = <1>;
- * #size-cells = <0>;
- *
- * dummy@60 {
- * compatible = "dummy";
- * reg = <60>;
- * };
- * };
- *
+ * This driver can be used from the device tree, see
+ * Documentation/devicetree/bindings/i2c/ocore-i2c.txt
*/
-
#include
#include
#include
@@ -247,14 +216,14 @@ static struct i2c_adapter ocores_adapter = {
};
#ifdef CONFIG_OF
-static int ocores_i2c_of_probe(struct platform_device* pdev,
- struct ocores_i2c* i2c)
+static int ocores_i2c_of_probe(struct platform_device *pdev,
+ struct ocores_i2c *i2c)
{
const __be32* val;
val = of_get_property(pdev->dev.of_node, "regstep", NULL);
if (!val) {
- dev_err(&pdev->dev, "Missing required parameter 'regstep'");
+ dev_err(&pdev->dev, "Missing required parameter 'regstep'\n");
return -ENODEV;
}
i2c->regstep = be32_to_cpup(val);
@@ -262,7 +231,7 @@ static int ocores_i2c_of_probe(struct platform_device* pdev,
val = of_get_property(pdev->dev.of_node, "clock-frequency", NULL);
if (!val) {
dev_err(&pdev->dev,
- "Missing required parameter 'clock-frequency'");
+ "Missing required parameter 'clock-frequency'\n");
return -ENODEV;
}
i2c->clock_khz = be32_to_cpup(val) / 1000;
@@ -351,7 +320,7 @@ static int __devinit ocores_i2c_probe(struct
platform_device *pdev)
return 0;
}
-static int __devexit ocores_i2c_remove(struct platform_device* pdev)
+static int __devexit ocores_i2c_remove(struct platform_device *pdev)
{
struct ocores_i2c *i2c = platform_get_drvdata(pdev);
--
1.7.9.5
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[PATCH 0/4] I2C Ocores updates
[devicetree-disc...@ozlabs.org copied since most of the changes are device tree related] While trying to add reg-io-width property to i2c-ocores, we noticed a few things that needs to fixed up in i2c-ocores device tree code. The changes are to: * use the standard 'reg-shift' property instead of 'regstep' * fix the fallout of the about change in drivers/mfd/timberdale.c * move bindings documentation to under Documentation/, * fix up formatting, and add \n to a few dev_* messages, * and finally to add reg-io-width optional property. Regards, JC. Ganesan Ramalingam (2): i2c: i2c-ocores: Use reg-shift property i2c: i2c-ocores: support for 16bit and 32bit IO Jayachandran C (2): i2c: i2c-ocores - DT bindings and minor fixes. V4L/DVB: mfd: use reg_shift instead of regstep .../devicetree/bindings/i2c/i2c-ocores.txt | 33 +++ drivers/i2c/busses/i2c-ocores.c| 96 +--- drivers/mfd/timberdale.c |2 +- include/linux/i2c-ocores.h |7 +- 4 files changed, 83 insertions(+), 55 deletions(-) create mode 100644 Documentation/devicetree/bindings/i2c/i2c-ocores.txt -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/4] i2c: tegra: make sure register writes completes
The Tegra PPSB (an peripheral bus) queues writes transactions.
In order to guarantee that writes have completed before a
certain time, a read transaction to a register on the same
bus must be executed.
This is necessary in situations such as when clearing an
interrupt status or enable, so that when returning from an
interrupt handler, the HW has already de-asserted its
interrupt status output, which will avoid spurious interrupts.
Signed-off-by: Laxman Dewangan
---
drivers/i2c/busses/i2c-tegra.c | 13 +
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index 8b2e555..fa92396 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -430,6 +430,13 @@ static irqreturn_t tegra_i2c_isr(int irq, void *dev_id)
if (i2c_dev->is_dvc)
dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS);
+ /*
+* Register write get queued in the PPSB bus and write can
+* happen later. Read back register to make sure that register
+* write is completed.
+*/
+ i2c_readl(i2c_dev, I2C_INT_STATUS);
+
if (status & I2C_INT_PACKET_XFER_COMPLETE) {
BUG_ON(i2c_dev->msg_buf_remaining);
complete(&i2c_dev->msg_complete);
@@ -444,6 +451,9 @@ err:
if (i2c_dev->is_dvc)
dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS);
+ /* Read back register to make sure that register writes completed */
+ i2c_readl(i2c_dev, I2C_INT_STATUS);
+
complete(&i2c_dev->msg_complete);
return IRQ_HANDLED;
}
@@ -505,6 +515,9 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
ret = wait_for_completion_timeout(&i2c_dev->msg_complete,
TEGRA_I2C_TIMEOUT);
tegra_i2c_mask_irq(i2c_dev, int_mask);
+ /* Read back register to make sure that register writes completed */
+ i2c_readl(i2c_dev, I2C_INT_MASK);
+
if (WARN_ON(ret == 0)) {
dev_err(i2c_dev->dev, "i2c transfer timed out\n");
--
1.7.1.1
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[PATCH 4/4] i2c: tegra: make all resource allocation through devm_*
Use the devm_* for the memory region allocation, interrupt request,
clock handler request.
By doing this, it does not require to explicitly free it and hence
saving some code.
Signed-off-by: Laxman Dewangan
---
This is rebased of earlier similar patch and sending as
part of this series.
drivers/i2c/busses/i2c-tegra.c | 62 +++-
1 files changed, 17 insertions(+), 45 deletions(-)
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index 4cc9594..6745631 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -607,7 +607,6 @@ static int __devinit tegra_i2c_probe(struct platform_device
*pdev)
struct tegra_i2c_dev *i2c_dev;
struct tegra_i2c_platform_data *pdata = pdev->dev.platform_data;
struct resource *res;
- struct resource *iomem;
struct clk *clk;
struct clk *i2c_clk;
const unsigned int *prop;
@@ -620,50 +619,41 @@ static int __devinit tegra_i2c_probe(struct
platform_device *pdev)
dev_err(&pdev->dev, "no mem resource\n");
return -EINVAL;
}
- iomem = request_mem_region(res->start, resource_size(res), pdev->name);
- if (!iomem) {
- dev_err(&pdev->dev, "I2C region already claimed\n");
- return -EBUSY;
- }
- base = ioremap(iomem->start, resource_size(iomem));
+ base = devm_request_and_ioremap(&pdev->dev, res);
if (!base) {
- dev_err(&pdev->dev, "Cannot ioremap I2C region\n");
- return -ENOMEM;
+ dev_err(&pdev->dev, "Cannot request/ioremap I2C registers\n");
+ return -EADDRNOTAVAIL;
}
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!res) {
dev_err(&pdev->dev, "no irq resource\n");
- ret = -EINVAL;
- goto err_iounmap;
+ return -EINVAL;
}
irq = res->start;
- clk = clk_get(&pdev->dev, NULL);
+ clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(clk)) {
dev_err(&pdev->dev, "missing controller clock");
- ret = PTR_ERR(clk);
- goto err_release_region;
+ return PTR_ERR(clk);
}
- i2c_clk = clk_get(&pdev->dev, "i2c");
+ i2c_clk = devm_clk_get(&pdev->dev, "i2c");
if (IS_ERR(i2c_clk)) {
dev_err(&pdev->dev, "missing bus clock");
- ret = PTR_ERR(i2c_clk);
- goto err_clk_put;
+ return PTR_ERR(i2c_clk);
}
- i2c_dev = kzalloc(sizeof(struct tegra_i2c_dev), GFP_KERNEL);
+ i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
if (!i2c_dev) {
- ret = -ENOMEM;
- goto err_i2c_clk_put;
+ dev_err(&pdev->dev, "Could not allocate struct tegra_i2c_dev");
+ return -ENOMEM;
}
i2c_dev->base = base;
i2c_dev->clk = clk;
i2c_dev->i2c_clk = i2c_clk;
- i2c_dev->iomem = iomem;
i2c_dev->adapter.algo = &tegra_i2c_algo;
i2c_dev->irq = irq;
i2c_dev->cont_id = pdev->id;
@@ -692,13 +682,14 @@ static int __devinit tegra_i2c_probe(struct
platform_device *pdev)
ret = tegra_i2c_init(i2c_dev);
if (ret) {
dev_err(&pdev->dev, "Failed to initialize i2c controller");
- goto err_free;
+ return ret;
}
- ret = request_irq(i2c_dev->irq, tegra_i2c_isr, 0, pdev->name, i2c_dev);
+ ret = devm_request_irq(&pdev->dev, i2c_dev->irq,
+ tegra_i2c_isr, 0, pdev->name, i2c_dev);
if (ret) {
dev_err(&pdev->dev, "Failed to request irq %i\n", i2c_dev->irq);
- goto err_free;
+ return ret;
}
clk_enable(i2c_dev->i2c_clk);
@@ -716,38 +707,19 @@ static int __devinit tegra_i2c_probe(struct
platform_device *pdev)
ret = i2c_add_numbered_adapter(&i2c_dev->adapter);
if (ret) {
dev_err(&pdev->dev, "Failed to add I2C adapter\n");
- goto err_free_irq;
+ clk_disable(i2c_dev->i2c_clk);
+ return ret;
}
of_i2c_register_devices(&i2c_dev->adapter);
return 0;
-err_free_irq:
- free_irq(i2c_dev->irq, i2c_dev);
-err_free:
- kfree(i2c_dev);
-err_i2c_clk_put:
- clk_put(i2c_clk);
-err_clk_put:
- clk_put(clk);
-err_release_region:
- release_mem_region(iomem->start, resource_size(iomem));
-err_iounmap:
- iounmap(base);
- return ret;
}
static int __devexit tegra_i2c_remove(struct platform_device *pdev)
{
struct tegra_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
i2c_del_adapter(&i2c_dev->adapter);
- free_irq(i2c_dev->irq, i2c_dev);
- clk_put(i2c_dev->i2c_clk);
- clk_put(i2c_dev->clk);
- release_mem_region(i2c_dev
[PATCH 3/4] i2c: tegra: support for I2C_M_NOSTART functionality
Adding support for functionality I2C_M_NOSTART.
When multiple message transfer request made through i2c
and if any message is flagged with I2C_M_NOSTART then
it will not send the start/repeat-start and address of
that message i.e. sends data directly.
Signed-off-by: Laxman Dewangan
---
This is rebased of earlier patch on same support.
At this time using the new flag I2C_FUNC_NOSTART.
drivers/i2c/busses/i2c-tegra.c | 31 ++-
1 files changed, 26 insertions(+), 5 deletions(-)
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index 36d8725..4cc9594 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -97,8 +97,21 @@
#define I2C_HEADER_10BIT_ADDR (1<<18)
#define I2C_HEADER_IE_ENABLE (1<<17)
#define I2C_HEADER_REPEAT_START(1<<16)
+#define I2C_HEADER_CONTINUE_XFER (1<<15)
#define I2C_HEADER_MASTER_ADDR_SHIFT 12
#define I2C_HEADER_SLAVE_ADDR_SHIFT1
+/*
+ * msg_end_type: The bus control which need to be send at end of transfer.
+ * @MSG_END_STOP: Send stop pulse at end of transfer.
+ * @MSG_END_REPEAT_START: Send repeat start at end of transfer.
+ * @MSG_END_CONTINUE: The following on message is coming and so do not send
+ * stop or repeat start.
+ */
+enum msg_end_type {
+ MSG_END_STOP,
+ MSG_END_REPEAT_START,
+ MSG_END_CONTINUE,
+};
/**
* struct tegra_i2c_dev- per device i2c context
@@ -459,7 +472,7 @@ err:
}
static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
- struct i2c_msg *msg, int stop)
+ struct i2c_msg *msg, enum msg_end_type end_state)
{
u32 packet_header;
u32 int_mask;
@@ -486,7 +499,9 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO);
packet_header = I2C_HEADER_IE_ENABLE;
- if (!stop)
+ if (end_state == MSG_END_CONTINUE)
+ packet_header |= I2C_HEADER_CONTINUE_XFER;
+ else if (end_state == MSG_END_REPEAT_START)
packet_header |= I2C_HEADER_REPEAT_START;
if (msg->flags & I2C_M_TEN) {
packet_header |= msg->addr;
@@ -561,8 +576,14 @@ static int tegra_i2c_xfer(struct i2c_adapter *adap, struct
i2c_msg msgs[],
clk_enable(i2c_dev->clk);
for (i = 0; i < num; i++) {
- int stop = (i == (num - 1)) ? 1 : 0;
- ret = tegra_i2c_xfer_msg(i2c_dev, &msgs[i], stop);
+ enum msg_end_type end_type = MSG_END_STOP;
+ if (i < (num - 1)) {
+ if (msgs[i + 1].flags & I2C_M_NOSTART)
+ end_type = MSG_END_CONTINUE;
+ else
+ end_type = MSG_END_REPEAT_START;
+ }
+ ret = tegra_i2c_xfer_msg(i2c_dev, &msgs[i], end_type);
if (ret)
break;
}
@@ -573,7 +594,7 @@ static int tegra_i2c_xfer(struct i2c_adapter *adap, struct
i2c_msg msgs[],
static u32 tegra_i2c_func(struct i2c_adapter *adap)
{
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR |
- I2C_FUNC_PROTOCOL_MANGLING;
+ I2C_FUNC_PROTOCOL_MANGLING | I2C_FUNC_NOSTART;
}
static const struct i2c_algorithm tegra_i2c_algo = {
--
1.7.1.1
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[PATCH 2/4] i2c: tegra: add PROTOCOL_MANGLING as supported functionality.
The Tegra i2c driver supports the I2C_M_IGNORE_NAK and hence
returning I2C_FUNC_PROTOCOL_MANGLING as supported functionality.
Signed-off-by: Laxman Dewangan
---
drivers/i2c/busses/i2c-tegra.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index fa92396..36d8725 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -572,7 +572,8 @@ static int tegra_i2c_xfer(struct i2c_adapter *adap, struct
i2c_msg msgs[],
static u32 tegra_i2c_func(struct i2c_adapter *adap)
{
- return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR;
+ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR |
+ I2C_FUNC_PROTOCOL_MANGLING;
}
static const struct i2c_algorithm tegra_i2c_algo = {
--
1.7.1.1
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[PATCH 0/4] i2c: tegra: Bug fixes, cleanups and M_NOSTART support
This patch series having the: - Handling of late register write due to Tegra PPSB design. - support for I2C_M_NOSTART - Use devm_* for all allocation. Laxman Dewangan (4): i2c: tegra: make sure register writes completes i2c: tegra: add PROTOCOL_MANGLING as supported functionality. i2c: tegra: support for I2C_M_NOSTART functionality i2c: tegra: make all resource allocation through devm_* drivers/i2c/busses/i2c-tegra.c | 107 +--- 1 files changed, 57 insertions(+), 50 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
