Re: [PATCH] i2c: rcar: fixup section mismatch on rcar_i2c_probe/remove()
On Tue, Oct 30, 2012 at 11:44:44PM -0700, Kuninori Morimoto wrote: > This patch fixup below WARNING > > make CONFIG_DEBUG_SECTION_MISMATCH=y > ... > WARNING: vmlinux.o(.data+0x11798): Section mismatch in reference from the > variable rcar_i2c_drv to the function .devinit.text:rcar_i2c_probe() > The variable rcar_i2c_drv references > the function __devinit rcar_i2c_probe() > If the reference is valid then annotate the > variable with __init* or __refdata (see linux/init.h) or name the variable: > *driver, *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console > > WARNING: vmlinux.o(.data+0x1179c): Section mismatch in reference from the > variable rcar_i2c_drv to the function .devexit.text:rcar_i2c_remove() > The variable rcar_i2c_drv references > the function __devexit rcar_i2c_remove() > If the reference is valid then annotate the > variable with __exit* (see linux/init.h) or name the variable: > *driver, *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console > > Reported-by: Simon Horman > Signed-off-by: Kuninori Morimoto > --- > Simon > > Is this patch solve your issue ? Yes, thanks. Tested-by: Simon Horman -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] i2c-i801: utilize hardware semaphore
The i2c-i801 driver (along with 12 others) was modified to include a check
for ACPI resource conflicts by the following commit prior to 2.6.27
release:
commit 54fb4a05af0a4b814e6716cfdf3fa97fc6be7a32
i2c: Check for ACPI resource conflicts
The resource conflict check prevents a non-ACPI driver from accessing the
same hardware as an ACPI driver. However, the check is unnecessary for the
i2c-801 driver due to a previously unused semaphore provided by the
underlying hardware.
The INUSE_STS bit in the HST_STA/HST_STS register implements a hardware
semaphore that allows multiple drivers (BIOS/EFI, Linux non-ACPI, Linux
ACPI, etc.) to safely attempt to access the SMBus interface
simultaneously.
This commit adds a check to aquire the INUSE_STS semaphore before any
SMBus registers are altered and adds calls to release the semaphore
before returning in i801_access. It also removes the
acpi_check_resource_conflict call.
If any of the multiple possible drivers fails to properly utilize the
hardware semaphore (the INUSE_STS bit is not intentionally read and never
reset), then that driver will prevent the remaining drivers from gaining
the semaphore and no conflicting accesses will occur.
This corrects behavior seen on some hardware where an ACPI resource
conflict is detected, but the ASL methods defined in ACPI are
incompatible with the i2c-scmi driver. This results in no driver being
bound to the hardware, when both could safely be bound.
Signed-off-by: Aaron Sierra
---
drivers/i2c/busses/i2c-i801.c | 55 ++---
1 file changed, 46 insertions(+), 9 deletions(-)
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index 3779315..4f412f6 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -220,6 +220,36 @@ static unsigned int disable_features;
module_param(disable_features, uint, S_IRUGO | S_IWUSR);
MODULE_PARM_DESC(disable_features, "Disable selected driver features");
+/*
+ * Make sure that we get the hardware-provided semaphore so that any other
+ * driver knows that other software is accessing the SMBus registers.
+ * Return 0 if we get it, -EBUSY if not.
+ */
+static int i801_sem_get(struct i801_priv *priv)
+{
+ int status;
+ int timeout = 0;
+
+ status = inb_p(SMBHSTSTS(priv));
+ while ((status & SMBHSTSTS_INUSE_STS) && (timeout < MAX_RETRIES)) {
+ msleep(1);
+ status = inb_p(SMBHSTSTS(priv));
+ timeout++;
+ }
+
+ if (status & SMBHSTSTS_INUSE_STS) {
+ dev_err(&priv->pci_dev->dev, "SMBus is in use, can't use
it!\n");
+ return -EBUSY;
+ }
+
+return 0;
+}
+
+static void i801_sem_put(struct i801_priv *priv)
+{
+ outb_p(SMBHSTSTS_INUSE_STS, SMBHSTSTS(priv));
+}
+
/* Make sure the SMBus host is ready to start transmitting.
Return 0 if it is, -EBUSY if it is not. */
static int i801_check_pre(struct i801_priv *priv)
@@ -653,6 +683,10 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
int ret, xact = 0;
struct i801_priv *priv = i2c_get_adapdata(adap);
+ ret = i801_sem_get(priv);
+ if (ret < 0)
+ return ret;
+
hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC)
&& size != I2C_SMBUS_QUICK
&& size != I2C_SMBUS_I2C_BLOCK_DATA;
@@ -709,6 +743,7 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
default:
dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n",
size);
+ i801_sem_put(priv);
return -EOPNOTSUPP;
}
@@ -731,12 +766,18 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
outb_p(inb_p(SMBAUXCTL(priv)) &
~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
- if (block)
+ if (block) {
+ i801_sem_put(priv);
return ret;
- if (ret)
+ }
+ if (ret) {
+ i801_sem_put(priv);
return ret;
- if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK))
+ }
+ if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK)) {
+ i801_sem_put(priv);
return 0;
+ }
switch (xact & 0x7f) {
case I801_BYTE: /* Result put in SMBHSTDAT0 */
@@ -748,6 +789,8 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
(inb_p(SMBHSTDAT1(priv)) << 8);
break;
}
+
+ i801_sem_put(priv);
return 0;
}
@@ -1151,12 +1194,6 @@ static int __devinit i801_probe(struct pci_dev *dev,
goto exit;
}
- err = acpi_check_resource_conflict(&dev->resource[SMBBAR]);
- if (err) {
- err = -ENODEV;
- goto exit;
- }
-
err = pci_request_region(dev, SMBBAR, i801_driver.nam
Re: [PATCH v2 1/4] i2c: introduce i2c-cbus driver
On Wed, Oct 31, 2012 at 08:03:43PM +0200, Aaro Koskinen wrote:
> Add i2c driver to enable access to devices behind CBUS on Nokia Internet
> Tablets.
>
> The patch also adds CBUS I2C configuration for N8x0 which is one of the
> users of this driver.
>
> Cc: linux-i2c@vger.kernel.org
> Acked-by: Felipe Balbi
> Acked-by: Tony Lindgren
> Signed-off-by: Aaro Koskinen
> ---
> arch/arm/mach-omap2/board-n8x0.c | 42 ++
> drivers/i2c/busses/Kconfig | 10 ++
> drivers/i2c/busses/Makefile |1 +
> drivers/i2c/busses/i2c-cbus.c| 300
> ++
> include/linux/i2c-cbus.h | 27
> 5 files changed, 380 insertions(+), 0 deletions(-)
> create mode 100644 drivers/i2c/busses/i2c-cbus.c
> create mode 100644 include/linux/i2c-cbus.h
>
> diff --git a/arch/arm/mach-omap2/board-n8x0.c
> b/arch/arm/mach-omap2/board-n8x0.c
> index d95f727..7ea0348 100644
> --- a/arch/arm/mach-omap2/board-n8x0.c
> +++ b/arch/arm/mach-omap2/board-n8x0.c
> @@ -16,8 +16,10 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -39,6 +41,45 @@
> #define TUSB6010_GPIO_ENABLE 0
> #define TUSB6010_DMACHAN 0x3f
>
> +#if defined(CONFIG_I2C_CBUS) || defined(CONFIG_I2C_CBUS_MODULE)
> +static struct i2c_cbus_platform_data n8x0_cbus_data = {
> + .clk_gpio = 66,
> + .dat_gpio = 65,
> + .sel_gpio = 64,
> +};
> +
> +static struct platform_device n8x0_cbus_device = {
> + .name = "i2c-cbus",
> + .id = 3,
> + .dev= {
> + .platform_data = &n8x0_cbus_data,
> + },
> +};
> +
> +static struct i2c_board_info n8x0_i2c_board_info_3[] __initdata = {
> + {
> + I2C_BOARD_INFO("retu-mfd", 0x01),
> + },
> +};
> +
> +static void __init n8x0_cbus_init(void)
> +{
> + const int retu_irq_gpio = 108;
> +
> + if (gpio_request_one(retu_irq_gpio, GPIOF_IN, "Retu IRQ"))
> + return;
> + irq_set_irq_type(gpio_to_irq(retu_irq_gpio), IRQ_TYPE_EDGE_RISING);
> + n8x0_i2c_board_info_3[0].irq = gpio_to_irq(retu_irq_gpio);
> + i2c_register_board_info(3, n8x0_i2c_board_info_3,
> + ARRAY_SIZE(n8x0_i2c_board_info_3));
> + platform_device_register(&n8x0_cbus_device);
> +}
> +#else /* CONFIG_I2C_CBUS */
> +static void __init n8x0_cbus_init(void)
> +{
> +}
> +#endif /* CONFIG_I2C_CBUS */
> +
> #if defined(CONFIG_USB_MUSB_TUSB6010) ||
> defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
> /*
> * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and
> @@ -677,6 +718,7 @@ static void __init n8x0_init_machine(void)
> gpmc_onenand_init(board_onenand_data);
> n8x0_mmc_init();
> n8x0_usb_init();
> + n8x0_cbus_init();
> }
>
> MACHINE_START(NOKIA_N800, "Nokia N800")
> diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
> index 65dd599..d01c8ef 100644
> --- a/drivers/i2c/busses/Kconfig
> +++ b/drivers/i2c/busses/Kconfig
> @@ -338,6 +338,16 @@ config I2C_BLACKFIN_TWI_CLK_KHZ
> help
> The unit of the TWI clock is kHz.
>
> +config I2C_CBUS
> + tristate "CBUS I2C driver"
> + depends on GENERIC_GPIO
> + help
> + Support for CBUS access using I2C API. Mostly relevant for Nokia
> + Internet Tablets (770, N800 and N810).
> +
> + This driver can also be built as a module. If so, the module
> + will be called i2c-cbus.
> +
> config I2C_CPM
> tristate "Freescale CPM1 or CPM2 (MPC8xx/826x)"
> depends on (CPM1 || CPM2) && OF_I2C
> diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
> index 2d33d62..3c548b1 100644
> --- a/drivers/i2c/busses/Makefile
> +++ b/drivers/i2c/busses/Makefile
> @@ -31,6 +31,7 @@ obj-$(CONFIG_I2C_POWERMAC) += i2c-powermac.o
> obj-$(CONFIG_I2C_AT91) += i2c-at91.o
> obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o
> obj-$(CONFIG_I2C_BLACKFIN_TWI) += i2c-bfin-twi.o
> +obj-$(CONFIG_I2C_CBUS) += i2c-cbus.o
> obj-$(CONFIG_I2C_CPM)+= i2c-cpm.o
> obj-$(CONFIG_I2C_DAVINCI)+= i2c-davinci.o
> obj-$(CONFIG_I2C_DESIGNWARE_CORE)+= i2c-designware-core.o
> diff --git a/drivers/i2c/busses/i2c-cbus.c b/drivers/i2c/busses/i2c-cbus.c
> new file mode 100644
> index 000..1ea7667
> --- /dev/null
> +++ b/drivers/i2c/busses/i2c-cbus.c
> @@ -0,0 +1,300 @@
> +/*
> + * CBUS I2C driver for Nokia Internet Tablets.
> + *
> + * Copyright (C) 2004-2010 Nokia Corporation
> + *
> + * Based on code written by Juha Yrjölä, David Weinehall, Mikko Ylinen and
> + * Felipe Balbi. Converted to I2C driver by Aaro Koskinen.
> + *
> + * This file is subject to the terms and conditions of the GNU General
> + * Public License. See the file "COPYING" in the main directory of this
> + * archive for more details.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warrant
[PATCH v2 1/4] i2c: introduce i2c-cbus driver
Add i2c driver to enable access to devices behind CBUS on Nokia Internet
Tablets.
The patch also adds CBUS I2C configuration for N8x0 which is one of the
users of this driver.
Cc: linux-i2c@vger.kernel.org
Acked-by: Felipe Balbi
Acked-by: Tony Lindgren
Signed-off-by: Aaro Koskinen
---
arch/arm/mach-omap2/board-n8x0.c | 42 ++
drivers/i2c/busses/Kconfig | 10 ++
drivers/i2c/busses/Makefile |1 +
drivers/i2c/busses/i2c-cbus.c| 300 ++
include/linux/i2c-cbus.h | 27
5 files changed, 380 insertions(+), 0 deletions(-)
create mode 100644 drivers/i2c/busses/i2c-cbus.c
create mode 100644 include/linux/i2c-cbus.h
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index d95f727..7ea0348 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -16,8 +16,10 @@
#include
#include
#include
+#include
#include
#include
+#include
#include
#include
#include
@@ -39,6 +41,45 @@
#define TUSB6010_GPIO_ENABLE 0
#define TUSB6010_DMACHAN 0x3f
+#if defined(CONFIG_I2C_CBUS) || defined(CONFIG_I2C_CBUS_MODULE)
+static struct i2c_cbus_platform_data n8x0_cbus_data = {
+ .clk_gpio = 66,
+ .dat_gpio = 65,
+ .sel_gpio = 64,
+};
+
+static struct platform_device n8x0_cbus_device = {
+ .name = "i2c-cbus",
+ .id = 3,
+ .dev= {
+ .platform_data = &n8x0_cbus_data,
+ },
+};
+
+static struct i2c_board_info n8x0_i2c_board_info_3[] __initdata = {
+ {
+ I2C_BOARD_INFO("retu-mfd", 0x01),
+ },
+};
+
+static void __init n8x0_cbus_init(void)
+{
+ const int retu_irq_gpio = 108;
+
+ if (gpio_request_one(retu_irq_gpio, GPIOF_IN, "Retu IRQ"))
+ return;
+ irq_set_irq_type(gpio_to_irq(retu_irq_gpio), IRQ_TYPE_EDGE_RISING);
+ n8x0_i2c_board_info_3[0].irq = gpio_to_irq(retu_irq_gpio);
+ i2c_register_board_info(3, n8x0_i2c_board_info_3,
+ ARRAY_SIZE(n8x0_i2c_board_info_3));
+ platform_device_register(&n8x0_cbus_device);
+}
+#else /* CONFIG_I2C_CBUS */
+static void __init n8x0_cbus_init(void)
+{
+}
+#endif /* CONFIG_I2C_CBUS */
+
#if defined(CONFIG_USB_MUSB_TUSB6010) ||
defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
/*
* Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and
@@ -677,6 +718,7 @@ static void __init n8x0_init_machine(void)
gpmc_onenand_init(board_onenand_data);
n8x0_mmc_init();
n8x0_usb_init();
+ n8x0_cbus_init();
}
MACHINE_START(NOKIA_N800, "Nokia N800")
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 65dd599..d01c8ef 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -338,6 +338,16 @@ config I2C_BLACKFIN_TWI_CLK_KHZ
help
The unit of the TWI clock is kHz.
+config I2C_CBUS
+ tristate "CBUS I2C driver"
+ depends on GENERIC_GPIO
+ help
+ Support for CBUS access using I2C API. Mostly relevant for Nokia
+ Internet Tablets (770, N800 and N810).
+
+ This driver can also be built as a module. If so, the module
+ will be called i2c-cbus.
+
config I2C_CPM
tristate "Freescale CPM1 or CPM2 (MPC8xx/826x)"
depends on (CPM1 || CPM2) && OF_I2C
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 2d33d62..3c548b1 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -31,6 +31,7 @@ obj-$(CONFIG_I2C_POWERMAC)+= i2c-powermac.o
obj-$(CONFIG_I2C_AT91) += i2c-at91.o
obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o
obj-$(CONFIG_I2C_BLACKFIN_TWI) += i2c-bfin-twi.o
+obj-$(CONFIG_I2C_CBUS) += i2c-cbus.o
obj-$(CONFIG_I2C_CPM) += i2c-cpm.o
obj-$(CONFIG_I2C_DAVINCI) += i2c-davinci.o
obj-$(CONFIG_I2C_DESIGNWARE_CORE) += i2c-designware-core.o
diff --git a/drivers/i2c/busses/i2c-cbus.c b/drivers/i2c/busses/i2c-cbus.c
new file mode 100644
index 000..1ea7667
--- /dev/null
+++ b/drivers/i2c/busses/i2c-cbus.c
@@ -0,0 +1,300 @@
+/*
+ * CBUS I2C driver for Nokia Internet Tablets.
+ *
+ * Copyright (C) 2004-2010 Nokia Corporation
+ *
+ * Based on code written by Juha Yrjölä, David Weinehall, Mikko Ylinen and
+ * Felipe Balbi. Converted to I2C driver by Aaro Koskinen.
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file "COPYING" in the main directory of this
+ * archive for more details.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/*
+ * Bit counts are deriv
Re: [PATCH] i2c: mv64xxx: Remove useless parens
Hello. On 10/31/2012 06:46 AM, Nobuhiro Iwamatsu wrote: > Signed-off-by: Nobuhiro Iwamatsu > --- > drivers/i2c/busses/Kconfig |2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig > index 65dd599..38abd47 100644 > --- a/drivers/i2c/busses/Kconfig > +++ b/drivers/i2c/busses/Kconfig > @@ -474,7 +474,7 @@ config I2C_MPC > > config I2C_MV64XXX > tristate "Marvell mv64xxx I2C Controller" > - depends on (MV64X60 || PLAT_ORION) > + depends on MV64X60 || PLAT_ORION I doubt that this worth the patch now that you leave the 'depends' condition unchanged... WBR, Sergei -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH RFC] i2c: omap: Fix the revision register read
Hi, On Wed, Oct 31, 2012 at 04:28:38PM +0530, Shubhrajyoti wrote: > On Wednesday 31 October 2012 03:42 PM, Felipe Balbi wrote: > >> > >> > +if (!_dev->regs) > >> > +return 0; > > this is wrong, you need to make sure dev->regs is set early enough. > > > to set the dev->regs I use the value read from revision register. > > to read the revision register I do a get_sync first. This in turn leads > to the call to resume handler. > At this point the regs is NULL and so the check. > > After reading the register and checking the scheme bit. > the reg map is populated. > > How can this issue be solved? aaa good point, missed that. Nevermind that comment ;-) cheers -- balbi signature.asc Description: Digital signature
Re: [PATCH RFC] i2c: omap: Fix the revision register read
Hi,
On Wed, Oct 31, 2012 at 04:18:15PM +0530, Shubhrajyoti wrote:
> On Wednesday 31 October 2012 03:42 PM, Felipe Balbi wrote:
> > Hi,
> >
> > On Wed, Oct 31, 2012 at 02:29:19PM +0530, Shubhrajyoti D wrote:
> >> The revision register on OMAP4 is a 16-bit lo and a 16-bit
> >> hi. Currently the driver reads only the lower 8-bits.
> >> Fix the same by preventing the truncating of the rev register
> >> for OMAP4.
> > very good, but you need to test this with OMAP2/3/4 (5 ??). How was this
> > tested ?
> >
> >> Also use the scheme bit ie bit-14 of the hi register to know if it
> >> is OMAP_I2C_IP_VERSION_2.
> >>
> >> On platforms previous to OMAP4 the offset 0x04 is IE register whose
> >> bit-14 reset value is 0, the code uses the same to its advantage.
> >>
> >> The dev->regs is populated after reading the rev_hi. A NULL check
> >> has been added in the resume handler to prevent the access before
> >> the setting of the regs.
> > this could get some rephrasing, I guess. At least to me it's difficult
> > to understand what you mean :-s
> >
> >> Signed-off-by: Shubhrajyoti D
> >> ---
> >> todo: some of the flag checks can be removed in favour of revision check.
> >>
> >> drivers/i2c/busses/i2c-omap.c | 35 +--
> >> 1 files changed, 25 insertions(+), 10 deletions(-)
> >>
> >> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> >> index db31eae..651a7f7 100644
> >> --- a/drivers/i2c/busses/i2c-omap.c
> >> +++ b/drivers/i2c/busses/i2c-omap.c
> >> @@ -51,7 +51,8 @@
> >> /* I2C controller revisions present on specific hardware */
> >> #define OMAP_I2C_REV_ON_2430 0x36
> >> #define OMAP_I2C_REV_ON_3430_3530 0x3C
> >> -#define OMAP_I2C_REV_ON_3630_4430 0x40
> >> +#define OMAP_I2C_REV_ON_3630 0x40
> >> +#define OMAP_I2C_REV_ON_4430_PLUS 0x5040
> > I would rather see a proper decoding of the revision, meaning that you
> > would:
> >
> > For omap2/3:
> >
> > rev major = rev >> 8;
> > rev minor = rev & 0xff;
> you mean
>
> rev major = rev >> 4;
> rev minor = rev & 0xf;
might be, I didn't look at the TRM to make sure, my bad :-)
> thats doable too. However that currently that is read together
> currently.
and that's what's wrong IMHO. What's current in driver is only valid for
OMAP1 IIRC.
> > For OMAP4/5:
> >
> > well, that's a lot more complex, but you have that data ;-)
> >
> >> /* timeout waiting for the controller to respond */
> >> #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
> >> @@ -202,7 +203,7 @@ struct omap_i2c_dev {
> >> * fifo_size==0 implies no fifo
> >> * if set, should be trsh+1
> >> */
> >> - u8 rev;
> >> + u16 rev;
> > IMHO this should be u32, so you don't need rev_lo and rev_hi below.
> >
> >>unsignedb_hw:1; /* bad h/w fixes */
> >>unsignedreceiver:1; /* true when we're in receiver
> >> mode */
> >>u16 iestate;/* Saved interrupt register */
> >> @@ -490,7 +491,7 @@ static void omap_i2c_resize_fifo(struct omap_i2c_dev
> >> *dev, u8 size, bool is_rx)
> >>
> >>omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG, buf);
> >>
> >> - if (dev->rev < OMAP_I2C_REV_ON_3630_4430)
> >> + if (dev->rev < OMAP_I2C_REV_ON_3630)
> >>dev->b_hw = 1; /* Enable hardware fixes */
> >>
> >>/* calculate wakeup latency constraint for MPU */
> >> @@ -1064,6 +1065,8 @@ omap_i2c_probe(struct platform_device *pdev)
> >>const struct of_device_id *match;
> >>int irq;
> >>int r;
> >> + u16 rev_lo;
> >> + u16 rev_hi;
> >>
> >>/* NOTE: driver uses the static register mapping */
> >>mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> >> @@ -1117,11 +1120,6 @@ omap_i2c_probe(struct platform_device *pdev)
> >>
> >>dev->reg_shift = (dev->flags >> OMAP_I2C_FLAG_BUS_SHIFT__SHIFT) & 3;
> >>
> >> - if (dev->dtrev == OMAP_I2C_IP_VERSION_2)
> >> - dev->regs = (u8 *)reg_map_ip_v2;
> >> - else
> >> - dev->regs = (u8 *)reg_map_ip_v1;
> >> -
> >>pm_runtime_enable(dev->dev);
> >>pm_runtime_set_autosuspend_delay(dev->dev, OMAP_I2C_PM_TIMEOUT);
> >>pm_runtime_use_autosuspend(dev->dev);
> >> @@ -1130,7 +1128,21 @@ omap_i2c_probe(struct platform_device *pdev)
> >>if (IS_ERR_VALUE(r))
> >>goto err_free_mem;
> >>
> >> - dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
> >> + /* Read the Rev hi bit-14 ie scheme this is 1 indicates ver2 or
> >> + * highlander.
> > the "scheme" in highlander is a 2 bit value. In order to make this
> > future proof, you need to read both bits (31:30).
> Good point will fix it.
> >
> >> + * On omap3 Offset 4 is IE Reg the bit 14 is XDR_IE which is 0 at reset.
> >> + */
> > please align the * characters.
> yes will repost
> >
> >> + rev_hi = __raw_readw(dev->
[PATCH] i2c-i801: Enable interrupts for all post-ICH5 chips
I did not receive a single bug report after interrupt support was
added for a limited number of chips. So I'd say the code is good and
should be enabled for all supported chips, that is: ICH5 and later.
For now the IDF channels are excluded as I have no idea if they
support interrupts too or not.
Signed-off-by: Jean Delvare
Cc: Daniel Kurtz
---
Would be great if someone could test interrupts on IDF channels and
report.
drivers/i2c/busses/i2c-i801.c | 12 ++--
1 file changed, 2 insertions(+), 10 deletions(-)
--- linux-3.7-rc3.orig/drivers/i2c/busses/i2c-i801.c2012-10-31
11:45:15.0 +0100
+++ linux-3.7-rc3/drivers/i2c/busses/i2c-i801.c 2012-10-31 11:49:01.064163932
+0100
@@ -1109,6 +1109,8 @@ static int __devinit i801_probe(struct p
/* fall through */
default:
priv->features |= FEATURE_I2C_BLOCK_READ;
+ if (!(priv->features & FEATURE_IDF))
+ priv->features |= FEATURE_IRQ;
/* fall through */
case PCI_DEVICE_ID_INTEL_82801DB_3:
priv->features |= FEATURE_SMBUS_PEC;
@@ -1121,16 +1123,6 @@ static int __devinit i801_probe(struct p
break;
}
- /* IRQ processing tested on CougarPoint PCH, ICH5, ICH7-M and ICH10 */
- if (dev->device == PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS ||
- dev->device == PCI_DEVICE_ID_INTEL_82801EB_3 ||
- dev->device == PCI_DEVICE_ID_INTEL_ICH7_17 ||
- dev->device == PCI_DEVICE_ID_INTEL_ICH8_5 ||
- dev->device == PCI_DEVICE_ID_INTEL_ICH9_6 ||
- dev->device == PCI_DEVICE_ID_INTEL_ICH10_4 ||
- dev->device == PCI_DEVICE_ID_INTEL_ICH10_5)
- priv->features |= FEATURE_IRQ;
-
/* Disable features on user request */
for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) {
if (priv->features & disable_features & (1 << i))
--
Jean Delvare
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Re: [PATCH RFC] i2c: omap: Fix the revision register read
On Wednesday 31 October 2012 03:42 PM, Felipe Balbi wrote: >> >> > + if (!_dev->regs) >> > + return 0; > this is wrong, you need to make sure dev->regs is set early enough. to set the dev->regs I use the value read from revision register. to read the revision register I do a get_sync first. This in turn leads to the call to resume handler. At this point the regs is NULL and so the check. After reading the register and checking the scheme bit. the reg map is populated. How can this issue be solved? -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH RFC] i2c: omap: Fix the revision register read
On Wednesday 31 October 2012 03:42 PM, Felipe Balbi wrote:
> Hi,
>
> On Wed, Oct 31, 2012 at 02:29:19PM +0530, Shubhrajyoti D wrote:
>> The revision register on OMAP4 is a 16-bit lo and a 16-bit
>> hi. Currently the driver reads only the lower 8-bits.
>> Fix the same by preventing the truncating of the rev register
>> for OMAP4.
> very good, but you need to test this with OMAP2/3/4 (5 ??). How was this
> tested ?
>
>> Also use the scheme bit ie bit-14 of the hi register to know if it
>> is OMAP_I2C_IP_VERSION_2.
>>
>> On platforms previous to OMAP4 the offset 0x04 is IE register whose
>> bit-14 reset value is 0, the code uses the same to its advantage.
>>
>> The dev->regs is populated after reading the rev_hi. A NULL check
>> has been added in the resume handler to prevent the access before
>> the setting of the regs.
> this could get some rephrasing, I guess. At least to me it's difficult
> to understand what you mean :-s
>
>> Signed-off-by: Shubhrajyoti D
>> ---
>> todo: some of the flag checks can be removed in favour of revision check.
>>
>> drivers/i2c/busses/i2c-omap.c | 35 +--
>> 1 files changed, 25 insertions(+), 10 deletions(-)
>>
>> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
>> index db31eae..651a7f7 100644
>> --- a/drivers/i2c/busses/i2c-omap.c
>> +++ b/drivers/i2c/busses/i2c-omap.c
>> @@ -51,7 +51,8 @@
>> /* I2C controller revisions present on specific hardware */
>> #define OMAP_I2C_REV_ON_24300x36
>> #define OMAP_I2C_REV_ON_3430_3530 0x3C
>> -#define OMAP_I2C_REV_ON_3630_4430 0x40
>> +#define OMAP_I2C_REV_ON_36300x40
>> +#define OMAP_I2C_REV_ON_4430_PLUS 0x5040
> I would rather see a proper decoding of the revision, meaning that you
> would:
>
> For omap2/3:
>
> rev major = rev >> 8;
> rev minor = rev & 0xff;
you mean
rev major = rev >> 4;
rev minor = rev & 0xf;
thats doable too. However that currently that is read together currently.
>
> For OMAP4/5:
>
> well, that's a lot more complex, but you have that data ;-)
>
>> /* timeout waiting for the controller to respond */
>> #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
>> @@ -202,7 +203,7 @@ struct omap_i2c_dev {
>> * fifo_size==0 implies no fifo
>> * if set, should be trsh+1
>> */
>> -u8 rev;
>> +u16 rev;
> IMHO this should be u32, so you don't need rev_lo and rev_hi below.
>
>> unsignedb_hw:1; /* bad h/w fixes */
>> unsignedreceiver:1; /* true when we're in receiver
>> mode */
>> u16 iestate;/* Saved interrupt register */
>> @@ -490,7 +491,7 @@ static void omap_i2c_resize_fifo(struct omap_i2c_dev
>> *dev, u8 size, bool is_rx)
>>
>> omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG, buf);
>>
>> -if (dev->rev < OMAP_I2C_REV_ON_3630_4430)
>> +if (dev->rev < OMAP_I2C_REV_ON_3630)
>> dev->b_hw = 1; /* Enable hardware fixes */
>>
>> /* calculate wakeup latency constraint for MPU */
>> @@ -1064,6 +1065,8 @@ omap_i2c_probe(struct platform_device *pdev)
>> const struct of_device_id *match;
>> int irq;
>> int r;
>> +u16 rev_lo;
>> +u16 rev_hi;
>>
>> /* NOTE: driver uses the static register mapping */
>> mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> @@ -1117,11 +1120,6 @@ omap_i2c_probe(struct platform_device *pdev)
>>
>> dev->reg_shift = (dev->flags >> OMAP_I2C_FLAG_BUS_SHIFT__SHIFT) & 3;
>>
>> -if (dev->dtrev == OMAP_I2C_IP_VERSION_2)
>> -dev->regs = (u8 *)reg_map_ip_v2;
>> -else
>> -dev->regs = (u8 *)reg_map_ip_v1;
>> -
>> pm_runtime_enable(dev->dev);
>> pm_runtime_set_autosuspend_delay(dev->dev, OMAP_I2C_PM_TIMEOUT);
>> pm_runtime_use_autosuspend(dev->dev);
>> @@ -1130,7 +1128,21 @@ omap_i2c_probe(struct platform_device *pdev)
>> if (IS_ERR_VALUE(r))
>> goto err_free_mem;
>>
>> -dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
>> +/* Read the Rev hi bit-14 ie scheme this is 1 indicates ver2 or
>> +* highlander.
> the "scheme" in highlander is a 2 bit value. In order to make this
> future proof, you need to read both bits (31:30).
Good point will fix it.
>
>> +* On omap3 Offset 4 is IE Reg the bit 14 is XDR_IE which is 0 at reset.
>> +*/
> please align the * characters.
yes will repost
>
>> +rev_hi = __raw_readw(dev->base + 0x04);
> you should make omap_i2c_read_reg() work fine for this case too.
Just felt it is more readlable this way also I didnt want to use the
reg_shift etc.
which also may get cleaned up sometime.
>
>> +
>> +if (rev_hi & 0x4000) {/* If scheme 1*/
> you should add a symbolic define for scheme, something like:
>
> switch (OMAP_I2C_SCHEME(rev)) {
> case OM
Re: [PATCH RFC] i2c: omap: Fix the revision register read
Hi, On Wed, Oct 31, 2012 at 03:02:57PM +0530, Shubhrajyoti Datta wrote: > On Wed, Oct 31, 2012 at 2:29 PM, Shubhrajyoti D wrote: > > The revision register on OMAP4 is a 16-bit lo and a 16-bit > > hi. Currently the driver reads only the lower 8-bits. > > Fix the same by preventing the truncating of the rev register > > for OMAP4. > > > > Also use the scheme bit ie bit-14 of the hi register to know if it > > is OMAP_I2C_IP_VERSION_2. > > > > On platforms previous to OMAP4 the offset 0x04 is IE register whose > > bit-14 reset value is 0, the code uses the same to its advantage. > > > > The dev->regs is populated after reading the rev_hi. A NULL check > > has been added in the resume handler to prevent the access before > > the setting of the regs. > > > tested on omap4sdp, omap3630 based beagle , omap3430sdp. oh, now I see. You need to test on OMAP2 which has different revision layout. -- balbi signature.asc Description: Digital signature
Re: [PATCH RFC] i2c: omap: Fix the revision register read
Hi,
On Wed, Oct 31, 2012 at 02:29:19PM +0530, Shubhrajyoti D wrote:
> The revision register on OMAP4 is a 16-bit lo and a 16-bit
> hi. Currently the driver reads only the lower 8-bits.
> Fix the same by preventing the truncating of the rev register
> for OMAP4.
very good, but you need to test this with OMAP2/3/4 (5 ??). How was this
tested ?
> Also use the scheme bit ie bit-14 of the hi register to know if it
> is OMAP_I2C_IP_VERSION_2.
>
> On platforms previous to OMAP4 the offset 0x04 is IE register whose
> bit-14 reset value is 0, the code uses the same to its advantage.
>
> The dev->regs is populated after reading the rev_hi. A NULL check
> has been added in the resume handler to prevent the access before
> the setting of the regs.
this could get some rephrasing, I guess. At least to me it's difficult
to understand what you mean :-s
> Signed-off-by: Shubhrajyoti D
> ---
> todo: some of the flag checks can be removed in favour of revision check.
>
> drivers/i2c/busses/i2c-omap.c | 35 +--
> 1 files changed, 25 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> index db31eae..651a7f7 100644
> --- a/drivers/i2c/busses/i2c-omap.c
> +++ b/drivers/i2c/busses/i2c-omap.c
> @@ -51,7 +51,8 @@
> /* I2C controller revisions present on specific hardware */
> #define OMAP_I2C_REV_ON_2430 0x36
> #define OMAP_I2C_REV_ON_3430_35300x3C
> -#define OMAP_I2C_REV_ON_3630_44300x40
> +#define OMAP_I2C_REV_ON_3630 0x40
> +#define OMAP_I2C_REV_ON_4430_PLUS0x5040
I would rather see a proper decoding of the revision, meaning that you
would:
For omap2/3:
rev major = rev >> 8;
rev minor = rev & 0xff;
For OMAP4/5:
well, that's a lot more complex, but you have that data ;-)
> /* timeout waiting for the controller to respond */
> #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
> @@ -202,7 +203,7 @@ struct omap_i2c_dev {
>* fifo_size==0 implies no fifo
>* if set, should be trsh+1
>*/
> - u8 rev;
> + u16 rev;
IMHO this should be u32, so you don't need rev_lo and rev_hi below.
> unsignedb_hw:1; /* bad h/w fixes */
> unsignedreceiver:1; /* true when we're in receiver
> mode */
> u16 iestate;/* Saved interrupt register */
> @@ -490,7 +491,7 @@ static void omap_i2c_resize_fifo(struct omap_i2c_dev
> *dev, u8 size, bool is_rx)
>
> omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG, buf);
>
> - if (dev->rev < OMAP_I2C_REV_ON_3630_4430)
> + if (dev->rev < OMAP_I2C_REV_ON_3630)
> dev->b_hw = 1; /* Enable hardware fixes */
>
> /* calculate wakeup latency constraint for MPU */
> @@ -1064,6 +1065,8 @@ omap_i2c_probe(struct platform_device *pdev)
> const struct of_device_id *match;
> int irq;
> int r;
> + u16 rev_lo;
> + u16 rev_hi;
>
> /* NOTE: driver uses the static register mapping */
> mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> @@ -1117,11 +1120,6 @@ omap_i2c_probe(struct platform_device *pdev)
>
> dev->reg_shift = (dev->flags >> OMAP_I2C_FLAG_BUS_SHIFT__SHIFT) & 3;
>
> - if (dev->dtrev == OMAP_I2C_IP_VERSION_2)
> - dev->regs = (u8 *)reg_map_ip_v2;
> - else
> - dev->regs = (u8 *)reg_map_ip_v1;
> -
> pm_runtime_enable(dev->dev);
> pm_runtime_set_autosuspend_delay(dev->dev, OMAP_I2C_PM_TIMEOUT);
> pm_runtime_use_autosuspend(dev->dev);
> @@ -1130,7 +1128,21 @@ omap_i2c_probe(struct platform_device *pdev)
> if (IS_ERR_VALUE(r))
> goto err_free_mem;
>
> - dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
> + /* Read the Rev hi bit-14 ie scheme this is 1 indicates ver2 or
> + * highlander.
the "scheme" in highlander is a 2 bit value. In order to make this
future proof, you need to read both bits (31:30).
> + * On omap3 Offset 4 is IE Reg the bit 14 is XDR_IE which is 0 at reset.
> + */
please align the * characters.
> + rev_hi = __raw_readw(dev->base + 0x04);
you should make omap_i2c_read_reg() work fine for this case too.
> +
> + if (rev_hi & 0x4000) {/* If scheme 1*/
you should add a symbolic define for scheme, something like:
switch (OMAP_I2C_SCHEME(rev)) {
case OMAP_I2C_SCHEME_1:
foo();
break;
case OMAP_I2C_SCHEME_2:
/* FALLTHROUGH */
default:
bar();
}
note that this will also default to highest known scheme if another
scheme is added. You need to make the driver behave like that to
decrease amount of rework to support newest OMAPs.
> + dev->regs = (u8 *)reg_map_ip_v2;
> + dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_IP_V2_REVNB_HI);
> + rev_lo = o
Re: [PATCH RFC] i2c: omap: Fix the revision register read
On Wed, Oct 31, 2012 at 2:29 PM, Shubhrajyoti D wrote: > The revision register on OMAP4 is a 16-bit lo and a 16-bit > hi. Currently the driver reads only the lower 8-bits. > Fix the same by preventing the truncating of the rev register > for OMAP4. > > Also use the scheme bit ie bit-14 of the hi register to know if it > is OMAP_I2C_IP_VERSION_2. > > On platforms previous to OMAP4 the offset 0x04 is IE register whose > bit-14 reset value is 0, the code uses the same to its advantage. > > The dev->regs is populated after reading the rev_hi. A NULL check > has been added in the resume handler to prevent the access before > the setting of the regs. > tested on omap4sdp, omap3630 based beagle , omap3430sdp. -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH RFC] i2c: omap: Fix the revision register read
The revision register on OMAP4 is a 16-bit lo and a 16-bit
hi. Currently the driver reads only the lower 8-bits.
Fix the same by preventing the truncating of the rev register
for OMAP4.
Also use the scheme bit ie bit-14 of the hi register to know if it
is OMAP_I2C_IP_VERSION_2.
On platforms previous to OMAP4 the offset 0x04 is IE register whose
bit-14 reset value is 0, the code uses the same to its advantage.
The dev->regs is populated after reading the rev_hi. A NULL check
has been added in the resume handler to prevent the access before
the setting of the regs.
Signed-off-by: Shubhrajyoti D
---
todo: some of the flag checks can be removed in favour of revision check.
drivers/i2c/busses/i2c-omap.c | 35 +--
1 files changed, 25 insertions(+), 10 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index db31eae..651a7f7 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -51,7 +51,8 @@
/* I2C controller revisions present on specific hardware */
#define OMAP_I2C_REV_ON_2430 0x36
#define OMAP_I2C_REV_ON_3430_3530 0x3C
-#define OMAP_I2C_REV_ON_3630_4430 0x40
+#define OMAP_I2C_REV_ON_3630 0x40
+#define OMAP_I2C_REV_ON_4430_PLUS 0x5040
/* timeout waiting for the controller to respond */
#define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
@@ -202,7 +203,7 @@ struct omap_i2c_dev {
* fifo_size==0 implies no fifo
* if set, should be trsh+1
*/
- u8 rev;
+ u16 rev;
unsignedb_hw:1; /* bad h/w fixes */
unsignedreceiver:1; /* true when we're in receiver
mode */
u16 iestate;/* Saved interrupt register */
@@ -490,7 +491,7 @@ static void omap_i2c_resize_fifo(struct omap_i2c_dev *dev,
u8 size, bool is_rx)
omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG, buf);
- if (dev->rev < OMAP_I2C_REV_ON_3630_4430)
+ if (dev->rev < OMAP_I2C_REV_ON_3630)
dev->b_hw = 1; /* Enable hardware fixes */
/* calculate wakeup latency constraint for MPU */
@@ -1064,6 +1065,8 @@ omap_i2c_probe(struct platform_device *pdev)
const struct of_device_id *match;
int irq;
int r;
+ u16 rev_lo;
+ u16 rev_hi;
/* NOTE: driver uses the static register mapping */
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1117,11 +1120,6 @@ omap_i2c_probe(struct platform_device *pdev)
dev->reg_shift = (dev->flags >> OMAP_I2C_FLAG_BUS_SHIFT__SHIFT) & 3;
- if (dev->dtrev == OMAP_I2C_IP_VERSION_2)
- dev->regs = (u8 *)reg_map_ip_v2;
- else
- dev->regs = (u8 *)reg_map_ip_v1;
-
pm_runtime_enable(dev->dev);
pm_runtime_set_autosuspend_delay(dev->dev, OMAP_I2C_PM_TIMEOUT);
pm_runtime_use_autosuspend(dev->dev);
@@ -1130,7 +1128,21 @@ omap_i2c_probe(struct platform_device *pdev)
if (IS_ERR_VALUE(r))
goto err_free_mem;
- dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
+ /* Read the Rev hi bit-14 ie scheme this is 1 indicates ver2 or
+ * highlander.
+ * On omap3 Offset 4 is IE Reg the bit 14 is XDR_IE which is 0 at reset.
+ */
+ rev_hi = __raw_readw(dev->base + 0x04);
+
+ if (rev_hi & 0x4000) {/* If scheme 1*/
+ dev->regs = (u8 *)reg_map_ip_v2;
+ dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_IP_V2_REVNB_HI);
+ rev_lo = omap_i2c_read_reg(dev, OMAP_I2C_IP_V2_REVNB_LO);
+ dev_info(dev->dev, "the low rev %x\n", rev_lo);
+ } else {
+ dev->regs = (u8 *)reg_map_ip_v1;
+ dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
+ }
dev->errata = 0;
@@ -1155,7 +1167,7 @@ omap_i2c_probe(struct platform_device *pdev)
dev->fifo_size = (dev->fifo_size / 2);
- if (dev->rev < OMAP_I2C_REV_ON_3630_4430)
+ if (dev->rev < OMAP_I2C_REV_ON_3630)
dev->b_hw = 1; /* Enable hardware fixes */
/* calculate wakeup latency constraint for MPU */
@@ -1264,6 +1276,9 @@ static int omap_i2c_runtime_resume(struct device *dev)
struct platform_device *pdev = to_platform_device(dev);
struct omap_i2c_dev *_dev = platform_get_drvdata(pdev);
+ if (!_dev->regs)
+ return 0;
+
if (_dev->flags & OMAP_I2C_FLAG_RESET_REGS_POSTIDLE) {
omap_i2c_write_reg(_dev, OMAP_I2C_CON_REG, 0);
omap_i2c_write_reg(_dev, OMAP_I2C_PSC_REG, _dev->pscstate);
--
1.7.5.4
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Re: [PATCH V6 1/2] i2c/adapter: Add bus recovery infrastructure
On 19 October 2012 19:03, Viresh Kumar wrote: > On 4 October 2012 16:34, Viresh Kumar wrote: >> Add i2c bus recovery infrastructure to i2c adapters as specified in the i2c >> protocol Rev. 03 section 3.1.16 titled "Bus clear". >> >> http://www.nxp.com/documents/user_manual/UM10204.pdf >> >> Sometimes during operation i2c bus hangs and we need to give dummy clocks to >> slave device to start the transfer again. Now we may have capability in the >> bus >> controller to generate these clocks or platform may have gpio pins which can >> be >> toggled to generate dummy clocks. This patch supports both. >> >> This patch also adds in generic bus recovery routines gpio or scl line based >> which can be used by bus controller. In addition controller driver may >> provide >> its own version of the bus recovery routine. >> >> This doesn't support multi-master recovery for now. > > Hi Wolfram, > > I haven't pinged you earlier as i knew merge window is around. Can you please > share your opinion for this now? Ping!! -- viresh -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
