Re: [PATCH] i2c-designware: define i2c_dw_pci_runtime_idle only with runtime pm
On Fri, Sep 27, 2013 at 12:24:03AM +0200, Vincent Stehlé wrote:
> Make sure i2c_dw_pci_runtime_idle() is defined only when actually used, when
> CONFIG_PM_RUNTIME is defined.
>
> This fixes the following compilation warning:
>
> drivers/i2c/busses/i2c-designware-pcidrv.c:188:12: warning:
> ‘i2c_dw_pci_runtime_idle’ defined but not used [-Wunused-function]
>
> Signed-off-by: Vincent Stehlé
> Cc: Wolfram Sang
I wonder if this fix is complete? Mika?
> ---
> drivers/i2c/busses/i2c-designware-pcidrv.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c
> b/drivers/i2c/busses/i2c-designware-pcidrv.c
> index f6ed06c..2b5d3a6 100644
> --- a/drivers/i2c/busses/i2c-designware-pcidrv.c
> +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c
> @@ -185,6 +185,7 @@ static int i2c_dw_pci_resume(struct device *dev)
> return 0;
> }
>
> +#ifdef CONFIG_PM_RUNTIME
> static int i2c_dw_pci_runtime_idle(struct device *dev)
> {
> int err = pm_schedule_suspend(dev, 500);
> @@ -194,6 +195,7 @@ static int i2c_dw_pci_runtime_idle(struct device *dev)
> return 0;
> return -EBUSY;
> }
> +#endif
>
> static const struct dev_pm_ops i2c_dw_pm_ops = {
Shouldn't this be using UNIVERSAL_DEV_PM_OPS with the suspend and resume
function #ifdeffed by CONFIG_PM_SLEEP?
> .resume = i2c_dw_pci_resume,
> --
> 1.8.4.rc3
>
signature.asc
Description: Digital signature
[PATCH v2] i2c: i2c-dev: Create 'name' attribute automatically
The 'name' attribute is needed for all i2c-dev class devices, meaning
it can be created automatically by pointing to it in the class data
structure. This simplifies the code and reduces the probability for race
conditions (the name attribute should exist by the time the device is
announced to user space).
Signed-off-by: Guenter Roeck
---
v2: Use class->dev_groups instead of class->dev_attrs
Better use of device macros
Simplify changes: there is no need to declare i2c_dev_class statically,
so revert to use class_create/class_destroy.
Test results:
$ grep . /sys/class/i2c-dev/*/name
/sys/class/i2c-dev/i2c-0/name:i915 gmbus ssc
/sys/class/i2c-dev/i2c-1/name:i915 gmbus vga
/sys/class/i2c-dev/i2c-2/name:i915 gmbus panel
/sys/class/i2c-dev/i2c-3/name:i915 gmbus dpc
/sys/class/i2c-dev/i2c-4/name:i915 gmbus dpb
/sys/class/i2c-dev/i2c-5/name:i915 gmbus dpd
/sys/class/i2c-dev/i2c-6/name:DPDDC-B
/sys/class/i2c-dev/i2c-7/name:DPDDC-C
/sys/class/i2c-dev/i2c-8/name:DPDDC-D
/sys/class/i2c-dev/i2c-9/name:SMBus I801 adapter at f040
drivers/i2c/i2c-dev.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/i2c/i2c-dev.c b/drivers/i2c/i2c-dev.c
index c3ccdea..80b47e8 100644
--- a/drivers/i2c/i2c-dev.c
+++ b/drivers/i2c/i2c-dev.c
@@ -102,8 +102,8 @@ static void return_i2c_dev(struct i2c_dev *i2c_dev)
kfree(i2c_dev);
}
-static ssize_t show_adapter_name(struct device *dev,
-struct device_attribute *attr, char *buf)
+static ssize_t name_show(struct device *dev,
+struct device_attribute *attr, char *buf)
{
struct i2c_dev *i2c_dev = i2c_dev_get_by_minor(MINOR(dev->devt));
@@ -111,7 +111,13 @@ static ssize_t show_adapter_name(struct device *dev,
return -ENODEV;
return sprintf(buf, "%s\n", i2c_dev->adap->name);
}
-static DEVICE_ATTR(name, S_IRUGO, show_adapter_name, NULL);
+static DEVICE_ATTR_RO(name);
+
+static struct attribute *i2c_attrs[] = {
+ &dev_attr_name.attr,
+ NULL,
+};
+ATTRIBUTE_GROUPS(i2c);
/* - */
@@ -562,15 +568,10 @@ static int i2cdev_attach_adapter(struct device *dev, void
*dummy)
res = PTR_ERR(i2c_dev->dev);
goto error;
}
- res = device_create_file(i2c_dev->dev, &dev_attr_name);
- if (res)
- goto error_destroy;
pr_debug("i2c-dev: adapter [%s] registered as minor %d\n",
adap->name, adap->nr);
return 0;
-error_destroy:
- device_destroy(i2c_dev_class, MKDEV(I2C_MAJOR, adap->nr));
error:
return_i2c_dev(i2c_dev);
return res;
@@ -589,7 +590,6 @@ static int i2cdev_detach_adapter(struct device *dev, void
*dummy)
if (!i2c_dev) /* attach_adapter must have failed */
return 0;
- device_remove_file(i2c_dev->dev, &dev_attr_name);
return_i2c_dev(i2c_dev);
device_destroy(i2c_dev_class, MKDEV(I2C_MAJOR, adap->nr));
@@ -637,6 +637,7 @@ static int __init i2c_dev_init(void)
res = PTR_ERR(i2c_dev_class);
goto out_unreg_chrdev;
}
+ i2c_dev_class->dev_groups = i2c_groups;
/* Keep track of adapters which will be added or removed later */
res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier);
--
1.7.9.7
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Re: [PATCH] i2c-designware: 10-bit addressing mode enabling if I2C_DYNAMIC_TAR_UPDATE is set.
On Fri, Sep 27, 2013 at 02:57:35AM +0800, Chew, Chiau Ee wrote: > According to Designware I2C spec, if I2C_DYNAMIC_TAR_UPDATE is set to 1, > the 10-bit addressing mode is controlled by IC_10BITADDR_MASTER bit of > IC_TAR register instead of IC_CON register. The IC_10BITADDR_MASTER > in IC_CON register becomes read-only copy. Since I2C_DYNAMIC_TAR_UPDATE > value can't be detected from hardware register, so we will always set the > IC_10BITADDR_MASTER bit in both IC_CON and IC_TAR register whenever 10-bit > addresing mode is requested by user application. > > Signed-off-by: Chew, Chiau Ee > Reviewed-by: Mika Westerberg Applied to for-current, thanks! signature.asc Description: Digital signature
[PATCH] i2c-designware: define i2c_dw_pci_runtime_idle only with runtime pm
Make sure i2c_dw_pci_runtime_idle() is defined only when actually used, when
CONFIG_PM_RUNTIME is defined.
This fixes the following compilation warning:
drivers/i2c/busses/i2c-designware-pcidrv.c:188:12: warning:
‘i2c_dw_pci_runtime_idle’ defined but not used [-Wunused-function]
Signed-off-by: Vincent Stehlé
Cc: Wolfram Sang
---
drivers/i2c/busses/i2c-designware-pcidrv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c
b/drivers/i2c/busses/i2c-designware-pcidrv.c
index f6ed06c..2b5d3a6 100644
--- a/drivers/i2c/busses/i2c-designware-pcidrv.c
+++ b/drivers/i2c/busses/i2c-designware-pcidrv.c
@@ -185,6 +185,7 @@ static int i2c_dw_pci_resume(struct device *dev)
return 0;
}
+#ifdef CONFIG_PM_RUNTIME
static int i2c_dw_pci_runtime_idle(struct device *dev)
{
int err = pm_schedule_suspend(dev, 500);
@@ -194,6 +195,7 @@ static int i2c_dw_pci_runtime_idle(struct device *dev)
return 0;
return -EBUSY;
}
+#endif
static const struct dev_pm_ops i2c_dw_pm_ops = {
.resume = i2c_dw_pci_resume,
--
1.8.4.rc3
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Re: [PATCH] misc: (at24) move header to linux/platform_data/
Hi Wolfram, > Wolfram wrote: > > > > IMHO it makes sense. Why wouldn't we want all platform_data in > > > include/linux/platform_data/? > > > > For the same reason we don't want all driver source files in one > > directory? It's a mess. > > Well, that's different. Not all drivers expose platform data, but > many subsystems have drivers with platform data. A common include > directory for the *_platform_data structure definitions makes sense. Also IMO having such header file in include/linux/i2c/ for a driver declared in drivers/misc/eeprom/ is not very consistent. So this is the purpose of this include directory. What do you think? Best, Vivien -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/1] i2c-ismt: add Initialize DMA buffer code ismt_access()
On Thu, Sep 26, 2013 at 10:40:32AM +0200, Wolfram Sang wrote: > On Tue, Sep 24, 2013 at 04:47:55PM -0700, James Ralston wrote: > > This patch adds code to Initialize the DMA buffer to compensate for > > possible hardware data corruption. > > Take care of the line width here. > > > Signed-off-by: James Ralston > > --- > > drivers/i2c/busses/i2c-ismt.c |3 +++ > > 1 files changed, 3 insertions(+), 0 deletions(-) > > > > diff --git a/drivers/i2c/busses/i2c-ismt.c b/drivers/i2c/busses/i2c-ismt.c > > index 8ed79a0..d3f30ea 100644 > > --- a/drivers/i2c/busses/i2c-ismt.c > > +++ b/drivers/i2c/busses/i2c-ismt.c > > @@ -393,6 +393,9 @@ static int ismt_access(struct i2c_adapter *adap, u16 > > addr, > > > > desc = &priv->hw[priv->head]; > > > > + /* Initialize the DMA buffer */ > > + memset(priv->dma_buffer, 0, (I2C_SMBUS_BLOCK_MAX+1)); > > sizeof()? > Agreed. Neil > > + > > /* Initialize the descriptor */ > > memset(desc, 0, sizeof(struct ismt_desc)); > > desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, read_write); > > -- > > 1.7.7.6 > > -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] i2c-designware: 10-bit addressing mode enabling if I2C_DYNAMIC_TAR_UPDATE is set.
According to Designware I2C spec, if I2C_DYNAMIC_TAR_UPDATE is set to 1,
the 10-bit addressing mode is controlled by IC_10BITADDR_MASTER bit of
IC_TAR register instead of IC_CON register. The IC_10BITADDR_MASTER
in IC_CON register becomes read-only copy. Since I2C_DYNAMIC_TAR_UPDATE
value can't be detected from hardware register, so we will always set the
IC_10BITADDR_MASTER bit in both IC_CON and IC_TAR register whenever 10-bit
addresing mode is requested by user application.
Signed-off-by: Chew, Chiau Ee
Reviewed-by: Mika Westerberg
---
drivers/i2c/busses/i2c-designware-core.c | 26 --
1 files changed, 20 insertions(+), 6 deletions(-)
diff --git a/drivers/i2c/busses/i2c-designware-core.c
b/drivers/i2c/busses/i2c-designware-core.c
index dbecf08..5888fee 100644
--- a/drivers/i2c/busses/i2c-designware-core.c
+++ b/drivers/i2c/busses/i2c-designware-core.c
@@ -98,6 +98,8 @@
#define DW_IC_ERR_TX_ABRT 0x1
+#define DW_IC_TAR_10BITADDR_MASTER BIT(12)
+
/*
* status codes
*/
@@ -388,22 +390,34 @@ static int i2c_dw_wait_bus_not_busy(struct dw_i2c_dev
*dev)
static void i2c_dw_xfer_init(struct dw_i2c_dev *dev)
{
struct i2c_msg *msgs = dev->msgs;
- u32 ic_con;
+ u32 ic_con, ic_tar = 0;
/* Disable the adapter */
__i2c_dw_enable(dev, false);
- /* set the slave (target) address */
- dw_writel(dev, msgs[dev->msg_write_idx].addr, DW_IC_TAR);
-
/* if the slave address is ten bit address, enable 10BITADDR */
ic_con = dw_readl(dev, DW_IC_CON);
- if (msgs[dev->msg_write_idx].flags & I2C_M_TEN)
+ if (msgs[dev->msg_write_idx].flags & I2C_M_TEN) {
ic_con |= DW_IC_CON_10BITADDR_MASTER;
- else
+ /*
+* If I2C_DYNAMIC_TAR_UPDATE is set, the 10-bit addressing
+* mode has to be enabled via bit 12 of IC_TAR register.
+* We set it always as I2C_DYNAMIC_TAR_UPDATE can't be
+* detected from registers.
+*/
+ ic_tar = DW_IC_TAR_10BITADDR_MASTER;
+ } else {
ic_con &= ~DW_IC_CON_10BITADDR_MASTER;
+ }
+
dw_writel(dev, ic_con, DW_IC_CON);
+ /*
+* Set the slave (target) address and enable 10-bit addressing mode
+* if applicable.
+*/
+ dw_writel(dev, msgs[dev->msg_write_idx].addr | ic_tar, DW_IC_TAR);
+
/* Enable the adapter */
__i2c_dw_enable(dev, true);
--
1.7.4.4
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Re: [PATCH 2/9] irqdomain: Introduce __irq_create_mapping()
On Tue, Sep 24, 2013 at 8:28 PM, Thierry Reding wrote: > Given that linux-next might not be with us for much longer before the > 3.12 release, I'm thinking of deferring the series until then. Or at > least trying to get it merged. Otherwise we'll probably have to deal > with a lot of fall out during the merge window. Hm, how unfortunate. Typically this is the kind of topic branch that should go in separately to linux-next. > In any case, it'd be nice to get some feedback on the general idea of > the patch series from other people involved. I'd hate to do all the > conversions just to have it NAKed at the last minute. With the direction we've discussed here atleast I won't be doing any NACKing if it's of any help... Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] i2c: i2c-dev: Create 'name' attribute automatically
On 09/26/2013 01:28 AM, Wolfram Sang wrote: Hi, What race condition? Userspace trying to access the name attribute before it is created. See http://kroah.com/log/blog/2013/06/26/how-to-create-a-sysfs-file-correctly/ Thanks! Have you tried this with two instances? I don't think it will work since class_register modifies the class struct. Half a dozen instances, actually. Unless I am missing something, seems to be My bad. Sorry for the noise. Anyway, the patch is obsolete; one is supposed to use class->dev_groups now. Are you willing to update the patch? Sure. Give me a couple of days. Thanks, Guenter -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 2/4] ARM: STi: Supply I2C configuration to STiH416 SoC
This patch supplies I2C configuration to STiH416 SoC.
Cc: Srinivas Kandagatla
Signed-off-by: Maxime Coquelin
---
arch/arm/boot/dts/stih416-pinctrl.dtsi | 35 +
arch/arm/boot/dts/stih416.dtsi | 65
2 files changed, 100 insertions(+)
diff --git a/arch/arm/boot/dts/stih416-pinctrl.dtsi
b/arch/arm/boot/dts/stih416-pinctrl.dtsi
index 0f246c9..b29ff4b 100644
--- a/arch/arm/boot/dts/stih416-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih416-pinctrl.dtsi
@@ -97,6 +97,24 @@
};
};
};
+
+ sbc_i2c0 {
+ pinctrl_sbc_i2c0_default: sbc_i2c0-default {
+ st,pins {
+ sda = <&PIO4 6 ALT1 BIDIR>;
+ scl = <&PIO4 5 ALT1 BIDIR>;
+ };
+ };
+ };
+
+ sbc_i2c1 {
+ pinctrl_sbc_i2c1_default: sbc_i2c1-default {
+ st,pins {
+ sda = <&PIO3 2 ALT2 BIDIR>;
+ scl = <&PIO3 1 ALT2 BIDIR>;
+ };
+ };
+ };
};
pin-controller-front {
@@ -175,6 +193,23 @@
};
};
+ i2c0 {
+ pinctrl_i2c0_default: i2c0-default {
+ st,pins {
+ sda = <&PIO9 3 ALT1 BIDIR>;
+ scl = <&PIO9 2 ALT1 BIDIR>;
+ };
+ };
+ };
+
+ i2c1 {
+ pinctrl_i2c1_default: i2c1-default {
+ st,pins {
+ sda = <&PIO12 1 ALT1 BIDIR>;
+ scl = <&PIO12 0 ALT1 BIDIR>;
+ };
+ };
+ };
};
pin-controller-rear {
diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi
index 1a0326e..a3069a8 100644
--- a/arch/arm/boot/dts/stih416.dtsi
+++ b/arch/arm/boot/dts/stih416.dtsi
@@ -9,6 +9,7 @@
#include "stih41x.dtsi"
#include "stih416-clock.dtsi"
#include "stih416-pinctrl.dtsi"
+#include
/ {
L2: cache-controller {
compatible = "arm,pl310-cache";
@@ -92,5 +93,69 @@
pinctrl-0 = <&pinctrl_sbc_serial1>;
clocks = <&CLK_SYSIN>;
};
+
+ i2c@fed4 {
+ compatible = "st,comms-ssc-i2c";
+ reg = <0xfed4 0x110>;
+ interrupts = ;
+ clocks = <&CLK_S_ICN_REG_0>;
+ clock-names = "ssc";
+ clock-frequency = <40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0_default>;
+ st,glitches;
+ st,glitch-clk = <500>;
+ st,glitch-dat = <500>;
+
+ status = "disabled";
+ };
+
+ i2c@fed41000 {
+ compatible = "st,comms-ssc-i2c";
+ reg = <0xfed41000 0x110>;
+ interrupts = ;
+ clocks = <&CLK_S_ICN_REG_0>;
+ clock-names = "ssc";
+ clock-frequency = <40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_default>;
+ st,glitches;
+ st,glitch-clk = <500>;
+ st,glitch-dat = <500>;
+
+ status = "disabled";
+ };
+
+ i2c@fe54 {
+ compatible = "st,comms-ssc-i2c";
+ reg = <0xfe54 0x110>;
+ interrupts = ;
+ clocks = <&CLK_SYSIN>;
+ clock-names = "ssc";
+ clock-frequency = <40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sbc_i2c0_default>;
+ st,glitches;
+ st,glitch-clk = <500>;
[PATCH v2 3/4] ARM: STi: Supply I2C configuration to STiH415 SoC
This patch supplies I2C configuration to STiH415 SoC.
Cc: Srinivas Kandagatla
Signed-off-by: Maxime Coquelin
---
arch/arm/boot/dts/stih415-pinctrl.dtsi | 36 ++
arch/arm/boot/dts/stih415.dtsi | 65
2 files changed, 101 insertions(+)
diff --git a/arch/arm/boot/dts/stih415-pinctrl.dtsi
b/arch/arm/boot/dts/stih415-pinctrl.dtsi
index 1d322b2..e56449d 100644
--- a/arch/arm/boot/dts/stih415-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih415-pinctrl.dtsi
@@ -86,6 +86,24 @@
};
};
};
+
+ sbc_i2c0 {
+ pinctrl_sbc_i2c0_default: sbc_i2c0-default {
+ st,pins {
+ sda = <&PIO4 6 ALT1 BIDIR>;
+ scl = <&PIO4 5 ALT1 BIDIR>;
+ };
+ };
+ };
+
+ sbc_i2c1 {
+ pinctrl_sbc_i2c1_default: sbc_i2c1-default {
+ st,pins {
+ sda = <&PIO3 2 ALT2 BIDIR>;
+ scl = <&PIO3 1 ALT2 BIDIR>;
+ };
+ };
+ };
};
pin-controller-front {
@@ -143,6 +161,24 @@
reg = <0x7000 0x100>;
st,bank-name= "PIO12";
};
+
+ i2c0 {
+ pinctrl_i2c0_default: i2c0-default {
+ st,pins {
+ sda = <&PIO9 3 ALT1 BIDIR>;
+ scl = <&PIO9 2 ALT1 BIDIR>;
+ };
+ };
+ };
+
+ i2c1 {
+ pinctrl_i2c1_default: i2c1-default {
+ st,pins {
+ sda = <&PIO12 1 ALT1 BIDIR>;
+ scl = <&PIO12 0 ALT1 BIDIR>;
+ };
+ };
+ };
};
pin-controller-rear {
diff --git a/arch/arm/boot/dts/stih415.dtsi b/arch/arm/boot/dts/stih415.dtsi
index 74ab8de..12598c5 100644
--- a/arch/arm/boot/dts/stih415.dtsi
+++ b/arch/arm/boot/dts/stih415.dtsi
@@ -9,6 +9,7 @@
#include "stih41x.dtsi"
#include "stih415-clock.dtsi"
#include "stih415-pinctrl.dtsi"
+#include
/ {
L2: cache-controller {
@@ -83,5 +84,69 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sbc_serial1>;
};
+
+ i2c@fed4 {
+ compatible = "st,comms-ssc-i2c";
+ reg = <0xfed4 0x110>;
+ interrupts = ;
+ clocks = <&CLKS_ICN_REG_0>;
+ clock-names = "ssc";
+ clock-frequency = <40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0_default>;
+ st,glitches;
+ st,glitch-clk = <500>;
+ st,glitch-dat = <500>;
+
+ status = "disabled";
+ };
+
+ i2c@fed41000 {
+ compatible = "st,comms-ssc-i2c";
+ reg = <0xfed41000 0x110>;
+ interrupts = ;
+ clocks = <&CLKS_ICN_REG_0>;
+ clock-names = "ssc";
+ clock-frequency = <40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_default>;
+ st,glitches;
+ st,glitch-clk = <500>;
+ st,glitch-dat = <500>;
+
+ status = "disabled";
+ };
+
+ i2c@fe54 {
+ compatible = "st,comms-ssc-i2c";
+ reg = <0xfe54 0x110>;
+ interrupts = ;
+ clocks = <&CLK_SYSIN>;
+ clock-names = "ssc";
+ clock-frequency = <40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sbc_i2c0_default>;
+ st,glitches;
+
[PATCH v2 4/4] ARM: STi: Add I2C config to B2000 and B2020 boards
This patch supplies I2C configuration to B2000 and B2020
based on either STiH415 or STiH416 SoCs.
Cc: Srinivas Kandagatla
Signed-off-by: Maxime Coquelin
---
arch/arm/boot/dts/stih41x-b2000.dtsi |7 +++
arch/arm/boot/dts/stih41x-b2020.dtsi | 20
2 files changed, 27 insertions(+)
diff --git a/arch/arm/boot/dts/stih41x-b2000.dtsi
b/arch/arm/boot/dts/stih41x-b2000.dtsi
index 8e694d2..0078a9e 100644
--- a/arch/arm/boot/dts/stih41x-b2000.dtsi
+++ b/arch/arm/boot/dts/stih41x-b2000.dtsi
@@ -37,5 +37,12 @@
};
};
+ /* HDMI Tx I2C */
+ i2c@fed41000 {
+ /* HDMI V1.3a supports Standard mode only */
+ clock-frequency = <10>;
+
+ status = "okay";
+ };
};
};
diff --git a/arch/arm/boot/dts/stih41x-b2020.dtsi
b/arch/arm/boot/dts/stih41x-b2020.dtsi
index 133e181..70ce017 100644
--- a/arch/arm/boot/dts/stih41x-b2020.dtsi
+++ b/arch/arm/boot/dts/stih41x-b2020.dtsi
@@ -38,5 +38,25 @@
default-state = "off";
};
};
+
+ i2c@fed4 {
+ status = "okay";
+ };
+
+ /* HDMI Tx I2C */
+ i2c@fed41000 {
+ /* HDMI V1.3a supports Standard mode only */
+ clock-frequency = <10>;
+
+ status = "okay";
+ };
+
+ i2c@fe54 {
+ status = "okay";
+ };
+
+ i2c@fe541000 {
+ status = "okay";
+ };
};
};
--
1.7.9.5
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[PATCH v2 1/4] i2c: busses: i2c-st: Add ST I2C controller
This patch adds support to SSC (Synchronous Serial Controller)
I2C driver. This IP also supports SPI protocol, but this is not
the aim of this driver.
This IP is embedded in all ST SoCs for Set-top box platorms, and
supports I2C Standard and Fast modes.
Signed-off-by: Maxime Coquelin
Cc: Srinivas Kandagatla
---
Documentation/devicetree/bindings/i2c/i2c-st.txt | 37 ++
drivers/i2c/busses/Kconfig | 10 +
drivers/i2c/busses/Makefile |1 +
drivers/i2c/busses/i2c-st.c | 691 ++
drivers/i2c/busses/i2c-st.h | 208 +++
5 files changed, 947 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-st.txt
create mode 100644 drivers/i2c/busses/i2c-st.c
create mode 100644 drivers/i2c/busses/i2c-st.h
diff --git a/Documentation/devicetree/bindings/i2c/i2c-st.txt
b/Documentation/devicetree/bindings/i2c/i2c-st.txt
new file mode 100644
index 000..d1e55c0
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-st.txt
@@ -0,0 +1,37 @@
+ST SSC binding, for I2C mode operation
+
+Required properties :
+- compatible : Must be "st,comms-i2c"
+- reg : Offset and length of the register set for the device
+- interrupts : the interrupt specifier
+- clocks : phandle to the I2C clock source
+- clock-names : from common clock binding: Shall be "ssc"
+
+Recommended properties :
+- clock-frequency : Desired I2C bus clock frequency in Hz. Otherwise
+ the default 100 kHz frequency will be used. As only Normal and Fast modes
+ are supported, possible values are 10 and 40.
+
+Optional properties :
+- st,needs-antiglitch-filter : The board design needs glitch suppression
+ enabled to operate reliably.
+- st,min-scl-pulse-width : The minimum valid SCL pulse width that is allowed
+ through the deglitch circuit. In units of us.
+- st,min-sda-pulse-width : The minimum valid SDA pulse width that is allowed
+ through the deglitch circuit. In units of us.
+
+Examples :
+
+i2c0: i2c@fed4 {
+ compatible = "st,comms-ssc-i2c";
+ reg = <0xfed4 0x110>;
+ interrupts = ;
+ clocks = <&CLK_S_ICN_REG_0>;
+ clock-names = "ssc";
+ clock-frequency = <40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0_default>;
+ st,needs-antiglitch-filter;
+ st,min-scl-pulse-width = 0;
+ st,min-sda-pulse-width = 5;
+};
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index cdcbd83..18ff129 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -776,6 +776,16 @@ config I2C_RCAR
This driver can also be built as a module. If so, the module
will be called i2c-rcar.
+config I2C_ST
+ tristate "STMicroelectronics SSC I2C support"
+ depends on ARCH_STI
+ help
+ Enable this option to add support for STMicroelectronics SoCs
+ hardware SSC (Synchronous Serial Controller) as an I2C controller.
+
+ This driver can also be built as module. If so, the module
+ will be called i2c-st.
+
comment "External I2C/SMBus adapter drivers"
config I2C_DIOLAN_U2C
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index d00997f..9ea5d422 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -92,5 +92,6 @@ obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o
obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o
obj-$(CONFIG_SCx200_ACB) += scx200_acb.o
obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o
+obj-$(CONFIG_I2C_ST) += i2c-st.o
ccflags-$(CONFIG_I2C_DEBUG_BUS) := -DDEBUG
diff --git a/drivers/i2c/busses/i2c-st.c b/drivers/i2c/busses/i2c-st.c
new file mode 100644
index 000..7eb3be4
--- /dev/null
+++ b/drivers/i2c/busses/i2c-st.c
@@ -0,0 +1,691 @@
+/*
+ * Copyright (C) 2013 STMicroelectronics
+ *
+ * I2C master mode controller driver, used in STMicroelectronics devices.
+ *
+ * Author: Maxime Coquelin
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "i2c-st.h"
+
+#define DRIVER_NAME "st-i2c"
+
+/* From I2C Specifications v0.5 */
+static struct st_i2c_timings i2c_timings[] = {
+ [I2C_MODE_STANDARD] = {
+ .rate = 10,
+ .rep_start_hold = 4000,
+ .rep_start_setup= 4700,
+ .start_hold = 4000,
+ .data_setup_time= 250,
+ .stop_setup_time= 4000,
+ .bus_free_time = 4700,
+ },
+ [I2C_MODE_FAST] = {
+ .rate = 40,
+ .rep_start_hold
[PATCH v2 0/4] Add I2C support to ST SoCs
The goal of this series is to add I2C support to ST SoCs. The DT definition is added for STiH415 and STiH416 SoCs on B2000 and B2020 boards. The series has been tested working on STiH416-B2020 board. It applies on top of v3.12-rc1. Changes since v1: - Anti-glitch filtering simplified (Only HW Anti-glitch is kept) - Update I2C timings to comply with I2C specification - Handle spurious interrupts properly - DT binding updates taking into account Stephen's comments - Use "clock-names" property to comply with GCF - DT cosmetic changes reported by Lee and Gabriel Signed-off-by: Maxime Coquelin Maxime Coquelin (4): i2c: busses: i2c-st: Add ST I2C controller ARM: STi: Supply I2C configuration to STiH416 SoC ARM: STi: Supply I2C configuration to STiH415 SoC ARM: STi: Add I2C config to B2000 and B2020 boards Documentation/devicetree/bindings/i2c/i2c-st.txt | 37 ++ arch/arm/boot/dts/stih415-pinctrl.dtsi | 36 ++ arch/arm/boot/dts/stih415.dtsi | 65 ++ arch/arm/boot/dts/stih416-pinctrl.dtsi | 35 ++ arch/arm/boot/dts/stih416.dtsi | 65 ++ arch/arm/boot/dts/stih41x-b2000.dtsi |7 + arch/arm/boot/dts/stih41x-b2020.dtsi | 20 + drivers/i2c/busses/Kconfig | 10 + drivers/i2c/busses/Makefile |1 + drivers/i2c/busses/i2c-st.c | 691 ++ drivers/i2c/busses/i2c-st.h | 208 +++ 11 files changed, 1175 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/i2c-st.txt create mode 100644 drivers/i2c/busses/i2c-st.c create mode 100644 drivers/i2c/busses/i2c-st.h -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 0/4] Add I2C support to ST SoCs
The goal of this series is to add I2C support to ST SoCs. The DT definition is added for STiH415 and STiH416 SoCs on B2000 and B2020 boards. The series has been tested working on STiH416-B2020 board. It applies on top of v3.12-rc1. Changes since v1: - Anti-glitch filtering simplified (Only HW Anti-glitch is kept) - Update I2C timings to comply with I2C specification - Handle spurious interrupts properly - DT binding updates taking into account Stephen's comments - Use "clock-names" property to comply with GCF - DT cosmetic changes reported by Lee and Gabriel Signed-off-by: Maxime Coquelin Maxime Coquelin (4): i2c: busses: i2c-st: Add ST I2C controller ARM: STi: Supply I2C configuration to STiH416 SoC ARM: STi: Supply I2C configuration to STiH415 SoC ARM: STi: Add I2C config to B2000 and B2020 boards Documentation/devicetree/bindings/i2c/i2c-st.txt | 37 ++ arch/arm/boot/dts/stih415-pinctrl.dtsi | 36 ++ arch/arm/boot/dts/stih415.dtsi | 65 ++ arch/arm/boot/dts/stih416-pinctrl.dtsi | 35 ++ arch/arm/boot/dts/stih416.dtsi | 65 ++ arch/arm/boot/dts/stih41x-b2000.dtsi |7 + arch/arm/boot/dts/stih41x-b2020.dtsi | 20 + drivers/i2c/busses/Kconfig | 10 + drivers/i2c/busses/Makefile |1 + drivers/i2c/busses/i2c-st.c | 691 ++ drivers/i2c/busses/i2c-st.h | 208 +++ 11 files changed, 1175 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/i2c-st.txt create mode 100644 drivers/i2c/busses/i2c-st.c create mode 100644 drivers/i2c/busses/i2c-st.h -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/4] i2c: busses: i2c-st: Add ST I2C controller
On 09/24/2013 05:59 PM, Wolfram Sang wrote: >> "glitch" is is used to tune the I2C timing requirements, and has a >> nanosecond granularity. >> These values are added to default timing values. >> I'm not 100% sure, but it looks like the "samsung,i2c-sda-delay" in the >> i2c-s3c2410 driver. > For that, we have the generic "i2c-sda-hold-time-ns" property. The s3c > driver hasn't been converted to use it, sadly. > Ok, thank you for pointing this out. After some checks, this property doesn't match with what is done in this driver. In the v2 series I am sending, I removed the I2C timing tuning as it works on all the boards I have tested with. I will only keep the anti-glitch filtering, using private properties as I didn't find any generic ones that could fit. Regards, Maxime -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/1] i2c-ismt: add Initialize DMA buffer code ismt_access()
On Tue, Sep 24, 2013 at 04:47:55PM -0700, James Ralston wrote: > This patch adds code to Initialize the DMA buffer to compensate for possible > hardware data corruption. Take care of the line width here. > Signed-off-by: James Ralston > --- > drivers/i2c/busses/i2c-ismt.c |3 +++ > 1 files changed, 3 insertions(+), 0 deletions(-) > > diff --git a/drivers/i2c/busses/i2c-ismt.c b/drivers/i2c/busses/i2c-ismt.c > index 8ed79a0..d3f30ea 100644 > --- a/drivers/i2c/busses/i2c-ismt.c > +++ b/drivers/i2c/busses/i2c-ismt.c > @@ -393,6 +393,9 @@ static int ismt_access(struct i2c_adapter *adap, u16 addr, > > desc = &priv->hw[priv->head]; > > + /* Initialize the DMA buffer */ > + memset(priv->dma_buffer, 0, (I2C_SMBUS_BLOCK_MAX+1)); sizeof()? > + > /* Initialize the descriptor */ > memset(desc, 0, sizeof(struct ismt_desc)); > desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, read_write); > -- > 1.7.7.6 > signature.asc Description: Digital signature
Re: [PATCH] i2c: i2c-dev: Create 'name' attribute automatically
Hi, > > What race condition? > > > > Userspace trying to access the name attribute before it is created. > See http://kroah.com/log/blog/2013/06/26/how-to-create-a-sysfs-file-correctly/ Thanks! > > Have you tried this with two instances? I don't think it will work since > > class_register modifies the class struct. > > > Half a dozen instances, actually. Unless I am missing something, seems to be My bad. Sorry for the noise. > Anyway, the patch is obsolete; one is supposed to use class->dev_groups now. Are you willing to update the patch? Thanks, Wolfram signature.asc Description: Digital signature
