[V1, 2/2] dt-bindings: i2c: Update i2c-brcmstb compatible string
Adding compatibility with the DSL and CM SoCs that use the "Peripheral" i2c hardware. "brcm,brcmper-i2c" is also an allowed string. Signed-off-by: Kamal Dasu --- Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt b/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt index d6f724e..aeceace 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt @@ -2,7 +2,7 @@ Broadcom stb bsc iic master controller Required properties: -- compatible: should be "brcm,brcmstb-i2c" +- compatible: should be "brcm,brcmstb-i2c" or "brcm,brcmper-i2c" - clock-frequency: 32-bit decimal value of iic master clock freqency in Hz valid values are 375000, 39, 187500, 20 93750, 97500, 46875 and 5 -- 2.3.2 -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[V1, 1/2] i2c: brcmstb: Adding support for CM and DSL SoCs
Broadcoms DSL, CM (cable modem)and STB I2C core implementation have
8 data in/out registers that can transfer 8 bytes or 32 bytes max.
Cable and DSL "Peripheral" i2c cores use single byte per data
register and the STB can use 4 byte per data register transfer.
Adding support to take care of this difference. Accordingly added
the compatible string for SoCs using the "Peripheral" I2C block.
Signed-off-by: Kamal Dasu
---
drivers/i2c/busses/i2c-brcmstb.c | 80
1 file changed, 56 insertions(+), 24 deletions(-)
diff --git a/drivers/i2c/busses/i2c-brcmstb.c b/drivers/i2c/busses/i2c-brcmstb.c
index 8e9637e..3711df1 100644
--- a/drivers/i2c/busses/i2c-brcmstb.c
+++ b/drivers/i2c/busses/i2c-brcmstb.c
@@ -25,13 +25,16 @@
#include
#define N_DATA_REGS8
-#define N_DATA_BYTES (N_DATA_REGS * 4)
-/* BSC count register field definitions */
-#define BSC_CNT_REG1_MASK 0x003f
-#define BSC_CNT_REG1_SHIFT 0
-#define BSC_CNT_REG2_MASK 0x0fc0
-#define BSC_CNT_REG2_SHIFT 6
+/*
+ * PER_I2C/BSC count register mask depends on 1 byte/4 byte data register
+ * size. Cable modem and DSL SoCs with Peripheral i2c cores use 1 byte per
+ * data register whereas STB SoCs use 4 byte per data register transfer,
+ * account for this difference in total count per transaction and mask to
+ * use.
+ */
+#define BSC_CNT_REG1_MASK(nb) (nb == 1 ? GENMASK(3, 0) : GENMASK(5, 0))
+#define BSC_CNT_REG1_SHIFT 0
/* BSC CTL register field definitions */
#define BSC_CTL_REG_DTF_MASK 0x0003
@@ -41,7 +44,7 @@
#define BSC_CTL_REG_INT_EN_SHIFT 6
#define BSC_CTL_REG_DIV_CLK_MASK 0x0080
-/* BSC_IIC_ENABLE r/w enable and interrupt field defintions */
+/* BSC_IIC_ENABLE r/w enable and interrupt field definitions */
#define BSC_IIC_EN_RESTART_MASK0x0040
#define BSC_IIC_EN_NOSTART_MASK0x0020
#define BSC_IIC_EN_NOSTOP_MASK 0x0010
@@ -169,6 +172,7 @@ struct brcmstb_i2c_dev {
struct completion done;
bool is_suspended;
u32 clk_freq_hz;
+ int data_regsz;
};
/* register accessors for both be and le cpu arch */
@@ -186,6 +190,16 @@ struct brcmstb_i2c_dev {
#define bsc_writel(_dev, _val, _reg) \
__bsc_writel(_val, _dev->base + offsetof(struct bsc_regs, _reg))
+static inline int brcmstb_i2c_get_xfersz(struct brcmstb_i2c_dev *dev)
+{
+ return (N_DATA_REGS * dev->data_regsz);
+}
+
+static inline int brcmstb_i2c_get_data_regsz(struct brcmstb_i2c_dev *dev)
+{
+ return dev->data_regsz;
+}
+
static void brcmstb_i2c_enable_disable_irq(struct brcmstb_i2c_dev *dev,
bool int_en)
{
@@ -323,14 +337,16 @@ static int brcmstb_i2c_xfer_bsc_data(struct
brcmstb_i2c_dev *dev,
u8 *buf, unsigned int len,
struct i2c_msg *pmsg)
{
- int cnt, byte, rc;
+ int cnt, byte, i, rc;
enum bsc_xfer_cmd cmd;
u32 ctl_reg;
struct bsc_regs *pi2creg = dev->bsc_regmap;
int no_ack = pmsg->flags & I2C_M_IGNORE_NAK;
+ int data_regsz = brcmstb_i2c_get_data_regsz(dev);
+ int xfersz = brcmstb_i2c_get_xfersz(dev);
/* see if the transaction needs to check NACK conditions */
- if (no_ack || len <= N_DATA_BYTES) {
+ if (no_ack || len <= xfersz) {
cmd = (pmsg->flags & I2C_M_RD) ? CMD_RD_NOACK
: CMD_WR_NOACK;
pi2creg->ctlhi_reg |= BSC_CTLHI_REG_IGNORE_ACK_MASK;
@@ -348,20 +364,22 @@ static int brcmstb_i2c_xfer_bsc_data(struct
brcmstb_i2c_dev *dev,
pi2creg->ctl_reg = ctl_reg | DTF_RD_MASK;
/* set the read/write length */
- bsc_writel(dev, BSC_CNT_REG1_MASK & (len << BSC_CNT_REG1_SHIFT),
- cnt_reg);
+ bsc_writel(dev, BSC_CNT_REG1_MASK(data_regsz) &
+ (len << BSC_CNT_REG1_SHIFT), cnt_reg);
/* Write data into data_in register */
+
if (cmd == CMD_WR || cmd == CMD_WR_NOACK) {
- for (cnt = 0; cnt < len; cnt += 4) {
+ for (cnt = 0, i = 0; cnt < len; cnt += data_regsz, i++) {
u32 word = 0;
- for (byte = 0; byte < 4; byte++) {
- word >>= 8;
+ for (byte = 0; byte < data_regsz; byte++) {
+ word >>= BITS_PER_BYTE;
if ((cnt + byte) < len)
-
[V5, 1/2] i2c: brcmstb: Add Broadcom settop SoC i2c controller driver
Adding support for i2c controller driver for Broadcom settop SoCs. Signed-off-by: Kamal Dasu --- V5 Changes: Removed unnecessary dev_err logging Changed intr timeout dev_err(...) to dev_dbg(...) --- drivers/i2c/busses/Kconfig | 10 + drivers/i2c/busses/Makefile | 1 + drivers/i2c/busses/i2c-brcmstb.c | 695 +++ 3 files changed, 706 insertions(+) create mode 100644 drivers/i2c/busses/i2c-brcmstb.c diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 2255af2..c35903a 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -392,6 +392,16 @@ config I2C_BCM_KONA If you do not need KONA I2C interface, say N. +config I2C_BRCMSTB + tristate "BRCM Settop I2C controller" + depends on ARCH_BRCMSTB || COMPILE_TEST + default y + help + If you say yes to this option, support will be included for the + I2C interface on the Broadcom Settop SoCs. + + If you do not need I2C interface, say N. + config I2C_BLACKFIN_TWI tristate "Blackfin TWI I2C support" depends on BLACKFIN diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index cdf941d..aedea68 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile @@ -105,6 +105,7 @@ obj-$(CONFIG_I2C_VIPERBOARD)+= i2c-viperboard.o # Other I2C/SMBus bus drivers obj-$(CONFIG_I2C_ACORN)+= i2c-acorn.o obj-$(CONFIG_I2C_BCM_KONA) += i2c-bcm-kona.o +obj-$(CONFIG_I2C_BRCMSTB) += i2c-brcmstb.o obj-$(CONFIG_I2C_CROS_EC_TUNNEL) += i2c-cros-ec-tunnel.o obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o obj-$(CONFIG_I2C_OPAL) += i2c-opal.o diff --git a/drivers/i2c/busses/i2c-brcmstb.c b/drivers/i2c/busses/i2c-brcmstb.c new file mode 100644 index 000..5c81fae --- /dev/null +++ b/drivers/i2c/busses/i2c-brcmstb.c @@ -0,0 +1,695 @@ +/* + * Copyright (C) 2014 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define N_DATA_REGS8 +#define N_DATA_BYTES (N_DATA_REGS * 4) + +/* BSC count register field definitions */ +#define BSC_CNT_REG1_MASK 0x003f +#define BSC_CNT_REG1_SHIFT 0 +#define BSC_CNT_REG2_MASK 0x0fc0 +#define BSC_CNT_REG2_SHIFT 6 + +/* BSC CTL register field definitions */ +#define BSC_CTL_REG_DTF_MASK 0x0003 +#define BSC_CTL_REG_SCL_SEL_MASK 0x0030 +#define BSC_CTL_REG_SCL_SEL_SHIFT 4 +#define BSC_CTL_REG_INT_EN_MASK0x0040 +#define BSC_CTL_REG_INT_EN_SHIFT 6 +#define BSC_CTL_REG_DIV_CLK_MASK 0x0080 + +/* BSC_IIC_ENABLE r/w enable and interrupt field defintions */ +#define BSC_IIC_EN_RESTART_MASK0x0040 +#define BSC_IIC_EN_NOSTART_MASK0x0020 +#define BSC_IIC_EN_NOSTOP_MASK 0x0010 +#define BSC_IIC_EN_NOACK_MASK 0x0004 +#define BSC_IIC_EN_INTRP_MASK 0x0002 +#define BSC_IIC_EN_ENABLE_MASK 0x0001 + +/* BSC_CTLHI control register field definitions */ +#define BSC_CTLHI_REG_INPUT_SWITCHING_LEVEL_MASK 0x0080 +#define BSC_CTLHI_REG_DATAREG_SIZE_MASK0x0040 +#define BSC_CTLHI_REG_IGNORE_ACK_MASK 0x0002 +#define BSC_CTLHI_REG_WAIT_DIS_MASK0x0001 + +#define I2C_TIMEOUT100 /* msecs */ + +/* Condition mask used for non combined transfer */ +#define COND_RESTART BSC_IIC_EN_RESTART_MASK +#define COND_NOSTART BSC_IIC_EN_NOSTART_MASK +#define COND_NOSTOPBSC_IIC_EN_NOSTOP_MASK +#define COND_START_STOP(COND_RESTART | COND_NOSTART | COND_NOSTOP) + +/* BSC data transfer direction */ +#define DTF_WR_MASK0x +#define DTF_RD_MASK0x0001 +/* BSC data transfer direction combined format */ +#define DTF_RD_WR_MASK 0x0002 +#define DTF_WR_RD_MASK 0x0003 + +#define INT_ENABLE true +#define INT_DISABLE
[V5, 2/2] dt-bindings: i2c: Add i2c-brcmstb dt bindings
i2c Device tree binding documentation for brcmstb
SoCs.
Signed-off-by: Kamal Dasu
---
.../devicetree/bindings/i2c/i2c-brcmstb.txt| 28 ++
1 file changed, 28 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt
diff --git a/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt
b/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt
new file mode 100644
index 000..d6f724e
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt
@@ -0,0 +1,28 @@
+Broadcom stb bsc iic master controller
+
+Required properties:
+
+- compatible: should be "brcm,brcmstb-i2c"
+- clock-frequency: 32-bit decimal value of iic master clock freqency in Hz
+ valid values are 375000, 39, 187500, 20
+ 93750, 97500, 46875 and 5
+- reg: specifies the base physical address and size of the registers
+
+Optional properties :
+
+- interrupt-parent: specifies the phandle to the parent interrupt controller
+ this one is cascaded from
+- interrupts: specifies the interrupt number, the irq line to be used
+- interrupt-names: Interrupt name string
+
+Example:
+
+bsca: i2c@f0406200 {
+ clock-frequency = <39>;
+ compatible = "brcm,brcmstb-i2c";
+ interrupt-parent = <&irq0_intc>;
+ reg = <0xf0406200 0x58>;
+ interrupts = <0x18>;
+ interrupt-names = "upg_bsca";
+};
+
--
2.3.2
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Re: [V4, 1/2] i2c: brcmstb: Add Broadcom settop SoC i2c controller driver
Wolfram,
>
> Don't print out, it will spoil the logs. Timeouts can happen on I2C
> busses, no need to inform the user.
>
If ii is alright with you I will change the dev_err(...)messages to
dev_dbg(...) so that they do not spoil the logs.
>> + rc = of_property_read_string(dev->device->of_node, "interrupt-names",
>> + &int_name);
>
> I haven't checked but is that really needed? of_irq_to_resource() seems
> to parse the "interrupt-names" property
Since the driver also fall's back to polling it will not work in case
there is no irq domain assigned. The above approach works for both
cases. So we do need it.
Thanks
Kamal
On Wed, Jun 3, 2015 at 11:54 AM, Wolfram Sang wrote:
> On Tue, May 19, 2015 at 12:23:44PM -0400, Kamal Dasu wrote:
>> Adding support for i2c controller driver for Broadcom settop
>> SoCs.
>>
>> Signed-off-by: Kamal Dasu
>
> We are very close.
>
>> +/* Wait for device to be ready */
>> +static int brcmstb_i2c_wait_if_busy(struct brcmstb_i2c_dev *dev)
>> +{
>> + unsigned long timeout = jiffies + msecs_to_jiffies(I2C_TIMEOUT);
>> +
>> + while ((bsc_readl(dev, iic_enable) & BSC_IIC_EN_INTRP_MASK)) {
>> + if (time_after(jiffies, timeout)) {
>> + dev_err(dev->device, "i2c device busy timeout\n");
>
> Don't print out, it will spoil the logs. Timeouts can happen on I2C
> busses, no need to inform the user.
>
> ...
>
>> + /* Wait for transaction to finish or timeout */
>> + rc = brcmstb_i2c_wait_for_completion(dev);
>> + if (rc) {
>> + dev_err(dev->device, "intr timeout for cmd %s\n",
>> + cmd_string[cmd]);
>> + goto cmd_out;
>> + }
>
> ditto
>
>> +
>> + if ((CMD_RD || CMD_WR) &&
>> + bsc_readl(dev, iic_enable) & BSC_IIC_EN_NOACK_MASK) {
>> + rc = -EREMOTEIO;
>> + dev_dbg(dev->device, "controller received NOACK intr for %s\n",
>> + cmd_string[cmd]);
>
> I'd leave this out, too. But you decide.
>
> ...
>
>> + rc = of_property_read_string(dev->device->of_node, "interrupt-names",
>> + &int_name);
>
> I haven't checked but is that really needed? of_irq_to_resource() seems
> to parse the "interrupt-names" property.
>
> Thanks,
>
>Wolfram
>
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Re: [V4, 1/2] i2c: brcmstb: Add Broadcom settop SoC i2c controller driver
Ray, I am using non combined operation so it not necessary have limit. I am not sending a stop condition till the last byte is written or read. So if the xfer has more than the i2c buffer len we break up the transfers after the initial salve address write into max read/write data buffer size. Thanks Kamal On Tue, May 19, 2015 at 4:50 PM, Ray Jui wrote: > Hi Kamal, > > There's one change still missing (that I mentioned when reviewing v2 of the > patchset): > > What is the max len that can be supported? BSC_CNT_REG1_MASK = 63? Then > you should check against that. > > Note Wolfram has introduced a way to validate the supported data length > at the i2c-core, which you should adapt: > > commit b7f625840267b18ef1011cba0085bb7e237d76f7 > Author: Wolfram Sang > Date: Mon Jan 5 23:45:59 2015 +0100 > > i2c: add quirk checks to core > > Let the core do the checks if HW quirks prevent a transfer. Saves code > from drivers and adds consistency. > <<< > > So you should add struct i2c_adapter_quirks and set the max_read_len and > max_write_len. > > I have no more comment for the rest of the code. > > Thanks, > > Ray > -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [V2 1/2] i2c: brcmstb: Add Broadcom settop SoC i2c controller driver
Rajeev, Thanks for the review. Answers inline. Kamal On Wed, Apr 15, 2015 at 3:21 AM, rajeev kumar wrote: > On Fri, Apr 3, 2015 at 1:31 AM, Kamal Dasu wrote: >> Adding support for i2c controller driver for Broadcom settop >> SoCs. >> >> Signed-off-by: Kamal Dasu >> --- >> V2 changes >> - Separate commits for device tree bindings and >>initial i2c-brcmstb driver code >> --- >> drivers/i2c/busses/Kconfig | 10 + >> drivers/i2c/busses/Makefile | 1 + >> drivers/i2c/busses/i2c-brcmstb.c | 703 >> +++ >> 3 files changed, 714 insertions(+) >> create mode 100644 drivers/i2c/busses/i2c-brcmstb.c >> >> diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig >> index 22da9c2..e3938f4 100644 >> --- a/drivers/i2c/busses/Kconfig >> +++ b/drivers/i2c/busses/Kconfig >> @@ -392,6 +392,16 @@ config I2C_BCM_KONA >> >> If you do not need KONA I2C interface, say N. >> >> +config I2C_BRCMSTB >> + tristate "BRCM Settop I2C adapter" >> + depends on ARCH_BRCMSTB >> + default y >> + help >> + If you say yes to this option, support will be included for the >> + I2C interface on the Broadcom Settop SoCs. >> + >> + If you do not need I2C interface, say N. >> + >> config I2C_BLACKFIN_TWI >> tristate "Blackfin TWI I2C support" >> depends on BLACKFIN >> diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile >> index 3638feb..91a0b5f 100644 >> --- a/drivers/i2c/busses/Makefile >> +++ b/drivers/i2c/busses/Makefile >> @@ -102,6 +102,7 @@ obj-$(CONFIG_I2C_VIPERBOARD)+= i2c-viperboard.o >> # Other I2C/SMBus bus drivers >> obj-$(CONFIG_I2C_ACORN)+= i2c-acorn.o >> obj-$(CONFIG_I2C_BCM_KONA) += i2c-bcm-kona.o >> +obj-$(CONFIG_I2C_BRCMSTB) += i2c-brcmstb.o >> obj-$(CONFIG_I2C_CROS_EC_TUNNEL) += i2c-cros-ec-tunnel.o >> obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o >> obj-$(CONFIG_I2C_OPAL) += i2c-opal.o >> diff --git a/drivers/i2c/busses/i2c-brcmstb.c >> b/drivers/i2c/busses/i2c-brcmstb.c >> new file mode 100644 >> index 000..b69ab14 >> --- /dev/null >> +++ b/drivers/i2c/busses/i2c-brcmstb.c >> @@ -0,0 +1,703 @@ >> +/* >> + * Copyright (C) 2014 Broadcom Corporation >> + * >> + * This program is free software; you can redistribute it and/or >> + * modify it under the terms of the GNU General Public License as >> + * published by the Free Software Foundation version 2. >> + * >> + * This program is distributed "as is" WITHOUT ANY WARRANTY of any >> + * kind, whether express or implied; without even the implied warranty >> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >> + * GNU General Public License for more details. >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + > > includes to be sorted in alphabetic order. > Will make this change. >> +#define N_DATA_REGS8 >> +#define N_DATA_BYTES (N_DATA_REGS * 4) >> + >> +/* BSC count register field definitions */ >> +#define BSC_CNT_REG1_MASK 0x003f >> +#define BSC_CNT_REG1_SHIFT 0 >> +#define BSC_CNT_REG2_MASK 0x0fc0 >> +#define BSC_CNT_REG2_SHIFT 6 >> + > >> +/* BSC CTL register field definitions */ >> +#define BSC_CTL_REG_DTF_MASK 0x0003 >> +#define BSC_CTL_REG_SCL_SEL_MASK 0x0030 >> +#define BSC_CTL_REG_SCL_SEL_SHIFT 4 >> +#define BSC_CTL_REG_INT_EN_MASK0x0040 >> +#define BSC_CTL_REG_INT_EN_SHIFT 6 >> +#define BSC_CTL_REG_DIV_CLK_MASK 0x0080 >> + >> +/* BSC_IIC_ENABLE r/w enable and interrupt field defintions */ >> +#define BSC_IIC_EN_RESTART_MASK0x0040 >> +#define BSC_IIC_EN_NOSTART_MASK0x0020 >> +#define BSC_IIC_EN_NOSTOP_MASK 0x0010 >> +#define BSC_IIC_EN_NOACK_MASK
Re: [V2 1/2] i2c: brcmstb: Add Broadcom settop SoC i2c controller driver
On Tue, Apr 14, 2015 at 4:39 PM, Ray Jui wrote: > Hi Kamal, > > + bcm-kernel-feedback-list > > On 4/14/2015 6:47 AM, Wolfram Sang wrote: >> On Thu, Apr 02, 2015 at 04:01:05PM -0400, Kamal Dasu wrote: >>> Adding support for i2c controller driver for Broadcom settop >>> SoCs. >>> >>> Signed-off-by: Kamal Dasu >> >> Wow, this is the third I2C master driver coming from Broadcom in a >> pretty short time. May I ask the authors of the previous Broadcom >> drivers (CCed) to do the initial review? >> >> Thanks, >> >>Wolfram >> >>> --- >>> V2 changes >>> - Separate commits for device tree bindings and >>>initial i2c-brcmstb driver code >>> --- >>> drivers/i2c/busses/Kconfig | 10 + >>> drivers/i2c/busses/Makefile | 1 + >>> drivers/i2c/busses/i2c-brcmstb.c | 703 >>> +++ >>> 3 files changed, 714 insertions(+) >>> create mode 100644 drivers/i2c/busses/i2c-brcmstb.c >>> >>> diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig >>> index 22da9c2..e3938f4 100644 >>> --- a/drivers/i2c/busses/Kconfig >>> +++ b/drivers/i2c/busses/Kconfig >>> @@ -392,6 +392,16 @@ config I2C_BCM_KONA >>> >>>If you do not need KONA I2C interface, say N. >>> >>> +config I2C_BRCMSTB >>> +tristate "BRCM Settop I2C adapter" >>> +depends on ARCH_BRCMSTB > > Would be nice to add dependency on COMPILE_TEST if you don't mind? > >>> +default y >>> +help >>> + If you say yes to this option, support will be included for the >>> + I2C interface on the Broadcom Settop SoCs. >>> + >>> + If you do not need I2C interface, say N. >>> + >>> config I2C_BLACKFIN_TWI >>> tristate "Blackfin TWI I2C support" >>> depends on BLACKFIN >>> diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile >>> index 3638feb..91a0b5f 100644 >>> --- a/drivers/i2c/busses/Makefile >>> +++ b/drivers/i2c/busses/Makefile >>> @@ -102,6 +102,7 @@ obj-$(CONFIG_I2C_VIPERBOARD) += i2c-viperboard.o >>> # Other I2C/SMBus bus drivers >>> obj-$(CONFIG_I2C_ACORN) += i2c-acorn.o >>> obj-$(CONFIG_I2C_BCM_KONA) += i2c-bcm-kona.o >>> +obj-$(CONFIG_I2C_BRCMSTB) += i2c-brcmstb.o >>> obj-$(CONFIG_I2C_CROS_EC_TUNNEL)+= i2c-cros-ec-tunnel.o >>> obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o >>> obj-$(CONFIG_I2C_OPAL) += i2c-opal.o >>> diff --git a/drivers/i2c/busses/i2c-brcmstb.c >>> b/drivers/i2c/busses/i2c-brcmstb.c >>> new file mode 100644 >>> index 000..b69ab14 >>> --- /dev/null >>> +++ b/drivers/i2c/busses/i2c-brcmstb.c >>> @@ -0,0 +1,703 @@ >>> +/* >>> + * Copyright (C) 2014 Broadcom Corporation >>> + * >>> + * This program is free software; you can redistribute it and/or >>> + * modify it under the terms of the GNU General Public License as >>> + * published by the Free Software Foundation version 2. >>> + * >>> + * This program is distributed "as is" WITHOUT ANY WARRANTY of any >>> + * kind, whether express or implied; without even the implied warranty >>> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >>> + * GNU General Public License for more details. >>> + */ >>> + >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include > > Wolfram would prefer the includes to be sorted in alphabetic order > >>> + >>> +#define N_DATA_REGS 8 >>> +#define N_DATA_BYTES(N_DATA_REGS * >>> 4) >>> + >>> +/* BSC count register field definitions */ >>> +#define BSC_CNT_REG1_MASK 0x003f >>> +#define BSC_CNT_REG1_SHIFT 0 >>> +#define BSC_CNT_REG2_MASK 0x0fc0 >>> +#define BSC_CNT_REG2_SHIFT 6 >>> + >>> +/* BSC CTL register field definitions */ >>> +#define BSC_CTL_REG_DTF_MASK0x0003 >&g
[V2 2/2] dt-bindings: i2c: Add i2c-brcmstb dt bindings
i2c Device tree binding documentation for brcmstb
SoCs.
Signed-off-by: Kamal Dasu
---
.../devicetree/bindings/i2c/i2c-brcmstb.txt| 28 ++
1 file changed, 28 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt
diff --git a/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt
b/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt
new file mode 100644
index 000..d6f724e
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt
@@ -0,0 +1,28 @@
+Broadcom stb bsc iic master controller
+
+Required properties:
+
+- compatible: should be "brcm,brcmstb-i2c"
+- clock-frequency: 32-bit decimal value of iic master clock freqency in Hz
+ valid values are 375000, 39, 187500, 20
+ 93750, 97500, 46875 and 5
+- reg: specifies the base physical address and size of the registers
+
+Optional properties :
+
+- interrupt-parent: specifies the phandle to the parent interrupt controller
+ this one is cascaded from
+- interrupts: specifies the interrupt number, the irq line to be used
+- interrupt-names: Interrupt name string
+
+Example:
+
+bsca: i2c@f0406200 {
+ clock-frequency = <39>;
+ compatible = "brcm,brcmstb-i2c";
+ interrupt-parent = <&irq0_intc>;
+ reg = <0xf0406200 0x58>;
+ interrupts = <0x18>;
+ interrupt-names = "upg_bsca";
+};
+
--
2.3.2
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[V2 1/2] i2c: brcmstb: Add Broadcom settop SoC i2c controller driver
Adding support for i2c controller driver for Broadcom settop SoCs. Signed-off-by: Kamal Dasu --- V2 changes - Separate commits for device tree bindings and initial i2c-brcmstb driver code --- drivers/i2c/busses/Kconfig | 10 + drivers/i2c/busses/Makefile | 1 + drivers/i2c/busses/i2c-brcmstb.c | 703 +++ 3 files changed, 714 insertions(+) create mode 100644 drivers/i2c/busses/i2c-brcmstb.c diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 22da9c2..e3938f4 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -392,6 +392,16 @@ config I2C_BCM_KONA If you do not need KONA I2C interface, say N. +config I2C_BRCMSTB + tristate "BRCM Settop I2C adapter" + depends on ARCH_BRCMSTB + default y + help + If you say yes to this option, support will be included for the + I2C interface on the Broadcom Settop SoCs. + + If you do not need I2C interface, say N. + config I2C_BLACKFIN_TWI tristate "Blackfin TWI I2C support" depends on BLACKFIN diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index 3638feb..91a0b5f 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile @@ -102,6 +102,7 @@ obj-$(CONFIG_I2C_VIPERBOARD)+= i2c-viperboard.o # Other I2C/SMBus bus drivers obj-$(CONFIG_I2C_ACORN)+= i2c-acorn.o obj-$(CONFIG_I2C_BCM_KONA) += i2c-bcm-kona.o +obj-$(CONFIG_I2C_BRCMSTB) += i2c-brcmstb.o obj-$(CONFIG_I2C_CROS_EC_TUNNEL) += i2c-cros-ec-tunnel.o obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o obj-$(CONFIG_I2C_OPAL) += i2c-opal.o diff --git a/drivers/i2c/busses/i2c-brcmstb.c b/drivers/i2c/busses/i2c-brcmstb.c new file mode 100644 index 000..b69ab14 --- /dev/null +++ b/drivers/i2c/busses/i2c-brcmstb.c @@ -0,0 +1,703 @@ +/* + * Copyright (C) 2014 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define N_DATA_REGS8 +#define N_DATA_BYTES (N_DATA_REGS * 4) + +/* BSC count register field definitions */ +#define BSC_CNT_REG1_MASK 0x003f +#define BSC_CNT_REG1_SHIFT 0 +#define BSC_CNT_REG2_MASK 0x0fc0 +#define BSC_CNT_REG2_SHIFT 6 + +/* BSC CTL register field definitions */ +#define BSC_CTL_REG_DTF_MASK 0x0003 +#define BSC_CTL_REG_SCL_SEL_MASK 0x0030 +#define BSC_CTL_REG_SCL_SEL_SHIFT 4 +#define BSC_CTL_REG_INT_EN_MASK0x0040 +#define BSC_CTL_REG_INT_EN_SHIFT 6 +#define BSC_CTL_REG_DIV_CLK_MASK 0x0080 + +/* BSC_IIC_ENABLE r/w enable and interrupt field defintions */ +#define BSC_IIC_EN_RESTART_MASK0x0040 +#define BSC_IIC_EN_NOSTART_MASK0x0020 +#define BSC_IIC_EN_NOSTOP_MASK 0x0010 +#define BSC_IIC_EN_NOACK_MASK 0x0004 +#define BSC_IIC_EN_INTRP_MASK 0x0002 +#define BSC_IIC_EN_ENABLE_MASK 0x0001 + +/* BSC_CTLHI control register field definitions */ +#define BSC_CTLHI_REG_INPUT_SWITCHING_LEVEL_MASK 0x0080 +#define BSC_CTLHI_REG_DATAREG_SIZE_MASK0x0040 +#define BSC_CTLHI_REG_IGNORE_ACK_MASK 0x0002 +#define BSC_CTLHI_REG_WAIT_DIS_MASK0x0001 + +#define I2C_TIMEOUT100 /* msecs */ + +/* Condition mask used for non combined transfer */ +#define COND_RESTART BSC_IIC_EN_RESTART_MASK +#define COND_NOSTART BSC_IIC_EN_NOSTART_MASK +#defineCOND_NOSTOP BSC_IIC_EN_NOSTOP_MASK +#define COND_START_STOP(COND_RESTART | COND_NOSTART | COND_NOSTOP) + +/* BSC data transfer direction */ +#define DTF_WR_MASK0x +#define DTF_RD_MASK0x0001 +/* BSC data transfer direction combined format */ +#define DTF_RD_WR_MASK 0x0002 +#define DTF_WR_RD_MASK 0x0003 +/* default bus speed */ +#define DEFAULT_BUS_SPEEDHZ 375000 +
[PATCH] i2c: brcmstb: Add Broadcom settop SoC i2c controller driver
Adding support for i2c controller driver for Broadcom settop
SoCs.
Signed-off-by: Kamal Dasu
---
.../devicetree/bindings/i2c/i2c-brcmstb.txt| 28 +
drivers/i2c/busses/Kconfig | 10 +
drivers/i2c/busses/Makefile| 1 +
drivers/i2c/busses/i2c-brcmstb.c | 703 +
4 files changed, 742 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt
create mode 100644 drivers/i2c/busses/i2c-brcmstb.c
diff --git a/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt
b/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt
new file mode 100644
index 000..d6f724e
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt
@@ -0,0 +1,28 @@
+Broadcom stb bsc iic master controller
+
+Required properties:
+
+- compatible: should be "brcm,brcmstb-i2c"
+- clock-frequency: 32-bit decimal value of iic master clock freqency in Hz
+ valid values are 375000, 39, 187500, 20
+ 93750, 97500, 46875 and 5
+- reg: specifies the base physical address and size of the registers
+
+Optional properties :
+
+- interrupt-parent: specifies the phandle to the parent interrupt controller
+ this one is cascaded from
+- interrupts: specifies the interrupt number, the irq line to be used
+- interrupt-names: Interrupt name string
+
+Example:
+
+bsca: i2c@f0406200 {
+ clock-frequency = <39>;
+ compatible = "brcm,brcmstb-i2c";
+ interrupt-parent = <&irq0_intc>;
+ reg = <0xf0406200 0x58>;
+ interrupts = <0x18>;
+ interrupt-names = "upg_bsca";
+};
+
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 22da9c2..e3938f4 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -392,6 +392,16 @@ config I2C_BCM_KONA
If you do not need KONA I2C interface, say N.
+config I2C_BRCMSTB
+ tristate "BRCM Settop I2C adapter"
+ depends on ARCH_BRCMSTB
+ default y
+ help
+ If you say yes to this option, support will be included for the
+ I2C interface on the Broadcom Settop SoCs.
+
+ If you do not need I2C interface, say N.
+
config I2C_BLACKFIN_TWI
tristate "Blackfin TWI I2C support"
depends on BLACKFIN
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 3638feb..91a0b5f 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -102,6 +102,7 @@ obj-$(CONFIG_I2C_VIPERBOARD)+= i2c-viperboard.o
# Other I2C/SMBus bus drivers
obj-$(CONFIG_I2C_ACORN)+= i2c-acorn.o
obj-$(CONFIG_I2C_BCM_KONA) += i2c-bcm-kona.o
+obj-$(CONFIG_I2C_BRCMSTB) += i2c-brcmstb.o
obj-$(CONFIG_I2C_CROS_EC_TUNNEL) += i2c-cros-ec-tunnel.o
obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o
obj-$(CONFIG_I2C_OPAL) += i2c-opal.o
diff --git a/drivers/i2c/busses/i2c-brcmstb.c b/drivers/i2c/busses/i2c-brcmstb.c
new file mode 100644
index 000..b69ab14
--- /dev/null
+++ b/drivers/i2c/busses/i2c-brcmstb.c
@@ -0,0 +1,703 @@
+/*
+ * Copyright (C) 2014 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define N_DATA_REGS8
+#define N_DATA_BYTES (N_DATA_REGS * 4)
+
+/* BSC count register field definitions */
+#define BSC_CNT_REG1_MASK 0x003f
+#define BSC_CNT_REG1_SHIFT 0
+#define BSC_CNT_REG2_MASK 0x0fc0
+#define BSC_CNT_REG2_SHIFT 6
+
+/* BSC CTL register field definitions */
+#define BSC_CTL_REG_DTF_MASK 0x0003
+#define BSC_CTL_REG_SCL_SEL_MASK 0x0030
+#define BSC_CTL_REG_SCL_SEL_SHIFT 4
+#define BSC_CTL_REG_INT_EN_MASK0x0040
+#define BSC_CTL_REG_INT_EN_SHIFT 6
+#define BSC_CTL_REG_DIV_CLK_MASK 0x0080
+
+/* BSC_IIC_ENABLE r/w enable and interrupt field defintions */
+#define BSC_IIC_EN_RESTART_MASK0x0040
+#define BSC_IIC_EN_NOSTART_MASK0x0020
+#define BSC_IIC_EN_NOSTOP_MASK
