Re: [PATCH v5 3/3] ARM: dts: hix5hd2: add i2c node

2014-10-07 Thread zhangfei 



On 10/08/2014 01:14 AM, Wolfram Sang wrote:

On Tue, Oct 07, 2014 at 09:04:13AM +0800, Zhangfei Gao wrote:

Signed-off-by: Zhangfei Gao 


This one should go via arm-soc.



Thanks Wolfram for the help.
Will send the dts serious after rc1 come out with clock define.

Thanks
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Re: [PATCH v5 3/3] ARM: dts: hix5hd2: add i2c node

2014-10-07 Thread Wolfram Sang 
On Tue, Oct 07, 2014 at 09:04:13AM +0800, Zhangfei Gao wrote:
> Signed-off-by: Zhangfei Gao 

This one should go via arm-soc.



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[PATCH v5 3/3] ARM: dts: hix5hd2: add i2c node

2014-10-06 Thread Zhangfei Gao 
Signed-off-by: Zhangfei Gao 
---
 arch/arm/boot/dts/hisi-x5hd2.dtsi |   60 +
 1 file changed, 60 insertions(+)

diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi 
b/arch/arm/boot/dts/hisi-x5hd2.dtsi
index d3d99fb..17d0637 100644
--- a/arch/arm/boot/dts/hisi-x5hd2.dtsi
+++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi
@@ -476,5 +476,65 @@
 interrupts = <0 70 4>;
 clocks = <&clock HIX5HD2_SATA_CLK>;
};
+
+   i2c0: i2c@b1 {
+   compatible = "hisilicon,hix5hd2-i2c";
+   reg = <0xb1 0x1000>;
+   interrupts = <0 38 4>;
+   clocks = <&clock HIX5HD2_I2C0_RST>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   };
+
+   i2c1: i2c@b11000 {
+   compatible = "hisilicon,hix5hd2-i2c";
+   reg = <0xb11000 0x1000>;
+   interrupts = <0 39 4>;
+   clocks = <&clock HIX5HD2_I2C1_RST>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   };
+
+   i2c2: i2c@b12000 {
+   compatible = "hisilicon,hix5hd2-i2c";
+   reg = <0xb12000 0x1000>;
+   interrupts = <0 40 4>;
+   clocks = <&clock HIX5HD2_I2C2_RST>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   };
+
+   i2c3: i2c@b13000 {
+   compatible = "hisilicon,hix5hd2-i2c";
+   reg = <0xb13000 0x1000>;
+   interrupts = <0 41 4>;
+   clocks = <&clock HIX5HD2_I2C3_RST>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   };
+
+   i2c4: i2c@b16000 {
+   compatible = "hisilicon,hix5hd2-i2c";
+   reg = <0xb16000 0x1000>;
+   interrupts = <0 43 4>;
+   clocks = <&clock HIX5HD2_I2C4_RST>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   };
+
+   i2c5: i2c@b17000 {
+   compatible = "hisilicon,hix5hd2-i2c";
+   reg = <0xb17000 0x1000>;
+   interrupts = <0 44 4>;
+   clocks = <&clock HIX5HD2_I2C5_RST>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   };
};
 };
-- 
1.7.9.5

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