Re: [PATCH v3 3/5] i2c: i2c-mpc: make I2C bus speed configurable
Wolfram Sang wrote: > Ping. Somebody wants to send a patch? I already have a patch that fixes it, I just want confirmation that I'm right first. -- Timur Tabi Linux kernel developer at Freescale -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 3/5] i2c: i2c-mpc: make I2C bus speed configurable
On Wed, Nov 07, 2012 at 10:40:47AM -0600, Timur Tabi wrote:
> Wolfgang,
>
> I know it's been 3 1/2 years since you wrote this code, but I think I
> found a bug.
>
> On Tue, Apr 7, 2009 at 3:20 AM, Wolfgang Grandegger
> wrote:
> > This patch makes the I2C bus speed configurable by using the I2C node
> > property "clock-frequency". If the property is not defined, the old
> > fixed clock settings will be used for backward comptibility.
> >
> > The generic I2C clock properties, especially the CPU-specific source
> > clock pre-scaler are defined via the OF match table:
> >
> > static const struct of_device_id mpc_i2c_of_match[] = {
> > ...
> > {.compatible = "fsl,mpc8543-i2c",
> > .data = &(struct fsl_i2c_match_data) {
> > .setclock = mpc_i2c_setclock_8xxx,
> > .prescaler = 2,
> > },
> > },
> >
> > The "data" field defines the relevant I2C setclock function and the
> > relevant pre-scaler for the I2C source clock frequency.
> >
> > It uses arch-specific tables and functions to determine resonable
> > Freqency Divider Register (fdr) values for MPC83xx, MPC85xx, MPC86xx,
> > MPC5200 and MPC5200B.
> >
> > The i2c->flags field and the corresponding FSL_I2C_DEV_* definitions
> > have been removed as they are obsolete.
> >
> > Signed-off-by: Wolfgang Grandegger
>
> ...
>
> > +u32 mpc_i2c_get_sec_cfg_8xxx(void)
> > +{
> > + struct device_node *node = NULL;
> > + u32 __iomem *reg;
> > + u32 val = 0;
> > +
> > + node = of_find_node_by_name(NULL, "global-utilities");
> > + if (node) {
> > + const u32 *prop = of_get_property(node, "reg", NULL);
> > + if (prop) {
> > + /*
> > +* Map and check POR Device Status Register 2
> > +* (PORDEVSR2) at 0xE0014
> > +*/
> > + reg = ioremap(get_immrbase() + *prop + 0x14, 0x4);
> > + if (!reg)
> > + printk(KERN_ERR
> > + "Error: couldn't map PORDEVSR2\n");
> > + else
> > + val = in_be32(reg) & 0x0080; /* sec-cfg
> > */
>
> I'm looking at the MPC8544 reference manual, and PORDEVSR2[SEC_CFG] is
> in position 26, which means that this line should be "& 0x20", not "&
> 0x80".
>
> Can you check this for me and let me know if I'm right?
Ping. Somebody wants to send a patch?
--
Pengutronix e.K. | Wolfram Sang|
Industrial Linux Solutions | http://www.pengutronix.de/ |
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Re: [PATCH v3 3/5] i2c: i2c-mpc: make I2C bus speed configurable
Wolfgang,
I know it's been 3 1/2 years since you wrote this code, but I think I
found a bug.
On Tue, Apr 7, 2009 at 3:20 AM, Wolfgang Grandegger wrote:
> This patch makes the I2C bus speed configurable by using the I2C node
> property "clock-frequency". If the property is not defined, the old
> fixed clock settings will be used for backward comptibility.
>
> The generic I2C clock properties, especially the CPU-specific source
> clock pre-scaler are defined via the OF match table:
>
> static const struct of_device_id mpc_i2c_of_match[] = {
> ...
> {.compatible = "fsl,mpc8543-i2c",
> .data = &(struct fsl_i2c_match_data) {
> .setclock = mpc_i2c_setclock_8xxx,
> .prescaler = 2,
> },
> },
>
> The "data" field defines the relevant I2C setclock function and the
> relevant pre-scaler for the I2C source clock frequency.
>
> It uses arch-specific tables and functions to determine resonable
> Freqency Divider Register (fdr) values for MPC83xx, MPC85xx, MPC86xx,
> MPC5200 and MPC5200B.
>
> The i2c->flags field and the corresponding FSL_I2C_DEV_* definitions
> have been removed as they are obsolete.
>
> Signed-off-by: Wolfgang Grandegger
...
> +u32 mpc_i2c_get_sec_cfg_8xxx(void)
> +{
> + struct device_node *node = NULL;
> + u32 __iomem *reg;
> + u32 val = 0;
> +
> + node = of_find_node_by_name(NULL, "global-utilities");
> + if (node) {
> + const u32 *prop = of_get_property(node, "reg", NULL);
> + if (prop) {
> + /*
> +* Map and check POR Device Status Register 2
> +* (PORDEVSR2) at 0xE0014
> +*/
> + reg = ioremap(get_immrbase() + *prop + 0x14, 0x4);
> + if (!reg)
> + printk(KERN_ERR
> + "Error: couldn't map PORDEVSR2\n");
> + else
> + val = in_be32(reg) & 0x0080; /* sec-cfg */
I'm looking at the MPC8544 reference manual, and PORDEVSR2[SEC_CFG] is
in position 26, which means that this line should be "& 0x20", not "&
0x80".
Can you check this for me and let me know if I'm right?
> + iounmap(reg);
> + }
> + }
> + if (node)
> + of_node_put(node);
> +
> + return val;
> +}
--
Timur Tabi
Linux kernel developer at Freescale
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Re: [PATCH v3 3/5] i2c: i2c-mpc: make I2C bus speed configurable
Wolfgang,
I know it's been 3 1/2 years since you wrote this code, but I think I
found a bug.
On Tue, Apr 7, 2009 at 3:20 AM, Wolfgang Grandegger wrote:
> This patch makes the I2C bus speed configurable by using the I2C node
> property "clock-frequency". If the property is not defined, the old
> fixed clock settings will be used for backward comptibility.
>
> The generic I2C clock properties, especially the CPU-specific source
> clock pre-scaler are defined via the OF match table:
>
> static const struct of_device_id mpc_i2c_of_match[] = {
> ...
> {.compatible = "fsl,mpc8543-i2c",
> .data = &(struct fsl_i2c_match_data) {
> .setclock = mpc_i2c_setclock_8xxx,
> .prescaler = 2,
> },
> },
>
> The "data" field defines the relevant I2C setclock function and the
> relevant pre-scaler for the I2C source clock frequency.
>
> It uses arch-specific tables and functions to determine resonable
> Freqency Divider Register (fdr) values for MPC83xx, MPC85xx, MPC86xx,
> MPC5200 and MPC5200B.
>
> The i2c->flags field and the corresponding FSL_I2C_DEV_* definitions
> have been removed as they are obsolete.
>
> Signed-off-by: Wolfgang Grandegger
...
> +u32 mpc_i2c_get_sec_cfg_8xxx(void)
> +{
> + struct device_node *node = NULL;
> + u32 __iomem *reg;
> + u32 val = 0;
> +
> + node = of_find_node_by_name(NULL, "global-utilities");
> + if (node) {
> + const u32 *prop = of_get_property(node, "reg", NULL);
> + if (prop) {
> + /*
> +* Map and check POR Device Status Register 2
> +* (PORDEVSR2) at 0xE0014
> +*/
> + reg = ioremap(get_immrbase() + *prop + 0x14, 0x4);
> + if (!reg)
> + printk(KERN_ERR
> + "Error: couldn't map PORDEVSR2\n");
> + else
> + val = in_be32(reg) & 0x0080; /* sec-cfg */
I'm looking at the MPC8544 reference manual, and PORDEVSR2[SEC_CFG] is
in position 26, which means that this line should be "& 0x20", not "&
0x80".
Can you check this for me and let me know if I'm right?
> + iounmap(reg);
> + }
> + }
> + if (node)
> + of_node_put(node);
> +
> + return val;
> +}
--
Timur Tabi
Linux kernel developer at Freescale
--
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the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 3/5] i2c: i2c-mpc: make I2C bus speed configurable
On Tue, Apr 7, 2009 at 1:20 AM, Wolfgang Grandegger wrote:
> This patch makes the I2C bus speed configurable by using the I2C node
> property "clock-frequency". If the property is not defined, the old
> fixed clock settings will be used for backward comptibility.
>
> The generic I2C clock properties, especially the CPU-specific source
> clock pre-scaler are defined via the OF match table:
>
> static const struct of_device_id mpc_i2c_of_match[] = {
> ...
> {.compatible = "fsl,mpc8543-i2c",
> .data = &(struct fsl_i2c_match_data) {
> .setclock = mpc_i2c_setclock_8xxx,
> .prescaler = 2,
> },
> },
>
> The "data" field defines the relevant I2C setclock function and the
> relevant pre-scaler for the I2C source clock frequency.
>
> It uses arch-specific tables and functions to determine resonable
> Freqency Divider Register (fdr) values for MPC83xx, MPC85xx, MPC86xx,
> MPC5200 and MPC5200B.
>
> The i2c->flags field and the corresponding FSL_I2C_DEV_* definitions
> have been removed as they are obsolete.
>
> Signed-off-by: Wolfgang Grandegger
I haven't tested it, but it looks good and I trust Wolfgang.
Acked-by: Grant Likely
> ---
> drivers/i2c/busses/i2c-mpc.c | 262
> +++
> 1 file changed, 242 insertions(+), 20 deletions(-)
>
> Index: linux-2.6-galak/drivers/i2c/busses/i2c-mpc.c
> ===
> --- linux-2.6-galak.orig/drivers/i2c/busses/i2c-mpc.c 2009-04-07
> 10:09:14.012720756 +0200
> +++ linux-2.6-galak/drivers/i2c/busses/i2c-mpc.c 2009-04-07
> 10:09:14.581719146 +0200
> @@ -26,6 +26,9 @@
> #include
> #include
>
> +#include
> +#include
> +
> #define DRV_NAME "mpc-i2c"
>
> #define MPC_I2C_FDR 0x04
> @@ -56,7 +59,18 @@
> wait_queue_head_t queue;
> struct i2c_adapter adap;
> int irq;
> - u32 flags;
> +};
> +
> +struct mpc_i2c_divider {
> + u16 divider;
> + u16 fdr; /* including dfsrr */
> +};
> +
> +struct mpc_i2c_match_data {
> + void (*setclock)(struct device_node *node,
> + struct mpc_i2c *i2c,
> + u32 clock, u32 prescaler);
> + u32 prescaler;
> };
>
> static inline void writeccr(struct mpc_i2c *i2c, u32 x)
> @@ -150,17 +164,180 @@
> return 0;
> }
>
> -static void mpc_i2c_setclock(struct mpc_i2c *i2c)
> +#ifdef CONFIG_PPC_52xx
> +static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
> + {20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
> + {28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
> + {36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
> + {52, 0x63}, {56, 0x29}, {60, 0x41}, {64, 0x2a},
> + {68, 0x07}, {72, 0x2b}, {80, 0x2c}, {88, 0x09},
> + {96, 0x2d}, {104, 0x0a}, {112, 0x2e}, {120, 0x81},
> + {128, 0x2f}, {136, 0x47}, {144, 0x0c}, {160, 0x30},
> + {176, 0x49}, {192, 0x31}, {208, 0x4a}, {224, 0x32},
> + {240, 0x0f}, {256, 0x33}, {272, 0x87}, {288, 0x10},
> + {320, 0x34}, {352, 0x89}, {384, 0x35}, {416, 0x8a},
> + {448, 0x36}, {480, 0x13}, {512, 0x37}, {576, 0x14},
> + {640, 0x38}, {768, 0x39}, {896, 0x3a}, {960, 0x17},
> + {1024, 0x3b}, {1152, 0x18}, {1280, 0x3c}, {1536, 0x3d},
> + {1792, 0x3e}, {1920, 0x1b}, {2048, 0x3f}, {2304, 0x1c},
> + {2560, 0x1d}, {3072, 0x1e}, {3584, 0x7e}, {3840, 0x1f},
> + {4096, 0x7f}, {4608, 0x5c}, {5120, 0x5d}, {6144, 0x5e},
> + {7168, 0xbe}, {7680, 0x5f}, {8192, 0xbf}, {9216, 0x9c},
> + {10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f}
> +};
> +
> +int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
> +{
> + const struct mpc52xx_i2c_divider *div = NULL;
> + unsigned int pvr = mfspr(SPRN_PVR);
> + u32 divider;
> + int i;
> +
> + if (!clock)
> + return -EINVAL;
> +
> + /* Determine divider value */
> + divider = mpc52xx_find_ipb_freq(node) / clock;
> +
> + /*
> + * We want to choose an FDR/DFSR that generates an I2C bus speed that
> + * is equal to or lower than the requested speed.
> + */
> + for (i = 0; i < ARRAY_SIZE(mpc52xx_i2c_dividers); i++) {
> + div = &mpc_i2c_dividers_52xx[i];
> + /* Old MPC5200 rev A CPUs do not support the high bits */
> + if (div->fdr & 0xc0 && pvr == 0x80822011)
> + continue;
> + if (div->divider >= divider)
> + break;
> + }
> +
> + return div ? (int)div->fdr : -EINVAL;
> +}
> +
> +static void mpc_i2c_setclock_52xx(struct device_node *node,
> + struct mpc_i2c *i2c,
> + u32 clock, u32 prescaler)
> +{
> + int fdr = mpc52xx_i2c_get_fdr(node, clock, prescaler);
> +
> + if (fdr < 0)
> + fdr = 0x3f; /* backward
