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2014-09-05 Thread Harley Wang
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[GIT PULL] ARM: SoC: fixes for v3.17-rc4

2014-09-05 Thread Kevin Hilman
Linus,

The following changes since commit 69e273c0b0a3c337a521d083374c918dc52c666f:

  Linux 3.17-rc3 (2014-08-31 18:23:04 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git 
tags/fixes-for-linus

for you to fetch changes up to 389710837f684b397ecea7e66a3a87f16e1542de:

  Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixes 
(2014-09-05 13:29:17 -0700)


ARM: SoC fixes for v3.17-rc4

Another round of fixes from arm-soc land, which are mostly DT fixes
for:

- OMAP: handful of DT fixes devices on newly supported hardware
- davinci: fix 2nd EDMA channel
- ux500: extend previous pinctrl fix to another board
- at91: clock registration fixes, compatibility string precision

And one more fix for event cleanup in drivers/bus/arm-ccn.


Alexandre Belloni (2):
  ARM: at91: rm9200: fix clock registration
  ARM: at91/dt: rm9200: fix usb clock definition

Arnd Bergmann (1):
  Merge tag 'davinci-fixes-for-v3.17-rc4' of 
git://git.kernel.org/.../nsekhar/linux-davinci into fixes

Felipe Balbi (1):
  ARM: dts: am4372: fix USB regs size

Gaël PORTAY (1):
  ARM: at91/dt: sam9g20: set at91sam9g20 pllb driver

Kevin Hilman (2):
  Merge tag 'omap-fixes-against-v3.17-rc3' of 
git://git.kernel.org/.../tmlind/linux-omap into fixes
  Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixes

Linus Walleij (1):
  ARM: ux500: disable msp2 node on Snowball

Lokesh Vutla (1):
  ARM: dts: dra7-evm: Add vtt regulator support

Nishanth Menon (2):
  ARM: dts: am437x-gp: switch i2c0 to 100KHz
  ARM: dts: dra7-evm: Fix spi1 mux documentation

Pawel Moll (1):
  bus: arm-ccn: Move event cleanup routine

Peter Ujfalusi (1):
  ARM: edma: Fix configuration parsing for SoCs with multiple eDMA3 CC

Roger Quadros (8):
  ARM: dts: dra7-evm: Fix i2c3 pinmux and frequency
  ARM: dts: dra7-evm: Fix 8th NAND partition's name
  ARM: dts: am43x-epos-evm: Use BCH16 ECC scheme instead of BCH8
  ARM: dts: am437x-gp-evm: Use BCH16 ECC scheme instead of BCH8
  ARM: dts: am437x-gp-evm: Don't use read/write wait monitoring
  ARM: dts: am43xx-epos-evm: Don't use read/write wait monitoring
  ARM: OMAP2+: gpmc: Don't complain if wait pin is used without r/w 
monitoring
  ARM: dts: am43x-epos-evm: Disable QSPI to prevent conflict with GPMC-NAND

Stefan Herbrechtsmeier (1):
  ARM: dts: set 'ti,set-rate-parent' for dpll4_m5x2 clock

Tony Lindgren (1):
  Merge branch 'for-v3.17-rc/ti-clk-dt' of github.com:t-kristo/linux-pm 
into fixes-rc3

 arch/arm/boot/dts/am4372.dtsi  |  4 ++--
 arch/arm/boot/dts/am437x-gp-evm.dts|  6 ++
 arch/arm/boot/dts/am43x-epos-evm.dts   |  9 -
 arch/arm/boot/dts/at91rm9200.dtsi  |  2 +-
 arch/arm/boot/dts/at91sam9g20.dtsi |  1 +
 arch/arm/boot/dts/dra7-evm.dts | 47 
---
 arch/arm/boot/dts/omap3xxx-clocks.dtsi |  1 +
 arch/arm/boot/dts/ste-snowball.dts |  1 -
 arch/arm/common/edma.c |  9 +
 arch/arm/mach-at91/board-dt-rm9200.c   | 11 ++-
 arch/arm/mach-omap2/gpmc.c |  7 +++
 drivers/bus/arm-ccn.c  | 51 
+--
 12 files changed, 90 insertions(+), 59 deletions(-)
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Re: [PATCH] mISDN: remove DSP_NEVER_DEFINED and adjust code identation

2014-09-05 Thread David Miller
From: Colin King 
Date: Fri,  5 Sep 2014 14:26:11 +0100

> From: Colin Ian King 
> 
> The DSP_NEVER_DEFINED #ifdef is confusing, it slips in an
> extra } which is not required because the previous code is
> indented incorrectly.  Correct the identation and remove the
> extraneous DSP_NEVER_DEFINED
> 
> Signed-off-by: Colin Ian King 

Applied to net-next, thanks.
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Re: [PATCH 3/5] toshiba_acpi: Add accelerometer input polled device

2014-09-05 Thread Azael Avalos
Hi there,

2014-09-05 20:42 GMT-06:00 Darren Hart :
> On Fri, Sep 05, 2014 at 11:14:05AM -0600, Azael Avalos wrote:
>> The accelerometer sensor is very sensitive, and having userspace
>> poll the sysfs position entry is not very battery friendly.
>>
>> This patch removes the sysfs entry and instead, it creates an
>> input polled device (joystick) for the built-in accelerometer.
>
> Hrm, while sysfs details can change across kernel versions, usually due to
> driver core changes, we try to keep them as consistent as possible so as not 
> to
> break userspace.
>
> That said, if we are going to try and come up with a better model for
> representing an accelerometer, wouldn't treating it as an IIO device be the 
> more
> logical approach?

Yes of course, but the actual accelerometer device (sensor?) is not
really exposed,
only certain "functions" it provides, and they are divided across two
different ACPI devices,
TOS620A exposes the protection, and the TOS1900 (and et. al.) only
exposes the axes.

I see your point in breaking userspace, but given the fact that it was
recently introduced,
I didn't thought it was already "adopted", that's why I decided to
remove the sysfs entry.

Then we might as well keep the sysfs entry and have the input polled
device as well.

>
> --
> Darren Hart
> Intel Open Source Technology Center


Cheers
Azael


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Re: [PATCH 2/5] toshiba_acpi: Fix illumination not available on certain models

2014-09-05 Thread Azael Avalos
Hi there

2014-09-05 20:35 GMT-06:00 Darren Hart :
> On Fri, Sep 05, 2014 at 11:14:04AM -0600, Azael Avalos wrote:
>> Some Toshiba models with illumination support set a different
>> value on the returned codes, thus not allowing the illumination
>> LED to be registered, where it should be.
>>
>> This patch removes a check from toshiba_illumination_available
>> function to allow such models to register the illumination LED.
>>
>> Signed-off-by: Azael Avalos 
>> ---
>>  drivers/platform/x86/toshiba_acpi.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/platform/x86/toshiba_acpi.c 
>> b/drivers/platform/x86/toshiba_acpi.c
>> index a149bc6..4803e7b 100644
>> --- a/drivers/platform/x86/toshiba_acpi.c
>> +++ b/drivers/platform/x86/toshiba_acpi.c
>> @@ -436,7 +436,7 @@ static int toshiba_illumination_available(struct 
>> toshiba_acpi_dev *dev)
>>   if (ACPI_FAILURE(status) || out[0] == HCI_FAILURE) {
>>   pr_err("ACPI call to query Illumination support failed\n");
>>   return 0;
>> - } else if (out[0] == HCI_NOT_SUPPORTED || out[1] != 1) {
>> + } else if (out[0] == HCI_NOT_SUPPORTED) {
>
> OK, but by eliminating the check, supposedly certain models which do not 
> support
> illumination but do not report it via out[0], but instead via out[1], will now
> attempt to use illumination - correct?

Oh no, the main check is out[0], which either hold success if the
feature is supported
or an HCI/SCI error otherwise.

>
> The end result being user calls to an ACPI function which at best doesn't 
> exist
> and at worst does, but does something entirely different.
>
> I admit the potential for a problem is slight, but is it possible to check
> something explicit for support on the newer models rather than removing an
> existing check?

Our only resource right now is the DSDT and actual hardware to test,
as those calls
are not documented anywhere, and everytime the vendor decides to
change something,
we're on the loose end.

All the DSDTs that I previously had all set out[1] to one, so I was
using that as an
extra check to make sure we had illumination support, but now, recent models
set out[1] to zero, and those models, which do happen to have illumination
support (Qosmio X75 for example) were failing to register the LED.

>
> --
> Darren Hart
> Intel Open Source Technology Center



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Re: [PATCH net v6 4/4] tg3: Fix tx_pending checks for tg3_tso_bug

2014-09-05 Thread David Miller
From: David Miller 
Date: Fri, 05 Sep 2014 17:13:06 -0700 (PDT)

> From: Eric Dumazet 
> Date: Fri, 05 Sep 2014 17:03:30 -0700
> 
>> Instead of this private helper (and pretty limited one btw), we could
>> add a core function, that would build skbs with order-0 fragments.
>> 
>> Instead of skb_linearize(), I guess many call sites could instead use
>> this new helper.
>> 
>> Because as you said, skb_linearize() of one 64KB GSO packet can ask
>> order-5 allocations, and this generally does not work reliably.
> 
> xen-netback could make use of this helper too.

I was curious what it might look like so I cobbled the following
completely untested patch together :-)

diff --git a/net/core/skbuff.c b/net/core/skbuff.c
index da1378a..eba0ad6 100644
--- a/net/core/skbuff.c
+++ b/net/core/skbuff.c
@@ -955,6 +955,67 @@ struct sk_buff *skb_copy(const struct sk_buff *skb, gfp_t 
gfp_mask)
 EXPORT_SYMBOL(skb_copy);
 
 /**
+ * skb_copy_pskb   -   copy sk_buff into a paged skb
+ * @oskb: buffer to copy
+ * @gfp_mask: allocation priority
+ *
+ * Normalize a paged skb into one that maximally uses order
+ * zero pages in it's fragment array.  This is used to canonicalize
+ * spaghetti SKBs that use the page array inefficiently (f.e. only
+ * one byte per page frag).
+ */
+
+struct sk_buff *skb_copy_pskb(const struct sk_buff *oskb, gfp_t gfp_mask)
+{
+   unsigned int data_len = oskb->data_len;
+   int offset, npages, i;
+   struct sk_buff *skb;
+
+   npages = (data_len + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
+   if (npages > MAX_SKB_FRAGS)
+   return NULL;
+
+   skb = __alloc_skb(skb_end_offset(oskb), gfp_mask,
+ skb_alloc_rx_flag(oskb), NUMA_NO_NODE);
+   if (!skb)
+   return NULL;
+
+   skb_reserve(skb, skb_headroom(oskb));
+   skb_put(skb, skb_headlen(oskb));
+   skb_copy_from_linear_data(oskb, skb->data, skb->len);
+
+   copy_skb_header(skb, oskb);
+
+   skb->truesize += data_len;
+   offset = skb_headlen(oskb);
+   for (i = 0; i < npages; i++) {
+   struct page *page = alloc_page(gfp_mask);
+   unsigned int chunk;
+   u8 *vaddr;
+
+   if (!page) {
+   kfree(skb);
+   skb = NULL;
+   break;
+   }
+
+   chunk = min_t(unsigned int, data_len, PAGE_SIZE);
+   skb_fill_page_desc(skb, i, page, 0, chunk);
+
+   vaddr = kmap_atomic(page);
+   skb_copy_bits(oskb, offset, vaddr, chunk);
+   kunmap_atomic(vaddr);
+
+   offset += chunk;
+   data_len -= chunk;
+   skb->data_len += chunk;
+   }
+
+   return skb;
+}
+EXPORT_SYMBOL(skb_copy_pskb);
+
+/**
  * __pskb_copy_fclone  -  create copy of an sk_buff with private head.
  * @skb: buffer to copy
  * @headroom: headroom of new skb
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[PATCH 1/1] iwl4965: fix %d confusingly prefixed with 0x in format string

2014-09-05 Thread Hans Wennborg
Signed-off-by: Hans Wennborg 
---
 drivers/net/wireless/iwlegacy/4965-mac.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/wireless/iwlegacy/4965-mac.c 
b/drivers/net/wireless/iwlegacy/4965-mac.c
index 3dcbe2c..cf7996f 100644
--- a/drivers/net/wireless/iwlegacy/4965-mac.c
+++ b/drivers/net/wireless/iwlegacy/4965-mac.c
@@ -4633,7 +4633,7 @@ il4965_store_tx_power(struct device *d, struct 
device_attribute *attr,
else {
ret = il_set_tx_power(il, val, false);
if (ret)
-   IL_ERR("failed setting tx power (0x%d).\n", ret);
+   IL_ERR("failed setting tx power (0x%08x).\n", ret);
else
ret = count;
}
-- 
2.1.0.rc2.206.gedb03e5

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[PATCH 1/1] rtlwifi: fix %d confusingly prefixed with 0x in format strings

2014-09-05 Thread Hans Wennborg
Signed-off-by: Hans Wennborg 
---
 drivers/net/wireless/rtlwifi/pci.c   | 6 +++---
 drivers/net/wireless/rtlwifi/rtl8192de/phy.c | 8 
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/net/wireless/rtlwifi/pci.c 
b/drivers/net/wireless/rtlwifi/pci.c
index 67d1ee6..74a8ba4 100644
--- a/drivers/net/wireless/rtlwifi/pci.c
+++ b/drivers/net/wireless/rtlwifi/pci.c
@@ -646,7 +646,7 @@ static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int 
prio)
== 2) {
 
RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
-"more desc left, wake skb_queue@%d, ring->idx 
= %d, skb_queue_len = 0x%d\n",
+"more desc left, wake skb_queue@%d, ring->idx 
= %d, skb_queue_len = 0x%x\n",
 prio, ring->idx,
 skb_queue_len(&ring->queue));
 
@@ -1469,7 +1469,7 @@ static int rtl_pci_tx(struct ieee80211_hw *hw,
 
if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
-"No more TX desc@%d, ring->idx = %d, idx = %d, 
skb_queue_len = 0x%d\n",
+"No more TX desc@%d, ring->idx = %d, idx = %d, 
skb_queue_len = 0x%x\n",
 hw_queue, ring->idx, idx,
 skb_queue_len(&ring->queue));
 
@@ -1511,7 +1511,7 @@ static int rtl_pci_tx(struct ieee80211_hw *hw,
if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
hw_queue != BEACON_QUEUE) {
RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
-"less desc left, stop skb_queue@%d, ring->idx = %d, 
idx = %d, skb_queue_len = 0x%d\n",
+"less desc left, stop skb_queue@%d, ring->idx = %d, 
idx = %d, skb_queue_len = 0x%x\n",
 hw_queue, ring->idx, idx,
 skb_queue_len(&ring->queue));
 
diff --git a/drivers/net/wireless/rtlwifi/rtl8192de/phy.c 
b/drivers/net/wireless/rtlwifi/rtl8192de/phy.c
index 592125a..1961b8e 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192de/phy.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192de/phy.c
@@ -677,7 +677,7 @@ static void _rtl92d_store_pwrindex_diffrate_offset(struct 
ieee80211_hw *hw,
 
rtlphy->mcs_offset[rtlphy->pwrgroup_cnt][index] = data;
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
-"MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%ulx\n",
+"MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n",
 rtlphy->pwrgroup_cnt, index,
 rtlphy->mcs_offset[rtlphy->pwrgroup_cnt][index]);
if (index == 13)
@@ -2531,7 +2531,7 @@ static void _rtl92d_phy_reload_lck_setting(struct 
ieee80211_hw *hw,
if (rtlpriv->rtlhal.current_bandtype == BAND_ON_5G) {/* Path-A for 5G */
u4tmp = curveindex_5g[channel-1];
RTPRINT(rtlpriv, FINIT, INIT_IQK,
-   "ver 1 set RF-A, 5G,0x28 = 0x%ulx !!\n", u4tmp);
+   "ver 1 set RF-A, 5G,0x28 = 0x%x !!\n", u4tmp);
if (rtlpriv->rtlhal.macphymode == DUALMAC_DUALPHY &&
rtlpriv->rtlhal.interfaceindex == 1) {
bneed_powerdown_radio =
@@ -2550,7 +2550,7 @@ static void _rtl92d_phy_reload_lck_setting(struct 
ieee80211_hw *hw,
} else if (rtlpriv->rtlhal.current_bandtype == BAND_ON_2_4G) {
u4tmp = curveindex_2g[channel-1];
RTPRINT(rtlpriv, FINIT, INIT_IQK,
-   "ver 3 set RF-B, 2G, 0x28 = 0x%ulx !!\n", u4tmp);
+   "ver 3 set RF-B, 2G, 0x28 = 0x%x !!\n", u4tmp);
if (rtlpriv->rtlhal.macphymode == DUALMAC_DUALPHY &&
rtlpriv->rtlhal.interfaceindex == 0) {
bneed_powerdown_radio =
@@ -2562,7 +2562,7 @@ static void _rtl92d_phy_reload_lck_setting(struct 
ieee80211_hw *hw,
}
rtl_set_rfreg(hw, erfpath, RF_SYN_G4, 0x3f800, u4tmp);
RTPRINT(rtlpriv, FINIT, INIT_IQK,
-   "ver 3 set RF-B, 2G, 0x28 = 0x%ulx !!\n",
+   "ver 3 set RF-B, 2G, 0x28 = 0x%x !!\n",
rtl_get_rfreg(hw,  erfpath, RF_SYN_G4, 0x3f800));
if (bneed_powerdown_radio)
_rtl92d_phy_restore_rf_env(hw, erfpath, &u4regvalue);
-- 
2.1.0.rc2.206.gedb03e5

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[PATCH] tty/serial/8250: Resolve missing-field-initializers warnings

2014-09-05 Thread Jeff Kirsher
From: Mark Rustad 

Resolve some missing-field-initializers warnings by using
designated initialization in the expansion of the SERIAL_PORT_DFNS
macro.

Signed-off-by: Mark Rustad 
Signed-off-by: Jeff Kirsher 
---
 arch/x86/include/asm/serial.h | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/serial.h b/arch/x86/include/asm/serial.h
index 628c801..03ece8e 100644
--- a/arch/x86/include/asm/serial.h
+++ b/arch/x86/include/asm/serial.h
@@ -21,9 +21,9 @@
 
 #define SERIAL_PORT_DFNS   \
/* UART CLK   PORT IRQ FLAGS*/  \
-   { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS },  /* ttyS0 */ \
-   { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS },  /* ttyS1 */ \
-   { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS },  /* ttyS2 */ \
-   { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
+   { .uart = 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */  \
+   { .uart = 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */  \
+   { .uart = 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */  \
+   { .uart = 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
 
 #endif /* _ASM_X86_SERIAL_H */
-- 
1.9.3

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Re: [PATCH 3/5] toshiba_acpi: Add accelerometer input polled device

2014-09-05 Thread Darren Hart
On Fri, Sep 05, 2014 at 11:14:05AM -0600, Azael Avalos wrote:
> The accelerometer sensor is very sensitive, and having userspace
> poll the sysfs position entry is not very battery friendly.
> 
> This patch removes the sysfs entry and instead, it creates an
> input polled device (joystick) for the built-in accelerometer.

Hrm, while sysfs details can change across kernel versions, usually due to
driver core changes, we try to keep them as consistent as possible so as not to
break userspace.

That said, if we are going to try and come up with a better model for
representing an accelerometer, wouldn't treating it as an IIO device be the more
logical approach?

-- 
Darren Hart
Intel Open Source Technology Center
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Re: [PATCH 2/5] toshiba_acpi: Fix illumination not available on certain models

2014-09-05 Thread Darren Hart
On Fri, Sep 05, 2014 at 11:14:04AM -0600, Azael Avalos wrote:
> Some Toshiba models with illumination support set a different
> value on the returned codes, thus not allowing the illumination
> LED to be registered, where it should be.
> 
> This patch removes a check from toshiba_illumination_available
> function to allow such models to register the illumination LED.
> 
> Signed-off-by: Azael Avalos 
> ---
>  drivers/platform/x86/toshiba_acpi.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/platform/x86/toshiba_acpi.c 
> b/drivers/platform/x86/toshiba_acpi.c
> index a149bc6..4803e7b 100644
> --- a/drivers/platform/x86/toshiba_acpi.c
> +++ b/drivers/platform/x86/toshiba_acpi.c
> @@ -436,7 +436,7 @@ static int toshiba_illumination_available(struct 
> toshiba_acpi_dev *dev)
>   if (ACPI_FAILURE(status) || out[0] == HCI_FAILURE) {
>   pr_err("ACPI call to query Illumination support failed\n");
>   return 0;
> - } else if (out[0] == HCI_NOT_SUPPORTED || out[1] != 1) {
> + } else if (out[0] == HCI_NOT_SUPPORTED) {

OK, but by eliminating the check, supposedly certain models which do not support
illumination but do not report it via out[0], but instead via out[1], will now
attempt to use illumination - correct?

The end result being user calls to an ACPI function which at best doesn't exist
and at worst does, but does something entirely different.

I admit the potential for a problem is slight, but is it possible to check
something explicit for support on the newer models rather than removing an
existing check?

-- 
Darren Hart
Intel Open Source Technology Center
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[PATCH] MIPS: Remove a temporary hack for debugging cache flushes in SMTC configuration

2014-09-05 Thread Leonid Yegoshin
This patch removes a temporary hack for debugging SMTC configuration from

commit 41c594ab65fc89573af296d192aa5235d09717ab
Author: Ralf Baechle 
Date:   Wed Apr 5 09:45:45 2006 +0100

which is dropped now. Some performance degradation for multi-VPE systems
is removed.

Signed-off-by: Leonid Yegoshin 
---
 arch/mips/include/asm/r4kcache.h |1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h
index 4520adc..b2ae1b1 100644
--- a/arch/mips/include/asm/r4kcache.h
+++ b/arch/mips/include/asm/r4kcache.h
@@ -50,7 +50,6 @@ extern void (*r4k_blast_icache)(void);
 /*
  * Optionally force single-threaded execution during I-cache flushes.
  */
-#define PROTECT_CACHE_FLUSHES 1
 
 #ifdef PROTECT_CACHE_FLUSHES
 

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[PATCH] staging: ozwpan: Fix coding style warnings

2014-09-05 Thread anicoara
The warnings addressed:
1. Missing a blank line after declarations.
2. else is not generally useful after a break or return

Signed-off-by: Adrian Nicoara 
---

Patch submitted as part of the Eudyptula challenge.

 drivers/staging/ozwpan/ozpd.c | 16 ++--
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/staging/ozwpan/ozpd.c b/drivers/staging/ozwpan/ozpd.c
index 7726410..852c288 100644
--- a/drivers/staging/ozwpan/ozpd.c
+++ b/drivers/staging/ozwpan/ozpd.c
@@ -106,6 +106,7 @@ struct oz_pd *oz_pd_alloc(const u8 *mac_addr)

if (pd) {
int i;
+
atomic_set(&pd->ref_count, 2);
for (i = 0; i < OZ_NB_APPS; i++)
spin_lock_init(&pd->app_lock[i]);
@@ -153,6 +154,7 @@ static void oz_pd_free(struct work_struct *work)

list_for_each_safe(e, n, &pd->tx_queue) {
struct oz_tx_frame *f = list_entry(e, struct oz_tx_frame, link);
+
if (f->skb != NULL)
kfree_skb(f->skb);
oz_retire_frame(pd, f);
@@ -249,6 +251,7 @@ void oz_pd_heartbeat(struct oz_pd *pd, u16 apps)
hrtimer_cancel(&pd->heartbeat);
if (pd->mode & OZ_F_ISOC_ANYTIME) {
int count = 8;
+
while (count-- && (oz_send_isoc_frame(pd) >= 0))
;
}
@@ -493,11 +496,10 @@ static int oz_send_next_queued_frame(struct oz_pd *pd, 
int more_data)
oz_dbg(TX_FRAMES, "Sending ISOC Frame, nb_isoc= %d\n",
   pd->nb_queued_isoc_frames);
return 0;
-   } else {
-   kfree_skb(skb);
-   oz_dbg(TX_FRAMES, "Dropping ISOC Frame>\n");
-   return -1;
}
+   kfree_skb(skb);
+   oz_dbg(TX_FRAMES, "Dropping ISOC Frame>\n");
+   return -1;
}

pd->last_sent_frame = e;
@@ -752,6 +754,7 @@ int oz_send_isoc_unit(struct oz_pd *pd, u8 ep_num, const u8 
*data, int len)
} else {
struct oz_hdr oz;
struct oz_isoc_large iso;
+
spin_lock_bh(&pd->stream_lock);
iso.frame_number = st->frame_num;
st->frame_num += nb_units;
@@ -774,8 +777,10 @@ int oz_send_isoc_unit(struct oz_pd *pd, u8 ep_num, const 
u8 *data, int len)
if (!(pd->mode & OZ_F_ISOC_ANYTIME)) {
struct oz_tx_frame *isoc_unit = NULL;
int nb = pd->nb_queued_isoc_frames;
+
if (nb >= pd->isoc_latency) {
struct oz_tx_frame *f;
+
oz_dbg(TX_FRAMES, "Dropping ISOC Unit nb= %d\n",
   nb);
spin_lock(&pd->tx_frame_lock);
@@ -807,8 +812,7 @@ int oz_send_isoc_unit(struct oz_pd *pd, u8 ep_num, const u8 
*data, int len)
atomic_inc(&g_submitted_isoc);
if (dev_queue_xmit(skb) < 0)
return -1;
-   else
-   return 0;
+   return 0;
}

 out:   kfree_skb(skb);
--
2.0.1

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Re: [PATCH] ARM: MVEBU: Netgear RN102: Use Hardware BCH ECC

2014-09-05 Thread Ben Peddell
On 06 Sep 2014 at 06:49, Arnaud Ebalard wrote:
> FWIW, you can add my:
> 
>  Tested-by: Arnaud Ebalard 
>  
> Additionally, Ezequiel, would anything prevent pushing the patch to
> stable team (nand entry in .dts was added in 3.14):
> 
>  Fixes: 92beaccd8b49 ("ARM: mvebu: Enable NAND controller in ReadyNAS 102 
> .dts file")

Depends-on: 5b3e507820c6 ("mtd: nand: pxa3xx: Use ECC strength and step size 
devicetree binding")

The devicetree binding is not currently in linux-stable/linux-3.14.y
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Re: [PATCH] eeepc-laptop: remove possible use of uninitialized value

2014-09-05 Thread Darren Hart
On Thu, Sep 04, 2014 at 09:08:08AM +0200, Paul Bolle wrote:
> On Thu, 2014-09-04 at 00:53 +0200, Frans Klaver wrote:
> > In store_sys_acpi, if count equals zero, or parse_arg()s sscanf call
> > fails, 'value' remains possibly uninitialized. In that case 'value'
> > shouldn't be used to produce the store_sys_acpi()s return value.
> > 
> > Only test the return value of set_acpi() if we can actually call it.
> > Return rv otherwise.
> > 
> > Signed-off-by: Frans Klaver 
> > ---
> >  drivers/platform/x86/eeepc-laptop.c | 8 
> >  1 file changed, 4 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/platform/x86/eeepc-laptop.c 
> > b/drivers/platform/x86/eeepc-laptop.c
> > index bd533c2..41f12ba 100644
> > --- a/drivers/platform/x86/eeepc-laptop.c
> > +++ b/drivers/platform/x86/eeepc-laptop.c
> > @@ -279,10 +279,10 @@ static ssize_t store_sys_acpi(struct device *dev, int 
> > cm,
> > int rv, value;
> >  
> > rv = parse_arg(buf, count, &value);
> > -   if (rv > 0)
> > -   value = set_acpi(eeepc, cm, value);
> > -   if (value < 0)
> > -   return -EIO;
> > +   if (rv > 0) {
> > +   if (set_acpi(eeepc, cm, value) < 0)
> > +   return -EIO;
> > +   }
> > return rv;
> >  }
> >  
> 
> The warning that this code (currently) generated triggered me to submit
> https://lkml.org/lkml/2014/7/1/150 , which uses a different approach to
> get rid of it. I received no reactions so far. Here's that patch again:

Thanks for resending.

> 
> >8
> From: Paul Bolle 
> Subject: [PATCH] eeepc-laptop: simplify parse_arg()
> 
> parse_arg() has three possible return values:
> -EINVAL if sscanf(), in short, fails;
> zero if "count" is zero; and
> "count" in all other cases
> 
> But "count" will never be zero. See, parse_arg() is called by the
> various store functions. And the callchain of these functions starts
> with sysfs_kf_write(). And that function checks for a zero "count". So
> we can stop checking for a zero "count", drop the "count" argument
> entirely, and transform parse_arg() into a function that returns zero on
> success or a negative error. That, in turn, allows to make those store
> functions just return "count" on success. The net effect is that the
> code becomes a bit easier to understand.
> 

Seems reasonable.

> A nice side effect is that this GCC warning is silenced too:
> drivers/platform/x86/eeepc-laptop.c: In function ‘store_sys_acpi’:
> drivers/platform/x86/eeepc-laptop.c:279:10: warning: ‘value’ may be used 
> uninitialized in this function [-Wmaybe-uninitialized]
>   int rv, value;
> 
> Which is, of course, the reason to have a look at parse_arg().
> 
> Signed-off-by: Paul Bolle 
> ---
>  drivers/platform/x86/eeepc-laptop.c | 34 +-
>  1 file changed, 17 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/platform/x86/eeepc-laptop.c 
> b/drivers/platform/x86/eeepc-laptop.c
> index bd533c22be57..78515b850165 100644
> --- a/drivers/platform/x86/eeepc-laptop.c
> +++ b/drivers/platform/x86/eeepc-laptop.c
> @@ -263,13 +263,11 @@ static int acpi_setter_handle(struct eeepc_laptop 
> *eeepc, int cm,
>  /*
>   * Sys helpers
>   */
> -static int parse_arg(const char *buf, unsigned long count, int *val)
> +static int parse_arg(const char *buf, int *val)
>  {
> - if (!count)
> - return 0;
>   if (sscanf(buf, "%i", val) != 1)
>   return -EINVAL;
> - return count;
> + return 0;
>  }
>  
>  static ssize_t store_sys_acpi(struct device *dev, int cm,
> @@ -278,12 +276,13 @@ static ssize_t store_sys_acpi(struct device *dev, int 
> cm,
>   struct eeepc_laptop *eeepc = dev_get_drvdata(dev);
>   int rv, value;
>  
> - rv = parse_arg(buf, count, &value);
> - if (rv > 0)
> - value = set_acpi(eeepc, cm, value);
> + rv = parse_arg(buf, &value);
> + if (rv < 0)
> + return rv;
> + value = set_acpi(eeepc, cm, value);
>   if (value < 0)

I suppose it's harmless, but it would be more explicit to reuse rv here instead
of value.

>   return -EIO;

And as with Frans' version, I suggest propogating the error. We're talking about
a missing/invalid ACPI control method name here, ENODEV seems approprirate.

Rafael, do you have a strong preference about what to return in such an event?

-- 
Darren Hart
Intel Open Source Technology Center
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[PATCH] MIPS: bugfix of coherentio variable default setup

2014-09-05 Thread Leonid Yegoshin
Patch commit b6d92b4a6bdb880b39789c677b952c53a437028d

MIPS: Add option to disable software I/O coherency.

Some MIPS controllers have hardware I/O coherency. This patch
detects those and turns off software coherency. A new kernel
command line option also allows the user to manually turn
software coherency on or off.

in fact enforces L2 cache flushes even on systems with IOCU.
The default value of coherentio is 0 and is not changed even with IOCU.
It is a serious performance problem because it destroys all IOCU performance
advantages.

It is fixed by setting coherentio to tri-state with default value as (-1) and
setup a final value during platform coherency setup.
---
 arch/mips/include/asm/mach-generic/dma-coherence.h |7 ++-
 arch/mips/mm/c-r4k.c   |2 +-
 arch/mips/mm/dma-default.c |2 +-
 arch/mips/mti-malta/malta-setup.c  |8 ++--
 arch/mips/pci/pci-alchemy.c|2 +-
 5 files changed, 15 insertions(+), 6 deletions(-)

diff --git a/arch/mips/include/asm/mach-generic/dma-coherence.h 
b/arch/mips/include/asm/mach-generic/dma-coherence.h
index 7629c35..b4563df 100644
--- a/arch/mips/include/asm/mach-generic/dma-coherence.h
+++ b/arch/mips/include/asm/mach-generic/dma-coherence.h
@@ -49,7 +49,12 @@ static inline int plat_dma_supported(struct device *dev, u64 
mask)
 
 static inline int plat_device_is_coherent(struct device *dev)
 {
-   return coherentio;
+#ifdef CONFIG_DMA_COHERENT
+   return 1;
+#else
+   return (coherentio > 0);
+#endif
+
 }
 
 #ifdef CONFIG_SWIOTLB
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index fbcd867..ad6ff7b 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1660,7 +1660,7 @@ void r4k_cache_init(void)
local_flush_icache_range= local_r4k_flush_icache_range;
 
 #if defined(CONFIG_DMA_NONCOHERENT) || defined(CONFIG_DMA_MAYBE_COHERENT)
-   if (coherentio) {
+   if (coherentio > 0) {
_dma_cache_wback_inv= (void *)cache_noop;
_dma_cache_wback= (void *)cache_noop;
_dma_cache_inv  = (void *)cache_noop;
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index 44b6dff..42c819a 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -24,7 +24,7 @@
 #include 
 
 #ifdef CONFIG_DMA_MAYBE_COHERENT
-int coherentio = 0;/* User defined DMA coherency from command line. */
+int coherentio = -1;/* User defined DMA coherency is not defined yet. */
 EXPORT_SYMBOL_GPL(coherentio);
 int hw_coherentio = 0; /* Actual hardware supported DMA coherency setting. */
 
diff --git a/arch/mips/mti-malta/malta-setup.c 
b/arch/mips/mti-malta/malta-setup.c
index db7c9e5..48039fd 100644
--- a/arch/mips/mti-malta/malta-setup.c
+++ b/arch/mips/mti-malta/malta-setup.c
@@ -147,13 +147,17 @@ static void __init plat_setup_iocoherency(void)
if (plat_enable_iocoherency()) {
if (coherentio == 0)
pr_info("Hardware DMA cache coherency disabled\n");
-   else
+   else {
+   coherentio = 1;
pr_info("Hardware DMA cache coherency enabled\n");
+   }
} else {
if (coherentio == 1)
pr_info("Hardware DMA cache coherency unsupported, but 
enabled from command line!\n");
-   else
+   else {
+   coherentio = 0;
pr_info("Software DMA cache coherency enabled\n");
+   }
}
 #else
if (!plat_enable_iocoherency())
diff --git a/arch/mips/pci/pci-alchemy.c b/arch/mips/pci/pci-alchemy.c
index c19600a..0d0b6c1 100644
--- a/arch/mips/pci/pci-alchemy.c
+++ b/arch/mips/pci/pci-alchemy.c
@@ -429,7 +429,7 @@ static int alchemy_pci_probe(struct platform_device *pdev)
 
/* Au1500 revisions older than AD have borked coherent PCI */
if ((alchemy_get_cputype() == ALCHEMY_CPU_AU1500) &&
-   (read_c0_prid() < 0x01030202) && !coherentio) {
+   (read_c0_prid() < 0x01030202) && (coherentio <= 0)) {
val = __raw_readl(ctx->regs + PCI_REG_CONFIG);
val |= PCI_CONFIG_NC;
__raw_writel(val, ctx->regs + PCI_REG_CONFIG);

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[PATCH] tty/vt/keyboard: Resolve many shadow warnings

2014-09-05 Thread Jeff Kirsher
From: Mark Rustad 

Many local variables were given the same name as a global. This
is valid, but generates many shadow warnings in W=2 builds. Resolve
them by changing the local names. Also change local variables
named "up" because they shadow the semaphore "up" function. Also
moved the outer declaration of the variable "a" because it is
only used in one block, and that resolves all of the shadow warnings
for the other declarations of "a" that have different types.

Change diacr => dia, kbd => kb, rep => rpt, up => udp.

Signed-off-by: Mark Rustad 
Signed-off-by: Jeff Kirsher 
---
 drivers/tty/vt/keyboard.c | 166 +++---
 1 file changed, 83 insertions(+), 83 deletions(-)

diff --git a/drivers/tty/vt/keyboard.c b/drivers/tty/vt/keyboard.c
index d0e3a44..c039cfe 100644
--- a/drivers/tty/vt/keyboard.c
+++ b/drivers/tty/vt/keyboard.c
@@ -268,30 +268,30 @@ EXPORT_SYMBOL(kd_mksound);
 static int kbd_rate_helper(struct input_handle *handle, void *data)
 {
struct input_dev *dev = handle->dev;
-   struct kbd_repeat *rep = data;
+   struct kbd_repeat *rpt = data;
 
if (test_bit(EV_REP, dev->evbit)) {
 
-   if (rep[0].delay > 0)
+   if (rpt[0].delay > 0)
input_inject_event(handle,
-  EV_REP, REP_DELAY, rep[0].delay);
-   if (rep[0].period > 0)
+  EV_REP, REP_DELAY, rpt[0].delay);
+   if (rpt[0].period > 0)
input_inject_event(handle,
-  EV_REP, REP_PERIOD, rep[0].period);
+  EV_REP, REP_PERIOD, rpt[0].period);
 
-   rep[1].delay = dev->rep[REP_DELAY];
-   rep[1].period = dev->rep[REP_PERIOD];
+   rpt[1].delay = dev->rep[REP_DELAY];
+   rpt[1].period = dev->rep[REP_PERIOD];
}
 
return 0;
 }
 
-int kbd_rate(struct kbd_repeat *rep)
+int kbd_rate(struct kbd_repeat *rpt)
 {
-   struct kbd_repeat data[2] = { *rep };
+   struct kbd_repeat data[2] = { *rpt };
 
input_handler_for_each_handle(&kbd_handler, data, kbd_rate_helper);
-   *rep = data[1]; /* Copy currently used settings */
+   *rpt = data[1]; /* Copy currently used settings */
 
return 0;
 }
@@ -971,15 +971,15 @@ static unsigned char getledstate(void)
return ledstate;
 }
 
-void setledstate(struct kbd_struct *kbd, unsigned int led)
+void setledstate(struct kbd_struct *kb, unsigned int led)
 {
 unsigned long flags;
 spin_lock_irqsave(&led_lock, flags);
if (!(led & ~7)) {
ledioctl = led;
-   kbd->ledmode = LED_SHOW_IOCTL;
+   kb->ledmode = LED_SHOW_IOCTL;
} else
-   kbd->ledmode = LED_SHOW_FLAGS;
+   kb->ledmode = LED_SHOW_FLAGS;
 
set_leds();
spin_unlock_irqrestore(&led_lock, flags);
@@ -987,12 +987,12 @@ void setledstate(struct kbd_struct *kbd, unsigned int led)
 
 static inline unsigned char getleds(void)
 {
-   struct kbd_struct *kbd = kbd_table + fg_console;
+   struct kbd_struct *kb = kbd_table + fg_console;
 
-   if (kbd->ledmode == LED_SHOW_IOCTL)
+   if (kb->ledmode == LED_SHOW_IOCTL)
return ledioctl;
 
-   return kbd->ledflagstate;
+   return kb->ledflagstate;
 }
 
 static int kbd_update_leds_helper(struct input_handle *handle, void *data)
@@ -1018,12 +1018,12 @@ static int kbd_update_leds_helper(struct input_handle 
*handle, void *data)
  */
 int vt_get_leds(int console, int flag)
 {
-   struct kbd_struct * kbd = kbd_table + console;
+   struct kbd_struct *kb = kbd_table + console;
int ret;
unsigned long flags;
 
spin_lock_irqsave(&led_lock, flags);
-   ret = vc_kbd_led(kbd, flag);
+   ret = vc_kbd_led(kb, flag);
spin_unlock_irqrestore(&led_lock, flags);
 
return ret;
@@ -1040,8 +1040,8 @@ EXPORT_SYMBOL_GPL(vt_get_leds);
  */
 void vt_set_led_state(int console, int leds)
 {
-   struct kbd_struct * kbd = kbd_table + console;
-   setledstate(kbd, leds);
+   struct kbd_struct *kb = kbd_table + console;
+   setledstate(kb, leds);
 }
 
 /**
@@ -1059,10 +1059,10 @@ void vt_set_led_state(int console, int leds)
  */
 void vt_kbd_con_start(int console)
 {
-   struct kbd_struct * kbd = kbd_table + console;
+   struct kbd_struct *kb = kbd_table + console;
unsigned long flags;
spin_lock_irqsave(&led_lock, flags);
-   clr_vc_kbd_led(kbd, VC_SCROLLOCK);
+   clr_vc_kbd_led(kb, VC_SCROLLOCK);
set_leds();
spin_unlock_irqrestore(&led_lock, flags);
 }
@@ -1076,10 +1076,10 @@ void vt_kbd_con_start(int console)
  */
 void vt_kbd_con_stop(int console)
 {
-   struct kbd_struct * kbd = kbd_table + console;
+   struct kbd_struct *kb = kbd_table + console;
unsigned long flags;

[PATCH] efi: Resolve some shadow warnings

2014-09-05 Thread Jeff Kirsher
From: Mark Rustad 

It is a really bad idea to declare variables or parameters that
have the same name as common types. It is valid C, but it gets
surprising if a macro expansion attempts to declare an inner
local with that type. Change the local names to eliminate the
hazard.

Change s16 => ps16, s8 => ps8.

Signed-off-by: Mark Rustad 
Signed-off-by: Jeff Kirsher 
---
 drivers/firmware/efi/vars.c | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/firmware/efi/vars.c b/drivers/firmware/efi/vars.c
index 5abe943..afa3596 100644
--- a/drivers/firmware/efi/vars.c
+++ b/drivers/firmware/efi/vars.c
@@ -321,11 +321,11 @@ static unsigned long var_name_strnsize(efi_char16_t 
*variable_name,
  * Print a warning when duplicate EFI variables are encountered and
  * disable the sysfs workqueue since the firmware is buggy.
  */
-static void dup_variable_bug(efi_char16_t *s16, efi_guid_t *vendor_guid,
+static void dup_variable_bug(efi_char16_t *ps16, efi_guid_t *vendor_guid,
 unsigned long len16)
 {
size_t i, len8 = len16 / sizeof(efi_char16_t);
-   char *s8;
+   char *ps8;
 
/*
 * Disable the workqueue since the algorithm it uses for
@@ -334,16 +334,16 @@ static void dup_variable_bug(efi_char16_t *s16, 
efi_guid_t *vendor_guid,
 */
efivar_wq_enabled = false;
 
-   s8 = kzalloc(len8, GFP_KERNEL);
-   if (!s8)
+   ps8 = kzalloc(len8, GFP_KERNEL);
+   if (!ps8)
return;
 
for (i = 0; i < len8; i++)
-   s8[i] = s16[i];
+   ps8[i] = ps16[i];
 
printk(KERN_WARNING "efivars: duplicate variable: %s-%pUl\n",
-  s8, vendor_guid);
-   kfree(s8);
+  ps8, vendor_guid);
+   kfree(ps8);
 }
 
 /**
-- 
1.9.3

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[PATCH] ipc: Resolve shadow warnings

2014-09-05 Thread Jeff Kirsher
From: Mark Rustad 

Resolve some shadow warnings produced in W=2 builds by changing
the name of some parameters and local variables. Change instances
of "s64" because that clashes with the well-known typedef. Also
change a local variable with the name "up" because that clashes
with the name of of the "up" function for semaphores. These are
hazards so eliminate the hazards by renaming them.

Signed-off-by: Mark Rustad 
Signed-off-by: Jeff Kirsher 
---
 ipc/compat.c | 92 ++--
 1 file changed, 46 insertions(+), 46 deletions(-)

diff --git a/ipc/compat.c b/ipc/compat.c
index b5ef4f7..9b3c85f 100644
--- a/ipc/compat.c
+++ b/ipc/compat.c
@@ -171,32 +171,32 @@ static inline int __put_compat_ipc64_perm(struct 
ipc64_perm *p64,
 }
 
 static inline int __put_compat_ipc_perm(struct ipc64_perm *p,
-   struct compat_ipc_perm __user *up)
+   struct compat_ipc_perm __user *uip)
 {
int err;
__compat_uid_t u;
__compat_gid_t g;
 
-   err  = __put_user(p->key, &up->key);
+   err  = __put_user(p->key, &uip->key);
SET_UID(u, p->uid);
-   err |= __put_user(u, &up->uid);
+   err |= __put_user(u, &uip->uid);
SET_GID(g, p->gid);
-   err |= __put_user(g, &up->gid);
+   err |= __put_user(g, &uip->gid);
SET_UID(u, p->cuid);
-   err |= __put_user(u, &up->cuid);
+   err |= __put_user(u, &uip->cuid);
SET_GID(g, p->cgid);
-   err |= __put_user(g, &up->cgid);
-   err |= __put_user(p->mode, &up->mode);
-   err |= __put_user(p->seq, &up->seq);
+   err |= __put_user(g, &uip->cgid);
+   err |= __put_user(p->mode, &uip->mode);
+   err |= __put_user(p->seq, &uip->seq);
return err;
 }
 
-static inline int get_compat_semid64_ds(struct semid64_ds *s64,
+static inline int get_compat_semid64_ds(struct semid64_ds *sem64,
struct compat_semid64_ds __user *up64)
 {
if (!access_ok(VERIFY_READ, up64, sizeof(*up64)))
return -EFAULT;
-   return __get_compat_ipc64_perm(&s64->sem_perm, &up64->sem_perm);
+   return __get_compat_ipc64_perm(&sem64->sem_perm, &up64->sem_perm);
 }
 
 static inline int get_compat_semid_ds(struct semid64_ds *s,
@@ -207,17 +207,17 @@ static inline int get_compat_semid_ds(struct semid64_ds 
*s,
return __get_compat_ipc_perm(&s->sem_perm, &up->sem_perm);
 }
 
-static inline int put_compat_semid64_ds(struct semid64_ds *s64,
+static inline int put_compat_semid64_ds(struct semid64_ds *sem64,
struct compat_semid64_ds __user *up64)
 {
int err;
 
if (!access_ok(VERIFY_WRITE, up64, sizeof(*up64)))
return -EFAULT;
-   err  = __put_compat_ipc64_perm(&s64->sem_perm, &up64->sem_perm);
-   err |= __put_user(s64->sem_otime, &up64->sem_otime);
-   err |= __put_user(s64->sem_ctime, &up64->sem_ctime);
-   err |= __put_user(s64->sem_nsems, &up64->sem_nsems);
+   err  = __put_compat_ipc64_perm(&sem64->sem_perm, &up64->sem_perm);
+   err |= __put_user(sem64->sem_otime, &up64->sem_otime);
+   err |= __put_user(sem64->sem_ctime, &up64->sem_ctime);
+   err |= __put_user(sem64->sem_nsems, &up64->sem_nsems);
return err;
 }
 
@@ -239,11 +239,11 @@ static long do_compat_semctl(int first, int second, int 
third, u32 pad)
 {
unsigned long fourth;
int err, err2;
-   struct semid64_ds s64;
+   struct semid64_ds sem64;
struct semid64_ds __user *up64;
int version = compat_ipc_parse_version(&third);
 
-   memset(&s64, 0, sizeof(s64));
+   memset(&sem64, 0, sizeof(sem64));
 
if ((third & (~IPC_64)) == SETVAL)
 #ifdef __BIG_ENDIAN
@@ -269,29 +269,29 @@ static long do_compat_semctl(int first, int second, int 
third, u32 pad)
 
case IPC_STAT:
case SEM_STAT:
-   up64 = compat_alloc_user_space(sizeof(s64));
+   up64 = compat_alloc_user_space(sizeof(sem64));
fourth = (unsigned long)up64;
err = sys_semctl(first, second, third, fourth);
if (err < 0)
break;
-   if (copy_from_user(&s64, up64, sizeof(s64)))
+   if (copy_from_user(&sem64, up64, sizeof(sem64)))
err2 = -EFAULT;
else if (version == IPC_64)
-   err2 = put_compat_semid64_ds(&s64, compat_ptr(pad));
+   err2 = put_compat_semid64_ds(&sem64, compat_ptr(pad));
else
-   err2 = put_compat_semid_ds(&s64, compat_ptr(pad));
+   err2 = put_compat_semid_ds(&sem64, compat_ptr(pad));
if (err2)
err = -EFAULT;
break;
 
case IPC_SET:
if (version == IPC_64)
-   err = get_compat_semid64_

dynticks: Remove atomic ops for dynticks_idle

2014-09-05 Thread Christoph Lameter
This is on top of the first patch (but still not against your tree). I
wonder what you think about this one. No special operations.


Since dynticks_idle is only ever modified by the local cpu we do
not need to use atomics there.

Signed-off-by: Christoph Lameter 

Index: linux/kernel/rcu/tree.c
===
--- linux.orig/kernel/rcu/tree.c
+++ linux/kernel/rcu/tree.c
@@ -213,7 +213,7 @@ static DEFINE_PER_CPU(struct rcu_dyntick
.dynticks = ATOMIC_INIT(1),
 #ifdef CONFIG_NO_HZ_FULL_SYSIDLE
.dynticks_idle_nesting = DYNTICK_TASK_NEST_VALUE,
-   .dynticks_idle = ATOMIC_INIT(1),
+   .dynticks_idle = 1,
 #endif /* #ifdef CONFIG_NO_HZ_FULL_SYSIDLE */
 };

Index: linux/kernel/rcu/tree.h
===
--- linux.orig/kernel/rcu/tree.h
+++ linux/kernel/rcu/tree.h
@@ -91,7 +91,7 @@ struct rcu_dynticks {
 #ifdef CONFIG_NO_HZ_FULL_SYSIDLE
long long dynticks_idle_nesting;
/* irq/process nesting level from idle. */
-   atomic_t dynticks_idle; /* Even value for idle, else odd. */
+   long dynticks_idle; /* Even value for idle, else odd. */
/*  "Idle" excludes userspace execution. */
unsigned long dynticks_idle_jiffies;
/* End of last non-NMI non-idle period. */
Index: linux/kernel/rcu/tree_plugin.h
===
--- linux.orig/kernel/rcu/tree_plugin.h
+++ linux/kernel/rcu/tree_plugin.h
@@ -2644,9 +2644,9 @@ static void rcu_sysidle_enter(int irq)
j = jiffies;
ACCESS_ONCE(rdtp->dynticks_idle_jiffies) = j;
smp_mb__before_atomic();
-   atomic_inc(&rdtp->dynticks_idle);
+   rdtp->dynticks_idle++;
smp_mb__after_atomic();
-   WARN_ON_ONCE(atomic_read(&rdtp->dynticks_idle) & 0x1);
+   WARN_ON_ONCE(rdtp->dynticks_idle & 0x1);
 }

 /*
@@ -2712,9 +2712,9 @@ static void rcu_sysidle_exit(int irq)

/* Record end of idle period. */
smp_mb__before_atomic();
-   atomic_inc(&rdtp->dynticks_idle);
+   rdtp->dynticks_idle++;
smp_mb__after_atomic();
-   WARN_ON_ONCE(!(atomic_read(&rdtp->dynticks_idle) & 0x1));
+   WARN_ON_ONCE(!(rdtp->dynticks_idle & 0x1));

/*
 * If we are the timekeeping CPU, we are permitted to be non-idle
@@ -2755,7 +2755,7 @@ static void rcu_sysidle_check_cpu(struct
WARN_ON_ONCE(smp_processor_id() != tick_do_timer_cpu);

/* Pick up current idle and NMI-nesting counter and check. */
-   cur = atomic_read(&rdtp->dynticks_idle);
+   cur = rdtp->dynticks_idle;
if (cur & 0x1) {
*isidle = false; /* We are not idle! */
return;
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Re: [RFC] dynticks: dynticks_idle is only modified locally use this_cpu ops

2014-09-05 Thread Christoph Lameter

On Wed, 3 Sep 2014, Paul E. McKenney wrote:

> As noted earlier, in theory, the atomic operations could be nonatomic,

Well as demonstrated by the patch earlier: The atomic operations are only
used on a the local cpu. There is no synchronization in that sense needed
between processors because there is never a remote atomic operation.

> > The code looks fragile and bound to have issues in the future given the
> > barriers/atomics etc. Its going to be cleaner without that.
>
> What exactly looks fragile about it, and exactly what issues do you
> anticipate?

I am concerned about creation of unecessary synchronization issues. In
this case we have already discovered that the atomic operations on per
cpu variables are only used to modify the contents from the local cpu.

This means at minimum we can give up on the use of atomics and keep the
barriers to enforce visibility.

> > And we are right now focusing on the simplest case. The atomics scheme is
> > used multiple times in the RCU subsystem. There is more weird looking code
> > there like atomic_add using zero etc.
>
> The atomic_add_return(0,...) reads the value out, forcing full ordering.
> Again, in theory, this could be a volatile read with explicit memory-barrier
> instructions on either side, but it is not clear which wins.  (Keep in
> mind that almost all of the atomic_add_return(0,...) calls for a given
> dynticks counter are executed from a single kthread.)
>
> If systems continue to add CPUs like they have over the past decade or
> so, I expect that you will be seeing more code like RCU's, not less.

We have other code like this in multiple subsystems but it does not have
the barrier issues, per cpu variables are updated always without the use
of atomics and the inspection of the per cpu state from remote cpus works
just fine also without them.

I'd like to simplify this as much as possible and make it consistent
throughout the kernel.



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Re: [PATCH] security, crypto: LLVMLinux: Remove VLAIS from ima_crypto.c

2014-09-05 Thread Behan Webster

On 09/05/14 17:18, Thomas Gleixner wrote:

On Fri, 5 Sep 2014, beh...@converseincode.com wrote:


From: Behan Webster 

Replaced the use of a Variable Length Array In Struct (VLAIS) with a C99
compliant equivalent. This patch allocates the appropriate amount of memory
using an char array.

The new code can be compiled with both gcc and clang.

struct shash_desc contains a flexible array member member ctx declared with
CRYPTO_MINALIGN_ATTR, so sizeof(struct shash_desc) aligns the beginning
of the array declared after struct shash_desc with long long.

No trailing padding is required because it is not a struct type that can
be used in an array.

The CRYPTO_MINALIGN_ATTR is required so that desc is aligned with long long
as would be the case for a struct containing a member with
CRYPTO_MINALIGN_ATTR.

Signed-off-by: Behan Webster 
Signed-off-by: Mark Charlebois 
Signed-off-by: Jan-Simon Möller 

This SOB chain is completely ass backwards. See Documentation/...

"The Signed-off-by: tag indicates that the signer was involved in the
development of the patch, or that he/she was in the patch's delivery path."

All three of us were involved. Does that not satisfy this rule?


---
  security/integrity/ima/ima_crypto.c | 53 +
  1 file changed, 25 insertions(+), 28 deletions(-)

diff --git a/security/integrity/ima/ima_crypto.c 
b/security/integrity/ima/ima_crypto.c
index 0bd7328..a6aa2b0 100644
--- a/security/integrity/ima/ima_crypto.c
+++ b/security/integrity/ima/ima_crypto.c
@@ -380,17 +380,16 @@ static int ima_calc_file_hash_tfm(struct file *file,
loff_t i_size, offset = 0;
char *rbuf;
int rc, read = 0;
-   struct {
-   struct shash_desc shash;
-   char ctx[crypto_shash_descsize(tfm)];
-   } desc;
+   char desc[sizeof(struct shash_desc) +
+   crypto_shash_descsize(tfm)] CRYPTO_MINALIGN_ATTR;
+   struct shash_desc *shash = (struct shash_desc *)desc;

That anon struct should have never happened in the first place.
Sadly this is a design pattern used in many places through out the 
kernel, and appears to be fundamental to the crypto system. I was 
advised *not* to change it, so we haven't.


I agree that it's not a good practice.


  Not
your problem, but you are not making it any better. You replace open
coded crap with even more unreadable crap.

Whats wrong with

   SHASH_DESC_ON_STACK(shash, tfm);
Nothing is wrong with that. I would have actually preferred that. But it 
would have fundamentally changed a lot more code.


I'm not sure making fundamental changes to the crypto code in order to 
make "my favourite compiler happy" is really a better plan. I prefer 
smaller more measured steps.



or something along that line and hide all the stack allocation, type
conversion crap and make my favourite compiler happy in a single
place?
At this point it is less about making a particular compiler happy, and 
more about making the code at least C99 compliant which enables a 
different compiler so that more people can use it to make more 
fundamental changes like you are suggesting.


I appreciate your feedback,

Behan

--
Behan Webster
beh...@converseincode.com

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Re: [PATCH/v2] net: treewide: Fix typo found in DocBook/networking.xml

2014-09-05 Thread David Miller
From: Masanari Iida 
Date: Thu,  4 Sep 2014 23:44:36 +0900

> This patch fix spelling typo found in DocBook/networking.xml.
> It is because the neworking.xml is generated from comments
> in the source, I have to fix typo in comments within the source.
> 
> Signed-off-by: Masanari Iida 
> Acked-by: Randy Dunlap 

Applied, thanks.
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Re: [GIT PULL] bcache changes for 3.17

2014-09-05 Thread Chuck Ebbert
On Fri, 5 Sep 2014 17:03:57 +
Arne Wiebalck  wrote:

> 
> On Sep 5, 2014, at 6:41 PM, Peter Kieser 
>  wrote:
> 
> > 
> > On 2014-09-05 8:37 AM, Eddie Chapman wrote:
> >> On 05/09/14 15:17, Jens Axboe wrote:
> >>> (from oldest to newest). And that's just from 3.16 to 3.17-rc3,
> >>> going all the way back to 3.10 would be a lot of work. If there's
> >>> anyone that cares about bcache on stable kernels (and actually
> >>> use it), now would be a good time to pipe up.
> >> 
> >> Just "piping up" as I care about bcache and actually use it in
> >> production on 3.10! Shame I don't have the knowledge to try and
> >> backport these though :-)
> >> 
> >> Eddie
> > 
> > I'm "piping up" as well, I use bcache on 3.10 in production.
> > 
> > -Peter
> > 
> 
> 
> More "piping up": we currently use bcache on a few nodes in
> production, on 3.14 and 3.15, and plan to roll it out on a wider
> scale now. If necessary we'll go with these kernels, but we'd
> certainly prefer our usual 3.10-based CentOS kernel.
> 

CentOS does not ship bcache at all. In retrospect it's obvious why.
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[PATCH v6 4/4] MAINTAINERS: entry for APM X-Gene PCIe host driver

2014-09-05 Thread Tanmay Inamdar
Add entry for AppliedMicro X-Gene PCIe host driver.

Signed-off-by: Tanmay Inamdar 
---
 MAINTAINERS | 8 
 1 file changed, 8 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 5e7866a..cd9bb3da 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6941,6 +6941,14 @@ L:   linux-...@vger.kernel.org
 S: Maintained
 F: drivers/pci/host/*spear*
 
+PCI DRIVER FOR APPLIEDMICRO XGENE
+M: Tanmay Inamdar 
+L: linux-...@vger.kernel.org
+L: linux-arm-ker...@lists.infradead.org
+S: Maintained
+F: Documentation/devicetree/bindings/pci/xgene-pci.txt
+F: drivers/pci/host/pci-xgene.c
+
 PCMCIA SUBSYSTEM
 P: Linux PCMCIA Team
 L: linux-pcm...@lists.infradead.org
-- 
1.9.1

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[PATCH v6 2/4] arm64: dts: APM X-Gene PCIe device tree nodes

2014-09-05 Thread Tanmay Inamdar
This patch adds the device tree nodes for APM X-Gene PCIe controller and
PCIe clock interface. Since X-Gene SOC supports maximum 5 ports, 5 dts
nodes are added.

Signed-off-by: Tanmay Inamdar 
---
 arch/arm64/boot/dts/apm-mustang.dts |   8 ++
 arch/arm64/boot/dts/apm-storm.dtsi  | 160 
 2 files changed, 168 insertions(+)

diff --git a/arch/arm64/boot/dts/apm-mustang.dts 
b/arch/arm64/boot/dts/apm-mustang.dts
index b2f5622..f649000 100644
--- a/arch/arm64/boot/dts/apm-mustang.dts
+++ b/arch/arm64/boot/dts/apm-mustang.dts
@@ -25,6 +25,14 @@
};
 };
 
+&pcie0clk {
+   status = "ok";
+};
+
+&pcie0 {
+   status = "ok";
+};
+
 &serial0 {
status = "ok";
 };
diff --git a/arch/arm64/boot/dts/apm-storm.dtsi 
b/arch/arm64/boot/dts/apm-storm.dtsi
index c0aceef..e8a32a2 100644
--- a/arch/arm64/boot/dts/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm-storm.dtsi
@@ -269,6 +269,166 @@
enable-mask = <0x2>;
clock-output-names = "rtcclk";
};
+
+   pcie0clk: pcie0clk@1f2bc000 {
+   status = "disabled";
+   compatible = "apm,xgene-device-clock";
+   #clock-cells = <1>;
+   clocks = <&socplldiv2 0>;
+   reg = <0x0 0x1f2bc000 0x0 0x1000>;
+   reg-names = "csr-reg";
+   clock-output-names = "pcie0clk";
+   };
+
+   pcie1clk: pcie1clk@1f2cc000 {
+   status = "disabled";
+   compatible = "apm,xgene-device-clock";
+   #clock-cells = <1>;
+   clocks = <&socplldiv2 0>;
+   reg = <0x0 0x1f2cc000 0x0 0x1000>;
+   reg-names = "csr-reg";
+   clock-output-names = "pcie1clk";
+   };
+
+   pcie2clk: pcie2clk@1f2dc000 {
+   status = "disabled";
+   compatible = "apm,xgene-device-clock";
+   #clock-cells = <1>;
+   clocks = <&socplldiv2 0>;
+   reg = <0x0 0x1f2dc000 0x0 0x1000>;
+   reg-names = "csr-reg";
+   clock-output-names = "pcie2clk";
+   };
+
+   pcie3clk: pcie3clk@1f50c000 {
+   status = "disabled";
+   compatible = "apm,xgene-device-clock";
+   #clock-cells = <1>;
+   clocks = <&socplldiv2 0>;
+   reg = <0x0 0x1f50c000 0x0 0x1000>;
+   reg-names = "csr-reg";
+   clock-output-names = "pcie3clk";
+   };
+
+   pcie4clk: pcie4clk@1f51c000 {
+   status = "disabled";
+   compatible = "apm,xgene-device-clock";
+   #clock-cells = <1>;
+   clocks = <&socplldiv2 0>;
+   reg = <0x0 0x1f51c000 0x0 0x1000>;
+   reg-names = "csr-reg";
+   clock-output-names = "pcie4clk";
+   };
+   };
+
+   pcie0: pcie@1f2b {
+   status = "disabled";
+   device_type = "pci";
+   compatible = "apm,xgene-storm-pcie", "apm,xgene-pcie";
+   #interrupt-cells = <1>;
+   #size-cells = <2>;
+   #address-cells = <3>;
+   reg = < 0x00 0x1f2b 0x0 0x0001   /* Controller 
registers */
+   0xe0 0xd000 0x0 0x0004>; /* PCI config 
space */
+   reg-names = "csr", "cfg";
+   ranges = <0x0100 0x00 0x 0xe0 0x1000 
0x00 0x0001   /* io */
+ 0x0200 0x00 0x8000 0xe1 0x8000 
0x00 0x8000>; /* mem */
+   dma-ranges = <0x4200 0x80 0x 0x80 
0x 0x00 0x8000
+ 0x4200 0x00 0x 0x00 
0x 0x80 0x>;
+   interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+   interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1
+0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1
+0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1
+0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>;
+   c

[PATCH v6 1/4] pci:host: APM X-Gene PCIe controller driver

2014-09-05 Thread Tanmay Inamdar
This patch adds the AppliedMicro X-Gene SOC PCIe controller driver.
X-Gene PCIe controller supports maximum up to 8 lanes and GEN3 speed.
X-Gene SOC supports maximum 5 PCIe ports.

Signed-off-by: Tanmay Inamdar 
---
 drivers/pci/host/Kconfig |  10 +
 drivers/pci/host/Makefile|   1 +
 drivers/pci/host/pci-xgene.c | 638 +++
 3 files changed, 649 insertions(+)
 create mode 100644 drivers/pci/host/pci-xgene.c

diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
index 90f5cca..382fd3d 100644
--- a/drivers/pci/host/Kconfig
+++ b/drivers/pci/host/Kconfig
@@ -63,4 +63,14 @@ config PCIE_SPEAR13XX
help
  Say Y here if you want PCIe support on SPEAr13XX SoCs.
 
+config PCI_XGENE
+   bool "X-Gene PCIe controller"
+   depends on ARCH_XGENE
+   depends on OF
+   select PCIEPORTBUS
+   help
+ Say Y here if you want internal PCI support on APM X-Gene SoC.
+ There are 5 internal PCIe ports available. Each port is GEN3 capable
+ and have varied lanes from x1 to x8.
+
 endmenu
diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile
index d0e88f1..845611f 100644
--- a/drivers/pci/host/Makefile
+++ b/drivers/pci/host/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o
 obj-$(CONFIG_PCI_RCAR_GEN2_PCIE) += pcie-rcar.o
 obj-$(CONFIG_PCI_HOST_GENERIC) += pci-host-generic.o
 obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o
+obj-$(CONFIG_PCI_XGENE) += pci-xgene.o
diff --git a/drivers/pci/host/pci-xgene.c b/drivers/pci/host/pci-xgene.c
new file mode 100644
index 000..5c4fa60
--- /dev/null
+++ b/drivers/pci/host/pci-xgene.c
@@ -0,0 +1,638 @@
+/**
+ * APM X-Gene PCIe Driver
+ *
+ * Copyright (c) 2014 Applied Micro Circuits Corporation.
+ *
+ * Author: Tanmay Inamdar .
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define PCIECORE_CTLANDSTATUS  0x50
+#define PIM1_1L0x80
+#define IBAR2  0x98
+#define IR2MSK 0x9c
+#define PIM2_1L0xa0
+#define IBAR3L 0xb4
+#define IR3MSKL0xbc
+#define PIM3_1L0xc4
+#define OMR1BARL   0x100
+#define OMR2BARL   0x118
+#define OMR3BARL   0x130
+#define CFGBARL0x154
+#define CFGBARH0x158
+#define CFGCTL 0x15c
+#define RTDID  0x160
+#define BRIDGE_CFG_4   0x2010
+#define BRIDGE_STATUS_00x2600
+
+#define LINK_UP_MASK   0x0100
+#define AXI_EP_CFG_ACCESS  0x1
+#define EN_COHERENCY   0xF000
+#define EN_REG 0x0001
+#define OB_LO_IO   0x0002
+#define XGENE_PCIE_VENDORID0x10E8
+#define XGENE_PCIE_DEVICEID0xE004
+#define SZ_1T  (SZ_1G*1024ULL)
+#define PIPE_PHY_RATE_RD(src)  ((0xc000 & (u32)(src)) >> 0xe)
+
+struct xgene_pcie_port {
+   struct device_node  *node;
+   struct device   *dev;
+   struct clk  *clk;
+   void __iomem*csr_base;
+   void __iomem*cfg_base;
+   unsigned long   cfg_addr;
+   boollink_up;
+};
+
+static inline u32 pcie_bar_low_val(u32 addr, u32 flags)
+{
+   return (addr & PCI_BASE_ADDRESS_MEM_MASK) | flags;
+}
+
+/* PCIE Configuration Out/In */
+static inline void xgene_pcie_cfg_out32(void __iomem *addr, int offset, u32 
val)
+{
+   writel(val, addr + offset);
+}
+
+static inline void xgene_pcie_cfg_out16(void __iomem *addr, int offset, u16 
val)
+{
+   u32 val32 = readl(addr + (offset & ~0x3));
+
+   switch (offset & 0x3) {
+   case 2:
+   val32 &= ~0x;
+   val32 |= (u32)val << 16;
+   break;
+   case 0:
+   default:
+   val32 &= ~0x;
+   val32 |= val;
+   break;
+   }
+   writel(val32, addr + (offset & ~0x3));
+}
+
+static inline void xgene_pcie_cfg_out8(void __iomem *addr, int offset, u8 val)
+{
+   u32 val32 = readl(addr + (offse

[PATCH v6 0/4] APM X-Gene PCIe host controller

2014-09-05 Thread Tanmay Inamdar
This patch adds support for AppliedMicro X-Gene PCIe host controller. The
driver is tested on X-Gene platform with different gen1/2/3 PCIe endpoint
cards.

X-Gene PCIe controller driver has depedency on the pcie arm64 arch support.
Liviu Dudau from ARM has sent a patch set for pcie arm64 arch support and
support for creating generic pcie bridge from device tree. Liviu's patches
are available here
1. https://lkml.org/lkml/2014/8/12/361

If someone wishes to test PCIe on X-Gene with this patch set, above mentioned
patches from Liviu must be applied before the patches in this patch set. Also
please use latest xgene u-boot firmware.

changes since V5:
1. Port driver to changed interface of 'of_create_pci_host_bridge'
2. Fix the prefetch bit setting
3. Removed bunch of register programming which is already done by firmware

changes since V4:
1. fix section mismatch warnings
2. fix the patch description
3. fix indentation
4. update read/write cfg functions by passing both addr and offset.
5. use 'time_before' for timeout.
6. remove unnecessary 'IS_ERR_OR_NULL'. Keep 'IS_ERR' for 'clk_get'
7. remove BUG_ON for pci_ioremap_io.

changes since V3:
1. remove 'struct hw_pci' and supporting ops in hw_pci
2. add code to create the host bridge from dts
3. add code to scan the the host bridge
4. modify outbound windows setup function to get resource information from
   'bridge->windows'
5. add compatible string in pcie dts node with current X-Gene SOC name.

changes since V2:
1. redefined each PCI port in different PCI domain correctly.
2. removed setup_lane and setup_link functions from driver.
3. removed scan_bus wrapper and set_primary_bus hack.
4. added pci_ioremap_io for io resources.

changes since V1:
1. added PCI domain support
2. reading cpu and pci addresses from device tree to configure regions.
3. got rid of unnecessary wrappers for readl and writel.
4. got rid of endpoint configuration code.
5. added 'dma-ranges' property support to read inbound region configuration.
6. renamed host driver file to 'pci-xgene.c' from 'pcie-xgene.c'
7. dropped 'clock-names' property from bindings
8. added comments whereever requested.

Tanmay Inamdar (4):
  pci:host: APM X-Gene PCIe controller driver
  arm64: dts: APM X-Gene PCIe device tree nodes
  dt-bindings: pci: xgene pcie device tree bindings
  MAINTAINERS: entry for APM X-Gene PCIe host driver

 .../devicetree/bindings/pci/xgene-pci.txt  |  55 ++
 MAINTAINERS|   8 +
 arch/arm64/boot/dts/apm-mustang.dts|   8 +
 arch/arm64/boot/dts/apm-storm.dtsi | 160 ++
 drivers/pci/host/Kconfig   |  10 +
 drivers/pci/host/Makefile  |   1 +
 drivers/pci/host/pci-xgene.c   | 638 +
 7 files changed, 880 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pci/xgene-pci.txt
 create mode 100644 drivers/pci/host/pci-xgene.c

-- 
1.9.1

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[PATCH v6 3/4] dt-bindings: pci: xgene pcie device tree bindings

2014-09-05 Thread Tanmay Inamdar
This patch adds the bindings for X-Gene PCIe driver. The driver resides
under 'drivers/pci/host/pci-xgene.c' file.

Signed-off-by: Tanmay Inamdar 
---
 .../devicetree/bindings/pci/xgene-pci.txt  | 55 ++
 1 file changed, 55 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pci/xgene-pci.txt

diff --git a/Documentation/devicetree/bindings/pci/xgene-pci.txt 
b/Documentation/devicetree/bindings/pci/xgene-pci.txt
new file mode 100644
index 000..683a253
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/xgene-pci.txt
@@ -0,0 +1,55 @@
+* AppliedMicro X-Gene PCIe interface
+
+Required properties:
+- device_type: set to "pci"
+- compatible: should contain "apm,xgene-pcie" to identify the core.
+- reg: A list of physical base address and length for each set of controller
+   registers. Must contain an entry for each entry in the reg-names
+   property.
+- reg-names: Must include the following entries:
+  "csr": controller configuration registers.
+  "cfg": pcie configuration space registers.
+- #address-cells: set to <3>
+- #size-cells: set to <2>
+- ranges: ranges for the outbound memory, I/O regions.
+- dma-ranges: ranges for the inbound memory regions.
+- #interrupt-cells: set to <1>
+- interrupt-map-mask and interrupt-map: standard PCI properties
+   to define the mapping of the PCIe interface to interrupt
+   numbers.
+- clocks: from common clock binding: handle to pci clock.
+
+Optional properties:
+- status: Either "ok" or "disabled".
+
+Example:
+
+SoC specific DT Entry:
+
+   pcie0: pcie@1f2b {
+   status = "disabled";
+   device_type = "pci";
+   compatible = "apm,xgene-storm-pcie", "apm,xgene-pcie";
+   #interrupt-cells = <1>;
+   #size-cells = <2>;
+   #address-cells = <3>;
+   reg = < 0x00 0x1f2b 0x0 0x0001   /* Controller 
registers */
+   0xe0 0xd000 0x0 0x0004>; /* PCI config space */
+   reg-names = "csr", "cfg";
+   ranges = <0x0100 0x00 0x 0xe0 0x1000 0x00 
0x0001   /* io */
+ 0x0200 0x00 0x8000 0xe1 0x8000 0x00 
0x8000>; /* mem */
+   dma-ranges = <0x4200 0x80 0x 0x80 0x 0x00 
0x8000
+ 0x4200 0x00 0x 0x00 0x 0x80 
0x>;
+   interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+   interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1
+0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1
+0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1
+0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>;
+   clocks = <&pcie0clk 0>;
+   };
+
+
+Board specific DT Entry:
+   &pcie0 {
+   status = "ok";
+   };
-- 
1.9.1

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[PATCH] kbuild, LLVMLinux: Add better clang cross build support

2014-09-05 Thread behanw
From: Behan Webster 

Add cross target to CC if using clang. Also add custom gcc toolchain path for
fallback gcc tools.

COMPILER is previously set to "clang" if CC=clang was set from the make command
line.  So -target and -gcc-toolchain can be added to CC, since we already know
that it is set.

Clang will fallback to using things like ld, as, and libgcc if (respectively)
one of the llvm linkers isn't available, the integrated assembler is turned
off, or an appropriately cross-compiled version of compiler-rt isn't available.
To this end, you can specify the path to this fallback gcc toolchain with
GCC_TOOLCHAIN.

Signed-off-by: Behan Webster 
---
 Makefile | 9 +
 1 file changed, 9 insertions(+)

diff --git a/Makefile b/Makefile
index 2893d7f..c772619 100644
--- a/Makefile
+++ b/Makefile
@@ -360,7 +360,16 @@ include $(srctree)/scripts/Kbuild.include
 # Make variables (CC, etc...)
 AS = $(CROSS_COMPILE)as
 LD = $(CROSS_COMPILE)ld
+ifeq ($(COMPILER),clang)
+ifneq ($(CROSS_COMPILE),)
+CC += -target $(CROSS_COMPILE:%-=%)
+endif
+ifneq ($(GCC_TOOLCHAIN),)
+CC += -gcc-toolchain $(GCC_TOOLCHAIN)
+endif
+else
 CC = $(CROSS_COMPILE)gcc
+endif
 CPP= $(CC) -E
 AR = $(CROSS_COMPILE)ar
 NM = $(CROSS_COMPILE)nm
-- 
1.9.1

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Re: [PATCH] PCI: Increase BAR size quirk for IBM ipr SAS Crocodile adapters

2014-09-05 Thread Bjorn Helgaas
On Thu, Aug 21, 2014 at 09:26:52AM +1000, Anton Blanchard wrote:
> From: Douglas Lehr 
> 
> The Crocodile chip occasionally comes up with 4k and 8k BAR sizes.
> Due to an errata, setting the SR-IOV page size causes the physical
> function BARs to expand to the system page size.  Since ppc64 uses
> 64k pages, when Linux tries to assign the smaller resource sizes
> to the now 64k BARs the address will be truncated and the BARs will
> overlap.
> 
> This quirk will force Linux to allocate the resource as a full page,
> which will avoid the overlap.
> 
> Cc:  
> Signed-off-by: Douglas Lehr 
> Signed-off-by: Anton Blanchard 
> Acked-by: Milton Miller 

Applied to pci/misc for v3.18, thanks!

I tweaked it to print the expanded resource, see below.

> ---
>  drivers/pci/quirks.c |   19 +++
>  1 file changed, 19 insertions(+)
> 
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 80c2d01..45b946d 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -24,6 +24,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include  /* isa_dma_bridge_buggy */
>  #include "pci.h"
>  
> @@ -287,6 +288,24 @@ static void quirk_citrine(struct pci_dev *dev)
>  }
>  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM,  PCI_DEVICE_ID_IBM_CITRINE,  
> quirk_citrine);
>  
> +/*  On IBM Crocodile ipr SAS adapters, expand bar size to system page size. 
> */
> +static void quirk_extend_bar_to_page(struct pci_dev *dev)
> +{
> + int i;
> +
> + for (i = 0; i < PCI_STD_RESOURCE_END; i++) {
> + struct resource *r = &dev->resource[i];
> +
> + if (r->flags & IORESOURCE_MEM && resource_size(r) < PAGE_SIZE) {
> + dev_info(&dev->dev, "Setting Bar size to Page size");
> + r->end = PAGE_SIZE-1;
> + r->start = 0;
> + r->flags |= IORESOURCE_UNSET;
> + }
> + }
> +}
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, 0x034a, 
> quirk_extend_bar_to_page);
> +
>  /*
>   *  S3 868 and 968 chips report region size equal to 32M, but they decode 
> 64M.
>   *  If it's needed, re-allocate the region.
> -- 



commit 86b6431a306ab5a5204c436a45a3337fb17efa21
Author: Douglas Lehr 
Date:   Thu Aug 21 09:26:52 2014 +1000

PCI: Increase IBM ipr SAS Crocodile BARs to at least system page size

The Crocodile chip occasionally comes up with 4k and 8k BAR sizes.  Due to
an erratum, setting the SR-IOV page size causes the physical function BARs
to expand to the system page size.  Since ppc64 uses 64k pages, when Linux
tries to assign the smaller resource sizes to the now 64k BARs the address
will be truncated and the BARs will overlap.

Force Linux to allocate the resource as a full page, which avoids the
overlap.

[bhelgaas: print expanded resource, too]
Signed-off-by: Douglas Lehr 
Signed-off-by: Anton Blanchard 
Signed-off-by: Bjorn Helgaas 
Acked-by: Milton Miller 
CC: sta...@vger.kernel.org

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 80c2d014283d..e73960311fb4 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -24,6 +24,7 @@
 #include 
 #include 
 #include 
+#include 
 #include/* isa_dma_bridge_buggy */
 #include "pci.h"
 
@@ -287,6 +288,25 @@ static void quirk_citrine(struct pci_dev *dev)
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM,PCI_DEVICE_ID_IBM_CITRINE,  
quirk_citrine);
 
+/*  On IBM Crocodile ipr SAS adapters, expand BAR to system page size */
+static void quirk_extend_bar_to_page(struct pci_dev *dev)
+{
+   int i;
+
+   for (i = 0; i < PCI_STD_RESOURCE_END; i++) {
+   struct resource *r = &dev->resource[i];
+
+   if (r->flags & IORESOURCE_MEM && resource_size(r) < PAGE_SIZE) {
+   r->end = PAGE_SIZE - 1;
+   r->start = 0;
+   r->flags |= IORESOURCE_UNSET;
+   dev_info(&dev->dev, "expanded BAR %d to page size: 
%pR\n",
+r);
+   }
+   }
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, 0x034a, quirk_extend_bar_to_page);
+
 /*
  *  S3 868 and 968 chips report region size equal to 32M, but they decode 64M.
  *  If it's needed, re-allocate the region.
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Re: [PATCH] security, crypto: LLVMLinux: Remove VLAIS from ima_crypto.c

2014-09-05 Thread Thomas Gleixner
On Fri, 5 Sep 2014, beh...@converseincode.com wrote:

> From: Behan Webster 
> 
> Replaced the use of a Variable Length Array In Struct (VLAIS) with a C99
> compliant equivalent. This patch allocates the appropriate amount of memory
> using an char array.
> 
> The new code can be compiled with both gcc and clang.
> 
> struct shash_desc contains a flexible array member member ctx declared with
> CRYPTO_MINALIGN_ATTR, so sizeof(struct shash_desc) aligns the beginning
> of the array declared after struct shash_desc with long long.
> 
> No trailing padding is required because it is not a struct type that can
> be used in an array.
> 
> The CRYPTO_MINALIGN_ATTR is required so that desc is aligned with long long
> as would be the case for a struct containing a member with
> CRYPTO_MINALIGN_ATTR.
> 
> Signed-off-by: Behan Webster 
> Signed-off-by: Mark Charlebois 
> Signed-off-by: Jan-Simon Möller 

This SOB chain is completely ass backwards. See Documentation/...

> ---
>  security/integrity/ima/ima_crypto.c | 53 
> +
>  1 file changed, 25 insertions(+), 28 deletions(-)
> 
> diff --git a/security/integrity/ima/ima_crypto.c 
> b/security/integrity/ima/ima_crypto.c
> index 0bd7328..a6aa2b0 100644
> --- a/security/integrity/ima/ima_crypto.c
> +++ b/security/integrity/ima/ima_crypto.c
> @@ -380,17 +380,16 @@ static int ima_calc_file_hash_tfm(struct file *file,
>   loff_t i_size, offset = 0;
>   char *rbuf;
>   int rc, read = 0;
> - struct {
> - struct shash_desc shash;
> - char ctx[crypto_shash_descsize(tfm)];
> - } desc;
> + char desc[sizeof(struct shash_desc) +
> + crypto_shash_descsize(tfm)] CRYPTO_MINALIGN_ATTR;
> + struct shash_desc *shash = (struct shash_desc *)desc;

That anon struct should have never happened in the first place. Not
your problem, but you are not making it any better. You replace open
coded crap with even more unreadable crap.

Whats wrong with 

  SHASH_DESC_ON_STACK(shash, tfm);

or something along that line and hide all the stack allocation, type
conversion crap and make my favourite compiler happy in a single
place?

Nothing wrong as far as I can tell, it just would add the benefit that
you can halfways ensure that nobody fatfingers the magic allocation
and conversion conventions.

Brainlessly replacing crap by more crap just to make it compile with
your favourite compiler is obviously convers to the goals of proper
written code, but considering your mail domain 

Thanks,

tglx


Re: [PATCH net v6 4/4] tg3: Fix tx_pending checks for tg3_tso_bug

2014-09-05 Thread David Miller
From: Eric Dumazet 
Date: Fri, 05 Sep 2014 17:03:30 -0700

> Instead of this private helper (and pretty limited one btw), we could
> add a core function, that would build skbs with order-0 fragments.
> 
> Instead of skb_linearize(), I guess many call sites could instead use
> this new helper.
> 
> Because as you said, skb_linearize() of one 64KB GSO packet can ask
> order-5 allocations, and this generally does not work reliably.

xen-netback could make use of this helper too.
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[PATCH v2 4/7] arm: LLVMLinux: Use current_stack_pointer in save_stack_trace_tsk

2014-09-05 Thread behanw
From: Behan Webster 

Use the global current_stack_pointer to get the value of the stack pointer.
This change supports being able to compile the kernel with both gcc and clang.

Signed-off-by: Behan Webster 
Signed-off-by: Mark Charlebois 
Reviewed-by: Jan-Simon Möller 
---
 arch/arm/kernel/stacktrace.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c
index f065eb0..92b7237 100644
--- a/arch/arm/kernel/stacktrace.c
+++ b/arch/arm/kernel/stacktrace.c
@@ -134,12 +134,10 @@ static noinline void __save_stack_trace(struct 
task_struct *tsk,
frame.pc = thread_saved_pc(tsk);
 #endif
} else {
-   register unsigned long current_sp asm ("sp");
-
/* We don't want this function nor the caller */
data.skip += 2;
frame.fp = (unsigned long)__builtin_frame_address(0);
-   frame.sp = current_sp;
+   frame.sp = current_stack_pointer;
frame.lr = (unsigned long)__builtin_return_address(0);
frame.pc = (unsigned long)__save_stack_trace;
}
-- 
1.9.1

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[PATCH v2 3/7] arm: LLVMLinux: Use current_stack_pointer for return_address

2014-09-05 Thread behanw
From: Behan Webster 

Use the global current_stack_pointer to get the value of the stack pointer.
This change supports being able to compile the kernel with both gcc and Clang.

Signed-off-by: Behan Webster 
Signed-off-by: Mark Charlebois 
Reviewed-by: Jan-Simon Möller 
---
 arch/arm/kernel/return_address.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/arm/kernel/return_address.c b/arch/arm/kernel/return_address.c
index fafedd8..5bceaef 100644
--- a/arch/arm/kernel/return_address.c
+++ b/arch/arm/kernel/return_address.c
@@ -39,13 +39,12 @@ void *return_address(unsigned int level)
 {
struct return_address_data data;
struct stackframe frame;
-   register unsigned long current_sp asm ("sp");
 
data.level = level + 2;
data.addr = NULL;
 
frame.fp = (unsigned long)__builtin_frame_address(0);
-   frame.sp = current_sp;
+   frame.sp = current_stack_pointer;
frame.lr = (unsigned long)__builtin_return_address(0);
frame.pc = (unsigned long)return_address;
 
-- 
1.9.1

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Linux 3.16.2

2014-09-05 Thread Greg KH
I'm announcing the release of the 3.16.2 kernel.

All users of the 3.16 kernel series must upgrade.

The updated 3.16.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git 
linux-3.16.y
and can be browsed at the normal kernel.org git web browser:

http://git.kernel.org/?p=linux/kernel/git/stable/linux-stable.git;a=summary

thanks,

greg k-h



 Documentation/sound/alsa/ALSA-Configuration.txt|4 
 Documentation/stable_kernel_rules.txt  |3 
 Documentation/virtual/kvm/api.txt  |3 
 Makefile   |2 
 arch/arm/boot/dts/am4372.dtsi  |3 
 arch/arm/include/asm/unistd.h  |   10 
 arch/arm/include/uapi/asm/unistd.h |   11 
 arch/arm/mach-omap2/control.c  |3 
 arch/arm/mach-omap2/omap_hwmod.c   |4 
 arch/arm64/include/asm/cacheflush.h|   11 
 arch/arm64/include/asm/pgtable.h   |   13 
 arch/arm64/include/asm/tlbflush.h  |5 
 arch/arm64/kernel/debug-monitors.c |   22 -
 arch/arm64/kernel/efi.c|2 
 arch/mips/math-emu/cp1emu.c|2 
 arch/powerpc/include/uapi/asm/kvm.h|1 
 arch/powerpc/kernel/eeh_pe.c   |   46 ---
 arch/powerpc/kvm/book3s_hv.c   |   13 
 arch/powerpc/kvm/book3s_pr.c   |2 
 arch/powerpc/platforms/powernv/pci-ioda.c  |1 
 arch/powerpc/platforms/pseries/pci_dlpar.c |4 
 arch/s390/mm/pgtable.c |5 
 arch/x86/Kconfig   |1 
 arch/x86/include/asm/kvm_host.h|2 
 arch/x86/include/asm/pgtable.h |9 
 arch/x86/kernel/cpu/mcheck/mce_intel.c |   18 -
 arch/x86/kernel/resource.c |8 
 arch/x86/kernel/vsyscall_64.c  |8 
 arch/x86/kvm/emulate.c |4 
 arch/x86/kvm/irq.c |2 
 arch/x86/kvm/lapic.c   |   52 ++-
 arch/x86/pci/i386.c|4 
 arch/x86/xen/grant-table.c |   10 
 arch/x86/xen/time.c|2 
 drivers/char/tpm/tpm_i2c_stm_st33.c|1 
 drivers/crypto/ux500/cryp/cryp_core.c  |   25 -
 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c   |6 
 drivers/gpu/drm/omapdrm/omap_gem.c |   10 
 drivers/gpu/drm/omapdrm/omap_plane.c   |4 
 drivers/gpu/drm/radeon/cik.c   |1 
 drivers/hid/hid-cherry.c   |2 
 drivers/hid/hid-kye.c  |2 
 drivers/hid/hid-lg.c   |4 
 drivers/hid/hid-logitech-dj.c  |   15 -
 drivers/hid/hid-monterey.c |2 
 drivers/hid/hid-petalynx.c |2 
 drivers/hid/hid-sunplus.c  |2 
 drivers/hwmon/ads1015.c|4 
 drivers/hwmon/amc6821.c|   17 -
 drivers/hwmon/dme1737.c|   33 +-
 drivers/hwmon/gpio-fan.c   |2 
 drivers/hwmon/lm78.c   |2 
 drivers/hwmon/lm85.c   |9 
 drivers/hwmon/lm92.c   |   13 
 drivers/hwmon/sis5595.c|2 
 drivers/i2c/busses/i2c-at91.c  |4 
 drivers/i2c/busses/i2c-rk3x.c  |2 
 drivers/misc/mei/client.c  |   18 -
 drivers/misc/mei/nfc.c |   11 
 drivers/misc/mei/pci-me.c  |2 
 drivers/misc/mei/pci-txe.c |2 
 drivers/mmc/host/mmci.c|   33 +-
 drivers/pci/hotplug/pciehp_hpc.c   |2 
 drivers/pci/pci-label.c|   18 -
 drivers/pci/pci.c  |   12 
 drivers/pci/setup-res.c|7 
 drivers/scsi/hpsa.c|6 
 drivers/staging/et131x/et131x.c|   68 ++---
 drivers/staging/lustre/lustre/obdclass/class_obd.c |2 
 drivers/staging/rtl8188eu/os_dep/usb_intf.c|2 
 drivers/tty/serial/serial_core.c   |3 
 drivers/usb/core/devio.c   |2 
 drivers/usb/core/hub.c |   58 
 drivers/usb/host/ehci-hub.c|2 
 drivers/usb/host/ehci-pci.c|   25 +
 drivers/usb/host/ohci-dbg.c| 

Re: Linux 3.14.18

2014-09-05 Thread Greg KH
diff --git a/Documentation/sound/alsa/ALSA-Configuration.txt 
b/Documentation/sound/alsa/ALSA-Configuration.txt
index b8dd0df76952..0fd40b15e2d5 100644
--- a/Documentation/sound/alsa/ALSA-Configuration.txt
+++ b/Documentation/sound/alsa/ALSA-Configuration.txt
@@ -2026,8 +2026,8 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. 
This was removed.
   ---
 
 Module for sound cards based on the Asus AV66/AV100/AV200 chips,
-i.e., Xonar D1, DX, D2, D2X, DS, Essence ST (Deluxe), Essence STX,
-HDAV1.3 (Deluxe), and HDAV1.3 Slim.
+i.e., Xonar D1, DX, D2, D2X, DS, DSX, Essence ST (Deluxe),
+Essence STX (II), HDAV1.3 (Deluxe), and HDAV1.3 Slim.
 
 This module supports autoprobe and multiple cards.
 
diff --git a/Documentation/stable_kernel_rules.txt 
b/Documentation/stable_kernel_rules.txt
index b0714d8f678a..8dfb6a5f427d 100644
--- a/Documentation/stable_kernel_rules.txt
+++ b/Documentation/stable_kernel_rules.txt
@@ -29,6 +29,9 @@ Rules on what kind of patches are accepted, and which ones 
are not, into the
 
 Procedure for submitting patches to the -stable tree:
 
+ - If the patch covers files in net/ or drivers/net please follow netdev stable
+   submission guidelines as described in
+   Documentation/networking/netdev-FAQ.txt
  - Send the patch, after verifying that it follows the above rules, to
sta...@vger.kernel.org.  You must note the upstream commit ID in the
changelog of your submission, as well as the kernel version you wish
diff --git a/Makefile b/Makefile
index 12aac0325888..05279d4f44c9 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 3
 PATCHLEVEL = 14
-SUBLEVEL = 17
+SUBLEVEL = 18
 EXTRAVERSION =
 NAME = Remembering Coco
 
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index c6bd4d986c29..8775681df7ed 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -161,9 +161,6 @@
ti,hwmods = "mailbox";
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <8>;
-   ti,mbox-names = "wkup_m3";
-   ti,mbox-data = <0 0 0 0>;
-   status = "disabled";
};
 
timer1: timer@44e31000 {
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index 43876245fc57..21ca0cebcab0 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -15,7 +15,17 @@
 
 #include 
 
+/*
+ * This may need to be greater than __NR_last_syscall+1 in order to
+ * account for the padding in the syscall table
+ */
 #define __NR_syscalls  (384)
+
+/*
+ * *NOTE*: This is a ghost syscall private to the kernel.  Only the
+ * __kuser_cmpxchg code in entry-armv.S should be aware of its
+ * existence.  Don't ever use this from user code.
+ */
 #define __ARM_NR_cmpxchg   (__ARM_NR_BASE+0x00fff0)
 
 #define __ARCH_WANT_STAT64
diff --git a/arch/arm/include/uapi/asm/unistd.h 
b/arch/arm/include/uapi/asm/unistd.h
index fb5584d0cc05..c3776331f407 100644
--- a/arch/arm/include/uapi/asm/unistd.h
+++ b/arch/arm/include/uapi/asm/unistd.h
@@ -410,11 +410,6 @@
 #define __NR_sched_getattr (__NR_SYSCALL_BASE+381)
 
 /*
- * This may need to be greater than __NR_last_syscall+1 in order to
- * account for the padding in the syscall table
- */
-
-/*
  * The following SWIs are ARM private.
  */
 #define __ARM_NR_BASE  (__NR_SYSCALL_BASE+0x0f)
@@ -425,12 +420,6 @@
 #define __ARM_NR_set_tls   (__ARM_NR_BASE+5)
 
 /*
- * *NOTE*: This is a ghost syscall private to the kernel.  Only the
- * __kuser_cmpxchg code in entry-armv.S should be aware of its
- * existence.  Don't ever use this from user code.
- */
-
-/*
  * The following syscalls are obsolete and no longer available for EABI.
  */
 #if !defined(__KERNEL__)
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 44bb4d544dcf..89cde0786d25 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -314,7 +314,8 @@ void omap3_save_scratchpad_contents(void)
scratchpad_contents.public_restore_ptr =
virt_to_phys(omap3_restore_3630);
else if (omap_rev() != OMAP3430_REV_ES3_0 &&
-   omap_rev() != OMAP3430_REV_ES3_1)
+   omap_rev() != OMAP3430_REV_ES3_1 &&
+   omap_rev() != OMAP3430_REV_ES3_1_2)
scratchpad_contents.public_restore_ptr =
virt_to_phys(omap3_restore);
else
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 66c60fe1104c..c914b0052fb9 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2185,6 +2185,8 @@ static int _enable(struct omap_hwmod *oh)
 oh->mux->pads_dynamic))) {
omap_hwmod_mux(o

Linux 3.14.18

2014-09-05 Thread Greg KH
I'm announcing the release of the 3.14.18 kernel.

All users of the 3.14 kernel series must upgrade.

The updated 3.14.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git 
linux-3.14.y
and can be browsed at the normal kernel.org git web browser:

http://git.kernel.org/?p=linux/kernel/git/stable/linux-stable.git;a=summary

thanks,

greg k-h



 Documentation/sound/alsa/ALSA-Configuration.txt |4 -
 Documentation/stable_kernel_rules.txt   |3 +
 Makefile|2 
 arch/arm/boot/dts/am4372.dtsi   |3 -
 arch/arm/include/asm/unistd.h   |   10 +++
 arch/arm/include/uapi/asm/unistd.h  |   11 ---
 arch/arm/mach-omap2/control.c   |3 -
 arch/arm/mach-omap2/omap_hwmod.c|4 +
 arch/powerpc/platforms/powernv/pci-ioda.c   |1 
 arch/powerpc/platforms/pseries/pci_dlpar.c  |4 -
 arch/x86/Kconfig|1 
 arch/x86/include/asm/kvm_host.h |2 
 arch/x86/kernel/resource.c  |8 +-
 arch/x86/kernel/vsyscall_64.c   |8 +-
 arch/x86/kvm/emulate.c  |4 +
 arch/x86/kvm/irq.c  |2 
 arch/x86/kvm/lapic.c|   52 +-
 arch/x86/pci/i386.c |4 +
 arch/x86/xen/grant-table.c  |   10 +--
 arch/x86/xen/time.c |2 
 drivers/char/tpm/tpm_i2c_stm_st33.c |1 
 drivers/crypto/ux500/cryp/cryp_core.c   |   25 
 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c|6 +-
 drivers/gpu/drm/omapdrm/omap_gem.c  |   10 +--
 drivers/gpu/drm/omapdrm/omap_plane.c|4 -
 drivers/gpu/drm/radeon/cik.c|1 
 drivers/hid/hid-cherry.c|2 
 drivers/hid/hid-kye.c   |2 
 drivers/hid/hid-lg.c|4 -
 drivers/hid/hid-logitech-dj.c   |   13 ++--
 drivers/hid/hid-monterey.c  |2 
 drivers/hid/hid-petalynx.c  |2 
 drivers/hid/hid-sunplus.c   |2 
 drivers/hwmon/ads1015.c |4 +
 drivers/hwmon/amc6821.c |   17 +++---
 drivers/hwmon/dme1737.c |   33 ++-
 drivers/hwmon/gpio-fan.c|2 
 drivers/hwmon/lm78.c|2 
 drivers/hwmon/lm85.c|9 ++-
 drivers/hwmon/sis5595.c |2 
 drivers/i2c/busses/i2c-at91.c   |4 -
 drivers/misc/mei/client.c   |2 
 drivers/misc/mei/nfc.c  |   11 +--
 drivers/pci/pci-label.c |   18 --
 drivers/pci/pci.c   |   12 ++--
 drivers/scsi/hpsa.c |6 +-
 drivers/staging/et131x/et131x.c |   68 +---
 drivers/staging/rtl8188eu/os_dep/usb_intf.c |2 
 drivers/tty/serial/serial_core.c|3 +
 drivers/usb/core/devio.c|2 
 drivers/usb/core/hub.c  |   49 -
 drivers/usb/host/ehci-hub.c |2 
 drivers/usb/host/ehci-pci.c |   25 
 drivers/usb/host/ohci-dbg.c |9 +--
 drivers/usb/host/ohci-hcd.c |   10 +--
 drivers/usb/host/ohci-q.c   |   46 ++--
 drivers/usb/host/xhci-pci.c |4 +
 drivers/usb/host/xhci-ring.c|3 -
 drivers/usb/serial/ftdi_sio.c   |5 +
 drivers/usb/serial/ftdi_sio_ids.h   |   20 +--
 drivers/usb/serial/whiteheat.c  |7 ++
 drivers/xen/events/events_fifo.c|5 -
 fs/btrfs/backref.c  |   14 ++--
 fs/btrfs/extent_io.c|1 
 fs/btrfs/file-item.c|2 
 fs/btrfs/inode.c|   12 
 fs/btrfs/ulist.h|   15 +
 fs/debugfs/inode.c  |   33 +--
 fs/ext4/inode.c |   10 ++-
 fs/ext4/mballoc.c   |   26 -
 fs/ext4/super.c |5 +
 fs/isofs/inode.c|   15 ++---
 fs/isofs/isofs.h|   23 ++--
 fs/isofs/rock.c |   39 +
 fs/jbd2/commit.c|   21 ---
 fs/jbd2/journal.c   |   56

Re: Linux 3.10.54

2014-09-05 Thread Greg KH

diff --git a/Documentation/sound/alsa/ALSA-Configuration.txt 
b/Documentation/sound/alsa/ALSA-Configuration.txt
index 95731a08f257..8f08b2a71791 100644
--- a/Documentation/sound/alsa/ALSA-Configuration.txt
+++ b/Documentation/sound/alsa/ALSA-Configuration.txt
@@ -2026,8 +2026,8 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. 
This was removed.
   ---
 
 Module for sound cards based on the Asus AV66/AV100/AV200 chips,
-i.e., Xonar D1, DX, D2, D2X, DS, Essence ST (Deluxe), Essence STX,
-HDAV1.3 (Deluxe), and HDAV1.3 Slim.
+i.e., Xonar D1, DX, D2, D2X, DS, DSX, Essence ST (Deluxe),
+Essence STX (II), HDAV1.3 (Deluxe), and HDAV1.3 Slim.
 
 This module supports autoprobe and multiple cards.
 
diff --git a/Documentation/stable_kernel_rules.txt 
b/Documentation/stable_kernel_rules.txt
index b0714d8f678a..8dfb6a5f427d 100644
--- a/Documentation/stable_kernel_rules.txt
+++ b/Documentation/stable_kernel_rules.txt
@@ -29,6 +29,9 @@ Rules on what kind of patches are accepted, and which ones 
are not, into the
 
 Procedure for submitting patches to the -stable tree:
 
+ - If the patch covers files in net/ or drivers/net please follow netdev stable
+   submission guidelines as described in
+   Documentation/networking/netdev-FAQ.txt
  - Send the patch, after verifying that it follows the above rules, to
sta...@vger.kernel.org.  You must note the upstream commit ID in the
changelog of your submission, as well as the kernel version you wish
diff --git a/Makefile b/Makefile
index 2ac415a7e937..9429aa5e89de 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 3
 PATCHLEVEL = 10
-SUBLEVEL = 53
+SUBLEVEL = 54
 EXTRAVERSION =
 NAME = TOSSUG Baby Fish
 
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 2adb2683f074..6124da1a07d4 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -323,7 +323,8 @@ void omap3_save_scratchpad_contents(void)
scratchpad_contents.public_restore_ptr =
virt_to_phys(omap3_restore_3630);
else if (omap_rev() != OMAP3430_REV_ES3_0 &&
-   omap_rev() != OMAP3430_REV_ES3_1)
+   omap_rev() != OMAP3430_REV_ES3_1 &&
+   omap_rev() != OMAP3430_REV_ES3_1_2)
scratchpad_contents.public_restore_ptr =
virt_to_phys(omap3_restore);
else
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 44c609a1ec5d..62e40a9fffa9 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2177,6 +2177,8 @@ static int _enable(struct omap_hwmod *oh)
 oh->mux->pads_dynamic))) {
omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
_reconfigure_io_chain();
+   } else if (oh->flags & HWMOD_FORCE_MSTANDBY) {
+   _reconfigure_io_chain();
}
 
_add_initiator_dep(oh, mpu_oh);
@@ -2283,6 +2285,8 @@ static int _idle(struct omap_hwmod *oh)
if (oh->mux && oh->mux->pads_dynamic) {
omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
_reconfigure_io_chain();
+   } else if (oh->flags & HWMOD_FORCE_MSTANDBY) {
+   _reconfigure_io_chain();
}
 
oh->_state = _HWMOD_STATE_IDLE;
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index a649cb686692..4e5b80d883c8 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1578,6 +1578,7 @@ config EFI
 config EFI_STUB
bool "EFI stub support"
depends on EFI
+   select RELOCATABLE
---help---
   This kernel feature allows a bzImage to be loaded directly
  by EFI firmware without the use of a bootloader.
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 8b320722de7a..f7f20f7fac3c 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -92,7 +92,7 @@
 #define KVM_REFILL_PAGES 25
 #define KVM_MAX_CPUID_ENTRIES 80
 #define KVM_NR_FIXED_MTRR_REGION 88
-#define KVM_NR_VAR_MTRR 10
+#define KVM_NR_VAR_MTRR 8
 
 #define ASYNC_PF_PER_VCPU 64
 
diff --git a/arch/x86/kernel/resource.c b/arch/x86/kernel/resource.c
index 2a26819bb6a8..80eab01c1a68 100644
--- a/arch/x86/kernel/resource.c
+++ b/arch/x86/kernel/resource.c
@@ -37,10 +37,12 @@ static void remove_e820_regions(struct resource *avail)
 
 void arch_remove_reservations(struct resource *avail)
 {
-   /* Trim out BIOS areas (low 1MB and high 2MB) and E820 regions */
+   /*
+* Trim out BIOS area (high 2MB) and E820 regions. We do not remove
+* the low 1MB unconditionally, as this area is needed for some ISA
+* cards requiring a memory range, e.g. the i82365 PCMCIA controller.
+*/
if (avail->flags & IORESOURCE_MEM) {
-   if (avail->start < BIOS_END)
-   avail->s

Linux 3.10.54

2014-09-05 Thread Greg KH
I'm announcing the release of the 3.10.54 kernel.

All users of the 3.10 kernel series must upgrade.

The updated 3.10.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git 
linux-3.10.y
and can be browsed at the normal kernel.org git web browser:

http://git.kernel.org/?p=linux/kernel/git/stable/linux-stable.git;a=summary

thanks,

greg k-h



 Documentation/sound/alsa/ALSA-Configuration.txt |4 -
 Documentation/stable_kernel_rules.txt   |3 +
 Makefile|2 
 arch/arm/mach-omap2/control.c   |3 -
 arch/arm/mach-omap2/omap_hwmod.c|4 +
 arch/x86/Kconfig|1 
 arch/x86/include/asm/kvm_host.h |2 
 arch/x86/kernel/resource.c  |8 ++-
 arch/x86/kernel/vsyscall_64.c   |8 +--
 arch/x86/kvm/emulate.c  |4 +
 arch/x86/kvm/irq.c  |2 
 arch/x86/kvm/lapic.c|   52 ++--
 arch/x86/pci/i386.c |4 +
 drivers/crypto/ux500/cryp/cryp_core.c   |   25 +--
 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c|6 +-
 drivers/gpu/drm/omapdrm/omap_gem.c  |   10 ++--
 drivers/gpu/drm/omapdrm/omap_plane.c|4 -
 drivers/hid/hid-cherry.c|2 
 drivers/hid/hid-kye.c   |2 
 drivers/hid/hid-lg.c|4 -
 drivers/hid/hid-logitech-dj.c   |   13 ++
 drivers/hid/hid-monterey.c  |2 
 drivers/hid/hid-petalynx.c  |2 
 drivers/hid/hid-sunplus.c   |2 
 drivers/hwmon/ads1015.c |4 +
 drivers/hwmon/dme1737.c |   33 ---
 drivers/hwmon/gpio-fan.c|2 
 drivers/hwmon/lm78.c|2 
 drivers/hwmon/lm85.c|9 ++--
 drivers/hwmon/sis5595.c |2 
 drivers/i2c/busses/i2c-at91.c   |4 -
 drivers/misc/mei/client.c   |2 
 drivers/misc/mei/nfc.c  |   11 ++---
 drivers/scsi/hpsa.c |2 
 drivers/staging/speakup/selection.c |   10 +++-
 drivers/tty/serial/serial_core.c|3 +
 drivers/usb/core/hub.c  |   49 ++
 drivers/usb/host/ehci-pci.c |   25 +++
 drivers/usb/host/ohci-q.c   |   46 +
 drivers/usb/host/xhci-pci.c |4 +
 drivers/usb/host/xhci-ring.c|3 -
 drivers/usb/serial/ftdi_sio.c   |5 ++
 drivers/usb/serial/ftdi_sio_ids.h   |   20 ++---
 drivers/usb/serial/whiteheat.c  |7 ++-
 fs/btrfs/file-item.c|2 
 fs/ext4/mballoc.c   |   26 +++-
 fs/isofs/inode.c|   15 +++---
 fs/isofs/isofs.h|   23 --
 fs/isofs/rock.c |   39 --
 fs/jbd2/recovery.c  |7 ++-
 fs/nfs/nfs3acl.c|5 +-
 fs/nfs/nfs4proc.c   |   17 +--
 fs/nfsd/nfs4callback.c  |3 -
 fs/nfsd/nfssvc.c|5 +-
 include/drm/drm_pciids.h|4 +
 include/linux/sunrpc/svc_xprt.h |1 
 net/sunrpc/svcsock.c|2 
 net/sunrpc/xprt.c   |2 
 net/sunrpc/xprtrdma/svc_rdma_transport.c|1 
 sound/pci/Kconfig   |4 -
 sound/pci/hda/patch_ca0132.c|7 ++-
 sound/pci/hda/patch_realtek.c   |   17 +--
 sound/pci/hda/patch_sigmatel.c  |   12 +
 sound/pci/oxygen/virtuoso.c |1 
 sound/pci/oxygen/xonar_pcm179x.c|   12 -
 virt/kvm/ioapic.c   |7 +--
 virt/kvm/iommu.c|   19 
 67 files changed, 465 insertions(+), 178 deletions(-)

Alan Stern (1):
  USB: OHCI: don't lose track of EDs when a controller dies

Alex Deucher (1):
  drm/radeon: add additional SI pci ids

Alexander Usyskin (3):
  mei: start disconnect request timer consistently
  mei: reset client state on queued connect request
  mei: nfc: fix memory leak in error path

Andy Lutomirski (1):
  x86_64/vsyscall: Fix warn_bad_vsyscall log output

Arnd Bergmann (1):
  crypto: ux500 - make 

[PATCH v2 6/7] arm: LLVMLinux: Use current_stack_pointer in unwind_backtrace

2014-09-05 Thread behanw
From: Behan Webster 

Use the global current_stack_pointer to get the value of the stack pointer.
This change supports being able to compile the kernel with both gcc and clang.

Signed-off-by: Behan Webster 
Signed-off-by: Mark Charlebois 
Reviewed-by: Jan-Simon Möller 
---
 arch/arm/kernel/unwind.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c
index a61a1df..caea23b 100644
--- a/arch/arm/kernel/unwind.c
+++ b/arch/arm/kernel/unwind.c
@@ -471,7 +471,6 @@ int unwind_frame(struct stackframe *frame)
 void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk)
 {
struct stackframe frame;
-   register unsigned long current_sp asm ("sp");
 
pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk);
 
@@ -485,7 +484,7 @@ void unwind_backtrace(struct pt_regs *regs, struct 
task_struct *tsk)
frame.pc = regs->ARM_lr;
} else if (tsk == current) {
frame.fp = (unsigned long)__builtin_frame_address(0);
-   frame.sp = current_sp;
+   frame.sp = current_stack_pointer;
frame.lr = (unsigned long)__builtin_return_address(0);
frame.pc = (unsigned long)unwind_backtrace;
} else {
-- 
1.9.1

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[PATCH v2 7/7] arm: LLVMLinux: Use global stack register variable for percpu

2014-09-05 Thread behanw
From: Mark Charlebois 

Using global current_stack_pointer works on both clang and gcc.
current_stack_pointer is an unsigned long and needs to be cast
as a pointer to dereference.

Signed-off-by: Mark Charlebois 
---
 arch/arm/include/asm/percpu.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/percpu.h b/arch/arm/include/asm/percpu.h
index 209e650..a89b407 100644
--- a/arch/arm/include/asm/percpu.h
+++ b/arch/arm/include/asm/percpu.h
@@ -30,14 +30,14 @@ static inline void set_my_cpu_offset(unsigned long off)
 static inline unsigned long __my_cpu_offset(void)
 {
unsigned long off;
-   register unsigned long *sp asm ("sp");
 
/*
 * Read TPIDRPRW.
 * We want to allow caching the value, so avoid using volatile and
 * instead use a fake stack read to hazard against barrier().
 */
-   asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off) : "Q" (*sp));
+   asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off)
+   : "Q" (*(const unsigned long *)current_stack_pointer));
 
return off;
 }
-- 
1.9.1

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[PATCH v2 5/7] arm: LLVMLinux: Calculate current_thread_info from current_stack_pointer

2014-09-05 Thread behanw
From: Behan Webster 

Use the global current_stack_pointer to get the value of the stack pointer.
This change supports being able to compile the kernel with both gcc and clang.

Signed-off-by: Behan Webster 
Signed-off-by: Mark Charlebois 
Reviewed-by: Jan-Simon Möller 
---
 arch/arm/include/asm/thread_info.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/thread_info.h 
b/arch/arm/include/asm/thread_info.h
index bb43515..b9dc3dc 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -112,8 +112,8 @@ static inline struct thread_info *current_thread_info(void) 
__attribute_const__;
 
 static inline struct thread_info *current_thread_info(void)
 {
-   register unsigned long sp asm ("sp");
-   return (struct thread_info *)(sp & ~(THREAD_SIZE - 1));
+   return (struct thread_info *)
+   (current_stack_pointer & ~(THREAD_SIZE - 1));
 }
 
 #define thread_saved_pc(tsk)   \
-- 
1.9.1

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[GIT PULL] xfs: fixes for 3.17-rc3

2014-09-05 Thread Dave Chinner
Hi Linus,

Can you please pull the following XFS fixes? The fixes all address
recently discovered data corruption issues. The original Direct IO
issue was discovered by Chris Mason @ Facebook on a production
workload which mixed buffered reads with direct reads and writes IO
to the same file. The fix for that exposed other issues with page
invalidation (exposed by millions of fsx operations) failing due to
dirty buffers beyond EOF.

Finally, the collapse_range code could also cause problems due to
racing writeback changing the extent map while it was being shifted
around. The commits for that problem are simple mitigation fixes
that prevent the problem from occuring. A more robust fix for 3.18
that addresses the underlying problem is currently being worked on
by Brian.

-Dave.

The following changes since commit 52addcf9d6669fa439387610bc65c92fa0980cef:

  Linux 3.17-rc2 (2014-08-25 15:36:20 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/dgc/linux-xfs 
tags/xfs-for-linus-3.17-rc3

for you to fetch changes up to 41b9d7263ea1e270019c5d04fa0ab15db50b9725:

  xfs: trim eofblocks before collapse range (2014-09-02 12:12:53 +1000)


xfs: fixes for v3.17-rc3

Fix:
- a direct IO read/buffered read data corruption
- the associated fallout from the DIO data corruption fix
- collapse range bugs that are potential data corruption issues.


Brian Foster (2):
  xfs: don't log inode unless extent shift makes extent modifications
  xfs: trim eofblocks before collapse range

Chris Mason (1):
  xfs: don't zero partial page cache pages during O_DIRECT writes

Dave Chinner (4):
  xfs: don't dirty buffers beyond EOF
  xfs: don't zero partial page cache pages during O_DIRECT writes
  xfs: use ranged writeback and invalidation for direct IO
  xfs: xfs_file_collapse_range is delalloc challenged

 fs/xfs/libxfs/xfs_bmap.c |   18 --
 fs/xfs/xfs_aops.c|   61 ++
 fs/xfs/xfs_bmap_util.c   |   20 +++
 fs/xfs/xfs_file.c|   27 +---
 4 files changed, 114 insertions(+), 12 deletions(-)

-- 
Dave Chinner
da...@fromorbit.com
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Re: [PATCH 1/4] Documentation: use subdir-y to avoid unnecessary built-in.o files

2014-09-05 Thread Randy Dunlap
On 09/04/14 03:42, Mark Brown wrote:
> On Wed, Sep 03, 2014 at 04:38:55PM -0700, Randy Dunlap wrote:
> 
>> Hm, it could be a problem with the Index line.  I'll disable that option
>> in quilt and see if that helps for the next time.
> 
> Still seems to be happening today I'm afraid.
> 

I tested using git-am.  Yes, that fails.  These patch files are not emails
but git-am expects emails and fails when it cannot find email headers (AFAICT).

Using git-apply instead of git-am does apply these patches.

-- 
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[PATCH v2 2/7] arm: LLVMLinux: Use current_stack_pointer to calculate pt_regs address

2014-09-05 Thread behanw
From: Behan Webster 

Use the global current_stack_pointer to calculate the end of the stack for
current_pt_regs()

Signed-off-by: Behan Webster 
Signed-off-by: Mark Charlebois 
Reviewed-by: Jan-Simon Möller 
---
 arch/arm/include/asm/ptrace.h | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h
index 601264d..51622ba 100644
--- a/arch/arm/include/asm/ptrace.h
+++ b/arch/arm/include/asm/ptrace.h
@@ -154,9 +154,8 @@ static inline unsigned long user_stack_pointer(struct 
pt_regs *regs)
return regs->ARM_sp;
 }
 
-#define current_pt_regs(void) ({   \
-   register unsigned long sp asm ("sp");   \
-   (struct pt_regs *)((sp | (THREAD_SIZE - 1)) - 7) - 1;   \
+#define current_pt_regs(void) ({ (struct pt_regs *)\
+   ((current_stack_pointer | (THREAD_SIZE - 1)) - 7) - 1;  \
 })
 
 #endif /* __ASSEMBLY__ */
-- 
1.9.1

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[PATCH v2 1/7] arm: LLVMLinux: Add global named register current_stack_pointer for ARM

2014-09-05 Thread behanw
From: Behan Webster 

Define a global named register for current_stack_pointer. The use of this new
variable guarantees that both gcc and clang can access this register in C code.

Signed-off-by: Behan Webster 
Reviewed-by: Jan-Simon Möller 
Reviewed-by: Mark Charlebois 
---
 arch/arm/include/asm/thread_info.h | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/include/asm/thread_info.h 
b/arch/arm/include/asm/thread_info.h
index fc44d37..bb43515 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -101,6 +101,11 @@ struct thread_info {
 #define init_stack (init_thread_union.stack)
 
 /*
+ * how to get the current stack pointer in C
+ */
+register unsigned long current_stack_pointer asm ("sp");
+
+/*
  * how to get the thread information struct from C
  */
 static inline struct thread_info *current_thread_info(void) 
__attribute_const__;
-- 
1.9.1

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[PATCH v2 0/7] LLVMLinux: Patches to enable the kernel to be compiled with clang/LLVM

2014-09-05 Thread behanw
From: Behan Webster 

The LLVMLinux project aims to fully build the Linux kernel using both gcc and
clang (the C front end for the LLVM compiler infrastructure project). 

Clang only supports global named registers for non-allocatable registers like
the stack pointer. By centralizing the definition of current_stack_pointer, the
use of named registers for ARM remains largely unchanged while working for both
gcc and clang.


Behan Webster (6):
  arm: LLVMLinux: Add global named register current_stack_pointer for
ARM
  arm: LLVMLinux: Use current_stack_pointer to calculate pt_regs address
  arm: LLVMLinux: Use current_stack_pointer for return_address
  arm: LLVMLinux: Use current_stack_pointer in save_stack_trace_tsk
  arm: LLVMLinux: Calculate current_thread_info from
current_stack_pointer
  arm: LLVMLinux: Use current_stack_pointer in unwind_backtrace

Mark Charlebois (1):
  arm: LLVMLinux: Use global stack register variable for percpu

 arch/arm/include/asm/percpu.h  | 4 ++--
 arch/arm/include/asm/ptrace.h  | 5 ++---
 arch/arm/include/asm/thread_info.h | 9 +++--
 arch/arm/kernel/return_address.c   | 3 +--
 arch/arm/kernel/stacktrace.c   | 4 +---
 arch/arm/kernel/unwind.c   | 3 +--
 6 files changed, 14 insertions(+), 14 deletions(-)

-- 
1.9.1

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Re: [PATCH net v6 4/4] tg3: Fix tx_pending checks for tg3_tso_bug

2014-09-05 Thread Eric Dumazet
On Fri, 2014-09-05 at 16:35 -0700, Prashant Sreedharan wrote:

> fyi.. Initially the driver was doing a skb_copy()
> (tigon3_dma_hwbug_workaround()) for LSO skb that met HW bug conditions
> but users started reporting page allocation failures due to copying of
> large LSO skbs. To avoid this Commit 4caab52eb102f1 (tg3: Prevent page
> allocation failure during TSO workaround) changed the driver logic to do
> skb_gso_segment() for LSO skbs that met the HW bug conditions. With
> skb_linearize() we might end up again with memory allocation failures
> for large LSO skbs though at a much less frequent level (ie when TX
> queue is almost full). 

Note that TCP stack has one skb collapse feature, currently limited in
allocation of linear skbs fitting a whole page.

Instead of this private helper (and pretty limited one btw), we could
add a core function, that would build skbs with order-0 fragments.

Instead of skb_linearize(), I guess many call sites could instead use
this new helper.

Because as you said, skb_linearize() of one 64KB GSO packet can ask
order-5 allocations, and this generally does not work reliably.


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[GIT PULL] MTD fixes for 3.17-rc4

2014-09-05 Thread Brian Norris
Hi Linus,

The following changes since commit 2a500afe1e0e84c7a126df693dbd01353756dcfa:

  mtd: gpmi: make blockmark swapping optional (2014-07-27 22:06:31 -0700)

are available in the git repository at:

  git://git.infradead.org/linux-mtd.git tags/for-linus-20140905

for you to fetch changes up to b25046b1e5e3f1423434da77ccc859f2f779d1ce:

  mtd: nand: fix DocBook warnings on nand_sdr_timings doc (2014-08-19 11:55:38 
-0700)


Two trivial MTD updates for 3.17-rc4:

 * A tiny comment tweak, to kill a bunch of DocBook warnings added during the
   merge window

 * A small fixup to the OTP routines' error handling


Boris BREZILLON (1):
  mtd: nand: fix DocBook warnings on nand_sdr_timings doc

Brian Norris (1):
  mtd: cfi_cmdset_0002: check return code for get_chip()

 drivers/mtd/chips/cfi_cmdset_0002.c | 4 
 include/linux/mtd/nand.h| 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)
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Re: linux-next: Tree for Sep 1

2014-09-05 Thread Tejun Heo
On Fri, Sep 05, 2014 at 07:31:14AM -0400, Jason Cooper wrote:
> Tejun, Christoph,
> 
> On Fri, Sep 05, 2014 at 02:11:23AM +0900, Tejun Heo wrote:
> > On Tue, Sep 02, 2014 at 10:00:07AM -0500, Christoph Lameter wrote:
> > > Subject: irqchip: Properly fetch the per cpu offset
> > > 
> > > The raw_cpu_read() conversion dropped the fetch of the offset
> > > from base->percpu_base in gic_get_percpu_base.
> > > 
> > > Signed-off-by: Christoph Lameter 
> > > 
> > > Index: linux/drivers/irqchip/irq-gic.c
> > > ===
> > > --- linux.orig/drivers/irqchip/irq-gic.c
> > > +++ linux/drivers/irqchip/irq-gic.c
> > > @@ -102,7 +102,7 @@ static struct gic_chip_data gic_data[MAX
> > >  #ifdef CONFIG_GIC_NON_BANKED
> > >  static void __iomem *gic_get_percpu_base(union gic_base *base)
> > >  {
> > > - return raw_cpu_read(base->percpu_base);
> > > + return raw_cpu_read(*base->percpu_base);
> > 
> > I suppose this should go through percpu/for-3.18-consistent-ops?  Can
> > we please cc irq folks and get acks?
> 
> Could Thomas and I get a pointer to the original patch and thread that
> caused the error?

http://thread.gmane.org/gmane.linux.kernel/1769201/focus=1769204
http://thread.gmane.org/gmane.linux.kernel.next/32601/focus=32606

Thanks.

-- 
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Question reg. asm/qrwlock.h

2014-09-05 Thread Pranith Kumar
Hi Waiman,

I see that in arch/x86/include/asm/qrwlock.h, there is this snippet within

#ifndef CONFIG_X86_PPRO_FENCE
#define queue_write_unlock queue_write_unlock
static inline void queue_write_unlock(struct qrwlock *lock)
{
barrier();
ACCESS_ONCE(*(u8 *)&lock->cnts) = 0;
}
#endif


I've been trying to understand why this special case is necessary for
PPRO. Could you please explain?

Thanks!
-- 
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Re: [PATCH net v6 4/4] tg3: Fix tx_pending checks for tg3_tso_bug

2014-09-05 Thread Prashant Sreedharan

>  static int tg3_tso_bug(struct tg3 *tp, struct tg3_napi *tnapi,
>  struct netdev_queue *txq, struct sk_buff *skb)
>  {
> - struct sk_buff *segs, *nskb;
> - u32 frag_cnt_est = skb_shinfo(skb)->gso_segs * 3;
> + unsigned int segs_remaining = skb_shinfo(skb)->gso_segs;
>  
> - /* Estimate the number of fragments in the worst case */
> - tg3_maybe_stop_txq(tnapi, txq, frag_cnt_est, frag_cnt_est);
> - if (netif_tx_queue_stopped(txq))
> - return NETDEV_TX_BUSY;
> + if (unlikely(tg3_tx_avail(tnapi) <= segs_remaining)) {
> + if (!skb_is_nonlinear(skb) || skb_linearize(skb))
> + goto tg3_tso_bug_drop;
> + tg3_start_xmit(skb, tp->dev);

fyi.. Initially the driver was doing a skb_copy()
(tigon3_dma_hwbug_workaround()) for LSO skb that met HW bug conditions
but users started reporting page allocation failures due to copying of
large LSO skbs. To avoid this Commit 4caab52eb102f1 (tg3: Prevent page
allocation failure during TSO workaround) changed the driver logic to do
skb_gso_segment() for LSO skbs that met the HW bug conditions. With
skb_linearize() we might end up again with memory allocation failures
for large LSO skbs though at a much less frequent level (ie when TX
queue is almost full). 

Also some of the tg3 supported chips like 5719, 57766 have dma_limits of
4k, 2k respectively so if the LSO skb that gets linearized has size more
than dma_limit then tg3_tx_frag_set() will consume more descriptors and
if budget becomes 0 in tg3_tx_frag_set() we end up calling tg3_tso_bug()
again and eventually dropping the skb, if descriptors do not get freed
still. Instead the skb can be dropped when we know we do not have enough
descriptors to handle skb for these chip versions.

> + } else {
> + struct sk_buff *segs, *nskb;
>  
> - segs = skb_gso_segment(skb, tp->dev->features &
> - ~(NETIF_F_TSO | NETIF_F_TSO6));
> - if (IS_ERR(segs) || !segs)
> - goto tg3_tso_bug_end;
> + segs = skb_gso_segment(skb, tp->dev->features &
> +~(NETIF_F_TSO | NETIF_F_TSO6 |
> +  NETIF_F_SG));
> + if (IS_ERR(segs) || !segs)
> + goto tg3_tso_bug_drop;
>  
> - do {
> - nskb = segs;
> - segs = segs->next;
> - nskb->next = NULL;
> - tg3_start_xmit(nskb, tp->dev);
> - } while (segs);
> + do {
> + nskb = segs;
> + segs = segs->next;
> + nskb->next = NULL;
> + if (--segs_remaining)
> + __tg3_start_xmit(nskb, tp->dev, segs_remaining);
> + else
> + tg3_start_xmit(nskb, tp->dev);
> + } while (segs);
>  
> -tg3_tso_bug_end:
> + dev_kfree_skb_any(skb);
> + }
> +
> + return NETDEV_TX_OK;
> +
> +tg3_tso_bug_drop:
> + tp->tx_dropped++;
>   dev_kfree_skb_any(skb);
>  
>   return NETDEV_TX_OK;
> @@ -7895,6 +7908,12 @@ tg3_tso_bug_end:
>  /* hard_start_xmit for all devices */
>  static netdev_tx_t tg3_start_xmit(struct sk_buff *skb, struct net_device 
> *dev)
>  {
> + return __tg3_start_xmit(skb, dev, MAX_SKB_FRAGS + 1);
> +}
> +
> +static netdev_tx_t __tg3_start_xmit(struct sk_buff *skb,
> + struct net_device *dev, u32 stop_thresh)
> +{
>   struct tg3 *tp = netdev_priv(dev);
>   u32 len, entry, base_flags, mss, vlan = 0;
>   u32 budget;
> @@ -8102,7 +8121,7 @@ static netdev_tx_t tg3_start_xmit(struct sk_buff *skb, 
> struct net_device *dev)
>   tw32_tx_mbox(tnapi->prodmbox, entry);
>  
>   tnapi->tx_prod = entry;
> - tg3_maybe_stop_txq(tnapi, txq, MAX_SKB_FRAGS + 1,
> + tg3_maybe_stop_txq(tnapi, txq, stop_thresh,
>  TG3_TX_WAKEUP_THRESH(tnapi));
>  
>   mmiowb();
> @@ -12336,9 +12355,7 @@ static int tg3_set_ringparam(struct net_device *dev, 
> struct ethtool_ringparam *e
>   if ((ering->rx_pending > tp->rx_std_ring_mask) ||
>   (ering->rx_jumbo_pending > tp->rx_jmb_ring_mask) ||
>   (ering->tx_pending > TG3_TX_RING_SIZE - 1) ||
> - (ering->tx_pending <= MAX_SKB_FRAGS + 1) ||
> - (tg3_flag(tp, TSO_BUG) &&
> -  (ering->tx_pending <= (MAX_SKB_FRAGS * 3
> + (ering->tx_pending <= MAX_SKB_FRAGS + 1))
>   return -EINVAL;
>  
>   if (netif_running(dev)) {


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Re: [PATCH 1/2] Move Intel SNB device ids from sb_edac to pci_ids.h

2014-09-05 Thread Andy Lutomirski
On Fri, Sep 5, 2014 at 4:41 PM, Bjorn Helgaas  wrote:
> On Thu, Aug 14, 2014 at 02:45:40PM -0700, Andy Lutomirski wrote:
>> The i2c_imc driver will use two of them, and moving only part of
>> the list seems messier.
>>
>> Cc: Mauro Carvalho Chehab 
>> Cc: Rui Wang 
>> Signed-off-by: Andy Lutomirski 
>
> Will these IDs actually be used by two drivers by time you're done?  It
> looks like maybe you're removing them from sb_edac.c and adding them to
> i2c_imc.c, which would still only be one place.
>
> But if they will end up being used in more than one place,
>

They will.  Both drivers will need to poke at (different)
configuration space registers on the same devices.  There's one shared
register, but that one is read-only.

--Andy

> Acked-by: Bjorn Helgaas 
>
>> ---
>>  drivers/edac/sb_edac.c  | 30 --
>>  include/linux/pci_ids.h | 15 +++
>>  2 files changed, 15 insertions(+), 30 deletions(-)
>>
>> diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c
>> index deea0dcb..a2597e9313c6 100644
>> --- a/drivers/edac/sb_edac.c
>> +++ b/drivers/edac/sb_edac.c
>> @@ -52,36 +52,6 @@ static int probed;
>>  #define GET_BITFIELD(v, lo, hi)  \
>>   (((v) & GENMASK_ULL(hi, lo)) >> (lo))
>>
>> -/*
>> - * sbridge Memory Controller Registers
>> - */
>> -
>> -/*
>> - * FIXME: For now, let's order by device function, as it makes
>> - * easier for driver's development process. This table should be
>> - * moved to pci_id.h when submitted upstream
>> - */
>> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_SAD0 0x3cf4  /* 12.6 */
>> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_SAD1 0x3cf6  /* 12.7 */
>> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_BR   0x3cf5  /* 13.6 */
>> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_HA0  0x3ca0  /* 14.0 */
>> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TA   0x3ca8  /* 15.0 */
>> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_RAS  0x3c71  /* 15.1 */
>> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD0 0x3caa  /* 15.2 */
>> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD1 0x3cab  /* 15.3 */
>> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD2 0x3cac  /* 15.4 */
>> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD3 0x3cad  /* 15.5 */
>> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_DDRIO0x3cb8  /* 17.0 */
>> -
>> - /*
>> -  * Currently, unused, but will be needed in the future
>> -  * implementations, as they hold the error counters
>> -  */
>> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR0 0x3c72  /* 16.2 */
>> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR1 0x3c73  /* 16.3 */
>> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR2 0x3c76  /* 16.6 */
>> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR3 0x3c77  /* 16.7 */
>> -
>>  /* Devices 12 Function 6, Offsets 0x80 to 0xcc */
>>  static const u32 sbridge_dram_rule[] = {
>>   0x80, 0x88, 0x90, 0x98, 0xa0,
>> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
>> index 7fa31731c854..e0e6801c3d80 100644
>> --- a/include/linux/pci_ids.h
>> +++ b/include/linux/pci_ids.h
>> @@ -2816,7 +2816,22 @@
>>  #define PCI_DEVICE_ID_INTEL_UNC_R2PCIE   0x3c43
>>  #define PCI_DEVICE_ID_INTEL_UNC_R3QPI0   0x3c44
>>  #define PCI_DEVICE_ID_INTEL_UNC_R3QPI1   0x3c45
>> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_RAS  0x3c71  /* 15.1 */
>> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR0 0x3c72  /* 16.2 */
>> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR1 0x3c73  /* 16.3 */
>> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR2 0x3c76  /* 16.6 */
>> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR3 0x3c77  /* 16.7 */
>> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_HA0  0x3ca0  /* 14.0 */
>> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TA   0x3ca8  /* 15.0 */
>> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD0 0x3caa  /* 15.2 */
>> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD1 0x3cab  /* 15.3 */
>> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD2 0x3cac  /* 15.4 */
>> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD3 0x3cad  /* 15.5 */
>> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_DDRIO0x3cb8  /* 17.0 */
>>  #define PCI_DEVICE_ID_INTEL_JAKETOWN_UBOX0x3ce0
>> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_SAD0 0x3cf4  /* 12.6 */
>> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_BR   0x3cf5  /* 13.6 */
>> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_SAD1 0x3cf6  /* 12.7 */
>>  #define PCI_DEVICE_ID_INTEL_IOAT_SNB 0x402f
>>  #define PCI_DEVICE_ID_INTEL_5100_16  0x65f0
>>  #define PCI_DEVICE_ID_INTEL_5100_19  0x65f3
>> --
>> 1.9.3
>>



-- 
Andy Lutomirski
AMA Capital Management, LLC
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Re: [PATCH 1/2] Move Intel SNB device ids from sb_edac to pci_ids.h

2014-09-05 Thread Bjorn Helgaas
On Thu, Aug 14, 2014 at 02:45:40PM -0700, Andy Lutomirski wrote:
> The i2c_imc driver will use two of them, and moving only part of
> the list seems messier.
> 
> Cc: Mauro Carvalho Chehab 
> Cc: Rui Wang 
> Signed-off-by: Andy Lutomirski 

Will these IDs actually be used by two drivers by time you're done?  It
looks like maybe you're removing them from sb_edac.c and adding them to
i2c_imc.c, which would still only be one place.

But if they will end up being used in more than one place,

Acked-by: Bjorn Helgaas 

> ---
>  drivers/edac/sb_edac.c  | 30 --
>  include/linux/pci_ids.h | 15 +++
>  2 files changed, 15 insertions(+), 30 deletions(-)
> 
> diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c
> index deea0dcb..a2597e9313c6 100644
> --- a/drivers/edac/sb_edac.c
> +++ b/drivers/edac/sb_edac.c
> @@ -52,36 +52,6 @@ static int probed;
>  #define GET_BITFIELD(v, lo, hi)  \
>   (((v) & GENMASK_ULL(hi, lo)) >> (lo))
>  
> -/*
> - * sbridge Memory Controller Registers
> - */
> -
> -/*
> - * FIXME: For now, let's order by device function, as it makes
> - * easier for driver's development process. This table should be
> - * moved to pci_id.h when submitted upstream
> - */
> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_SAD0 0x3cf4  /* 12.6 */
> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_SAD1 0x3cf6  /* 12.7 */
> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_BR   0x3cf5  /* 13.6 */
> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_HA0  0x3ca0  /* 14.0 */
> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TA   0x3ca8  /* 15.0 */
> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_RAS  0x3c71  /* 15.1 */
> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD0 0x3caa  /* 15.2 */
> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD1 0x3cab  /* 15.3 */
> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD2 0x3cac  /* 15.4 */
> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD3 0x3cad  /* 15.5 */
> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_DDRIO0x3cb8  /* 17.0 */
> -
> - /*
> -  * Currently, unused, but will be needed in the future
> -  * implementations, as they hold the error counters
> -  */
> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR0 0x3c72  /* 16.2 */
> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR1 0x3c73  /* 16.3 */
> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR2 0x3c76  /* 16.6 */
> -#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR3 0x3c77  /* 16.7 */
> -
>  /* Devices 12 Function 6, Offsets 0x80 to 0xcc */
>  static const u32 sbridge_dram_rule[] = {
>   0x80, 0x88, 0x90, 0x98, 0xa0,
> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> index 7fa31731c854..e0e6801c3d80 100644
> --- a/include/linux/pci_ids.h
> +++ b/include/linux/pci_ids.h
> @@ -2816,7 +2816,22 @@
>  #define PCI_DEVICE_ID_INTEL_UNC_R2PCIE   0x3c43
>  #define PCI_DEVICE_ID_INTEL_UNC_R3QPI0   0x3c44
>  #define PCI_DEVICE_ID_INTEL_UNC_R3QPI1   0x3c45
> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_RAS  0x3c71  /* 15.1 */
> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR0 0x3c72  /* 16.2 */
> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR1 0x3c73  /* 16.3 */
> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR2 0x3c76  /* 16.6 */
> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR3 0x3c77  /* 16.7 */
> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_HA0  0x3ca0  /* 14.0 */
> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TA   0x3ca8  /* 15.0 */
> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD0 0x3caa  /* 15.2 */
> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD1 0x3cab  /* 15.3 */
> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD2 0x3cac  /* 15.4 */
> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD3 0x3cad  /* 15.5 */
> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_DDRIO0x3cb8  /* 17.0 */
>  #define PCI_DEVICE_ID_INTEL_JAKETOWN_UBOX0x3ce0
> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_SAD0 0x3cf4  /* 12.6 */
> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_BR   0x3cf5  /* 13.6 */
> +#define PCI_DEVICE_ID_INTEL_SBRIDGE_SAD1 0x3cf6  /* 12.7 */
>  #define PCI_DEVICE_ID_INTEL_IOAT_SNB 0x402f
>  #define PCI_DEVICE_ID_INTEL_5100_16  0x65f0
>  #define PCI_DEVICE_ID_INTEL_5100_19  0x65f3
> -- 
> 1.9.3
> 
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[PATCH] fs, LLVMLinux: Remove warning from COMPATIBLE_IOCTL

2014-09-05 Thread behanw
From: Mark Charlebois 

cmd in COMPATIBLE_IOCTL is always a u32, so cast it so there isn't a warning
about an overflow in XFORM.

Signed-off-by: Mark Charlebois 
Signed-off-by: Behan Webster 
---
 fs/compat_ioctl.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/compat_ioctl.c b/fs/compat_ioctl.c
index afec645..f6ce1aa 100644
--- a/fs/compat_ioctl.c
+++ b/fs/compat_ioctl.c
@@ -810,7 +810,7 @@ static int compat_ioctl_preallocate(struct file *file,
  */
 #define XFORM(i) (((i) ^ ((i) << 27) ^ ((i) << 17)) & 0x)
 
-#define COMPATIBLE_IOCTL(cmd) XFORM(cmd),
+#define COMPATIBLE_IOCTL(cmd) XFORM((u32)cmd),
 /* ioctl should not be warned about even if it's not implemented.
Valid reasons to use this:
- It is implemented with ->compat_ioctl on some device, but programs
-- 
1.9.1

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Re: [RESEND RFC 5/5] PCIe, AER: Update initial value of UC error mask

2014-09-05 Thread Bjorn Helgaas
On Wed, Aug 13, 2014 at 02:22:41AM -0400, Chen, Gong wrote:
> In PCI-e SPEC r3.0, BIT 0 of Uncorrectable Error Status Register
> is redefined and it has an explicit requirement that when writing
> this field, a value of 1b is the only choice. So change previous
> initial maks from 0 to 1.
> 
> Signed-off-by: Chen, Gong 
> ---
> NOTE: After scratching all use cases, this is the most obvious use
> case to violate the SPEC. Most of use cases just read first and
> then overwrite for clear purpose. Even so, such fix is obvious to
> not compatiable with previous SPEC definition. Do we need a dirty
> hack?
> 
>  arch/mips/pci/pci-octeon.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/mips/pci/pci-octeon.c b/arch/mips/pci/pci-octeon.c
> index 59cccd95688b..f1bfdc201297 100644
> --- a/arch/mips/pci/pci-octeon.c
> +++ b/arch/mips/pci/pci-octeon.c
> @@ -134,7 +134,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
>  dconfig);
>   /* Enable reporting of all uncorrectable errors */
>   /* Uncorrectable Error Mask - turned on bits disable errors */
> - pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, 0);
> + pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, 1);

I see the text in the spec that says we should only write 1 to bit 0 (sec
7.10.3, for anybody following along).  It looks like that change was made
between PCIe r1.0 and r1.1.  It would really be nice to have more context
about why the change was made, because if there's hardware in the field
that implements r1.0 behavior, this patch will change the way it works, and
I don't know how to verify that is safe.

Does this actually change fix a problem?  If it fixes a problem that
happens on real hardware, that's a much better reason to make a change than
just to comply with the spec.

Sec 7.10.2 also says we should ignore the value of bit 0 in the
Uncorrectable Error Status register, and I don't see any place where we
follow that advice.

Bjorn

>* Leave severity at HW default. This only controls if
>* errors are reported as uncorrectable or
> -- 
> 2.0.0.rc2
> 
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[PATCH v10] ARM: brcmstb: reintroduce SMP support

2014-09-05 Thread Brian Norris
Support for SMP bringup of the B15 CPUs on Broadcom STB chips was added
in commit 4fbe66d9903425156c193ae44c81c0f7557755c4 but was reverted in
commit fc3e825fa91636a5d1b992e769b2d8279877bfad to address some late
review comments. This reintroduces SMP support.

Signed-off-by: Marc Carino 
Signed-off-by: Brian Norris 
---
This is v10, as there were 9 revision before this was merged for the first
time. This patch now stands alone.

Changes since v9:
  - Compile platsmp-brcmstb.c only for ARMv7 (v6 doesn't support
v7_exit_coherency_flush())
  - Add a few comments about the hand-rolled per-CPU state polling
* There were some objections to this previously, but I don't see a clear,
  correct, and better solution
  - Remove / fix ordering of a few barriers
  - Drop duplicated print messages
  - Don't repeat core irq_disable()
  - Add error checking for missing DT info
  - Drop unnecssary 'boot_lock'
  - Replace magic delay with barrier
  - Don't call panic() in non-SMP context

 arch/arm/mach-bcm/Makefile  |   2 +
 arch/arm/mach-bcm/brcmstb.h |  19 +++
 arch/arm/mach-bcm/headsmp-brcmstb.S |  33 
 arch/arm/mach-bcm/platsmp-brcmstb.c | 329 
 4 files changed, 383 insertions(+)
 create mode 100644 arch/arm/mach-bcm/brcmstb.h
 create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S
 create mode 100644 arch/arm/mach-bcm/platsmp-brcmstb.c

diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index b19a39652545..59ef0f80119f 100644
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -35,5 +35,7 @@ obj-$(CONFIG_ARCH_BCM2835)+= board_bcm2835.o
 obj-$(CONFIG_ARCH_BCM_5301X)   += bcm_5301x.o
 
 ifeq ($(CONFIG_ARCH_BRCMSTB),y)
+CFLAGS_platsmp-brcmstb.o   += -march=armv7-a
 obj-y  += brcmstb.o
+obj-$(CONFIG_SMP)  += headsmp-brcmstb.o platsmp-brcmstb.o
 endif
diff --git a/arch/arm/mach-bcm/brcmstb.h b/arch/arm/mach-bcm/brcmstb.h
new file mode 100644
index ..ec0c3d112b36
--- /dev/null
+++ b/arch/arm/mach-bcm/brcmstb.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2013-2014 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __BRCMSTB_H__
+#define __BRCMSTB_H__
+
+void brcmstb_secondary_startup(void);
+
+#endif /* __BRCMSTB_H__ */
diff --git a/arch/arm/mach-bcm/headsmp-brcmstb.S 
b/arch/arm/mach-bcm/headsmp-brcmstb.S
new file mode 100644
index ..199c1ea58248
--- /dev/null
+++ b/arch/arm/mach-bcm/headsmp-brcmstb.S
@@ -0,0 +1,33 @@
+/*
+ * SMP boot code for secondary CPUs
+ * Based on arch/arm/mach-tegra/headsmp.S
+ *
+ * Copyright (C) 2010 NVIDIA, Inc.
+ * Copyright (C) 2013-2014 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+
+.section ".text.head", "ax"
+
+ENTRY(brcmstb_secondary_startup)
+/*
+ * Ensure CPU is in a sane state by disabling all IRQs and switching
+ * into SVC mode.
+ */
+setmodePSR_I_BIT | PSR_F_BIT | SVC_MODE, r0
+
+bl  v7_invalidate_l1
+b   secondary_startup
+ENDPROC(brcmstb_secondary_startup)
diff --git a/arch/arm/mach-bcm/platsmp-brcmstb.c 
b/arch/arm/mach-bcm/platsmp-brcmstb.c
new file mode 100644
index ..31c87a284a34
--- /dev/null
+++ b/arch/arm/mach-bcm/platsmp-brcmstb.c
@@ -0,0 +1,329 @@
+/*
+ * Broadcom STB CPU SMP and hotplug support for ARM
+ *
+ * Copyright (C) 2013-2014 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "brcmstb.h"
+
+enum {
+   ZONE_MAN_CLKEN_MASK  

Re: [RFC] memory cgroup: my thoughts on memsw

2014-09-05 Thread Kamezawa Hiroyuki

(2014/09/06 1:00), Vladimir Davydov wrote:

On Fri, Sep 05, 2014 at 11:20:43PM +0900, Kamezawa Hiroyuki wrote:

Basically, I don't like OOM Kill. Anyone don't like it, I think.

In recent container use, application may be build as "stateless" and
kill-and-respawn may not be problematic, but I think killing "a" process
by oom-kill is too naive.

If your proposal is triggering notification to user space at hitting
anon+swap limit, it may be useful.
...Some container-cluster management software can handle it.
For example, container may be restarted.

Memcg has threshold notifier and vmpressure notifier.
I think you can enhance it.

[...]

My point is that "killing a process" tend not to be able to fix the situation.
For example, fork-bomb by "make -j" cannot be handled by it.

So, I don't want to think about enhancing OOM-Kill. Please think of better
way to survive. With the help of countainer-management-softwares, I think
we can have several choices.

Restart contantainer (killall) may be the best if container app is stateless.
Or container-management can provide some failover.


The problem I'm trying to set out is not about OOM actually (sorry if
the way I explain is confusing). We could probably configure OOM to kill
a whole cgroup (not just a process) and/or improve user-notification so
that the userspace could react somehow. I'm sure it must and will be
discussed one day.

The problem is that *before* invoking OOM on *global* pressure we're
trying to reclaim containers' memory and if there's progress we won't
invoke OOM. This can result in a huge slow down of the whole system (due
to swap out).


use SSD or zram for swap device.



The 1st reason we added memsw.limit was for avoiding that the whole swap
is used up by a cgroup where memory-leak of forkbomb running and not for
some intellegent controls.

 From your opinion, I feel what you want is avoiding charging against 
page-caches.
But thiking docker at el, page-cache is not shared between containers any more.
I think "including cache" makes sense.


Not exactly. It's not about sharing caches among containers. The point
is (1) it's difficult to estimate the size of file caches that will max
out the performance of a container, and (2) a typical workload will
perform better and put less pressure on disk if it has more caches.

Now imagine a big host running a small number of containers and
therefore having a lot of free memory most of time, but still
experiencing load spikes once an hour/day/whatever when memory usage
raises up drastically. It'd be unwise to set hard limits for those
containers that are running regularly, because they'd probably perform
much better if they had more file caches. So the admin decides to use
soft limits instead. He is forced to use memsw.limit > the soft limit,
but this is unsafe, because the container may eat anon memory up to
memsw.limit then, and anon memory isn't easy to get rid of when it comes
to the global pressure. If the admin had a mean to limit swappable
memory, he could avoid it. This is what I was trying to illustrate by
the example in the first e-mail of this thread.

Note if there were no soft limits, the current setup would be just fine,
otherwise it fails. And soft limits are proved to be useful AFAIK.
 


As you noticed, hitting anon+swap limit just means oom-kill.
My point is that using oom-killer for "server management" just seems crazy.

Let my clarify things. your proposal was.
 1. soft-limit will be a main feature for server management.
 2. Because of soft-limit, global memory reclaim runs.
 3. Using swap at global memory reclaim can cause poor performance.
 4. So, making use of OOM-Killer for avoiding swap.

I can't agree "4". I think

 - don't configure swap.
 - use zram
 - use SSD for swap
Or
 - provide a way to notify usage of "anon+swap" to container management 
software.

   Now we have "vmpressure". Container management software can kill or respawn 
container
   with using user-defined policy for avoidng swap.

   If you don't want to run kswapd at all, threshold notifier enhancement may 
be required.

/proc/meminfo provides total number of ANON/CACHE pages.
Many things can be done in userland.

And your idea can't help swap-out caused by memory pressure comes from "zones".
I guess vmpressure will be a total win. The kernel may need some enhancement
but I don't like to make use of oom-killer as a part of feature for avoiding 
swap.

Thanks,
-Kame







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Re: [RFC v2 3/6] kthread: warn on kill signal if not OOM

2014-09-05 Thread Tejun Heo
Hey,

On Fri, Sep 05, 2014 at 04:22:42PM -0700, Dmitry Torokhov wrote:
> > I don't get it.  This is a behavior userland already depends on for
> > boots.  What's there to agree or disagree?  This is just a fact that
> > we can't do this w/o disturbing some userlands in a major way.
> 
> I am just expressing my disbelief that somebody relies on module loading
> being synchronous with probing. Out of curiosity, do you have any
> pointers?

I've seen initrd scripts which depended on the behavior to wait for
storage devices over the years.  AFAIK, none of the modern distros
does it but this has been such a basic feature all along and it seems
highly unlikely to me that there's no userland remaining out there
depending on such behavior.  We do have a lot of different userlands,
many of them quite ad-hoc.

Thanks.

-- 
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Re: [PATCH] RFC: add function for localbus address

2014-09-05 Thread Stephen Boyd
On 09/02/14 08:45, Stanimir Varbanov wrote:
> Hi Grant,
>
> I came down to this. Could you review? Is that
> implementation closer to the suggestion made by you.

I like this patch (but I'm biased because I want it to exist). Feel free
to add my Tested-by.


> ---
>  drivers/of/address.c   |   49 
> 
>  drivers/of/platform.c  |   20 ++---
>  include/linux/of_address.h |   19 +
>  3 files changed, 84 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/of/address.c b/drivers/of/address.c
> index e371825..86c2166 100644
> --- a/drivers/of/address.c
> +++ b/drivers/of/address.c
> @@ -601,6 +601,32 @@ const __be32 *of_get_address(struct device_node *dev, 
> int index, u64 *size,
>  }
>  EXPORT_SYMBOL(of_get_address);
>  
> +const __be32 *of_get_localbus_address(struct device_node *np, int index,
> +   u64 *size)
> +{
> + struct device_node *root, *parent;
> + const __be32 *ranges, *prop = NULL;
> +
> + parent = of_get_parent(np);
> + if (!parent)
> + return NULL;
> +
> + root = of_find_node_by_path("/");
> +
> + if (parent == root) {
> + of_node_put(parent);
> + return NULL;
> + }

I don't get this part though. Perhaps it needs a comment to say why we
don't allow the node to live in the root.

> +
> + ranges = of_get_property(parent, "ranges", NULL);
> + of_node_put(parent);
> +
> + if (!ranges)
> + prop = of_get_address(np, index, size, NULL);
> +
> + return prop;
> +}
> +
>

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[PATCH] ARM: brcmstb: Kconfig: drop unneeded symbol selections

2014-09-05 Thread Brian Norris
These are either implied or not necessary.

Signed-off-by: Brian Norris 
---
Based on some of Rob's comments from earlier review

 arch/arm/mach-bcm/Kconfig | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index fc938005ad39..fa9e6134fa72 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -101,10 +101,7 @@ config ARCH_BCM_5301X
 
 config ARCH_BRCMSTB
bool "Broadcom BCM7XXX based boards" if ARCH_MULTI_V7
-   depends on MMU
select ARM_GIC
-   select MIGHT_HAVE_PCI
-   select HAVE_SMP
select HAVE_ARM_ARCH_TIMER
select BRCMSTB_GISB_ARB
select BRCMSTB_L2_IRQ
-- 
1.9.1

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[PATCH V2 1/1] Drivers: hv: vmbus: Enable interrupt driven flow control

2014-09-05 Thread K. Y. Srinivasan
In win8 we have a feature that allows for interrupt driven flow management
for host/guest communication. For instance, if the host were blocked because
there was no space available in the ringbuffer, the host could request that the
guest send an interrupt when space becomes available in the ringbuffer (when
the guest drains the ringbuffer).

While this feature was implemented in the guest a while ago, we had not
advertised that the guest supported this feature. This patch advertises
the support to the host.

For pre-win8 hosts, this has no effect since the size of the ringbuffer
control structure has not changed and all changes have been backward
compatible - unused/reserved space has been used to implement this
feature.

In this version of the patch I have cleaned up the commit log based on
feedback from Greg KH.

Signed-off-by: K. Y. Srinivasan 
---
 drivers/hv/ring_buffer.c |5 +
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/drivers/hv/ring_buffer.c b/drivers/hv/ring_buffer.c
index 15db66b..6361d12 100644
--- a/drivers/hv/ring_buffer.c
+++ b/drivers/hv/ring_buffer.c
@@ -361,6 +361,11 @@ int hv_ringbuffer_init(struct hv_ring_buffer_info 
*ring_info,
ring_info->ring_buffer->read_index =
ring_info->ring_buffer->write_index = 0;
 
+   /*
+* Set the feature bit for enabling flow control.
+*/
+   ring_info->ring_buffer->feature_bits.value = 1;
+
ring_info->ring_size = buflen;
ring_info->ring_datasize = buflen - sizeof(struct hv_ring_buffer);
 
-- 
1.7.4.1

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[PATCH] arm64: LLVMLinux: Fix inline arm64 assembly for use with clang

2014-09-05 Thread behanw
From: Mark Charlebois 

Fix variable types for 64-bit inline assembly.

This patch now works with both gcc and clang.

Signed-off-by: Mark Charlebois 
Signed-off-by: Behan Webster 
---
 arch/arm64/include/asm/arch_timer.h | 26 +++---
 arch/arm64/include/asm/uaccess.h|  2 +-
 arch/arm64/kernel/debug-monitors.c  |  8 
 arch/arm64/kernel/perf_event.c  | 34 +-
 arch/arm64/mm/mmu.c |  2 +-
 5 files changed, 38 insertions(+), 34 deletions(-)

diff --git a/arch/arm64/include/asm/arch_timer.h 
b/arch/arm64/include/asm/arch_timer.h
index 9400596..c1f87e0 100644
--- a/arch/arm64/include/asm/arch_timer.h
+++ b/arch/arm64/include/asm/arch_timer.h
@@ -37,19 +37,23 @@ void arch_timer_reg_write_cp15(int access, enum 
arch_timer_reg reg, u32 val)
if (access == ARCH_TIMER_PHYS_ACCESS) {
switch (reg) {
case ARCH_TIMER_REG_CTRL:
-   asm volatile("msr cntp_ctl_el0,  %0" : : "r" (val));
+   asm volatile("msr cntp_ctl_el0,  %0"
+   : : "r" ((u64)val));
break;
case ARCH_TIMER_REG_TVAL:
-   asm volatile("msr cntp_tval_el0, %0" : : "r" (val));
+   asm volatile("msr cntp_tval_el0, %0"
+   : : "r" ((u64)val));
break;
}
} else if (access == ARCH_TIMER_VIRT_ACCESS) {
switch (reg) {
case ARCH_TIMER_REG_CTRL:
-   asm volatile("msr cntv_ctl_el0,  %0" : : "r" (val));
+   asm volatile("msr cntv_ctl_el0,  %0"
+   : : "r" ((u64)val));
break;
case ARCH_TIMER_REG_TVAL:
-   asm volatile("msr cntv_tval_el0, %0" : : "r" (val));
+   asm volatile("msr cntv_tval_el0, %0"
+   : : "r" ((u64)val));
break;
}
}
@@ -60,7 +64,7 @@ void arch_timer_reg_write_cp15(int access, enum 
arch_timer_reg reg, u32 val)
 static __always_inline
 u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg)
 {
-   u32 val;
+   u64 val;
 
if (access == ARCH_TIMER_PHYS_ACCESS) {
switch (reg) {
@@ -82,26 +86,26 @@ u32 arch_timer_reg_read_cp15(int access, enum 
arch_timer_reg reg)
}
}
 
-   return val;
+   return (u32)val;
 }
 
 static inline u32 arch_timer_get_cntfrq(void)
 {
-   u32 val;
+   u64 val;
asm volatile("mrs %0,   cntfrq_el0" : "=r" (val));
-   return val;
+   return (u32)val;
 }
 
 static inline u32 arch_timer_get_cntkctl(void)
 {
-   u32 cntkctl;
+   u64 cntkctl;
asm volatile("mrs   %0, cntkctl_el1" : "=r" (cntkctl));
-   return cntkctl;
+   return (u32)cntkctl;
 }
 
 static inline void arch_timer_set_cntkctl(u32 cntkctl)
 {
-   asm volatile("msr   cntkctl_el1, %0" : : "r" (cntkctl));
+   asm volatile("msr   cntkctl_el1, %0" : : "r" ((u64)cntkctl));
 }
 
 static inline void arch_counter_set_user_access(void)
diff --git a/arch/arm64/include/asm/uaccess.h b/arch/arm64/include/asm/uaccess.h
index 3bf8f4e..104719b 100644
--- a/arch/arm64/include/asm/uaccess.h
+++ b/arch/arm64/include/asm/uaccess.h
@@ -93,7 +93,7 @@ static inline void set_fs(mm_segment_t fs)
__chk_user_ptr(addr);   \
asm("adds %1, %1, %3; ccmp %1, %4, #2, cc; cset %0, ls" \
: "=&r" (flag), "=&r" (roksum)  \
-   : "1" (addr), "Ir" (size),  \
+   : "1" (addr), "r" ((u64)size),  \
  "r" (current_thread_info()->addr_limit)   \
: "cc");\
flag;   \
diff --git a/arch/arm64/kernel/debug-monitors.c 
b/arch/arm64/kernel/debug-monitors.c
index b056369..695a18f 100644
--- a/arch/arm64/kernel/debug-monitors.c
+++ b/arch/arm64/kernel/debug-monitors.c
@@ -43,15 +43,15 @@ static void mdscr_write(u32 mdscr)
 {
unsigned long flags;
local_dbg_save(flags);
-   asm volatile("msr mdscr_el1, %0" :: "r" (mdscr));
+   asm volatile("msr mdscr_el1, %0" : : "r" ((u64)mdscr));
local_dbg_restore(flags);
 }
 
 static u32 mdscr_read(void)
 {
-   u32 mdscr;
+   u64 mdscr;
asm volatile("mrs %0, mdscr_el1" : "=r" (mdscr));
-   return mdscr;
+   return (u32)mdscr;
 }
 
 /*
@@ -127,7 +127,7 @@ void disable_debug_monitors(enum debug_el el)
  */
 static void clear_os_lock(void *unused)
 {
-   asm volatile("msr oslar_el1, %0" : : "r" (0));
+   asm volatile("msr oslar_el1, %0" : : "r" ((u64)0));
 }
 
 static int os_lock_n

[PATCH] arm64: LLVMLinux: Provide __aeabi_* symbols which are needed for clang

2014-09-05 Thread behanw
From: Behan Webster 

These symbols are required when compiling the Linux kernel for arch ARM64 with
clang.

Author: Mark Charlebois 
Signed-off-by: Mark Charlebois 
Signed-off-by: Behan Webster 
---
 arch/arm64/lib/Makefile |  4 
 arch/arm64/lib/eabi.c   | 32 
 2 files changed, 36 insertions(+)
 create mode 100644 arch/arm64/lib/eabi.c

diff --git a/arch/arm64/lib/Makefile b/arch/arm64/lib/Makefile
index d98d3e3..0d3407c 100644
--- a/arch/arm64/lib/Makefile
+++ b/arch/arm64/lib/Makefile
@@ -3,3 +3,7 @@ lib-y   := bitops.o clear_user.o delay.o 
copy_from_user.o   \
   clear_page.o memchr.o memcpy.o memmove.o memset.o\
   memcmp.o strcmp.o strncmp.o strlen.o strnlen.o   \
   strchr.o strrchr.o
+
+ifeq ($(COMPILER),clang)
+lib-y += eabi.o
+endif
diff --git a/arch/arm64/lib/eabi.c b/arch/arm64/lib/eabi.c
new file mode 100644
index 000..41b27b2
--- /dev/null
+++ b/arch/arm64/lib/eabi.c
@@ -0,0 +1,32 @@
+/*
+ *  linux/lib/eabi.c
+ *
+ *  Copyright (C) 2012  Mark Charlebois
+ */
+
+/*
+ * EABI routines
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+void __aeabi_memcpy(void *dest, const void *src, size_t n)
+{
+   (void)memcpy(dest, src, n);
+}
+EXPORT_SYMBOL(__aeabi_memcpy);
+
+void __aeabi_memmove(void *dest, const void *src, size_t n)
+{
+   (void)memmove(dest, src, n);
+}
+EXPORT_SYMBOL(__aeabi_memmove);
+
+void __aeabi_memset(void *s, size_t n, int c)
+{
+   (void)memset(s, c, n);
+}
+EXPORT_SYMBOL(__aeabi_memset);
-- 
1.9.1

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Re: [RFC v2 3/6] kthread: warn on kill signal if not OOM

2014-09-05 Thread Dmitry Torokhov
Hi Tejun,

On Sat, Sep 06, 2014 at 07:55:33AM +0900, Tejun Heo wrote:
> Hello, Dmitry.
> 
> On Fri, Sep 05, 2014 at 03:49:17PM -0700, Dmitry Torokhov wrote:
> > On Sat, Sep 06, 2014 at 07:31:39AM +0900, Tejun Heo wrote:
> > > On Sat, Sep 06, 2014 at 07:29:56AM +0900, Tejun Heo wrote:
> > > > It is for storage devices which always have guaranteed synchronous
> > > > probing on module load and well-defined probing order.
> > 
> > Agree about probing order (IIRC that is why we had to revert the
> > wholesale asynchronous probing a few years back) but totally disagree
> > about synchronous module loading.
> 
> I don't get it.  This is a behavior userland already depends on for
> boots.  What's there to agree or disagree?  This is just a fact that
> we can't do this w/o disturbing some userlands in a major way.

I am just expressing my disbelief that somebody relies on module loading
being synchronous with probing. Out of curiosity, do you have any
pointers?

> 
> > Anyway, I just posted a patch that I think preserves module loading
> > behavior and solves my issue with built-in modules. It does not help
> > Luis' issue though (but then I think the main problem is with systemd
> > being stupid there).
> 
> This sure can be worked around from userland side too by not imposing
> any timeout on module loading but that said for the same reasons that
> you've been arguing until now, I actually do think that it's kinda
> silly to make device probing synchronous to module loading at this
> time and age.  What we disagree on is not that we want to separate
> those waits.  It is about how to achieve it.

Well, there are separate things we want to solve. My main issue is not
with modules, but rather compiled-in drivers that stall kernel boot,
and these particular drivers are just fine if they are probed out of
bound.

> 
> > > To add a bit, if the argument here is that dependency on such behavior
> > > shouldn't exist and module loading and device probing should always be
> > > asynchronous, the right approach is implementing "synchronous_probing"
> > > flag not the other way around.  I actually wouldn't hate to see that
> > > change happening but whoever submits and routes such a change should
> > > be ready for a major shitstorm, I'm afraid.
> > 
> > I think we already had this storm and that is why here we have opt-in
> > behavior for the drivers.
> 
> It's a different shitstorm where we actively break bootings on some
> userlands.  Trust me.  That's gonna be a lot worse.

That did break bootings and that's why we reverted the wholesale async
probing.

Thanks.

-- 
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Re: [PATCH] bluetooth: LLVMLinux: Remove VLAIS from bluetooth/amp.c

2014-09-05 Thread Marcel Holtmann
Hi Behan,

> Replaced the use of a Variable Length Array In Struct (VLAIS) with a C99
> compliant equivalent. This patch allocates the appropriate amount of memory
> using an char array.
> 
> The new code can be compiled with both gcc and clang.
> 
> struct shash_desc contains a flexible array member member ctx declared with
> CRYPTO_MINALIGN_ATTR, so sizeof(struct shash_desc) aligns the beginning
> of the array declared after struct shash_desc with long long.
> 
> No trailing padding is required because it is not a struct type that can
> be used in an array.
> 
> The CRYPTO_MINALIGN_ATTR is required so that desc is aligned with long long
> as would be the case for a struct containing a member with
> CRYPTO_MINALIGN_ATTR.
> 
> Signed-off-by: Behan Webster 
> Signed-off-by: Mark Charlebois 
> Signed-off-by: Jan-Simon Möller 
> ---
> net/bluetooth/amp.c | 13 ++---
> 1 file changed, 6 insertions(+), 7 deletions(-)

patch has been applied to bluetooth-next tree.

Regards

Marcel

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[PATCH] arm64: LLVMLinux: Add missing abort() for AARCH64

2014-09-05 Thread behanw
From: Mark Charlebois 

Add missing abort for arch aarch64.

This patch makes the aarch64 kernel able to compile with gcc or clang.

Signed-off-by: Mark Charlebois 
Signed-off-by: Behan Webster 
---
 arch/arm64/kernel/traps.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c
index 02cd3f0..123cd6e 100644
--- a/arch/arm64/kernel/traps.c
+++ b/arch/arm64/kernel/traps.c
@@ -349,6 +349,15 @@ void __pgd_error(const char *file, int line, unsigned long 
val)
pr_crit("%s:%d: bad pgd %016lx.\n", file, line, val);
 }
 
+void abort(void)
+{
+   BUG();
+
+   /* if that doesn't kill us, halt */
+   panic("Oops failed to kill thread");
+}
+EXPORT_SYMBOL(abort);
+
 void __init trap_init(void)
 {
return;
-- 
1.9.1

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Re: [RFC v2 3/6] kthread: warn on kill signal if not OOM

2014-09-05 Thread Dmitry Torokhov
On Fri, Sep 05, 2014 at 04:05:30PM -0700, Arjan van de Ven wrote:
> On 9/5/2014 3:52 PM, Dmitry Torokhov wrote:
> >On Fri, Sep 05, 2014 at 03:45:08PM -0700, Arjan van de Ven wrote:
> >>On 9/5/2014 3:29 PM, Tejun Heo wrote:
> >>>Hello, Dmitry.
> >>>
> >>>On Fri, Sep 05, 2014 at 11:10:03AM -0700, Dmitry Torokhov wrote:
> I do not agree that it is actually user-visible change: generally 
> speaking you
> do not really know if device is there or not. They come and go. Like I 
> said,
> consider all permutations, with hot-pluggable buses, deferred probing, 
> etc,
> >>>
> >>>It is for storage devices which always have guaranteed synchronous
> >>>probing on module load and well-defined probing order.  Sure, modern
> >>>setups are a lot more dynamic but I'm quite certain that there are
> >>>setups in the wild which depend on storage driver loading being
> >>>synchronous.  We can't simply declare one day that such behavior is
> >>>broken and break, most likely, their boots.
> >>
> >>we even depend on this in the mount-by-label cases
> >>
> >>many setups assume that the internal storage prevails over the USB stick in 
> >>the case of conflicts.
> >>it's a security issue; you don't want the built in secure bootloader that 
> >>has a kernel root argument
> >>by label/uuid.
> >>the security there tends to assume that built-in wins over USB
> >
> >Ahem... and they sure it works reliably with large storage arrays? With
> >SCSI doing probing asynchronously already?
> 
> you tend to trust your large storage array
> you tend to not trust the walk up USB stick.

If you allow physical access it does not matter really.

-- 
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[PATCH] arm: LLVMLinux: Provide __aeabi_* symbols which are needed for clang

2014-09-05 Thread behanw
From: Behan Webster 

These symbols are required when compiling the Linux kernel for arch ARM with
clang.

Author: Mark Charlebois 
Signed-off-by: Mark Charlebois 
Signed-off-by: Behan Webster 
---
 arch/arm/lib/Makefile |  4 
 arch/arm/lib/eabi.c   | 32 
 2 files changed, 36 insertions(+)
 create mode 100644 arch/arm/lib/eabi.c

diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 0573faa..b585fcf 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -15,6 +15,10 @@ lib-y:= backtrace.o changebit.o csumipv6.o 
csumpartial.o   \
   io-readsb.o io-writesb.o io-readsl.o io-writesl.o  \
   call_with_stack.o bswapsdi2.o
 
+ifeq ($(COMPILER),clang)
+lib-y += eabi.o
+endif
+
 mmu-y  := clear_user.o copy_page.o getuser.o putuser.o
 
 # the code in uaccess.S is not preemption safe and
diff --git a/arch/arm/lib/eabi.c b/arch/arm/lib/eabi.c
new file mode 100644
index 000..41b27b2
--- /dev/null
+++ b/arch/arm/lib/eabi.c
@@ -0,0 +1,32 @@
+/*
+ *  linux/lib/eabi.c
+ *
+ *  Copyright (C) 2012  Mark Charlebois
+ */
+
+/*
+ * EABI routines
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+void __aeabi_memcpy(void *dest, const void *src, size_t n)
+{
+   (void)memcpy(dest, src, n);
+}
+EXPORT_SYMBOL(__aeabi_memcpy);
+
+void __aeabi_memmove(void *dest, const void *src, size_t n)
+{
+   (void)memmove(dest, src, n);
+}
+EXPORT_SYMBOL(__aeabi_memmove);
+
+void __aeabi_memset(void *s, size_t n, int c)
+{
+   (void)memset(s, c, n);
+}
+EXPORT_SYMBOL(__aeabi_memset);
-- 
1.9.1

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Re: [GIT PULL] bcache changes for 3.17

2014-09-05 Thread Peter Kieser


On 2014-09-05 2:45 PM, Greg KH wrote:

Just because a maintainer/developer doesn't want to do anything for the
stable kernel releases does_NOT_  mean the code is
"unstable/expreimental" at all.


These are more bcache-ate-my-data unstable bugs. It's standard practice 
to backport fixes that cause instability/data corruption to a 'stable' 
release (otherwise, why would it be named 'stable')?


-Peter



smime.p7s
Description: S/MIME Cryptographic Signature


[PATCH] mm: Apply the section attribute to the variable, not its type

2014-09-05 Thread behanw
From: Jan-Simon Möller 

This fixes a compilation error in clang in that a linker section attribute
can't be added to a type.

arch/x86/mm/mmap.c:34:8: error: '__section__' attribute only applies to 
functions and global variables
struct __read_mostly va_alignment va_align = {
   ^
arch/x86/include/asm/cache.h:10:38: note: expanded from macro '__read_mostly'
#define __read_mostly __attribute__((__section__(".data..read_mostly")))
 ^
1 error generated.

By moving the section attribute to the variable declaration, the desired effect
is acheived.

Signed-off-by: Jan-Simon Möller 
Signed-off-by: Behan Webster 
---
 arch/x86/mm/mmap.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/mm/mmap.c b/arch/x86/mm/mmap.c
index 25e7e13..919b912 100644
--- a/arch/x86/mm/mmap.c
+++ b/arch/x86/mm/mmap.c
@@ -31,7 +31,7 @@
 #include 
 #include 
 
-struct __read_mostly va_alignment va_align = {
+struct va_alignment __read_mostly va_align = {
.flags = -1,
 };
 
-- 
1.9.1

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Re: [RESEND 2/5] PCIe, AER: Replenish missed AER status bits for AER driver

2014-09-05 Thread Bjorn Helgaas
On Wed, Aug 13, 2014 at 02:22:38AM -0400, Chen, Gong wrote:
> Since commit 6c2b374d is commited, the capability of PCI-e AER
> has changed a lot. This patch adds all missed CE/UC error bits
> existed in PCI-e SPEC r3.0. Meanwhile, adjust the code format
> to make it simpler to read/maintain.
> 
> Signed-off-by: Chen, Gong 
> ---
>  drivers/pci/pcie/aer/aerdrv_errprint.c | 60 
> ++
>  1 file changed, 25 insertions(+), 35 deletions(-)
> 
> diff --git a/drivers/pci/pcie/aer/aerdrv_errprint.c 
> b/drivers/pci/pcie/aer/aerdrv_errprint.c
> index 35d06e177917..5c4f7e252e5e 100644
> --- a/drivers/pci/pcie/aer/aerdrv_errprint.c
> +++ b/drivers/pci/pcie/aer/aerdrv_errprint.c
> @@ -75,44 +75,34 @@ static const char *aer_error_layer[] = {
>  };
>  
>  static const char *aer_correctable_error_string[] = {
> - "Receiver Error",   /* Bit Position 0   */
> - NULL,
> - NULL,
> - NULL,
> - NULL,
> - NULL,
> - "Bad TLP",  /* Bit Position 6   */
> - "Bad DLLP", /* Bit Position 7   */
> - "RELAY_NUM Rollover",   /* Bit Position 8   */
> - NULL,
> - NULL,
> - NULL,
> - "Replay Timer Timeout", /* Bit Position 12  */
> - "Advisory Non-Fatal",   /* Bit Position 13  */
> + [0] = "Receiver Error",
> + [6] = "Bad TLP",
> + [7] = "Bad DLLP",
> + [8] = "RELAY_NUM Rollover",
> + [12] = "Replay Timer Timeout",
> + [13] = "Advisory Non-Fatal Error",
> + [14] = "Corrected Internal Error",
> + [15] = "Header Log Overflow",

You replaced bare numbers with the existing #defines in the previous patch
(thank you), but now we're adding them here.  I'm pretty sure you can use
the #defines here, e.g.,

[PCI_ERR_COR_RCVR] = "Receiver Error",

In fact, it would be really nice if you could figure out a way to have only
one set of these strings.  Right now, we have the set in
include/ras/ras_event.h, and then another set here in aerdrv_errprint.c,
and they contain exactly the same information.

Bjorn

>  };
>  
>  static const char *aer_uncorrectable_error_string[] = {
> - NULL,
> - NULL,
> - NULL,
> - NULL,
> - "Data Link Protocol",   /* Bit Position 4   */
> - NULL,
> - NULL,
> - NULL,
> - NULL,
> - NULL,
> - NULL,
> - NULL,
> - "Poisoned TLP", /* Bit Position 12  */
> - "Flow Control Protocol",/* Bit Position 13  */
> - "Completion Timeout",   /* Bit Position 14  */
> - "Completer Abort",  /* Bit Position 15  */
> - "Unexpected Completion",/* Bit Position 16  */
> - "Receiver Overflow",/* Bit Position 17  */
> - "Malformed TLP",/* Bit Position 18  */
> - "ECRC", /* Bit Position 19  */
> - "Unsupported Request",  /* Bit Position 20  */
> + [0] = "Undefined",
> + [4] = "Data Link Protocol Error",
> + [5] = "Surprise Down Error",
> + [12] = "Poisoned TLP",
> + [13] = "Flow Control Protocol Error",
> + [14] = "Completion Timeout",
> + [15] = "Completer Abort",
> + [16] = "Unexpected Completion",
> + [17] = "Receiver Overflow",
> + [18] = "Malformed TLP",
> + [19] = "ECRC Error",
> + [20] = "Unsupported Request Error",
> + [21] = "ACS Violation",
> + [22] = "Uncorrectable Internal Error",
> + [23] = "MC Blocked TLP",
> + [24] = "AtomicOp Egress Blocked",
> + [25] = "TLP Prefix Blocked Error",
>  };
>  
>  static const char *aer_agent_string[] = {
> -- 
> 2.0.0.rc2
> 
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Re: [Patch v4 1/2] freezer: check OOM kill while being frozen

2014-09-05 Thread Rafael J. Wysocki
On Saturday, September 06, 2014 07:45:54 AM Tejun Heo wrote:
> Hello,
> 
> On Fri, Sep 05, 2014 at 11:12:24AM -0700, Cong Wang wrote:
> > > Rafael, can you please help?
> > 
> > Rafael is known not responsive at least for this topic. :)
> 
> :(

Well, am I?

I haven't commented patches in this thread so far, mostly because other
people have.

How can I help actually?

> > > Shouldn't the primary goal of the comment be explaining why we need
> > > TIF_MEMDIE check there at all anyway?  The deadlock possiblity is not
> > > very obvious.
> > 
> > The changelog is not long enough?? ;-) I hate to copy+paste changelog
> > into comments, changelog is essentially necessary for people to understand
> > kernel code (at least networking) , so I don't think we have to move it
> > into comments in this case.
> 
> It doesn't have to be the same text but the current comment is
> basically content-less.  e.g. it can just say "OOM killer may get
> stuck trying to kill a cgroup frozen task" and actualy provide
> information on what condition the conditional tries to address.

Or something like "We need to check X to prevent Y from happening".

Rafael

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[PATCH] security, crypto: LLVMLinux: Remove VLAIS from ima_crypto.c

2014-09-05 Thread behanw
From: Behan Webster 

Replaced the use of a Variable Length Array In Struct (VLAIS) with a C99
compliant equivalent. This patch allocates the appropriate amount of memory
using an char array.

The new code can be compiled with both gcc and clang.

struct shash_desc contains a flexible array member member ctx declared with
CRYPTO_MINALIGN_ATTR, so sizeof(struct shash_desc) aligns the beginning
of the array declared after struct shash_desc with long long.

No trailing padding is required because it is not a struct type that can
be used in an array.

The CRYPTO_MINALIGN_ATTR is required so that desc is aligned with long long
as would be the case for a struct containing a member with
CRYPTO_MINALIGN_ATTR.

Signed-off-by: Behan Webster 
Signed-off-by: Mark Charlebois 
Signed-off-by: Jan-Simon Möller 
---
 security/integrity/ima/ima_crypto.c | 53 +
 1 file changed, 25 insertions(+), 28 deletions(-)

diff --git a/security/integrity/ima/ima_crypto.c 
b/security/integrity/ima/ima_crypto.c
index 0bd7328..a6aa2b0 100644
--- a/security/integrity/ima/ima_crypto.c
+++ b/security/integrity/ima/ima_crypto.c
@@ -380,17 +380,16 @@ static int ima_calc_file_hash_tfm(struct file *file,
loff_t i_size, offset = 0;
char *rbuf;
int rc, read = 0;
-   struct {
-   struct shash_desc shash;
-   char ctx[crypto_shash_descsize(tfm)];
-   } desc;
+   char desc[sizeof(struct shash_desc) +
+   crypto_shash_descsize(tfm)] CRYPTO_MINALIGN_ATTR;
+   struct shash_desc *shash = (struct shash_desc *)desc;
 
-   desc.shash.tfm = tfm;
-   desc.shash.flags = 0;
+   shash->tfm = tfm;
+   shash->flags = 0;
 
hash->length = crypto_shash_digestsize(tfm);
 
-   rc = crypto_shash_init(&desc.shash);
+   rc = crypto_shash_init(shash);
if (rc != 0)
return rc;
 
@@ -420,7 +419,7 @@ static int ima_calc_file_hash_tfm(struct file *file,
break;
offset += rbuf_len;
 
-   rc = crypto_shash_update(&desc.shash, rbuf, rbuf_len);
+   rc = crypto_shash_update(shash, rbuf, rbuf_len);
if (rc)
break;
}
@@ -429,7 +428,7 @@ static int ima_calc_file_hash_tfm(struct file *file,
kfree(rbuf);
 out:
if (!rc)
-   rc = crypto_shash_final(&desc.shash, hash->digest);
+   rc = crypto_shash_final(shash, hash->digest);
return rc;
 }
 
@@ -487,18 +486,17 @@ static int ima_calc_field_array_hash_tfm(struct 
ima_field_data *field_data,
 struct ima_digest_data *hash,
 struct crypto_shash *tfm)
 {
-   struct {
-   struct shash_desc shash;
-   char ctx[crypto_shash_descsize(tfm)];
-   } desc;
+   char desc[sizeof(struct shash_desc) +
+   crypto_shash_descsize(tfm)] CRYPTO_MINALIGN_ATTR;
+   struct shash_desc *shash = (struct shash_desc *)desc;
int rc, i;
 
-   desc.shash.tfm = tfm;
-   desc.shash.flags = 0;
+   shash->tfm = tfm;
+   shash->flags = 0;
 
hash->length = crypto_shash_digestsize(tfm);
 
-   rc = crypto_shash_init(&desc.shash);
+   rc = crypto_shash_init(shash);
if (rc != 0)
return rc;
 
@@ -508,7 +506,7 @@ static int ima_calc_field_array_hash_tfm(struct 
ima_field_data *field_data,
u32 datalen = field_data[i].len;
 
if (strcmp(td->name, IMA_TEMPLATE_IMA_NAME) != 0) {
-   rc = crypto_shash_update(&desc.shash,
+   rc = crypto_shash_update(shash,
(const u8 *) &field_data[i].len,
sizeof(field_data[i].len));
if (rc)
@@ -518,13 +516,13 @@ static int ima_calc_field_array_hash_tfm(struct 
ima_field_data *field_data,
data_to_hash = buffer;
datalen = IMA_EVENT_NAME_LEN_MAX + 1;
}
-   rc = crypto_shash_update(&desc.shash, data_to_hash, datalen);
+   rc = crypto_shash_update(shash, data_to_hash, datalen);
if (rc)
break;
}
 
if (!rc)
-   rc = crypto_shash_final(&desc.shash, hash->digest);
+   rc = crypto_shash_final(shash, hash->digest);
 
return rc;
 }
@@ -565,15 +563,14 @@ static int __init ima_calc_boot_aggregate_tfm(char 
*digest,
 {
u8 pcr_i[TPM_DIGEST_SIZE];
int rc, i;
-   struct {
-   struct shash_desc shash;
-   char ctx[crypto_shash_descsize(tfm)];
-   } desc;
+   char desc[sizeof(struct shash_desc) +
+   crypto_shash_descsize(tfm)] CRYPTO_MINALIGN_ATTR;
+   struct shash_desc *shash = (struct shash_desc *)desc;
 
-   desc.shash.tfm = tfm;

[PATCH v2] crypto: LLVMLinux: Remove VLAIS usage from crypto/testmgr.c

2014-09-05 Thread behanw
From: Jan-Simon Möller 

The use of variable length arrays in structs (VLAIS) in the Linux Kernel code
precludes the use of compilers which don't implement VLAIS (for instance the
Clang compiler). This patch instead allocates the appropriate amount of memory
using an char array.

struct shash_desc contains a flexible array member member ctx declared with
CRYPTO_MINALIGN_ATTR, so sizeof(struct shash_desc) aligns the beginning
of the array declared after struct shash_desc with long long.

No trailing padding is required because it is not a struct type that can
be used in an array.

The CRYPTO_MINALIGN_ATTR is required so that desc is aligned with long long
as would be the case for a struct containing a member with
CRYPTO_MINALIGN_ATTR.

Signed-off-by: Jan-Simon Möller 
Signed-off-by: Behan Webster 
Cc: pagee...@freemail.hu
---
 crypto/testmgr.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/crypto/testmgr.c b/crypto/testmgr.c
index ac2b631..34f5a32 100644
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -1714,16 +1714,16 @@ static int alg_test_crc32c(const struct alg_test_desc 
*desc,
}
 
do {
-   struct {
-   struct shash_desc shash;
-   char ctx[crypto_shash_descsize(tfm)];
-   } sdesc;
+   char sdesc[sizeof(struct shash_desc) +
+   crypto_shash_descsize(tfm)] CRYPTO_MINALIGN_ATTR;
+   struct shash_desc *shash = (struct shash_desc *)sdesc;
+   u32 *ctx = (u32 *)shash_desc_ctx(shash);
 
-   sdesc.shash.tfm = tfm;
-   sdesc.shash.flags = 0;
+   shash->tfm = tfm;
+   shash->flags = 0;
 
-   *(u32 *)sdesc.ctx = le32_to_cpu(420553207);
-   err = crypto_shash_final(&sdesc.shash, (u8 *)&val);
+   *ctx = le32_to_cpu(420553207);
+   err = crypto_shash_final(shash, (u8 *)&val);
if (err) {
printk(KERN_ERR "alg: crc32c: Operation failed for "
   "%s: %d\n", driver, err);
-- 
1.9.1

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Re: [RFC v2 3/6] kthread: warn on kill signal if not OOM

2014-09-05 Thread Arjan van de Ven

On 9/5/2014 3:52 PM, Dmitry Torokhov wrote:

On Fri, Sep 05, 2014 at 03:45:08PM -0700, Arjan van de Ven wrote:

On 9/5/2014 3:29 PM, Tejun Heo wrote:

Hello, Dmitry.

On Fri, Sep 05, 2014 at 11:10:03AM -0700, Dmitry Torokhov wrote:

I do not agree that it is actually user-visible change: generally speaking you
do not really know if device is there or not. They come and go. Like I said,
consider all permutations, with hot-pluggable buses, deferred probing, etc,


It is for storage devices which always have guaranteed synchronous
probing on module load and well-defined probing order.  Sure, modern
setups are a lot more dynamic but I'm quite certain that there are
setups in the wild which depend on storage driver loading being
synchronous.  We can't simply declare one day that such behavior is
broken and break, most likely, their boots.


we even depend on this in the mount-by-label cases

many setups assume that the internal storage prevails over the USB stick in the 
case of conflicts.
it's a security issue; you don't want the built in secure bootloader that has a 
kernel root argument
by label/uuid.
the security there tends to assume that built-in wins over USB


Ahem... and they sure it works reliably with large storage arrays? With
SCSI doing probing asynchronously already?


you tend to trust your large storage array
you tend to not trust the walk up USB stick.

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[PATCH v2] crypto: LLVMLinux: Remove VLAIS usage from libcrc32c.c

2014-09-05 Thread behanw
From: Jan-Simon Möller 

The use of variable length arrays in structs (VLAIS) in the Linux Kernel code
precludes the use of compilers which don't implement VLAIS (for instance the
Clang compiler). This patch instead allocates the appropriate amount of memory
using an char array.

struct shash_desc contains a flexible array member member ctx declared with
CRYPTO_MINALIGN_ATTR, so sizeof(struct shash_desc) aligns the beginning
of the array declared after struct shash_desc with long long.

No trailing padding is required because it is not a struct type that can
be used in an array.

The CRYPTO_MINALIGN_ATTR is required so that desc is aligned with long long
as would be the case for a struct containing a member with
CRYPTO_MINALIGN_ATTR.

Signed-off-by: Jan-Simon Möller 
Signed-off-by: Behan Webster 
Cc: pagee...@freemail.hu
---
 lib/libcrc32c.c | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/lib/libcrc32c.c b/lib/libcrc32c.c
index b3131f5..72e4ecb 100644
--- a/lib/libcrc32c.c
+++ b/lib/libcrc32c.c
@@ -41,20 +41,20 @@ static struct crypto_shash *tfm;
 
 u32 crc32c(u32 crc, const void *address, unsigned int length)
 {
-   struct {
-   struct shash_desc shash;
-   char ctx[crypto_shash_descsize(tfm)];
-   } desc;
+   char desc[sizeof(struct shash_desc) +
+   crypto_shash_descsize(tfm)] CRYPTO_MINALIGN_ATTR;
+   struct shash_desc *shash = (struct shash_desc *)desc;
+   u32 *ctx = (u32 *)shash_desc_ctx(shash);
int err;
 
-   desc.shash.tfm = tfm;
-   desc.shash.flags = 0;
-   *(u32 *)desc.ctx = crc;
+   shash->tfm = tfm;
+   shash->flags = 0;
+   *ctx = crc;
 
-   err = crypto_shash_update(&desc.shash, address, length);
+   err = crypto_shash_update(shash, address, length);
BUG_ON(err);
 
-   return *(u32 *)desc.ctx;
+   return *ctx;
 }
 
 EXPORT_SYMBOL(crc32c);
-- 
1.9.1

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[PATCH] bluetooth: LLVMLinux: Remove VLAIS from bluetooth/amp.c

2014-09-05 Thread behanw
From: Behan Webster 

Replaced the use of a Variable Length Array In Struct (VLAIS) with a C99
compliant equivalent. This patch allocates the appropriate amount of memory
using an char array.

The new code can be compiled with both gcc and clang.

struct shash_desc contains a flexible array member member ctx declared with
CRYPTO_MINALIGN_ATTR, so sizeof(struct shash_desc) aligns the beginning
of the array declared after struct shash_desc with long long.

No trailing padding is required because it is not a struct type that can
be used in an array.

The CRYPTO_MINALIGN_ATTR is required so that desc is aligned with long long
as would be the case for a struct containing a member with
CRYPTO_MINALIGN_ATTR.

Signed-off-by: Behan Webster 
Signed-off-by: Mark Charlebois 
Signed-off-by: Jan-Simon Möller 
---
 net/bluetooth/amp.c | 13 ++---
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/net/bluetooth/amp.c b/net/bluetooth/amp.c
index 016cdb6..2640d78 100644
--- a/net/bluetooth/amp.c
+++ b/net/bluetooth/amp.c
@@ -149,15 +149,14 @@ static int hmac_sha256(u8 *key, u8 ksize, char 
*plaintext, u8 psize, u8 *output)
if (ret) {
BT_DBG("crypto_ahash_setkey failed: err %d", ret);
} else {
-   struct {
-   struct shash_desc shash;
-   char ctx[crypto_shash_descsize(tfm)];
-   } desc;
+   char desc[sizeof(struct shash_desc) +
+   crypto_shash_descsize(tfm)] CRYPTO_MINALIGN_ATTR;
+   struct shash_desc *shash = (struct shash_desc *)desc;
 
-   desc.shash.tfm = tfm;
-   desc.shash.flags = CRYPTO_TFM_REQ_MAY_SLEEP;
+   shash->tfm = tfm;
+   shash->flags = CRYPTO_TFM_REQ_MAY_SLEEP;
 
-   ret = crypto_shash_digest(&desc.shash, plaintext, psize,
+   ret = crypto_shash_digest(shash, plaintext, psize,
  output);
}
 
-- 
1.9.1

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[PATCH v2] crypto: LLVMLinux: Remove VLAIS usage from crypto/hmac.c

2014-09-05 Thread behanw
From: Jan-Simon Möller 

The use of variable length arrays in structs (VLAIS) in the Linux Kernel code
precludes the use of compilers which don't implement VLAIS (for instance the
Clang compiler). This patch instead allocates the appropriate amount of memory
using an char array.

struct shash_desc contains a flexible array member member ctx declared with
CRYPTO_MINALIGN_ATTR, so sizeof(struct shash_desc) aligns the beginning
of the array declared after struct shash_desc with long long.

No trailing padding is required because it is not a struct type that can
be used in an array.

The CRYPTO_MINALIGN_ATTR is required so that desc is aligned with long long
as would be the case for a struct containing a member with
CRYPTO_MINALIGN_ATTR.

Signed-off-by: Jan-Simon Möller 
Signed-off-by: Behan Webster 
Cc: pagee...@freemail.hu
---
 crypto/hmac.c | 27 +--
 1 file changed, 13 insertions(+), 14 deletions(-)

diff --git a/crypto/hmac.c b/crypto/hmac.c
index 8d9544c..f2da806 100644
--- a/crypto/hmac.c
+++ b/crypto/hmac.c
@@ -52,20 +52,19 @@ static int hmac_setkey(struct crypto_shash *parent,
struct hmac_ctx *ctx = align_ptr(opad + ss,
 crypto_tfm_ctx_alignment());
struct crypto_shash *hash = ctx->hash;
-   struct {
-   struct shash_desc shash;
-   char ctx[crypto_shash_descsize(hash)];
-   } desc;
+   char desc[sizeof(struct shash_desc) +
+   crypto_shash_descsize(hash)] CRYPTO_MINALIGN_ATTR;
+   struct shash_desc *shash = (struct shash_desc *)desc;
unsigned int i;
 
-   desc.shash.tfm = hash;
-   desc.shash.flags = crypto_shash_get_flags(parent) &
-   CRYPTO_TFM_REQ_MAY_SLEEP;
+   shash->tfm = hash;
+   shash->flags = crypto_shash_get_flags(parent)
+   & CRYPTO_TFM_REQ_MAY_SLEEP;
 
if (keylen > bs) {
int err;
 
-   err = crypto_shash_digest(&desc.shash, inkey, keylen, ipad);
+   err = crypto_shash_digest(shash, inkey, keylen, ipad);
if (err)
return err;
 
@@ -81,12 +80,12 @@ static int hmac_setkey(struct crypto_shash *parent,
opad[i] ^= 0x5c;
}
 
-   return crypto_shash_init(&desc.shash) ?:
-  crypto_shash_update(&desc.shash, ipad, bs) ?:
-  crypto_shash_export(&desc.shash, ipad) ?:
-  crypto_shash_init(&desc.shash) ?:
-  crypto_shash_update(&desc.shash, opad, bs) ?:
-  crypto_shash_export(&desc.shash, opad);
+   return crypto_shash_init(shash) ?:
+  crypto_shash_update(shash, ipad, bs) ?:
+  crypto_shash_export(shash, ipad) ?:
+  crypto_shash_init(shash) ?:
+  crypto_shash_update(shash, opad, bs) ?:
+  crypto_shash_export(shash, opad);
 }
 
 static int hmac_export(struct shash_desc *pdesc, void *out)
-- 
1.9.1

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[PATCH v2] crypto, dm: LLVMLinux: Remove VLAIS usage from dm-crypt

2014-09-05 Thread behanw
From: Jan-Simon Möller 

The use of variable length arrays in structs (VLAIS) in the Linux Kernel code
precludes the use of compilers which don't implement VLAIS (for instance the
Clang compiler). This patch instead allocates the appropriate amount of memory
using an char array.

struct shash_desc contains a flexible array member member ctx declared with
CRYPTO_MINALIGN_ATTR, so sizeof(struct shash_desc) aligns the beginning
of the array declared after struct shash_desc with long long.

No trailing padding is required because it is not a struct type that can
be used in an array.

The CRYPTO_MINALIGN_ATTR is required so that desc is aligned with long long
as would be the case for a struct containing a member with
CRYPTO_MINALIGN_ATTR.

Signed-off-by: Jan-Simon Möller 
Signed-off-by: Behan Webster 
Cc: pagee...@freemail.hu
---
 drivers/md/dm-crypt.c | 38 ++
 1 file changed, 18 insertions(+), 20 deletions(-)

diff --git a/drivers/md/dm-crypt.c b/drivers/md/dm-crypt.c
index cd15e08..ad696b8 100644
--- a/drivers/md/dm-crypt.c
+++ b/drivers/md/dm-crypt.c
@@ -526,29 +526,28 @@ static int crypt_iv_lmk_one(struct crypt_config *cc, u8 
*iv,
u8 *data)
 {
struct iv_lmk_private *lmk = &cc->iv_gen_private.lmk;
-   struct {
-   struct shash_desc desc;
-   char ctx[crypto_shash_descsize(lmk->hash_tfm)];
-   } sdesc;
+   char sdesc[sizeof(struct shash_desc) +
+   crypto_shash_descsize(lmk->hash_tfm)] CRYPTO_MINALIGN_ATTR;
+   struct shash_desc *desc = (struct shash_desc *)sdesc;
struct md5_state md5state;
__le32 buf[4];
int i, r;
 
-   sdesc.desc.tfm = lmk->hash_tfm;
-   sdesc.desc.flags = CRYPTO_TFM_REQ_MAY_SLEEP;
+   desc->tfm = lmk->hash_tfm;
+   desc->flags = CRYPTO_TFM_REQ_MAY_SLEEP;
 
-   r = crypto_shash_init(&sdesc.desc);
+   r = crypto_shash_init(desc);
if (r)
return r;
 
if (lmk->seed) {
-   r = crypto_shash_update(&sdesc.desc, lmk->seed, LMK_SEED_SIZE);
+   r = crypto_shash_update(desc, lmk->seed, LMK_SEED_SIZE);
if (r)
return r;
}
 
/* Sector is always 512B, block size 16, add data of blocks 1-31 */
-   r = crypto_shash_update(&sdesc.desc, data + 16, 16 * 31);
+   r = crypto_shash_update(desc, data + 16, 16 * 31);
if (r)
return r;
 
@@ -557,12 +556,12 @@ static int crypt_iv_lmk_one(struct crypt_config *cc, u8 
*iv,
buf[1] = cpu_to_le32u64)dmreq->iv_sector >> 32) & 0x00FF) | 
0x8000);
buf[2] = cpu_to_le32(4024);
buf[3] = 0;
-   r = crypto_shash_update(&sdesc.desc, (u8 *)buf, sizeof(buf));
+   r = crypto_shash_update(desc, (u8 *)buf, sizeof(buf));
if (r)
return r;
 
/* No MD5 padding here */
-   r = crypto_shash_export(&sdesc.desc, &md5state);
+   r = crypto_shash_export(desc, &md5state);
if (r)
return r;
 
@@ -679,10 +678,9 @@ static int crypt_iv_tcw_whitening(struct crypt_config *cc,
struct iv_tcw_private *tcw = &cc->iv_gen_private.tcw;
u64 sector = cpu_to_le64((u64)dmreq->iv_sector);
u8 buf[TCW_WHITENING_SIZE];
-   struct {
-   struct shash_desc desc;
-   char ctx[crypto_shash_descsize(tcw->crc32_tfm)];
-   } sdesc;
+   char sdesc[sizeof(struct shash_desc)
+   + crypto_shash_descsize(tcw->crc32_tfm)] CRYPTO_MINALIGN_ATTR;
+   struct shash_desc *desc = (struct shash_desc *)sdesc;
int i, r;
 
/* xor whitening with sector number */
@@ -691,16 +689,16 @@ static int crypt_iv_tcw_whitening(struct crypt_config *cc,
crypto_xor(&buf[8], (u8 *)§or, 8);
 
/* calculate crc32 for every 32bit part and xor it */
-   sdesc.desc.tfm = tcw->crc32_tfm;
-   sdesc.desc.flags = CRYPTO_TFM_REQ_MAY_SLEEP;
+   desc->tfm = tcw->crc32_tfm;
+   desc->flags = CRYPTO_TFM_REQ_MAY_SLEEP;
for (i = 0; i < 4; i++) {
-   r = crypto_shash_init(&sdesc.desc);
+   r = crypto_shash_init(desc);
if (r)
goto out;
-   r = crypto_shash_update(&sdesc.desc, &buf[i * 4], 4);
+   r = crypto_shash_update(desc, &buf[i * 4], 4);
if (r)
goto out;
-   r = crypto_shash_final(&sdesc.desc, &buf[i * 4]);
+   r = crypto_shash_final(desc, &buf[i * 4]);
if (r)
goto out;
}
-- 
1.9.1

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[PATCH] crypto: LLVMLinux: Remove VLAIS from crypto/.../qat_algs.c

2014-09-05 Thread behanw
From: Behan Webster 

Replaced the use of a Variable Length Array In Struct (VLAIS) with a C99
compliant equivalent. This patch allocates the appropriate amount of memory
using an char array.

The new code can be compiled with both gcc and clang.

struct shash_desc contains a flexible array member member ctx declared with
CRYPTO_MINALIGN_ATTR, so sizeof(struct shash_desc) aligns the beginning
of the array declared after struct shash_desc with long long.

No trailing padding is required because it is not a struct type that can
be used in an array.

The CRYPTO_MINALIGN_ATTR is required so that desc is aligned with long long
as would be the case for a struct containing a member with
CRYPTO_MINALIGN_ATTR.

Signed-off-by: Behan Webster 
Signed-off-by: Mark Charlebois 
Signed-off-by: Jan-Simon Möller 
---
 drivers/crypto/qat/qat_common/qat_algs.c | 33 
 1 file changed, 16 insertions(+), 17 deletions(-)

diff --git a/drivers/crypto/qat/qat_common/qat_algs.c 
b/drivers/crypto/qat/qat_common/qat_algs.c
index 59df488..3090333 100644
--- a/drivers/crypto/qat/qat_common/qat_algs.c
+++ b/drivers/crypto/qat/qat_common/qat_algs.c
@@ -152,10 +152,9 @@ static int qat_alg_do_precomputes(struct 
icp_qat_hw_auth_algo_blk *hash,
  const uint8_t *auth_key,
  unsigned int auth_keylen, uint8_t *auth_state)
 {
-   struct {
-   struct shash_desc shash;
-   char ctx[crypto_shash_descsize(ctx->hash_tfm)];
-   } desc;
+   char desc[sizeof(struct shash_desc) +
+   crypto_shash_descsize(ctx->hash_tfm)] CRYPTO_MINALIGN_ATTR;
+   struct shash_desc *shash = (struct shash_desc *)desc;
struct sha1_state sha1;
struct sha256_state sha256;
struct sha512_state sha512;
@@ -167,12 +166,12 @@ static int qat_alg_do_precomputes(struct 
icp_qat_hw_auth_algo_blk *hash,
__be64 *hash512_state_out;
int i, offset;
 
-   desc.shash.tfm = ctx->hash_tfm;
-   desc.shash.flags = 0x0;
+   shash->tfm = ctx->hash_tfm;
+   shash->flags = 0x0;
 
if (auth_keylen > block_size) {
char buff[SHA512_BLOCK_SIZE];
-   int ret = crypto_shash_digest(&desc.shash, auth_key,
+   int ret = crypto_shash_digest(shash, auth_key,
  auth_keylen, buff);
if (ret)
return ret;
@@ -195,10 +194,10 @@ static int qat_alg_do_precomputes(struct 
icp_qat_hw_auth_algo_blk *hash,
*opad_ptr ^= 0x5C;
}
 
-   if (crypto_shash_init(&desc.shash))
+   if (crypto_shash_init(shash))
return -EFAULT;
 
-   if (crypto_shash_update(&desc.shash, ipad, block_size))
+   if (crypto_shash_update(shash, ipad, block_size))
return -EFAULT;
 
hash_state_out = (__be32 *)hash->sha.state1;
@@ -206,19 +205,19 @@ static int qat_alg_do_precomputes(struct 
icp_qat_hw_auth_algo_blk *hash,
 
switch (ctx->qat_hash_alg) {
case ICP_QAT_HW_AUTH_ALGO_SHA1:
-   if (crypto_shash_export(&desc.shash, &sha1))
+   if (crypto_shash_export(shash, &sha1))
return -EFAULT;
for (i = 0; i < digest_size >> 2; i++, hash_state_out++)
*hash_state_out = cpu_to_be32(*(sha1.state + i));
break;
case ICP_QAT_HW_AUTH_ALGO_SHA256:
-   if (crypto_shash_export(&desc.shash, &sha256))
+   if (crypto_shash_export(shash, &sha256))
return -EFAULT;
for (i = 0; i < digest_size >> 2; i++, hash_state_out++)
*hash_state_out = cpu_to_be32(*(sha256.state + i));
break;
case ICP_QAT_HW_AUTH_ALGO_SHA512:
-   if (crypto_shash_export(&desc.shash, &sha512))
+   if (crypto_shash_export(shash, &sha512))
return -EFAULT;
for (i = 0; i < digest_size >> 3; i++, hash512_state_out++)
*hash512_state_out = cpu_to_be64(*(sha512.state + i));
@@ -227,10 +226,10 @@ static int qat_alg_do_precomputes(struct 
icp_qat_hw_auth_algo_blk *hash,
return -EFAULT;
}
 
-   if (crypto_shash_init(&desc.shash))
+   if (crypto_shash_init(shash))
return -EFAULT;
 
-   if (crypto_shash_update(&desc.shash, opad, block_size))
+   if (crypto_shash_update(shash, opad, block_size))
return -EFAULT;
 
offset = round_up(qat_get_inter_state_size(ctx->qat_hash_alg), 8);
@@ -239,19 +238,19 @@ static int qat_alg_do_precomputes(struct 
icp_qat_hw_auth_algo_blk *hash,
 
switch (ctx->qat_hash_alg) {
case ICP_QAT_HW_AUTH_ALGO_SHA1:
-   if (crypto_shash_export(&desc.shash, &sha1))
+   if (crypto_shash_export(shash, &sha1))
return -EFAULT;
 

[PATCH] crypto: LLVMLinux: Remove VLAIS from crypto/omap_sham.c

2014-09-05 Thread behanw
From: Behan Webster 

Replaced the use of a Variable Length Array In Struct (VLAIS) with a C99
compliant equivalent. This patch allocates the appropriate amount of memory
using an char array.

The new code can be compiled with both gcc and clang.

struct shash_desc contains a flexible array member member ctx declared with
CRYPTO_MINALIGN_ATTR, so sizeof(struct shash_desc) aligns the beginning
of the array declared after struct shash_desc with long long.

No trailing padding is required because it is not a struct type that can
be used in an array.

The CRYPTO_MINALIGN_ATTR is required so that desc is aligned with long long
as would be the case for a struct containing a member with
CRYPTO_MINALIGN_ATTR.

Signed-off-by: Behan Webster 
Signed-off-by: Mark Charlebois 
Signed-off-by: Jan-Simon Möller 
---
 drivers/crypto/omap-sham.c | 32 +++-
 1 file changed, 15 insertions(+), 17 deletions(-)

diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
index 710d863..dcbfd35 100644
--- a/drivers/crypto/omap-sham.c
+++ b/drivers/crypto/omap-sham.c
@@ -949,17 +949,16 @@ static int omap_sham_finish_hmac(struct ahash_request 
*req)
struct omap_sham_hmac_ctx *bctx = tctx->base;
int bs = crypto_shash_blocksize(bctx->shash);
int ds = crypto_shash_digestsize(bctx->shash);
-   struct {
-   struct shash_desc shash;
-   char ctx[crypto_shash_descsize(bctx->shash)];
-   } desc;
+   char desc[sizeof(struct shash_desc) +
+   crypto_shash_descsize(bctx->shash)] CRYPTO_MINALIGN_ATTR;
+   struct shash_desc *shash = (struct shash_desc *)desc;
 
-   desc.shash.tfm = bctx->shash;
-   desc.shash.flags = 0; /* not CRYPTO_TFM_REQ_MAY_SLEEP */
+   shash->tfm = bctx->shash;
+   shash->flags = 0; /* not CRYPTO_TFM_REQ_MAY_SLEEP */
 
-   return crypto_shash_init(&desc.shash) ?:
-  crypto_shash_update(&desc.shash, bctx->opad, bs) ?:
-  crypto_shash_finup(&desc.shash, req->result, ds, req->result);
+   return crypto_shash_init(shash) ?:
+  crypto_shash_update(shash, bctx->opad, bs) ?:
+  crypto_shash_finup(shash, req->result, ds, req->result);
 }
 
 static int omap_sham_finish(struct ahash_request *req)
@@ -1118,18 +1117,17 @@ static int omap_sham_update(struct ahash_request *req)
return omap_sham_enqueue(req, OP_UPDATE);
 }
 
-static int omap_sham_shash_digest(struct crypto_shash *shash, u32 flags,
+static int omap_sham_shash_digest(struct crypto_shash *tfm, u32 flags,
  const u8 *data, unsigned int len, u8 *out)
 {
-   struct {
-   struct shash_desc shash;
-   char ctx[crypto_shash_descsize(shash)];
-   } desc;
+   char desc[sizeof(struct shash_desc) +
+   crypto_shash_descsize(shash)] CRYPTO_MINALIGN_ATTR;
+   struct shash_desc *shash = (struct shash_desc *)desc;
 
-   desc.shash.tfm = shash;
-   desc.shash.flags = flags & CRYPTO_TFM_REQ_MAY_SLEEP;
+   shash->tfm = tfm;
+   shash->flags = flags & CRYPTO_TFM_REQ_MAY_SLEEP;
 
-   return crypto_shash_digest(&desc.shash, data, len, out);
+   return crypto_shash_digest(shash, data, len, out);
 }
 
 static int omap_sham_final_shash(struct ahash_request *req)
-- 
1.9.1

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[PATCH] crypto: LLVMLinux: Remove VLAIS from crypto/n2_core.c

2014-09-05 Thread behanw
From: Behan Webster 

Replaced the use of a Variable Length Array In Struct (VLAIS) with a C99
compliant equivalent. This patch allocates the appropriate amount of memory
using an char array.

The new code can be compiled with both gcc and clang.

struct shash_desc contains a flexible array member member ctx declared with
CRYPTO_MINALIGN_ATTR, so sizeof(struct shash_desc) aligns the beginning
of the array declared after struct shash_desc with long long.

No trailing padding is required because it is not a struct type that can
be used in an array.

The CRYPTO_MINALIGN_ATTR is required so that desc is aligned with long long
as would be the case for a struct containing a member with
CRYPTO_MINALIGN_ATTR.

Signed-off-by: Behan Webster 
Signed-off-by: Mark Charlebois 
Signed-off-by: Jan-Simon Möller 
---
 drivers/crypto/n2_core.c | 13 ++---
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/drivers/crypto/n2_core.c b/drivers/crypto/n2_core.c
index 7263c10..ed142d1 100644
--- a/drivers/crypto/n2_core.c
+++ b/drivers/crypto/n2_core.c
@@ -445,10 +445,9 @@ static int n2_hmac_async_setkey(struct crypto_ahash *tfm, 
const u8 *key,
struct n2_hmac_ctx *ctx = crypto_ahash_ctx(tfm);
struct crypto_shash *child_shash = ctx->child_shash;
struct crypto_ahash *fallback_tfm;
-   struct {
-   struct shash_desc shash;
-   char ctx[crypto_shash_descsize(child_shash)];
-   } desc;
+   char desc[sizeof(struct shash_desc) +
+   crypto_shash_descsize(child_shash)] CRYPTO_MINALIGN_ATTR;
+   struct shash_desc *shash = (struct shash_desc *)desc;
int err, bs, ds;
 
fallback_tfm = ctx->base.fallback_tfm;
@@ -456,15 +455,15 @@ static int n2_hmac_async_setkey(struct crypto_ahash *tfm, 
const u8 *key,
if (err)
return err;
 
-   desc.shash.tfm = child_shash;
-   desc.shash.flags = crypto_ahash_get_flags(tfm) &
+   shash->tfm = child_shash;
+   shash->flags = crypto_ahash_get_flags(tfm) &
CRYPTO_TFM_REQ_MAY_SLEEP;
 
bs = crypto_shash_blocksize(child_shash);
ds = crypto_shash_digestsize(child_shash);
BUG_ON(ds > N2_HASH_KEY_MAX);
if (keylen > bs) {
-   err = crypto_shash_digest(&desc.shash, key, keylen,
+   err = crypto_shash_digest(shash, key, keylen,
  ctx->hash_key);
if (err)
return err;
-- 
1.9.1

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[PATCH] crypto: LLVMLinux: Remove VLAIS from crypto/mv_cesa.c

2014-09-05 Thread behanw
From: Behan Webster 

Replaced the use of a Variable Length Array In Struct (VLAIS) with a C99
compliant equivalent. This patch allocates the appropriate amount of memory
using an char array.

The new code can be compiled with both gcc and clang.

struct shash_desc contains a flexible array member member ctx declared with
CRYPTO_MINALIGN_ATTR, so sizeof(struct shash_desc) aligns the beginning
of the array declared after struct shash_desc with long long.

No trailing padding is required because it is not a struct type that can
be used in an array.

The CRYPTO_MINALIGN_ATTR is required so that desc is aligned with long long
as would be the case for a struct containing a member with
CRYPTO_MINALIGN_ATTR.

Signed-off-by: Behan Webster 
Signed-off-by: Mark Charlebois 
Signed-off-by: Jan-Simon Möller 
---
 drivers/crypto/mv_cesa.c | 46 +++---
 1 file changed, 23 insertions(+), 23 deletions(-)

diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c
index 29d0ee5..0d92c85 100644
--- a/drivers/crypto/mv_cesa.c
+++ b/drivers/crypto/mv_cesa.c
@@ -402,26 +402,25 @@ static int mv_hash_final_fallback(struct ahash_request 
*req)
 {
const struct mv_tfm_hash_ctx *tfm_ctx = crypto_tfm_ctx(req->base.tfm);
struct mv_req_hash_ctx *req_ctx = ahash_request_ctx(req);
-   struct {
-   struct shash_desc shash;
-   char ctx[crypto_shash_descsize(tfm_ctx->fallback)];
-   } desc;
+   char desc[sizeof(struct shash_desc) +
+   crypto_shash_descsize(tfm_ctx->fallback)] CRYPTO_MINALIGN_ATTR;
+   struct shash_desc *shash = (struct shash_desc *)desc;
int rc;
 
-   desc.shash.tfm = tfm_ctx->fallback;
-   desc.shash.flags = CRYPTO_TFM_REQ_MAY_SLEEP;
+   shash->tfm = tfm_ctx->fallback;
+   shash->flags = CRYPTO_TFM_REQ_MAY_SLEEP;
if (unlikely(req_ctx->first_hash)) {
-   crypto_shash_init(&desc.shash);
-   crypto_shash_update(&desc.shash, req_ctx->buffer,
+   crypto_shash_init(shash);
+   crypto_shash_update(shash, req_ctx->buffer,
req_ctx->extra_bytes);
} else {
/* only SHA1 for now
 */
-   rc = mv_hash_import_sha1_ctx(req_ctx, &desc.shash);
+   rc = mv_hash_import_sha1_ctx(req_ctx, shash);
if (rc)
goto out;
}
-   rc = crypto_shash_final(&desc.shash, req->result);
+   rc = crypto_shash_final(shash, req->result);
 out:
return rc;
 }
@@ -794,23 +793,24 @@ static int mv_hash_setkey(struct crypto_ahash *tfm, const 
u8 * key,
ss = crypto_shash_statesize(ctx->base_hash);
 
{
-   struct {
-   struct shash_desc shash;
-   char ctx[crypto_shash_descsize(ctx->base_hash)];
-   } desc;
+   char desc[sizeof(struct shash_desc) +
+   crypto_shash_descsize(ctx->base_hash)]
+   CRYPTO_MINALIGN_ATTR;
+   struct shash_desc *shash = (struct shash_desc *)desc;
+
unsigned int i;
char ipad[ss];
char opad[ss];
 
-   desc.shash.tfm = ctx->base_hash;
-   desc.shash.flags = crypto_shash_get_flags(ctx->base_hash) &
+   shash->tfm = ctx->base_hash;
+   shash->flags = crypto_shash_get_flags(ctx->base_hash) &
CRYPTO_TFM_REQ_MAY_SLEEP;
 
if (keylen > bs) {
int err;
 
err =
-   crypto_shash_digest(&desc.shash, key, keylen, ipad);
+   crypto_shash_digest(shash, key, keylen, ipad);
if (err)
return err;
 
@@ -826,12 +826,12 @@ static int mv_hash_setkey(struct crypto_ahash *tfm, const 
u8 * key,
opad[i] ^= 0x5c;
}
 
-   rc = crypto_shash_init(&desc.shash) ? :
-   crypto_shash_update(&desc.shash, ipad, bs) ? :
-   crypto_shash_export(&desc.shash, ipad) ? :
-   crypto_shash_init(&desc.shash) ? :
-   crypto_shash_update(&desc.shash, opad, bs) ? :
-   crypto_shash_export(&desc.shash, opad);
+   rc = crypto_shash_init(shash) ? :
+   crypto_shash_update(shash, ipad, bs) ? :
+   crypto_shash_export(shash, ipad) ? :
+   crypto_shash_init(shash) ? :
+   crypto_shash_update(shash, opad, bs) ? :
+   crypto_shash_export(shash, opad);
 
if (rc == 0)
mv_hash_init_ivs(ctx, ipad, opad);
-- 
1.9.1

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[PATCH] crypto: LLVMLinux: Remove VLAIS from crypto/ccp/ccp-crypto-sha.c

2014-09-05 Thread behanw
From: Jan-Simon Möller 

Replaced the use of a Variable Length Array In Struct (VLAIS) with a C99
compliant equivalent. This patch allocates the appropriate amount of memory
using an char array.

The new code can be compiled with both gcc and clang.

struct shash_desc contains a flexible array member member ctx declared with
CRYPTO_MINALIGN_ATTR, so sizeof(struct shash_desc) aligns the beginning
of the array declared after struct shash_desc with long long.

No trailing padding is required because it is not a struct type that can
be used in an array.

The CRYPTO_MINALIGN_ATTR is required so that desc is aligned with long long
as would be the case for a struct containing a member with
CRYPTO_MINALIGN_ATTR.

Signed-off-by: Jan-Simon Möller 
Signed-off-by: Behan Webster 
---
 drivers/crypto/ccp/ccp-crypto-sha.c | 15 ---
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/crypto/ccp/ccp-crypto-sha.c 
b/drivers/crypto/ccp/ccp-crypto-sha.c
index 873f234..29f9fda 100644
--- a/drivers/crypto/ccp/ccp-crypto-sha.c
+++ b/drivers/crypto/ccp/ccp-crypto-sha.c
@@ -198,10 +198,11 @@ static int ccp_sha_setkey(struct crypto_ahash *tfm, const 
u8 *key,
 {
struct ccp_ctx *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm));
struct crypto_shash *shash = ctx->u.sha.hmac_tfm;
-   struct {
-   struct shash_desc sdesc;
-   char ctx[crypto_shash_descsize(shash)];
-   } desc;
+
+   char desc[sizeof(struct shash_desc) +
+   crypto_shash_descsize(shash)] CRYPTO_MINALIGN_ATTR;
+   struct shash_desc *sdesc = (struct shash_desc *)desc;
+
unsigned int block_size = crypto_shash_blocksize(shash);
unsigned int digest_size = crypto_shash_digestsize(shash);
int i, ret;
@@ -216,11 +217,11 @@ static int ccp_sha_setkey(struct crypto_ahash *tfm, const 
u8 *key,
 
if (key_len > block_size) {
/* Must hash the input key */
-   desc.sdesc.tfm = shash;
-   desc.sdesc.flags = crypto_ahash_get_flags(tfm) &
+   sdesc->tfm = shash;
+   sdesc->flags = crypto_ahash_get_flags(tfm) &
CRYPTO_TFM_REQ_MAY_SLEEP;
 
-   ret = crypto_shash_digest(&desc.sdesc, key, key_len,
+   ret = crypto_shash_digest(sdesc, key, key_len,
  ctx->u.sha.key);
if (ret) {
crypto_ahash_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
-- 
1.9.1

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[PATCH v2] btrfs: LLVMLinux: Remove VLAIS

2014-09-05 Thread behanw
From: Vinícius Tinti 

Replaced the use of a Variable Length Array In Struct (VLAIS) with a C99
compliant equivalent. This is the original VLAIS struct.

struct {
struct shash_desc shash;
char ctx[crypto_shash_descsize(tfm)];
} desc;

This patch instead allocates the appropriate amount of memory using an char
array.

The new code can be compiled with both gcc and clang.

struct shash_desc contains a flexible array member member ctx declared with
CRYPTO_MINALIGN_ATTR, so sizeof(struct shash_desc) aligns the beginning
of the array declared after struct shash_desc with long long.

No trailing padding is required because it is not a struct type that can
be used in an array.

The CRYPTO_MINALIGN_ATTR is required so that desc is aligned with long long
as would be the case for a struct containing a member with
CRYPTO_MINALIGN_ATTR.

Signed-off-by: Jan-Simon Möller 
Signed-off-by: Behan Webster 
Signed-off-by: Vinícius Tinti 
Signed-off-by: Mark Charlebois 
---
 fs/btrfs/hash.c | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/fs/btrfs/hash.c b/fs/btrfs/hash.c
index 85889aa..a62743f 100644
--- a/fs/btrfs/hash.c
+++ b/fs/btrfs/hash.c
@@ -33,18 +33,18 @@ void btrfs_hash_exit(void)
 
 u32 btrfs_crc32c(u32 crc, const void *address, unsigned int length)
 {
-   struct {
-   struct shash_desc shash;
-   char ctx[crypto_shash_descsize(tfm)];
-   } desc;
+   char desc[sizeof(struct shash_desc) +
+   crypto_shash_descsize(tfm)] CRYPTO_MINALIGN_ATTR;
+   struct shash_desc *shash = (struct shash_desc *)desc;
+   u32 *ctx = (u32 *)shash_desc_ctx(shash);
int err;
 
-   desc.shash.tfm = tfm;
-   desc.shash.flags = 0;
-   *(u32 *)desc.ctx = crc;
+   shash->tfm = tfm;
+   shash->flags = 0;
+   *ctx = crc;
 
-   err = crypto_shash_update(&desc.shash, address, length);
+   err = crypto_shash_update(shash, address, length);
BUG_ON(err);
 
-   return *(u32 *)desc.ctx;
+   return *ctx;
 }
-- 
1.9.1

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Re: [RFC v2 3/6] kthread: warn on kill signal if not OOM

2014-09-05 Thread Tejun Heo
Hello,

On Fri, Sep 05, 2014 at 03:52:48PM -0700, Dmitry Torokhov wrote:
> Ahem... and they sure it works reliably with large storage arrays? With
> SCSI doing probing asynchronously already?

I believe this has been mentioned before too but, yes, SCSI device
probing is asynchronous and parallelized but the registration of the
discovered devices are fully serialized according to driver attach
order.  Storage devices are probed in parallel and attached in a fully
deterministic order.  That part has never changed.

Thanks.

-- 
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Re: [RFC v2 3/6] kthread: warn on kill signal if not OOM

2014-09-05 Thread Tejun Heo
Hello, Dmitry.

On Fri, Sep 05, 2014 at 03:49:17PM -0700, Dmitry Torokhov wrote:
> On Sat, Sep 06, 2014 at 07:31:39AM +0900, Tejun Heo wrote:
> > On Sat, Sep 06, 2014 at 07:29:56AM +0900, Tejun Heo wrote:
> > > It is for storage devices which always have guaranteed synchronous
> > > probing on module load and well-defined probing order.
> 
> Agree about probing order (IIRC that is why we had to revert the
> wholesale asynchronous probing a few years back) but totally disagree
> about synchronous module loading.

I don't get it.  This is a behavior userland already depends on for
boots.  What's there to agree or disagree?  This is just a fact that
we can't do this w/o disturbing some userlands in a major way.

> Anyway, I just posted a patch that I think preserves module loading
> behavior and solves my issue with built-in modules. It does not help
> Luis' issue though (but then I think the main problem is with systemd
> being stupid there).

This sure can be worked around from userland side too by not imposing
any timeout on module loading but that said for the same reasons that
you've been arguing until now, I actually do think that it's kinda
silly to make device probing synchronous to module loading at this
time and age.  What we disagree on is not that we want to separate
those waits.  It is about how to achieve it.

> > To add a bit, if the argument here is that dependency on such behavior
> > shouldn't exist and module loading and device probing should always be
> > asynchronous, the right approach is implementing "synchronous_probing"
> > flag not the other way around.  I actually wouldn't hate to see that
> > change happening but whoever submits and routes such a change should
> > be ready for a major shitstorm, I'm afraid.
> 
> I think we already had this storm and that is why here we have opt-in
> behavior for the drivers.

It's a different shitstorm where we actively break bootings on some
userlands.  Trust me.  That's gonna be a lot worse.

Thanks.

-- 
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[PATCH] slab: implement kmalloc guard

2014-09-05 Thread Mikulas Patocka
This patch adds a new option DEBUG_KMALLOC that makes it possible to 
detect writes beyond the end of space allocated with kmalloc. Normally, 
the kmalloc function rounds the size to the next power of two (there is 
exception to this rule - sizes 96 and 192). Slab debugging detects only 
writes beyond the end of the slab object, it is unable to detect writes 
beyond the end of kmallocated size that fit into the slab object.

The motivation for this patch was this: There was 6 year old bug in 
dm-crypt (d49ec52ff6ddcda178fc2476a109cf1bd1fa19ed) where the driver would 
write beyond the end of kmallocated space, but the bug went undetected 
because the write would fit into the power-of-two-sized slab object. Only 
recent changes to dm-crypt made the bug show up. There is similar problem 
in the nx-crypto driver in the function nx_crypto_ctx_init - again, 
because kmalloc rounds the size up to the next power of two, this bug went 
undetected.

This patch works for slab, slub and slob subsystems. The end of slab block 
can be found out with ksize (this patch renames it to __ksize). At the end 
of the block, we put a structure kmalloc_guard. This structure contains a 
magic number and a real size of the block - the exact size given to 
kmalloc. Just beyond the allocated block, we put an unaliged 64-bit magic 
number. If some code writes beyond the end of the allocated area, this 
magic number will be changed. This is detected at kfree time. We don't use 
kmalloc guard for slabs with the maximum size - this is for simplicity, so 
that we can leave the macro KMALLOC_MAX_SIZE unchanged.

I suggest backporting to the stable kernels - this patch doesn't fix any
bug, but it makes detection of other bugs possible, so it is benefical to
backport it.

Signed-off-by: Mikulas Patocka 
Cc: sta...@vger.kernel.org

---
 include/linux/slab.h |   43 +++--
 mm/Kconfig.debug |7 +++
 mm/slab.c|   27 +
 mm/slab_common.c |  102 +++
 mm/slob.c|   23 +++
 mm/slub.c|   39 ++-
 6 files changed, 208 insertions(+), 33 deletions(-)

Index: linux-2.6/include/linux/slab.h
===
--- linux-2.6.orig/include/linux/slab.h 2014-09-04 23:04:28.0 +0200
+++ linux-2.6/include/linux/slab.h  2014-09-04 23:05:03.0 +0200
@@ -143,7 +143,6 @@ void * __must_check __krealloc(const voi
 void * __must_check krealloc(const void *, size_t, gfp_t);
 void kfree(const void *);
 void kzfree(const void *);
-size_t ksize(const void *);
 
 /*
  * Some archs want to perform DMA into kmalloc caches and need a guaranteed
@@ -312,6 +311,37 @@ static __always_inline int kmalloc_index
 }
 #endif /* !CONFIG_SLOB */
 
+size_t __ksize(const void *ptr);
+
+#ifndef CONFIG_DEBUG_KMALLOC
+
+static inline size_t kmalloc_guard_size(size_t size)
+{
+   return size;
+}
+
+static inline void kmalloc_guard_setup(void *ptr, size_t size)
+{
+}
+
+static inline void kmalloc_guard_verify(const void *ptr)
+{
+}
+
+static inline size_t ksize(const void *ptr)
+{
+   return __ksize(ptr);
+}
+
+#else
+
+size_t kmalloc_guard_size(size_t size);
+void kmalloc_guard_setup(void *ptr, size_t size);
+void kmalloc_guard_verify(const void *ptr);
+size_t ksize(const void *ptr);
+
+#endif
+
 void *__kmalloc(size_t size, gfp_t flags);
 void *kmem_cache_alloc(struct kmem_cache *, gfp_t flags);
 
@@ -385,8 +415,11 @@ kmalloc_order_trace(size_t size, gfp_t f
 
 static __always_inline void *kmalloc_large(size_t size, gfp_t flags)
 {
-   unsigned int order = get_order(size);
-   return kmalloc_order_trace(size, flags, order);
+   void *ret;
+   unsigned int order = get_order(kmalloc_guard_size(size));
+   ret = kmalloc_order_trace(size, flags, order);
+   kmalloc_guard_setup(ret, size);
+   return ret;
 }
 
 /**
@@ -444,6 +477,7 @@ static __always_inline void *kmalloc_lar
  */
 static __always_inline void *kmalloc(size_t size, gfp_t flags)
 {
+#ifndef CONFIG_DEBUG_KMALLOC
if (__builtin_constant_p(size)) {
if (size > KMALLOC_MAX_CACHE_SIZE)
return kmalloc_large(size, flags);
@@ -459,6 +493,7 @@ static __always_inline void *kmalloc(siz
}
 #endif
}
+#endif
return __kmalloc(size, flags);
 }
 
@@ -484,7 +519,7 @@ static __always_inline int kmalloc_size(
 
 static __always_inline void *kmalloc_node(size_t size, gfp_t flags, int node)
 {
-#ifndef CONFIG_SLOB
+#if !defined(CONFIG_SLOB) && !defined(CONFIG_DEBUG_KMALLOC)
if (__builtin_constant_p(size) &&
size <= KMALLOC_MAX_CACHE_SIZE && !(flags & GFP_DMA)) {
int i = kmalloc_index(size);
Index: linux-2.6/mm/Kconfig.debug
===
--- linux-2.6.orig/mm/Kconfig.debug 2014-09-02 23:12:58.0 +0200
+++ linux-2.6/mm/Kconfig.debug  2

[PATCH v2 07/15] clk: qcom: Add support for High-Frequency PLLs (HFPLLs)

2014-09-05 Thread Stephen Boyd
HFPLLs are the main frequency source for Krait CPU clocks. Add
support for changing the rate of these PLLs.

Signed-off-by: Stephen Boyd 
---
 drivers/clk/qcom/Makefile|   1 +
 drivers/clk/qcom/clk-hfpll.c | 253 +++
 drivers/clk/qcom/clk-hfpll.h |  54 +
 3 files changed, 308 insertions(+)
 create mode 100644 drivers/clk/qcom/clk-hfpll.c
 create mode 100644 drivers/clk/qcom/clk-hfpll.h

diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
index 783cfb24faa4..f1e54065e4dc 100644
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
@@ -6,6 +6,7 @@ clk-qcom-y += clk-pll.o
 clk-qcom-y += clk-rcg.o
 clk-qcom-y += clk-rcg2.o
 clk-qcom-y += clk-branch.o
+clk-qcom-y += clk-hfpll.o
 clk-qcom-y += reset.o
 
 obj-$(CONFIG_APQ_GCC_8084) += gcc-apq8084.o
diff --git a/drivers/clk/qcom/clk-hfpll.c b/drivers/clk/qcom/clk-hfpll.c
new file mode 100644
index ..367eb95f1477
--- /dev/null
+++ b/drivers/clk/qcom/clk-hfpll.c
@@ -0,0 +1,253 @@
+/*
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "clk-regmap.h"
+#include "clk-hfpll.h"
+
+#define PLL_OUTCTRLBIT(0)
+#define PLL_BYPASSNL   BIT(1)
+#define PLL_RESET_NBIT(2)
+
+/* Initialize a HFPLL at a given rate and enable it. */
+static void __clk_hfpll_init_once(struct clk_hw *hw)
+{
+   struct clk_hfpll *h = to_clk_hfpll(hw);
+   struct hfpll_data const *hd = h->d;
+   struct regmap *regmap = h->clkr.regmap;
+
+   if (likely(h->init_done))
+   return;
+
+   /* Configure PLL parameters for integer mode. */
+   if (hd->config_val)
+   regmap_write(regmap, hd->config_reg, hd->config_val);
+   regmap_write(regmap, hd->m_reg, 0);
+   regmap_write(regmap, hd->n_reg, 1);
+
+   if (hd->user_reg) {
+   u32 regval = hd->user_val;
+   unsigned long rate;
+
+   rate = __clk_get_rate(hw->clk);
+
+   /* Pick the right VCO. */
+   if (hd->user_vco_mask && rate > hd->low_vco_max_rate)
+   regval |= hd->user_vco_mask;
+   regmap_write(regmap, hd->user_reg, regval);
+   }
+
+   if (hd->droop_reg)
+   regmap_write(regmap, hd->droop_reg, hd->droop_val);
+
+   h->init_done = true;
+}
+
+static void __clk_hfpll_enable(struct clk_hw *hw)
+{
+   struct clk_hfpll *h = to_clk_hfpll(hw);
+   struct hfpll_data const *hd = h->d;
+   struct regmap *regmap = h->clkr.regmap;
+   u32 val;
+
+   __clk_hfpll_init_once(hw);
+
+   /* Disable PLL bypass mode. */
+   regmap_update_bits(regmap, hd->mode_reg, PLL_BYPASSNL, PLL_BYPASSNL);
+
+   /*
+* H/W requires a 5us delay between disabling the bypass and
+* de-asserting the reset. Delay 10us just to be safe.
+*/
+   udelay(10);
+
+   /* De-assert active-low PLL reset. */
+   regmap_update_bits(regmap, hd->mode_reg, PLL_RESET_N, PLL_RESET_N);
+
+   /* Wait for PLL to lock. */
+   if (hd->status_reg) {
+   do {
+   regmap_read(regmap, hd->status_reg, &val);
+   } while (!(val & BIT(hd->lock_bit)));
+   } else {
+   udelay(60);
+   }
+
+   /* Enable PLL output. */
+   regmap_update_bits(regmap, hd->mode_reg, PLL_OUTCTRL, PLL_OUTCTRL);
+}
+
+/* Enable an already-configured HFPLL. */
+static int clk_hfpll_enable(struct clk_hw *hw)
+{
+   unsigned long flags;
+   struct clk_hfpll *h = to_clk_hfpll(hw);
+   struct hfpll_data const *hd = h->d;
+   struct regmap *regmap = h->clkr.regmap;
+   u32 mode;
+
+   spin_lock_irqsave(&h->lock, flags);
+   regmap_read(regmap, hd->mode_reg, &mode);
+   if (!(mode & (PLL_BYPASSNL | PLL_RESET_N | PLL_OUTCTRL)))
+   __clk_hfpll_enable(hw);
+   spin_unlock_irqrestore(&h->lock, flags);
+
+   return 0;
+}
+
+static void __clk_hfpll_disable(struct clk_hfpll *h)
+{
+   struct hfpll_data const *hd = h->d;
+   struct regmap *regmap = h->clkr.regmap;
+
+   /*
+* Disable the PLL output, disable test mode, enable the bypass mode,
+* and assert the reset.
+*/
+   regmap_update_bits(regmap, hd->mode_reg,
+   PLL_BYPASSNL | PLL_RESET_N | PLL_OUTCTRL, 0);
+}
+
+static void clk_hfpll_disable(struct clk_hw *hw)
+{
+   struct clk_hfpll *h = to_clk_hfpll(hw);

[PATCH v2 05/15] clk: Add safe switch hook

2014-09-05 Thread Stephen Boyd
Sometimes clocks can't accept their parent source turning off
while the source is reprogrammed to a different rate. Most
notably some CPU clocks require a way to switch away from the
current PLL they're running on, reprogram that PLL to a new rate,
and then switch back to the PLL with the new rate once they're
done.  Add a hook that drivers can implement allowing them to
return a 'safe parent' that they can switch their parent to while
the upstream source is reprogrammed.

Signed-off-by: Stephen Boyd 
---
 drivers/clk/clk.c| 53 ++--
 include/linux/clk-private.h  |  2 ++
 include/linux/clk-provider.h |  1 +
 3 files changed, 49 insertions(+), 7 deletions(-)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 255ec8c92919..b23e2b9c9102 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -1368,6 +1368,7 @@ static void clk_calc_subtree(struct clk *clk, unsigned 
long new_rate,
 struct clk *new_parent, u8 p_index)
 {
struct clk *child;
+   struct clk *parent;
 
clk->new_rate = new_rate;
clk->new_parent = new_parent;
@@ -1377,6 +1378,17 @@ static void clk_calc_subtree(struct clk *clk, unsigned 
long new_rate,
if (new_parent && new_parent != clk->parent)
new_parent->new_child = clk;
 
+   if (clk->ops->get_safe_parent) {
+   parent = clk->ops->get_safe_parent(clk->hw);
+   if (parent) {
+   p_index = clk_fetch_parent_index(clk, parent);
+   clk->safe_parent_index = p_index;
+   clk->safe_parent = parent;
+   }
+   } else {
+   clk->safe_parent = NULL;
+   }
+
hlist_for_each_entry(child, &clk->children, child_node) {
child->new_rate = clk_recalc(child, new_rate);
clk_calc_subtree(child, child->new_rate, NULL, 0);
@@ -1459,14 +1471,42 @@ out:
 static struct clk *clk_propagate_rate_change(struct clk *clk, unsigned long 
event)
 {
struct clk *child, *tmp_clk, *fail_clk = NULL;
+   struct clk *old_parent;
int ret = NOTIFY_DONE;
 
-   if (clk->rate == clk->new_rate)
+   if (clk->rate == clk->new_rate && event != POST_RATE_CHANGE)
return NULL;
 
+   switch (event) {
+   case PRE_RATE_CHANGE:
+   if (clk->safe_parent)
+   clk->ops->set_parent(clk->hw, clk->safe_parent_index);
+   break;
+   case POST_RATE_CHANGE:
+   if (clk->safe_parent) {
+   old_parent = __clk_set_parent_before(clk,
+clk->new_parent);
+   if (clk->ops->set_rate_and_parent) {
+   clk->ops->set_rate_and_parent(clk->hw,
+   clk->new_rate,
+   clk->new_parent ?
+   clk->new_parent->rate : 0,
+   clk->new_parent_index);
+   } else if (clk->ops->set_parent) {
+   clk->ops->set_parent(clk->hw,
+   clk->new_parent_index);
+   }
+   __clk_set_parent_after(clk, clk->new_parent,
+  old_parent);
+   }
+   break;
+   }
+
if (clk->notifier_count) {
-   ret = __clk_notify(clk, event, clk->rate, clk->new_rate);
-   if (ret & NOTIFY_STOP_MASK)
+   if (event != POST_RATE_CHANGE)
+   ret = __clk_notify(clk, event, clk->rate,
+  clk->new_rate);
+   if (ret & NOTIFY_STOP_MASK && event != POST_RATE_CHANGE)
fail_clk = clk;
}
 
@@ -1508,7 +1548,8 @@ static void clk_change_rate(struct clk *clk)
else if (clk->parent)
best_parent_rate = clk->parent->rate;
 
-   if (clk->new_parent && clk->new_parent != clk->parent) {
+   if (clk->new_parent && clk->new_parent != clk->parent &&
+   !clk->safe_parent) {
old_parent = __clk_set_parent_before(clk, clk->new_parent);
 
if (clk->ops->set_rate_and_parent) {
@@ -1528,9 +1569,6 @@ static void clk_change_rate(struct clk *clk)
 
clk->rate = clk_recalc(clk, best_parent_rate);
 
-   if (clk->notifier_count && old_rate != clk->rate)
-   __clk_notify(clk, POST_RATE_CHANGE, old_rate, clk->rate);
-
hlist_for_each_entry(child, &clk->children, child_node) {
/* Skip children who will be reparented to another clock */
if (child->new_parent && child->new_parent != clk)
@@ -1604,6 +1642,7 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
/* 

[PATCH v2 10/15] clk: qcom: Add IPQ806X's HFPLLs

2014-09-05 Thread Stephen Boyd
Describe the HFPLLs present on IPQ806X devices.

Signed-off-by: Stephen Boyd 
---
 drivers/clk/qcom/gcc-ipq806x.c | 83 ++
 1 file changed, 83 insertions(+)

diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
index 4032e510d9aa..353261b12ba1 100644
--- a/drivers/clk/qcom/gcc-ipq806x.c
+++ b/drivers/clk/qcom/gcc-ipq806x.c
@@ -30,6 +30,7 @@
 #include "clk-pll.h"
 #include "clk-rcg.h"
 #include "clk-branch.h"
+#include "clk-hfpll.h"
 #include "reset.h"
 
 static struct clk_pll pll3 = {
@@ -75,6 +76,85 @@ static struct clk_regmap pll8_vote = {
},
 };
 
+static struct hfpll_data hfpll0_data = {
+   .mode_reg = 0x3200,
+   .l_reg = 0x3208,
+   .m_reg = 0x320c,
+   .n_reg = 0x3210,
+   .config_reg = 0x3204,
+   .status_reg = 0x321c,
+   .config_val = 0x7845c665,
+   .droop_reg = 0x3214,
+   .droop_val = 0x0108c000,
+   .min_rate = 6UL,
+   .max_rate = 18UL,
+};
+
+static struct clk_hfpll hfpll0 = {
+   .d = &hfpll0_data,
+   .clkr.hw.init = &(struct clk_init_data){
+   .parent_names = (const char *[]){ "pxo" },
+   .num_parents = 1,
+   .name = "hfpll0",
+   .ops = &clk_ops_hfpll,
+   .flags = CLK_IGNORE_UNUSED,
+   },
+   .lock = __SPIN_LOCK_UNLOCKED(hfpll0.lock),
+};
+
+static struct hfpll_data hfpll1_data = {
+   .mode_reg = 0x3240,
+   .l_reg = 0x3248,
+   .m_reg = 0x324c,
+   .n_reg = 0x3250,
+   .config_reg = 0x3244,
+   .status_reg = 0x325c,
+   .config_val = 0x7845c665,
+   .droop_reg = 0x3314,
+   .droop_val = 0x0108c000,
+   .min_rate = 6UL,
+   .max_rate = 18UL,
+};
+
+static struct clk_hfpll hfpll1 = {
+   .d = &hfpll1_data,
+   .clkr.hw.init = &(struct clk_init_data){
+   .parent_names = (const char *[]){ "pxo" },
+   .num_parents = 1,
+   .name = "hfpll1",
+   .ops = &clk_ops_hfpll,
+   .flags = CLK_IGNORE_UNUSED,
+   },
+   .lock = __SPIN_LOCK_UNLOCKED(hfpll1.lock),
+};
+
+static struct hfpll_data hfpll_l2_data = {
+   .mode_reg = 0x3300,
+   .l_reg = 0x3308,
+   .m_reg = 0x330c,
+   .n_reg = 0x3310,
+   .config_reg = 0x3304,
+   .status_reg = 0x331c,
+   .config_val = 0x7845c665,
+   .droop_reg = 0x3314,
+   .droop_val = 0x0108c000,
+   .min_rate = 6UL,
+   .max_rate = 18UL,
+};
+
+static struct clk_hfpll hfpll_l2 = {
+   .d = &hfpll_l2_data,
+   .clkr.hw.init = &(struct clk_init_data){
+   .parent_names = (const char *[]){ "pxo" },
+   .num_parents = 1,
+   .name = "hfpll_l2",
+   .ops = &clk_ops_hfpll,
+   .flags = CLK_IGNORE_UNUSED,
+   },
+   .lock = __SPIN_LOCK_UNLOCKED(hfpll_l2.lock),
+};
+
+
 static struct clk_pll pll14 = {
.l_reg = 0x31c4,
.m_reg = 0x31c8,
@@ -2232,6 +2312,9 @@ static struct clk_regmap *gcc_ipq806x_clks[] = {
[USB_FS1_XCVR_SRC] = &usb_fs1_xcvr_clk_src.clkr,
[USB_FS1_XCVR_CLK] = &usb_fs1_xcvr_clk.clkr,
[USB_FS1_SYSTEM_CLK] = &usb_fs1_sys_clk.clkr,
+   [PLL9] = &hfpll0.clkr,
+   [PLL10] = &hfpll1.clkr,
+   [PLL12] = &hfpll_l2.clkr,
 };
 
 static const struct qcom_reset_map gcc_ipq806x_resets[] = {
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation

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[PATCH v2 09/15] clk: qcom: Add MSM8960/APQ8064's HFPLLs

2014-09-05 Thread Stephen Boyd
Describe the HFPLLs present on MSM8960 and APQ8064 devices.

Signed-off-by: Stephen Boyd 
---
 drivers/clk/qcom/gcc-msm8960.c   | 172 +++
 include/dt-bindings/clock/qcom,gcc-msm8960.h |   2 +
 2 files changed, 174 insertions(+)

diff --git a/drivers/clk/qcom/gcc-msm8960.c b/drivers/clk/qcom/gcc-msm8960.c
index 007534f7a2d7..e60327baf5db 100644
--- a/drivers/clk/qcom/gcc-msm8960.c
+++ b/drivers/clk/qcom/gcc-msm8960.c
@@ -30,6 +30,7 @@
 #include "clk-pll.h"
 #include "clk-rcg.h"
 #include "clk-branch.h"
+#include "clk-hfpll.h"
 #include "reset.h"
 
 static struct clk_pll pll3 = {
@@ -75,6 +76,164 @@ static struct clk_regmap pll8_vote = {
},
 };
 
+static struct hfpll_data hfpll0_data = {
+   .mode_reg = 0x3200,
+   .l_reg = 0x3208,
+   .m_reg = 0x320c,
+   .n_reg = 0x3210,
+   .config_reg = 0x3204,
+   .status_reg = 0x321c,
+   .config_val = 0x7845c665,
+   .droop_reg = 0x3214,
+   .droop_val = 0x0108c000,
+   .min_rate = 6UL,
+   .max_rate = 18UL,
+};
+
+static struct clk_hfpll hfpll0 = {
+   .d = &hfpll0_data,
+   .clkr.hw.init = &(struct clk_init_data){
+   .parent_names = (const char *[]){ "pxo" },
+   .num_parents = 1,
+   .name = "hfpll0",
+   .ops = &clk_ops_hfpll,
+   .flags = CLK_IGNORE_UNUSED,
+   },
+   .lock = __SPIN_LOCK_UNLOCKED(hfpll0.lock),
+};
+
+static struct hfpll_data hfpll1_8064_data = {
+   .mode_reg = 0x3240,
+   .l_reg = 0x3248,
+   .m_reg = 0x324c,
+   .n_reg = 0x3250,
+   .config_reg = 0x3244,
+   .status_reg = 0x325c,
+   .config_val = 0x7845c665,
+   .droop_reg = 0x3254,
+   .droop_val = 0x0108c000,
+   .min_rate = 6UL,
+   .max_rate = 18UL,
+};
+
+static struct hfpll_data hfpll1_data = {
+   .mode_reg = 0x3300,
+   .l_reg = 0x3308,
+   .m_reg = 0x330c,
+   .n_reg = 0x3310,
+   .config_reg = 0x3304,
+   .status_reg = 0x331c,
+   .config_val = 0x7845c665,
+   .droop_reg = 0x3314,
+   .droop_val = 0x0108c000,
+   .min_rate = 6UL,
+   .max_rate = 18UL,
+};
+
+static struct clk_hfpll hfpll1 = {
+   .d = &hfpll1_data,
+   .clkr.hw.init = &(struct clk_init_data){
+   .parent_names = (const char *[]){ "pxo" },
+   .num_parents = 1,
+   .name = "hfpll1",
+   .ops = &clk_ops_hfpll,
+   .flags = CLK_IGNORE_UNUSED,
+   },
+   .lock = __SPIN_LOCK_UNLOCKED(hfpll1.lock),
+};
+
+static struct hfpll_data hfpll2_data = {
+   .mode_reg = 0x3280,
+   .l_reg = 0x3288,
+   .m_reg = 0x328c,
+   .n_reg = 0x3290,
+   .config_reg = 0x3284,
+   .status_reg = 0x329c,
+   .config_val = 0x7845c665,
+   .droop_reg = 0x3294,
+   .droop_val = 0x0108c000,
+   .min_rate = 6UL,
+   .max_rate = 18UL,
+};
+
+static struct clk_hfpll hfpll2 = {
+   .d = &hfpll2_data,
+   .clkr.hw.init = &(struct clk_init_data){
+   .parent_names = (const char *[]){ "pxo" },
+   .num_parents = 1,
+   .name = "hfpll2",
+   .ops = &clk_ops_hfpll,
+   .flags = CLK_IGNORE_UNUSED,
+   },
+   .lock = __SPIN_LOCK_UNLOCKED(hfpll2.lock),
+};
+
+static struct hfpll_data hfpll3_data = {
+   .mode_reg = 0x32c0,
+   .l_reg = 0x32c8,
+   .m_reg = 0x32cc,
+   .n_reg = 0x32d0,
+   .config_reg = 0x32c4,
+   .status_reg = 0x32dc,
+   .config_val = 0x7845c665,
+   .droop_reg = 0x32d4,
+   .droop_val = 0x0108c000,
+   .min_rate = 6UL,
+   .max_rate = 18UL,
+};
+
+static struct clk_hfpll hfpll3 = {
+   .d = &hfpll3_data,
+   .clkr.hw.init = &(struct clk_init_data){
+   .parent_names = (const char *[]){ "pxo" },
+   .num_parents = 1,
+   .name = "hfpll3",
+   .ops = &clk_ops_hfpll,
+   .flags = CLK_IGNORE_UNUSED,
+   },
+   .lock = __SPIN_LOCK_UNLOCKED(hfpll3.lock),
+};
+
+static struct hfpll_data hfpll_l2_8064_data = {
+   .mode_reg = 0x3300,
+   .l_reg = 0x3308,
+   .m_reg = 0x330c,
+   .n_reg = 0x3310,
+   .config_reg = 0x3304,
+   .status_reg = 0x331c,
+   .config_val = 0x7845c665,
+   .droop_reg = 0x3314,
+   .droop_val = 0x0108c000,
+   .min_rate = 6UL,
+   .max_rate = 18UL,
+};
+
+static struct hfpll_data hfpll_l2_data = {
+   .mode_reg = 0x3400,
+   .l_reg = 0x3408,
+   .m_reg = 0x340c,
+   .n_reg = 0x3410,
+   .config_reg = 0x3404,
+   .status_reg = 0x341c,
+   .config_val = 0x7845c665,
+   .droop_reg = 0x3414,
+   .droop_val = 0x0108c000,
+   .min_rate = 6UL,
+   .max_rate = 18UL,
+};
+
+static struct clk_hfpll hfpll_l2 = {
+   .d = &hfpll_l2_data,
+   .clkr.hw.init = &(struct clk_init_d

Re: [RFC v2 3/6] kthread: warn on kill signal if not OOM

2014-09-05 Thread Dmitry Torokhov
On Fri, Sep 05, 2014 at 03:45:08PM -0700, Arjan van de Ven wrote:
> On 9/5/2014 3:29 PM, Tejun Heo wrote:
> >Hello, Dmitry.
> >
> >On Fri, Sep 05, 2014 at 11:10:03AM -0700, Dmitry Torokhov wrote:
> >>I do not agree that it is actually user-visible change: generally speaking 
> >>you
> >>do not really know if device is there or not. They come and go. Like I said,
> >>consider all permutations, with hot-pluggable buses, deferred probing, etc,
> >
> >It is for storage devices which always have guaranteed synchronous
> >probing on module load and well-defined probing order.  Sure, modern
> >setups are a lot more dynamic but I'm quite certain that there are
> >setups in the wild which depend on storage driver loading being
> >synchronous.  We can't simply declare one day that such behavior is
> >broken and break, most likely, their boots.
> 
> we even depend on this in the mount-by-label cases
> 
> many setups assume that the internal storage prevails over the USB stick in 
> the case of conflicts.
> it's a security issue; you don't want the built in secure bootloader that has 
> a kernel root argument
> by label/uuid.
> the security there tends to assume that built-in wins over USB

Ahem... and they sure it works reliably with large storage arrays? With
SCSI doing probing asynchronously already?

Thanks.

-- 
Dmitry
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[PATCH v2 11/15] clk: qcom: Add support for Krait clocks

2014-09-05 Thread Stephen Boyd
The Krait clocks are made up of a series of muxes and a divider
that choose between a fixed rate clock and dedicated HFPLLs for
each CPU. Instead of using mmio accesses to remux parents, the
Krait implementation exposes the remux control via cp15
registers. Support these clocks.

Signed-off-by: Stephen Boyd 
---
 drivers/clk/qcom/Kconfig |   4 ++
 drivers/clk/qcom/Makefile|   1 +
 drivers/clk/qcom/clk-krait.c | 166 +++
 drivers/clk/qcom/clk-krait.h |  49 +
 4 files changed, 220 insertions(+)
 create mode 100644 drivers/clk/qcom/clk-krait.c
 create mode 100644 drivers/clk/qcom/clk-krait.h

diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index 3ff19a51a933..2fd07b17e10e 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -78,3 +78,7 @@ config QCOM_HFPLL
  Support for the high-frequency PLLs present on Qualcomm devices.
  Say Y if you want to support CPU frequency scaling on devices
  such as MSM8974, APQ8084, etc.
+
+config KRAIT_CLOCKS
+   bool
+   select KRAIT_L2_ACCESSORS
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
index db39912cffec..c7fda5e9dcc7 100644
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
@@ -6,6 +6,7 @@ clk-qcom-y += clk-pll.o
 clk-qcom-y += clk-rcg.o
 clk-qcom-y += clk-rcg2.o
 clk-qcom-y += clk-branch.o
+clk-qcom-$(CONFIG_KRAIT_CLOCKS) += clk-krait.o
 clk-qcom-y += clk-hfpll.o
 clk-qcom-y += reset.o
 
diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c
new file mode 100644
index ..615bfbee1b6a
--- /dev/null
+++ b/drivers/clk/qcom/clk-krait.c
@@ -0,0 +1,166 @@
+/*
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "clk-krait.h"
+
+/* Secondary and primary muxes share the same cp15 register */
+static DEFINE_SPINLOCK(krait_clock_reg_lock);
+
+#define LPL_SHIFT  8
+static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel)
+{
+   unsigned long flags;
+   u32 regval;
+
+   spin_lock_irqsave(&krait_clock_reg_lock, flags);
+   regval = krait_get_l2_indirect_reg(mux->offset);
+   regval &= ~(mux->mask << mux->shift);
+   regval |= (sel & mux->mask) << mux->shift;
+   if (mux->lpl) {
+   regval &= ~(mux->mask << (mux->shift + LPL_SHIFT));
+   regval |= (sel & mux->mask) << (mux->shift + LPL_SHIFT);
+   }
+   krait_set_l2_indirect_reg(mux->offset, regval);
+   spin_unlock_irqrestore(&krait_clock_reg_lock, flags);
+
+   /* Wait for switch to complete. */
+   mb();
+   udelay(1);
+}
+
+static int krait_mux_set_parent(struct clk_hw *hw, u8 index)
+{
+   struct krait_mux_clk *mux = to_krait_mux_clk(hw);
+   u32 sel;
+
+   sel = clk_mux_reindex(index, mux->parent_map, 0);
+   mux->en_mask = sel;
+   /* Don't touch mux if CPU is off as it won't work */
+   if (__clk_is_enabled(hw->clk))
+   __krait_mux_set_sel(mux, sel);
+   return 0;
+}
+
+static u8 krait_mux_get_parent(struct clk_hw *hw)
+{
+   struct krait_mux_clk *mux = to_krait_mux_clk(hw);
+   u32 sel;
+
+   sel = krait_get_l2_indirect_reg(mux->offset);
+   sel >>= mux->shift;
+   sel &= mux->mask;
+   mux->en_mask = sel;
+
+   return clk_mux_get_parent(hw, sel, mux->parent_map, 0);
+}
+
+static struct clk *krait_mux_get_safe_parent(struct clk_hw *hw)
+{
+   int i;
+   struct krait_mux_clk *mux = to_krait_mux_clk(hw);
+   int num_parents = __clk_get_num_parents(hw->clk);
+
+   i = mux->safe_sel;
+   for (i = 0; i < num_parents; i++)
+   if (mux->safe_sel == mux->parent_map[i])
+   break;
+
+   return clk_get_parent_by_index(hw->clk, i);
+}
+
+static int krait_mux_enable(struct clk_hw *hw)
+{
+   struct krait_mux_clk *mux = to_krait_mux_clk(hw);
+
+   __krait_mux_set_sel(mux, mux->en_mask);
+
+   return 0;
+}
+
+static void krait_mux_disable(struct clk_hw *hw)
+{
+   struct krait_mux_clk *mux = to_krait_mux_clk(hw);
+
+   __krait_mux_set_sel(mux, mux->safe_sel);
+}
+
+const struct clk_ops krait_mux_clk_ops = {
+   .enable = krait_mux_enable,
+   .disable = krait_mux_disable,
+   .set_parent = krait_mux_set_parent,
+   .get_parent = krait_mux_get_parent,
+   .determine_rate = __clk_mux_determine_rate_closest,

[PATCH v2 12/15] clk: qcom: Add KPSS ACC/GCC driver

2014-09-05 Thread Stephen Boyd
The ACC and GCC regions present in KPSSv1 contain registers to
control clocks and power to each Krait CPU and L2. For CPUfreq
purposes probe these devices and expose a mux clock that chooses
between PXO and PLL8.

Signed-off-by: Stephen Boyd 
---
 drivers/clk/qcom/Kconfig|  8 
 drivers/clk/qcom/Makefile   |  1 +
 drivers/clk/qcom/kpss-xcc.c | 94 +
 3 files changed, 103 insertions(+)
 create mode 100644 drivers/clk/qcom/kpss-xcc.c

diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index 2fd07b17e10e..6bf73773f75a 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -79,6 +79,14 @@ config QCOM_HFPLL
  Say Y if you want to support CPU frequency scaling on devices
  such as MSM8974, APQ8084, etc.
 
+config KPSS_XCC
+   tristate "KPSS Clock Controller"
+   depends on COMMON_CLK_QCOM
+   help
+ Support for the Krait ACC and GCC clock controllers. Say Y
+ if you want to support CPU frequency scaling on devices such
+ as MSM8960, APQ8064, etc.
+
 config KRAIT_CLOCKS
bool
select KRAIT_L2_ACCESSORS
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
index c7fda5e9dcc7..d85491bfc053 100644
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
@@ -18,4 +18,5 @@ obj-$(CONFIG_MSM_GCC_8960) += gcc-msm8960.o
 obj-$(CONFIG_MSM_GCC_8974) += gcc-msm8974.o
 obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
 obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
+obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o
 obj-$(CONFIG_QCOM_HFPLL) += hfpll.o
diff --git a/drivers/clk/qcom/kpss-xcc.c b/drivers/clk/qcom/kpss-xcc.c
new file mode 100644
index ..9c49496afa6a
--- /dev/null
+++ b/drivers/clk/qcom/kpss-xcc.c
@@ -0,0 +1,94 @@
+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static const char *aux_parents[] = {
+   "pll8_vote",
+   "pxo",
+};
+
+static unsigned int aux_parent_map[] = {
+   3,
+   0,
+};
+
+static const struct of_device_id kpss_xcc_match_table[] = {
+   { .compatible = "qcom,kpss-acc-v1", .data = (void *)1UL },
+   { .compatible = "qcom,kpss-gcc" },
+   {}
+};
+MODULE_DEVICE_TABLE(of, kpss_xcc_match_table);
+
+static int kpss_xcc_driver_probe(struct platform_device *pdev)
+{
+   const struct of_device_id *id;
+   struct clk *clk;
+   struct resource *res;
+   void __iomem *base;
+   const char *name;
+
+   id = of_match_device(kpss_xcc_match_table, &pdev->dev);
+   if (!id)
+   return -ENODEV;
+
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+   base = devm_ioremap_resource(&pdev->dev, res);
+   if (IS_ERR(base))
+   return PTR_ERR(base);
+
+   if (id->data) {
+   if (of_property_read_string_index(pdev->dev.of_node,
+   "clock-output-names", 0, &name))
+   return -ENODEV;
+   base += 0x14;
+   } else {
+   name = "acpu_l2_aux";
+   base += 0x28;
+   }
+
+   clk = clk_register_mux_table(&pdev->dev, name, aux_parents,
+ARRAY_SIZE(aux_parents), 0, base, 0, 0x3,
+0, aux_parent_map, NULL);
+
+   platform_set_drvdata(pdev, clk);
+
+   return PTR_ERR_OR_ZERO(clk);
+}
+
+static int kpss_xcc_driver_remove(struct platform_device *pdev)
+{
+   clk_unregister_mux(platform_get_drvdata(pdev));
+   return 0;
+}
+
+static struct platform_driver kpss_xcc_driver = {
+   .probe = kpss_xcc_driver_probe,
+   .remove = kpss_xcc_driver_remove,
+   .driver = {
+   .name = "kpss-xcc",
+   .of_match_table = kpss_xcc_match_table,
+   .owner = THIS_MODULE,
+   },
+};
+module_platform_driver(kpss_xcc_driver);
+
+MODULE_LICENSE("GPL v2");
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation

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[PATCH] ARM: debug: Update MSM and QCOM DEBUG_LL help

2014-09-05 Thread Stephen Boyd
Add another SoC address for apq8064 and use DEBUG_UART_VIRT
instead of DEBUG_UART_BASE because the former actually exists.

Signed-off-by: Stephen Boyd 
---
 arch/arm/Kconfig.debug | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 537dd04209bc..a71558ecf9da 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -378,7 +378,7 @@ choice
  Say Y here if you want the debug print routines to direct
  their output to the serial port on MSM devices.
 
- ARCHDEBUG_UART_PHYS   DEBUG_UART_BASE   #
+ ARCHDEBUG_UART_PHYS   DEBUG_UART_VIRT   #
  MSM7X00A, QSD8X50   0xa9a00xe100UART1
  MSM7X00A, QSD8X50   0xa9b00xe100UART2
  MSM7X00A, QSD8X50   0xa9c00xe100UART3
@@ -397,7 +397,8 @@ choice
  Say Y here if you want the debug print routines to direct
  their output to the serial port on Qualcomm devices.
 
- ARCH  DEBUG_UART_PHYS   DEBUG_UART_BASE
+ ARCH  DEBUG_UART_PHYS   DEBUG_UART_VIRT
+ APQ8064   0x16640xf004
  APQ8084   0xf995e0000xfa75e000
  MSM8X60   0x19c40xf004
  MSM8960   0x16440xf004
-- 
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hosted by The Linux Foundation

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[PATCH v2 13/15] clk: qcom: Add Krait clock controller driver

2014-09-05 Thread Stephen Boyd
The Krait CPU clocks are made up of a primary mux and secondary
mux for each CPU and the L2, controlled via cp15 accessors. For
Kraits within KPSSv1 each secondary mux accepts a different aux
source, but on KPSSv2 each secondary mux accepts the same aux
source.

Signed-off-by: Stephen Boyd 
---
 drivers/clk/qcom/Kconfig|   8 +
 drivers/clk/qcom/Makefile   |   1 +
 drivers/clk/qcom/krait-cc.c | 357 
 3 files changed, 366 insertions(+)
 create mode 100644 drivers/clk/qcom/krait-cc.c

diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index 6bf73773f75a..63285d116013 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -87,6 +87,14 @@ config KPSS_XCC
  if you want to support CPU frequency scaling on devices such
  as MSM8960, APQ8064, etc.
 
+config KRAITCC
+   tristate "Krait Clock Controller"
+   depends on COMMON_CLK_QCOM && ARM
+   select KRAIT_CLOCKS
+   help
+ Support for the Krait CPU clocks on Qualcomm devices.
+ Say Y if you want to support CPU frequency scaling.
+
 config KRAIT_CLOCKS
bool
select KRAIT_L2_ACCESSORS
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
index d85491bfc053..866f0fe600d9 100644
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
@@ -20,3 +20,4 @@ obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
 obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
 obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o
 obj-$(CONFIG_QCOM_HFPLL) += hfpll.o
+obj-$(CONFIG_KRAITCC) += krait-cc.o
diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c
new file mode 100644
index ..8c5d24e2c6cb
--- /dev/null
+++ b/drivers/clk/qcom/krait-cc.c
@@ -0,0 +1,357 @@
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "clk-krait.h"
+
+static unsigned int sec_mux_map[] = {
+   2,
+   0,
+};
+
+static unsigned int pri_mux_map[] = {
+   1,
+   2,
+   0,
+};
+
+static int
+krait_add_div(struct device *dev, int id, const char *s, unsigned offset)
+{
+   struct krait_div2_clk *div;
+   struct clk_init_data init = {
+   .num_parents = 1,
+   .ops = &krait_div2_clk_ops,
+   .flags = CLK_SET_RATE_PARENT,
+   };
+   const char *p_names[1];
+   struct clk *clk;
+
+   div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL);
+   if (!div)
+   return -ENOMEM;
+
+   div->width = 2;
+   div->shift = 6;
+   div->lpl = id >= 0;
+   div->offset = offset;
+   div->hw.init = &init;
+
+   init.name = kasprintf(GFP_KERNEL, "hfpll%s_div", s);
+   if (!init.name)
+   return -ENOMEM;
+
+   init.parent_names = p_names;
+   p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s);
+   if (!p_names[0]) {
+   kfree(init.name);
+   return -ENOMEM;
+   }
+
+   clk = devm_clk_register(dev, &div->hw);
+   kfree(p_names[0]);
+   kfree(init.name);
+
+   return PTR_ERR_OR_ZERO(clk);
+}
+
+static int
+krait_add_sec_mux(struct device *dev, int id, const char *s, unsigned offset,
+ bool unique_aux)
+{
+   struct krait_mux_clk *mux;
+   static const char *sec_mux_list[] = {
+   "acpu_aux",
+   "qsb",
+   };
+   struct clk_init_data init = {
+   .parent_names = sec_mux_list,
+   .num_parents = ARRAY_SIZE(sec_mux_list),
+   .ops = &krait_mux_clk_ops,
+   .flags = CLK_SET_RATE_PARENT,
+   };
+   struct clk *clk;
+
+   mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
+   if (!mux)
+   return -ENOMEM;
+
+   mux->offset = offset;
+   mux->lpl = id >= 0;
+   mux->has_safe_parent = true;
+   mux->safe_sel = 2;
+   mux->mask = 0x3;
+   mux->shift = 2;
+   mux->parent_map = sec_mux_map;
+   mux->hw.init = &init;
+
+   init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
+   if (!init.name)
+   return -ENOMEM;
+
+   if (unique_aux) {
+   sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s);
+   if (!sec_mux_list[0]) {
+   clk = ERR_PTR(-ENOMEM);
+   goto err_aux;
+   }
+   }
+
+   clk = devm_clk_register(dev

[PATCH v2 08/15] clk: qcom: Add HFPLL driver

2014-09-05 Thread Stephen Boyd
On some devices (MSM8974 for example), the HFPLLs are
instantiated within the Krait processor subsystem as separate
register regions. Add a driver for these PLLs so that we can
provide HFPLL clocks for use by the system.

Signed-off-by: Stephen Boyd 
---
 drivers/clk/qcom/Kconfig  |   8 
 drivers/clk/qcom/Makefile |   1 +
 drivers/clk/qcom/hfpll.c  | 110 ++
 3 files changed, 119 insertions(+)
 create mode 100644 drivers/clk/qcom/hfpll.c

diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index 1107351ed346..3ff19a51a933 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -70,3 +70,11 @@ config MSM_MMCC_8974
  Support for the multimedia clock controller on msm8974 devices.
  Say Y if you want to support multimedia devices such as display,
  graphics, video encode/decode, camera, etc.
+
+config QCOM_HFPLL
+   tristate "High-Frequency PLL (HFPLL) Clock Controller"
+   depends on COMMON_CLK_QCOM
+   help
+ Support for the high-frequency PLLs present on Qualcomm devices.
+ Say Y if you want to support CPU frequency scaling on devices
+ such as MSM8974, APQ8084, etc.
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
index f1e54065e4dc..db39912cffec 100644
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
@@ -17,3 +17,4 @@ obj-$(CONFIG_MSM_GCC_8960) += gcc-msm8960.o
 obj-$(CONFIG_MSM_GCC_8974) += gcc-msm8974.o
 obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
 obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
+obj-$(CONFIG_QCOM_HFPLL) += hfpll.o
diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
new file mode 100644
index ..701a377d35c1
--- /dev/null
+++ b/drivers/clk/qcom/hfpll.c
@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "clk-regmap.h"
+#include "clk-hfpll.h"
+
+static const struct hfpll_data hdata = {
+   .mode_reg = 0x00,
+   .l_reg = 0x04,
+   .m_reg = 0x08,
+   .n_reg = 0x0c,
+   .user_reg = 0x10,
+   .config_reg = 0x14,
+   .config_val = 0x430405d,
+   .status_reg = 0x1c,
+   .lock_bit = 16,
+
+   .user_val = 0x8,
+   .user_vco_mask = 0x10,
+   .low_vco_max_rate = 124800,
+   .min_rate = 53760UL,
+   .max_rate = 29UL,
+};
+
+static const struct of_device_id qcom_hfpll_match_table[] = {
+   { .compatible = "qcom,hfpll" },
+   { }
+};
+MODULE_DEVICE_TABLE(of, qcom_hfpll_match_table);
+
+static struct regmap_config hfpll_regmap_config = {
+   .reg_bits   = 32,
+   .reg_stride = 4,
+   .val_bits   = 32,
+   .max_register   = 0x30,
+   .fast_io= true,
+};
+
+static int qcom_hfpll_probe(struct platform_device *pdev)
+{
+   struct clk *clk;
+   struct resource *res;
+   struct device *dev = &pdev->dev;
+   void __iomem *base;
+   struct regmap *regmap;
+   struct clk_hfpll *h;
+   struct clk_init_data init = {
+   .parent_names = (const char *[]){ "xo" },
+   .num_parents = 1,
+   .ops = &clk_ops_hfpll,
+   };
+
+   h = devm_kzalloc(dev, sizeof(*h), GFP_KERNEL);
+   if (!h)
+   return -ENOMEM;
+
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+   base = devm_ioremap_resource(dev, res);
+   if (IS_ERR(base))
+   return PTR_ERR(base);
+
+   regmap = devm_regmap_init_mmio(&pdev->dev, base, &hfpll_regmap_config);
+   if (IS_ERR(regmap))
+   return PTR_ERR(regmap);
+
+   if (of_property_read_string_index(dev->of_node, "clock-output-names",
+ 0, &init.name))
+   return -ENODEV;
+
+   h->d = &hdata;
+   h->clkr.hw.init = &init;
+   spin_lock_init(&h->lock);
+
+   clk = devm_clk_register_regmap(&pdev->dev, &h->clkr);
+
+   return PTR_ERR_OR_ZERO(clk);
+}
+
+static struct platform_driver qcom_hfpll_driver = {
+   .probe  = qcom_hfpll_probe,
+   .driver = {
+   .name   = "qcom-hfpll",
+   .owner  = THIS_MODULE,
+   .of_match_table = qcom_hfpll_match_table,
+   },
+};
+module_platform_driver(qcom_hfpll_driver);
+
+MODULE_DESCRIPTION("QCOM HFPLL Clock Driver");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:qcom-h

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