Re: [GIT PULL] remaining tpmdd fixes for Linux 4.5

2016-02-25 Thread James Morris
On Mon, 22 Feb 2016, Jarkko Sakkinen wrote:

> Do you want me to send a pull request containing a fix for the build
> warning or reverting the whole commit? My call would be to apply the
> fix because this commit has been tested both TPM 1.2 by Martin and
> with TPM 2.0 by me and things have worked well.
> 

Send me a pull request just for the fix.

I won't be pushing these changes to Linus for 4.5, they'll have to wait 
until the 4.6.


-- 
James Morris




Re: [GIT PULL] remaining tpmdd fixes for Linux 4.5

2016-02-25 Thread James Morris
On Mon, 22 Feb 2016, Jarkko Sakkinen wrote:

> Do you want me to send a pull request containing a fix for the build
> warning or reverting the whole commit? My call would be to apply the
> fix because this commit has been tested both TPM 1.2 by Martin and
> with TPM 2.0 by me and things have worked well.
> 

Send me a pull request just for the fix.

I won't be pushing these changes to Linus for 4.5, they'll have to wait 
until the 4.6.


-- 
James Morris




Re: [PATCH 0/3] OOM detection rework v4

2016-02-25 Thread Hillf Danton
> 
> It didn't really help, I'm afraid: it reduces the actual number of OOM
> kills which occur before the job is terminated, but doesn't stop the
> job from being terminated very soon.
> 
> I also tried Hillf's patch (separately) too, but as you expected,
> it didn't seem to make any difference.
> 
Perhaps non-costly means NOFAIL as shown by folding the two
patches into one. Can it make any sense?

thanks
Hillf
--- a/mm/page_alloc.c   Thu Feb 25 15:43:18 2016
+++ b/mm/page_alloc.c   Fri Feb 26 15:18:55 2016
@@ -3113,6 +3113,8 @@ should_reclaim_retry(gfp_t gfp_mask, uns
struct zone *zone;
struct zoneref *z;
 
+   if (order <= PAGE_ALLOC_COSTLY_ORDER)
+   return true;
/*
 * Make sure we converge to OOM if we cannot make any progress
 * several times in the row.
--



Re: [PATCH 0/3] OOM detection rework v4

2016-02-25 Thread Hillf Danton
> 
> It didn't really help, I'm afraid: it reduces the actual number of OOM
> kills which occur before the job is terminated, but doesn't stop the
> job from being terminated very soon.
> 
> I also tried Hillf's patch (separately) too, but as you expected,
> it didn't seem to make any difference.
> 
Perhaps non-costly means NOFAIL as shown by folding the two
patches into one. Can it make any sense?

thanks
Hillf
--- a/mm/page_alloc.c   Thu Feb 25 15:43:18 2016
+++ b/mm/page_alloc.c   Fri Feb 26 15:18:55 2016
@@ -3113,6 +3113,8 @@ should_reclaim_retry(gfp_t gfp_mask, uns
struct zone *zone;
struct zoneref *z;
 
+   if (order <= PAGE_ALLOC_COSTLY_ORDER)
+   return true;
/*
 * Make sure we converge to OOM if we cannot make any progress
 * several times in the row.
--



Re: [RESPIN 0/6] Add support for Exynos SROM Controller driver.

2016-02-25 Thread Krzysztof Kozlowski
On 25.02.2016 17:33, Pankaj Dubey wrote:
> This series is collection of patches already reviewed and merged in
> maintainer's tree, but could not make it thorugh main linus tree, due
> to last moment suggestion of proper location of driver should be
> "drivers/memory" instead of "drivers/soc". I have rebased all the patches
> and moved into "drivers/memory/samsung".
> 
> As this is just a movement without changing actual driver code,
> I have not removed "Reviewed-By", "Tested-By" or "Acked-By".
> 
> To make sure everything is fine, I have again tested it on Exynos5880 based
> Chromebook for normal boot, S2R functionality and its working fine.
> 
> This series has been prepared on top of next-soc branch of Krzysztof's tree.
> 
> Changes w.r.t. original merged patches:
>  - Moved exynos-srom driver into "drivers/memory/samsung"
>  - Moved DT binding documentation into "bindings/memory-controller"
>  - Added new patch for entry of new directory in MAINTAINERS file.
>  - Added new CONFIG as SAMSUNG_MC for grouping Samsung's memory controller 
> drivers.
>  - Added my Signed-off-by for patch 5/6 and 6/6 for touching it.
> 
> Pankaj Dubey (4):
>   dt-bindings: EXYNOS: Add exynos-srom device tree binding
>   drivers: memory: Add support for exynos SROM driver
>   MAINTAINERS: Add maintainers entry for drivers/memory/samsung
>   ARM: EXYNOS: Remove SROM related register settings from mach-exynos
> 
> Pavel Fedin (2):
>   dt-bindings: EXYNOS: Describe SROMc configuration
>   drivers: memory: exynos-srom: Add support for bank configuration

Thanks!

The driver was put under samsung subdirectory of drivers/memory because
Pankaj has a plan to add more stuff there. This way we can avoid
unnecessary movements of files (making history reading more difficult).


I applied (with fixes mentioned in my comments) everything and pushed
here so everyone could play with it:
https://git.kernel.org/cgit/linux/kernel/git/krzk/linux.git/log/?h=for-v4.6/drivers-soc-exynos-srom-2


It is also included in for-next.

If there is no comments then I will send it in pull request for v4.6.

Best regards,
Krzysztof



Re: [RESPIN 0/6] Add support for Exynos SROM Controller driver.

2016-02-25 Thread Krzysztof Kozlowski
On 25.02.2016 17:33, Pankaj Dubey wrote:
> This series is collection of patches already reviewed and merged in
> maintainer's tree, but could not make it thorugh main linus tree, due
> to last moment suggestion of proper location of driver should be
> "drivers/memory" instead of "drivers/soc". I have rebased all the patches
> and moved into "drivers/memory/samsung".
> 
> As this is just a movement without changing actual driver code,
> I have not removed "Reviewed-By", "Tested-By" or "Acked-By".
> 
> To make sure everything is fine, I have again tested it on Exynos5880 based
> Chromebook for normal boot, S2R functionality and its working fine.
> 
> This series has been prepared on top of next-soc branch of Krzysztof's tree.
> 
> Changes w.r.t. original merged patches:
>  - Moved exynos-srom driver into "drivers/memory/samsung"
>  - Moved DT binding documentation into "bindings/memory-controller"
>  - Added new patch for entry of new directory in MAINTAINERS file.
>  - Added new CONFIG as SAMSUNG_MC for grouping Samsung's memory controller 
> drivers.
>  - Added my Signed-off-by for patch 5/6 and 6/6 for touching it.
> 
> Pankaj Dubey (4):
>   dt-bindings: EXYNOS: Add exynos-srom device tree binding
>   drivers: memory: Add support for exynos SROM driver
>   MAINTAINERS: Add maintainers entry for drivers/memory/samsung
>   ARM: EXYNOS: Remove SROM related register settings from mach-exynos
> 
> Pavel Fedin (2):
>   dt-bindings: EXYNOS: Describe SROMc configuration
>   drivers: memory: exynos-srom: Add support for bank configuration

Thanks!

The driver was put under samsung subdirectory of drivers/memory because
Pankaj has a plan to add more stuff there. This way we can avoid
unnecessary movements of files (making history reading more difficult).


I applied (with fixes mentioned in my comments) everything and pushed
here so everyone could play with it:
https://git.kernel.org/cgit/linux/kernel/git/krzk/linux.git/log/?h=for-v4.6/drivers-soc-exynos-srom-2


It is also included in for-next.

If there is no comments then I will send it in pull request for v4.6.

Best regards,
Krzysztof



Re: [lkp] [x86/fpu] 58122bf1d8: WARNING: CPU: 0 PID: 1 at arch/x86/include/asm/fpu/internal.h:529 fpu__restore+0x28f/0x9ab()

2016-02-25 Thread Borislav Petkov
On Fri, Feb 26, 2016 at 09:13:52AM +0800, kernel test robot wrote:
> FYI, we noticed the below changes on
> 
> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
> commit 58122bf1d856a4ea9581d62a07c557d997d46a19 ("x86/fpu: Default 
> eagerfpu=on on all CPUs")

Oh cool, so your bisection results point at Ingo's initial suspicion which I
couldn't confirm with mine.

> [   17.097301] WARNING: CPU: 0 PID: 1 at 
> arch/x86/include/asm/fpu/internal.h:529 fpu__restore+0x28f/0x9ab()
> [   17.099191] CPU: 0 PID: 1 Comm: init Not tainted 4.5.0-rc3-00015-g58122bf 
> #1
> [   17.100373]  88000ae17c38 85405ca8 0002 
> 0020
> [   17.101747]  0001  88000ae17c70 
> 818f024e
> [   17.103110]  88000ae17cb0 81138526 0009 
> 88000ae113c0
> [   17.104543] Call Trace:
> [   17.104980]  [] dump_stack+0x19/0x1b
> [   17.105854]  [] warn_slowpath_common+0x1a5/0x1c0
> [   17.106895]  [] warn_slowpath_null+0x1a/0x1c
> [   17.107904]  [] fpu__restore+0x28f/0x9ab
> [   17.108834]  [] __fpu__restore_sig+0xc3e/0x1a3a
> [   17.109862]  [] ? ___preempt_schedule+0x12/0x14
> [   17.110916]  [] fpu__restore_sig+0xf5/0x102
> [   17.111887]  [] ia32_restore_sigcontext+0x586/0x5af
> [   17.112987]  [] sys32_sigreturn+0x246/0x317
> [   17.113956]  [] ? get_sigframe+0x719/0x719
> [   17.115108]  [] do_syscall_32_irqs_off+0x2b2/0x789
> [   17.116179]  [] entry_INT80_compat+0x38/0x50
> [   17.117161] ---[ end trace cb640c01126c054b ]---

...also cool, 32-bit process on a 64-bit kernel. I triggered it once on
a 32-bit kernel.

Does this one help?

---
From: Borislav Petkov 
Date: Mon, 15 Feb 2016 19:50:33 +0100
Subject: [PATCH] x86/FPU: Fix double FPU regs activation

sys_sigreturn() calls fpu__restore_sig() with interrupts enabled. When
restoring a 32-bit signal frame. And it can happen that we get preempted
right after setting ->fpstate_active in a task's FPU.

After we get preempted, we switch between tasks merrily and eventually
are about to switch to that task above whose ->fpstate_active we
set. We enter __switch_to() and do switch_fpu_prepare(). Our task gets
->fpregs_active set, we find ourselves back on the call stack below and
especially in __fpu__restore_sig() which sets ->fpregs_active again.

Leading to that whoops below.

So let's enlarge the preemption-off region so that we set
->fpstate_active with preemption disabled and thus not trigger
fpu.preload:

  switch_fpu_prepare

  ...

fpu.preload = static_cpu_has(X86_FEATURE_FPU) &&
  new_fpu->fpstate_active &&
  ^^

prematurely.

  WARNING: CPU: 0 PID: 3031 at ./arch/x86/include/asm/fpu/internal.h:530 
fpu__restore+0x90/0x130()
  Modules linked in: ...
   CPU: 0 PID: 3031 Comm: bash Not tainted 4.5.0-rc3+ #1
   ...
  Call Trace:
dump_stack
warn_slowpath_common
? fpu__restore
? fpu__restore
warn_slowpath_null
fpu__restore
__fpu__restore_sig
fpu__restore_sig
restore_sigcontext
sys_sigreturn
do_syscall_32_irqs_on
entry_INT80_32

Suggested-by: Andy Lutomirski 
Signed-off-by: Borislav Petkov 
---
 arch/x86/kernel/fpu/signal.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c
index 31c6a60505e6..408e5a1c6fdd 100644
--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -316,12 +316,11 @@ static int __fpu__restore_sig(void __user *buf, void 
__user *buf_fx, int size)
sanitize_restored_xstate(tsk, , xfeatures, fx_only);
}
 
+   preempt_disable();
fpu->fpstate_active = 1;
-   if (use_eager_fpu()) {
-   preempt_disable();
+   if (use_eager_fpu())
fpu__restore(fpu);
-   preempt_enable();
-   }
+   preempt_enable();
 
return err;
} else {
-- 
2.3.5

-- 
Regards/Gruss,
Boris.

ECO tip #101: Trim your mails when you reply.


Re: [lkp] [x86/fpu] 58122bf1d8: WARNING: CPU: 0 PID: 1 at arch/x86/include/asm/fpu/internal.h:529 fpu__restore+0x28f/0x9ab()

2016-02-25 Thread Borislav Petkov
On Fri, Feb 26, 2016 at 09:13:52AM +0800, kernel test robot wrote:
> FYI, we noticed the below changes on
> 
> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
> commit 58122bf1d856a4ea9581d62a07c557d997d46a19 ("x86/fpu: Default 
> eagerfpu=on on all CPUs")

Oh cool, so your bisection results point at Ingo's initial suspicion which I
couldn't confirm with mine.

> [   17.097301] WARNING: CPU: 0 PID: 1 at 
> arch/x86/include/asm/fpu/internal.h:529 fpu__restore+0x28f/0x9ab()
> [   17.099191] CPU: 0 PID: 1 Comm: init Not tainted 4.5.0-rc3-00015-g58122bf 
> #1
> [   17.100373]  88000ae17c38 85405ca8 0002 
> 0020
> [   17.101747]  0001  88000ae17c70 
> 818f024e
> [   17.103110]  88000ae17cb0 81138526 0009 
> 88000ae113c0
> [   17.104543] Call Trace:
> [   17.104980]  [] dump_stack+0x19/0x1b
> [   17.105854]  [] warn_slowpath_common+0x1a5/0x1c0
> [   17.106895]  [] warn_slowpath_null+0x1a/0x1c
> [   17.107904]  [] fpu__restore+0x28f/0x9ab
> [   17.108834]  [] __fpu__restore_sig+0xc3e/0x1a3a
> [   17.109862]  [] ? ___preempt_schedule+0x12/0x14
> [   17.110916]  [] fpu__restore_sig+0xf5/0x102
> [   17.111887]  [] ia32_restore_sigcontext+0x586/0x5af
> [   17.112987]  [] sys32_sigreturn+0x246/0x317
> [   17.113956]  [] ? get_sigframe+0x719/0x719
> [   17.115108]  [] do_syscall_32_irqs_off+0x2b2/0x789
> [   17.116179]  [] entry_INT80_compat+0x38/0x50
> [   17.117161] ---[ end trace cb640c01126c054b ]---

...also cool, 32-bit process on a 64-bit kernel. I triggered it once on
a 32-bit kernel.

Does this one help?

---
From: Borislav Petkov 
Date: Mon, 15 Feb 2016 19:50:33 +0100
Subject: [PATCH] x86/FPU: Fix double FPU regs activation

sys_sigreturn() calls fpu__restore_sig() with interrupts enabled. When
restoring a 32-bit signal frame. And it can happen that we get preempted
right after setting ->fpstate_active in a task's FPU.

After we get preempted, we switch between tasks merrily and eventually
are about to switch to that task above whose ->fpstate_active we
set. We enter __switch_to() and do switch_fpu_prepare(). Our task gets
->fpregs_active set, we find ourselves back on the call stack below and
especially in __fpu__restore_sig() which sets ->fpregs_active again.

Leading to that whoops below.

So let's enlarge the preemption-off region so that we set
->fpstate_active with preemption disabled and thus not trigger
fpu.preload:

  switch_fpu_prepare

  ...

fpu.preload = static_cpu_has(X86_FEATURE_FPU) &&
  new_fpu->fpstate_active &&
  ^^

prematurely.

  WARNING: CPU: 0 PID: 3031 at ./arch/x86/include/asm/fpu/internal.h:530 
fpu__restore+0x90/0x130()
  Modules linked in: ...
   CPU: 0 PID: 3031 Comm: bash Not tainted 4.5.0-rc3+ #1
   ...
  Call Trace:
dump_stack
warn_slowpath_common
? fpu__restore
? fpu__restore
warn_slowpath_null
fpu__restore
__fpu__restore_sig
fpu__restore_sig
restore_sigcontext
sys_sigreturn
do_syscall_32_irqs_on
entry_INT80_32

Suggested-by: Andy Lutomirski 
Signed-off-by: Borislav Petkov 
---
 arch/x86/kernel/fpu/signal.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c
index 31c6a60505e6..408e5a1c6fdd 100644
--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -316,12 +316,11 @@ static int __fpu__restore_sig(void __user *buf, void 
__user *buf_fx, int size)
sanitize_restored_xstate(tsk, , xfeatures, fx_only);
}
 
+   preempt_disable();
fpu->fpstate_active = 1;
-   if (use_eager_fpu()) {
-   preempt_disable();
+   if (use_eager_fpu())
fpu__restore(fpu);
-   preempt_enable();
-   }
+   preempt_enable();
 
return err;
} else {
-- 
2.3.5

-- 
Regards/Gruss,
Boris.

ECO tip #101: Trim your mails when you reply.


[PATCH 2/2 v4] irqchip/Layerscape: Add SCFG MSI controller support

2016-02-25 Thread Minghuan Lian
Some kind of NXP Layerscape SoC provides a MSI
implementation which uses two SCFG registers MSIIR and
MSIR to support 32 MSI interrupts for each PCIe controller.
The patch is to support it.

Signed-off-by: Minghuan Lian 
---
Change log
v4: 
1. do not register irq_enable irq_disable
2. shorten the chip name to "SCFG"
v3:
1. call of_node_to_fwnode()
v2:
1. rename ls1-msi to ls-scfg-msi
2. remove reg-names MSIIR MSIR 
3. remove calling set_irq_flags()

 drivers/irqchip/Kconfig   |   5 +
 drivers/irqchip/Makefile  |   1 +
 drivers/irqchip/irq-ls-scfg-msi.c | 242 ++
 3 files changed, 248 insertions(+)
 create mode 100644 drivers/irqchip/irq-ls-scfg-msi.c

diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index fb50911..0f2a3c3 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -218,3 +218,8 @@ config IRQ_MXS
def_bool y if MACH_ASM9260 || ARCH_MXS
select IRQ_DOMAIN
select STMP_DEVICE
+
+config LS_SCFG_MSI
+   def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
+   depends on PCI && PCI_MSI
+   select PCI_MSI_IRQ_DOMAIN
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 18caacb..37e12de 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -59,3 +59,4 @@ obj-$(CONFIG_ARCH_SA1100) += irq-sa11x0.o
 obj-$(CONFIG_INGENIC_IRQ)  += irq-ingenic.o
 obj-$(CONFIG_IMX_GPCV2)+= irq-imx-gpcv2.o
 obj-$(CONFIG_PIC32_EVIC)   += irq-pic32-evic.o
+obj-$(CONFIG_LS_SCFG_MSI)  += irq-ls-scfg-msi.o
diff --git a/drivers/irqchip/irq-ls-scfg-msi.c 
b/drivers/irqchip/irq-ls-scfg-msi.c
new file mode 100644
index 000..48df920
--- /dev/null
+++ b/drivers/irqchip/irq-ls-scfg-msi.c
@@ -0,0 +1,242 @@
+/*
+ * NXP SCFG MSI(-X) support
+ *
+ * Copyright (C) 2016 NXP Semiconductor.
+ *
+ * Author: Minghuan Lian 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define MSI_MAX_IRQS   32
+#define MSI_IBS_SHIFT  3
+#define MSIR   4
+
+struct ls_scfg_msi {
+   spinlock_t  lock;
+   struct platform_device  *pdev;
+   struct irq_domain   *parent;
+   struct irq_domain   *msi_domain;
+   void __iomem*regs;
+   phys_addr_t msiir_addr;
+   u32 nr_irqs;
+   int irq;
+   DECLARE_BITMAP(used, MSI_MAX_IRQS);
+};
+
+static struct irq_chip ls_scfg_msi_irq_chip = {
+   .name = "MSI",
+   .irq_mask   = pci_msi_mask_irq,
+   .irq_unmask = pci_msi_unmask_irq,
+};
+
+static struct msi_domain_info ls_scfg_msi_domain_info = {
+   .flags  = (MSI_FLAG_USE_DEF_DOM_OPS |
+  MSI_FLAG_USE_DEF_CHIP_OPS |
+  MSI_FLAG_PCI_MSIX),
+   .chip   = _scfg_msi_irq_chip,
+};
+
+static void ls_scfg_msi_compose_msg(struct irq_data *data, struct msi_msg *msg)
+{
+   struct ls_scfg_msi *msi_data = irq_data_get_irq_chip_data(data);
+
+   msg->address_hi = upper_32_bits(msi_data->msiir_addr);
+   msg->address_lo = lower_32_bits(msi_data->msiir_addr);
+   msg->data = data->hwirq << MSI_IBS_SHIFT;
+}
+
+static int ls_scfg_msi_set_affinity(struct irq_data *irq_data,
+   const struct cpumask *mask, bool force)
+{
+   return -EINVAL;
+}
+
+static struct irq_chip ls_scfg_msi_parent_chip = {
+   .name   = "SCFG",
+   .irq_compose_msi_msg= ls_scfg_msi_compose_msg,
+   .irq_set_affinity   = ls_scfg_msi_set_affinity,
+};
+
+static int ls_scfg_msi_domain_irq_alloc(struct irq_domain *domain,
+   unsigned int virq,
+   unsigned int nr_irqs,
+   void *args)
+{
+   struct ls_scfg_msi *msi_data = domain->host_data;
+   int pos, err = 0;
+
+   WARN_ON(nr_irqs != 1);
+
+   spin_lock(_data->lock);
+   pos = find_first_zero_bit(msi_data->used, msi_data->nr_irqs);
+   if (pos < msi_data->nr_irqs)
+   __set_bit(pos, msi_data->used);
+   else
+   err = -ENOSPC;
+   spin_unlock(_data->lock);
+
+   if (err)
+   return err;
+
+   irq_domain_set_info(domain, virq, pos,
+   _scfg_msi_parent_chip, msi_data,
+   handle_simple_irq, NULL, NULL);
+
+   return 0;
+}
+
+static void ls_scfg_msi_domain_irq_free(struct irq_domain *domain,
+  unsigned int virq, unsigned int nr_irqs)
+{
+   struct irq_data *d = irq_domain_get_irq_data(domain, virq);
+   struct 

[PATCH 2/2 v4] irqchip/Layerscape: Add SCFG MSI controller support

2016-02-25 Thread Minghuan Lian
Some kind of NXP Layerscape SoC provides a MSI
implementation which uses two SCFG registers MSIIR and
MSIR to support 32 MSI interrupts for each PCIe controller.
The patch is to support it.

Signed-off-by: Minghuan Lian 
---
Change log
v4: 
1. do not register irq_enable irq_disable
2. shorten the chip name to "SCFG"
v3:
1. call of_node_to_fwnode()
v2:
1. rename ls1-msi to ls-scfg-msi
2. remove reg-names MSIIR MSIR 
3. remove calling set_irq_flags()

 drivers/irqchip/Kconfig   |   5 +
 drivers/irqchip/Makefile  |   1 +
 drivers/irqchip/irq-ls-scfg-msi.c | 242 ++
 3 files changed, 248 insertions(+)
 create mode 100644 drivers/irqchip/irq-ls-scfg-msi.c

diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index fb50911..0f2a3c3 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -218,3 +218,8 @@ config IRQ_MXS
def_bool y if MACH_ASM9260 || ARCH_MXS
select IRQ_DOMAIN
select STMP_DEVICE
+
+config LS_SCFG_MSI
+   def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
+   depends on PCI && PCI_MSI
+   select PCI_MSI_IRQ_DOMAIN
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 18caacb..37e12de 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -59,3 +59,4 @@ obj-$(CONFIG_ARCH_SA1100) += irq-sa11x0.o
 obj-$(CONFIG_INGENIC_IRQ)  += irq-ingenic.o
 obj-$(CONFIG_IMX_GPCV2)+= irq-imx-gpcv2.o
 obj-$(CONFIG_PIC32_EVIC)   += irq-pic32-evic.o
+obj-$(CONFIG_LS_SCFG_MSI)  += irq-ls-scfg-msi.o
diff --git a/drivers/irqchip/irq-ls-scfg-msi.c 
b/drivers/irqchip/irq-ls-scfg-msi.c
new file mode 100644
index 000..48df920
--- /dev/null
+++ b/drivers/irqchip/irq-ls-scfg-msi.c
@@ -0,0 +1,242 @@
+/*
+ * NXP SCFG MSI(-X) support
+ *
+ * Copyright (C) 2016 NXP Semiconductor.
+ *
+ * Author: Minghuan Lian 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define MSI_MAX_IRQS   32
+#define MSI_IBS_SHIFT  3
+#define MSIR   4
+
+struct ls_scfg_msi {
+   spinlock_t  lock;
+   struct platform_device  *pdev;
+   struct irq_domain   *parent;
+   struct irq_domain   *msi_domain;
+   void __iomem*regs;
+   phys_addr_t msiir_addr;
+   u32 nr_irqs;
+   int irq;
+   DECLARE_BITMAP(used, MSI_MAX_IRQS);
+};
+
+static struct irq_chip ls_scfg_msi_irq_chip = {
+   .name = "MSI",
+   .irq_mask   = pci_msi_mask_irq,
+   .irq_unmask = pci_msi_unmask_irq,
+};
+
+static struct msi_domain_info ls_scfg_msi_domain_info = {
+   .flags  = (MSI_FLAG_USE_DEF_DOM_OPS |
+  MSI_FLAG_USE_DEF_CHIP_OPS |
+  MSI_FLAG_PCI_MSIX),
+   .chip   = _scfg_msi_irq_chip,
+};
+
+static void ls_scfg_msi_compose_msg(struct irq_data *data, struct msi_msg *msg)
+{
+   struct ls_scfg_msi *msi_data = irq_data_get_irq_chip_data(data);
+
+   msg->address_hi = upper_32_bits(msi_data->msiir_addr);
+   msg->address_lo = lower_32_bits(msi_data->msiir_addr);
+   msg->data = data->hwirq << MSI_IBS_SHIFT;
+}
+
+static int ls_scfg_msi_set_affinity(struct irq_data *irq_data,
+   const struct cpumask *mask, bool force)
+{
+   return -EINVAL;
+}
+
+static struct irq_chip ls_scfg_msi_parent_chip = {
+   .name   = "SCFG",
+   .irq_compose_msi_msg= ls_scfg_msi_compose_msg,
+   .irq_set_affinity   = ls_scfg_msi_set_affinity,
+};
+
+static int ls_scfg_msi_domain_irq_alloc(struct irq_domain *domain,
+   unsigned int virq,
+   unsigned int nr_irqs,
+   void *args)
+{
+   struct ls_scfg_msi *msi_data = domain->host_data;
+   int pos, err = 0;
+
+   WARN_ON(nr_irqs != 1);
+
+   spin_lock(_data->lock);
+   pos = find_first_zero_bit(msi_data->used, msi_data->nr_irqs);
+   if (pos < msi_data->nr_irqs)
+   __set_bit(pos, msi_data->used);
+   else
+   err = -ENOSPC;
+   spin_unlock(_data->lock);
+
+   if (err)
+   return err;
+
+   irq_domain_set_info(domain, virq, pos,
+   _scfg_msi_parent_chip, msi_data,
+   handle_simple_irq, NULL, NULL);
+
+   return 0;
+}
+
+static void ls_scfg_msi_domain_irq_free(struct irq_domain *domain,
+  unsigned int virq, unsigned int nr_irqs)
+{
+   struct irq_data *d = irq_domain_get_irq_data(domain, virq);
+   struct ls_scfg_msi *msi_data = 

Re: [PATCH 0/4] MSR: MSR: MSR Whitelist and Batch Introduction

2016-02-25 Thread Ingo Molnar

* Marty McFadden  wrote:

> 
> This patch addresses the following two problems:
>   1. The current msr module grants all-or-nothing access to MSRs,
>  thus making user-level runtime performance adjustments 
>  problematic, particularly for power-constrained HPC systems.
> 
>   2. The current msr module requires a separate system call and the
>  acquisition of the preemption lock for each individual MSR access. 
>  This overhead degrades performance of runtime tools that would
>  ideally sample multiple MSRs at high frequencies.

No, we really don't want to touch the old MSR code - it's a very opaque API 
with 
various deep limitations.

What I'd like to see instead is to use a modern system monitoring interface - 
and 
in fact that already happened in the last kernel release, we added the perf MSR 
access methods via:

 commit b7b7c7821d932ba18ef6c8eafc8536066b4c2ef4
 Author: Andy Lutomirski 
 Date:   Mon Jul 20 11:49:06 2015 -0400

perf/x86: Add an MSR PMU driver

This patch adds an MSR PMU to support free running MSR counters. Such
as time and freq related counters includes TSC, IA32_APERF, IA32_MPERF
and IA32_PPERF, but also SMI_COUNT.

The events are exposed in sysfs for use by perf stat and other tools.
The files are under /sys/devices/msr/events/

see arch/x86/cpu/perf/msr.c, or arch/x86/events/msr.c in the latest perf tree:

  git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git perf/core

For example with the perf ABIs 'batch access' of a group of MSRs is easy: a 
group 
of events can be read or sampled at once. It can be done in a system-wide, per 
task or per task hierarchy fashion, with cgroup management as well - it's a 
modern 
API.

Right now the MSR PMU code is only at its first version, with only these few 
MSRs 
exposed:

enum perf_msr_id {
PERF_MSR_TSC= 0,
PERF_MSR_APERF  = 1,
PERF_MSR_MPERF  = 2,
PERF_MSR_PPERF  = 3,
PERF_MSR_SMI= 4,

PERF_MSR_EVENT_MAX,
};

but that can (and should) be expanded and more features can be added.

Thanks,

Ingo


Re: [PATCH 0/4] MSR: MSR: MSR Whitelist and Batch Introduction

2016-02-25 Thread Ingo Molnar

* Marty McFadden  wrote:

> 
> This patch addresses the following two problems:
>   1. The current msr module grants all-or-nothing access to MSRs,
>  thus making user-level runtime performance adjustments 
>  problematic, particularly for power-constrained HPC systems.
> 
>   2. The current msr module requires a separate system call and the
>  acquisition of the preemption lock for each individual MSR access. 
>  This overhead degrades performance of runtime tools that would
>  ideally sample multiple MSRs at high frequencies.

No, we really don't want to touch the old MSR code - it's a very opaque API 
with 
various deep limitations.

What I'd like to see instead is to use a modern system monitoring interface - 
and 
in fact that already happened in the last kernel release, we added the perf MSR 
access methods via:

 commit b7b7c7821d932ba18ef6c8eafc8536066b4c2ef4
 Author: Andy Lutomirski 
 Date:   Mon Jul 20 11:49:06 2015 -0400

perf/x86: Add an MSR PMU driver

This patch adds an MSR PMU to support free running MSR counters. Such
as time and freq related counters includes TSC, IA32_APERF, IA32_MPERF
and IA32_PPERF, but also SMI_COUNT.

The events are exposed in sysfs for use by perf stat and other tools.
The files are under /sys/devices/msr/events/

see arch/x86/cpu/perf/msr.c, or arch/x86/events/msr.c in the latest perf tree:

  git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git perf/core

For example with the perf ABIs 'batch access' of a group of MSRs is easy: a 
group 
of events can be read or sampled at once. It can be done in a system-wide, per 
task or per task hierarchy fashion, with cgroup management as well - it's a 
modern 
API.

Right now the MSR PMU code is only at its first version, with only these few 
MSRs 
exposed:

enum perf_msr_id {
PERF_MSR_TSC= 0,
PERF_MSR_APERF  = 1,
PERF_MSR_MPERF  = 2,
PERF_MSR_PPERF  = 3,
PERF_MSR_SMI= 4,

PERF_MSR_EVENT_MAX,
};

but that can (and should) be expanded and more features can be added.

Thanks,

Ingo


Re: [RESPIN 2/6] drivers: memory: Add support for exynos SROM driver

2016-02-25 Thread Krzysztof Kozlowski
On 26.02.2016 16:25, Krzysztof Kozlowski wrote:
> On 25.02.2016 17:33, Pankaj Dubey wrote:
>> This patch adds Exynos SROM controller driver which will handle
>> save restore of SROM registers during S2R.
>>
>> Signed-off-by: Pankaj Dubey 
>> Reviewed-by: Krzysztof Kozlowski 
>> [p.fe...@samsung.com: tested on SMDK5410]
>> Tested-by: Pavel Fedin 
>> Signed-off-by: Kukjin Kim 
>> Signed-off-by: Krzysztof Kozlowski 
>> ---
>>  drivers/memory/Kconfig   |   1 +
>>  drivers/memory/Makefile  |   1 +
>>  drivers/memory/samsung/Kconfig   |  12 +++
>>  drivers/memory/samsung/Makefile  |   1 +
>>  drivers/memory/samsung/exynos-srom.c | 175 
>> +++
>>  drivers/memory/samsung/exynos-srom.h |  51 ++
>>  6 files changed, 241 insertions(+)
>>  create mode 100644 drivers/memory/samsung/Kconfig
>>  create mode 100644 drivers/memory/samsung/Makefile
>>  create mode 100644 drivers/memory/samsung/exynos-srom.c
>>  create mode 100644 drivers/memory/samsung/exynos-srom.h
>>
>> diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
>> index 6f31546..bcb1982 100644
>> --- a/drivers/memory/Kconfig
>> +++ b/drivers/memory/Kconfig
>> @@ -114,6 +114,7 @@ config JZ4780_NEMC
>>the Ingenic JZ4780. This controller is used to handle external
>>memory devices such as NAND and SRAM.
>>  
>> +source "drivers/memory/samsung/Kconfig"
>>  source "drivers/memory/tegra/Kconfig"
>>  
>>  endif
>> diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
>> index 1c46af5..d100e40 100644
>> --- a/drivers/memory/Makefile
>> +++ b/drivers/memory/Makefile
>> @@ -16,4 +16,5 @@ obj-$(CONFIG_MVEBU_DEVBUS) += mvebu-devbus.o
>>  obj-$(CONFIG_TEGRA20_MC)+= tegra20-mc.o
>>  obj-$(CONFIG_JZ4780_NEMC)   += jz4780-nemc.o
>>  
>> +obj-$(CONFIG_SAMSUNG_MC)+= samsung/
>>  obj-$(CONFIG_TEGRA_MC)  += tegra/
>> diff --git a/drivers/memory/samsung/Kconfig b/drivers/memory/samsung/Kconfig
>> new file mode 100644
>> index 000..c2cd45e
>> --- /dev/null
>> +++ b/drivers/memory/samsung/Kconfig
>> @@ -0,0 +1,12 @@
>> +config SAMSUNG_MC
>> +bool "SAMSUNG Exynos Memory Controller support" if COMPILE_TEST
>> +default y
>> +depends on ARCH_EXYNOS

These two are not needed and they introduce issues (when COMPILE_TEST it
should not depend on exynos and should not be in such case enabled by
default).

>> +help
>> +  This driver supports the Memory Controller (MC) hardwares found on
>> +  SAMSUNG Exynos SoCs.
>> +
> 
> if SAMSUNG_MC
> 
>> +config EXYNOS_SROM
>> +bool

bool should be described with COMPILE_TEST

>> +depends on (ARM && ARCH_EXYNOS && PM) || ((ARM || ARM64) && 
>> COMPILE_TEST)
> 
> (ARM && ARCH_EXYNOS && PM) || COMPILE_TEST
> 
> You don't need to limit compile testing to ARM/ARM64.
> 

So overall it should be like:

config SAMSUNG_MC
bool "Samsung Exynos Memory Controller support" if COMPILE_TEST
help
  Support for the Memory Controller (MC) devices found on
  Samsung Exynos SoCs.

if SAMSUNG_MC

config EXYNOS_SROM
bool "Exynos SROM controller driver" if COMPILE_TEST
depends on (ARM && ARCH_EXYNOS && PM) || COMPILE_TEST

endif



Re: [RESPIN 2/6] drivers: memory: Add support for exynos SROM driver

2016-02-25 Thread Krzysztof Kozlowski
On 26.02.2016 16:25, Krzysztof Kozlowski wrote:
> On 25.02.2016 17:33, Pankaj Dubey wrote:
>> This patch adds Exynos SROM controller driver which will handle
>> save restore of SROM registers during S2R.
>>
>> Signed-off-by: Pankaj Dubey 
>> Reviewed-by: Krzysztof Kozlowski 
>> [p.fe...@samsung.com: tested on SMDK5410]
>> Tested-by: Pavel Fedin 
>> Signed-off-by: Kukjin Kim 
>> Signed-off-by: Krzysztof Kozlowski 
>> ---
>>  drivers/memory/Kconfig   |   1 +
>>  drivers/memory/Makefile  |   1 +
>>  drivers/memory/samsung/Kconfig   |  12 +++
>>  drivers/memory/samsung/Makefile  |   1 +
>>  drivers/memory/samsung/exynos-srom.c | 175 
>> +++
>>  drivers/memory/samsung/exynos-srom.h |  51 ++
>>  6 files changed, 241 insertions(+)
>>  create mode 100644 drivers/memory/samsung/Kconfig
>>  create mode 100644 drivers/memory/samsung/Makefile
>>  create mode 100644 drivers/memory/samsung/exynos-srom.c
>>  create mode 100644 drivers/memory/samsung/exynos-srom.h
>>
>> diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
>> index 6f31546..bcb1982 100644
>> --- a/drivers/memory/Kconfig
>> +++ b/drivers/memory/Kconfig
>> @@ -114,6 +114,7 @@ config JZ4780_NEMC
>>the Ingenic JZ4780. This controller is used to handle external
>>memory devices such as NAND and SRAM.
>>  
>> +source "drivers/memory/samsung/Kconfig"
>>  source "drivers/memory/tegra/Kconfig"
>>  
>>  endif
>> diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
>> index 1c46af5..d100e40 100644
>> --- a/drivers/memory/Makefile
>> +++ b/drivers/memory/Makefile
>> @@ -16,4 +16,5 @@ obj-$(CONFIG_MVEBU_DEVBUS) += mvebu-devbus.o
>>  obj-$(CONFIG_TEGRA20_MC)+= tegra20-mc.o
>>  obj-$(CONFIG_JZ4780_NEMC)   += jz4780-nemc.o
>>  
>> +obj-$(CONFIG_SAMSUNG_MC)+= samsung/
>>  obj-$(CONFIG_TEGRA_MC)  += tegra/
>> diff --git a/drivers/memory/samsung/Kconfig b/drivers/memory/samsung/Kconfig
>> new file mode 100644
>> index 000..c2cd45e
>> --- /dev/null
>> +++ b/drivers/memory/samsung/Kconfig
>> @@ -0,0 +1,12 @@
>> +config SAMSUNG_MC
>> +bool "SAMSUNG Exynos Memory Controller support" if COMPILE_TEST
>> +default y
>> +depends on ARCH_EXYNOS

These two are not needed and they introduce issues (when COMPILE_TEST it
should not depend on exynos and should not be in such case enabled by
default).

>> +help
>> +  This driver supports the Memory Controller (MC) hardwares found on
>> +  SAMSUNG Exynos SoCs.
>> +
> 
> if SAMSUNG_MC
> 
>> +config EXYNOS_SROM
>> +bool

bool should be described with COMPILE_TEST

>> +depends on (ARM && ARCH_EXYNOS && PM) || ((ARM || ARM64) && 
>> COMPILE_TEST)
> 
> (ARM && ARCH_EXYNOS && PM) || COMPILE_TEST
> 
> You don't need to limit compile testing to ARM/ARM64.
> 

So overall it should be like:

config SAMSUNG_MC
bool "Samsung Exynos Memory Controller support" if COMPILE_TEST
help
  Support for the Memory Controller (MC) devices found on
  Samsung Exynos SoCs.

if SAMSUNG_MC

config EXYNOS_SROM
bool "Exynos SROM controller driver" if COMPILE_TEST
depends on (ARM && ARCH_EXYNOS && PM) || COMPILE_TEST

endif



[PATCH v7] x86/setup: get ramdisk parameters only once

2016-02-25 Thread Alexander Kuleshov
The check and definitions related to ramdisk are similar in the
early_reserve_initrd() and reserve_initrd() functions.

This patch introduces struct ramdisk which contains information
about initrd. This structure will be filled in the setup_arch()
and passed to the reserve_initrd() and relocate_initrd() functions.

This allows us to not get/check ramdisk parameters from the bootparams
every time in the early_reserve_initrd(), reserve_initrd() and
relocate_initrd() function.

Signed-off-by: Alexander Kuleshov 
---
Tested as with virtual machine as with real hardware.

Changelog:

v7:

  * ramdisk_image renamed to ramdisk in the setup_arch().

v6:

  * ramdisk_image renamed to ramdisk
  * early check of initrd and memory reservation for it is
  moved to the early_reserve_initrd() again.

v5:

  * move check of the reserve_ramdisk to the reserve_initrd()
  * align ramdisk size in setup_arch() as it maybe not page
  aligned and start_addr + size() will be different with end_addr
  in this case
  * style fixes

v4:

  * bool reserve_ramdisk moved to the struct ramdisk;
  * fields of struct ramdisk are renamed to more understandable
  names
  * early_reserve_initrd() removed as it contains only one call
  of memblock_resere. It was moved to the setup_arch
  * stubs added for get_ramdisk_image() and get_ramdisk_size()
  to prevent compilation error if CONFIG_BLK_DEV_INITRD=n
  * initialization of ramdisk->end_addr is moved from in-place
  initialization to prevent ‘ramdisk_image.size’ is used uninitialized
  in this function warning.

v3: introduced ramdisk setup which is filled in th
setup_arch() and passed to the early_reserve_initrd()
and reserve_initrd().

v2: parameter of reserve_initrd() - int -> bool.
commit message updated.

 arch/x86/kernel/setup.c | 109 ++--
 1 file changed, 60 insertions(+), 49 deletions(-)

diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index d3d80e6..449b4da 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -169,6 +169,15 @@ static struct resource bss_resource = {
.flags  = IORESOURCE_BUSY | IORESOURCE_MEM
 };
 
+/*
+ * ramdisk setup
+ */
+struct ramdisk {
+   u64 start_addr; /* ramdisk load address */
+   u64 end_addr;   /* ramdisk end address */
+   u64 size;   /* ramdisk size */
+   bool reserve_ramdisk;   /* do initrd provided by bootloader */
+};
 
 #ifdef CONFIG_X86_32
 /* cpu data as detected by the assembly code in head.S */
@@ -318,90 +327,84 @@ static u64 __init get_ramdisk_size(void)
return ramdisk_size;
 }
 
-static void __init relocate_initrd(void)
+static void __init relocate_initrd(struct ramdisk *ramdisk)
 {
-   /* Assume only end is not page aligned */
-   u64 ramdisk_image = get_ramdisk_image();
-   u64 ramdisk_size  = get_ramdisk_size();
-   u64 area_size = PAGE_ALIGN(ramdisk_size);
-
/* We need to move the initrd down into directly mapped mem */
relocated_ramdisk = memblock_find_in_range(0, PFN_PHYS(max_pfn_mapped),
-  area_size, PAGE_SIZE);
+  ramdisk->size, PAGE_SIZE);
 
if (!relocated_ramdisk)
panic("Cannot find place for new RAMDISK of size %lld\n",
- ramdisk_size);
+ ramdisk->size);
 
/* Note: this includes all the mem currently occupied by
   the initrd, we rely on that fact to keep the data intact. */
-   memblock_reserve(relocated_ramdisk, area_size);
+   memblock_reserve(relocated_ramdisk, ramdisk->size);
initrd_start = relocated_ramdisk + PAGE_OFFSET;
-   initrd_end   = initrd_start + ramdisk_size;
+   initrd_end   = initrd_start + ramdisk->size;
printk(KERN_INFO "Allocated new RAMDISK: [mem %#010llx-%#010llx]\n",
-  relocated_ramdisk, relocated_ramdisk + ramdisk_size - 1);
+  relocated_ramdisk, relocated_ramdisk + ramdisk->size - 1);
 
-   copy_from_early_mem((void *)initrd_start, ramdisk_image, ramdisk_size);
+   copy_from_early_mem((void *)initrd_start, ramdisk->start_addr, 
ramdisk->size);
 
printk(KERN_INFO "Move RAMDISK from [mem %#010llx-%#010llx] to"
" [mem %#010llx-%#010llx]\n",
-   ramdisk_image, ramdisk_image + ramdisk_size - 1,
-   relocated_ramdisk, relocated_ramdisk + ramdisk_size - 1);
+   ramdisk->start_addr, ramdisk->start_addr + ramdisk->size - 1,
+   relocated_ramdisk, relocated_ramdisk + ramdisk->size - 1);
 }
-
-static void __init early_reserve_initrd(void)
+static void __init early_reserve_initrd(struct ramdisk *ramdisk)
 {
-   /* Assume only end is not page aligned */
-   u64 ramdisk_image = get_ramdisk_image();
-   u64 ramdisk_size  = get_ramdisk_size();
-   u64 ramdisk_end   = PAGE_ALIGN(ramdisk_image + 

[PATCH v7] x86/setup: get ramdisk parameters only once

2016-02-25 Thread Alexander Kuleshov
The check and definitions related to ramdisk are similar in the
early_reserve_initrd() and reserve_initrd() functions.

This patch introduces struct ramdisk which contains information
about initrd. This structure will be filled in the setup_arch()
and passed to the reserve_initrd() and relocate_initrd() functions.

This allows us to not get/check ramdisk parameters from the bootparams
every time in the early_reserve_initrd(), reserve_initrd() and
relocate_initrd() function.

Signed-off-by: Alexander Kuleshov 
---
Tested as with virtual machine as with real hardware.

Changelog:

v7:

  * ramdisk_image renamed to ramdisk in the setup_arch().

v6:

  * ramdisk_image renamed to ramdisk
  * early check of initrd and memory reservation for it is
  moved to the early_reserve_initrd() again.

v5:

  * move check of the reserve_ramdisk to the reserve_initrd()
  * align ramdisk size in setup_arch() as it maybe not page
  aligned and start_addr + size() will be different with end_addr
  in this case
  * style fixes

v4:

  * bool reserve_ramdisk moved to the struct ramdisk;
  * fields of struct ramdisk are renamed to more understandable
  names
  * early_reserve_initrd() removed as it contains only one call
  of memblock_resere. It was moved to the setup_arch
  * stubs added for get_ramdisk_image() and get_ramdisk_size()
  to prevent compilation error if CONFIG_BLK_DEV_INITRD=n
  * initialization of ramdisk->end_addr is moved from in-place
  initialization to prevent ‘ramdisk_image.size’ is used uninitialized
  in this function warning.

v3: introduced ramdisk setup which is filled in th
setup_arch() and passed to the early_reserve_initrd()
and reserve_initrd().

v2: parameter of reserve_initrd() - int -> bool.
commit message updated.

 arch/x86/kernel/setup.c | 109 ++--
 1 file changed, 60 insertions(+), 49 deletions(-)

diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index d3d80e6..449b4da 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -169,6 +169,15 @@ static struct resource bss_resource = {
.flags  = IORESOURCE_BUSY | IORESOURCE_MEM
 };
 
+/*
+ * ramdisk setup
+ */
+struct ramdisk {
+   u64 start_addr; /* ramdisk load address */
+   u64 end_addr;   /* ramdisk end address */
+   u64 size;   /* ramdisk size */
+   bool reserve_ramdisk;   /* do initrd provided by bootloader */
+};
 
 #ifdef CONFIG_X86_32
 /* cpu data as detected by the assembly code in head.S */
@@ -318,90 +327,84 @@ static u64 __init get_ramdisk_size(void)
return ramdisk_size;
 }
 
-static void __init relocate_initrd(void)
+static void __init relocate_initrd(struct ramdisk *ramdisk)
 {
-   /* Assume only end is not page aligned */
-   u64 ramdisk_image = get_ramdisk_image();
-   u64 ramdisk_size  = get_ramdisk_size();
-   u64 area_size = PAGE_ALIGN(ramdisk_size);
-
/* We need to move the initrd down into directly mapped mem */
relocated_ramdisk = memblock_find_in_range(0, PFN_PHYS(max_pfn_mapped),
-  area_size, PAGE_SIZE);
+  ramdisk->size, PAGE_SIZE);
 
if (!relocated_ramdisk)
panic("Cannot find place for new RAMDISK of size %lld\n",
- ramdisk_size);
+ ramdisk->size);
 
/* Note: this includes all the mem currently occupied by
   the initrd, we rely on that fact to keep the data intact. */
-   memblock_reserve(relocated_ramdisk, area_size);
+   memblock_reserve(relocated_ramdisk, ramdisk->size);
initrd_start = relocated_ramdisk + PAGE_OFFSET;
-   initrd_end   = initrd_start + ramdisk_size;
+   initrd_end   = initrd_start + ramdisk->size;
printk(KERN_INFO "Allocated new RAMDISK: [mem %#010llx-%#010llx]\n",
-  relocated_ramdisk, relocated_ramdisk + ramdisk_size - 1);
+  relocated_ramdisk, relocated_ramdisk + ramdisk->size - 1);
 
-   copy_from_early_mem((void *)initrd_start, ramdisk_image, ramdisk_size);
+   copy_from_early_mem((void *)initrd_start, ramdisk->start_addr, 
ramdisk->size);
 
printk(KERN_INFO "Move RAMDISK from [mem %#010llx-%#010llx] to"
" [mem %#010llx-%#010llx]\n",
-   ramdisk_image, ramdisk_image + ramdisk_size - 1,
-   relocated_ramdisk, relocated_ramdisk + ramdisk_size - 1);
+   ramdisk->start_addr, ramdisk->start_addr + ramdisk->size - 1,
+   relocated_ramdisk, relocated_ramdisk + ramdisk->size - 1);
 }
-
-static void __init early_reserve_initrd(void)
+static void __init early_reserve_initrd(struct ramdisk *ramdisk)
 {
-   /* Assume only end is not page aligned */
-   u64 ramdisk_image = get_ramdisk_image();
-   u64 ramdisk_size  = get_ramdisk_size();
-   u64 ramdisk_end   = PAGE_ALIGN(ramdisk_image + ramdisk_size);
-
-   if 

Re: [RESPIN 4/6] ARM: EXYNOS: Remove SROM related register settings from mach-exynos

2016-02-25 Thread Krzysztof Kozlowski
On 25.02.2016 17:33, Pankaj Dubey wrote:
> As now we have dedicated driver for SROM controller, it will take care
> of saving register banks during S2R so we can safely remove these
> settings from mach-exynos.
> 
> Signed-off-by: Pankaj Dubey 
> Reviewed-by: Krzysztof Kozlowski 
> Signed-off-by: Kukjin Kim 
> Signed-off-by: Krzysztof Kozlowski 
> ---
>  arch/arm/mach-exynos/Kconfig |  2 ++
>  arch/arm/mach-exynos/exynos.c| 17 -
>  arch/arm/mach-exynos/include/mach/map.h  |  3 --
>  arch/arm/mach-exynos/regs-srom.h | 53 
> 
>  arch/arm/mach-exynos/suspend.c   | 20 ++-
>  arch/arm/plat-samsung/include/plat/map-s5p.h |  1 -
>  6 files changed, 4 insertions(+), 92 deletions(-)
>  delete mode 100644 arch/arm/mach-exynos/regs-srom.h
> 
> diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> index c4989c2..8da01d1 100644
> --- a/arch/arm/mach-exynos/Kconfig
> +++ b/arch/arm/mach-exynos/Kconfig
> @@ -18,6 +18,7 @@ menuconfig ARCH_EXYNOS
>   select COMMON_CLK_SAMSUNG
>   select EXYNOS_THERMAL
>   select EXYNOS_PMU
> + select EXYNOS_SROM if PM
>   select HAVE_ARM_SCU if SMP
>   select HAVE_S3C2410_I2C if I2C
>   select HAVE_S3C2410_WATCHDOG if WATCHDOG
> @@ -30,6 +31,7 @@ menuconfig ARCH_EXYNOS
>   select SRAM
>   select THERMAL
>   select MFD_SYSCON
> + select MEMORY

select SAMSUNG_MC because otherwise the directory won't be build
(memory/Kconfig).

Rest looks good. No need to respin (I can fix this when applying),
unless other people will have some comments.

BR,
Krzysztof



Re: [RESPIN 4/6] ARM: EXYNOS: Remove SROM related register settings from mach-exynos

2016-02-25 Thread Krzysztof Kozlowski
On 25.02.2016 17:33, Pankaj Dubey wrote:
> As now we have dedicated driver for SROM controller, it will take care
> of saving register banks during S2R so we can safely remove these
> settings from mach-exynos.
> 
> Signed-off-by: Pankaj Dubey 
> Reviewed-by: Krzysztof Kozlowski 
> Signed-off-by: Kukjin Kim 
> Signed-off-by: Krzysztof Kozlowski 
> ---
>  arch/arm/mach-exynos/Kconfig |  2 ++
>  arch/arm/mach-exynos/exynos.c| 17 -
>  arch/arm/mach-exynos/include/mach/map.h  |  3 --
>  arch/arm/mach-exynos/regs-srom.h | 53 
> 
>  arch/arm/mach-exynos/suspend.c   | 20 ++-
>  arch/arm/plat-samsung/include/plat/map-s5p.h |  1 -
>  6 files changed, 4 insertions(+), 92 deletions(-)
>  delete mode 100644 arch/arm/mach-exynos/regs-srom.h
> 
> diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> index c4989c2..8da01d1 100644
> --- a/arch/arm/mach-exynos/Kconfig
> +++ b/arch/arm/mach-exynos/Kconfig
> @@ -18,6 +18,7 @@ menuconfig ARCH_EXYNOS
>   select COMMON_CLK_SAMSUNG
>   select EXYNOS_THERMAL
>   select EXYNOS_PMU
> + select EXYNOS_SROM if PM
>   select HAVE_ARM_SCU if SMP
>   select HAVE_S3C2410_I2C if I2C
>   select HAVE_S3C2410_WATCHDOG if WATCHDOG
> @@ -30,6 +31,7 @@ menuconfig ARCH_EXYNOS
>   select SRAM
>   select THERMAL
>   select MFD_SYSCON
> + select MEMORY

select SAMSUNG_MC because otherwise the directory won't be build
(memory/Kconfig).

Rest looks good. No need to respin (I can fix this when applying),
unless other people will have some comments.

BR,
Krzysztof



Re: [RESPIN 2/6] drivers: memory: Add support for exynos SROM driver

2016-02-25 Thread Krzysztof Kozlowski
On 25.02.2016 17:33, Pankaj Dubey wrote:
> This patch adds Exynos SROM controller driver which will handle
> save restore of SROM registers during S2R.
> 
> Signed-off-by: Pankaj Dubey 
> Reviewed-by: Krzysztof Kozlowski 
> [p.fe...@samsung.com: tested on SMDK5410]
> Tested-by: Pavel Fedin 
> Signed-off-by: Kukjin Kim 
> Signed-off-by: Krzysztof Kozlowski 
> ---
>  drivers/memory/Kconfig   |   1 +
>  drivers/memory/Makefile  |   1 +
>  drivers/memory/samsung/Kconfig   |  12 +++
>  drivers/memory/samsung/Makefile  |   1 +
>  drivers/memory/samsung/exynos-srom.c | 175 
> +++
>  drivers/memory/samsung/exynos-srom.h |  51 ++
>  6 files changed, 241 insertions(+)
>  create mode 100644 drivers/memory/samsung/Kconfig
>  create mode 100644 drivers/memory/samsung/Makefile
>  create mode 100644 drivers/memory/samsung/exynos-srom.c
>  create mode 100644 drivers/memory/samsung/exynos-srom.h
> 
> diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
> index 6f31546..bcb1982 100644
> --- a/drivers/memory/Kconfig
> +++ b/drivers/memory/Kconfig
> @@ -114,6 +114,7 @@ config JZ4780_NEMC
> the Ingenic JZ4780. This controller is used to handle external
> memory devices such as NAND and SRAM.
>  
> +source "drivers/memory/samsung/Kconfig"
>  source "drivers/memory/tegra/Kconfig"
>  
>  endif
> diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
> index 1c46af5..d100e40 100644
> --- a/drivers/memory/Makefile
> +++ b/drivers/memory/Makefile
> @@ -16,4 +16,5 @@ obj-$(CONFIG_MVEBU_DEVBUS)  += mvebu-devbus.o
>  obj-$(CONFIG_TEGRA20_MC) += tegra20-mc.o
>  obj-$(CONFIG_JZ4780_NEMC)+= jz4780-nemc.o
>  
> +obj-$(CONFIG_SAMSUNG_MC) += samsung/
>  obj-$(CONFIG_TEGRA_MC)   += tegra/
> diff --git a/drivers/memory/samsung/Kconfig b/drivers/memory/samsung/Kconfig
> new file mode 100644
> index 000..c2cd45e
> --- /dev/null
> +++ b/drivers/memory/samsung/Kconfig
> @@ -0,0 +1,12 @@
> +config SAMSUNG_MC
> + bool "SAMSUNG Exynos Memory Controller support" if COMPILE_TEST
> + default y
> + depends on ARCH_EXYNOS
> + help
> +   This driver supports the Memory Controller (MC) hardwares found on
> +   SAMSUNG Exynos SoCs.
> +

if SAMSUNG_MC

> +config EXYNOS_SROM
> + bool
> + depends on (ARM && ARCH_EXYNOS && PM) || ((ARM || ARM64) && 
> COMPILE_TEST)

(ARM && ARCH_EXYNOS && PM) || COMPILE_TEST

You don't need to limit compile testing to ARM/ARM64.

Rest is good.

If there are no comments from other people, then I can fix this while
applying. If there will be a comment or re-spin, then please apply my
comments.

Best regards,
Krzysztof




Re: [RESPIN 2/6] drivers: memory: Add support for exynos SROM driver

2016-02-25 Thread Krzysztof Kozlowski
On 25.02.2016 17:33, Pankaj Dubey wrote:
> This patch adds Exynos SROM controller driver which will handle
> save restore of SROM registers during S2R.
> 
> Signed-off-by: Pankaj Dubey 
> Reviewed-by: Krzysztof Kozlowski 
> [p.fe...@samsung.com: tested on SMDK5410]
> Tested-by: Pavel Fedin 
> Signed-off-by: Kukjin Kim 
> Signed-off-by: Krzysztof Kozlowski 
> ---
>  drivers/memory/Kconfig   |   1 +
>  drivers/memory/Makefile  |   1 +
>  drivers/memory/samsung/Kconfig   |  12 +++
>  drivers/memory/samsung/Makefile  |   1 +
>  drivers/memory/samsung/exynos-srom.c | 175 
> +++
>  drivers/memory/samsung/exynos-srom.h |  51 ++
>  6 files changed, 241 insertions(+)
>  create mode 100644 drivers/memory/samsung/Kconfig
>  create mode 100644 drivers/memory/samsung/Makefile
>  create mode 100644 drivers/memory/samsung/exynos-srom.c
>  create mode 100644 drivers/memory/samsung/exynos-srom.h
> 
> diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
> index 6f31546..bcb1982 100644
> --- a/drivers/memory/Kconfig
> +++ b/drivers/memory/Kconfig
> @@ -114,6 +114,7 @@ config JZ4780_NEMC
> the Ingenic JZ4780. This controller is used to handle external
> memory devices such as NAND and SRAM.
>  
> +source "drivers/memory/samsung/Kconfig"
>  source "drivers/memory/tegra/Kconfig"
>  
>  endif
> diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
> index 1c46af5..d100e40 100644
> --- a/drivers/memory/Makefile
> +++ b/drivers/memory/Makefile
> @@ -16,4 +16,5 @@ obj-$(CONFIG_MVEBU_DEVBUS)  += mvebu-devbus.o
>  obj-$(CONFIG_TEGRA20_MC) += tegra20-mc.o
>  obj-$(CONFIG_JZ4780_NEMC)+= jz4780-nemc.o
>  
> +obj-$(CONFIG_SAMSUNG_MC) += samsung/
>  obj-$(CONFIG_TEGRA_MC)   += tegra/
> diff --git a/drivers/memory/samsung/Kconfig b/drivers/memory/samsung/Kconfig
> new file mode 100644
> index 000..c2cd45e
> --- /dev/null
> +++ b/drivers/memory/samsung/Kconfig
> @@ -0,0 +1,12 @@
> +config SAMSUNG_MC
> + bool "SAMSUNG Exynos Memory Controller support" if COMPILE_TEST
> + default y
> + depends on ARCH_EXYNOS
> + help
> +   This driver supports the Memory Controller (MC) hardwares found on
> +   SAMSUNG Exynos SoCs.
> +

if SAMSUNG_MC

> +config EXYNOS_SROM
> + bool
> + depends on (ARM && ARCH_EXYNOS && PM) || ((ARM || ARM64) && 
> COMPILE_TEST)

(ARM && ARCH_EXYNOS && PM) || COMPILE_TEST

You don't need to limit compile testing to ARM/ARM64.

Rest is good.

If there are no comments from other people, then I can fix this while
applying. If there will be a comment or re-spin, then please apply my
comments.

Best regards,
Krzysztof




Re: [PATCH] uapi glibc compat: fix cases where glibc net/if.h is included before linux/if.h

2016-02-25 Thread Mikko Rapeli
(Adding libc-alpha list, review of https://lkml.org/lkml/2016/2/7/89 )

On Wed, Feb 17, 2016 at 10:46:20AM -0500, David Miller wrote:
> From: Mikko Rapeli 
> Date: Sun,  7 Feb 2016 16:03:21 +0200
> 
> > @@ -68,6 +72,8 @@
> >   * @IFF_ECHO: echo sent packets. Volatile.
> >   */
> >  enum net_device_flags {
> > +/* for compatibility with glibc net/if.h */
> > +#if __UAPI_DEF_IF_NET_DEVICE_FLAGS
> > IFF_UP  = 1<<0,  /* sysfs */
> > IFF_BROADCAST   = 1<<1,  /* volatile */
> > IFF_DEBUG   = 1<<2,  /* sysfs */
> > @@ -84,11 +90,14 @@ enum net_device_flags {
> > IFF_PORTSEL = 1<<13, /* sysfs */
> > IFF_AUTOMEDIA   = 1<<14, /* sysfs */
> > IFF_DYNAMIC = 1<<15, /* sysfs */
> > +#endif /* __UAPI_DEF_IF_NET_DEVICE_FLAGS */
> > IFF_LOWER_UP= 1<<16, /* volatile */
> > IFF_DORMANT = 1<<17, /* volatile */
> > IFF_ECHO= 1<<18, /* volatile */
> >  };
> 
> This is going to get messy is IFF_LOWER_UP, IFF_DORMANT, and IFF_ECHO
> get added the the glibc header.  Why not just handle it now with
> another __UAPI_DEF_FOO guard so that the additions to net/if.h can
> deal with this case too.

Do you mean that the enum should be protected with a single guard or
should I have one guard for current conflicts and one for the future
if glibc headers include IFF_LOWER_UP and others?

-Mikko


Re: [PATCH] mmc: sdhci-tegra: Set DMA mask

2016-02-25 Thread Alexandre Courbot
On Thu, Feb 25, 2016 at 11:52 PM, Arnd Bergmann  wrote:
>> Actually even if we specify a dma-ranges on the parent DT node, the
>> DMA range will still be limited to 32 bits because of the following
>> code in of_dma_configure():
>>
>> /*
>>  * Set default coherent_dma_mask to 32 bit.  Drivers are expected to
>>  * setup the correct supported mask.
>>  */
>> if (!dev->coherent_dma_mask)
>> dev->coherent_dma_mask = DMA_BIT_MASK(32);
>>
>> /*
>>  * Set it to coherent_dma_mask by default if the architecture
>>  * code has not set it.
>>  */
>> if (!dev->dma_mask)
>> dev->dma_mask = >coherent_dma_mask;
>>
>> 
>> /* gets dma-ranges into dma_addr and size */
>> 
>>
>>
>> *dev->dma_mask = min((*dev->dma_mask),
>>  DMA_BIT_MASK(ilog2(dma_addr + size)));
>>
>> So unless the DMA mask is set on the device before of_dma_configure()
>> is called, the min() statement will choose the 32 bits mask that has
>> been previously set. So IIUC in any case, the driver will need to call
>> dma_set_mask()
>
> Yes, the driver definitely has to call dma_set_mask(), the property of
> the parent bus is used to make that fail when the bus doesn't support
> it.

And that's where things seem to stop working: the driver's probe
function is invoked by the platform bus, *after* of_dma_configure() is
called. So unless I am missing something there is no way for the
driver to set the DMA mask in such a way that of_dma_configure() can
see it and do the right thing.

In other words, most of the DMA mask logic in of_dma_configure()
doesn't seem to have any effect (and a 32 bits mask will be set), at
least on the platform bus.

>> Can I have your thoughts on this? Am I missing something?
>
> One point: I think the dma_set_mask() probably should be in the
> generic part of the sdhci driver, not the tegra specific portion.

Ok, but then how does the generic part of the driver knows which DMA
mask applies to the device?

> I also forget how this really needs to interact with swiotlb. I know
> we have discussed this a couple of times, but the result currently
> is lost to me.
> Maybe the answer was that if swiotlb or iommu are enabled, then
> dma_set_mask() should always succeed, but the mask should not actually
> be updated?


Re: [PATCH] uapi glibc compat: fix cases where glibc net/if.h is included before linux/if.h

2016-02-25 Thread Mikko Rapeli
(Adding libc-alpha list, review of https://lkml.org/lkml/2016/2/7/89 )

On Wed, Feb 17, 2016 at 10:46:20AM -0500, David Miller wrote:
> From: Mikko Rapeli 
> Date: Sun,  7 Feb 2016 16:03:21 +0200
> 
> > @@ -68,6 +72,8 @@
> >   * @IFF_ECHO: echo sent packets. Volatile.
> >   */
> >  enum net_device_flags {
> > +/* for compatibility with glibc net/if.h */
> > +#if __UAPI_DEF_IF_NET_DEVICE_FLAGS
> > IFF_UP  = 1<<0,  /* sysfs */
> > IFF_BROADCAST   = 1<<1,  /* volatile */
> > IFF_DEBUG   = 1<<2,  /* sysfs */
> > @@ -84,11 +90,14 @@ enum net_device_flags {
> > IFF_PORTSEL = 1<<13, /* sysfs */
> > IFF_AUTOMEDIA   = 1<<14, /* sysfs */
> > IFF_DYNAMIC = 1<<15, /* sysfs */
> > +#endif /* __UAPI_DEF_IF_NET_DEVICE_FLAGS */
> > IFF_LOWER_UP= 1<<16, /* volatile */
> > IFF_DORMANT = 1<<17, /* volatile */
> > IFF_ECHO= 1<<18, /* volatile */
> >  };
> 
> This is going to get messy is IFF_LOWER_UP, IFF_DORMANT, and IFF_ECHO
> get added the the glibc header.  Why not just handle it now with
> another __UAPI_DEF_FOO guard so that the additions to net/if.h can
> deal with this case too.

Do you mean that the enum should be protected with a single guard or
should I have one guard for current conflicts and one for the future
if glibc headers include IFF_LOWER_UP and others?

-Mikko


Re: [PATCH] mmc: sdhci-tegra: Set DMA mask

2016-02-25 Thread Alexandre Courbot
On Thu, Feb 25, 2016 at 11:52 PM, Arnd Bergmann  wrote:
>> Actually even if we specify a dma-ranges on the parent DT node, the
>> DMA range will still be limited to 32 bits because of the following
>> code in of_dma_configure():
>>
>> /*
>>  * Set default coherent_dma_mask to 32 bit.  Drivers are expected to
>>  * setup the correct supported mask.
>>  */
>> if (!dev->coherent_dma_mask)
>> dev->coherent_dma_mask = DMA_BIT_MASK(32);
>>
>> /*
>>  * Set it to coherent_dma_mask by default if the architecture
>>  * code has not set it.
>>  */
>> if (!dev->dma_mask)
>> dev->dma_mask = >coherent_dma_mask;
>>
>> 
>> /* gets dma-ranges into dma_addr and size */
>> 
>>
>>
>> *dev->dma_mask = min((*dev->dma_mask),
>>  DMA_BIT_MASK(ilog2(dma_addr + size)));
>>
>> So unless the DMA mask is set on the device before of_dma_configure()
>> is called, the min() statement will choose the 32 bits mask that has
>> been previously set. So IIUC in any case, the driver will need to call
>> dma_set_mask()
>
> Yes, the driver definitely has to call dma_set_mask(), the property of
> the parent bus is used to make that fail when the bus doesn't support
> it.

And that's where things seem to stop working: the driver's probe
function is invoked by the platform bus, *after* of_dma_configure() is
called. So unless I am missing something there is no way for the
driver to set the DMA mask in such a way that of_dma_configure() can
see it and do the right thing.

In other words, most of the DMA mask logic in of_dma_configure()
doesn't seem to have any effect (and a 32 bits mask will be set), at
least on the platform bus.

>> Can I have your thoughts on this? Am I missing something?
>
> One point: I think the dma_set_mask() probably should be in the
> generic part of the sdhci driver, not the tegra specific portion.

Ok, but then how does the generic part of the driver knows which DMA
mask applies to the device?

> I also forget how this really needs to interact with swiotlb. I know
> we have discussed this a couple of times, but the result currently
> is lost to me.
> Maybe the answer was that if swiotlb or iommu are enabled, then
> dma_set_mask() should always succeed, but the mask should not actually
> be updated?


Re: [RFC v1] clk: Add debugfs nodes for enable/disable/set-rate/set-parent

2016-02-25 Thread Holger Schurig
Pankaj Dev  writes:

> 1. clk_set_rate : Set new rate to value. Reading returns the
> current rate

If you can use this to set *and* read it, then "_set_" shouldn't be in
the name.

What is wrong with using the existing "clk_rate" for reading/setting the
rate?


Re: [RFC v1] clk: Add debugfs nodes for enable/disable/set-rate/set-parent

2016-02-25 Thread Holger Schurig
Pankaj Dev  writes:

> 1. clk_set_rate : Set new rate to value. Reading returns the
> current rate

If you can use this to set *and* read it, then "_set_" shouldn't be in
the name.

What is wrong with using the existing "clk_rate" for reading/setting the
rate?


[PATCH] driver: input :touchscreen : add Raydium I2C touch driver file

2016-02-25 Thread jeffrey.lin
This patch is porting Raydium I2C touch driver. Developer can enable raydium 
touch driver by modifying define

"CONFIG_TOUCHSCREEN_RM_TS".

Signed-off-by: jeffrey.lin 
---
 drivers/input/touchscreen/Kconfig  |  12 +
 drivers/input/touchscreen/Makefile |   1 +
 drivers/input/touchscreen/raydium_i2c_ts.c | 980 +
 3 files changed, 993 insertions(+)
 create mode 100644 drivers/input/touchscreen/raydium_i2c_ts.c

diff --git a/drivers/input/touchscreen/Kconfig 
b/drivers/input/touchscreen/Kconfig
index 3f3f6ee..ab28721 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -915,6 +915,18 @@ config TOUCHSCREEN_PCAP
  To compile this driver as a module, choose M here: the
  module will be called pcap_ts.
 
+config TOUCHSCREEN_RM_TS
+   tristate "Raydium I2C Touchscreen"
+   depends on I2C
+   help
+ Say Y here if you have Raydium series I2C touchscreen,
+ such as RM31100 , connected to your system.
+
+ If unsure, say N.
+
+ To compile this driver as a module, choose M here: the
+ module will be called raydium_i2c_ts.
+
 config TOUCHSCREEN_ST1232
tristate "Sitronix ST1232 touchscreen controllers"
depends on I2C
diff --git a/drivers/input/touchscreen/Makefile 
b/drivers/input/touchscreen/Makefile
index 4941f2d..99e08cf 100644
--- a/drivers/input/touchscreen/Makefile
+++ b/drivers/input/touchscreen/Makefile
@@ -55,6 +55,7 @@ obj-$(CONFIG_TOUCHSCREEN_USB_COMPOSITE)   += 
usbtouchscreen.o
 obj-$(CONFIG_TOUCHSCREEN_PCAP) += pcap_ts.o
 obj-$(CONFIG_TOUCHSCREEN_PENMOUNT) += penmount.o
 obj-$(CONFIG_TOUCHSCREEN_PIXCIR)   += pixcir_i2c_ts.o
+obj-$(CONFIG_TOUCHSCREEN_RM_TS)+= raydium_i2c_ts.o
 obj-$(CONFIG_TOUCHSCREEN_S3C2410)  += s3c2410_ts.o
 obj-$(CONFIG_TOUCHSCREEN_ST1232)   += st1232.o
 obj-$(CONFIG_TOUCHSCREEN_STMPE)+= stmpe-ts.o
diff --git a/drivers/input/touchscreen/raydium_i2c_ts.c 
b/drivers/input/touchscreen/raydium_i2c_ts.c
new file mode 100644
index 000..139f28a
--- /dev/null
+++ b/drivers/input/touchscreen/raydium_i2c_ts.c
@@ -0,0 +1,980 @@
+/*
+ * Raydium touchscreen I2C driver.
+ *
+ * Copyright (C) 2012-2014, Raydium Semiconductor Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2, and only version 2, as published by the
+ * Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Raydium reserves the right to make changes without further notice
+ * to the materials described herein. Raydium does not assume any
+ * liability arising out of the application described herein.
+ *
+ * Contact Raydium Semiconductor Corporation at www.rad-ic.com
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* Device, Driver information */
+#define DEVICE_NAME"raydium_i2c"
+
+/* Slave I2C mode*/
+#define RM_BOOT_BLDR   0x02
+#define RM_BOOT_MAIN   0x03
+
+/*I2C command */
+#define CMD_QUERY_BANK 0x2B
+#define CMD_DATA_BANK  0x4D
+#define CMD_ENTER_SLEEP0x4E
+#define CMD_BOOT_ACK   0x0A
+#define CMD_BOOT_WRT   0x5B
+#define CMD_BOOT_CHK   0x0C
+#define CMD_BANK_SWITCH0xAA
+
+/* Touch relative info */
+#define MAX_RETRIES3
+#define MAX_FW_UPDATE_RETRIES  30
+#define MAX_TOUCH_NUM  10
+#define MAX_PACKET_SIZE60
+#define BOOT_DELAY_MS  100
+
+#define RAYDIUM_FW_PAGESIZE128
+#define RAYDIUM_POWERON_DELAY_USEC 500
+#define RAYDIUM_RESET_DELAY_MSEC   50
+
+#define ADDR_INDEX 0x03
+#define HEADER_SIZE4
+
+enum raydium_boot_mode {
+   RAYDIUM_TS_MAIN,
+   RAYDIUM_TS_BLDR,
+};
+
+struct raydium_info {
+   u32 hw_ver;
+   u8 main_ver;
+   u8 sub_ver;
+   u16 ft_ver;
+   u8 x_num;
+   u8 y_num;
+   u16 x_max;
+   u16 y_max;
+   u8 x_res;   /* units/mm */
+   u8 y_res;   /* units/mm */
+};
+
+struct raydium_abs_info {
+   u8 state;/*1:touch, 0:no touch*/
+   u8 x_pos_lsb;
+   u8 x_pos_msb;
+   u8 y_pos_lsb;
+   u8 y_pos_msb;
+   u8 pressure;
+   u8 x_width;
+   u8 y_width;
+};
+
+struct raydium_object {
+   u32 data_bank_addr;
+   u8 pkg_size;
+};
+
+/* struct raydium_data - represents state of Raydium touchscreen device */
+struct raydium_data {
+   struct i2c_client *client;
+   struct input_dev *input;
+
+   struct regulator *vcc33;
+   

[PATCH] driver: input :touchscreen : add Raydium I2C touch driver file

2016-02-25 Thread jeffrey.lin
This patch is porting Raydium I2C touch driver. Developer can enable raydium 
touch driver by modifying define

"CONFIG_TOUCHSCREEN_RM_TS".

Signed-off-by: jeffrey.lin 
---
 drivers/input/touchscreen/Kconfig  |  12 +
 drivers/input/touchscreen/Makefile |   1 +
 drivers/input/touchscreen/raydium_i2c_ts.c | 980 +
 3 files changed, 993 insertions(+)
 create mode 100644 drivers/input/touchscreen/raydium_i2c_ts.c

diff --git a/drivers/input/touchscreen/Kconfig 
b/drivers/input/touchscreen/Kconfig
index 3f3f6ee..ab28721 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -915,6 +915,18 @@ config TOUCHSCREEN_PCAP
  To compile this driver as a module, choose M here: the
  module will be called pcap_ts.
 
+config TOUCHSCREEN_RM_TS
+   tristate "Raydium I2C Touchscreen"
+   depends on I2C
+   help
+ Say Y here if you have Raydium series I2C touchscreen,
+ such as RM31100 , connected to your system.
+
+ If unsure, say N.
+
+ To compile this driver as a module, choose M here: the
+ module will be called raydium_i2c_ts.
+
 config TOUCHSCREEN_ST1232
tristate "Sitronix ST1232 touchscreen controllers"
depends on I2C
diff --git a/drivers/input/touchscreen/Makefile 
b/drivers/input/touchscreen/Makefile
index 4941f2d..99e08cf 100644
--- a/drivers/input/touchscreen/Makefile
+++ b/drivers/input/touchscreen/Makefile
@@ -55,6 +55,7 @@ obj-$(CONFIG_TOUCHSCREEN_USB_COMPOSITE)   += 
usbtouchscreen.o
 obj-$(CONFIG_TOUCHSCREEN_PCAP) += pcap_ts.o
 obj-$(CONFIG_TOUCHSCREEN_PENMOUNT) += penmount.o
 obj-$(CONFIG_TOUCHSCREEN_PIXCIR)   += pixcir_i2c_ts.o
+obj-$(CONFIG_TOUCHSCREEN_RM_TS)+= raydium_i2c_ts.o
 obj-$(CONFIG_TOUCHSCREEN_S3C2410)  += s3c2410_ts.o
 obj-$(CONFIG_TOUCHSCREEN_ST1232)   += st1232.o
 obj-$(CONFIG_TOUCHSCREEN_STMPE)+= stmpe-ts.o
diff --git a/drivers/input/touchscreen/raydium_i2c_ts.c 
b/drivers/input/touchscreen/raydium_i2c_ts.c
new file mode 100644
index 000..139f28a
--- /dev/null
+++ b/drivers/input/touchscreen/raydium_i2c_ts.c
@@ -0,0 +1,980 @@
+/*
+ * Raydium touchscreen I2C driver.
+ *
+ * Copyright (C) 2012-2014, Raydium Semiconductor Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2, and only version 2, as published by the
+ * Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Raydium reserves the right to make changes without further notice
+ * to the materials described herein. Raydium does not assume any
+ * liability arising out of the application described herein.
+ *
+ * Contact Raydium Semiconductor Corporation at www.rad-ic.com
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* Device, Driver information */
+#define DEVICE_NAME"raydium_i2c"
+
+/* Slave I2C mode*/
+#define RM_BOOT_BLDR   0x02
+#define RM_BOOT_MAIN   0x03
+
+/*I2C command */
+#define CMD_QUERY_BANK 0x2B
+#define CMD_DATA_BANK  0x4D
+#define CMD_ENTER_SLEEP0x4E
+#define CMD_BOOT_ACK   0x0A
+#define CMD_BOOT_WRT   0x5B
+#define CMD_BOOT_CHK   0x0C
+#define CMD_BANK_SWITCH0xAA
+
+/* Touch relative info */
+#define MAX_RETRIES3
+#define MAX_FW_UPDATE_RETRIES  30
+#define MAX_TOUCH_NUM  10
+#define MAX_PACKET_SIZE60
+#define BOOT_DELAY_MS  100
+
+#define RAYDIUM_FW_PAGESIZE128
+#define RAYDIUM_POWERON_DELAY_USEC 500
+#define RAYDIUM_RESET_DELAY_MSEC   50
+
+#define ADDR_INDEX 0x03
+#define HEADER_SIZE4
+
+enum raydium_boot_mode {
+   RAYDIUM_TS_MAIN,
+   RAYDIUM_TS_BLDR,
+};
+
+struct raydium_info {
+   u32 hw_ver;
+   u8 main_ver;
+   u8 sub_ver;
+   u16 ft_ver;
+   u8 x_num;
+   u8 y_num;
+   u16 x_max;
+   u16 y_max;
+   u8 x_res;   /* units/mm */
+   u8 y_res;   /* units/mm */
+};
+
+struct raydium_abs_info {
+   u8 state;/*1:touch, 0:no touch*/
+   u8 x_pos_lsb;
+   u8 x_pos_msb;
+   u8 y_pos_lsb;
+   u8 y_pos_msb;
+   u8 pressure;
+   u8 x_width;
+   u8 y_width;
+};
+
+struct raydium_object {
+   u32 data_bank_addr;
+   u8 pkg_size;
+};
+
+/* struct raydium_data - represents state of Raydium touchscreen device */
+struct raydium_data {
+   struct i2c_client *client;
+   struct input_dev *input;
+
+   struct regulator *vcc33;
+   struct regulator *vccio;
+ 

Re: [PATCH] arm64: dts: uniphier: rename PH1-LD10 to PH1-LD20

2016-02-25 Thread Masahiro Yamada
2016-02-23 13:40 GMT+09:00 Masahiro Yamada :
> Due to the company's awful projecting, this chip has been renamed to
> PH1-LD20.  It has not been shipped yet, this change would not give
> much impact on our customers.
>
> Signed-off-by: Masahiro Yamada 
> ---
>
> Olof, Arnd,
>
> Please apply this patch along with my series
> "[PATCH 0/9] ARM: uniphier: UniPhier updates for Linux 4.6-rc1".
>
> If it goes to a different branch, it will cause a big merge conflict later.


Note:

This patch has been included in the series,
"ARM: dts: uniphier: UniPhier DT updates for Linux 4.6-rc1 (2nd round)"
in order to clarify the patch dependency.


-- 
Best Regards
Masahiro Yamada


Re: [PATCH] arm64: dts: uniphier: rename PH1-LD10 to PH1-LD20

2016-02-25 Thread Masahiro Yamada
2016-02-23 13:40 GMT+09:00 Masahiro Yamada :
> Due to the company's awful projecting, this chip has been renamed to
> PH1-LD20.  It has not been shipped yet, this change would not give
> much impact on our customers.
>
> Signed-off-by: Masahiro Yamada 
> ---
>
> Olof, Arnd,
>
> Please apply this patch along with my series
> "[PATCH 0/9] ARM: uniphier: UniPhier updates for Linux 4.6-rc1".
>
> If it goes to a different branch, it will cause a big merge conflict later.


Note:

This patch has been included in the series,
"ARM: dts: uniphier: UniPhier DT updates for Linux 4.6-rc1 (2nd round)"
in order to clarify the patch dependency.


-- 
Best Regards
Masahiro Yamada


Re: [PATCH 2/9] ARM: dts: uniphier: rework UniPhier System Bus nodes

2016-02-25 Thread Masahiro Yamada
Hi Olof,


2016-02-25 16:20 GMT+09:00 Olof Johansson :
> On Wed, Feb 24, 2016 at 6:22 PM, Masahiro Yamada
>  wrote:
>> Hi Olof,
>>
>>
>> 2016-02-25 9:26 GMT+09:00 Olof Johansson :
>>> Hi,
>>>
>>> On Tue, Feb 16, 2016 at 11:15:04AM +0900, Masahiro Yamada wrote:
>>>
 diff --git a/arch/arm/mach-uniphier/platsmp.c 
 b/arch/arm/mach-uniphier/platsmp.c
 index e1cfc1d..b53a8d9 100644
 --- a/arch/arm/mach-uniphier/platsmp.c
 +++ b/arch/arm/mach-uniphier/platsmp.c
 @@ -30,7 +30,7 @@
   * The secondary CPUs check this register from the boot ROM for the jump
   * destination.  After that, it can be reused as a scratch register.
   */
 -#define UNIPHIER_SBC_ROM_BOOT_RSV2   0x1208
 +#define UNIPHIER_SMPCTRL_ROM_BOOT_RSV2   0x208

  static void __iomem *uniphier_smp_rom_boot_rsv2;
  static unsigned int uniphier_smp_max_cpus;
 @@ -98,15 +98,14 @@ static int __init 
 uniphier_smp_prepare_trampoline(unsigned int max_cpus)
   phys_addr_t rom_rsv2_phys;
   int ret;

 - np = of_find_compatible_node(NULL, NULL,
 - "socionext,uniphier-system-bus-controller");
 - ret = of_address_to_resource(np, 1, );
 + np = of_find_compatible_node(NULL, NULL, 
 "socionext,uniphier-smpctrl");
 + ret = of_address_to_resource(np, 0, );
   if (ret) {
 - pr_err("failed to get resource of system-bus-controller\n");
 + pr_err("failed to get resource of uniphier-smpctrl\n");
   return ret;
   }

 - rom_rsv2_phys = res.start + UNIPHIER_SBC_ROM_BOOT_RSV2;
 + rom_rsv2_phys = res.start + UNIPHIER_SMPCTRL_ROM_BOOT_RSV2;

   ret = uniphier_smp_copy_trampoline(rom_rsv2_phys);
   if (ret)
>>>
>>> The previous binding has already been released. You can update, but your 
>>> driver
>>> should be able to handle the previous binding.
>>>
>>> So, you still need to keep the old code around.
>>>
>>> This has the benefit of breaking the dependency between the code change and 
>>> the
>>> DT change, so you no longer have to change your platform code at the same 
>>> time
>>> as the DT to avoid regressions.
>>>
>>>
>>> Please adjust and resend. I'll hold off applying the series until then, so 
>>> we
>>> don't have a partially applied series.
>>
>>
>>
>> How long do I have to keep the support for the old binding?
>
> You know your platform best -- how many users do you think you have
> out there that might have built DTS files based on the old binding?
>
> If there's a good chance there are none, or if you're in good contact
> with them and can ask them to update, then you can be more flexible.
>
>> [1]
>> Everyone makes mistakes.
>> The constraint for the DT-binding is really really painful.
>>
>> This is how it happened.
>>
>> At first, I implemented uniphier-system-bus.c based on the old binding.
>> Then, during the review, Mark suggested me to change the driver design:
>> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-November/387938.html
>>
>> I followed his suggestion, but I needed to changed the DT-binding as well.
>> Before that time, the DT and other support code for UniPhier had been
>> partially merged
>> in the mainline.  So, in the current tree exist two bindings that are
>> not compatible to
>> each other.  This situation is really a mess.
>> I want to clean up the code as soon as possible.
>
> Yeah, I understand that it's hard to come up with perfect bindings
> from day one, and that's why we sometimes have to play by ear.
>
> It's not a bad idea to get practice on how to solve it -- in this case
> it wouldn't really bad that bad. If you use variables to hold the base
> addresses, and get them from either binding, you'll only special-case
> during probe and not anywhere else in the driver.
>
> The general idea of decoupling DT changes from code changes is also a
> good habit.
>
>> [2]
>> For now, DT is mostly developed in the kernel tree in practice,
>> while DT is not theoretically only for Linux.
>> Everybody (at least every user of UniPhier SoCs) uses the combination
>> of a DTB and a kernel image
>> generated from the same Linux tree.
>> I see no reason to use a new DTB + an old kernel image, or vice versa.
>
> We're not aiming to support new DTB + old kernel image. The main
> problem is if someone has a product DTB that's not yet merged, and you
> change the binding, then their DTB might no longer work. It's not a
> huge deal, and for most changes it's fairly harmless, but the general
> principle still applies.
>
> As I said earlier, you know the users of your platform the best (I
> hope :), so you'll have the best feel for whether this is a breakage
> they will hurt from or not.
>
>> [3]
>> This binding is UniPhier-specific.  No impact on other SoC vendors.
>> Everything is under my control.
>>
>>
>>
>> For now, I will 

[PATCH 5/9] ARM: dts: uniphier: add EEPROM node for ProXstream2 Gentil board

2016-02-25 Thread Masahiro Yamada
This board has an EEPROM (STMicroelectronics M24C64-WMN6TP) connected
to the I2C channel 0 of the SoC.  Its slave address is 0x54.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/boot/dts/uniphier-proxstream2-gentil.dts | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts 
b/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
index 9d7ec5c..0da3018 100644
--- a/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
+++ b/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
@@ -75,4 +75,9 @@
 
  {
status = "okay";
+
+   eeprom@54 {
+   compatible = "st,24c64";
+   reg = <0x54>;
+   };
 };
-- 
1.9.1



Re: [PATCH 2/9] ARM: dts: uniphier: rework UniPhier System Bus nodes

2016-02-25 Thread Masahiro Yamada
Hi Olof,


2016-02-25 16:20 GMT+09:00 Olof Johansson :
> On Wed, Feb 24, 2016 at 6:22 PM, Masahiro Yamada
>  wrote:
>> Hi Olof,
>>
>>
>> 2016-02-25 9:26 GMT+09:00 Olof Johansson :
>>> Hi,
>>>
>>> On Tue, Feb 16, 2016 at 11:15:04AM +0900, Masahiro Yamada wrote:
>>>
 diff --git a/arch/arm/mach-uniphier/platsmp.c 
 b/arch/arm/mach-uniphier/platsmp.c
 index e1cfc1d..b53a8d9 100644
 --- a/arch/arm/mach-uniphier/platsmp.c
 +++ b/arch/arm/mach-uniphier/platsmp.c
 @@ -30,7 +30,7 @@
   * The secondary CPUs check this register from the boot ROM for the jump
   * destination.  After that, it can be reused as a scratch register.
   */
 -#define UNIPHIER_SBC_ROM_BOOT_RSV2   0x1208
 +#define UNIPHIER_SMPCTRL_ROM_BOOT_RSV2   0x208

  static void __iomem *uniphier_smp_rom_boot_rsv2;
  static unsigned int uniphier_smp_max_cpus;
 @@ -98,15 +98,14 @@ static int __init 
 uniphier_smp_prepare_trampoline(unsigned int max_cpus)
   phys_addr_t rom_rsv2_phys;
   int ret;

 - np = of_find_compatible_node(NULL, NULL,
 - "socionext,uniphier-system-bus-controller");
 - ret = of_address_to_resource(np, 1, );
 + np = of_find_compatible_node(NULL, NULL, 
 "socionext,uniphier-smpctrl");
 + ret = of_address_to_resource(np, 0, );
   if (ret) {
 - pr_err("failed to get resource of system-bus-controller\n");
 + pr_err("failed to get resource of uniphier-smpctrl\n");
   return ret;
   }

 - rom_rsv2_phys = res.start + UNIPHIER_SBC_ROM_BOOT_RSV2;
 + rom_rsv2_phys = res.start + UNIPHIER_SMPCTRL_ROM_BOOT_RSV2;

   ret = uniphier_smp_copy_trampoline(rom_rsv2_phys);
   if (ret)
>>>
>>> The previous binding has already been released. You can update, but your 
>>> driver
>>> should be able to handle the previous binding.
>>>
>>> So, you still need to keep the old code around.
>>>
>>> This has the benefit of breaking the dependency between the code change and 
>>> the
>>> DT change, so you no longer have to change your platform code at the same 
>>> time
>>> as the DT to avoid regressions.
>>>
>>>
>>> Please adjust and resend. I'll hold off applying the series until then, so 
>>> we
>>> don't have a partially applied series.
>>
>>
>>
>> How long do I have to keep the support for the old binding?
>
> You know your platform best -- how many users do you think you have
> out there that might have built DTS files based on the old binding?
>
> If there's a good chance there are none, or if you're in good contact
> with them and can ask them to update, then you can be more flexible.
>
>> [1]
>> Everyone makes mistakes.
>> The constraint for the DT-binding is really really painful.
>>
>> This is how it happened.
>>
>> At first, I implemented uniphier-system-bus.c based on the old binding.
>> Then, during the review, Mark suggested me to change the driver design:
>> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-November/387938.html
>>
>> I followed his suggestion, but I needed to changed the DT-binding as well.
>> Before that time, the DT and other support code for UniPhier had been
>> partially merged
>> in the mainline.  So, in the current tree exist two bindings that are
>> not compatible to
>> each other.  This situation is really a mess.
>> I want to clean up the code as soon as possible.
>
> Yeah, I understand that it's hard to come up with perfect bindings
> from day one, and that's why we sometimes have to play by ear.
>
> It's not a bad idea to get practice on how to solve it -- in this case
> it wouldn't really bad that bad. If you use variables to hold the base
> addresses, and get them from either binding, you'll only special-case
> during probe and not anywhere else in the driver.
>
> The general idea of decoupling DT changes from code changes is also a
> good habit.
>
>> [2]
>> For now, DT is mostly developed in the kernel tree in practice,
>> while DT is not theoretically only for Linux.
>> Everybody (at least every user of UniPhier SoCs) uses the combination
>> of a DTB and a kernel image
>> generated from the same Linux tree.
>> I see no reason to use a new DTB + an old kernel image, or vice versa.
>
> We're not aiming to support new DTB + old kernel image. The main
> problem is if someone has a product DTB that's not yet merged, and you
> change the binding, then their DTB might no longer work. It's not a
> huge deal, and for most changes it's fairly harmless, but the general
> principle still applies.
>
> As I said earlier, you know the users of your platform the best (I
> hope :), so you'll have the best feel for whether this is a breakage
> they will hurt from or not.
>
>> [3]
>> This binding is UniPhier-specific.  No impact on other SoC vendors.
>> Everything is under my control.
>>
>>
>>
>> For now, I will prepare the logic to support the old binding,
>> but for the 

[PATCH 5/9] ARM: dts: uniphier: add EEPROM node for ProXstream2 Gentil board

2016-02-25 Thread Masahiro Yamada
This board has an EEPROM (STMicroelectronics M24C64-WMN6TP) connected
to the I2C channel 0 of the SoC.  Its slave address is 0x54.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/boot/dts/uniphier-proxstream2-gentil.dts | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts 
b/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
index 9d7ec5c..0da3018 100644
--- a/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
+++ b/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
@@ -75,4 +75,9 @@
 
  {
status = "okay";
+
+   eeprom@54 {
+   compatible = "st,24c64";
+   reg = <0x54>;
+   };
 };
-- 
1.9.1



[PATCH 4/9] ARM: dts: uniphier: add reference clock nodes

2016-02-25 Thread Masahiro Yamada
Add master clock nodes generated by crystal oscillators.

  PH1-sLD3, PH1-LD4: 24.576 MHz
  PH1-Pro4, ProXstream2: 25.000 MHz
  PH1-Pro5: 20.000 MHz

Signed-off-by: Masahiro Yamada 
---

 arch/arm/boot/dts/uniphier-common32.dtsi| 7 +++
 arch/arm/boot/dts/uniphier-ph1-ld4.dtsi | 4 
 arch/arm/boot/dts/uniphier-ph1-pro4.dtsi| 4 
 arch/arm/boot/dts/uniphier-ph1-pro5.dtsi| 4 
 arch/arm/boot/dts/uniphier-ph1-sld3.dtsi| 6 ++
 arch/arm/boot/dts/uniphier-ph1-sld8.dtsi| 4 
 arch/arm/boot/dts/uniphier-proxstream2.dtsi | 4 
 7 files changed, 33 insertions(+)

diff --git a/arch/arm/boot/dts/uniphier-common32.dtsi 
b/arch/arm/boot/dts/uniphier-common32.dtsi
index f847e68..61a0955 100644
--- a/arch/arm/boot/dts/uniphier-common32.dtsi
+++ b/arch/arm/boot/dts/uniphier-common32.dtsi
@@ -45,6 +45,13 @@
 /include/ "skeleton.dtsi"
 
 / {
+   clocks {
+   refclk: ref {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   };
+   };
+
soc: soc {
compatible = "simple-bus";
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi 
b/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
index 34f0d8d..dadd860 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
@@ -173,6 +173,10 @@
 
 };
 
+ {
+   clock-frequency = <24576000>;
+};
+
  {
interrupts = <0 29 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi 
b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
index d78142f..20f3f2a 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
@@ -195,6 +195,10 @@
};
 };
 
+ {
+   clock-frequency = <2500>;
+};
+
  {
compatible = "socionext,ph1-pro4-pinctrl", "syscon";
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi 
b/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi
index 2f389ea..24f6f66 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi
@@ -189,6 +189,10 @@
};
 };
 
+ {
+   clock-frequency = <2000>;
+};
+
  {
compatible = "socionext,ph1-pro5-pinctrl", "syscon";
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi 
b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
index 4c746ea..03292f4 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
@@ -68,6 +68,12 @@
};
 
clocks {
+   refclk: ref {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   clock-frequency = <24576000>;
+   };
+
arm_timer_clk: arm_timer_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi 
b/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
index 7d06a1c..6bfd29a 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
@@ -172,6 +172,10 @@
};
 };
 
+ {
+   clock-frequency = <2500>;
+};
+
  {
interrupts = <0 29 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-proxstream2.dtsi 
b/arch/arm/boot/dts/uniphier-proxstream2.dtsi
index 6bd353f..4ac484c 100644
--- a/arch/arm/boot/dts/uniphier-proxstream2.dtsi
+++ b/arch/arm/boot/dts/uniphier-proxstream2.dtsi
@@ -200,6 +200,10 @@
};
 };
 
+ {
+   clock-frequency = <2500>;
+};
+
  {
compatible = "socionext,proxstream2-pinctrl", "syscon";
 };
-- 
1.9.1



Re: [PATCH 2/2] PCI: generic: add description of property "interrupt-skip-mask"

2016-02-25 Thread Leizhen (ThunderTown)


On 2016/2/25 20:20, Mark Rutland wrote:
> Hi,
> 
> In future, please send the binding document first in a series, per point
> 3 of Documentation/devicetree/bindings/submitting-patches.txt. It makes
> review easier/faster.
Thank you for your reminding.

> 
> On Thu, Feb 25, 2016 at 07:53:28PM +0800, Zhen Lei wrote:
>> Interrupt Pin register is read-only and optional. Some pci devices may use
>> msi/msix but leave the value of Interrupt Pin non-zero.
> 
> Is that permitted by the spec? Surely 'optional' means it must be zero
> if not implemented?

In :
Devices (or device functions) that do not use an interrupt pin must put a 0 in 
this register. This register is read-only.

So, do you think this is a hardware bug? But these pci-devices are not produced 
by our company.

In function init_service_irqs, it try msix first, then msi, Interrupt PIN is 
the last attemption. But of_irq_parse_pci() happened before this.


In fact, there also a familiar problem exist. As below:
pci :42:00.0: BAR 7: no space for [io  size 0x1000]
pci :42:00.0: BAR 7: failed to assign [io  size 0x1000]

There no "io space" on arm64, maybe only exist on X86. And the Memory Space 
Indicator also read-only in BAR register.

> 
>> In this case, the driver will print information as below: pci
>> :40:00.0: of_irq_parse_pci() failed with rc=-22
>>
>> It's easily lead to misinterpret.
> 
> If this is limited to a subset of devices which we know are broken in
> this regard, can we not handle these cases explicitly?
Actually, we have another way to block this warning. Use "interrupt-map" to map 
it to a pesudo IRQ. But I think it will also be misunderstanded.

> 
>> Signed-off-by: Zhen Lei 
>> ---
>>  Documentation/devicetree/bindings/pci/host-generic-pci.txt | 2 ++
>>  1 file changed, 2 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/host-generic-pci.txt 
>> b/Documentation/devicetree/bindings/pci/host-generic-pci.txt
>> index 3f1d3fc..0f10978 100644
>> --- a/Documentation/devicetree/bindings/pci/host-generic-pci.txt
>> +++ b/Documentation/devicetree/bindings/pci/host-generic-pci.txt
>> @@ -70,6 +70,8 @@ Practice: Interrupt Mapping' and requires the following 
>> properties:
>>
>>  - interrupt-map-mask : 
>>
>> +- interrupt-skip-mask: Explicitly declare which pci devices only use 
>> msi/msix
>> +but leave the value of Interrupt Pin non-zero.
> 
> Unlike the rest of the interrupt mapping properties, this is not
> described in  `Open Firmware Recommended Practice: Interrupt Mapping'.
> 
> This needs a far more complete description.
> 
> This also doesn't strike me as th right approach. The interrupt-map-mask
> property describe as relationship between the host-controller-provided
> interrupt lines and endpoints, while this seems to be a bug completely
> contained within an endpoint.

In :
// PCI_DEVICE(3)  INT#(1)  CONTROLLER(PHANDLE)  CONTROLLER_DATA(3)
interrupt-map = <  0x0 0x0 0x0  0x10x0 0x4 0x1

PCI_DEVICE contain 3 cells. But only the first one be used in function 
of_irq_parse_pci.
laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8));
laddr[1] = laddr[2] = cpu_to_be32(0);

And for INT#, I don't think there will some Pins used but others unused on a 
pci-device. So I can ommit it.

So, only laddr[0] mask need to be described.
> 
> Thanks,
> Mark.
> 
>>
>>  Example:
>>
>> --
>> 2.5.0
>>
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe devicetree" in
>> the body of a message to majord...@vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>>
> 
> .
> 



Re: [PATCH 2/2] PCI: generic: add description of property "interrupt-skip-mask"

2016-02-25 Thread Leizhen (ThunderTown)


On 2016/2/25 20:20, Mark Rutland wrote:
> Hi,
> 
> In future, please send the binding document first in a series, per point
> 3 of Documentation/devicetree/bindings/submitting-patches.txt. It makes
> review easier/faster.
Thank you for your reminding.

> 
> On Thu, Feb 25, 2016 at 07:53:28PM +0800, Zhen Lei wrote:
>> Interrupt Pin register is read-only and optional. Some pci devices may use
>> msi/msix but leave the value of Interrupt Pin non-zero.
> 
> Is that permitted by the spec? Surely 'optional' means it must be zero
> if not implemented?

In :
Devices (or device functions) that do not use an interrupt pin must put a 0 in 
this register. This register is read-only.

So, do you think this is a hardware bug? But these pci-devices are not produced 
by our company.

In function init_service_irqs, it try msix first, then msi, Interrupt PIN is 
the last attemption. But of_irq_parse_pci() happened before this.


In fact, there also a familiar problem exist. As below:
pci :42:00.0: BAR 7: no space for [io  size 0x1000]
pci :42:00.0: BAR 7: failed to assign [io  size 0x1000]

There no "io space" on arm64, maybe only exist on X86. And the Memory Space 
Indicator also read-only in BAR register.

> 
>> In this case, the driver will print information as below: pci
>> :40:00.0: of_irq_parse_pci() failed with rc=-22
>>
>> It's easily lead to misinterpret.
> 
> If this is limited to a subset of devices which we know are broken in
> this regard, can we not handle these cases explicitly?
Actually, we have another way to block this warning. Use "interrupt-map" to map 
it to a pesudo IRQ. But I think it will also be misunderstanded.

> 
>> Signed-off-by: Zhen Lei 
>> ---
>>  Documentation/devicetree/bindings/pci/host-generic-pci.txt | 2 ++
>>  1 file changed, 2 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/host-generic-pci.txt 
>> b/Documentation/devicetree/bindings/pci/host-generic-pci.txt
>> index 3f1d3fc..0f10978 100644
>> --- a/Documentation/devicetree/bindings/pci/host-generic-pci.txt
>> +++ b/Documentation/devicetree/bindings/pci/host-generic-pci.txt
>> @@ -70,6 +70,8 @@ Practice: Interrupt Mapping' and requires the following 
>> properties:
>>
>>  - interrupt-map-mask : 
>>
>> +- interrupt-skip-mask: Explicitly declare which pci devices only use 
>> msi/msix
>> +but leave the value of Interrupt Pin non-zero.
> 
> Unlike the rest of the interrupt mapping properties, this is not
> described in  `Open Firmware Recommended Practice: Interrupt Mapping'.
> 
> This needs a far more complete description.
> 
> This also doesn't strike me as th right approach. The interrupt-map-mask
> property describe as relationship between the host-controller-provided
> interrupt lines and endpoints, while this seems to be a bug completely
> contained within an endpoint.

In :
// PCI_DEVICE(3)  INT#(1)  CONTROLLER(PHANDLE)  CONTROLLER_DATA(3)
interrupt-map = <  0x0 0x0 0x0  0x10x0 0x4 0x1

PCI_DEVICE contain 3 cells. But only the first one be used in function 
of_irq_parse_pci.
laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8));
laddr[1] = laddr[2] = cpu_to_be32(0);

And for INT#, I don't think there will some Pins used but others unused on a 
pci-device. So I can ommit it.

So, only laddr[0] mask need to be described.
> 
> Thanks,
> Mark.
> 
>>
>>  Example:
>>
>> --
>> 2.5.0
>>
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe devicetree" in
>> the body of a message to majord...@vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>>
> 
> .
> 



[PATCH 4/9] ARM: dts: uniphier: add reference clock nodes

2016-02-25 Thread Masahiro Yamada
Add master clock nodes generated by crystal oscillators.

  PH1-sLD3, PH1-LD4: 24.576 MHz
  PH1-Pro4, ProXstream2: 25.000 MHz
  PH1-Pro5: 20.000 MHz

Signed-off-by: Masahiro Yamada 
---

 arch/arm/boot/dts/uniphier-common32.dtsi| 7 +++
 arch/arm/boot/dts/uniphier-ph1-ld4.dtsi | 4 
 arch/arm/boot/dts/uniphier-ph1-pro4.dtsi| 4 
 arch/arm/boot/dts/uniphier-ph1-pro5.dtsi| 4 
 arch/arm/boot/dts/uniphier-ph1-sld3.dtsi| 6 ++
 arch/arm/boot/dts/uniphier-ph1-sld8.dtsi| 4 
 arch/arm/boot/dts/uniphier-proxstream2.dtsi | 4 
 7 files changed, 33 insertions(+)

diff --git a/arch/arm/boot/dts/uniphier-common32.dtsi 
b/arch/arm/boot/dts/uniphier-common32.dtsi
index f847e68..61a0955 100644
--- a/arch/arm/boot/dts/uniphier-common32.dtsi
+++ b/arch/arm/boot/dts/uniphier-common32.dtsi
@@ -45,6 +45,13 @@
 /include/ "skeleton.dtsi"
 
 / {
+   clocks {
+   refclk: ref {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   };
+   };
+
soc: soc {
compatible = "simple-bus";
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi 
b/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
index 34f0d8d..dadd860 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
@@ -173,6 +173,10 @@
 
 };
 
+ {
+   clock-frequency = <24576000>;
+};
+
  {
interrupts = <0 29 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi 
b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
index d78142f..20f3f2a 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
@@ -195,6 +195,10 @@
};
 };
 
+ {
+   clock-frequency = <2500>;
+};
+
  {
compatible = "socionext,ph1-pro4-pinctrl", "syscon";
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi 
b/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi
index 2f389ea..24f6f66 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi
@@ -189,6 +189,10 @@
};
 };
 
+ {
+   clock-frequency = <2000>;
+};
+
  {
compatible = "socionext,ph1-pro5-pinctrl", "syscon";
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi 
b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
index 4c746ea..03292f4 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
@@ -68,6 +68,12 @@
};
 
clocks {
+   refclk: ref {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   clock-frequency = <24576000>;
+   };
+
arm_timer_clk: arm_timer_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi 
b/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
index 7d06a1c..6bfd29a 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
@@ -172,6 +172,10 @@
};
 };
 
+ {
+   clock-frequency = <2500>;
+};
+
  {
interrupts = <0 29 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-proxstream2.dtsi 
b/arch/arm/boot/dts/uniphier-proxstream2.dtsi
index 6bd353f..4ac484c 100644
--- a/arch/arm/boot/dts/uniphier-proxstream2.dtsi
+++ b/arch/arm/boot/dts/uniphier-proxstream2.dtsi
@@ -200,6 +200,10 @@
};
 };
 
+ {
+   clock-frequency = <2500>;
+};
+
  {
compatible = "socionext,proxstream2-pinctrl", "syscon";
 };
-- 
1.9.1



[PATCH 7/9] ARM: dts: uniphier: add PH1-Pro4 Ace board support

2016-02-25 Thread Masahiro Yamada
Initial commit for PH1-Pro4 Ace board support.

Note:
There are two variants for the amount of DDR memory; 1GB or 2GB.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/boot/dts/Makefile  |   1 +
 arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts | 113 
 2 files changed, 114 insertions(+)
 create mode 100644 arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a4a6d70..d9d899f 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -736,6 +736,7 @@ dtb-$(CONFIG_ARCH_U8500) += \
 dtb-$(CONFIG_ARCH_UNIPHIER) += \
uniphier-ph1-ld4-ref.dtb \
uniphier-ph1-ld6b-ref.dtb \
+   uniphier-ph1-pro4-ace.dtb \
uniphier-ph1-pro4-ref.dtb \
uniphier-ph1-sld3-ref.dtb \
uniphier-ph1-sld8-ref.dtb \
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts 
b/arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts
new file mode 100644
index 000..d343586
--- /dev/null
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts
@@ -0,0 +1,113 @@
+/*
+ * Device Tree Source for UniPhier PH1-Pro4 Ace Board
+ *
+ * Copyright (C) 2016 Masahiro Yamada 
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+/include/ "uniphier-ph1-pro4.dtsi"
+
+/ {
+   model = "UniPhier PH1-Pro4 Ace Board";
+   compatible = "socionext,ph1-pro4-ace", "socionext,ph1-pro4";
+
+   memory {
+   device_type = "memory";
+   reg = <0x8000 0x4000>;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   i2c0 = 
+   i2c1 = 
+   i2c2 = 
+   i2c3 = 
+   i2c5 = 
+   i2c6 = 
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+
+   eeprom@54 {
+   compatible = "st,24c64";
+   reg = <0x54>;
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
-- 
1.9.1



[PATCH 2/9] ARM: dts: uniphier: factor out ranges property of support card

2016-02-25 Thread Masahiro Yamada
This property is used in common by several boards.  Move it to the
common place (uniphier-support-card.dtsi).  If necessary, each board
can still override the property.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts  | 8 
 arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts | 8 
 arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts | 8 
 arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts | 8 
 arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts | 8 
 arch/arm/boot/dts/uniphier-support-card.dtsi| 3 +++
 arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts | 8 
 7 files changed, 3 insertions(+), 48 deletions(-)

diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts 
b/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
index f1e9d40..ec94b7a 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
@@ -72,14 +72,6 @@
};
 };
 
- {
-   ranges = <1 0x 0x4200 0x0200>;
-};
-
-_card {
-   ranges = <0x 1 0x01f0 0x0010>;
-};
-
  {
interrupts = <0 49 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts 
b/arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts
index 5baa9fc..b8134c6 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts
@@ -74,14 +74,6 @@
};
 };
 
- {
-   ranges = <1 0x 0x4200 0x0200>;
-};
-
-_card {
-   ranges = <0x 1 0x01f0 0x0010>;
-};
-
  {
interrupts = <0 52 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts 
b/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
index 2462668..95f631a 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
@@ -74,14 +74,6 @@
};
 };
 
- {
-   ranges = <1 0x 0x4200 0x0200>;
-};
-
-_card {
-   ranges = <0x 1 0x01f0 0x0010>;
-};
-
  {
interrupts = <0 50 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts 
b/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
index b7a03215..acb4204 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
@@ -73,14 +73,6 @@
};
 };
 
- {
-   ranges = <1 0x 0x4200 0x0200>;
-};
-
-_card {
-   ranges = <0x 1 0x01f0 0x0010>;
-};
-
  {
interrupts = <0 49 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts 
b/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
index fc7250c..d594f40 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
@@ -72,14 +72,6 @@
};
 };
 
- {
-   ranges = <1 0x 0x4200 0x0200>;
-};
-
-_card {
-   ranges = <0x 1 0x01f0 0x0010>;
-};
-
  {
interrupts = <0 48 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-support-card.dtsi 
b/arch/arm/boot/dts/uniphier-support-card.dtsi
index da271e3..fa807e8 100644
--- a/arch/arm/boot/dts/uniphier-support-card.dtsi
+++ b/arch/arm/boot/dts/uniphier-support-card.dtsi
@@ -43,10 +43,13 @@
  */
 
  {
+   ranges = <1 0x 0x4200 0x0200>;
+
support_card: support_card {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
+   ranges = <0x 1 0x01f0 0x0010>;
 
ethsc: ethernet@ {
compatible = "smsc,lan9118", "smsc,lan9115";
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts 
b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts
index 80f71ba..727ae5f 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts
@@ -74,14 +74,6 @@
};
 };
 
- {
-   ranges = <1 0x 0x4200 0x0200>;
-};
-
-_card {
-   ranges = <0x 1 0x01f0 0x0010>;
-};
-
  {
interrupts = <0 48 4>;
 };
-- 
1.9.1



[PATCH 0/9] ARM: dts: uniphier: UniPhier DT updates for Linux 4.6-rc1 (2nd round)

2016-02-25 Thread Masahiro Yamada

Hi Olof,

Here is a series for UniPhier DT updates.

It intentionally includes DT updates for ARM 32bit and ARM 64bit
in order to avoid conflicts and build errors.

(Some files in arch/arm64/boot/dts/socionext points to
arch/arm/boot/dts/* by symbolic links, so I needed to
change them atomically.)

Please apply the whole series to one branch.



Masahiro Yamada (9):
  arm64: dts: uniphier: rename PH1-LD10 to PH1-LD20
  ARM: dts: uniphier: factor out ranges property of support card
  ARM: dts: uniphier: rework UniPhier System Bus nodes
  ARM: dts: uniphier: add reference clock nodes
  ARM: dts: uniphier: add EEPROM node for ProXstream2 Gentil board
  ARM: dts: uniphier: enable I2C channel 2 of ProXstream2 Gentil board
  ARM: dts: uniphier: add PH1-Pro4 Ace board support
  ARM: dts: uniphier: add PH1-Pro4 Sanji board support
  ARM: dts: uniphier: add @{address} to EEPROM node

 arch/arm/boot/dts/Makefile |   2 +
 arch/arm/boot/dts/uniphier-common32.dtsi   |  27 +++--
 arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts |   8 --
 arch/arm/boot/dts/uniphier-ph1-ld4.dtsi|   4 +
 arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts|   8 --
 arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts| 113 +
 arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts|   8 --
 arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts  | 108 
 arch/arm/boot/dts/uniphier-ph1-pro4.dtsi   |   4 +
 arch/arm/boot/dts/uniphier-ph1-pro5.dtsi   |   4 +
 arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts|   8 --
 arch/arm/boot/dts/uniphier-ph1-sld3.dtsi   |  26 +++--
 arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts|   8 --
 arch/arm/boot/dts/uniphier-ph1-sld8.dtsi   |   4 +
 arch/arm/boot/dts/uniphier-proxstream2-gentil.dts  |  10 ++
 arch/arm/boot/dts/uniphier-proxstream2.dtsi|   4 +
 arch/arm/boot/dts/uniphier-ref-daughter.dtsi   |   2 +-
 arch/arm/boot/dts/uniphier-support-card.dtsi   |   6 +-
 arch/arm64/boot/dts/socionext/Makefile |   2 +-
 ...-ph1-ld10-ref.dts => uniphier-ph1-ld20-ref.dts} |  16 +--
 ...iphier-ph1-ld10.dtsi => uniphier-ph1-ld20.dtsi} |  25 +++--
 21 files changed, 315 insertions(+), 82 deletions(-)
 create mode 100644 arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts
 create mode 100644 arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts
 rename arch/arm64/boot/dts/socionext/{uniphier-ph1-ld10-ref.dts => 
uniphier-ph1-ld20-ref.dts} (88%)
 rename arch/arm64/boot/dts/socionext/{uniphier-ph1-ld10.dtsi => 
uniphier-ph1-ld20.dtsi} (94%)

-- 
1.9.1



[PATCH 6/9] ARM: dts: uniphier: enable I2C channel 2 of ProXstream2 Gentil board

2016-02-25 Thread Masahiro Yamada
This is used for on-board inter-connection.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/boot/dts/uniphier-proxstream2-gentil.dts | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts 
b/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
index 0da3018..bf2619e 100644
--- a/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
+++ b/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
@@ -63,6 +63,7 @@
serial1 = 
serial2 = 
i2c0 = 
+   i2c2 = 
i2c4 = 
i2c5 = 
i2c6 = 
@@ -81,3 +82,7 @@
reg = <0x54>;
};
 };
+
+ {
+   status = "okay";
+};
-- 
1.9.1



[PATCH 7/9] ARM: dts: uniphier: add PH1-Pro4 Ace board support

2016-02-25 Thread Masahiro Yamada
Initial commit for PH1-Pro4 Ace board support.

Note:
There are two variants for the amount of DDR memory; 1GB or 2GB.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/boot/dts/Makefile  |   1 +
 arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts | 113 
 2 files changed, 114 insertions(+)
 create mode 100644 arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a4a6d70..d9d899f 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -736,6 +736,7 @@ dtb-$(CONFIG_ARCH_U8500) += \
 dtb-$(CONFIG_ARCH_UNIPHIER) += \
uniphier-ph1-ld4-ref.dtb \
uniphier-ph1-ld6b-ref.dtb \
+   uniphier-ph1-pro4-ace.dtb \
uniphier-ph1-pro4-ref.dtb \
uniphier-ph1-sld3-ref.dtb \
uniphier-ph1-sld8-ref.dtb \
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts 
b/arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts
new file mode 100644
index 000..d343586
--- /dev/null
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts
@@ -0,0 +1,113 @@
+/*
+ * Device Tree Source for UniPhier PH1-Pro4 Ace Board
+ *
+ * Copyright (C) 2016 Masahiro Yamada 
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+/include/ "uniphier-ph1-pro4.dtsi"
+
+/ {
+   model = "UniPhier PH1-Pro4 Ace Board";
+   compatible = "socionext,ph1-pro4-ace", "socionext,ph1-pro4";
+
+   memory {
+   device_type = "memory";
+   reg = <0x8000 0x4000>;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   i2c0 = 
+   i2c1 = 
+   i2c2 = 
+   i2c3 = 
+   i2c5 = 
+   i2c6 = 
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+
+   eeprom@54 {
+   compatible = "st,24c64";
+   reg = <0x54>;
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
-- 
1.9.1



[PATCH 2/9] ARM: dts: uniphier: factor out ranges property of support card

2016-02-25 Thread Masahiro Yamada
This property is used in common by several boards.  Move it to the
common place (uniphier-support-card.dtsi).  If necessary, each board
can still override the property.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts  | 8 
 arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts | 8 
 arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts | 8 
 arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts | 8 
 arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts | 8 
 arch/arm/boot/dts/uniphier-support-card.dtsi| 3 +++
 arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts | 8 
 7 files changed, 3 insertions(+), 48 deletions(-)

diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts 
b/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
index f1e9d40..ec94b7a 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
@@ -72,14 +72,6 @@
};
 };
 
- {
-   ranges = <1 0x 0x4200 0x0200>;
-};
-
-_card {
-   ranges = <0x 1 0x01f0 0x0010>;
-};
-
  {
interrupts = <0 49 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts 
b/arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts
index 5baa9fc..b8134c6 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts
@@ -74,14 +74,6 @@
};
 };
 
- {
-   ranges = <1 0x 0x4200 0x0200>;
-};
-
-_card {
-   ranges = <0x 1 0x01f0 0x0010>;
-};
-
  {
interrupts = <0 52 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts 
b/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
index 2462668..95f631a 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
@@ -74,14 +74,6 @@
};
 };
 
- {
-   ranges = <1 0x 0x4200 0x0200>;
-};
-
-_card {
-   ranges = <0x 1 0x01f0 0x0010>;
-};
-
  {
interrupts = <0 50 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts 
b/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
index b7a03215..acb4204 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
@@ -73,14 +73,6 @@
};
 };
 
- {
-   ranges = <1 0x 0x4200 0x0200>;
-};
-
-_card {
-   ranges = <0x 1 0x01f0 0x0010>;
-};
-
  {
interrupts = <0 49 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts 
b/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
index fc7250c..d594f40 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
@@ -72,14 +72,6 @@
};
 };
 
- {
-   ranges = <1 0x 0x4200 0x0200>;
-};
-
-_card {
-   ranges = <0x 1 0x01f0 0x0010>;
-};
-
  {
interrupts = <0 48 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-support-card.dtsi 
b/arch/arm/boot/dts/uniphier-support-card.dtsi
index da271e3..fa807e8 100644
--- a/arch/arm/boot/dts/uniphier-support-card.dtsi
+++ b/arch/arm/boot/dts/uniphier-support-card.dtsi
@@ -43,10 +43,13 @@
  */
 
  {
+   ranges = <1 0x 0x4200 0x0200>;
+
support_card: support_card {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
+   ranges = <0x 1 0x01f0 0x0010>;
 
ethsc: ethernet@ {
compatible = "smsc,lan9118", "smsc,lan9115";
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts 
b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts
index 80f71ba..727ae5f 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts
@@ -74,14 +74,6 @@
};
 };
 
- {
-   ranges = <1 0x 0x4200 0x0200>;
-};
-
-_card {
-   ranges = <0x 1 0x01f0 0x0010>;
-};
-
  {
interrupts = <0 48 4>;
 };
-- 
1.9.1



[PATCH 0/9] ARM: dts: uniphier: UniPhier DT updates for Linux 4.6-rc1 (2nd round)

2016-02-25 Thread Masahiro Yamada

Hi Olof,

Here is a series for UniPhier DT updates.

It intentionally includes DT updates for ARM 32bit and ARM 64bit
in order to avoid conflicts and build errors.

(Some files in arch/arm64/boot/dts/socionext points to
arch/arm/boot/dts/* by symbolic links, so I needed to
change them atomically.)

Please apply the whole series to one branch.



Masahiro Yamada (9):
  arm64: dts: uniphier: rename PH1-LD10 to PH1-LD20
  ARM: dts: uniphier: factor out ranges property of support card
  ARM: dts: uniphier: rework UniPhier System Bus nodes
  ARM: dts: uniphier: add reference clock nodes
  ARM: dts: uniphier: add EEPROM node for ProXstream2 Gentil board
  ARM: dts: uniphier: enable I2C channel 2 of ProXstream2 Gentil board
  ARM: dts: uniphier: add PH1-Pro4 Ace board support
  ARM: dts: uniphier: add PH1-Pro4 Sanji board support
  ARM: dts: uniphier: add @{address} to EEPROM node

 arch/arm/boot/dts/Makefile |   2 +
 arch/arm/boot/dts/uniphier-common32.dtsi   |  27 +++--
 arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts |   8 --
 arch/arm/boot/dts/uniphier-ph1-ld4.dtsi|   4 +
 arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts|   8 --
 arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts| 113 +
 arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts|   8 --
 arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts  | 108 
 arch/arm/boot/dts/uniphier-ph1-pro4.dtsi   |   4 +
 arch/arm/boot/dts/uniphier-ph1-pro5.dtsi   |   4 +
 arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts|   8 --
 arch/arm/boot/dts/uniphier-ph1-sld3.dtsi   |  26 +++--
 arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts|   8 --
 arch/arm/boot/dts/uniphier-ph1-sld8.dtsi   |   4 +
 arch/arm/boot/dts/uniphier-proxstream2-gentil.dts  |  10 ++
 arch/arm/boot/dts/uniphier-proxstream2.dtsi|   4 +
 arch/arm/boot/dts/uniphier-ref-daughter.dtsi   |   2 +-
 arch/arm/boot/dts/uniphier-support-card.dtsi   |   6 +-
 arch/arm64/boot/dts/socionext/Makefile |   2 +-
 ...-ph1-ld10-ref.dts => uniphier-ph1-ld20-ref.dts} |  16 +--
 ...iphier-ph1-ld10.dtsi => uniphier-ph1-ld20.dtsi} |  25 +++--
 21 files changed, 315 insertions(+), 82 deletions(-)
 create mode 100644 arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts
 create mode 100644 arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts
 rename arch/arm64/boot/dts/socionext/{uniphier-ph1-ld10-ref.dts => 
uniphier-ph1-ld20-ref.dts} (88%)
 rename arch/arm64/boot/dts/socionext/{uniphier-ph1-ld10.dtsi => 
uniphier-ph1-ld20.dtsi} (94%)

-- 
1.9.1



[PATCH 6/9] ARM: dts: uniphier: enable I2C channel 2 of ProXstream2 Gentil board

2016-02-25 Thread Masahiro Yamada
This is used for on-board inter-connection.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/boot/dts/uniphier-proxstream2-gentil.dts | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts 
b/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
index 0da3018..bf2619e 100644
--- a/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
+++ b/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
@@ -63,6 +63,7 @@
serial1 = 
serial2 = 
i2c0 = 
+   i2c2 = 
i2c4 = 
i2c5 = 
i2c6 = 
@@ -81,3 +82,7 @@
reg = <0x54>;
};
 };
+
+ {
+   status = "okay";
+};
-- 
1.9.1



[PATCH 3/9] ARM: dts: uniphier: rework UniPhier System Bus nodes

2016-02-25 Thread Masahiro Yamada
During the review process of the UniPhier System Bus driver
(drivers/bus/uniphier.c), the current binding of the System Bus
Controller turned out to be no good.  In order to make the driver
really usable, we have to switch over to the new binding defined by
Documentation/devicetree/bindings/bus/uniphier-system-bus.txt.
The old binding will be still supported for a while to keep the
backward compatibility.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/boot/dts/uniphier-common32.dtsi | 20 +++-
 arch/arm/boot/dts/uniphier-ph1-sld3.dtsi | 20 +++-
 arch/arm/boot/dts/uniphier-support-card.dtsi |  3 ++-
 arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi | 19 +--
 4 files changed, 37 insertions(+), 25 deletions(-)

diff --git a/arch/arm/boot/dts/uniphier-common32.dtsi 
b/arch/arm/boot/dts/uniphier-common32.dtsi
index ea9301a..f847e68 100644
--- a/arch/arm/boot/dts/uniphier-common32.dtsi
+++ b/arch/arm/boot/dts/uniphier-common32.dtsi
@@ -52,12 +52,6 @@
ranges;
interrupt-parent = <>;
 
-   extbus: extbus {
-   compatible = "simple-bus";
-   #address-cells = <2>;
-   #size-cells = <1>;
-   };
-
serial0: serial@54006800 {
compatible = "socionext,uniphier-uart";
status = "disabled";
@@ -98,9 +92,17 @@
clocks = <_clk>;
};
 
-   system-bus-controller@58c0 {
-   compatible = "socionext,uniphier-system-bus-controller";
-   reg = <0x58c0 0x400>, <0x5980 0x2000>;
+   system_bus: system-bus@58c0 {
+   compatible = "socionext,uniphier-system-bus";
+   status = "disabled";
+   reg = <0x58c0 0x400>;
+   #address-cells = <2>;
+   #size-cells = <1>;
+   };
+
+   smpctrl@5980 {
+   compatible = "socionext,uniphier-smpctrl";
+   reg = <0x59801000 0x400>;
};
 
timer@6200 {
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi 
b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
index 691a17d..4c746ea 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
@@ -94,12 +94,6 @@
ranges;
interrupt-parent = <>;
 
-   extbus: extbus {
-   compatible = "simple-bus";
-   #address-cells = <2>;
-   #size-cells = <1>;
-   };
-
timer@2200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x2200 0x20>;
@@ -216,9 +210,17 @@
clock-frequency = <40>;
};
 
-   system-bus-controller@58c0 {
-   compatible = "socionext,uniphier-system-bus-controller";
-   reg = <0x58c0 0x400>, <0x5980 0x2000>;
+   system_bus: system-bus@58c0 {
+   compatible = "socionext,uniphier-system-bus";
+   status = "disabled";
+   reg = <0x58c0 0x400>;
+   #address-cells = <2>;
+   #size-cells = <1>;
+   };
+
+   smpctrl@5980 {
+   compatible = "socionext,uniphier-smpctrl";
+   reg = <0x59801000 0x400>;
};
 
usb0: usb@5a800100 {
diff --git a/arch/arm/boot/dts/uniphier-support-card.dtsi 
b/arch/arm/boot/dts/uniphier-support-card.dtsi
index fa807e8..51ecc9b9 100644
--- a/arch/arm/boot/dts/uniphier-support-card.dtsi
+++ b/arch/arm/boot/dts/uniphier-support-card.dtsi
@@ -42,7 +42,8 @@
  * OTHER DEALINGS IN THE SOFTWARE.
  */
 
- {
+_bus {
+   status = "okay";
ranges = <1 0x 0x4200 0x0200>;
 
support_card: support_card {
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi 
b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
index e6871ea..e682a3f 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
@@ -133,12 +133,6 @@
#size-cells = <1>;
ranges = <0 0 0 0x>;
 
-   extbus: extbus {
-   compatible = "simple-bus";
-   #address-cells = <2>;
-   #size-cells = <1>;
-   };
-
serial0: serial@54006800 {
compatible = "socionext,uniphier-uart";
status = "disabled";
@@ -261,6 +255,19 @@
clock-frequency = 

[PATCH 8/9] ARM: dts: uniphier: add PH1-Pro4 Sanji board support

2016-02-25 Thread Masahiro Yamada
Initial commit for PH1-Pro4 Sanji board support.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/boot/dts/Makefile|   1 +
 arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts | 108 ++
 2 files changed, 109 insertions(+)
 create mode 100644 arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d9d899f..f2663ac 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -738,6 +738,7 @@ dtb-$(CONFIG_ARCH_UNIPHIER) += \
uniphier-ph1-ld6b-ref.dtb \
uniphier-ph1-pro4-ace.dtb \
uniphier-ph1-pro4-ref.dtb \
+   uniphier-ph1-pro4-sanji.dtb \
uniphier-ph1-sld3-ref.dtb \
uniphier-ph1-sld8-ref.dtb \
uniphier-proxstream2-gentil.dtb \
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts 
b/arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts
new file mode 100644
index 000..7c3a1fc
--- /dev/null
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts
@@ -0,0 +1,108 @@
+/*
+ * Device Tree Source for UniPhier PH1-Pro4 Sanji Board
+ *
+ * Copyright (C) 2016 Masahiro Yamada 
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+/include/ "uniphier-ph1-pro4.dtsi"
+
+/ {
+   model = "UniPhier PH1-Pro4 Sanji Board";
+   compatible = "socionext,ph1-pro4-sanji", "socionext,ph1-pro4";
+
+   memory {
+   device_type = "memory";
+   reg = <0x8000 0x8000>;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   i2c0 = 
+   i2c1 = 
+   i2c2 = 
+   i2c3 = 
+   i2c5 = 
+   i2c6 = 
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+
+   eeprom@54 {
+   compatible = "st,24c64";
+   reg = <0x54>;
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
-- 
1.9.1



[PATCH 9/9] ARM: dts: uniphier: add @{address} to EEPROM node

2016-02-25 Thread Masahiro Yamada
Just for consistent coding style.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/boot/dts/uniphier-ref-daughter.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/uniphier-ref-daughter.dtsi 
b/arch/arm/boot/dts/uniphier-ref-daughter.dtsi
index 3d29d28..f7df088 100644
--- a/arch/arm/boot/dts/uniphier-ref-daughter.dtsi
+++ b/arch/arm/boot/dts/uniphier-ref-daughter.dtsi
@@ -43,7 +43,7 @@
  */
 
  {
-   eeprom {
+   eeprom@50 {
compatible = "microchip,24lc128";
reg = <0x50>;
};
-- 
1.9.1



[PATCH 1/9] arm64: dts: uniphier: rename PH1-LD10 to PH1-LD20

2016-02-25 Thread Masahiro Yamada
Due to the company's awful projecting, this chip has been renamed to
PH1-LD20.  It has not been shipped yet, this change would have no
impact on our customers.

Signed-off-by: Masahiro Yamada 
---

 arch/arm64/boot/dts/socionext/Makefile| 2 +-
 .../{uniphier-ph1-ld10-ref.dts => uniphier-ph1-ld20-ref.dts}  | 8 
 .../socionext/{uniphier-ph1-ld10.dtsi => uniphier-ph1-ld20.dtsi}  | 6 +++---
 3 files changed, 8 insertions(+), 8 deletions(-)
 rename arch/arm64/boot/dts/socionext/{uniphier-ph1-ld10-ref.dts => 
uniphier-ph1-ld20-ref.dts} (92%)
 rename arch/arm64/boot/dts/socionext/{uniphier-ph1-ld10.dtsi => 
uniphier-ph1-ld20.dtsi} (98%)

diff --git a/arch/arm64/boot/dts/socionext/Makefile 
b/arch/arm64/boot/dts/socionext/Makefile
index 8d72771..299b67e 100644
--- a/arch/arm64/boot/dts/socionext/Makefile
+++ b/arch/arm64/boot/dts/socionext/Makefile
@@ -1,4 +1,4 @@
-dtb-$(CONFIG_ARCH_UNIPHIER) += uniphier-ph1-ld10-ref.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER) += uniphier-ph1-ld20-ref.dtb
 
 always := $(dtb-y)
 clean-files:= *.dtb
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10-ref.dts 
b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts
similarity index 92%
rename from arch/arm64/boot/dts/socionext/uniphier-ph1-ld10-ref.dts
rename to arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts
index 3e53317..80f71ba 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts
@@ -1,5 +1,5 @@
 /*
- * Device Tree Source for UniPhier PH1-LD10 Reference Board
+ * Device Tree Source for UniPhier PH1-LD20 Reference Board
  *
  * Copyright (C) 2015 Masahiro Yamada 
  *
@@ -43,12 +43,12 @@
  */
 
 /dts-v1/;
-/include/ "uniphier-ph1-ld10.dtsi"
+/include/ "uniphier-ph1-ld20.dtsi"
 /include/ "uniphier-support-card.dtsi"
 
 / {
-   model = "UniPhier PH1-LD10 Reference Board";
-   compatible = "socionext,ph1-ld10-ref", "socionext,ph1-ld10";
+   model = "UniPhier PH1-LD20 Reference Board";
+   compatible = "socionext,ph1-ld20-ref", "socionext,ph1-ld20";
 
memory {
device_type = "memory";
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10.dtsi 
b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
similarity index 98%
rename from arch/arm64/boot/dts/socionext/uniphier-ph1-ld10.dtsi
rename to arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
index 0296af9..e6871ea 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
@@ -1,5 +1,5 @@
 /*
- * Device Tree Source for UniPhier PH1-LD10 SoC
+ * Device Tree Source for UniPhier PH1-LD20 SoC
  *
  * Copyright (C) 2015 Masahiro Yamada 
  *
@@ -43,7 +43,7 @@
  */
 
 / {
-   compatible = "socionext,ph1-ld10";
+   compatible = "socionext,ph1-ld20";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <>;
@@ -262,7 +262,7 @@
};
 
pinctrl: pinctrl@5f801000 {
-   compatible = "socionext,ph1-ld10-pinctrl", "syscon";
+   compatible = "socionext,ph1-ld20-pinctrl", "syscon";
reg = <0x5f801000 0xe00>;
};
 
-- 
1.9.1



[PATCH 3/9] ARM: dts: uniphier: rework UniPhier System Bus nodes

2016-02-25 Thread Masahiro Yamada
During the review process of the UniPhier System Bus driver
(drivers/bus/uniphier.c), the current binding of the System Bus
Controller turned out to be no good.  In order to make the driver
really usable, we have to switch over to the new binding defined by
Documentation/devicetree/bindings/bus/uniphier-system-bus.txt.
The old binding will be still supported for a while to keep the
backward compatibility.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/boot/dts/uniphier-common32.dtsi | 20 +++-
 arch/arm/boot/dts/uniphier-ph1-sld3.dtsi | 20 +++-
 arch/arm/boot/dts/uniphier-support-card.dtsi |  3 ++-
 arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi | 19 +--
 4 files changed, 37 insertions(+), 25 deletions(-)

diff --git a/arch/arm/boot/dts/uniphier-common32.dtsi 
b/arch/arm/boot/dts/uniphier-common32.dtsi
index ea9301a..f847e68 100644
--- a/arch/arm/boot/dts/uniphier-common32.dtsi
+++ b/arch/arm/boot/dts/uniphier-common32.dtsi
@@ -52,12 +52,6 @@
ranges;
interrupt-parent = <>;
 
-   extbus: extbus {
-   compatible = "simple-bus";
-   #address-cells = <2>;
-   #size-cells = <1>;
-   };
-
serial0: serial@54006800 {
compatible = "socionext,uniphier-uart";
status = "disabled";
@@ -98,9 +92,17 @@
clocks = <_clk>;
};
 
-   system-bus-controller@58c0 {
-   compatible = "socionext,uniphier-system-bus-controller";
-   reg = <0x58c0 0x400>, <0x5980 0x2000>;
+   system_bus: system-bus@58c0 {
+   compatible = "socionext,uniphier-system-bus";
+   status = "disabled";
+   reg = <0x58c0 0x400>;
+   #address-cells = <2>;
+   #size-cells = <1>;
+   };
+
+   smpctrl@5980 {
+   compatible = "socionext,uniphier-smpctrl";
+   reg = <0x59801000 0x400>;
};
 
timer@6200 {
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi 
b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
index 691a17d..4c746ea 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
@@ -94,12 +94,6 @@
ranges;
interrupt-parent = <>;
 
-   extbus: extbus {
-   compatible = "simple-bus";
-   #address-cells = <2>;
-   #size-cells = <1>;
-   };
-
timer@2200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x2200 0x20>;
@@ -216,9 +210,17 @@
clock-frequency = <40>;
};
 
-   system-bus-controller@58c0 {
-   compatible = "socionext,uniphier-system-bus-controller";
-   reg = <0x58c0 0x400>, <0x5980 0x2000>;
+   system_bus: system-bus@58c0 {
+   compatible = "socionext,uniphier-system-bus";
+   status = "disabled";
+   reg = <0x58c0 0x400>;
+   #address-cells = <2>;
+   #size-cells = <1>;
+   };
+
+   smpctrl@5980 {
+   compatible = "socionext,uniphier-smpctrl";
+   reg = <0x59801000 0x400>;
};
 
usb0: usb@5a800100 {
diff --git a/arch/arm/boot/dts/uniphier-support-card.dtsi 
b/arch/arm/boot/dts/uniphier-support-card.dtsi
index fa807e8..51ecc9b9 100644
--- a/arch/arm/boot/dts/uniphier-support-card.dtsi
+++ b/arch/arm/boot/dts/uniphier-support-card.dtsi
@@ -42,7 +42,8 @@
  * OTHER DEALINGS IN THE SOFTWARE.
  */
 
- {
+_bus {
+   status = "okay";
ranges = <1 0x 0x4200 0x0200>;
 
support_card: support_card {
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi 
b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
index e6871ea..e682a3f 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
@@ -133,12 +133,6 @@
#size-cells = <1>;
ranges = <0 0 0 0x>;
 
-   extbus: extbus {
-   compatible = "simple-bus";
-   #address-cells = <2>;
-   #size-cells = <1>;
-   };
-
serial0: serial@54006800 {
compatible = "socionext,uniphier-uart";
status = "disabled";
@@ -261,6 +255,19 @@
clock-frequency = <40>;
};
 
+

[PATCH 8/9] ARM: dts: uniphier: add PH1-Pro4 Sanji board support

2016-02-25 Thread Masahiro Yamada
Initial commit for PH1-Pro4 Sanji board support.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/boot/dts/Makefile|   1 +
 arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts | 108 ++
 2 files changed, 109 insertions(+)
 create mode 100644 arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d9d899f..f2663ac 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -738,6 +738,7 @@ dtb-$(CONFIG_ARCH_UNIPHIER) += \
uniphier-ph1-ld6b-ref.dtb \
uniphier-ph1-pro4-ace.dtb \
uniphier-ph1-pro4-ref.dtb \
+   uniphier-ph1-pro4-sanji.dtb \
uniphier-ph1-sld3-ref.dtb \
uniphier-ph1-sld8-ref.dtb \
uniphier-proxstream2-gentil.dtb \
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts 
b/arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts
new file mode 100644
index 000..7c3a1fc
--- /dev/null
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts
@@ -0,0 +1,108 @@
+/*
+ * Device Tree Source for UniPhier PH1-Pro4 Sanji Board
+ *
+ * Copyright (C) 2016 Masahiro Yamada 
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+/include/ "uniphier-ph1-pro4.dtsi"
+
+/ {
+   model = "UniPhier PH1-Pro4 Sanji Board";
+   compatible = "socionext,ph1-pro4-sanji", "socionext,ph1-pro4";
+
+   memory {
+   device_type = "memory";
+   reg = <0x8000 0x8000>;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   i2c0 = 
+   i2c1 = 
+   i2c2 = 
+   i2c3 = 
+   i2c5 = 
+   i2c6 = 
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+
+   eeprom@54 {
+   compatible = "st,24c64";
+   reg = <0x54>;
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
-- 
1.9.1



[PATCH 9/9] ARM: dts: uniphier: add @{address} to EEPROM node

2016-02-25 Thread Masahiro Yamada
Just for consistent coding style.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/boot/dts/uniphier-ref-daughter.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/uniphier-ref-daughter.dtsi 
b/arch/arm/boot/dts/uniphier-ref-daughter.dtsi
index 3d29d28..f7df088 100644
--- a/arch/arm/boot/dts/uniphier-ref-daughter.dtsi
+++ b/arch/arm/boot/dts/uniphier-ref-daughter.dtsi
@@ -43,7 +43,7 @@
  */
 
  {
-   eeprom {
+   eeprom@50 {
compatible = "microchip,24lc128";
reg = <0x50>;
};
-- 
1.9.1



[PATCH 1/9] arm64: dts: uniphier: rename PH1-LD10 to PH1-LD20

2016-02-25 Thread Masahiro Yamada
Due to the company's awful projecting, this chip has been renamed to
PH1-LD20.  It has not been shipped yet, this change would have no
impact on our customers.

Signed-off-by: Masahiro Yamada 
---

 arch/arm64/boot/dts/socionext/Makefile| 2 +-
 .../{uniphier-ph1-ld10-ref.dts => uniphier-ph1-ld20-ref.dts}  | 8 
 .../socionext/{uniphier-ph1-ld10.dtsi => uniphier-ph1-ld20.dtsi}  | 6 +++---
 3 files changed, 8 insertions(+), 8 deletions(-)
 rename arch/arm64/boot/dts/socionext/{uniphier-ph1-ld10-ref.dts => 
uniphier-ph1-ld20-ref.dts} (92%)
 rename arch/arm64/boot/dts/socionext/{uniphier-ph1-ld10.dtsi => 
uniphier-ph1-ld20.dtsi} (98%)

diff --git a/arch/arm64/boot/dts/socionext/Makefile 
b/arch/arm64/boot/dts/socionext/Makefile
index 8d72771..299b67e 100644
--- a/arch/arm64/boot/dts/socionext/Makefile
+++ b/arch/arm64/boot/dts/socionext/Makefile
@@ -1,4 +1,4 @@
-dtb-$(CONFIG_ARCH_UNIPHIER) += uniphier-ph1-ld10-ref.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER) += uniphier-ph1-ld20-ref.dtb
 
 always := $(dtb-y)
 clean-files:= *.dtb
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10-ref.dts 
b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts
similarity index 92%
rename from arch/arm64/boot/dts/socionext/uniphier-ph1-ld10-ref.dts
rename to arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts
index 3e53317..80f71ba 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts
@@ -1,5 +1,5 @@
 /*
- * Device Tree Source for UniPhier PH1-LD10 Reference Board
+ * Device Tree Source for UniPhier PH1-LD20 Reference Board
  *
  * Copyright (C) 2015 Masahiro Yamada 
  *
@@ -43,12 +43,12 @@
  */
 
 /dts-v1/;
-/include/ "uniphier-ph1-ld10.dtsi"
+/include/ "uniphier-ph1-ld20.dtsi"
 /include/ "uniphier-support-card.dtsi"
 
 / {
-   model = "UniPhier PH1-LD10 Reference Board";
-   compatible = "socionext,ph1-ld10-ref", "socionext,ph1-ld10";
+   model = "UniPhier PH1-LD20 Reference Board";
+   compatible = "socionext,ph1-ld20-ref", "socionext,ph1-ld20";
 
memory {
device_type = "memory";
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10.dtsi 
b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
similarity index 98%
rename from arch/arm64/boot/dts/socionext/uniphier-ph1-ld10.dtsi
rename to arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
index 0296af9..e6871ea 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
@@ -1,5 +1,5 @@
 /*
- * Device Tree Source for UniPhier PH1-LD10 SoC
+ * Device Tree Source for UniPhier PH1-LD20 SoC
  *
  * Copyright (C) 2015 Masahiro Yamada 
  *
@@ -43,7 +43,7 @@
  */
 
 / {
-   compatible = "socionext,ph1-ld10";
+   compatible = "socionext,ph1-ld20";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <>;
@@ -262,7 +262,7 @@
};
 
pinctrl: pinctrl@5f801000 {
-   compatible = "socionext,ph1-ld10-pinctrl", "syscon";
+   compatible = "socionext,ph1-ld20-pinctrl", "syscon";
reg = <0x5f801000 0xe00>;
};
 
-- 
1.9.1



Re: [PATCH, RESEND] ssb: host_soc depends on sprom

2016-02-25 Thread Kalle Valo
Arnd Bergmann  writes:

> Drivers that use the SSB sprom functionality typically 'select SSB_SPROM'
> from Kconfig, but CONFIG_SSB_HOST_SOC misses this, which results in
> a build failure unless at least one of the other drivers that selects
> it is enabled:
>
> drivers/built-in.o: In function `ssb_host_soc_get_invariants':
> (.text+0x459494): undefined reference to `ssb_fill_sprom_with_fallback'
>
> This adds the same select statement that is used elsewhere.
>
> Signed-off-by: Arnd Bergmann 
> Fixes: 541c9a84cd85 ("ssb: pick SoC invariants code from MIPS BCM47xx arch")

I'm planning to queue this to 4.5.

-- 
Kalle Valo


Re: [PATCH, RESEND] ssb: host_soc depends on sprom

2016-02-25 Thread Kalle Valo
Arnd Bergmann  writes:

> Drivers that use the SSB sprom functionality typically 'select SSB_SPROM'
> from Kconfig, but CONFIG_SSB_HOST_SOC misses this, which results in
> a build failure unless at least one of the other drivers that selects
> it is enabled:
>
> drivers/built-in.o: In function `ssb_host_soc_get_invariants':
> (.text+0x459494): undefined reference to `ssb_fill_sprom_with_fallback'
>
> This adds the same select statement that is used elsewhere.
>
> Signed-off-by: Arnd Bergmann 
> Fixes: 541c9a84cd85 ("ssb: pick SoC invariants code from MIPS BCM47xx arch")

I'm planning to queue this to 4.5.

-- 
Kalle Valo


[PATCH 1/2] ARM: uniphier: add missing of_node_put()

2016-02-25 Thread Masahiro Yamada
This node pointer is allocated by of_find_compatible_node() in this
function.  It should be put before exitting this function.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/mach-uniphier/platsmp.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-uniphier/platsmp.c b/arch/arm/mach-uniphier/platsmp.c
index e1cfc1d..8d988f5 100644
--- a/arch/arm/mach-uniphier/platsmp.c
+++ b/arch/arm/mach-uniphier/platsmp.c
@@ -100,6 +100,7 @@ static int __init uniphier_smp_prepare_trampoline(unsigned 
int max_cpus)
 
np = of_find_compatible_node(NULL, NULL,
"socionext,uniphier-system-bus-controller");
+   of_node_put(np);
ret = of_address_to_resource(np, 1, );
if (ret) {
pr_err("failed to get resource of system-bus-controller\n");
-- 
1.9.1



[PATCH 2/2] ARM: uniphier: rework SMP code to support new System Bus binding

2016-02-25 Thread Masahiro Yamada
During the review process of the UniPhier System Bus driver
(drivers/bus/uniphier.c), the current binding of the System Bus
Controller turned out to be no good.  In order to use the driver,
some nodes in the device trees must be tweaked.  It would also have
impacts on the SMP code because the SMP related registers are
located in the System Bus Controller block.  This commit reworks
the smp_operations to support the new binding, but still supports
the old binding, too.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/mach-uniphier/platsmp.c | 25 -
 1 file changed, 16 insertions(+), 9 deletions(-)

diff --git a/arch/arm/mach-uniphier/platsmp.c b/arch/arm/mach-uniphier/platsmp.c
index 8d988f5..6914135 100644
--- a/arch/arm/mach-uniphier/platsmp.c
+++ b/arch/arm/mach-uniphier/platsmp.c
@@ -30,7 +30,7 @@
  * The secondary CPUs check this register from the boot ROM for the jump
  * destination.  After that, it can be reused as a scratch register.
  */
-#define UNIPHIER_SBC_ROM_BOOT_RSV2 0x1208
+#define UNIPHIER_SMPCTRL_ROM_RSV2  0x208
 
 static void __iomem *uniphier_smp_rom_boot_rsv2;
 static unsigned int uniphier_smp_max_cpus;
@@ -98,17 +98,24 @@ static int __init uniphier_smp_prepare_trampoline(unsigned 
int max_cpus)
phys_addr_t rom_rsv2_phys;
int ret;
 
-   np = of_find_compatible_node(NULL, NULL,
-   "socionext,uniphier-system-bus-controller");
+   np = of_find_compatible_node(NULL, NULL, "socionext,uniphier-smpctrl");
of_node_put(np);
-   ret = of_address_to_resource(np, 1, );
-   if (ret) {
-   pr_err("failed to get resource of system-bus-controller\n");
-   return ret;
+   ret = of_address_to_resource(np, 0, );
+   if (!ret) {
+   rom_rsv2_phys = res.start + UNIPHIER_SMPCTRL_ROM_RSV2;
+   } else {
+   /* try old binding too */
+   np = of_find_compatible_node(NULL, NULL,
+
"socionext,uniphier-system-bus-controller");
+   of_node_put(np);
+   ret = of_address_to_resource(np, 1, );
+   if (ret) {
+   pr_err("failed to get resource of SMP control\n");
+   return ret;
+   }
+   rom_rsv2_phys = res.start + 0x1000 + UNIPHIER_SMPCTRL_ROM_RSV2;
}
 
-   rom_rsv2_phys = res.start + UNIPHIER_SBC_ROM_BOOT_RSV2;
-
ret = uniphier_smp_copy_trampoline(rom_rsv2_phys);
if (ret)
return ret;
-- 
1.9.1



[PATCH 1/2] ARM: uniphier: add missing of_node_put()

2016-02-25 Thread Masahiro Yamada
This node pointer is allocated by of_find_compatible_node() in this
function.  It should be put before exitting this function.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/mach-uniphier/platsmp.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-uniphier/platsmp.c b/arch/arm/mach-uniphier/platsmp.c
index e1cfc1d..8d988f5 100644
--- a/arch/arm/mach-uniphier/platsmp.c
+++ b/arch/arm/mach-uniphier/platsmp.c
@@ -100,6 +100,7 @@ static int __init uniphier_smp_prepare_trampoline(unsigned 
int max_cpus)
 
np = of_find_compatible_node(NULL, NULL,
"socionext,uniphier-system-bus-controller");
+   of_node_put(np);
ret = of_address_to_resource(np, 1, );
if (ret) {
pr_err("failed to get resource of system-bus-controller\n");
-- 
1.9.1



[PATCH 2/2] ARM: uniphier: rework SMP code to support new System Bus binding

2016-02-25 Thread Masahiro Yamada
During the review process of the UniPhier System Bus driver
(drivers/bus/uniphier.c), the current binding of the System Bus
Controller turned out to be no good.  In order to use the driver,
some nodes in the device trees must be tweaked.  It would also have
impacts on the SMP code because the SMP related registers are
located in the System Bus Controller block.  This commit reworks
the smp_operations to support the new binding, but still supports
the old binding, too.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/mach-uniphier/platsmp.c | 25 -
 1 file changed, 16 insertions(+), 9 deletions(-)

diff --git a/arch/arm/mach-uniphier/platsmp.c b/arch/arm/mach-uniphier/platsmp.c
index 8d988f5..6914135 100644
--- a/arch/arm/mach-uniphier/platsmp.c
+++ b/arch/arm/mach-uniphier/platsmp.c
@@ -30,7 +30,7 @@
  * The secondary CPUs check this register from the boot ROM for the jump
  * destination.  After that, it can be reused as a scratch register.
  */
-#define UNIPHIER_SBC_ROM_BOOT_RSV2 0x1208
+#define UNIPHIER_SMPCTRL_ROM_RSV2  0x208
 
 static void __iomem *uniphier_smp_rom_boot_rsv2;
 static unsigned int uniphier_smp_max_cpus;
@@ -98,17 +98,24 @@ static int __init uniphier_smp_prepare_trampoline(unsigned 
int max_cpus)
phys_addr_t rom_rsv2_phys;
int ret;
 
-   np = of_find_compatible_node(NULL, NULL,
-   "socionext,uniphier-system-bus-controller");
+   np = of_find_compatible_node(NULL, NULL, "socionext,uniphier-smpctrl");
of_node_put(np);
-   ret = of_address_to_resource(np, 1, );
-   if (ret) {
-   pr_err("failed to get resource of system-bus-controller\n");
-   return ret;
+   ret = of_address_to_resource(np, 0, );
+   if (!ret) {
+   rom_rsv2_phys = res.start + UNIPHIER_SMPCTRL_ROM_RSV2;
+   } else {
+   /* try old binding too */
+   np = of_find_compatible_node(NULL, NULL,
+
"socionext,uniphier-system-bus-controller");
+   of_node_put(np);
+   ret = of_address_to_resource(np, 1, );
+   if (ret) {
+   pr_err("failed to get resource of SMP control\n");
+   return ret;
+   }
+   rom_rsv2_phys = res.start + 0x1000 + UNIPHIER_SMPCTRL_ROM_RSV2;
}
 
-   rom_rsv2_phys = res.start + UNIPHIER_SBC_ROM_BOOT_RSV2;
-
ret = uniphier_smp_copy_trampoline(rom_rsv2_phys);
if (ret)
return ret;
-- 
1.9.1



[PATCH 0/2] ARM: uniphier: UniPhier updates for Linux 4.6-rc1 (2nd round)

2016-02-25 Thread Masahiro Yamada
Hi Olof,

Here is a small patch series for UniPhier SoC updates.



Masahiro Yamada (2):
  ARM: uniphier: add missing of_node_put()
  ARM: uniphier: rework SMP code to support new System Bus binding

 arch/arm/mach-uniphier/platsmp.c | 26 +-
 1 file changed, 17 insertions(+), 9 deletions(-)

-- 
1.9.1



[PATCH 0/2] ARM: uniphier: UniPhier updates for Linux 4.6-rc1 (2nd round)

2016-02-25 Thread Masahiro Yamada
Hi Olof,

Here is a small patch series for UniPhier SoC updates.



Masahiro Yamada (2):
  ARM: uniphier: add missing of_node_put()
  ARM: uniphier: rework SMP code to support new System Bus binding

 arch/arm/mach-uniphier/platsmp.c | 26 +-
 1 file changed, 17 insertions(+), 9 deletions(-)

-- 
1.9.1



Re: [PATCH, RESEND] ssb: host_soc depends on sprom

2016-02-25 Thread Kalle Valo
Arnd Bergmann  writes:

> Drivers that use the SSB sprom functionality typically 'select SSB_SPROM'
> from Kconfig, but CONFIG_SSB_HOST_SOC misses this, which results in
> a build failure unless at least one of the other drivers that selects
> it is enabled:
>
> drivers/built-in.o: In function `ssb_host_soc_get_invariants':
> (.text+0x459494): undefined reference to `ssb_fill_sprom_with_fallback'
>
> This adds the same select statement that is used elsewhere.
>
> Signed-off-by: Arnd Bergmann 
> Fixes: 541c9a84cd85 ("ssb: pick SoC invariants code from MIPS BCM47xx arch")
> ---
>  drivers/ssb/Kconfig | 1 +
>  1 file changed, 1 insertion(+)
>
> I just noticed this hasn't shown up in linux-next yet, so I'm resending
> it to ensure it's still on someone's radar. Please ignore the resend
> if it's already in a tree that is not part of linux-next but will
> be merged eventually.
>
> See https://patchwork.linux-mips.org/patch/12091/ for the original
> submission.

Sorry, I didn't notice that linux-wireless was not CCed and I missed the
patch because it was not in my patchwork queue. But the patch is now
there and I should get to it in few days:

https://patchwork.kernel.org/patch/8426571/

-- 
Kalle Valo


Re: [PATCH, RESEND] ssb: host_soc depends on sprom

2016-02-25 Thread Kalle Valo
Arnd Bergmann  writes:

> Drivers that use the SSB sprom functionality typically 'select SSB_SPROM'
> from Kconfig, but CONFIG_SSB_HOST_SOC misses this, which results in
> a build failure unless at least one of the other drivers that selects
> it is enabled:
>
> drivers/built-in.o: In function `ssb_host_soc_get_invariants':
> (.text+0x459494): undefined reference to `ssb_fill_sprom_with_fallback'
>
> This adds the same select statement that is used elsewhere.
>
> Signed-off-by: Arnd Bergmann 
> Fixes: 541c9a84cd85 ("ssb: pick SoC invariants code from MIPS BCM47xx arch")
> ---
>  drivers/ssb/Kconfig | 1 +
>  1 file changed, 1 insertion(+)
>
> I just noticed this hasn't shown up in linux-next yet, so I'm resending
> it to ensure it's still on someone's radar. Please ignore the resend
> if it's already in a tree that is not part of linux-next but will
> be merged eventually.
>
> See https://patchwork.linux-mips.org/patch/12091/ for the original
> submission.

Sorry, I didn't notice that linux-wireless was not CCed and I missed the
patch because it was not in my patchwork queue. But the patch is now
there and I should get to it in few days:

https://patchwork.kernel.org/patch/8426571/

-- 
Kalle Valo


[PATCH 05/25] staging/lustre: Remove unused lustre_build_lock_params()

2016-02-25 Thread green
From: Oleg Drokin 

And also struct lustre_rw_params that is only referenced by it.

Signed-off-by: Oleg Drokin 
---
 .../staging/lustre/lustre/include/lustre_lite.h| 48 --
 1 file changed, 48 deletions(-)

diff --git a/drivers/staging/lustre/lustre/include/lustre_lite.h 
b/drivers/staging/lustre/lustre/include/lustre_lite.h
index f6d7aae..9852325 100644
--- a/drivers/staging/lustre/lustre/include/lustre_lite.h
+++ b/drivers/staging/lustre/lustre/include/lustre_lite.h
@@ -53,54 +53,6 @@
 #define LL_MAX_BLKSIZE_BITS (22)
 #define LL_MAX_BLKSIZE   (1UL<lrp_lock_mode = (cmd == OBD_BRW_READ) ? LCK_PR : LCK_PW;
-   params->lrp_brw_flags = 0;
-
-   params->lrp_policy.l_extent.start = pos;
-   params->lrp_policy.l_extent.end = pos + len - 1;
-   /*
-* for now O_APPEND always takes local locks.
-*/
-   if (cmd == OBD_BRW_WRITE && (open_flags & O_APPEND)) {
-   params->lrp_policy.l_extent.start = 0;
-   params->lrp_policy.l_extent.end   = OBD_OBJECT_EOF;
-   } else if (LIBLUSTRE_CLIENT && (connect_flags & OBD_CONNECT_SRVLOCK)) {
-   /*
-* liblustre: OST-side locking for all non-O_APPEND
-* reads/writes.
-*/
-   params->lrp_lock_mode = LCK_NL;
-   params->lrp_brw_flags = OBD_BRW_SRVLOCK;
-   } else {
-   /*
-* nothing special for the kernel. In the future llite may use
-* OST-side locks for small writes into highly contended
-* files.
-*/
-   }
-   params->lrp_ast_flags = (open_flags & O_NONBLOCK) ?
-   LDLM_FL_BLOCK_NOWAIT : 0;
-}
-
 /*
  * This is embedded into liblustre and llite super-blocks to keep track of
  * connect flags (capabilities) supported by all imports given mount is
-- 
2.1.0



[PATCH 05/25] staging/lustre: Remove unused lustre_build_lock_params()

2016-02-25 Thread green
From: Oleg Drokin 

And also struct lustre_rw_params that is only referenced by it.

Signed-off-by: Oleg Drokin 
---
 .../staging/lustre/lustre/include/lustre_lite.h| 48 --
 1 file changed, 48 deletions(-)

diff --git a/drivers/staging/lustre/lustre/include/lustre_lite.h 
b/drivers/staging/lustre/lustre/include/lustre_lite.h
index f6d7aae..9852325 100644
--- a/drivers/staging/lustre/lustre/include/lustre_lite.h
+++ b/drivers/staging/lustre/lustre/include/lustre_lite.h
@@ -53,54 +53,6 @@
 #define LL_MAX_BLKSIZE_BITS (22)
 #define LL_MAX_BLKSIZE   (1ULlrp_brw_flags = 0;
-
-   params->lrp_policy.l_extent.start = pos;
-   params->lrp_policy.l_extent.end = pos + len - 1;
-   /*
-* for now O_APPEND always takes local locks.
-*/
-   if (cmd == OBD_BRW_WRITE && (open_flags & O_APPEND)) {
-   params->lrp_policy.l_extent.start = 0;
-   params->lrp_policy.l_extent.end   = OBD_OBJECT_EOF;
-   } else if (LIBLUSTRE_CLIENT && (connect_flags & OBD_CONNECT_SRVLOCK)) {
-   /*
-* liblustre: OST-side locking for all non-O_APPEND
-* reads/writes.
-*/
-   params->lrp_lock_mode = LCK_NL;
-   params->lrp_brw_flags = OBD_BRW_SRVLOCK;
-   } else {
-   /*
-* nothing special for the kernel. In the future llite may use
-* OST-side locks for small writes into highly contended
-* files.
-*/
-   }
-   params->lrp_ast_flags = (open_flags & O_NONBLOCK) ?
-   LDLM_FL_BLOCK_NOWAIT : 0;
-}
-
 /*
  * This is embedded into liblustre and llite super-blocks to keep track of
  * connect flags (capabilities) supported by all imports given mount is
-- 
2.1.0



[PATCH 02/25] staging/lustre/include: Fix style of function declarations

2016-02-25 Thread green
From: Oleg Drokin 

This mostly fixes checkpatch complaints about
"Alignment should match open parenthesis" and
"space prohibited between function name and open parenthesis"

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/include/cl_object.h  | 410 ++---
 .../staging/lustre/lustre/include/lprocfs_status.h |   6 +-
 .../lustre/lustre/include/lustre/lustre_idl.h  |  10 +-
 drivers/staging/lustre/lustre/include/lustre_fid.h |   2 +-
 drivers/staging/lustre/lustre/include/lustre_net.h |  19 +-
 .../lustre/lustre/include/lustre_req_layout.h  |   4 +-
 drivers/staging/lustre/lustre/include/lustre_sec.h | 128 +++
 drivers/staging/lustre/lustre/include/obd.h|   6 +-
 drivers/staging/lustre/lustre/include/obd_class.h  |  14 +-
 9 files changed, 281 insertions(+), 318 deletions(-)

diff --git a/drivers/staging/lustre/lustre/include/cl_object.h 
b/drivers/staging/lustre/lustre/include/cl_object.h
index 2a77ea2f8..4b3055d 100644
--- a/drivers/staging/lustre/lustre/include/cl_object.h
+++ b/drivers/staging/lustre/lustre/include/cl_object.h
@@ -322,7 +322,7 @@ struct cl_object_operations {
 *   to be used instead of newly created.
 */
int  (*coo_page_init)(const struct lu_env *env, struct cl_object *obj,
-   struct cl_page *page, struct page *vmpage);
+ struct cl_page *page, struct page *vmpage);
/**
 * Initialize lock slice for this layer. Called top-to-bottom through
 * every object layer when a new cl_lock is instantiated. Layer
@@ -849,7 +849,7 @@ struct cl_page_operations {
 * \return the underlying VM page. Optional.
 */
struct page *(*cpo_vmpage)(const struct lu_env *env,
- const struct cl_page_slice *slice);
+  const struct cl_page_slice *slice);
/**
 * Called when \a io acquires this page into the exclusive
 * ownership. When this method returns, it is guaranteed that the is
@@ -2051,8 +2051,8 @@ struct cl_io_operations {
 *
 * \see cl_io_operations::cio_iter_fini()
 */
-   int (*cio_iter_init) (const struct lu_env *env,
- const struct cl_io_slice *slice);
+   int (*cio_iter_init)(const struct lu_env *env,
+const struct cl_io_slice *slice);
/**
 * Finalize io iteration.
 *
@@ -2062,8 +2062,8 @@ struct cl_io_operations {
 *
 * \see cl_io_operations::cio_iter_init()
 */
-   void (*cio_iter_fini) (const struct lu_env *env,
-  const struct cl_io_slice *slice);
+   void (*cio_iter_fini)(const struct lu_env *env,
+ const struct cl_io_slice *slice);
/**
 * Collect locks for the current iteration of io.
 *
@@ -2073,8 +2073,8 @@ struct cl_io_operations {
 * cl_io_lock_add(). Once all locks are collected, they are
 * sorted and enqueued in the proper order.
 */
-   int  (*cio_lock) (const struct lu_env *env,
- const struct cl_io_slice *slice);
+   int  (*cio_lock)(const struct lu_env *env,
+const struct cl_io_slice *slice);
/**
 * Finalize unlocking.
 *
@@ -2099,8 +2099,8 @@ struct cl_io_operations {
 * Called top-to-bottom at the end of io loop. Here layer
 * might wait for an unfinished asynchronous io.
 */
-   void (*cio_end)  (const struct lu_env *env,
- const struct cl_io_slice *slice);
+   void (*cio_end)(const struct lu_env *env,
+   const struct cl_io_slice *slice);
/**
 * Called bottom-to-top to notify layers that read/write IO
 * iteration finished, with \a nob bytes transferred.
@@ -2111,8 +2111,8 @@ struct cl_io_operations {
/**
 * Called once per io, bottom-to-top to release io resources.
 */
-   void (*cio_fini) (const struct lu_env *env,
- const struct cl_io_slice *slice);
+   void (*cio_fini)(const struct lu_env *env,
+const struct cl_io_slice *slice);
} op[CIT_OP_NR];
struct {
/**
@@ -2232,7 +2232,7 @@ struct cl_io_lock_link {
struct cl_lock  *cill_lock;
/** optional destructor */
void   (*cill_fini)(const struct lu_env *env,
-  

[PATCH 02/25] staging/lustre/include: Fix style of function declarations

2016-02-25 Thread green
From: Oleg Drokin 

This mostly fixes checkpatch complaints about
"Alignment should match open parenthesis" and
"space prohibited between function name and open parenthesis"

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/include/cl_object.h  | 410 ++---
 .../staging/lustre/lustre/include/lprocfs_status.h |   6 +-
 .../lustre/lustre/include/lustre/lustre_idl.h  |  10 +-
 drivers/staging/lustre/lustre/include/lustre_fid.h |   2 +-
 drivers/staging/lustre/lustre/include/lustre_net.h |  19 +-
 .../lustre/lustre/include/lustre_req_layout.h  |   4 +-
 drivers/staging/lustre/lustre/include/lustre_sec.h | 128 +++
 drivers/staging/lustre/lustre/include/obd.h|   6 +-
 drivers/staging/lustre/lustre/include/obd_class.h  |  14 +-
 9 files changed, 281 insertions(+), 318 deletions(-)

diff --git a/drivers/staging/lustre/lustre/include/cl_object.h 
b/drivers/staging/lustre/lustre/include/cl_object.h
index 2a77ea2f8..4b3055d 100644
--- a/drivers/staging/lustre/lustre/include/cl_object.h
+++ b/drivers/staging/lustre/lustre/include/cl_object.h
@@ -322,7 +322,7 @@ struct cl_object_operations {
 *   to be used instead of newly created.
 */
int  (*coo_page_init)(const struct lu_env *env, struct cl_object *obj,
-   struct cl_page *page, struct page *vmpage);
+ struct cl_page *page, struct page *vmpage);
/**
 * Initialize lock slice for this layer. Called top-to-bottom through
 * every object layer when a new cl_lock is instantiated. Layer
@@ -849,7 +849,7 @@ struct cl_page_operations {
 * \return the underlying VM page. Optional.
 */
struct page *(*cpo_vmpage)(const struct lu_env *env,
- const struct cl_page_slice *slice);
+  const struct cl_page_slice *slice);
/**
 * Called when \a io acquires this page into the exclusive
 * ownership. When this method returns, it is guaranteed that the is
@@ -2051,8 +2051,8 @@ struct cl_io_operations {
 *
 * \see cl_io_operations::cio_iter_fini()
 */
-   int (*cio_iter_init) (const struct lu_env *env,
- const struct cl_io_slice *slice);
+   int (*cio_iter_init)(const struct lu_env *env,
+const struct cl_io_slice *slice);
/**
 * Finalize io iteration.
 *
@@ -2062,8 +2062,8 @@ struct cl_io_operations {
 *
 * \see cl_io_operations::cio_iter_init()
 */
-   void (*cio_iter_fini) (const struct lu_env *env,
-  const struct cl_io_slice *slice);
+   void (*cio_iter_fini)(const struct lu_env *env,
+ const struct cl_io_slice *slice);
/**
 * Collect locks for the current iteration of io.
 *
@@ -2073,8 +2073,8 @@ struct cl_io_operations {
 * cl_io_lock_add(). Once all locks are collected, they are
 * sorted and enqueued in the proper order.
 */
-   int  (*cio_lock) (const struct lu_env *env,
- const struct cl_io_slice *slice);
+   int  (*cio_lock)(const struct lu_env *env,
+const struct cl_io_slice *slice);
/**
 * Finalize unlocking.
 *
@@ -2099,8 +2099,8 @@ struct cl_io_operations {
 * Called top-to-bottom at the end of io loop. Here layer
 * might wait for an unfinished asynchronous io.
 */
-   void (*cio_end)  (const struct lu_env *env,
- const struct cl_io_slice *slice);
+   void (*cio_end)(const struct lu_env *env,
+   const struct cl_io_slice *slice);
/**
 * Called bottom-to-top to notify layers that read/write IO
 * iteration finished, with \a nob bytes transferred.
@@ -2111,8 +2111,8 @@ struct cl_io_operations {
/**
 * Called once per io, bottom-to-top to release io resources.
 */
-   void (*cio_fini) (const struct lu_env *env,
- const struct cl_io_slice *slice);
+   void (*cio_fini)(const struct lu_env *env,
+const struct cl_io_slice *slice);
} op[CIT_OP_NR];
struct {
/**
@@ -2232,7 +2232,7 @@ struct cl_io_lock_link {
struct cl_lock  *cill_lock;
/** optional destructor */
void   (*cill_fini)(const struct lu_env *env,
-   struct cl_io_lock_link *link);
+   

[PATCH 07/25] staging/lustre: Remove misleading liblustre comments.

2016-02-25 Thread green
From: Oleg Drokin 

These two comments certainly refer to some ifdefed code that is
no longer present, so remove them too.

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/lov/lov_pool.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/staging/lustre/lustre/lov/lov_pool.c 
b/drivers/staging/lustre/lustre/lov/lov_pool.c
index 210304f..8608b09 100644
--- a/drivers/staging/lustre/lustre/lov/lov_pool.c
+++ b/drivers/staging/lustre/lustre/lov/lov_pool.c
@@ -152,7 +152,6 @@ struct cfs_hash_ops pool_hash_operations = {
 
 };
 
-/* ifdef needed for liblustre support */
 /*
  * pool debugfs seq_file methods
  */
@@ -432,7 +431,6 @@ int lov_pool_new(struct obd_device *obd, char *poolname)
 
INIT_HLIST_NODE(_pool->pool_hash);
 
-   /* we need this assert seq_file is not implemented for liblustre */
/* get ref for debugfs file */
lov_pool_getref(new_pool);
new_pool->pool_debugfs_entry = ldebugfs_add_simple(
-- 
2.1.0



[PATCH 03/25] staging/lustre/fld: Fix style vs open parenthesis alignment

2016-02-25 Thread green
From: Oleg Drokin 

This mostly fixes checkpatch complaints about
"Alignment should match open parenthesis"

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/fld/fld_cache.c   | 14 +++---
 drivers/staging/lustre/lustre/fld/fld_request.c | 17 +++--
 drivers/staging/lustre/lustre/fld/lproc_fld.c   |  3 +--
 3 files changed, 15 insertions(+), 19 deletions(-)

diff --git a/drivers/staging/lustre/lustre/fld/fld_cache.c 
b/drivers/staging/lustre/lustre/fld/fld_cache.c
index 2b09b76..062f388 100644
--- a/drivers/staging/lustre/lustre/fld/fld_cache.c
+++ b/drivers/staging/lustre/lustre/fld/fld_cache.c
@@ -233,7 +233,7 @@ static int fld_cache_shrink(struct fld_cache *cache)
}
 
CDEBUG(D_INFO, "%s: FLD cache - Shrunk by %d entries\n",
-   cache->fci_name, num);
+  cache->fci_name, num);
 
return 0;
 }
@@ -294,8 +294,8 @@ static void fld_cache_punch_hole(struct fld_cache *cache,
  * handle range overlap in fld cache.
  */
 static void fld_cache_overlap_handle(struct fld_cache *cache,
-   struct fld_cache_entry *f_curr,
-   struct fld_cache_entry *f_new)
+struct fld_cache_entry *f_curr,
+struct fld_cache_entry *f_new)
 {
const struct lu_seq_range *range = _new->fce_range;
const u64 new_start  = range->lsr_start;
@@ -402,8 +402,8 @@ static int fld_cache_insert_nolock(struct fld_cache *cache,
list_for_each_entry_safe(f_curr, n, head, fce_list) {
/* add list if next is end of list */
if (new_end < f_curr->fce_range.lsr_start ||
-  (new_end == f_curr->fce_range.lsr_start &&
-   new_flags != f_curr->fce_range.lsr_flags))
+   (new_end == f_curr->fce_range.lsr_start &&
+new_flags != f_curr->fce_range.lsr_flags))
break;
 
prev = _curr->fce_list;
@@ -460,8 +460,8 @@ struct fld_cache_entry
head = >fci_entries_head;
list_for_each_entry(flde, head, fce_list) {
if (range->lsr_start == flde->fce_range.lsr_start ||
-  (range->lsr_end == flde->fce_range.lsr_end &&
-   range->lsr_flags == flde->fce_range.lsr_flags)) {
+   (range->lsr_end == flde->fce_range.lsr_end &&
+range->lsr_flags == flde->fce_range.lsr_flags)) {
got = flde;
break;
}
diff --git a/drivers/staging/lustre/lustre/fld/fld_request.c 
b/drivers/staging/lustre/lustre/fld/fld_request.c
index b50a57b..19b81c9 100644
--- a/drivers/staging/lustre/lustre/fld/fld_request.c
+++ b/drivers/staging/lustre/lustre/fld/fld_request.c
@@ -148,7 +148,7 @@ again:
}
 
CERROR("%s: Can't find target by hash %d (seq %#llx). Targets (%d):\n",
-   fld->lcf_name, hash, seq, fld->lcf_count);
+  fld->lcf_name, hash, seq, fld->lcf_count);
 
list_for_each_entry(target, >lcf_targets, ft_chain) {
const char *srv_name = target->ft_srv ?
@@ -217,11 +217,11 @@ int fld_client_add_target(struct lu_client_fld *fld,
 
if (fld->lcf_flags != LUSTRE_FLD_INIT) {
CERROR("%s: Attempt to add target %s (idx %llu) on fly - skip 
it\n",
-   fld->lcf_name, name, tar->ft_idx);
+  fld->lcf_name, name, tar->ft_idx);
return 0;
}
CDEBUG(D_INFO, "%s: Adding target %s (idx %llu)\n",
-   fld->lcf_name, name, tar->ft_idx);
+  fld->lcf_name, name, tar->ft_idx);
 
target = kzalloc(sizeof(*target), GFP_NOFS);
if (!target)
@@ -244,8 +244,7 @@ int fld_client_add_target(struct lu_client_fld *fld,
target->ft_srv = tar->ft_srv;
target->ft_idx = tar->ft_idx;
 
-   list_add_tail(>ft_chain,
- >lcf_targets);
+   list_add_tail(>ft_chain, >lcf_targets);
 
fld->lcf_count++;
spin_unlock(>lcf_lock);
@@ -260,8 +259,7 @@ int fld_client_del_target(struct lu_client_fld *fld, __u64 
idx)
struct lu_fld_target *target, *tmp;
 
spin_lock(>lcf_lock);
-   list_for_each_entry_safe(target, tmp,
->lcf_targets, ft_chain) {
+   list_for_each_entry_safe(target, tmp, >lcf_targets, ft_chain) {
if (target->ft_idx == idx) {
fld->lcf_count--;
list_del(>ft_chain);
@@ -376,8 +374,7 @@ void fld_client_fini(struct lu_client_fld *fld)
struct lu_fld_target *target, *tmp;
 
spin_lock(>lcf_lock);
-   list_for_each_entry_safe(target, tmp,
->lcf_targets, ft_chain) {
+   list_for_each_entry_safe(target, tmp, >lcf_targets, ft_chain) {

[PATCH 07/25] staging/lustre: Remove misleading liblustre comments.

2016-02-25 Thread green
From: Oleg Drokin 

These two comments certainly refer to some ifdefed code that is
no longer present, so remove them too.

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/lov/lov_pool.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/staging/lustre/lustre/lov/lov_pool.c 
b/drivers/staging/lustre/lustre/lov/lov_pool.c
index 210304f..8608b09 100644
--- a/drivers/staging/lustre/lustre/lov/lov_pool.c
+++ b/drivers/staging/lustre/lustre/lov/lov_pool.c
@@ -152,7 +152,6 @@ struct cfs_hash_ops pool_hash_operations = {
 
 };
 
-/* ifdef needed for liblustre support */
 /*
  * pool debugfs seq_file methods
  */
@@ -432,7 +431,6 @@ int lov_pool_new(struct obd_device *obd, char *poolname)
 
INIT_HLIST_NODE(_pool->pool_hash);
 
-   /* we need this assert seq_file is not implemented for liblustre */
/* get ref for debugfs file */
lov_pool_getref(new_pool);
new_pool->pool_debugfs_entry = ldebugfs_add_simple(
-- 
2.1.0



[PATCH 03/25] staging/lustre/fld: Fix style vs open parenthesis alignment

2016-02-25 Thread green
From: Oleg Drokin 

This mostly fixes checkpatch complaints about
"Alignment should match open parenthesis"

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/fld/fld_cache.c   | 14 +++---
 drivers/staging/lustre/lustre/fld/fld_request.c | 17 +++--
 drivers/staging/lustre/lustre/fld/lproc_fld.c   |  3 +--
 3 files changed, 15 insertions(+), 19 deletions(-)

diff --git a/drivers/staging/lustre/lustre/fld/fld_cache.c 
b/drivers/staging/lustre/lustre/fld/fld_cache.c
index 2b09b76..062f388 100644
--- a/drivers/staging/lustre/lustre/fld/fld_cache.c
+++ b/drivers/staging/lustre/lustre/fld/fld_cache.c
@@ -233,7 +233,7 @@ static int fld_cache_shrink(struct fld_cache *cache)
}
 
CDEBUG(D_INFO, "%s: FLD cache - Shrunk by %d entries\n",
-   cache->fci_name, num);
+  cache->fci_name, num);
 
return 0;
 }
@@ -294,8 +294,8 @@ static void fld_cache_punch_hole(struct fld_cache *cache,
  * handle range overlap in fld cache.
  */
 static void fld_cache_overlap_handle(struct fld_cache *cache,
-   struct fld_cache_entry *f_curr,
-   struct fld_cache_entry *f_new)
+struct fld_cache_entry *f_curr,
+struct fld_cache_entry *f_new)
 {
const struct lu_seq_range *range = _new->fce_range;
const u64 new_start  = range->lsr_start;
@@ -402,8 +402,8 @@ static int fld_cache_insert_nolock(struct fld_cache *cache,
list_for_each_entry_safe(f_curr, n, head, fce_list) {
/* add list if next is end of list */
if (new_end < f_curr->fce_range.lsr_start ||
-  (new_end == f_curr->fce_range.lsr_start &&
-   new_flags != f_curr->fce_range.lsr_flags))
+   (new_end == f_curr->fce_range.lsr_start &&
+new_flags != f_curr->fce_range.lsr_flags))
break;
 
prev = _curr->fce_list;
@@ -460,8 +460,8 @@ struct fld_cache_entry
head = >fci_entries_head;
list_for_each_entry(flde, head, fce_list) {
if (range->lsr_start == flde->fce_range.lsr_start ||
-  (range->lsr_end == flde->fce_range.lsr_end &&
-   range->lsr_flags == flde->fce_range.lsr_flags)) {
+   (range->lsr_end == flde->fce_range.lsr_end &&
+range->lsr_flags == flde->fce_range.lsr_flags)) {
got = flde;
break;
}
diff --git a/drivers/staging/lustre/lustre/fld/fld_request.c 
b/drivers/staging/lustre/lustre/fld/fld_request.c
index b50a57b..19b81c9 100644
--- a/drivers/staging/lustre/lustre/fld/fld_request.c
+++ b/drivers/staging/lustre/lustre/fld/fld_request.c
@@ -148,7 +148,7 @@ again:
}
 
CERROR("%s: Can't find target by hash %d (seq %#llx). Targets (%d):\n",
-   fld->lcf_name, hash, seq, fld->lcf_count);
+  fld->lcf_name, hash, seq, fld->lcf_count);
 
list_for_each_entry(target, >lcf_targets, ft_chain) {
const char *srv_name = target->ft_srv ?
@@ -217,11 +217,11 @@ int fld_client_add_target(struct lu_client_fld *fld,
 
if (fld->lcf_flags != LUSTRE_FLD_INIT) {
CERROR("%s: Attempt to add target %s (idx %llu) on fly - skip 
it\n",
-   fld->lcf_name, name, tar->ft_idx);
+  fld->lcf_name, name, tar->ft_idx);
return 0;
}
CDEBUG(D_INFO, "%s: Adding target %s (idx %llu)\n",
-   fld->lcf_name, name, tar->ft_idx);
+  fld->lcf_name, name, tar->ft_idx);
 
target = kzalloc(sizeof(*target), GFP_NOFS);
if (!target)
@@ -244,8 +244,7 @@ int fld_client_add_target(struct lu_client_fld *fld,
target->ft_srv = tar->ft_srv;
target->ft_idx = tar->ft_idx;
 
-   list_add_tail(>ft_chain,
- >lcf_targets);
+   list_add_tail(>ft_chain, >lcf_targets);
 
fld->lcf_count++;
spin_unlock(>lcf_lock);
@@ -260,8 +259,7 @@ int fld_client_del_target(struct lu_client_fld *fld, __u64 
idx)
struct lu_fld_target *target, *tmp;
 
spin_lock(>lcf_lock);
-   list_for_each_entry_safe(target, tmp,
->lcf_targets, ft_chain) {
+   list_for_each_entry_safe(target, tmp, >lcf_targets, ft_chain) {
if (target->ft_idx == idx) {
fld->lcf_count--;
list_del(>ft_chain);
@@ -376,8 +374,7 @@ void fld_client_fini(struct lu_client_fld *fld)
struct lu_fld_target *target, *tmp;
 
spin_lock(>lcf_lock);
-   list_for_each_entry_safe(target, tmp,
->lcf_targets, ft_chain) {
+   list_for_each_entry_safe(target, tmp, >lcf_targets, ft_chain) {
fld->lcf_count--;

[PATCH 09/25] staging/lustre/lmv: Remove commented out MDS selection policies

2016-02-25 Thread green
From: Oleg Drokin 

The new DNE code does not use them either so they are not longer needed.

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/lmv/lmv_obd.c | 45 -
 1 file changed, 45 deletions(-)

diff --git a/drivers/staging/lustre/lustre/lmv/lmv_obd.c 
b/drivers/staging/lustre/lustre/lmv/lmv_obd.c
index 67746c9..b5fc337 100644
--- a/drivers/staging/lustre/lustre/lmv/lmv_obd.c
+++ b/drivers/staging/lustre/lustre/lmv/lmv_obd.c
@@ -1133,51 +1133,6 @@ static int lmv_iocontrol(unsigned int cmd, struct 
obd_export *exp,
return rc;
 }
 
-#if 0
-static int lmv_all_chars_policy(int count, const char *name,
-   int len)
-{
-   unsigned int c = 0;
-
-   while (len > 0)
-   c += name[--len];
-   c = c % count;
-   return c;
-}
-
-static int lmv_nid_policy(struct lmv_obd *lmv)
-{
-   struct obd_import *imp;
-   __u32 id;
-
-   /*
-* XXX: To get nid we assume that underlying obd device is mdc.
-*/
-   imp = class_exp2cliimp(lmv->tgts[0].ltd_exp);
-   id = imp->imp_connection->c_self ^ (imp->imp_connection->c_self >> 32);
-   return id % lmv->desc.ld_tgt_count;
-}
-
-static int lmv_choose_mds(struct lmv_obd *lmv, struct md_op_data *op_data,
- enum placement_policy placement)
-{
-   switch (placement) {
-   case PLACEMENT_CHAR_POLICY:
-   return lmv_all_chars_policy(lmv->desc.ld_tgt_count,
-   op_data->op_name,
-   op_data->op_namelen);
-   case PLACEMENT_NID_POLICY:
-   return lmv_nid_policy(lmv);
-
-   default:
-   break;
-   }
-
-   CERROR("Unsupported placement policy %x\n", placement);
-   return -EINVAL;
-}
-#endif
-
 /**
  * This is _inode_ placement policy function (not name).
  */
-- 
2.1.0



[PATCH 09/25] staging/lustre/lmv: Remove commented out MDS selection policies

2016-02-25 Thread green
From: Oleg Drokin 

The new DNE code does not use them either so they are not longer needed.

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/lmv/lmv_obd.c | 45 -
 1 file changed, 45 deletions(-)

diff --git a/drivers/staging/lustre/lustre/lmv/lmv_obd.c 
b/drivers/staging/lustre/lustre/lmv/lmv_obd.c
index 67746c9..b5fc337 100644
--- a/drivers/staging/lustre/lustre/lmv/lmv_obd.c
+++ b/drivers/staging/lustre/lustre/lmv/lmv_obd.c
@@ -1133,51 +1133,6 @@ static int lmv_iocontrol(unsigned int cmd, struct 
obd_export *exp,
return rc;
 }
 
-#if 0
-static int lmv_all_chars_policy(int count, const char *name,
-   int len)
-{
-   unsigned int c = 0;
-
-   while (len > 0)
-   c += name[--len];
-   c = c % count;
-   return c;
-}
-
-static int lmv_nid_policy(struct lmv_obd *lmv)
-{
-   struct obd_import *imp;
-   __u32 id;
-
-   /*
-* XXX: To get nid we assume that underlying obd device is mdc.
-*/
-   imp = class_exp2cliimp(lmv->tgts[0].ltd_exp);
-   id = imp->imp_connection->c_self ^ (imp->imp_connection->c_self >> 32);
-   return id % lmv->desc.ld_tgt_count;
-}
-
-static int lmv_choose_mds(struct lmv_obd *lmv, struct md_op_data *op_data,
- enum placement_policy placement)
-{
-   switch (placement) {
-   case PLACEMENT_CHAR_POLICY:
-   return lmv_all_chars_policy(lmv->desc.ld_tgt_count,
-   op_data->op_name,
-   op_data->op_namelen);
-   case PLACEMENT_NID_POLICY:
-   return lmv_nid_policy(lmv);
-
-   default:
-   break;
-   }
-
-   CERROR("Unsupported placement policy %x\n", placement);
-   return -EINVAL;
-}
-#endif
-
 /**
  * This is _inode_ placement policy function (not name).
  */
-- 
2.1.0



[PATCH 06/25] staging/lustre: Convert ptlrpc_at_check_timed to void

2016-02-25 Thread green
From: Oleg Drokin 

The only caller was not looking at the return value,
and liblustre, that cared about it is not part of the kernel client.

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/ptlrpc/service.c | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/staging/lustre/lustre/ptlrpc/service.c 
b/drivers/staging/lustre/lustre/ptlrpc/service.c
index 6f71ecc..89039bf 100644
--- a/drivers/staging/lustre/lustre/ptlrpc/service.c
+++ b/drivers/staging/lustre/lustre/ptlrpc/service.c
@@ -1137,7 +1137,7 @@ out_free:
 /* Send early replies to everybody expiring within at_early_margin
  * asking for at_extra time
  */
-static int ptlrpc_at_check_timed(struct ptlrpc_service_part *svcpt)
+static void ptlrpc_at_check_timed(struct ptlrpc_service_part *svcpt)
 {
struct ptlrpc_at_array *array = >scp_at_array;
struct ptlrpc_request *rq, *n;
@@ -1151,14 +1151,14 @@ static int ptlrpc_at_check_timed(struct 
ptlrpc_service_part *svcpt)
spin_lock(>scp_at_lock);
if (svcpt->scp_at_check == 0) {
spin_unlock(>scp_at_lock);
-   return 0;
+   return;
}
delay = cfs_time_sub(cfs_time_current(), svcpt->scp_at_checktime);
svcpt->scp_at_check = 0;
 
if (array->paa_count == 0) {
spin_unlock(>scp_at_lock);
-   return 0;
+   return;
}
 
/* The timer went off, but maybe the nearest rpc already completed. */
@@ -1167,7 +1167,7 @@ static int ptlrpc_at_check_timed(struct 
ptlrpc_service_part *svcpt)
/* We've still got plenty of time.  Reset the timer. */
ptlrpc_at_set_timer(svcpt);
spin_unlock(>scp_at_lock);
-   return 0;
+   return;
}
 
/* We're close to a timeout, and we don't know how much longer the
@@ -1237,8 +1237,6 @@ static int ptlrpc_at_check_timed(struct 
ptlrpc_service_part *svcpt)
 
ptlrpc_server_drop_request(rq);
}
-
-   return 1; /* return "did_something" for liblustre */
 }
 
 /**
-- 
2.1.0



[PATCH 06/25] staging/lustre: Convert ptlrpc_at_check_timed to void

2016-02-25 Thread green
From: Oleg Drokin 

The only caller was not looking at the return value,
and liblustre, that cared about it is not part of the kernel client.

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/ptlrpc/service.c | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/staging/lustre/lustre/ptlrpc/service.c 
b/drivers/staging/lustre/lustre/ptlrpc/service.c
index 6f71ecc..89039bf 100644
--- a/drivers/staging/lustre/lustre/ptlrpc/service.c
+++ b/drivers/staging/lustre/lustre/ptlrpc/service.c
@@ -1137,7 +1137,7 @@ out_free:
 /* Send early replies to everybody expiring within at_early_margin
  * asking for at_extra time
  */
-static int ptlrpc_at_check_timed(struct ptlrpc_service_part *svcpt)
+static void ptlrpc_at_check_timed(struct ptlrpc_service_part *svcpt)
 {
struct ptlrpc_at_array *array = >scp_at_array;
struct ptlrpc_request *rq, *n;
@@ -1151,14 +1151,14 @@ static int ptlrpc_at_check_timed(struct 
ptlrpc_service_part *svcpt)
spin_lock(>scp_at_lock);
if (svcpt->scp_at_check == 0) {
spin_unlock(>scp_at_lock);
-   return 0;
+   return;
}
delay = cfs_time_sub(cfs_time_current(), svcpt->scp_at_checktime);
svcpt->scp_at_check = 0;
 
if (array->paa_count == 0) {
spin_unlock(>scp_at_lock);
-   return 0;
+   return;
}
 
/* The timer went off, but maybe the nearest rpc already completed. */
@@ -1167,7 +1167,7 @@ static int ptlrpc_at_check_timed(struct 
ptlrpc_service_part *svcpt)
/* We've still got plenty of time.  Reset the timer. */
ptlrpc_at_set_timer(svcpt);
spin_unlock(>scp_at_lock);
-   return 0;
+   return;
}
 
/* We're close to a timeout, and we don't know how much longer the
@@ -1237,8 +1237,6 @@ static int ptlrpc_at_check_timed(struct 
ptlrpc_service_part *svcpt)
 
ptlrpc_server_drop_request(rq);
}
-
-   return 1; /* return "did_something" for liblustre */
 }
 
 /**
-- 
2.1.0



[PATCH 11/25] staging/lustre: MS_POSIXACL is always defined, don't check for it

2016-02-25 Thread green
From: Oleg Drokin 

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/llite/llite_lib.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/drivers/staging/lustre/lustre/llite/llite_lib.c 
b/drivers/staging/lustre/lustre/llite/llite_lib.c
index 47f9ad7..0cdaa48 100644
--- a/drivers/staging/lustre/lustre/llite/llite_lib.c
+++ b/drivers/staging/lustre/lustre/llite/llite_lib.c
@@ -309,15 +309,11 @@ static int client_common_fill_super(struct super_block 
*sb, char *md, char *dt,
}
 
if (data->ocd_connect_flags & OBD_CONNECT_ACL) {
-#ifdef MS_POSIXACL
sb->s_flags |= MS_POSIXACL;
-#endif
sbi->ll_flags |= LL_SBI_ACL;
} else {
LCONSOLE_INFO("client wants to enable acl, but mdt not!\n");
-#ifdef MS_POSIXACL
sb->s_flags &= ~MS_POSIXACL;
-#endif
sbi->ll_flags &= ~LL_SBI_ACL;
}
 
-- 
2.1.0



[PATCH 12/25] staging/lustre: Remove RELEASEPAGE_ARG_TYPE compat macro

2016-02-25 Thread green
From: Oleg Drokin 

Not used in the kernel proper.

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/llite/rw26.c | 7 +--
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/staging/lustre/lustre/llite/rw26.c 
b/drivers/staging/lustre/lustre/llite/rw26.c
index 64110c5..6a5762e 100644
--- a/drivers/staging/lustre/lustre/llite/rw26.c
+++ b/drivers/staging/lustre/lustre/llite/rw26.c
@@ -109,12 +109,7 @@ static void ll_invalidatepage(struct page *vmpage, 
unsigned int offset,
}
 }
 
-#ifdef HAVE_RELEASEPAGE_WITH_INT
-#define RELEASEPAGE_ARG_TYPE int
-#else
-#define RELEASEPAGE_ARG_TYPE gfp_t
-#endif
-static int ll_releasepage(struct page *vmpage, RELEASEPAGE_ARG_TYPE gfp_mask)
+static int ll_releasepage(struct page *vmpage, gfp_t gfp_mask)
 {
struct cl_env_nest nest;
struct lu_env *env;
-- 
2.1.0



[PATCH 10/25] staging/lustre: F_SETLKW64 F_SETLK64 F_GETLK64 are always defined

2016-02-25 Thread green
From: Oleg Drokin 

Remove the ifdefs for the around usage.

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/llite/file.c | 6 --
 1 file changed, 6 deletions(-)

diff --git a/drivers/staging/lustre/lustre/llite/file.c 
b/drivers/staging/lustre/lustre/llite/file.c
index 477dc0e..2e30c52 100644
--- a/drivers/staging/lustre/lustre/llite/file.c
+++ b/drivers/staging/lustre/lustre/llite/file.c
@@ -2746,21 +2746,15 @@ ll_file_flock(struct file *file, int cmd, struct 
file_lock *file_lock)
 
switch (cmd) {
case F_SETLKW:
-#ifdef F_SETLKW64
case F_SETLKW64:
-#endif
flags = 0;
break;
case F_SETLK:
-#ifdef F_SETLK64
case F_SETLK64:
-#endif
flags = LDLM_FL_BLOCK_NOWAIT;
break;
case F_GETLK:
-#ifdef F_GETLK64
case F_GETLK64:
-#endif
flags = LDLM_FL_TEST_LOCK;
/* Save the old mode so that if the mode in the lock changes we
 * can decrement the appropriate reader or writer refcount.
-- 
2.1.0



[PATCH 11/25] staging/lustre: MS_POSIXACL is always defined, don't check for it

2016-02-25 Thread green
From: Oleg Drokin 

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/llite/llite_lib.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/drivers/staging/lustre/lustre/llite/llite_lib.c 
b/drivers/staging/lustre/lustre/llite/llite_lib.c
index 47f9ad7..0cdaa48 100644
--- a/drivers/staging/lustre/lustre/llite/llite_lib.c
+++ b/drivers/staging/lustre/lustre/llite/llite_lib.c
@@ -309,15 +309,11 @@ static int client_common_fill_super(struct super_block 
*sb, char *md, char *dt,
}
 
if (data->ocd_connect_flags & OBD_CONNECT_ACL) {
-#ifdef MS_POSIXACL
sb->s_flags |= MS_POSIXACL;
-#endif
sbi->ll_flags |= LL_SBI_ACL;
} else {
LCONSOLE_INFO("client wants to enable acl, but mdt not!\n");
-#ifdef MS_POSIXACL
sb->s_flags &= ~MS_POSIXACL;
-#endif
sbi->ll_flags &= ~LL_SBI_ACL;
}
 
-- 
2.1.0



[PATCH 12/25] staging/lustre: Remove RELEASEPAGE_ARG_TYPE compat macro

2016-02-25 Thread green
From: Oleg Drokin 

Not used in the kernel proper.

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/llite/rw26.c | 7 +--
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/staging/lustre/lustre/llite/rw26.c 
b/drivers/staging/lustre/lustre/llite/rw26.c
index 64110c5..6a5762e 100644
--- a/drivers/staging/lustre/lustre/llite/rw26.c
+++ b/drivers/staging/lustre/lustre/llite/rw26.c
@@ -109,12 +109,7 @@ static void ll_invalidatepage(struct page *vmpage, 
unsigned int offset,
}
 }
 
-#ifdef HAVE_RELEASEPAGE_WITH_INT
-#define RELEASEPAGE_ARG_TYPE int
-#else
-#define RELEASEPAGE_ARG_TYPE gfp_t
-#endif
-static int ll_releasepage(struct page *vmpage, RELEASEPAGE_ARG_TYPE gfp_mask)
+static int ll_releasepage(struct page *vmpage, gfp_t gfp_mask)
 {
struct cl_env_nest nest;
struct lu_env *env;
-- 
2.1.0



[PATCH 10/25] staging/lustre: F_SETLKW64 F_SETLK64 F_GETLK64 are always defined

2016-02-25 Thread green
From: Oleg Drokin 

Remove the ifdefs for the around usage.

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/llite/file.c | 6 --
 1 file changed, 6 deletions(-)

diff --git a/drivers/staging/lustre/lustre/llite/file.c 
b/drivers/staging/lustre/lustre/llite/file.c
index 477dc0e..2e30c52 100644
--- a/drivers/staging/lustre/lustre/llite/file.c
+++ b/drivers/staging/lustre/lustre/llite/file.c
@@ -2746,21 +2746,15 @@ ll_file_flock(struct file *file, int cmd, struct 
file_lock *file_lock)
 
switch (cmd) {
case F_SETLKW:
-#ifdef F_SETLKW64
case F_SETLKW64:
-#endif
flags = 0;
break;
case F_SETLK:
-#ifdef F_SETLK64
case F_SETLK64:
-#endif
flags = LDLM_FL_BLOCK_NOWAIT;
break;
case F_GETLK:
-#ifdef F_GETLK64
case F_GETLK64:
-#endif
flags = LDLM_FL_TEST_LOCK;
/* Save the old mode so that if the mode in the lock changes we
 * can decrement the appropriate reader or writer refcount.
-- 
2.1.0



[PATCH 16/25] staging/lustre/obdclass: Fix style vs open parenthesis alignment

2016-02-25 Thread green
From: Oleg Drokin 

This mostly fixes checkpatch complaints about
"Alignment should match open parenthesis"

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/obdclass/cl_io.c |  20 ++--
 drivers/staging/lustre/lustre/obdclass/cl_lock.c   |  21 ++--
 drivers/staging/lustre/lustre/obdclass/cl_object.c |  10 +-
 drivers/staging/lustre/lustre/obdclass/cl_page.c   |  10 +-
 drivers/staging/lustre/lustre/obdclass/class_obd.c |   3 +-
 drivers/staging/lustre/lustre/obdclass/genops.c|  26 ++---
 .../lustre/lustre/obdclass/linux/linux-sysctl.c|   8 +-
 drivers/staging/lustre/lustre/obdclass/llog_cat.c  |   4 +-
 .../lustre/lustre/obdclass/lprocfs_status.c| 125 ++---
 drivers/staging/lustre/lustre/obdclass/lu_object.c |   3 +-
 .../staging/lustre/lustre/obdclass/lustre_peer.c   |   2 +-
 .../staging/lustre/lustre/obdclass/obd_config.c|   6 +-
 drivers/staging/lustre/lustre/obdclass/obd_mount.c |   8 +-
 13 files changed, 119 insertions(+), 127 deletions(-)

diff --git a/drivers/staging/lustre/lustre/obdclass/cl_io.c 
b/drivers/staging/lustre/lustre/obdclass/cl_io.c
index 191ec43..f5128b4 100644
--- a/drivers/staging/lustre/lustre/obdclass/cl_io.c
+++ b/drivers/staging/lustre/lustre/obdclass/cl_io.c
@@ -139,7 +139,7 @@ void cl_io_fini(const struct lu_env *env, struct cl_io *io)
case CIT_MISC:
/* Check ignore layout change conf */
LASSERT(ergo(io->ci_ignore_layout || !io->ci_verify_layout,
-   !io->ci_need_restart));
+!io->ci_need_restart));
break;
default:
LBUG();
@@ -291,11 +291,11 @@ static void cl_io_locks_sort(struct cl_io *io)
prev = NULL;
 
list_for_each_entry_safe(curr, temp,
->ci_lockset.cls_todo,
-cill_linkage) {
+>ci_lockset.cls_todo,
+cill_linkage) {
if (prev) {
switch (cl_lock_descr_sort(>cill_descr,
- >cill_descr)) {
+  >cill_descr)) {
case 0:
/*
 * IMPOSSIBLE: Identical locks are
@@ -306,7 +306,7 @@ static void cl_io_locks_sort(struct cl_io *io)
LBUG();
case 1:
list_move_tail(>cill_linkage,
-  >cill_linkage);
+  >cill_linkage);
done = 0;
continue; /* don't change prev: it's
   * still "previous"
@@ -385,8 +385,7 @@ static int cl_lockset_lock_one(const struct lu_env *env,
if (!(link->cill_descr.cld_enq_flags & CEF_ASYNC)) {
result = cl_wait(env, lock);
if (result == 0)
-   list_move(>cill_linkage,
- >cls_done);
+   list_move(>cill_linkage, >cls_done);
} else
result = 0;
} else
@@ -430,12 +429,11 @@ static int cl_lockset_lock(const struct lu_env *env, 
struct cl_io *io,
}
if (result == 0) {
list_for_each_entry_safe(link, temp,
->cls_curr, cill_linkage) {
+>cls_curr, cill_linkage) {
lock = link->cill_lock;
result = cl_wait(env, lock);
if (result == 0)
-   list_move(>cill_linkage,
- >cls_done);
+   list_move(>cill_linkage, >cls_done);
else
break;
}
@@ -1354,7 +1352,7 @@ void cl_req_completion(const struct lu_env *env, struct 
cl_req *req, int rc)
 */
while (!list_empty(>crq_layers)) {
slice = list_entry(req->crq_layers.prev,
-  struct cl_req_slice, crs_linkage);
+  struct cl_req_slice, crs_linkage);
list_del_init(>crs_linkage);
if (slice->crs_ops->cro_completion)
slice->crs_ops->cro_completion(env, slice, rc);
diff --git a/drivers/staging/lustre/lustre/obdclass/cl_lock.c 
b/drivers/staging/lustre/lustre/obdclass/cl_lock.c
index 7b7f344..6cf284b 100644

[PATCH 16/25] staging/lustre/obdclass: Fix style vs open parenthesis alignment

2016-02-25 Thread green
From: Oleg Drokin 

This mostly fixes checkpatch complaints about
"Alignment should match open parenthesis"

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/obdclass/cl_io.c |  20 ++--
 drivers/staging/lustre/lustre/obdclass/cl_lock.c   |  21 ++--
 drivers/staging/lustre/lustre/obdclass/cl_object.c |  10 +-
 drivers/staging/lustre/lustre/obdclass/cl_page.c   |  10 +-
 drivers/staging/lustre/lustre/obdclass/class_obd.c |   3 +-
 drivers/staging/lustre/lustre/obdclass/genops.c|  26 ++---
 .../lustre/lustre/obdclass/linux/linux-sysctl.c|   8 +-
 drivers/staging/lustre/lustre/obdclass/llog_cat.c  |   4 +-
 .../lustre/lustre/obdclass/lprocfs_status.c| 125 ++---
 drivers/staging/lustre/lustre/obdclass/lu_object.c |   3 +-
 .../staging/lustre/lustre/obdclass/lustre_peer.c   |   2 +-
 .../staging/lustre/lustre/obdclass/obd_config.c|   6 +-
 drivers/staging/lustre/lustre/obdclass/obd_mount.c |   8 +-
 13 files changed, 119 insertions(+), 127 deletions(-)

diff --git a/drivers/staging/lustre/lustre/obdclass/cl_io.c 
b/drivers/staging/lustre/lustre/obdclass/cl_io.c
index 191ec43..f5128b4 100644
--- a/drivers/staging/lustre/lustre/obdclass/cl_io.c
+++ b/drivers/staging/lustre/lustre/obdclass/cl_io.c
@@ -139,7 +139,7 @@ void cl_io_fini(const struct lu_env *env, struct cl_io *io)
case CIT_MISC:
/* Check ignore layout change conf */
LASSERT(ergo(io->ci_ignore_layout || !io->ci_verify_layout,
-   !io->ci_need_restart));
+!io->ci_need_restart));
break;
default:
LBUG();
@@ -291,11 +291,11 @@ static void cl_io_locks_sort(struct cl_io *io)
prev = NULL;
 
list_for_each_entry_safe(curr, temp,
->ci_lockset.cls_todo,
-cill_linkage) {
+>ci_lockset.cls_todo,
+cill_linkage) {
if (prev) {
switch (cl_lock_descr_sort(>cill_descr,
- >cill_descr)) {
+  >cill_descr)) {
case 0:
/*
 * IMPOSSIBLE: Identical locks are
@@ -306,7 +306,7 @@ static void cl_io_locks_sort(struct cl_io *io)
LBUG();
case 1:
list_move_tail(>cill_linkage,
-  >cill_linkage);
+  >cill_linkage);
done = 0;
continue; /* don't change prev: it's
   * still "previous"
@@ -385,8 +385,7 @@ static int cl_lockset_lock_one(const struct lu_env *env,
if (!(link->cill_descr.cld_enq_flags & CEF_ASYNC)) {
result = cl_wait(env, lock);
if (result == 0)
-   list_move(>cill_linkage,
- >cls_done);
+   list_move(>cill_linkage, >cls_done);
} else
result = 0;
} else
@@ -430,12 +429,11 @@ static int cl_lockset_lock(const struct lu_env *env, 
struct cl_io *io,
}
if (result == 0) {
list_for_each_entry_safe(link, temp,
->cls_curr, cill_linkage) {
+>cls_curr, cill_linkage) {
lock = link->cill_lock;
result = cl_wait(env, lock);
if (result == 0)
-   list_move(>cill_linkage,
- >cls_done);
+   list_move(>cill_linkage, >cls_done);
else
break;
}
@@ -1354,7 +1352,7 @@ void cl_req_completion(const struct lu_env *env, struct 
cl_req *req, int rc)
 */
while (!list_empty(>crq_layers)) {
slice = list_entry(req->crq_layers.prev,
-  struct cl_req_slice, crs_linkage);
+  struct cl_req_slice, crs_linkage);
list_del_init(>crs_linkage);
if (slice->crs_ops->cro_completion)
slice->crs_ops->cro_completion(env, slice, rc);
diff --git a/drivers/staging/lustre/lustre/obdclass/cl_lock.c 
b/drivers/staging/lustre/lustre/obdclass/cl_lock.c
index 7b7f344..6cf284b 100644
--- 

[PATCH 23/25] staging/lustre: Rework MAX_DIO_SIZE macro

2016-02-25 Thread green
From: Oleg Drokin 

KMALLOC_MAX_SIZE is always defined in the kernel, so no point
in checking for it, just use t directly.

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/llite/rw26.c | 10 ++
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/drivers/staging/lustre/lustre/llite/rw26.c 
b/drivers/staging/lustre/lustre/llite/rw26.c
index b9d8e73..7a5db67 100644
--- a/drivers/staging/lustre/lustre/llite/rw26.c
+++ b/drivers/staging/lustre/lustre/llite/rw26.c
@@ -350,20 +350,14 @@ static ssize_t ll_direct_IO_26_seg(const struct lu_env 
*env, struct cl_io *io,
return ll_direct_rw_pages(env, io, rw, inode, );
 }
 
-#ifdef KMALLOC_MAX_SIZE
-#define MAX_MALLOC KMALLOC_MAX_SIZE
-#else
-#define MAX_MALLOC (128 * 1024)
-#endif
-
 /* This is the maximum size of a single O_DIRECT request, based on the
  * kmalloc limit.  We need to fit all of the brw_page structs, each one
  * representing PAGE_SIZE worth of user data, into a single buffer, and
  * then truncate this to be a full-sized RPC.  For 4kB PAGE_SIZE this is
  * up to 22MB for 128kB kmalloc and up to 682MB for 4MB kmalloc.
  */
-#define MAX_DIO_SIZE ((MAX_MALLOC / sizeof(struct brw_page) * PAGE_CACHE_SIZE) 
& \
- ~(DT_MAX_BRW_SIZE - 1))
+#define MAX_DIO_SIZE ((KMALLOC_MAX_SIZE / sizeof(struct brw_page) *  \
+  PAGE_CACHE_SIZE) & ~(DT_MAX_BRW_SIZE - 1))
 static ssize_t ll_direct_IO_26(struct kiocb *iocb, struct iov_iter *iter,
   loff_t file_offset)
 {
-- 
2.1.0



[PATCH 23/25] staging/lustre: Rework MAX_DIO_SIZE macro

2016-02-25 Thread green
From: Oleg Drokin 

KMALLOC_MAX_SIZE is always defined in the kernel, so no point
in checking for it, just use t directly.

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/llite/rw26.c | 10 ++
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/drivers/staging/lustre/lustre/llite/rw26.c 
b/drivers/staging/lustre/lustre/llite/rw26.c
index b9d8e73..7a5db67 100644
--- a/drivers/staging/lustre/lustre/llite/rw26.c
+++ b/drivers/staging/lustre/lustre/llite/rw26.c
@@ -350,20 +350,14 @@ static ssize_t ll_direct_IO_26_seg(const struct lu_env 
*env, struct cl_io *io,
return ll_direct_rw_pages(env, io, rw, inode, );
 }
 
-#ifdef KMALLOC_MAX_SIZE
-#define MAX_MALLOC KMALLOC_MAX_SIZE
-#else
-#define MAX_MALLOC (128 * 1024)
-#endif
-
 /* This is the maximum size of a single O_DIRECT request, based on the
  * kmalloc limit.  We need to fit all of the brw_page structs, each one
  * representing PAGE_SIZE worth of user data, into a single buffer, and
  * then truncate this to be a full-sized RPC.  For 4kB PAGE_SIZE this is
  * up to 22MB for 128kB kmalloc and up to 682MB for 4MB kmalloc.
  */
-#define MAX_DIO_SIZE ((MAX_MALLOC / sizeof(struct brw_page) * PAGE_CACHE_SIZE) 
& \
- ~(DT_MAX_BRW_SIZE - 1))
+#define MAX_DIO_SIZE ((KMALLOC_MAX_SIZE / sizeof(struct brw_page) *  \
+  PAGE_CACHE_SIZE) & ~(DT_MAX_BRW_SIZE - 1))
 static ssize_t ll_direct_IO_26(struct kiocb *iocb, struct iov_iter *iter,
   loff_t file_offset)
 {
-- 
2.1.0



[PATCH 21/25] staging/lustre/lmv: Fix style vs open parenthesis alignment

2016-02-25 Thread green
From: Oleg Drokin 

This mostly fixes checkpatch complaints about
"Alignment should match open parenthesis"

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/lmv/lmv_intent.c   |  2 +-
 drivers/staging/lustre/lustre/lmv/lmv_internal.h |  4 ++--
 drivers/staging/lustre/lustre/lmv/lmv_obd.c  | 28 +++-
 3 files changed, 16 insertions(+), 18 deletions(-)

diff --git a/drivers/staging/lustre/lustre/lmv/lmv_intent.c 
b/drivers/staging/lustre/lustre/lmv/lmv_intent.c
index 259b211..e0958ea 100644
--- a/drivers/staging/lustre/lustre/lmv/lmv_intent.c
+++ b/drivers/staging/lustre/lustre/lmv/lmv_intent.c
@@ -271,7 +271,7 @@ static int lmv_intent_lookup(struct obd_export *exp,
op_data->op_bias &= ~MDS_CROSS_REF;
 
rc = md_intent_lock(tgt->ltd_exp, op_data, lmm, lmmsize, it,
-flags, reqp, cb_blocking, extra_lock_flags);
+   flags, reqp, cb_blocking, extra_lock_flags);
 
if (rc < 0 || !*reqp)
return rc;
diff --git a/drivers/staging/lustre/lustre/lmv/lmv_internal.h 
b/drivers/staging/lustre/lustre/lmv/lmv_internal.h
index 041d30f33..8a00871 100644
--- a/drivers/staging/lustre/lustre/lmv/lmv_internal.h
+++ b/drivers/staging/lustre/lustre/lmv/lmv_internal.h
@@ -78,8 +78,8 @@ static inline struct lmv_stripe_md *lmv_get_mea(struct 
ptlrpc_request *req)
if (mea->mea_count == 0)
return NULL;
if (mea->mea_magic != MEA_MAGIC_LAST_CHAR &&
-   mea->mea_magic != MEA_MAGIC_ALL_CHARS &&
-   mea->mea_magic != MEA_MAGIC_HASH_SEGMENT)
+   mea->mea_magic != MEA_MAGIC_ALL_CHARS &&
+   mea->mea_magic != MEA_MAGIC_HASH_SEGMENT)
return NULL;
 
return mea;
diff --git a/drivers/staging/lustre/lustre/lmv/lmv_obd.c 
b/drivers/staging/lustre/lustre/lmv/lmv_obd.c
index b5fc337..68afc29 100644
--- a/drivers/staging/lustre/lustre/lmv/lmv_obd.c
+++ b/drivers/staging/lustre/lustre/lmv/lmv_obd.c
@@ -339,9 +339,8 @@ static int lmv_connect_mdc(struct obd_device *obd, struct 
lmv_tgt_desc *tgt)
}
 
CDEBUG(D_CONFIG, "connect to %s(%s) - %s, %s FOR %s\n",
-   mdc_obd->obd_name, mdc_obd->obd_uuid.uuid,
-   tgt->ltd_uuid.uuid, obd->obd_uuid.uuid,
-   cluuid->uuid);
+  mdc_obd->obd_name, mdc_obd->obd_uuid.uuid,
+  tgt->ltd_uuid.uuid, obd->obd_uuid.uuid, cluuid->uuid);
 
if (!mdc_obd->obd_set_up) {
CERROR("target %s is not set up\n", tgt->ltd_uuid.uuid);
@@ -397,8 +396,8 @@ static int lmv_connect_mdc(struct obd_device *obd, struct 
lmv_tgt_desc *tgt)
lmv->max_cookiesize, lmv->max_def_cookiesize);
 
CDEBUG(D_CONFIG, "Connected to %s(%s) successfully (%d)\n",
-   mdc_obd->obd_name, mdc_obd->obd_uuid.uuid,
-   atomic_read(>obd_refcount));
+  mdc_obd->obd_name, mdc_obd->obd_uuid.uuid,
+  atomic_read(>obd_refcount));
 
if (lmv->lmv_tgts_kobj)
/* Even if we failed to create the link, that's fine */
@@ -418,7 +417,7 @@ static void lmv_del_target(struct lmv_obd *lmv, int index)
 }
 
 static int lmv_add_target(struct obd_device *obd, struct obd_uuid *uuidp,
-  __u32 index, int gen)
+ __u32 index, int gen)
 {
struct lmv_obd  *lmv = >u.lmv;
struct lmv_tgt_desc *tgt;
@@ -776,7 +775,7 @@ static void lmv_hsm_req_build(struct lmv_obd *lmv,
nr_out = 0;
for (i = 0; i < hur_in->hur_request.hr_itemcount; i++) {
curr_tgt = lmv_find_target(lmv,
-   _in->hur_user_item[i].hui_fid);
+  _in->hur_user_item[i].hui_fid);
if (obd_uuid_equals(_tgt->ltd_uuid, _mds->ltd_uuid)) {
hur_out->hur_user_item[nr_out] =
hur_in->hur_user_item[i];
@@ -826,8 +825,7 @@ static int lmv_hsm_ct_register(struct lmv_obd *lmv, 
unsigned int cmd, int len,
 * except if it because of inactive target.
 */
for (i = 0; i < lmv->desc.ld_tgt_count; i++) {
-   err = obd_iocontrol(cmd, lmv->tgts[i]->ltd_exp,
-  len, lk, uarg);
+   err = obd_iocontrol(cmd, lmv->tgts[i]->ltd_exp, len, lk, uarg);
if (err) {
if (lmv->tgts[i]->ltd_active) {
/* permanent error */
@@ -839,8 +837,8 @@ static int lmv_hsm_ct_register(struct lmv_obd *lmv, 
unsigned int cmd, int len,
/* unregister from previous MDS */
for (j = 0; j < i; j++)
obd_iocontrol(cmd,
- lmv->tgts[j]->ltd_exp,
- len, lk, 

[PATCH 22/25] staging/lustre: Fix lines that start with spaces

2016-02-25 Thread green
From: Oleg Drokin 

Found with checkpatch.

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/include/lustre_cfg.h |  2 +-
 drivers/staging/lustre/lustre/include/lustre_dlm.h |  4 ++--
 drivers/staging/lustre/lustre/llite/llite_nfs.c|  6 +++---
 drivers/staging/lustre/lustre/llite/lproc_llite.c  |  2 +-
 drivers/staging/lustre/lustre/llite/rw26.c | 17 +
 5 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/drivers/staging/lustre/lustre/include/lustre_cfg.h 
b/drivers/staging/lustre/lustre/include/lustre_cfg.h
index 23ae832..bb16ae9 100644
--- a/drivers/staging/lustre/lustre/include/lustre_cfg.h
+++ b/drivers/staging/lustre/lustre/include/lustre_cfg.h
@@ -50,7 +50,7 @@
 #define LUSTRE_CFG_MAX_BUFCOUNT 8
 
 #define LCFG_HDR_SIZE(count) \
-cfs_size_round(offsetof (struct lustre_cfg, lcfg_buflens[(count)]))
+   cfs_size_round(offsetof(struct lustre_cfg, lcfg_buflens[(count)]))
 
 /** If the LCFG_REQUIRED bit is set in a configuration command,
  * then the client is required to understand this parameter
diff --git a/drivers/staging/lustre/lustre/include/lustre_dlm.h 
b/drivers/staging/lustre/lustre/include/lustre_dlm.h
index 144b5af..8b0364f 100644
--- a/drivers/staging/lustre/lustre/include/lustre_dlm.h
+++ b/drivers/staging/lustre/lustre/include/lustre_dlm.h
@@ -149,13 +149,13 @@ extern enum ldlm_mode lck_compat_array[];
 
 static inline void lockmode_verify(enum ldlm_mode mode)
 {
-   LASSERT(mode > LCK_MINMODE && mode < LCK_MAXMODE);
+   LASSERT(mode > LCK_MINMODE && mode < LCK_MAXMODE);
 }
 
 static inline int lockmode_compat(enum ldlm_mode exist_mode,
  enum ldlm_mode new_mode)
 {
-   return (lck_compat_array[exist_mode] & new_mode);
+   return (lck_compat_array[exist_mode] & new_mode);
 }
 
 /*
diff --git a/drivers/staging/lustre/lustre/llite/llite_nfs.c 
b/drivers/staging/lustre/lustre/llite/llite_nfs.c
index 69d30aa..193aab8 100644
--- a/drivers/staging/lustre/lustre/llite/llite_nfs.c
+++ b/drivers/staging/lustre/lustre/llite/llite_nfs.c
@@ -330,9 +330,9 @@ static struct dentry *ll_get_parent(struct dentry *dchild)
 }
 
 const struct export_operations lustre_export_operations = {
-   .get_parent = ll_get_parent,
-   .encode_fh  = ll_encode_fh,
-   .get_name   = ll_get_name,
+   .get_parent = ll_get_parent,
+   .encode_fh  = ll_encode_fh,
+   .get_name   = ll_get_name,
.fh_to_dentry = ll_fh_to_dentry,
.fh_to_parent = ll_fh_to_parent,
 };
diff --git a/drivers/staging/lustre/lustre/llite/lproc_llite.c 
b/drivers/staging/lustre/lustre/llite/lproc_llite.c
index 8a27f69..45941a6 100644
--- a/drivers/staging/lustre/lustre/llite/lproc_llite.c
+++ b/drivers/staging/lustre/lustre/llite/lproc_llite.c
@@ -1504,5 +1504,5 @@ LPROC_SEQ_FOPS(ll_rw_offset_stats);
 
 void lprocfs_llite_init_vars(struct lprocfs_static_vars *lvars)
 {
-lvars->obd_vars = lprocfs_llite_obd_vars;
+   lvars->obd_vars = lprocfs_llite_obd_vars;
 }
diff --git a/drivers/staging/lustre/lustre/llite/rw26.c 
b/drivers/staging/lustre/lustre/llite/rw26.c
index 6a5762e..b9d8e73 100644
--- a/drivers/staging/lustre/lustre/llite/rw26.c
+++ b/drivers/staging/lustre/lustre/llite/rw26.c
@@ -339,14 +339,15 @@ static ssize_t ll_direct_IO_26_seg(const struct lu_env 
*env, struct cl_io *io,
   size_t size, loff_t file_offset,
   struct page **pages, int page_count)
 {
-struct ll_dio_pages pvec = { .ldp_pages= pages,
-.ldp_nr   = page_count,
-.ldp_size   = size,
-.ldp_offsets  = NULL,
-.ldp_start_offset = file_offset
-  };
-
-return ll_direct_rw_pages(env, io, rw, inode, );
+   struct ll_dio_pages pvec = {
+   .ldp_pages  = pages,
+   .ldp_nr = page_count,
+   .ldp_size   = size,
+   .ldp_offsets= NULL,
+   .ldp_start_offset = file_offset
+   };
+
+   return ll_direct_rw_pages(env, io, rw, inode, );
 }
 
 #ifdef KMALLOC_MAX_SIZE
-- 
2.1.0



[PATCH 20/25] staging/lustre/obdecho: Fix style vs open parenthesis alignment

2016-02-25 Thread green
From: Oleg Drokin 

This mostly fixes checkpatch complaints about
"Alignment should match open parenthesis"

Signed-off-by: Oleg Drokin 
---
 .../staging/lustre/lustre/obdecho/echo_client.c| 22 +++---
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/staging/lustre/lustre/obdecho/echo_client.c 
b/drivers/staging/lustre/lustre/obdecho/echo_client.c
index 3be28c5..ab56e67 100644
--- a/drivers/staging/lustre/lustre/obdecho/echo_client.c
+++ b/drivers/staging/lustre/lustre/obdecho/echo_client.c
@@ -220,7 +220,7 @@ static struct lu_kmem_descr echo_caches[] = {
  * @{
  */
 static struct page *echo_page_vmpage(const struct lu_env *env,
-   const struct cl_page_slice *slice)
+const struct cl_page_slice *slice)
 {
return cl2echo_page(slice)->ep_vmpage;
 }
@@ -367,7 +367,7 @@ static struct cl_lock_operations echo_lock_ops = {
  * @{
  */
 static int echo_page_init(const struct lu_env *env, struct cl_object *obj,
-   struct cl_page *page, struct page *vmpage)
+ struct cl_page *page, struct page *vmpage)
 {
struct echo_page *ep = cl_object_page_slice(obj, page);
struct echo_object *eco = cl2echo_obj(obj);
@@ -529,7 +529,7 @@ static void echo_object_free(const struct lu_env *env, 
struct lu_object *obj)
 }
 
 static int echo_object_print(const struct lu_env *env, void *cookie,
-   lu_printer_t p, const struct lu_object *o)
+lu_printer_t p, const struct lu_object *o)
 {
struct echo_object *obj = cl2echo_obj(lu2cl(o));
 
@@ -621,7 +621,7 @@ static void echo_site_fini(const struct lu_env *env, struct 
echo_device *ed)
 }
 
 static void *echo_thread_key_init(const struct lu_context *ctx,
- struct lu_context_key *key)
+ struct lu_context_key *key)
 {
struct echo_thread_info *info;
 
@@ -632,7 +632,7 @@ static void *echo_thread_key_init(const struct lu_context 
*ctx,
 }
 
 static void echo_thread_key_fini(const struct lu_context *ctx,
-struct lu_context_key *key, void *data)
+struct lu_context_key *key, void *data)
 {
struct echo_thread_info *info = data;
 
@@ -640,7 +640,7 @@ static void echo_thread_key_fini(const struct lu_context 
*ctx,
 }
 
 static void echo_thread_key_exit(const struct lu_context *ctx,
-struct lu_context_key *key, void *data)
+struct lu_context_key *key, void *data)
 {
 }
 
@@ -652,7 +652,7 @@ static struct lu_context_key echo_thread_key = {
 };
 
 static void *echo_session_key_init(const struct lu_context *ctx,
- struct lu_context_key *key)
+  struct lu_context_key *key)
 {
struct echo_session_info *session;
 
@@ -663,7 +663,7 @@ static void *echo_session_key_init(const struct lu_context 
*ctx,
 }
 
 static void echo_session_key_fini(const struct lu_context *ctx,
-struct lu_context_key *key, void *data)
+ struct lu_context_key *key, void *data)
 {
struct echo_session_info *session = data;
 
@@ -671,7 +671,7 @@ static void echo_session_key_fini(const struct lu_context 
*ctx,
 }
 
 static void echo_session_key_exit(const struct lu_context *ctx,
-struct lu_context_key *key, void *data)
+ struct lu_context_key *key, void *data)
 {
 }
 
@@ -720,7 +720,7 @@ static struct lu_device *echo_device_alloc(const struct 
lu_env *env,
tgt = class_name2obd(lustre_cfg_string(cfg, 1));
if (!tgt) {
CERROR("Can not find tgt device %s\n",
-   lustre_cfg_string(cfg, 1));
+  lustre_cfg_string(cfg, 1));
rc = -ENODEV;
goto out;
}
@@ -796,7 +796,7 @@ out:
 }
 
 static int echo_device_init(const struct lu_env *env, struct lu_device *d,
- const char *name, struct lu_device *next)
+   const char *name, struct lu_device *next)
 {
LBUG();
return 0;
-- 
2.1.0



[PATCH 21/25] staging/lustre/lmv: Fix style vs open parenthesis alignment

2016-02-25 Thread green
From: Oleg Drokin 

This mostly fixes checkpatch complaints about
"Alignment should match open parenthesis"

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/lmv/lmv_intent.c   |  2 +-
 drivers/staging/lustre/lustre/lmv/lmv_internal.h |  4 ++--
 drivers/staging/lustre/lustre/lmv/lmv_obd.c  | 28 +++-
 3 files changed, 16 insertions(+), 18 deletions(-)

diff --git a/drivers/staging/lustre/lustre/lmv/lmv_intent.c 
b/drivers/staging/lustre/lustre/lmv/lmv_intent.c
index 259b211..e0958ea 100644
--- a/drivers/staging/lustre/lustre/lmv/lmv_intent.c
+++ b/drivers/staging/lustre/lustre/lmv/lmv_intent.c
@@ -271,7 +271,7 @@ static int lmv_intent_lookup(struct obd_export *exp,
op_data->op_bias &= ~MDS_CROSS_REF;
 
rc = md_intent_lock(tgt->ltd_exp, op_data, lmm, lmmsize, it,
-flags, reqp, cb_blocking, extra_lock_flags);
+   flags, reqp, cb_blocking, extra_lock_flags);
 
if (rc < 0 || !*reqp)
return rc;
diff --git a/drivers/staging/lustre/lustre/lmv/lmv_internal.h 
b/drivers/staging/lustre/lustre/lmv/lmv_internal.h
index 041d30f33..8a00871 100644
--- a/drivers/staging/lustre/lustre/lmv/lmv_internal.h
+++ b/drivers/staging/lustre/lustre/lmv/lmv_internal.h
@@ -78,8 +78,8 @@ static inline struct lmv_stripe_md *lmv_get_mea(struct 
ptlrpc_request *req)
if (mea->mea_count == 0)
return NULL;
if (mea->mea_magic != MEA_MAGIC_LAST_CHAR &&
-   mea->mea_magic != MEA_MAGIC_ALL_CHARS &&
-   mea->mea_magic != MEA_MAGIC_HASH_SEGMENT)
+   mea->mea_magic != MEA_MAGIC_ALL_CHARS &&
+   mea->mea_magic != MEA_MAGIC_HASH_SEGMENT)
return NULL;
 
return mea;
diff --git a/drivers/staging/lustre/lustre/lmv/lmv_obd.c 
b/drivers/staging/lustre/lustre/lmv/lmv_obd.c
index b5fc337..68afc29 100644
--- a/drivers/staging/lustre/lustre/lmv/lmv_obd.c
+++ b/drivers/staging/lustre/lustre/lmv/lmv_obd.c
@@ -339,9 +339,8 @@ static int lmv_connect_mdc(struct obd_device *obd, struct 
lmv_tgt_desc *tgt)
}
 
CDEBUG(D_CONFIG, "connect to %s(%s) - %s, %s FOR %s\n",
-   mdc_obd->obd_name, mdc_obd->obd_uuid.uuid,
-   tgt->ltd_uuid.uuid, obd->obd_uuid.uuid,
-   cluuid->uuid);
+  mdc_obd->obd_name, mdc_obd->obd_uuid.uuid,
+  tgt->ltd_uuid.uuid, obd->obd_uuid.uuid, cluuid->uuid);
 
if (!mdc_obd->obd_set_up) {
CERROR("target %s is not set up\n", tgt->ltd_uuid.uuid);
@@ -397,8 +396,8 @@ static int lmv_connect_mdc(struct obd_device *obd, struct 
lmv_tgt_desc *tgt)
lmv->max_cookiesize, lmv->max_def_cookiesize);
 
CDEBUG(D_CONFIG, "Connected to %s(%s) successfully (%d)\n",
-   mdc_obd->obd_name, mdc_obd->obd_uuid.uuid,
-   atomic_read(>obd_refcount));
+  mdc_obd->obd_name, mdc_obd->obd_uuid.uuid,
+  atomic_read(>obd_refcount));
 
if (lmv->lmv_tgts_kobj)
/* Even if we failed to create the link, that's fine */
@@ -418,7 +417,7 @@ static void lmv_del_target(struct lmv_obd *lmv, int index)
 }
 
 static int lmv_add_target(struct obd_device *obd, struct obd_uuid *uuidp,
-  __u32 index, int gen)
+ __u32 index, int gen)
 {
struct lmv_obd  *lmv = >u.lmv;
struct lmv_tgt_desc *tgt;
@@ -776,7 +775,7 @@ static void lmv_hsm_req_build(struct lmv_obd *lmv,
nr_out = 0;
for (i = 0; i < hur_in->hur_request.hr_itemcount; i++) {
curr_tgt = lmv_find_target(lmv,
-   _in->hur_user_item[i].hui_fid);
+  _in->hur_user_item[i].hui_fid);
if (obd_uuid_equals(_tgt->ltd_uuid, _mds->ltd_uuid)) {
hur_out->hur_user_item[nr_out] =
hur_in->hur_user_item[i];
@@ -826,8 +825,7 @@ static int lmv_hsm_ct_register(struct lmv_obd *lmv, 
unsigned int cmd, int len,
 * except if it because of inactive target.
 */
for (i = 0; i < lmv->desc.ld_tgt_count; i++) {
-   err = obd_iocontrol(cmd, lmv->tgts[i]->ltd_exp,
-  len, lk, uarg);
+   err = obd_iocontrol(cmd, lmv->tgts[i]->ltd_exp, len, lk, uarg);
if (err) {
if (lmv->tgts[i]->ltd_active) {
/* permanent error */
@@ -839,8 +837,8 @@ static int lmv_hsm_ct_register(struct lmv_obd *lmv, 
unsigned int cmd, int len,
/* unregister from previous MDS */
for (j = 0; j < i; j++)
obd_iocontrol(cmd,
- lmv->tgts[j]->ltd_exp,
- len, lk, uarg);
+  

[PATCH 22/25] staging/lustre: Fix lines that start with spaces

2016-02-25 Thread green
From: Oleg Drokin 

Found with checkpatch.

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/include/lustre_cfg.h |  2 +-
 drivers/staging/lustre/lustre/include/lustre_dlm.h |  4 ++--
 drivers/staging/lustre/lustre/llite/llite_nfs.c|  6 +++---
 drivers/staging/lustre/lustre/llite/lproc_llite.c  |  2 +-
 drivers/staging/lustre/lustre/llite/rw26.c | 17 +
 5 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/drivers/staging/lustre/lustre/include/lustre_cfg.h 
b/drivers/staging/lustre/lustre/include/lustre_cfg.h
index 23ae832..bb16ae9 100644
--- a/drivers/staging/lustre/lustre/include/lustre_cfg.h
+++ b/drivers/staging/lustre/lustre/include/lustre_cfg.h
@@ -50,7 +50,7 @@
 #define LUSTRE_CFG_MAX_BUFCOUNT 8
 
 #define LCFG_HDR_SIZE(count) \
-cfs_size_round(offsetof (struct lustre_cfg, lcfg_buflens[(count)]))
+   cfs_size_round(offsetof(struct lustre_cfg, lcfg_buflens[(count)]))
 
 /** If the LCFG_REQUIRED bit is set in a configuration command,
  * then the client is required to understand this parameter
diff --git a/drivers/staging/lustre/lustre/include/lustre_dlm.h 
b/drivers/staging/lustre/lustre/include/lustre_dlm.h
index 144b5af..8b0364f 100644
--- a/drivers/staging/lustre/lustre/include/lustre_dlm.h
+++ b/drivers/staging/lustre/lustre/include/lustre_dlm.h
@@ -149,13 +149,13 @@ extern enum ldlm_mode lck_compat_array[];
 
 static inline void lockmode_verify(enum ldlm_mode mode)
 {
-   LASSERT(mode > LCK_MINMODE && mode < LCK_MAXMODE);
+   LASSERT(mode > LCK_MINMODE && mode < LCK_MAXMODE);
 }
 
 static inline int lockmode_compat(enum ldlm_mode exist_mode,
  enum ldlm_mode new_mode)
 {
-   return (lck_compat_array[exist_mode] & new_mode);
+   return (lck_compat_array[exist_mode] & new_mode);
 }
 
 /*
diff --git a/drivers/staging/lustre/lustre/llite/llite_nfs.c 
b/drivers/staging/lustre/lustre/llite/llite_nfs.c
index 69d30aa..193aab8 100644
--- a/drivers/staging/lustre/lustre/llite/llite_nfs.c
+++ b/drivers/staging/lustre/lustre/llite/llite_nfs.c
@@ -330,9 +330,9 @@ static struct dentry *ll_get_parent(struct dentry *dchild)
 }
 
 const struct export_operations lustre_export_operations = {
-   .get_parent = ll_get_parent,
-   .encode_fh  = ll_encode_fh,
-   .get_name   = ll_get_name,
+   .get_parent = ll_get_parent,
+   .encode_fh  = ll_encode_fh,
+   .get_name   = ll_get_name,
.fh_to_dentry = ll_fh_to_dentry,
.fh_to_parent = ll_fh_to_parent,
 };
diff --git a/drivers/staging/lustre/lustre/llite/lproc_llite.c 
b/drivers/staging/lustre/lustre/llite/lproc_llite.c
index 8a27f69..45941a6 100644
--- a/drivers/staging/lustre/lustre/llite/lproc_llite.c
+++ b/drivers/staging/lustre/lustre/llite/lproc_llite.c
@@ -1504,5 +1504,5 @@ LPROC_SEQ_FOPS(ll_rw_offset_stats);
 
 void lprocfs_llite_init_vars(struct lprocfs_static_vars *lvars)
 {
-lvars->obd_vars = lprocfs_llite_obd_vars;
+   lvars->obd_vars = lprocfs_llite_obd_vars;
 }
diff --git a/drivers/staging/lustre/lustre/llite/rw26.c 
b/drivers/staging/lustre/lustre/llite/rw26.c
index 6a5762e..b9d8e73 100644
--- a/drivers/staging/lustre/lustre/llite/rw26.c
+++ b/drivers/staging/lustre/lustre/llite/rw26.c
@@ -339,14 +339,15 @@ static ssize_t ll_direct_IO_26_seg(const struct lu_env 
*env, struct cl_io *io,
   size_t size, loff_t file_offset,
   struct page **pages, int page_count)
 {
-struct ll_dio_pages pvec = { .ldp_pages= pages,
-.ldp_nr   = page_count,
-.ldp_size   = size,
-.ldp_offsets  = NULL,
-.ldp_start_offset = file_offset
-  };
-
-return ll_direct_rw_pages(env, io, rw, inode, );
+   struct ll_dio_pages pvec = {
+   .ldp_pages  = pages,
+   .ldp_nr = page_count,
+   .ldp_size   = size,
+   .ldp_offsets= NULL,
+   .ldp_start_offset = file_offset
+   };
+
+   return ll_direct_rw_pages(env, io, rw, inode, );
 }
 
 #ifdef KMALLOC_MAX_SIZE
-- 
2.1.0



[PATCH 20/25] staging/lustre/obdecho: Fix style vs open parenthesis alignment

2016-02-25 Thread green
From: Oleg Drokin 

This mostly fixes checkpatch complaints about
"Alignment should match open parenthesis"

Signed-off-by: Oleg Drokin 
---
 .../staging/lustre/lustre/obdecho/echo_client.c| 22 +++---
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/staging/lustre/lustre/obdecho/echo_client.c 
b/drivers/staging/lustre/lustre/obdecho/echo_client.c
index 3be28c5..ab56e67 100644
--- a/drivers/staging/lustre/lustre/obdecho/echo_client.c
+++ b/drivers/staging/lustre/lustre/obdecho/echo_client.c
@@ -220,7 +220,7 @@ static struct lu_kmem_descr echo_caches[] = {
  * @{
  */
 static struct page *echo_page_vmpage(const struct lu_env *env,
-   const struct cl_page_slice *slice)
+const struct cl_page_slice *slice)
 {
return cl2echo_page(slice)->ep_vmpage;
 }
@@ -367,7 +367,7 @@ static struct cl_lock_operations echo_lock_ops = {
  * @{
  */
 static int echo_page_init(const struct lu_env *env, struct cl_object *obj,
-   struct cl_page *page, struct page *vmpage)
+ struct cl_page *page, struct page *vmpage)
 {
struct echo_page *ep = cl_object_page_slice(obj, page);
struct echo_object *eco = cl2echo_obj(obj);
@@ -529,7 +529,7 @@ static void echo_object_free(const struct lu_env *env, 
struct lu_object *obj)
 }
 
 static int echo_object_print(const struct lu_env *env, void *cookie,
-   lu_printer_t p, const struct lu_object *o)
+lu_printer_t p, const struct lu_object *o)
 {
struct echo_object *obj = cl2echo_obj(lu2cl(o));
 
@@ -621,7 +621,7 @@ static void echo_site_fini(const struct lu_env *env, struct 
echo_device *ed)
 }
 
 static void *echo_thread_key_init(const struct lu_context *ctx,
- struct lu_context_key *key)
+ struct lu_context_key *key)
 {
struct echo_thread_info *info;
 
@@ -632,7 +632,7 @@ static void *echo_thread_key_init(const struct lu_context 
*ctx,
 }
 
 static void echo_thread_key_fini(const struct lu_context *ctx,
-struct lu_context_key *key, void *data)
+struct lu_context_key *key, void *data)
 {
struct echo_thread_info *info = data;
 
@@ -640,7 +640,7 @@ static void echo_thread_key_fini(const struct lu_context 
*ctx,
 }
 
 static void echo_thread_key_exit(const struct lu_context *ctx,
-struct lu_context_key *key, void *data)
+struct lu_context_key *key, void *data)
 {
 }
 
@@ -652,7 +652,7 @@ static struct lu_context_key echo_thread_key = {
 };
 
 static void *echo_session_key_init(const struct lu_context *ctx,
- struct lu_context_key *key)
+  struct lu_context_key *key)
 {
struct echo_session_info *session;
 
@@ -663,7 +663,7 @@ static void *echo_session_key_init(const struct lu_context 
*ctx,
 }
 
 static void echo_session_key_fini(const struct lu_context *ctx,
-struct lu_context_key *key, void *data)
+ struct lu_context_key *key, void *data)
 {
struct echo_session_info *session = data;
 
@@ -671,7 +671,7 @@ static void echo_session_key_fini(const struct lu_context 
*ctx,
 }
 
 static void echo_session_key_exit(const struct lu_context *ctx,
-struct lu_context_key *key, void *data)
+ struct lu_context_key *key, void *data)
 {
 }
 
@@ -720,7 +720,7 @@ static struct lu_device *echo_device_alloc(const struct 
lu_env *env,
tgt = class_name2obd(lustre_cfg_string(cfg, 1));
if (!tgt) {
CERROR("Can not find tgt device %s\n",
-   lustre_cfg_string(cfg, 1));
+  lustre_cfg_string(cfg, 1));
rc = -ENODEV;
goto out;
}
@@ -796,7 +796,7 @@ out:
 }
 
 static int echo_device_init(const struct lu_env *env, struct lu_device *d,
- const char *name, struct lu_device *next)
+   const char *name, struct lu_device *next)
 {
LBUG();
return 0;
-- 
2.1.0



[PATCH 18/25] staging/lustre/mdc: Fix style vs open parenthesis alignment

2016-02-25 Thread green
From: Oleg Drokin 

This mostly fixes checkpatch complaints about
"Alignment should match open parenthesis"

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/mdc/mdc_internal.h |  2 +-
 drivers/staging/lustre/lustre/mdc/mdc_locks.c| 26 +++-
 drivers/staging/lustre/lustre/mdc/mdc_reint.c|  2 +-
 drivers/staging/lustre/lustre/mdc/mdc_request.c  | 12 +--
 4 files changed, 20 insertions(+), 22 deletions(-)

diff --git a/drivers/staging/lustre/lustre/mdc/mdc_internal.h 
b/drivers/staging/lustre/lustre/mdc/mdc_internal.h
index 54f4ca6..c5519ae 100644
--- a/drivers/staging/lustre/lustre/mdc/mdc_internal.h
+++ b/drivers/staging/lustre/lustre/mdc/mdc_internal.h
@@ -53,7 +53,7 @@ void mdc_readdir_pack(struct ptlrpc_request *req, __u64 
pgoff, __u32 size,
 void mdc_getattr_pack(struct ptlrpc_request *req, __u64 valid, int flags,
  struct md_op_data *data, int ea_size);
 void mdc_setattr_pack(struct ptlrpc_request *req, struct md_op_data *op_data,
-void *ea, int ealen, void *ea2, int ea2len);
+ void *ea, int ealen, void *ea2, int ea2len);
 void mdc_create_pack(struct ptlrpc_request *req, struct md_op_data *op_data,
 const void *data, int datalen, __u32 mode, __u32 uid,
 __u32 gid, cfs_cap_t capability, __u64 rdev);
diff --git a/drivers/staging/lustre/lustre/mdc/mdc_locks.c 
b/drivers/staging/lustre/lustre/mdc/mdc_locks.c
index 6dae574..958a164 100644
--- a/drivers/staging/lustre/lustre/mdc/mdc_locks.c
+++ b/drivers/staging/lustre/lustre/mdc/mdc_locks.c
@@ -366,7 +366,7 @@ mdc_intent_getxattr_pack(struct obd_export *exp,
LIST_HEAD(cancels);
 
req = ptlrpc_request_alloc(class_exp2cliimp(exp),
-   _LDLM_INTENT_GETXATTR);
+  _LDLM_INTENT_GETXATTR);
if (!req)
return ERR_PTR(-ENOMEM);
 
@@ -386,14 +386,12 @@ mdc_intent_getxattr_pack(struct obd_export *exp,
mdc_pack_body(req, _data->op_fid1, op_data->op_valid, maxdata, -1,
  0);
 
-   req_capsule_set_size(>rq_pill, _EADATA,
-   RCL_SERVER, maxdata);
+   req_capsule_set_size(>rq_pill, _EADATA, RCL_SERVER, maxdata);
 
-   req_capsule_set_size(>rq_pill, _EAVALS,
-   RCL_SERVER, maxdata);
+   req_capsule_set_size(>rq_pill, _EAVALS, RCL_SERVER, maxdata);
 
req_capsule_set_size(>rq_pill, _EAVALS_LENS,
-   RCL_SERVER, maxdata);
+RCL_SERVER, maxdata);
 
ptlrpc_request_set_replen(req);
 
@@ -439,8 +437,8 @@ static struct ptlrpc_request *mdc_intent_unlink_pack(struct 
obd_export *exp,
 }
 
 static struct ptlrpc_request *mdc_intent_getattr_pack(struct obd_export *exp,
-   struct lookup_intent *it,
-   struct md_op_data *op_data)
+ struct lookup_intent *it,
+struct md_op_data *op_data)
 {
struct ptlrpc_request *req;
struct obd_device *obddev = class_exp2obd(exp);
@@ -498,7 +496,7 @@ static struct ptlrpc_request *mdc_intent_layout_pack(struct 
obd_export *exp,
int rc;
 
req = ptlrpc_request_alloc(class_exp2cliimp(exp),
-   _LDLM_INTENT_LAYOUT);
+  _LDLM_INTENT_LAYOUT);
if (!req)
return ERR_PTR(-ENOMEM);
 
@@ -718,7 +716,7 @@ static int mdc_finish_enqueue(struct obd_export *exp,
void *lmm;
 
LDLM_DEBUG(lock, "layout lock returned by: %s, lvb_len: %d\n",
-   ldlm_it2str(it->it_op), lvb_len);
+  ldlm_it2str(it->it_op), lvb_len);
 
lmm = libcfs_kvzalloc(lvb_len, GFP_NOFS);
if (!lmm) {
@@ -1094,7 +1092,7 @@ int mdc_revalidate_lock(struct obd_export *exp, struct 
lookup_intent *it,
}
 
mode = mdc_lock_match(exp, LDLM_FL_BLOCK_GRANTED, fid,
-  LDLM_IBITS, ,
+ LDLM_IBITS, ,
  LCK_CR | LCK_CW | LCK_PR | LCK_PW,
  );
}
@@ -1264,9 +1262,9 @@ int mdc_intent_getattr_async(struct obd_export *exp,
__u64   flags = LDLM_FL_HAS_INTENT;
 
CDEBUG(D_DLMTRACE,
-   "name: %.*s in inode "DFID", intent: %s flags %#Lo\n",
-   op_data->op_namelen, op_data->op_name, PFID(_data->op_fid1),
-   ldlm_it2str(it->it_op), it->it_flags);
+  "name: %.*s in inode " DFID ", intent: %s flags %#Lo\n",
+  op_data->op_namelen, op_data->op_name, PFID(_data->op_fid1),
+   

[PATCH 17/25] staging/lustre/lov: Fix style vs open parenthesis alignment

2016-02-25 Thread green
From: Oleg Drokin 

This mostly fixes checkpatch complaints about
"Alignment should match open parenthesis"

Signed-off-by: Oleg Drokin 
---
 .../staging/lustre/lustre/lov/lov_cl_internal.h| 87 +++---
 drivers/staging/lustre/lustre/lov/lov_ea.c |  2 +-
 drivers/staging/lustre/lustre/lov/lov_internal.h   |  6 +-
 drivers/staging/lustre/lustre/lov/lov_io.c |  2 +-
 drivers/staging/lustre/lustre/lov/lov_lock.c   |  7 +-
 drivers/staging/lustre/lustre/lov/lov_obd.c| 35 -
 drivers/staging/lustre/lustre/lov/lov_object.c | 40 +-
 drivers/staging/lustre/lustre/lov/lov_offset.c |  3 +-
 drivers/staging/lustre/lustre/lov/lov_pack.c   |  7 +-
 drivers/staging/lustre/lustre/lov/lov_page.c   |  3 +-
 drivers/staging/lustre/lustre/lov/lov_pool.c   |  4 +-
 drivers/staging/lustre/lustre/lov/lovsub_lock.c|  2 +-
 drivers/staging/lustre/lustre/lov/lovsub_page.c|  2 +-
 drivers/staging/lustre/lustre/lov/lproc_lov.c  | 16 ++--
 14 files changed, 106 insertions(+), 110 deletions(-)

diff --git a/drivers/staging/lustre/lustre/lov/lov_cl_internal.h 
b/drivers/staging/lustre/lustre/lov/lov_cl_internal.h
index b5fc159..7dd3162 100644
--- a/drivers/staging/lustre/lustre/lov/lov_cl_internal.h
+++ b/drivers/staging/lustre/lustre/lov/lov_cl_internal.h
@@ -579,51 +579,49 @@ extern struct kmem_cache *lovsub_req_kmem;
 
 extern struct kmem_cache *lov_lock_link_kmem;
 
-int   lov_object_init(const struct lu_env *env, struct lu_object *obj,
-  const struct lu_object_conf *conf);
-int   lovsub_object_init(const struct lu_env *env, struct lu_object *obj,
-  const struct lu_object_conf *conf);
-int   lov_lock_init(const struct lu_env *env, struct cl_object *obj,
-  struct cl_lock *lock, const struct cl_io *io);
-int   lov_io_init(const struct lu_env *env, struct cl_object *obj,
-  struct cl_io *io);
-int   lovsub_lock_init(const struct lu_env *env, struct cl_object *obj,
-  struct cl_lock *lock, const struct cl_io *io);
-
-int   lov_lock_init_raid0(const struct lu_env *env, struct cl_object *obj,
-  struct cl_lock *lock, const struct cl_io *io);
-int   lov_lock_init_empty(const struct lu_env *env, struct cl_object *obj,
-  struct cl_lock *lock, const struct cl_io *io);
-int   lov_io_init_raid0(const struct lu_env *env, struct cl_object *obj,
-  struct cl_io *io);
-int   lov_io_init_empty(const struct lu_env *env, struct cl_object *obj,
-  struct cl_io *io);
-int   lov_io_init_released(const struct lu_env *env, struct cl_object *obj,
-  struct cl_io *io);
-void  lov_lock_unlink(const struct lu_env *env, struct lov_lock_link *link,
-  struct lovsub_lock *sub);
+int lov_object_init(const struct lu_env *env, struct lu_object *obj,
+   const struct lu_object_conf *conf);
+int lovsub_object_init(const struct lu_env *env, struct lu_object *obj,
+  const struct lu_object_conf *conf);
+int lov_lock_init(const struct lu_env *env, struct cl_object *obj,
+ struct cl_lock *lock, const struct cl_io *io);
+int lov_io_init(const struct lu_env *env, struct cl_object *obj,
+   struct cl_io *io);
+int lovsub_lock_init(const struct lu_env *env, struct cl_object *obj,
+struct cl_lock *lock, const struct cl_io *io);
+
+int lov_lock_init_raid0(const struct lu_env *env, struct cl_object *obj,
+   struct cl_lock *lock, const struct cl_io *io);
+int lov_lock_init_empty(const struct lu_env *env, struct cl_object *obj,
+   struct cl_lock *lock, const struct cl_io *io);
+int lov_io_init_raid0(const struct lu_env *env, struct cl_object *obj,
+ struct cl_io *io);
+int lov_io_init_empty(const struct lu_env *env, struct cl_object *obj,
+ struct cl_io *io);
+int lov_io_init_released(const struct lu_env *env, struct cl_object *obj,
+struct cl_io *io);
+void lov_lock_unlink(const struct lu_env *env, struct lov_lock_link *link,
+struct lovsub_lock *sub);
 
 struct lov_io_sub *lov_sub_get(const struct lu_env *env, struct lov_io *lio,
   int stripe);
-void  lov_sub_put(struct lov_io_sub *sub);
-int   lov_sublock_modify(const struct lu_env *env, struct lov_lock *lov,
-  struct lovsub_lock *sublock,
-  const struct cl_lock_descr *d, int idx);
-
-int   lov_page_init(const struct lu_env *env, struct cl_object *ob,
-  struct cl_page *page, struct page *vmpage);
-int   lovsub_page_init(const struct lu_env *env, struct cl_object *ob,
-  struct cl_page *page, 

[PATCH 24/25] staging/lustre: Remove unneeded {} in lprocfs_stats_unlock()

2016-02-25 Thread green
From: Oleg Drokin 

Since there's only one call in those if () else branches, the
braces are not really necessary.

Highlighted by checkpatch.

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/include/lprocfs_status.h | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/staging/lustre/lustre/include/lprocfs_status.h 
b/drivers/staging/lustre/lustre/include/lprocfs_status.h
index 89052b2..4146c9c 100644
--- a/drivers/staging/lustre/lustre/include/lprocfs_status.h
+++ b/drivers/staging/lustre/lustre/include/lprocfs_status.h
@@ -426,11 +426,10 @@ static inline void lprocfs_stats_unlock(struct 
lprocfs_stats *stats, int opc,
 
case LPROCFS_GET_SMP_ID:
if (stats->ls_flags & LPROCFS_STATS_FLAG_NOPERCPU) {
-   if (stats->ls_flags & LPROCFS_STATS_FLAG_IRQ_SAFE) {
+   if (stats->ls_flags & LPROCFS_STATS_FLAG_IRQ_SAFE)
spin_unlock_irqrestore(>ls_lock, *flags);
-   } else {
+   else
spin_unlock(>ls_lock);
-   }
} else {
put_cpu();
}
@@ -438,11 +437,10 @@ static inline void lprocfs_stats_unlock(struct 
lprocfs_stats *stats, int opc,
 
case LPROCFS_GET_NUM_CPU:
if (stats->ls_flags & LPROCFS_STATS_FLAG_NOPERCPU) {
-   if (stats->ls_flags & LPROCFS_STATS_FLAG_IRQ_SAFE) {
+   if (stats->ls_flags & LPROCFS_STATS_FLAG_IRQ_SAFE)
spin_unlock_irqrestore(>ls_lock, *flags);
-   } else {
+   else
spin_unlock(>ls_lock);
-   }
}
return;
}
-- 
2.1.0



[PATCH 18/25] staging/lustre/mdc: Fix style vs open parenthesis alignment

2016-02-25 Thread green
From: Oleg Drokin 

This mostly fixes checkpatch complaints about
"Alignment should match open parenthesis"

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/mdc/mdc_internal.h |  2 +-
 drivers/staging/lustre/lustre/mdc/mdc_locks.c| 26 +++-
 drivers/staging/lustre/lustre/mdc/mdc_reint.c|  2 +-
 drivers/staging/lustre/lustre/mdc/mdc_request.c  | 12 +--
 4 files changed, 20 insertions(+), 22 deletions(-)

diff --git a/drivers/staging/lustre/lustre/mdc/mdc_internal.h 
b/drivers/staging/lustre/lustre/mdc/mdc_internal.h
index 54f4ca6..c5519ae 100644
--- a/drivers/staging/lustre/lustre/mdc/mdc_internal.h
+++ b/drivers/staging/lustre/lustre/mdc/mdc_internal.h
@@ -53,7 +53,7 @@ void mdc_readdir_pack(struct ptlrpc_request *req, __u64 
pgoff, __u32 size,
 void mdc_getattr_pack(struct ptlrpc_request *req, __u64 valid, int flags,
  struct md_op_data *data, int ea_size);
 void mdc_setattr_pack(struct ptlrpc_request *req, struct md_op_data *op_data,
-void *ea, int ealen, void *ea2, int ea2len);
+ void *ea, int ealen, void *ea2, int ea2len);
 void mdc_create_pack(struct ptlrpc_request *req, struct md_op_data *op_data,
 const void *data, int datalen, __u32 mode, __u32 uid,
 __u32 gid, cfs_cap_t capability, __u64 rdev);
diff --git a/drivers/staging/lustre/lustre/mdc/mdc_locks.c 
b/drivers/staging/lustre/lustre/mdc/mdc_locks.c
index 6dae574..958a164 100644
--- a/drivers/staging/lustre/lustre/mdc/mdc_locks.c
+++ b/drivers/staging/lustre/lustre/mdc/mdc_locks.c
@@ -366,7 +366,7 @@ mdc_intent_getxattr_pack(struct obd_export *exp,
LIST_HEAD(cancels);
 
req = ptlrpc_request_alloc(class_exp2cliimp(exp),
-   _LDLM_INTENT_GETXATTR);
+  _LDLM_INTENT_GETXATTR);
if (!req)
return ERR_PTR(-ENOMEM);
 
@@ -386,14 +386,12 @@ mdc_intent_getxattr_pack(struct obd_export *exp,
mdc_pack_body(req, _data->op_fid1, op_data->op_valid, maxdata, -1,
  0);
 
-   req_capsule_set_size(>rq_pill, _EADATA,
-   RCL_SERVER, maxdata);
+   req_capsule_set_size(>rq_pill, _EADATA, RCL_SERVER, maxdata);
 
-   req_capsule_set_size(>rq_pill, _EAVALS,
-   RCL_SERVER, maxdata);
+   req_capsule_set_size(>rq_pill, _EAVALS, RCL_SERVER, maxdata);
 
req_capsule_set_size(>rq_pill, _EAVALS_LENS,
-   RCL_SERVER, maxdata);
+RCL_SERVER, maxdata);
 
ptlrpc_request_set_replen(req);
 
@@ -439,8 +437,8 @@ static struct ptlrpc_request *mdc_intent_unlink_pack(struct 
obd_export *exp,
 }
 
 static struct ptlrpc_request *mdc_intent_getattr_pack(struct obd_export *exp,
-   struct lookup_intent *it,
-   struct md_op_data *op_data)
+ struct lookup_intent *it,
+struct md_op_data *op_data)
 {
struct ptlrpc_request *req;
struct obd_device *obddev = class_exp2obd(exp);
@@ -498,7 +496,7 @@ static struct ptlrpc_request *mdc_intent_layout_pack(struct 
obd_export *exp,
int rc;
 
req = ptlrpc_request_alloc(class_exp2cliimp(exp),
-   _LDLM_INTENT_LAYOUT);
+  _LDLM_INTENT_LAYOUT);
if (!req)
return ERR_PTR(-ENOMEM);
 
@@ -718,7 +716,7 @@ static int mdc_finish_enqueue(struct obd_export *exp,
void *lmm;
 
LDLM_DEBUG(lock, "layout lock returned by: %s, lvb_len: %d\n",
-   ldlm_it2str(it->it_op), lvb_len);
+  ldlm_it2str(it->it_op), lvb_len);
 
lmm = libcfs_kvzalloc(lvb_len, GFP_NOFS);
if (!lmm) {
@@ -1094,7 +1092,7 @@ int mdc_revalidate_lock(struct obd_export *exp, struct 
lookup_intent *it,
}
 
mode = mdc_lock_match(exp, LDLM_FL_BLOCK_GRANTED, fid,
-  LDLM_IBITS, ,
+ LDLM_IBITS, ,
  LCK_CR | LCK_CW | LCK_PR | LCK_PW,
  );
}
@@ -1264,9 +1262,9 @@ int mdc_intent_getattr_async(struct obd_export *exp,
__u64   flags = LDLM_FL_HAS_INTENT;
 
CDEBUG(D_DLMTRACE,
-   "name: %.*s in inode "DFID", intent: %s flags %#Lo\n",
-   op_data->op_namelen, op_data->op_name, PFID(_data->op_fid1),
-   ldlm_it2str(it->it_op), it->it_flags);
+  "name: %.*s in inode " DFID ", intent: %s flags %#Lo\n",
+  op_data->op_namelen, op_data->op_name, PFID(_data->op_fid1),
+  ldlm_it2str(it->it_op), it->it_flags);
 

[PATCH 17/25] staging/lustre/lov: Fix style vs open parenthesis alignment

2016-02-25 Thread green
From: Oleg Drokin 

This mostly fixes checkpatch complaints about
"Alignment should match open parenthesis"

Signed-off-by: Oleg Drokin 
---
 .../staging/lustre/lustre/lov/lov_cl_internal.h| 87 +++---
 drivers/staging/lustre/lustre/lov/lov_ea.c |  2 +-
 drivers/staging/lustre/lustre/lov/lov_internal.h   |  6 +-
 drivers/staging/lustre/lustre/lov/lov_io.c |  2 +-
 drivers/staging/lustre/lustre/lov/lov_lock.c   |  7 +-
 drivers/staging/lustre/lustre/lov/lov_obd.c| 35 -
 drivers/staging/lustre/lustre/lov/lov_object.c | 40 +-
 drivers/staging/lustre/lustre/lov/lov_offset.c |  3 +-
 drivers/staging/lustre/lustre/lov/lov_pack.c   |  7 +-
 drivers/staging/lustre/lustre/lov/lov_page.c   |  3 +-
 drivers/staging/lustre/lustre/lov/lov_pool.c   |  4 +-
 drivers/staging/lustre/lustre/lov/lovsub_lock.c|  2 +-
 drivers/staging/lustre/lustre/lov/lovsub_page.c|  2 +-
 drivers/staging/lustre/lustre/lov/lproc_lov.c  | 16 ++--
 14 files changed, 106 insertions(+), 110 deletions(-)

diff --git a/drivers/staging/lustre/lustre/lov/lov_cl_internal.h 
b/drivers/staging/lustre/lustre/lov/lov_cl_internal.h
index b5fc159..7dd3162 100644
--- a/drivers/staging/lustre/lustre/lov/lov_cl_internal.h
+++ b/drivers/staging/lustre/lustre/lov/lov_cl_internal.h
@@ -579,51 +579,49 @@ extern struct kmem_cache *lovsub_req_kmem;
 
 extern struct kmem_cache *lov_lock_link_kmem;
 
-int   lov_object_init(const struct lu_env *env, struct lu_object *obj,
-  const struct lu_object_conf *conf);
-int   lovsub_object_init(const struct lu_env *env, struct lu_object *obj,
-  const struct lu_object_conf *conf);
-int   lov_lock_init(const struct lu_env *env, struct cl_object *obj,
-  struct cl_lock *lock, const struct cl_io *io);
-int   lov_io_init(const struct lu_env *env, struct cl_object *obj,
-  struct cl_io *io);
-int   lovsub_lock_init(const struct lu_env *env, struct cl_object *obj,
-  struct cl_lock *lock, const struct cl_io *io);
-
-int   lov_lock_init_raid0(const struct lu_env *env, struct cl_object *obj,
-  struct cl_lock *lock, const struct cl_io *io);
-int   lov_lock_init_empty(const struct lu_env *env, struct cl_object *obj,
-  struct cl_lock *lock, const struct cl_io *io);
-int   lov_io_init_raid0(const struct lu_env *env, struct cl_object *obj,
-  struct cl_io *io);
-int   lov_io_init_empty(const struct lu_env *env, struct cl_object *obj,
-  struct cl_io *io);
-int   lov_io_init_released(const struct lu_env *env, struct cl_object *obj,
-  struct cl_io *io);
-void  lov_lock_unlink(const struct lu_env *env, struct lov_lock_link *link,
-  struct lovsub_lock *sub);
+int lov_object_init(const struct lu_env *env, struct lu_object *obj,
+   const struct lu_object_conf *conf);
+int lovsub_object_init(const struct lu_env *env, struct lu_object *obj,
+  const struct lu_object_conf *conf);
+int lov_lock_init(const struct lu_env *env, struct cl_object *obj,
+ struct cl_lock *lock, const struct cl_io *io);
+int lov_io_init(const struct lu_env *env, struct cl_object *obj,
+   struct cl_io *io);
+int lovsub_lock_init(const struct lu_env *env, struct cl_object *obj,
+struct cl_lock *lock, const struct cl_io *io);
+
+int lov_lock_init_raid0(const struct lu_env *env, struct cl_object *obj,
+   struct cl_lock *lock, const struct cl_io *io);
+int lov_lock_init_empty(const struct lu_env *env, struct cl_object *obj,
+   struct cl_lock *lock, const struct cl_io *io);
+int lov_io_init_raid0(const struct lu_env *env, struct cl_object *obj,
+ struct cl_io *io);
+int lov_io_init_empty(const struct lu_env *env, struct cl_object *obj,
+ struct cl_io *io);
+int lov_io_init_released(const struct lu_env *env, struct cl_object *obj,
+struct cl_io *io);
+void lov_lock_unlink(const struct lu_env *env, struct lov_lock_link *link,
+struct lovsub_lock *sub);
 
 struct lov_io_sub *lov_sub_get(const struct lu_env *env, struct lov_io *lio,
   int stripe);
-void  lov_sub_put(struct lov_io_sub *sub);
-int   lov_sublock_modify(const struct lu_env *env, struct lov_lock *lov,
-  struct lovsub_lock *sublock,
-  const struct cl_lock_descr *d, int idx);
-
-int   lov_page_init(const struct lu_env *env, struct cl_object *ob,
-  struct cl_page *page, struct page *vmpage);
-int   lovsub_page_init(const struct lu_env *env, struct cl_object *ob,
-  struct cl_page *page, struct page *vmpage);
-
-int   

[PATCH 24/25] staging/lustre: Remove unneeded {} in lprocfs_stats_unlock()

2016-02-25 Thread green
From: Oleg Drokin 

Since there's only one call in those if () else branches, the
braces are not really necessary.

Highlighted by checkpatch.

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/include/lprocfs_status.h | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/staging/lustre/lustre/include/lprocfs_status.h 
b/drivers/staging/lustre/lustre/include/lprocfs_status.h
index 89052b2..4146c9c 100644
--- a/drivers/staging/lustre/lustre/include/lprocfs_status.h
+++ b/drivers/staging/lustre/lustre/include/lprocfs_status.h
@@ -426,11 +426,10 @@ static inline void lprocfs_stats_unlock(struct 
lprocfs_stats *stats, int opc,
 
case LPROCFS_GET_SMP_ID:
if (stats->ls_flags & LPROCFS_STATS_FLAG_NOPERCPU) {
-   if (stats->ls_flags & LPROCFS_STATS_FLAG_IRQ_SAFE) {
+   if (stats->ls_flags & LPROCFS_STATS_FLAG_IRQ_SAFE)
spin_unlock_irqrestore(>ls_lock, *flags);
-   } else {
+   else
spin_unlock(>ls_lock);
-   }
} else {
put_cpu();
}
@@ -438,11 +437,10 @@ static inline void lprocfs_stats_unlock(struct 
lprocfs_stats *stats, int opc,
 
case LPROCFS_GET_NUM_CPU:
if (stats->ls_flags & LPROCFS_STATS_FLAG_NOPERCPU) {
-   if (stats->ls_flags & LPROCFS_STATS_FLAG_IRQ_SAFE) {
+   if (stats->ls_flags & LPROCFS_STATS_FLAG_IRQ_SAFE)
spin_unlock_irqrestore(>ls_lock, *flags);
-   } else {
+   else
spin_unlock(>ls_lock);
-   }
}
return;
}
-- 
2.1.0



[PATCH 13/25] staging/lustre: NEED_QUOTA_DEFS is never defined, drop it.

2016-02-25 Thread green
From: Oleg Drokin 

Signed-off-by: Oleg Drokin 
---
 .../staging/lustre/lustre/include/lustre/lustre_user.h   | 16 
 1 file changed, 16 deletions(-)

diff --git a/drivers/staging/lustre/lustre/include/lustre/lustre_user.h 
b/drivers/staging/lustre/lustre/include/lustre/lustre_user.h
index 2e9f025..9f026bd 100644
--- a/drivers/staging/lustre/lustre/include/lustre/lustre_user.h
+++ b/drivers/staging/lustre/lustre/include/lustre/lustre_user.h
@@ -552,22 +552,6 @@ enum {
RMT_RGETFACL= 4
 };
 
-#ifdef NEED_QUOTA_DEFS
-#ifndef QIF_BLIMITS
-#define QIF_BLIMITS 1
-#define QIF_SPACE   2
-#define QIF_ILIMITS 4
-#define QIF_INODES  8
-#define QIF_BTIME   16
-#define QIF_ITIME   32
-#define QIF_LIMITS  (QIF_BLIMITS | QIF_ILIMITS)
-#define QIF_USAGE   (QIF_SPACE | QIF_INODES)
-#define QIF_TIMES   (QIF_BTIME | QIF_ITIME)
-#define QIF_ALL (QIF_LIMITS | QIF_USAGE | QIF_TIMES)
-#endif
-
-#endif /* !__KERNEL__ */
-
 /* lustre volatile file support
  * file name header: .^L^S^T^R:volatile"
  */
-- 
2.1.0



[PATCH 08/25] staging/lustre: Remove liblustre references from explanations

2016-02-25 Thread green
From: Oleg Drokin 

Since liblustre is no longer with us, referencing to it in the
explanations only makes things less clear

Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/include/cl_object.h   | 4 ++--
 drivers/staging/lustre/lustre/include/lustre_lite.h | 2 +-
 drivers/staging/lustre/lustre/include/obd.h | 2 +-
 drivers/staging/lustre/lustre/obdclass/cl_object.c  | 1 -
 drivers/staging/lustre/lustre/osc/osc_lock.c| 3 +--
 5 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/staging/lustre/lustre/include/cl_object.h 
b/drivers/staging/lustre/lustre/include/cl_object.h
index 4b3055d..fb971de 100644
--- a/drivers/staging/lustre/lustre/include/cl_object.h
+++ b/drivers/staging/lustre/lustre/include/cl_object.h
@@ -697,7 +697,7 @@ enum cl_page_type {
 
/** Transient page, the transient cl_page is used to bind a cl_page
 *  to vmpage which is not belonging to the same object of cl_page.
-*  it is used in DirectIO, lockless IO and liblustre.
+*  it is used in DirectIO and lockless IO.
 */
CPT_TRANSIENT,
 };
@@ -2282,7 +2282,7 @@ enum cl_io_lock_dmd {
CILR_MANDATORY = 0,
/** Layers are free to decide between local and global locking. */
CILR_MAYBE,
-   /** Never lock: there is no cache (e.g., liblustre). */
+   /** Never lock: there is no cache (e.g., lockless IO). */
CILR_NEVER
 };
 
diff --git a/drivers/staging/lustre/lustre/include/lustre_lite.h 
b/drivers/staging/lustre/lustre/include/lustre_lite.h
index 9852325..fcc5ebb 100644
--- a/drivers/staging/lustre/lustre/include/lustre_lite.h
+++ b/drivers/staging/lustre/lustre/include/lustre_lite.h
@@ -54,7 +54,7 @@
 #define LL_MAX_BLKSIZE   (1UL<ols_state = OLS_RELEASED;
return osc_lock_unhold(ols);
-- 
2.1.0



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