Re: [PATCH kernel v4 11/11] powerpc/powernv/npu: Enable NVLink pass through

[Alexey Kardashevskiy]

On 05/04/2016 12:08 AM, Alistair Popple wrote:

Hi Alexey,

On Fri, 29 Apr 2016 18:55:24 Alexey Kardashevskiy wrote:

IBM POWER8 NVlink systems come with Tesla K40-ish GPUs each of which
also has a couple of fast speed links (NVLink). The interface to links
is exposed as an emulated PCI bridge which is included into the same
IOMMU group as the corresponding GPU.

In the kernel, NPUs get a separate PHB of the PNV_PHB_NPU type and a PE
which behave pretty much as the standard IODA2 PHB except NPU PHB has
just a single TVE in the hardware which means it can have either
32bit window or 64bit window or DMA bypass but never two of these.

In order to make these links work when GPU is passed to the guest,
these bridges need to be passed as well; otherwise performance will
degrade.

This implements and exports API to manage NPU state in regard to VFIO;
it replicates iommu_table_group_ops.

This defines a new pnv_pci_ioda2_npu_ops which is assigned to
the IODA2 bridge if there are NPUs for a GPU on the bridge.
The new callbacks call the default IODA2 callbacks plus new NPU API.
This adds a gpe_table_group_to_npe() helper to find NPU PE for the IODA2
table_group, it is not expected to fail as the helper is only called
from the pnv_pci_ioda2_npu_ops.

This does not define NPU-specific .release_ownership() so after
VFIO is finished, DMA on NPU is disabled which is ok as the nvidia
driver sets DMA mask when probing which enable 32 or 64bit DMA on NPU.

This adds a pnv_pci_npu_setup_iommu() helper which adds NPUs to
the GPU group if any found. The helper uses helpers to look for
the "ibm,gpu" property in the device tree which is a phandle of
the corresponding GPU.

This adds an additional loop over PEs in pnv_ioda_setup_dma() as the main
loop skips NPU PEs as they do not have 32bit DMA segments.

As pnv_npu_set_window() and pnv_npu_unset_window() are started being used
by the new IODA2-NPU IOMMU group, this makes the helpers public and
adds the DMA window number parameter.

Signed-off-by: Alexey Kardashevskiy 
---
Changes:
v4:
* reused pnv_npu_set_window/pnv_npu_unset_window where possible
* added comments, changed commit log

v3:
* moved NPU-to-GPU IOMMU grouping later after all PHBs are discovered
* removed hack to make iommu_add_device() work, iommu_group_add_device()
is used instead
* cleanup in gpe_table_group_to_npe_cb()

v2:
* reimplemented to support NPU + GPU in the same group
* merged "powerpc/powernv/npu: Add NPU devices to IOMMU group" and
"powerpc/powernv/npu: Enable passing through via VFIO" into this patch
---
 arch/powerpc/platforms/powernv/npu-dma.c  |  64 +--
 arch/powerpc/platforms/powernv/pci-ioda.c | 102

++

 arch/powerpc/platforms/powernv/pci.h  |   6 ++
 3 files changed, 166 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/npu-dma.c

b/arch/powerpc/platforms/powernv/npu-dma.c

index cb2d1da..0459e10 100644
--- a/arch/powerpc/platforms/powernv/npu-dma.c
+++ b/arch/powerpc/platforms/powernv/npu-dma.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 

 #include 
 #include 
@@ -154,7 +155,7 @@ static struct pnv_ioda_pe *get_gpu_pci_dev_and_pe(struct

pnv_ioda_pe *npe,

return pe;
 }

-static long pnv_npu_set_window(struct pnv_ioda_pe *npe,
+long pnv_npu_set_window(struct pnv_ioda_pe *npe, int num,
struct iommu_table *tbl)
 {
struct pnv_phb *phb = npe->phb;
@@ -182,13 +183,13 @@ static long pnv_npu_set_window(struct pnv_ioda_pe

*npe,

pnv_pci_ioda2_tce_invalidate_entire(phb, false);

/* Add the table to the list so its TCE cache will get invalidated */
-   pnv_pci_link_table_and_group(phb->hose->node, 0,
+   pnv_pci_link_table_and_group(phb->hose->node, num,
tbl, >table_group);

return 0;
 }

-static long pnv_npu_unset_window(struct pnv_ioda_pe *npe)
+long pnv_npu_unset_window(struct pnv_ioda_pe *npe, int num)
 {
struct pnv_phb *phb = npe->phb;
int64_t rc;
@@ -205,7 +206,7 @@ static long pnv_npu_unset_window(struct pnv_ioda_pe

*npe)

}
pnv_pci_ioda2_tce_invalidate_entire(phb, false);

-   pnv_pci_unlink_table_and_group(npe->table_group.tables[0],
+   pnv_pci_unlink_table_and_group(npe->table_group.tables[num],
>table_group);

return 0;
@@ -231,7 +232,7 @@ static void pnv_npu_dma_set_32(struct pnv_ioda_pe *npe)
if (!gpe)
return;

-   rc = pnv_npu_set_window(npe, gpe->table_group.tables[0]);
+   rc = pnv_npu_set_window(npe, 0, gpe->table_group.tables[0]);

/*
 * We don't initialise npu_pe->tce32_table as we always use
@@ -255,7 +256,7 @@ static int pnv_npu_dma_set_bypass(struct pnv_ioda_pe

*npe)

if (phb->type != PNV_PHB_NPU || !npe->pdev)
return -EINVAL;

-   rc = pnv_npu_unset_window(npe);
+   rc = pnv_npu_unset_window(npe, 0);
if (rc != OPAL_SUCCESS)
  

Re: [PATCH kernel v4 11/11] powerpc/powernv/npu: Enable NVLink pass through

[Alexey Kardashevskiy]

On 05/04/2016 12:08 AM, Alistair Popple wrote:

Hi Alexey,

On Fri, 29 Apr 2016 18:55:24 Alexey Kardashevskiy wrote:

IBM POWER8 NVlink systems come with Tesla K40-ish GPUs each of which
also has a couple of fast speed links (NVLink). The interface to links
is exposed as an emulated PCI bridge which is included into the same
IOMMU group as the corresponding GPU.

In the kernel, NPUs get a separate PHB of the PNV_PHB_NPU type and a PE
which behave pretty much as the standard IODA2 PHB except NPU PHB has
just a single TVE in the hardware which means it can have either
32bit window or 64bit window or DMA bypass but never two of these.

In order to make these links work when GPU is passed to the guest,
these bridges need to be passed as well; otherwise performance will
degrade.

This implements and exports API to manage NPU state in regard to VFIO;
it replicates iommu_table_group_ops.

This defines a new pnv_pci_ioda2_npu_ops which is assigned to
the IODA2 bridge if there are NPUs for a GPU on the bridge.
The new callbacks call the default IODA2 callbacks plus new NPU API.
This adds a gpe_table_group_to_npe() helper to find NPU PE for the IODA2
table_group, it is not expected to fail as the helper is only called
from the pnv_pci_ioda2_npu_ops.

This does not define NPU-specific .release_ownership() so after
VFIO is finished, DMA on NPU is disabled which is ok as the nvidia
driver sets DMA mask when probing which enable 32 or 64bit DMA on NPU.

This adds a pnv_pci_npu_setup_iommu() helper which adds NPUs to
the GPU group if any found. The helper uses helpers to look for
the "ibm,gpu" property in the device tree which is a phandle of
the corresponding GPU.

This adds an additional loop over PEs in pnv_ioda_setup_dma() as the main
loop skips NPU PEs as they do not have 32bit DMA segments.

As pnv_npu_set_window() and pnv_npu_unset_window() are started being used
by the new IODA2-NPU IOMMU group, this makes the helpers public and
adds the DMA window number parameter.

Signed-off-by: Alexey Kardashevskiy 
---
Changes:
v4:
* reused pnv_npu_set_window/pnv_npu_unset_window where possible
* added comments, changed commit log

v3:
* moved NPU-to-GPU IOMMU grouping later after all PHBs are discovered
* removed hack to make iommu_add_device() work, iommu_group_add_device()
is used instead
* cleanup in gpe_table_group_to_npe_cb()

v2:
* reimplemented to support NPU + GPU in the same group
* merged "powerpc/powernv/npu: Add NPU devices to IOMMU group" and
"powerpc/powernv/npu: Enable passing through via VFIO" into this patch
---
 arch/powerpc/platforms/powernv/npu-dma.c  |  64 +--
 arch/powerpc/platforms/powernv/pci-ioda.c | 102

++

 arch/powerpc/platforms/powernv/pci.h  |   6 ++
 3 files changed, 166 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/npu-dma.c

b/arch/powerpc/platforms/powernv/npu-dma.c

index cb2d1da..0459e10 100644
--- a/arch/powerpc/platforms/powernv/npu-dma.c
+++ b/arch/powerpc/platforms/powernv/npu-dma.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 

 #include 
 #include 
@@ -154,7 +155,7 @@ static struct pnv_ioda_pe *get_gpu_pci_dev_and_pe(struct

pnv_ioda_pe *npe,

return pe;
 }

-static long pnv_npu_set_window(struct pnv_ioda_pe *npe,
+long pnv_npu_set_window(struct pnv_ioda_pe *npe, int num,
struct iommu_table *tbl)
 {
struct pnv_phb *phb = npe->phb;
@@ -182,13 +183,13 @@ static long pnv_npu_set_window(struct pnv_ioda_pe

*npe,

pnv_pci_ioda2_tce_invalidate_entire(phb, false);

/* Add the table to the list so its TCE cache will get invalidated */
-   pnv_pci_link_table_and_group(phb->hose->node, 0,
+   pnv_pci_link_table_and_group(phb->hose->node, num,
tbl, >table_group);

return 0;
 }

-static long pnv_npu_unset_window(struct pnv_ioda_pe *npe)
+long pnv_npu_unset_window(struct pnv_ioda_pe *npe, int num)
 {
struct pnv_phb *phb = npe->phb;
int64_t rc;
@@ -205,7 +206,7 @@ static long pnv_npu_unset_window(struct pnv_ioda_pe

*npe)

}
pnv_pci_ioda2_tce_invalidate_entire(phb, false);

-   pnv_pci_unlink_table_and_group(npe->table_group.tables[0],
+   pnv_pci_unlink_table_and_group(npe->table_group.tables[num],
>table_group);

return 0;
@@ -231,7 +232,7 @@ static void pnv_npu_dma_set_32(struct pnv_ioda_pe *npe)
if (!gpe)
return;

-   rc = pnv_npu_set_window(npe, gpe->table_group.tables[0]);
+   rc = pnv_npu_set_window(npe, 0, gpe->table_group.tables[0]);

/*
 * We don't initialise npu_pe->tce32_table as we always use
@@ -255,7 +256,7 @@ static int pnv_npu_dma_set_bypass(struct pnv_ioda_pe

*npe)

if (phb->type != PNV_PHB_NPU || !npe->pdev)
return -EINVAL;

-   rc = pnv_npu_unset_window(npe);
+   rc = pnv_npu_unset_window(npe, 0);
if (rc != OPAL_SUCCESS)

Re: [PATCH v4 3/3] ARM: dts: use syscon in cygnus touchscreen dt node

[Raveendra Padasalagi]

Thanks Dmitry and Florian.

Hi Dmitry,

I understand the dts changes are really needed for the touch screen
driver changes made in this patch. But currently there are no deployed
systems/customer's using this driver. So please pull the driver changes
and I will follow up to make sure dts changes also goes in.

Below is the latest patch set pushed.

https://lkml.org/lkml/2016/3/24/45


Thanks ,
Raveendra

On Thu, Apr 7, 2016 at 1:55 AM, Florian Fainelli  wrote:
> 2016-04-06 10:31 GMT-07:00 Dmitry Torokhov :
>> On Sat, Feb 27, 2016 at 12:29:56PM +0530, Raveendra Padasalagi wrote:
>>> In Cygnus SOC touch screen controller registers are shared
>>> with ADC and flex timer. Using readl/writel could lead to
>>> race condition. So touchscreen driver is enhanced to support
>>> syscon based register access to take care of mutually exclusive
>>> access.
>>>
>>> This patch enables syscon support in touchscreen driver
>>> by adding necessary properties in touchscreen dt node and
>>> in addition to this renamed existing "tsc" touchscreen node
>>> name to "touchscreen".
>>>
>>> Signed-off-by: Raveendra Padasalagi 
>>> Reviewed-by: Ray Jui 
>>> Reviewed-by: Scott Branden 
>>
>> OK, since the new dts is really needed for the driver I'll be folding
>> this into the touchscreen driver patch unless I hear someone yelling at
>> me.
>
> Works for me:
>
> Acked-by: Florian Fainelli 
> --
> Florian

Re: [PATCH v4 3/3] ARM: dts: use syscon in cygnus touchscreen dt node

[Raveendra Padasalagi]

Thanks Dmitry and Florian.

Hi Dmitry,

I understand the dts changes are really needed for the touch screen
driver changes made in this patch. But currently there are no deployed
systems/customer's using this driver. So please pull the driver changes
and I will follow up to make sure dts changes also goes in.

Below is the latest patch set pushed.

https://lkml.org/lkml/2016/3/24/45


Thanks ,
Raveendra

On Thu, Apr 7, 2016 at 1:55 AM, Florian Fainelli  wrote:
> 2016-04-06 10:31 GMT-07:00 Dmitry Torokhov :
>> On Sat, Feb 27, 2016 at 12:29:56PM +0530, Raveendra Padasalagi wrote:
>>> In Cygnus SOC touch screen controller registers are shared
>>> with ADC and flex timer. Using readl/writel could lead to
>>> race condition. So touchscreen driver is enhanced to support
>>> syscon based register access to take care of mutually exclusive
>>> access.
>>>
>>> This patch enables syscon support in touchscreen driver
>>> by adding necessary properties in touchscreen dt node and
>>> in addition to this renamed existing "tsc" touchscreen node
>>> name to "touchscreen".
>>>
>>> Signed-off-by: Raveendra Padasalagi 
>>> Reviewed-by: Ray Jui 
>>> Reviewed-by: Scott Branden 
>>
>> OK, since the new dts is really needed for the driver I'll be folding
>> this into the touchscreen driver patch unless I hear someone yelling at
>> me.
>
> Works for me:
>
> Acked-by: Florian Fainelli 
> --
> Florian

RE: [PATCH 1/2] usb: configfs: allow UDC binding rule configured as binding to *any* UDC

[Du, Changbin]

Hi,
> > On most platforms, there is only one device controller available.
> > In this case, we desn't care the UDC's name. So let's ignore the
> > name by setting 'UDC' to 'any'.
> 
> Hmm libubsgx allows to do this for a very long time. You simply pass
> NULL instead of pointer to usbg_udc.
> 
> It is also possible to do this from command line, just simply:
> 
> $ echo `ls -1 /sys/class/udc | head -n 1` > UDC
> 
> So if we can easily do this from user space what's the benefit of adding
> this special "any" keyword to kernel?
> 
Well, it is just for *easy to use*. Looking up /sys/class/udc mostly
can be skipped. The UDC core support this convenience behavior, 
so why don't we export it with a little change?

> > And also we can change UDC name
> > at any time if it is not binded (no need set to "" first).
> >
> 
> Not sure if:
> 
> $ echo "" > UDC
> 
> is really a problem. Personally I'm quite used to situation in which I
> have to turn the light off before turning it on once again;)
> 
That is not a problem. But just avoid pseudo 'busy'. If gadget is not 
bind, it is free to reconfigure it. So seem no need block re-configuration.

In a word, this patch is just an improvement, not to fix any issues or
add new function.

> Cheers,
> --
> Krzysztof Opasiak
> Samsung R Institute Poland
> Samsung Electronics

Thanks,
Du, Changbin

RE: [PATCH 1/2] usb: configfs: allow UDC binding rule configured as binding to *any* UDC

[Du, Changbin]

Hi,
> > On most platforms, there is only one device controller available.
> > In this case, we desn't care the UDC's name. So let's ignore the
> > name by setting 'UDC' to 'any'.
> 
> Hmm libubsgx allows to do this for a very long time. You simply pass
> NULL instead of pointer to usbg_udc.
> 
> It is also possible to do this from command line, just simply:
> 
> $ echo `ls -1 /sys/class/udc | head -n 1` > UDC
> 
> So if we can easily do this from user space what's the benefit of adding
> this special "any" keyword to kernel?
> 
Well, it is just for *easy to use*. Looking up /sys/class/udc mostly
can be skipped. The UDC core support this convenience behavior, 
so why don't we export it with a little change?

> > And also we can change UDC name
> > at any time if it is not binded (no need set to "" first).
> >
> 
> Not sure if:
> 
> $ echo "" > UDC
> 
> is really a problem. Personally I'm quite used to situation in which I
> have to turn the light off before turning it on once again;)
> 
That is not a problem. But just avoid pseudo 'busy'. If gadget is not 
bind, it is free to reconfigure it. So seem no need block re-configuration.

In a word, this patch is just an improvement, not to fix any issues or
add new function.

> Cheers,
> --
> Krzysztof Opasiak
> Samsung R Institute Poland
> Samsung Electronics

Thanks,
Du, Changbin

[PATCH v8 0/7] usb: add support for Intel dual role port mux

[Lu Baolu]

Intel SOC chips are featured with USB dual role. The host role
is provided by Intel xHCI IP, and the gadget role is provided
by IP from designware. Tablet platform designs always share a
single port for both host and gadget controllers.  There is a
mux to switch the port to the right controller according to the
cable type. OS needs to provide the callback to control the mux
when a plug-in event raises. The method to control the mux is
platform dependent. At least three types of implementation can
be found across current devices. 1) GPIO pins; 2) a unit which
can be controlled by memory mapped registers; 3) ACPI ASL code.

This patch series adds supports for Intel dual role port mux.
It includes:
(1) A helper layer on top of extcon for individual mux driver.
It listens to the USB-HOST extcon cable and call the switch
call-back when the cable state changes.
(2) Drivers for GPIO controlled port mux which could be found
on Baytrail devices. A mfd driver is used to split the GPIOs
into a USB gpio extcon device, a fixed regulator for gpio
controlled USB VCC, and a USB mux device. Driver for USB
gpio extcon device is already in upstream Linux. This patch
series includes a driver for GPIO USB mux.
(3) Drivers for USB port mux controlled through memory mapped
registers and the logic to create the mux device. This type
of dual role port mux could be found in Cherry Trail and
Broxton devices.

Lu Baolu (7):
  regulator: fixed: add support for ACPI interface
  usb: mux: add generic code for dual role port mux
  usb: mux: add driver for Intel gpio controlled port mux
  usb: mux: add driver for Intel drcfg controlled port mux
  mfd: intel_vuport: Add Intel virtual USB port MFD Driver
  usb: pci-quirks: add Intel USB drcfg mux device
  MAINTAINERS: add maintainer entry for Intel USB dual role mux drivers

Change log:

v7->v8:
 - In patch "regulator: fixed: add support for ACPI interface", the
   fixed regulator gpio name has been changed to "gpio".
 - In patch "MAINTAINERS: add maintainer entry for Intel USB dual role
   mux drivers", filenames have been updated.

v6->v7:
 - Two patches have been picked up by extcon maintainer. Hence,
   remove them since this version.
   - extcon: usb-gpio: add device binding for platform device
   - extcon: usb-gpio: add support for ACPI gpio interface
 - Below patch has been removed from this series because it's unnecessary.
   - regulator: fixed: add device binding for platform device
 - In patch "regulator: fixed: add support for ACPI interface",
   a static gpio name is used to get the regulator gpio.
 - In patch "mfd: intel_vuport: Add Intel virtual USB port MFD Driver",
   unnecessary "gpio-name" string property has been removed.

v5->v6:
 Work internally with Felipe to improve the whole patch series.
 Below changes have been made since last version.
 - rework the common code to make it a generic interface for mux devices;
 - split the vbus gpio handling to a fixed regulator device;
 - removed unnecessary filtering for state change;
 - removed unnecessary WARN statement;
 - removed globals in mux drivers;
 - removed unnecessary register polling and waiting in drcfg driver;

v4->v5:
 - Change the extcon interfaces with the new ones suggested by
   2a9de9c0f08d6 (extcon: Use the unique id for external connector
   instead of string)
 - remove patch "usb: pci-quirks: add Intel USB drcfg mux device"
   from this serial due to that it's not driver staff. Will be
   submitted seperately.

v3->v4:
 - Check all patches with "checkpatch.pl --strict", and fix all
   CHECKs;
 - Change sysfs node from "intel_mux" to "port_mux";
 - Refines below confusing functions:
   intel_usb_mux_register() -> intel_usb_mux_bind_cable()
   intel_usb_mux_unregister() -> intel_usb_mux_unbind_cable();
 - Remove unnecessary struct intel_mux_dev.

v2->v3:
 - uvport mfd driver got reviewed by Lee Jones, the following
   changes were made accordingly.
 - seperate uvport driver from the mux drivers in MAINTAINERS file
 - refine the description in Kconfig
 - refine the mfd_cell structure data

v1->v2:
 - move mux driver from drivers/usb/misc to drivers/usb/mux;
 - replace debugfs with sysfs for user level mux control;
 - remove unnecessary register restore if mux registeration failed;
 - Add "Acked-by: Chanwoo Choi " to extcon changes;
 - Make the file names and exported function names more specific;
 - Remove the usb_mux_get_dev() interface;
 - Move "struct intel_usb_mux" from .h to .c file;
 - Fix various kbuild robot warnings.

 Documentation/ABI/testing/sysfs-bus-platform |  17 +++
 MAINTAINERS  |  10 ++
 drivers/mfd/Kconfig  |   8 +
 drivers/mfd/Makefile |   1 +
 drivers/mfd/intel-vuport.c   |  89 +++
 drivers/regulator/fixed.c|  46 ++
 drivers/usb/Kconfig  |   2 +
 drivers/usb/Makefile 

[PATCH v8 0/7] usb: add support for Intel dual role port mux

[Lu Baolu]

Intel SOC chips are featured with USB dual role. The host role
is provided by Intel xHCI IP, and the gadget role is provided
by IP from designware. Tablet platform designs always share a
single port for both host and gadget controllers.  There is a
mux to switch the port to the right controller according to the
cable type. OS needs to provide the callback to control the mux
when a plug-in event raises. The method to control the mux is
platform dependent. At least three types of implementation can
be found across current devices. 1) GPIO pins; 2) a unit which
can be controlled by memory mapped registers; 3) ACPI ASL code.

This patch series adds supports for Intel dual role port mux.
It includes:
(1) A helper layer on top of extcon for individual mux driver.
It listens to the USB-HOST extcon cable and call the switch
call-back when the cable state changes.
(2) Drivers for GPIO controlled port mux which could be found
on Baytrail devices. A mfd driver is used to split the GPIOs
into a USB gpio extcon device, a fixed regulator for gpio
controlled USB VCC, and a USB mux device. Driver for USB
gpio extcon device is already in upstream Linux. This patch
series includes a driver for GPIO USB mux.
(3) Drivers for USB port mux controlled through memory mapped
registers and the logic to create the mux device. This type
of dual role port mux could be found in Cherry Trail and
Broxton devices.

Lu Baolu (7):
  regulator: fixed: add support for ACPI interface
  usb: mux: add generic code for dual role port mux
  usb: mux: add driver for Intel gpio controlled port mux
  usb: mux: add driver for Intel drcfg controlled port mux
  mfd: intel_vuport: Add Intel virtual USB port MFD Driver
  usb: pci-quirks: add Intel USB drcfg mux device
  MAINTAINERS: add maintainer entry for Intel USB dual role mux drivers

Change log:

v7->v8:
 - In patch "regulator: fixed: add support for ACPI interface", the
   fixed regulator gpio name has been changed to "gpio".
 - In patch "MAINTAINERS: add maintainer entry for Intel USB dual role
   mux drivers", filenames have been updated.

v6->v7:
 - Two patches have been picked up by extcon maintainer. Hence,
   remove them since this version.
   - extcon: usb-gpio: add device binding for platform device
   - extcon: usb-gpio: add support for ACPI gpio interface
 - Below patch has been removed from this series because it's unnecessary.
   - regulator: fixed: add device binding for platform device
 - In patch "regulator: fixed: add support for ACPI interface",
   a static gpio name is used to get the regulator gpio.
 - In patch "mfd: intel_vuport: Add Intel virtual USB port MFD Driver",
   unnecessary "gpio-name" string property has been removed.

v5->v6:
 Work internally with Felipe to improve the whole patch series.
 Below changes have been made since last version.
 - rework the common code to make it a generic interface for mux devices;
 - split the vbus gpio handling to a fixed regulator device;
 - removed unnecessary filtering for state change;
 - removed unnecessary WARN statement;
 - removed globals in mux drivers;
 - removed unnecessary register polling and waiting in drcfg driver;

v4->v5:
 - Change the extcon interfaces with the new ones suggested by
   2a9de9c0f08d6 (extcon: Use the unique id for external connector
   instead of string)
 - remove patch "usb: pci-quirks: add Intel USB drcfg mux device"
   from this serial due to that it's not driver staff. Will be
   submitted seperately.

v3->v4:
 - Check all patches with "checkpatch.pl --strict", and fix all
   CHECKs;
 - Change sysfs node from "intel_mux" to "port_mux";
 - Refines below confusing functions:
   intel_usb_mux_register() -> intel_usb_mux_bind_cable()
   intel_usb_mux_unregister() -> intel_usb_mux_unbind_cable();
 - Remove unnecessary struct intel_mux_dev.

v2->v3:
 - uvport mfd driver got reviewed by Lee Jones, the following
   changes were made accordingly.
 - seperate uvport driver from the mux drivers in MAINTAINERS file
 - refine the description in Kconfig
 - refine the mfd_cell structure data

v1->v2:
 - move mux driver from drivers/usb/misc to drivers/usb/mux;
 - replace debugfs with sysfs for user level mux control;
 - remove unnecessary register restore if mux registeration failed;
 - Add "Acked-by: Chanwoo Choi " to extcon changes;
 - Make the file names and exported function names more specific;
 - Remove the usb_mux_get_dev() interface;
 - Move "struct intel_usb_mux" from .h to .c file;
 - Fix various kbuild robot warnings.

 Documentation/ABI/testing/sysfs-bus-platform |  17 +++
 MAINTAINERS  |  10 ++
 drivers/mfd/Kconfig  |   8 +
 drivers/mfd/Makefile |   1 +
 drivers/mfd/intel-vuport.c   |  89 +++
 drivers/regulator/fixed.c|  46 ++
 drivers/usb/Kconfig  |   2 +
 drivers/usb/Makefile |   1 +
 

[PATCH v8 2/7] usb: mux: add generic code for dual role port mux

[Lu Baolu]

Several Intel platforms implement USB dual role by having completely
separate xHCI and dwc3 IPs in PCH or SOC silicons. These two IPs share
a single USB port. There is another external port mux which controls
where the data lines should go. While the USB controllers are part of
the silicon, the port mux design are platform specific.

This patch adds the generic code to handle such usb port mux. It listens
to the USB HOST extcon cable, and switch the port by calling the port
switch ops provided by the individual port mux driver. It also registers
the mux device with sysfs, so that users can control the port mux from
user space.

Some other archs (e.g. Renesas R-Car gen2 SoCs) need an external mux to
swap usb roles as well. This code could be leveraged for those archs
as well.

Signed-off-by: Lu Baolu 
Reviewed-by: Heikki Krogerus 
Reviewed-by: Felipe Balbi 
Reviewed-by: Chanwoo Choi 
[baolu: extcon usage reviewed by Chanwoo Choi]
---
 Documentation/ABI/testing/sysfs-bus-platform |  17 +++
 drivers/usb/Kconfig  |   2 +
 drivers/usb/Makefile |   1 +
 drivers/usb/mux/Kconfig  |  11 ++
 drivers/usb/mux/Makefile |   4 +
 drivers/usb/mux/portmux-core.c   | 217 +++
 include/linux/usb/portmux.h  |  78 ++
 7 files changed, 330 insertions(+)
 create mode 100644 drivers/usb/mux/Kconfig
 create mode 100644 drivers/usb/mux/Makefile
 create mode 100644 drivers/usb/mux/portmux-core.c
 create mode 100644 include/linux/usb/portmux.h

diff --git a/Documentation/ABI/testing/sysfs-bus-platform 
b/Documentation/ABI/testing/sysfs-bus-platform
index 5172a61..f33f0a5 100644
--- a/Documentation/ABI/testing/sysfs-bus-platform
+++ b/Documentation/ABI/testing/sysfs-bus-platform
@@ -18,3 +18,20 @@ Description:
devices to opt-out of driver binding using a driver_override
name such as "none".  Only a single driver may be specified in
the override, there is no support for parsing delimiters.
+
+What:  /sys/bus/platform/devices/.../portmux.N/name
+   /sys/bus/platform/devices/.../portmux.N/state
+Date:  April 2016
+Contact:   Lu Baolu 
+Description:
+   In some platforms, a single USB port is shared between a USB 
host
+   controller and a device controller. A USB mux driver is needed 
to
+   handle the port mux. Read-only attribute "name" shows the name 
of
+   the port mux device. "state" attribute shows and stores the mux
+   state.
+   For read:
+   'peripheral' - mux switched to PERIPHERAL controller;
+   'host'   - mux switched to HOST controller.
+   For write:
+   'peripheral' - mux will be switched to PERIPHERAL controller;
+   'host'   - mux will be switched to HOST controller.
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 8689dcb..328916e 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -148,6 +148,8 @@ endif # USB
 
 source "drivers/usb/phy/Kconfig"
 
+source "drivers/usb/mux/Kconfig"
+
 source "drivers/usb/gadget/Kconfig"
 
 config USB_LED_TRIG
diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile
index dca7856..9a92338 100644
--- a/drivers/usb/Makefile
+++ b/drivers/usb/Makefile
@@ -6,6 +6,7 @@
 
 obj-$(CONFIG_USB)  += core/
 obj-$(CONFIG_USB_SUPPORT)  += phy/
+obj-$(CONFIG_USB_SUPPORT)  += mux/
 
 obj-$(CONFIG_USB_DWC3) += dwc3/
 obj-$(CONFIG_USB_DWC2) += dwc2/
diff --git a/drivers/usb/mux/Kconfig b/drivers/usb/mux/Kconfig
new file mode 100644
index 000..d91909f
--- /dev/null
+++ b/drivers/usb/mux/Kconfig
@@ -0,0 +1,11 @@
+#
+# USB port mux driver configuration
+#
+
+menu "USB Port MUX drivers"
+config USB_PORTMUX
+   select EXTCON
+   def_bool n
+   help
+ Generic USB dual role port mux support.
+endmenu
diff --git a/drivers/usb/mux/Makefile b/drivers/usb/mux/Makefile
new file mode 100644
index 000..f85df92
--- /dev/null
+++ b/drivers/usb/mux/Makefile
@@ -0,0 +1,4 @@
+#
+# Makefile for USB port mux drivers
+#
+obj-$(CONFIG_USB_PORTMUX)  += portmux-core.o
diff --git a/drivers/usb/mux/portmux-core.c b/drivers/usb/mux/portmux-core.c
new file mode 100644
index 000..0e3548b
--- /dev/null
+++ b/drivers/usb/mux/portmux-core.c
@@ -0,0 +1,217 @@
+/**
+ * intel_mux.c - USB Port Mux support
+ *
+ * Copyright (C) 2016 Intel Corporation
+ *
+ * Author: Lu Baolu 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+

[PATCH v8 2/7] usb: mux: add generic code for dual role port mux

[Lu Baolu]

Several Intel platforms implement USB dual role by having completely
separate xHCI and dwc3 IPs in PCH or SOC silicons. These two IPs share
a single USB port. There is another external port mux which controls
where the data lines should go. While the USB controllers are part of
the silicon, the port mux design are platform specific.

This patch adds the generic code to handle such usb port mux. It listens
to the USB HOST extcon cable, and switch the port by calling the port
switch ops provided by the individual port mux driver. It also registers
the mux device with sysfs, so that users can control the port mux from
user space.

Some other archs (e.g. Renesas R-Car gen2 SoCs) need an external mux to
swap usb roles as well. This code could be leveraged for those archs
as well.

Signed-off-by: Lu Baolu 
Reviewed-by: Heikki Krogerus 
Reviewed-by: Felipe Balbi 
Reviewed-by: Chanwoo Choi 
[baolu: extcon usage reviewed by Chanwoo Choi]
---
 Documentation/ABI/testing/sysfs-bus-platform |  17 +++
 drivers/usb/Kconfig  |   2 +
 drivers/usb/Makefile |   1 +
 drivers/usb/mux/Kconfig  |  11 ++
 drivers/usb/mux/Makefile |   4 +
 drivers/usb/mux/portmux-core.c   | 217 +++
 include/linux/usb/portmux.h  |  78 ++
 7 files changed, 330 insertions(+)
 create mode 100644 drivers/usb/mux/Kconfig
 create mode 100644 drivers/usb/mux/Makefile
 create mode 100644 drivers/usb/mux/portmux-core.c
 create mode 100644 include/linux/usb/portmux.h

diff --git a/Documentation/ABI/testing/sysfs-bus-platform 
b/Documentation/ABI/testing/sysfs-bus-platform
index 5172a61..f33f0a5 100644
--- a/Documentation/ABI/testing/sysfs-bus-platform
+++ b/Documentation/ABI/testing/sysfs-bus-platform
@@ -18,3 +18,20 @@ Description:
devices to opt-out of driver binding using a driver_override
name such as "none".  Only a single driver may be specified in
the override, there is no support for parsing delimiters.
+
+What:  /sys/bus/platform/devices/.../portmux.N/name
+   /sys/bus/platform/devices/.../portmux.N/state
+Date:  April 2016
+Contact:   Lu Baolu 
+Description:
+   In some platforms, a single USB port is shared between a USB 
host
+   controller and a device controller. A USB mux driver is needed 
to
+   handle the port mux. Read-only attribute "name" shows the name 
of
+   the port mux device. "state" attribute shows and stores the mux
+   state.
+   For read:
+   'peripheral' - mux switched to PERIPHERAL controller;
+   'host'   - mux switched to HOST controller.
+   For write:
+   'peripheral' - mux will be switched to PERIPHERAL controller;
+   'host'   - mux will be switched to HOST controller.
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 8689dcb..328916e 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -148,6 +148,8 @@ endif # USB
 
 source "drivers/usb/phy/Kconfig"
 
+source "drivers/usb/mux/Kconfig"
+
 source "drivers/usb/gadget/Kconfig"
 
 config USB_LED_TRIG
diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile
index dca7856..9a92338 100644
--- a/drivers/usb/Makefile
+++ b/drivers/usb/Makefile
@@ -6,6 +6,7 @@
 
 obj-$(CONFIG_USB)  += core/
 obj-$(CONFIG_USB_SUPPORT)  += phy/
+obj-$(CONFIG_USB_SUPPORT)  += mux/
 
 obj-$(CONFIG_USB_DWC3) += dwc3/
 obj-$(CONFIG_USB_DWC2) += dwc2/
diff --git a/drivers/usb/mux/Kconfig b/drivers/usb/mux/Kconfig
new file mode 100644
index 000..d91909f
--- /dev/null
+++ b/drivers/usb/mux/Kconfig
@@ -0,0 +1,11 @@
+#
+# USB port mux driver configuration
+#
+
+menu "USB Port MUX drivers"
+config USB_PORTMUX
+   select EXTCON
+   def_bool n
+   help
+ Generic USB dual role port mux support.
+endmenu
diff --git a/drivers/usb/mux/Makefile b/drivers/usb/mux/Makefile
new file mode 100644
index 000..f85df92
--- /dev/null
+++ b/drivers/usb/mux/Makefile
@@ -0,0 +1,4 @@
+#
+# Makefile for USB port mux drivers
+#
+obj-$(CONFIG_USB_PORTMUX)  += portmux-core.o
diff --git a/drivers/usb/mux/portmux-core.c b/drivers/usb/mux/portmux-core.c
new file mode 100644
index 000..0e3548b
--- /dev/null
+++ b/drivers/usb/mux/portmux-core.c
@@ -0,0 +1,217 @@
+/**
+ * intel_mux.c - USB Port Mux support
+ *
+ * Copyright (C) 2016 Intel Corporation
+ *
+ * Author: Lu Baolu 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int usb_mux_change_state(struct portmux_dev *pdev, int state)
+{
+   int ret;
+   struct device *dev = >dev;
+
+   dev_WARN_ONCE(dev,
+ 

[PATCH v8 5/7] mfd: intel_vuport: Add Intel virtual USB port MFD Driver

[Lu Baolu]

Some Intel platforms have an USB port mux controlled by GPIOs.
There's a single ACPI platform device that provides 1) USB ID
extcon device; 2) USB vbus regulator device; and 3) USB port
switch device. This MFD driver will split these 3 devices for
their respective drivers.

[baolu: removed .owner per platform_no_drv_owner.cocci]
Suggested-by: David Cohen 
Signed-off-by: Lu Baolu 
Reviewed-by: Felipe Balbi 
---
 drivers/mfd/Kconfig|  8 +
 drivers/mfd/Makefile   |  1 +
 drivers/mfd/intel-vuport.c | 89 ++
 3 files changed, 98 insertions(+)
 create mode 100644 drivers/mfd/intel-vuport.c

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index eea61e3..7e115ab 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -1578,5 +1578,13 @@ config MFD_VEXPRESS_SYSREG
  System Registers are the platform configuration block
  on the ARM Ltd. Versatile Express board.
 
+config MFD_INTEL_VUPORT
+   tristate "Intel virtual USB port controller"
+   select MFD_CORE
+   depends on X86 && ACPI
+   help
+ Say Y here to enable support for Intel's dual role port mux
+ controlled by GPIOs.
+
 endmenu
 endif
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 5eaa6465d..65b0518 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -203,3 +203,4 @@ intel-soc-pmic-objs := intel_soc_pmic_core.o 
intel_soc_pmic_crc.o
 intel-soc-pmic-$(CONFIG_INTEL_PMC_IPC) += intel_soc_pmic_bxtwc.o
 obj-$(CONFIG_INTEL_SOC_PMIC)   += intel-soc-pmic.o
 obj-$(CONFIG_MFD_MT6397)   += mt6397-core.o
+obj-$(CONFIG_MFD_INTEL_VUPORT) += intel-vuport.o
diff --git a/drivers/mfd/intel-vuport.c b/drivers/mfd/intel-vuport.c
new file mode 100644
index 000..fa84ed7
--- /dev/null
+++ b/drivers/mfd/intel-vuport.c
@@ -0,0 +1,89 @@
+/*
+ * MFD driver for Intel virtual USB port
+ *
+ * Copyright(c) 2016 Intel Corporation.
+ * Author: Lu Baolu 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* ACPI GPIO Mappings */
+static const struct acpi_gpio_params id_gpio = { 0, 0, false };
+static const struct acpi_gpio_params vbus_gpio = { 1, 0, false };
+static const struct acpi_gpio_params mux_gpio = { 2, 0, false };
+static const struct acpi_gpio_mapping acpi_usb_gpios[] = {
+   { "id-gpios", _gpio, 1 },
+   { "gpio-gpios", _gpio, 1 },
+   { "usb_mux-gpios", _gpio, 1 },
+   { },
+};
+
+static struct property_entry reg_properties[] = {
+   PROPERTY_ENTRY_STRING("supply-name", "regulator-usb-gpio"),
+   { },
+};
+
+static const struct property_set reg_properties_pset = {
+   .properties = reg_properties,
+};
+
+static const struct mfd_cell intel_vuport_mfd_cells[] = {
+   { .name = "extcon-usb-gpio", },
+   {
+   .name = "reg-fixed-voltage",
+   .pset = _properties_pset,
+   },
+   { .name = "intel-mux-gpio", },
+};
+
+static int vuport_probe(struct platform_device *pdev)
+{
+   struct device *dev = >dev;
+   int ret;
+
+   ret = acpi_dev_add_driver_gpios(ACPI_COMPANION(dev), acpi_usb_gpios);
+   if (ret)
+   return ret;
+
+   return mfd_add_devices(>dev, PLATFORM_DEVID_NONE,
+   intel_vuport_mfd_cells,
+   ARRAY_SIZE(intel_vuport_mfd_cells), NULL, 0,
+   NULL);
+}
+
+static int vuport_remove(struct platform_device *pdev)
+{
+   mfd_remove_devices(>dev);
+   acpi_dev_remove_driver_gpios(ACPI_COMPANION(>dev));
+
+   return 0;
+}
+
+static struct acpi_device_id vuport_acpi_match[] = {
+   { "INT3496" },
+   { }
+};
+MODULE_DEVICE_TABLE(acpi, vuport_acpi_match);
+
+static struct platform_driver vuport_driver = {
+   .driver = {
+   .name = "intel-vuport",
+   .acpi_match_table = ACPI_PTR(vuport_acpi_match),
+   },
+   .probe = vuport_probe,
+   .remove = vuport_remove,
+};
+
+module_platform_driver(vuport_driver);
+
+MODULE_AUTHOR("Lu Baolu ");
+MODULE_DESCRIPTION("Intel virtual USB port");
+MODULE_LICENSE("GPL v2");
-- 
2.1.4

Re: [PATCH] kasan: improve double-free detection

[Dmitry Vyukov]

On Wed, May 4, 2016 at 10:13 PM, Luruo, Kuthonuzo
 wrote:
>> >> I missed that Alexander already landed patches that reduce header size
>> >> to 16 bytes.
>> >> It is not OK to increase them again. Please leave state as bitfield
>> >> and update it with CAS (if we introduce helper functions for state
>> >> manipulation, they will hide the CAS loop, which is nice).
>> >>
>> >
>> > Available CAS primitives/compiler do not support CAS with bitfield. I 
>> > propose
>> > to change kasan_alloc_meta to:
>> >
>> > struct kasan_alloc_meta {
>> > struct kasan_track track;
>> > u16 size_delta; /* object_size - alloc size */
>> > u8 state;/* enum kasan_state */
>> > u8 reserved1;
>> > u32 reserved2;
>> > }
>> >
>> > This shrinks _used_ meta object by 1 byte wrt the original. (btw, patch v1 
>> > does
>> > not increase overall alloc meta object size). "Alloc size", where needed, 
>> > is
>> > easily calculated as a delta from cache->object_size.
>>
>>
>> What is the maximum size that slab can allocate?
>> I remember seeing slabs as large as 4MB some time ago (or did I
>> confuse it with something else?). If there are such large objects,
>> that 2 bytes won't be able to hold even delta.
>> However, now on my desktop I don't see slabs larger than 16KB in
>> /proc/slabinfo.
>
> max size for SLAB's slab is 32MB; default is 4MB. I must have gotten confused 
> by
> SLUB's 8KB limit. Anyway, new kasan_alloc_meta in patch V2:
>
> struct kasan_alloc_meta {
> struct kasan_track track;
> union {
> u8 lock;
> struct {
> u32 dummy : 8;
> u32 size_delta : 24;/* object_size - alloc size */
> };
> };
> u32 state : 2;  /* enum kasan_alloc_state */
> u32 unused : 30;
> };
>
> This uses 2 more bits than current, but given the constraints I think this is
> close to optimal.


We plan to use the unused part for another depot_stack_handle_t (u32)
to memorize stack of the last call_rcu on the object (this will
greatly simplify debugging of use-after-free for objects freed by
rcu). So we need that unused part.

I would would simply put all these fields into a single u32:

struct kasan_alloc_meta {
struct kasan_track track;
u32 status;  // contains lock, state and size
u32 unused;  // reserved for call_rcu stack handle
};

And then separately a helper type to pack/unpack status:

union kasan_alloc_status {
u32 raw;
struct {
   u32 lock : 1;
   u32 state : 2;
   u32 unused : 5;
   u32 size : 24;
};
};


Then, when we need to read/update the header we do something like:

kasan_alloc_status status, new_status;

for (;;) {
status.raw = READ_ONCE(header->status);
// read status, form new_status, for example:
if (status.lock)
  continue;
new_status.raw = status.raw;
new_status.lock = 1;
if (cas(>status, status.raw, new_status.raw))
 break;
}


This will probably make state manipulation functions few lines longer,
but since there are like 3 such functions I don't afraid that. And we
still can use bitfield magic to extract fields and leave whole 5 bits
unused bits for future.

[PATCH v8 3/7] usb: mux: add driver for Intel gpio controlled port mux

[Lu Baolu]

In some Intel platforms, a single usb port is shared between USB host
and device controller. The shared port is under control of GPIO pins.

This patch adds the support for USB GPIO controlled port mux.

[baolu: removed .owner per platform_no_drv_owner.cocci]
Signed-off-by: David Cohen 
Signed-off-by: Lu Baolu 
Reviewed-by: Heikki Krogerus 
Reviewed-by: Felipe Balbi 
---
 drivers/usb/mux/Kconfig  |  11 +++
 drivers/usb/mux/Makefile |   1 +
 drivers/usb/mux/portmux-intel-gpio.c | 149 +++
 3 files changed, 161 insertions(+)
 create mode 100644 drivers/usb/mux/portmux-intel-gpio.c

diff --git a/drivers/usb/mux/Kconfig b/drivers/usb/mux/Kconfig
index d91909f..1dc1f33 100644
--- a/drivers/usb/mux/Kconfig
+++ b/drivers/usb/mux/Kconfig
@@ -8,4 +8,15 @@ config USB_PORTMUX
def_bool n
help
  Generic USB dual role port mux support.
+
+config INTEL_MUX_GPIO
+   tristate "Intel dual role port mux controlled by GPIOs"
+   depends on GPIOLIB
+   depends on REGULATOR
+   depends on X86 && ACPI
+   select USB_PORTMUX
+   help
+ Say Y here to enable support for Intel dual role port mux
+ controlled by GPIOs.
+
 endmenu
diff --git a/drivers/usb/mux/Makefile b/drivers/usb/mux/Makefile
index f85df92..4eb5582 100644
--- a/drivers/usb/mux/Makefile
+++ b/drivers/usb/mux/Makefile
@@ -2,3 +2,4 @@
 # Makefile for USB port mux drivers
 #
 obj-$(CONFIG_USB_PORTMUX)  += portmux-core.o
+obj-$(CONFIG_INTEL_MUX_GPIO)   += portmux-intel-gpio.o
diff --git a/drivers/usb/mux/portmux-intel-gpio.c 
b/drivers/usb/mux/portmux-intel-gpio.c
new file mode 100644
index 000..b07ae2c
--- /dev/null
+++ b/drivers/usb/mux/portmux-intel-gpio.c
@@ -0,0 +1,149 @@
+/*
+ * USB Dual Role Port Mux driver controlled by gpios
+ *
+ * Copyright (c) 2016, Intel Corporation.
+ * Author: David Cohen 
+ * Author: Lu Baolu 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct vuport {
+   struct portmux_desc desc;
+   struct portmux_dev *pdev;
+   struct regulator *regulator;
+   struct gpio_desc *gpio_usb_mux;
+};
+
+/*
+ * id == 0, HOST connected, USB port should be set to peripheral
+ * id == 1, HOST disconnected, USB port should be set to host
+ *
+ * Peripheral: set USB mux to peripheral and disable VBUS
+ * Host: set USB mux to host and enable VBUS
+ */
+static inline int vuport_set_port(struct device *dev, int id)
+{
+   struct vuport *vup;
+
+   dev_dbg(dev, "USB PORT ID: %s\n", id ? "HOST" : "PERIPHERAL");
+
+   vup = dev_get_drvdata(dev);
+
+   gpiod_set_value_cansleep(vup->gpio_usb_mux, !id);
+
+   if (!id ^ regulator_is_enabled(vup->regulator))
+   return id ? regulator_disable(vup->regulator) :
+   regulator_enable(vup->regulator);
+
+   return 0;
+}
+
+static int vuport_cable_set(struct device *dev)
+{
+   return vuport_set_port(dev, 1);
+}
+
+static int vuport_cable_unset(struct device *dev)
+{
+   return vuport_set_port(dev, 0);
+}
+
+static const struct portmux_ops vuport_ops = {
+   .cable_set_cb = vuport_cable_set,
+   .cable_unset_cb = vuport_cable_unset,
+};
+
+static int vuport_probe(struct platform_device *pdev)
+{
+   struct device *dev = >dev;
+   struct vuport *vup;
+
+   vup = devm_kzalloc(dev, sizeof(*vup), GFP_KERNEL);
+   if (!vup)
+   return -ENOMEM;
+
+   vup->regulator = devm_regulator_get_exclusive(dev,
+ "regulator-usb-gpio");
+   if (IS_ERR(vup->regulator))
+   return -EPROBE_DEFER;
+
+   vup->gpio_usb_mux = devm_gpiod_get_optional(dev,
+   "usb_mux", GPIOD_ASIS);
+   if (IS_ERR(vup->gpio_usb_mux))
+   return PTR_ERR(vup->gpio_usb_mux);
+
+   vup->desc.dev = dev;
+   vup->desc.name = "intel-mux-gpio";
+   vup->desc.extcon_name = "extcon-usb-gpio";
+   vup->desc.ops = _ops;
+   vup->desc.initial_state = -1;
+   dev_set_drvdata(dev, vup);
+   vup->pdev = portmux_register(>desc);
+
+   return PTR_ERR_OR_ZERO(vup->pdev);
+}
+
+static int vuport_remove(struct platform_device *pdev)
+{
+   struct vuport *vup;
+
+   vup = platform_get_drvdata(pdev);
+   portmux_unregister(vup->pdev);
+
+   return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+/*
+ * In case a micro A cable was plugged in while device was sleeping,
+ * we missed the interrupt. We need to poll usb id gpio when waking the
+ * driver to detect the missed event.
+ * We use 'complete' callback 

[PATCH v8 5/7] mfd: intel_vuport: Add Intel virtual USB port MFD Driver

[Lu Baolu]

Some Intel platforms have an USB port mux controlled by GPIOs.
There's a single ACPI platform device that provides 1) USB ID
extcon device; 2) USB vbus regulator device; and 3) USB port
switch device. This MFD driver will split these 3 devices for
their respective drivers.

[baolu: removed .owner per platform_no_drv_owner.cocci]
Suggested-by: David Cohen 
Signed-off-by: Lu Baolu 
Reviewed-by: Felipe Balbi 
---
 drivers/mfd/Kconfig|  8 +
 drivers/mfd/Makefile   |  1 +
 drivers/mfd/intel-vuport.c | 89 ++
 3 files changed, 98 insertions(+)
 create mode 100644 drivers/mfd/intel-vuport.c

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index eea61e3..7e115ab 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -1578,5 +1578,13 @@ config MFD_VEXPRESS_SYSREG
  System Registers are the platform configuration block
  on the ARM Ltd. Versatile Express board.
 
+config MFD_INTEL_VUPORT
+   tristate "Intel virtual USB port controller"
+   select MFD_CORE
+   depends on X86 && ACPI
+   help
+ Say Y here to enable support for Intel's dual role port mux
+ controlled by GPIOs.
+
 endmenu
 endif
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 5eaa6465d..65b0518 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -203,3 +203,4 @@ intel-soc-pmic-objs := intel_soc_pmic_core.o 
intel_soc_pmic_crc.o
 intel-soc-pmic-$(CONFIG_INTEL_PMC_IPC) += intel_soc_pmic_bxtwc.o
 obj-$(CONFIG_INTEL_SOC_PMIC)   += intel-soc-pmic.o
 obj-$(CONFIG_MFD_MT6397)   += mt6397-core.o
+obj-$(CONFIG_MFD_INTEL_VUPORT) += intel-vuport.o
diff --git a/drivers/mfd/intel-vuport.c b/drivers/mfd/intel-vuport.c
new file mode 100644
index 000..fa84ed7
--- /dev/null
+++ b/drivers/mfd/intel-vuport.c
@@ -0,0 +1,89 @@
+/*
+ * MFD driver for Intel virtual USB port
+ *
+ * Copyright(c) 2016 Intel Corporation.
+ * Author: Lu Baolu 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* ACPI GPIO Mappings */
+static const struct acpi_gpio_params id_gpio = { 0, 0, false };
+static const struct acpi_gpio_params vbus_gpio = { 1, 0, false };
+static const struct acpi_gpio_params mux_gpio = { 2, 0, false };
+static const struct acpi_gpio_mapping acpi_usb_gpios[] = {
+   { "id-gpios", _gpio, 1 },
+   { "gpio-gpios", _gpio, 1 },
+   { "usb_mux-gpios", _gpio, 1 },
+   { },
+};
+
+static struct property_entry reg_properties[] = {
+   PROPERTY_ENTRY_STRING("supply-name", "regulator-usb-gpio"),
+   { },
+};
+
+static const struct property_set reg_properties_pset = {
+   .properties = reg_properties,
+};
+
+static const struct mfd_cell intel_vuport_mfd_cells[] = {
+   { .name = "extcon-usb-gpio", },
+   {
+   .name = "reg-fixed-voltage",
+   .pset = _properties_pset,
+   },
+   { .name = "intel-mux-gpio", },
+};
+
+static int vuport_probe(struct platform_device *pdev)
+{
+   struct device *dev = >dev;
+   int ret;
+
+   ret = acpi_dev_add_driver_gpios(ACPI_COMPANION(dev), acpi_usb_gpios);
+   if (ret)
+   return ret;
+
+   return mfd_add_devices(>dev, PLATFORM_DEVID_NONE,
+   intel_vuport_mfd_cells,
+   ARRAY_SIZE(intel_vuport_mfd_cells), NULL, 0,
+   NULL);
+}
+
+static int vuport_remove(struct platform_device *pdev)
+{
+   mfd_remove_devices(>dev);
+   acpi_dev_remove_driver_gpios(ACPI_COMPANION(>dev));
+
+   return 0;
+}
+
+static struct acpi_device_id vuport_acpi_match[] = {
+   { "INT3496" },
+   { }
+};
+MODULE_DEVICE_TABLE(acpi, vuport_acpi_match);
+
+static struct platform_driver vuport_driver = {
+   .driver = {
+   .name = "intel-vuport",
+   .acpi_match_table = ACPI_PTR(vuport_acpi_match),
+   },
+   .probe = vuport_probe,
+   .remove = vuport_remove,
+};
+
+module_platform_driver(vuport_driver);
+
+MODULE_AUTHOR("Lu Baolu ");
+MODULE_DESCRIPTION("Intel virtual USB port");
+MODULE_LICENSE("GPL v2");
-- 
2.1.4

Re: [PATCH] kasan: improve double-free detection

[Dmitry Vyukov]

On Wed, May 4, 2016 at 10:13 PM, Luruo, Kuthonuzo
 wrote:
>> >> I missed that Alexander already landed patches that reduce header size
>> >> to 16 bytes.
>> >> It is not OK to increase them again. Please leave state as bitfield
>> >> and update it with CAS (if we introduce helper functions for state
>> >> manipulation, they will hide the CAS loop, which is nice).
>> >>
>> >
>> > Available CAS primitives/compiler do not support CAS with bitfield. I 
>> > propose
>> > to change kasan_alloc_meta to:
>> >
>> > struct kasan_alloc_meta {
>> > struct kasan_track track;
>> > u16 size_delta; /* object_size - alloc size */
>> > u8 state;/* enum kasan_state */
>> > u8 reserved1;
>> > u32 reserved2;
>> > }
>> >
>> > This shrinks _used_ meta object by 1 byte wrt the original. (btw, patch v1 
>> > does
>> > not increase overall alloc meta object size). "Alloc size", where needed, 
>> > is
>> > easily calculated as a delta from cache->object_size.
>>
>>
>> What is the maximum size that slab can allocate?
>> I remember seeing slabs as large as 4MB some time ago (or did I
>> confuse it with something else?). If there are such large objects,
>> that 2 bytes won't be able to hold even delta.
>> However, now on my desktop I don't see slabs larger than 16KB in
>> /proc/slabinfo.
>
> max size for SLAB's slab is 32MB; default is 4MB. I must have gotten confused 
> by
> SLUB's 8KB limit. Anyway, new kasan_alloc_meta in patch V2:
>
> struct kasan_alloc_meta {
> struct kasan_track track;
> union {
> u8 lock;
> struct {
> u32 dummy : 8;
> u32 size_delta : 24;/* object_size - alloc size */
> };
> };
> u32 state : 2;  /* enum kasan_alloc_state */
> u32 unused : 30;
> };
>
> This uses 2 more bits than current, but given the constraints I think this is
> close to optimal.


We plan to use the unused part for another depot_stack_handle_t (u32)
to memorize stack of the last call_rcu on the object (this will
greatly simplify debugging of use-after-free for objects freed by
rcu). So we need that unused part.

I would would simply put all these fields into a single u32:

struct kasan_alloc_meta {
struct kasan_track track;
u32 status;  // contains lock, state and size
u32 unused;  // reserved for call_rcu stack handle
};

And then separately a helper type to pack/unpack status:

union kasan_alloc_status {
u32 raw;
struct {
   u32 lock : 1;
   u32 state : 2;
   u32 unused : 5;
   u32 size : 24;
};
};


Then, when we need to read/update the header we do something like:

kasan_alloc_status status, new_status;

for (;;) {
status.raw = READ_ONCE(header->status);
// read status, form new_status, for example:
if (status.lock)
  continue;
new_status.raw = status.raw;
new_status.lock = 1;
if (cas(>status, status.raw, new_status.raw))
 break;
}


This will probably make state manipulation functions few lines longer,
but since there are like 3 such functions I don't afraid that. And we
still can use bitfield magic to extract fields and leave whole 5 bits
unused bits for future.

[PATCH v8 3/7] usb: mux: add driver for Intel gpio controlled port mux

[Lu Baolu]

In some Intel platforms, a single usb port is shared between USB host
and device controller. The shared port is under control of GPIO pins.

This patch adds the support for USB GPIO controlled port mux.

[baolu: removed .owner per platform_no_drv_owner.cocci]
Signed-off-by: David Cohen 
Signed-off-by: Lu Baolu 
Reviewed-by: Heikki Krogerus 
Reviewed-by: Felipe Balbi 
---
 drivers/usb/mux/Kconfig  |  11 +++
 drivers/usb/mux/Makefile |   1 +
 drivers/usb/mux/portmux-intel-gpio.c | 149 +++
 3 files changed, 161 insertions(+)
 create mode 100644 drivers/usb/mux/portmux-intel-gpio.c

diff --git a/drivers/usb/mux/Kconfig b/drivers/usb/mux/Kconfig
index d91909f..1dc1f33 100644
--- a/drivers/usb/mux/Kconfig
+++ b/drivers/usb/mux/Kconfig
@@ -8,4 +8,15 @@ config USB_PORTMUX
def_bool n
help
  Generic USB dual role port mux support.
+
+config INTEL_MUX_GPIO
+   tristate "Intel dual role port mux controlled by GPIOs"
+   depends on GPIOLIB
+   depends on REGULATOR
+   depends on X86 && ACPI
+   select USB_PORTMUX
+   help
+ Say Y here to enable support for Intel dual role port mux
+ controlled by GPIOs.
+
 endmenu
diff --git a/drivers/usb/mux/Makefile b/drivers/usb/mux/Makefile
index f85df92..4eb5582 100644
--- a/drivers/usb/mux/Makefile
+++ b/drivers/usb/mux/Makefile
@@ -2,3 +2,4 @@
 # Makefile for USB port mux drivers
 #
 obj-$(CONFIG_USB_PORTMUX)  += portmux-core.o
+obj-$(CONFIG_INTEL_MUX_GPIO)   += portmux-intel-gpio.o
diff --git a/drivers/usb/mux/portmux-intel-gpio.c 
b/drivers/usb/mux/portmux-intel-gpio.c
new file mode 100644
index 000..b07ae2c
--- /dev/null
+++ b/drivers/usb/mux/portmux-intel-gpio.c
@@ -0,0 +1,149 @@
+/*
+ * USB Dual Role Port Mux driver controlled by gpios
+ *
+ * Copyright (c) 2016, Intel Corporation.
+ * Author: David Cohen 
+ * Author: Lu Baolu 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct vuport {
+   struct portmux_desc desc;
+   struct portmux_dev *pdev;
+   struct regulator *regulator;
+   struct gpio_desc *gpio_usb_mux;
+};
+
+/*
+ * id == 0, HOST connected, USB port should be set to peripheral
+ * id == 1, HOST disconnected, USB port should be set to host
+ *
+ * Peripheral: set USB mux to peripheral and disable VBUS
+ * Host: set USB mux to host and enable VBUS
+ */
+static inline int vuport_set_port(struct device *dev, int id)
+{
+   struct vuport *vup;
+
+   dev_dbg(dev, "USB PORT ID: %s\n", id ? "HOST" : "PERIPHERAL");
+
+   vup = dev_get_drvdata(dev);
+
+   gpiod_set_value_cansleep(vup->gpio_usb_mux, !id);
+
+   if (!id ^ regulator_is_enabled(vup->regulator))
+   return id ? regulator_disable(vup->regulator) :
+   regulator_enable(vup->regulator);
+
+   return 0;
+}
+
+static int vuport_cable_set(struct device *dev)
+{
+   return vuport_set_port(dev, 1);
+}
+
+static int vuport_cable_unset(struct device *dev)
+{
+   return vuport_set_port(dev, 0);
+}
+
+static const struct portmux_ops vuport_ops = {
+   .cable_set_cb = vuport_cable_set,
+   .cable_unset_cb = vuport_cable_unset,
+};
+
+static int vuport_probe(struct platform_device *pdev)
+{
+   struct device *dev = >dev;
+   struct vuport *vup;
+
+   vup = devm_kzalloc(dev, sizeof(*vup), GFP_KERNEL);
+   if (!vup)
+   return -ENOMEM;
+
+   vup->regulator = devm_regulator_get_exclusive(dev,
+ "regulator-usb-gpio");
+   if (IS_ERR(vup->regulator))
+   return -EPROBE_DEFER;
+
+   vup->gpio_usb_mux = devm_gpiod_get_optional(dev,
+   "usb_mux", GPIOD_ASIS);
+   if (IS_ERR(vup->gpio_usb_mux))
+   return PTR_ERR(vup->gpio_usb_mux);
+
+   vup->desc.dev = dev;
+   vup->desc.name = "intel-mux-gpio";
+   vup->desc.extcon_name = "extcon-usb-gpio";
+   vup->desc.ops = _ops;
+   vup->desc.initial_state = -1;
+   dev_set_drvdata(dev, vup);
+   vup->pdev = portmux_register(>desc);
+
+   return PTR_ERR_OR_ZERO(vup->pdev);
+}
+
+static int vuport_remove(struct platform_device *pdev)
+{
+   struct vuport *vup;
+
+   vup = platform_get_drvdata(pdev);
+   portmux_unregister(vup->pdev);
+
+   return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+/*
+ * In case a micro A cable was plugged in while device was sleeping,
+ * we missed the interrupt. We need to poll usb id gpio when waking the
+ * driver to detect the missed event.
+ * We use 'complete' callback to give time to all extcon listeners to
+ * resume before we send new events.
+ */
+static void vuport_complete(struct device *dev)
+{
+   struct vuport *vup;
+
+ 

[PATCH v8 6/7] usb: pci-quirks: add Intel USB drcfg mux device

[Lu Baolu]

In some Intel platforms, a single usb port is shared between USB host
and device controllers. The shared port is under control of a switch
which is defined in the Intel vendor defined extended capability for
xHCI.

This patch adds the support to detect and create the platform device
for the port mux switch.

Signed-off-by: Lu Baolu 
Reviewed-by: Felipe Balbi 
---
 drivers/usb/host/pci-quirks.c| 45 ++--
 drivers/usb/host/xhci-ext-caps.h |  2 ++
 2 files changed, 45 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
index 35af362..9bb7aa1 100644
--- a/drivers/usb/host/pci-quirks.c
+++ b/drivers/usb/host/pci-quirks.c
@@ -16,10 +16,11 @@
 #include 
 #include 
 #include 
+#include 
+
 #include "pci-quirks.h"
 #include "xhci-ext-caps.h"
 
-
 #define UHCI_USBLEGSUP 0xc0/* legacy support */
 #define UHCI_USBCMD0   /* command register */
 #define UHCI_USBINTR   4   /* interrupt register */
@@ -78,6 +79,8 @@
 #define USB_INTEL_USB3_PSSEN   0xD8
 #define USB_INTEL_USB3PRM  0xDC
 
+#define DEVICE_ID_INTEL_BROXTON_P_XHCI 0x5aa8
+
 /*
  * amd_chipset_gen values represent AMD different chipset generations
  */
@@ -956,6 +959,41 @@ void usb_disable_xhci_ports(struct pci_dev *xhci_pdev)
 }
 EXPORT_SYMBOL_GPL(usb_disable_xhci_ports);
 
+static void create_intel_usb_mux_device(struct pci_dev *xhci_pdev,
+   void __iomem *base)
+{
+   struct platform_device *plat_dev;
+   struct property_set pset;
+   int ret;
+
+   struct property_entry pentry[] = {
+   PROPERTY_ENTRY_U64("reg-start",
+  pci_resource_start(xhci_pdev, 0) + 0x80d8),
+   PROPERTY_ENTRY_U64("reg-size", 8),
+   { },
+   };
+
+   if (!xhci_find_next_ext_cap(base, 0, XHCI_EXT_CAPS_INTEL_USB_MUX))
+   return;
+
+   plat_dev = platform_device_alloc("intel-mux-drcfg",
+PLATFORM_DEVID_NONE);
+   if (!plat_dev)
+   return;
+
+   plat_dev->dev.parent = _pdev->dev;
+   pset.properties = pentry;
+   platform_device_add_properties(plat_dev, );
+
+   ret = platform_device_add(plat_dev);
+   if (ret) {
+   dev_warn(_pdev->dev,
+"failed to create mux device with error %d",
+   ret);
+   platform_device_put(plat_dev);
+   }
+}
+
 /**
  * PCI Quirks for xHCI.
  *
@@ -1022,8 +1060,11 @@ static void quirk_usb_handoff_xhci(struct pci_dev *pdev)
writel(val, base + ext_cap_offset + XHCI_LEGACY_CONTROL_OFFSET);
 
 hc_init:
-   if (pdev->vendor == PCI_VENDOR_ID_INTEL)
+   if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
usb_enable_intel_xhci_ports(pdev);
+   if (pdev->device == DEVICE_ID_INTEL_BROXTON_P_XHCI)
+   create_intel_usb_mux_device(pdev, base);
+   }
 
op_reg_base = base + XHCI_HC_LENGTH(readl(base));
 
diff --git a/drivers/usb/host/xhci-ext-caps.h b/drivers/usb/host/xhci-ext-caps.h
index e0244fb..e368ccb 100644
--- a/drivers/usb/host/xhci-ext-caps.h
+++ b/drivers/usb/host/xhci-ext-caps.h
@@ -51,6 +51,8 @@
 #define XHCI_EXT_CAPS_ROUTE5
 /* IDs 6-9 reserved */
 #define XHCI_EXT_CAPS_DEBUG10
+/* Vendor defined 192-255 */
+#define XHCI_EXT_CAPS_INTEL_USB_MUX192
 /* USB Legacy Support Capability - section 7.1.1 */
 #define XHCI_HC_BIOS_OWNED (1 << 16)
 #define XHCI_HC_OS_OWNED   (1 << 24)
-- 
2.1.4

[PATCH v8 6/7] usb: pci-quirks: add Intel USB drcfg mux device

[Lu Baolu]

In some Intel platforms, a single usb port is shared between USB host
and device controllers. The shared port is under control of a switch
which is defined in the Intel vendor defined extended capability for
xHCI.

This patch adds the support to detect and create the platform device
for the port mux switch.

Signed-off-by: Lu Baolu 
Reviewed-by: Felipe Balbi 
---
 drivers/usb/host/pci-quirks.c| 45 ++--
 drivers/usb/host/xhci-ext-caps.h |  2 ++
 2 files changed, 45 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
index 35af362..9bb7aa1 100644
--- a/drivers/usb/host/pci-quirks.c
+++ b/drivers/usb/host/pci-quirks.c
@@ -16,10 +16,11 @@
 #include 
 #include 
 #include 
+#include 
+
 #include "pci-quirks.h"
 #include "xhci-ext-caps.h"
 
-
 #define UHCI_USBLEGSUP 0xc0/* legacy support */
 #define UHCI_USBCMD0   /* command register */
 #define UHCI_USBINTR   4   /* interrupt register */
@@ -78,6 +79,8 @@
 #define USB_INTEL_USB3_PSSEN   0xD8
 #define USB_INTEL_USB3PRM  0xDC
 
+#define DEVICE_ID_INTEL_BROXTON_P_XHCI 0x5aa8
+
 /*
  * amd_chipset_gen values represent AMD different chipset generations
  */
@@ -956,6 +959,41 @@ void usb_disable_xhci_ports(struct pci_dev *xhci_pdev)
 }
 EXPORT_SYMBOL_GPL(usb_disable_xhci_ports);
 
+static void create_intel_usb_mux_device(struct pci_dev *xhci_pdev,
+   void __iomem *base)
+{
+   struct platform_device *plat_dev;
+   struct property_set pset;
+   int ret;
+
+   struct property_entry pentry[] = {
+   PROPERTY_ENTRY_U64("reg-start",
+  pci_resource_start(xhci_pdev, 0) + 0x80d8),
+   PROPERTY_ENTRY_U64("reg-size", 8),
+   { },
+   };
+
+   if (!xhci_find_next_ext_cap(base, 0, XHCI_EXT_CAPS_INTEL_USB_MUX))
+   return;
+
+   plat_dev = platform_device_alloc("intel-mux-drcfg",
+PLATFORM_DEVID_NONE);
+   if (!plat_dev)
+   return;
+
+   plat_dev->dev.parent = _pdev->dev;
+   pset.properties = pentry;
+   platform_device_add_properties(plat_dev, );
+
+   ret = platform_device_add(plat_dev);
+   if (ret) {
+   dev_warn(_pdev->dev,
+"failed to create mux device with error %d",
+   ret);
+   platform_device_put(plat_dev);
+   }
+}
+
 /**
  * PCI Quirks for xHCI.
  *
@@ -1022,8 +1060,11 @@ static void quirk_usb_handoff_xhci(struct pci_dev *pdev)
writel(val, base + ext_cap_offset + XHCI_LEGACY_CONTROL_OFFSET);
 
 hc_init:
-   if (pdev->vendor == PCI_VENDOR_ID_INTEL)
+   if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
usb_enable_intel_xhci_ports(pdev);
+   if (pdev->device == DEVICE_ID_INTEL_BROXTON_P_XHCI)
+   create_intel_usb_mux_device(pdev, base);
+   }
 
op_reg_base = base + XHCI_HC_LENGTH(readl(base));
 
diff --git a/drivers/usb/host/xhci-ext-caps.h b/drivers/usb/host/xhci-ext-caps.h
index e0244fb..e368ccb 100644
--- a/drivers/usb/host/xhci-ext-caps.h
+++ b/drivers/usb/host/xhci-ext-caps.h
@@ -51,6 +51,8 @@
 #define XHCI_EXT_CAPS_ROUTE5
 /* IDs 6-9 reserved */
 #define XHCI_EXT_CAPS_DEBUG10
+/* Vendor defined 192-255 */
+#define XHCI_EXT_CAPS_INTEL_USB_MUX192
 /* USB Legacy Support Capability - section 7.1.1 */
 #define XHCI_HC_BIOS_OWNED (1 << 16)
 #define XHCI_HC_OS_OWNED   (1 << 24)
-- 
2.1.4

[PATCH v8 7/7] MAINTAINERS: add maintainer entry for Intel USB dual role mux drivers

[Lu Baolu]

Add a maintainer entry for Intel USB dual role mux drivers and
add myself as a maintainer.

Signed-off-by: Lu Baolu 
---
 MAINTAINERS | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 1d5b4be..6ab9e02 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5879,6 +5879,16 @@ S:   Maintained
 F: arch/x86/include/asm/intel_telemetry.h
 F: drivers/platform/x86/intel_telemetry*
 
+INTEL USB DUAL ROLE PORT MUX DRIVERS
+M: Lu Baolu 
+L: linux-...@vger.kernel.org
+S: Supported
+F: include/linux/usb/portmux.h
+F: drivers/usb/mux/portmux-core.c
+F: drivers/usb/mux/portmux-intel-gpio.c
+F: drivers/usb/mux/portmux-intel-drcfg.c
+F: drivers/mfd/intel-vuport.c
+
 IOC3 ETHERNET DRIVER
 M: Ralf Baechle 
 L: linux-m...@linux-mips.org
-- 
2.1.4

[PATCH v8 7/7] MAINTAINERS: add maintainer entry for Intel USB dual role mux drivers

[Lu Baolu]

Add a maintainer entry for Intel USB dual role mux drivers and
add myself as a maintainer.

Signed-off-by: Lu Baolu 
---
 MAINTAINERS | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 1d5b4be..6ab9e02 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5879,6 +5879,16 @@ S:   Maintained
 F: arch/x86/include/asm/intel_telemetry.h
 F: drivers/platform/x86/intel_telemetry*
 
+INTEL USB DUAL ROLE PORT MUX DRIVERS
+M: Lu Baolu 
+L: linux-...@vger.kernel.org
+S: Supported
+F: include/linux/usb/portmux.h
+F: drivers/usb/mux/portmux-core.c
+F: drivers/usb/mux/portmux-intel-gpio.c
+F: drivers/usb/mux/portmux-intel-drcfg.c
+F: drivers/mfd/intel-vuport.c
+
 IOC3 ETHERNET DRIVER
 M: Ralf Baechle 
 L: linux-m...@linux-mips.org
-- 
2.1.4

[PATCH v8 4/7] usb: mux: add driver for Intel drcfg controlled port mux

[Lu Baolu]

Several Intel PCHs and SOCs have an internal mux that is used to
share one USB port between device controller and host controller.
The mux is handled through the Dual Role Configuration Register.

Signed-off-by: Heikki Krogerus 
Signed-off-by: Lu Baolu 
Signed-off-by: Wu Hao 
Reviewed-by: Felipe Balbi 
---
 drivers/usb/mux/Kconfig   |   8 ++
 drivers/usb/mux/Makefile  |   1 +
 drivers/usb/mux/portmux-intel-drcfg.c | 171 ++
 3 files changed, 180 insertions(+)
 create mode 100644 drivers/usb/mux/portmux-intel-drcfg.c

diff --git a/drivers/usb/mux/Kconfig b/drivers/usb/mux/Kconfig
index 1dc1f33..ae3f746 100644
--- a/drivers/usb/mux/Kconfig
+++ b/drivers/usb/mux/Kconfig
@@ -19,4 +19,12 @@ config INTEL_MUX_GPIO
  Say Y here to enable support for Intel dual role port mux
  controlled by GPIOs.
 
+config INTEL_MUX_DRCFG
+   tristate "Intel dual role port mux controlled by register"
+   depends on X86
+   select USB_PORTMUX
+   help
+ Say Y here to enable support for Intel dual role port mux
+ controlled by the Dual Role Configuration Register.
+
 endmenu
diff --git a/drivers/usb/mux/Makefile b/drivers/usb/mux/Makefile
index 4eb5582..0f102b5 100644
--- a/drivers/usb/mux/Makefile
+++ b/drivers/usb/mux/Makefile
@@ -3,3 +3,4 @@
 #
 obj-$(CONFIG_USB_PORTMUX)  += portmux-core.o
 obj-$(CONFIG_INTEL_MUX_GPIO)   += portmux-intel-gpio.o
+obj-$(CONFIG_INTEL_MUX_DRCFG)  += portmux-intel-drcfg.o
diff --git a/drivers/usb/mux/portmux-intel-drcfg.c 
b/drivers/usb/mux/portmux-intel-drcfg.c
new file mode 100644
index 000..0bb6b08
--- /dev/null
+++ b/drivers/usb/mux/portmux-intel-drcfg.c
@@ -0,0 +1,171 @@
+/**
+ * intel-mux-drcfg.c - Driver for Intel USB mux via register
+ *
+ * Copyright (C) 2016 Intel Corporation
+ * Author: Heikki Krogerus 
+ * Author: Lu Baolu 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define INTEL_MUX_CFG0 0x00
+#define INTEL_MUX_CFG1 0x04
+#define CFG0_SW_IDPIN  BIT(20)
+#define CFG0_SW_IDPIN_EN   BIT(21)
+#define CFG0_SW_VBUS_VALID BIT(24)
+#define CFG1_MODE  BIT(29)
+
+struct intel_mux_drcfg {
+   struct portmux_desc desc;
+   struct device *dev;
+   void __iomem *regs;
+   struct portmux_dev *pdev;
+};
+
+static inline int intel_mux_drcfg_switch(struct device *dev, bool host)
+{
+   u32 data;
+   struct intel_mux_drcfg *mux;
+
+   mux = dev_get_drvdata(dev);
+
+   /* Check and set mux to SW controlled mode */
+   data = readl(mux->regs + INTEL_MUX_CFG0);
+   if (!(data & CFG0_SW_IDPIN_EN)) {
+   data |= CFG0_SW_IDPIN_EN;
+   writel(data, mux->regs + INTEL_MUX_CFG0);
+   }
+
+   /*
+* Configure CFG0 to switch the mux and VBUS_VALID bit is
+* required for device mode.
+*/
+   data = readl(mux->regs + INTEL_MUX_CFG0);
+   if (host)
+   data &= ~(CFG0_SW_IDPIN | CFG0_SW_VBUS_VALID);
+   else
+   data |= (CFG0_SW_IDPIN | CFG0_SW_VBUS_VALID);
+   writel(data, mux->regs + INTEL_MUX_CFG0);
+
+   return 0;
+}
+
+static int intel_mux_drcfg_cable_set(struct device *dev)
+{
+   dev_dbg(dev, "drcfg mux switch to HOST\n");
+
+   return intel_mux_drcfg_switch(dev, true);
+}
+
+static int intel_mux_drcfg_cable_unset(struct device *dev)
+{
+   dev_dbg(dev, "drcfg mux switch to DEVICE\n");
+
+   return intel_mux_drcfg_switch(dev, false);
+}
+
+static const struct portmux_ops drcfg_ops = {
+   .cable_set_cb = intel_mux_drcfg_cable_set,
+   .cable_unset_cb = intel_mux_drcfg_cable_unset,
+};
+
+static int intel_mux_drcfg_probe(struct platform_device *pdev)
+{
+   struct intel_mux_drcfg *mux;
+   struct device *dev = >dev;
+   const char *extcon_name = NULL;
+   u64 start, size;
+   int ret;
+
+   mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
+   if (!mux)
+   return -ENOMEM;
+
+   ret = device_property_read_u64(dev, "reg-start", );
+   ret |= device_property_read_u64(dev, "reg-size", );
+   if (ret)
+   return -ENODEV;
+
+   ret = device_property_read_string(dev, "extcon-name", _name);
+   if (!ret)
+   mux->desc.extcon_name = extcon_name;
+
+   mux->regs = devm_ioremap_nocache(dev, start, size);
+   if (!mux->regs)
+   return -ENOMEM;
+
+   mux->desc.dev = dev;
+   mux->desc.name = "intel-mux-drcfg";
+   mux->desc.ops = _ops;
+   mux->desc.initial_state =
+   

[PATCH v8 1/7] regulator: fixed: add support for ACPI interface

[Lu Baolu]

Add support to retrieve fixed voltage configure information through
ACPI interface. This is needed for Intel Bay Trail devices, where a
GPIO is used to control the USB vbus.

Signed-off-by: Lu Baolu 
---
 drivers/regulator/fixed.c | 46 ++
 1 file changed, 46 insertions(+)

diff --git a/drivers/regulator/fixed.c b/drivers/regulator/fixed.c
index ff62d69..207ab40 100644
--- a/drivers/regulator/fixed.c
+++ b/drivers/regulator/fixed.c
@@ -30,6 +30,9 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 struct fixed_voltage_data {
struct regulator_desc desc;
@@ -104,6 +107,44 @@ of_get_fixed_voltage_config(struct device *dev,
return config;
 }
 
+/**
+ * acpi_get_fixed_voltage_config - extract fixed_voltage_config structure info
+ * @dev: device requesting for fixed_voltage_config
+ * @desc: regulator description
+ *
+ * Populates fixed_voltage_config structure by extracting data through ACPI
+ * interface, returns a pointer to the populated structure of NULL if memory
+ * alloc fails.
+ */
+static struct fixed_voltage_config *
+acpi_get_fixed_voltage_config(struct device *dev,
+ const struct regulator_desc *desc)
+{
+   struct fixed_voltage_config *config;
+   const char *supply_name;
+   struct gpio_desc *gpiod;
+   int ret;
+
+   config = devm_kzalloc(dev, sizeof(*config), GFP_KERNEL);
+   if (!config)
+   return ERR_PTR(-ENOMEM);
+
+   ret = device_property_read_string(dev, "supply-name", _name);
+   if (!ret)
+   config->supply_name = supply_name;
+
+   gpiod = gpiod_get(dev, "gpio", GPIOD_ASIS);
+   if (IS_ERR(gpiod))
+   return ERR_PTR(-ENODEV);
+
+   config->gpio = desc_to_gpio(gpiod);
+   config->enable_high = device_property_read_bool(dev,
+   "enable-active-high");
+   gpiod_put(gpiod);
+
+   return config;
+}
+
 static struct regulator_ops fixed_voltage_ops = {
 };
 
@@ -124,6 +165,11 @@ static int reg_fixed_voltage_probe(struct platform_device 
*pdev)
 >desc);
if (IS_ERR(config))
return PTR_ERR(config);
+   } else if (ACPI_HANDLE(>dev)) {
+   config = acpi_get_fixed_voltage_config(>dev,
+  >desc);
+   if (IS_ERR(config))
+   return PTR_ERR(config);
} else {
config = dev_get_platdata(>dev);
}
-- 
2.1.4

[PATCH v8 4/7] usb: mux: add driver for Intel drcfg controlled port mux

[Lu Baolu]

Several Intel PCHs and SOCs have an internal mux that is used to
share one USB port between device controller and host controller.
The mux is handled through the Dual Role Configuration Register.

Signed-off-by: Heikki Krogerus 
Signed-off-by: Lu Baolu 
Signed-off-by: Wu Hao 
Reviewed-by: Felipe Balbi 
---
 drivers/usb/mux/Kconfig   |   8 ++
 drivers/usb/mux/Makefile  |   1 +
 drivers/usb/mux/portmux-intel-drcfg.c | 171 ++
 3 files changed, 180 insertions(+)
 create mode 100644 drivers/usb/mux/portmux-intel-drcfg.c

diff --git a/drivers/usb/mux/Kconfig b/drivers/usb/mux/Kconfig
index 1dc1f33..ae3f746 100644
--- a/drivers/usb/mux/Kconfig
+++ b/drivers/usb/mux/Kconfig
@@ -19,4 +19,12 @@ config INTEL_MUX_GPIO
  Say Y here to enable support for Intel dual role port mux
  controlled by GPIOs.
 
+config INTEL_MUX_DRCFG
+   tristate "Intel dual role port mux controlled by register"
+   depends on X86
+   select USB_PORTMUX
+   help
+ Say Y here to enable support for Intel dual role port mux
+ controlled by the Dual Role Configuration Register.
+
 endmenu
diff --git a/drivers/usb/mux/Makefile b/drivers/usb/mux/Makefile
index 4eb5582..0f102b5 100644
--- a/drivers/usb/mux/Makefile
+++ b/drivers/usb/mux/Makefile
@@ -3,3 +3,4 @@
 #
 obj-$(CONFIG_USB_PORTMUX)  += portmux-core.o
 obj-$(CONFIG_INTEL_MUX_GPIO)   += portmux-intel-gpio.o
+obj-$(CONFIG_INTEL_MUX_DRCFG)  += portmux-intel-drcfg.o
diff --git a/drivers/usb/mux/portmux-intel-drcfg.c 
b/drivers/usb/mux/portmux-intel-drcfg.c
new file mode 100644
index 000..0bb6b08
--- /dev/null
+++ b/drivers/usb/mux/portmux-intel-drcfg.c
@@ -0,0 +1,171 @@
+/**
+ * intel-mux-drcfg.c - Driver for Intel USB mux via register
+ *
+ * Copyright (C) 2016 Intel Corporation
+ * Author: Heikki Krogerus 
+ * Author: Lu Baolu 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define INTEL_MUX_CFG0 0x00
+#define INTEL_MUX_CFG1 0x04
+#define CFG0_SW_IDPIN  BIT(20)
+#define CFG0_SW_IDPIN_EN   BIT(21)
+#define CFG0_SW_VBUS_VALID BIT(24)
+#define CFG1_MODE  BIT(29)
+
+struct intel_mux_drcfg {
+   struct portmux_desc desc;
+   struct device *dev;
+   void __iomem *regs;
+   struct portmux_dev *pdev;
+};
+
+static inline int intel_mux_drcfg_switch(struct device *dev, bool host)
+{
+   u32 data;
+   struct intel_mux_drcfg *mux;
+
+   mux = dev_get_drvdata(dev);
+
+   /* Check and set mux to SW controlled mode */
+   data = readl(mux->regs + INTEL_MUX_CFG0);
+   if (!(data & CFG0_SW_IDPIN_EN)) {
+   data |= CFG0_SW_IDPIN_EN;
+   writel(data, mux->regs + INTEL_MUX_CFG0);
+   }
+
+   /*
+* Configure CFG0 to switch the mux and VBUS_VALID bit is
+* required for device mode.
+*/
+   data = readl(mux->regs + INTEL_MUX_CFG0);
+   if (host)
+   data &= ~(CFG0_SW_IDPIN | CFG0_SW_VBUS_VALID);
+   else
+   data |= (CFG0_SW_IDPIN | CFG0_SW_VBUS_VALID);
+   writel(data, mux->regs + INTEL_MUX_CFG0);
+
+   return 0;
+}
+
+static int intel_mux_drcfg_cable_set(struct device *dev)
+{
+   dev_dbg(dev, "drcfg mux switch to HOST\n");
+
+   return intel_mux_drcfg_switch(dev, true);
+}
+
+static int intel_mux_drcfg_cable_unset(struct device *dev)
+{
+   dev_dbg(dev, "drcfg mux switch to DEVICE\n");
+
+   return intel_mux_drcfg_switch(dev, false);
+}
+
+static const struct portmux_ops drcfg_ops = {
+   .cable_set_cb = intel_mux_drcfg_cable_set,
+   .cable_unset_cb = intel_mux_drcfg_cable_unset,
+};
+
+static int intel_mux_drcfg_probe(struct platform_device *pdev)
+{
+   struct intel_mux_drcfg *mux;
+   struct device *dev = >dev;
+   const char *extcon_name = NULL;
+   u64 start, size;
+   int ret;
+
+   mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
+   if (!mux)
+   return -ENOMEM;
+
+   ret = device_property_read_u64(dev, "reg-start", );
+   ret |= device_property_read_u64(dev, "reg-size", );
+   if (ret)
+   return -ENODEV;
+
+   ret = device_property_read_string(dev, "extcon-name", _name);
+   if (!ret)
+   mux->desc.extcon_name = extcon_name;
+
+   mux->regs = devm_ioremap_nocache(dev, start, size);
+   if (!mux->regs)
+   return -ENOMEM;
+
+   mux->desc.dev = dev;
+   mux->desc.name = "intel-mux-drcfg";
+   mux->desc.ops = _ops;
+   mux->desc.initial_state =
+   !!(readl(mux->regs + INTEL_MUX_CFG1) & CFG1_MODE);
+   dev_set_drvdata(dev, mux);
+   mux->pdev = portmux_register(>desc);
+
+   return 

[PATCH v8 1/7] regulator: fixed: add support for ACPI interface

[Lu Baolu]

Add support to retrieve fixed voltage configure information through
ACPI interface. This is needed for Intel Bay Trail devices, where a
GPIO is used to control the USB vbus.

Signed-off-by: Lu Baolu 
---
 drivers/regulator/fixed.c | 46 ++
 1 file changed, 46 insertions(+)

diff --git a/drivers/regulator/fixed.c b/drivers/regulator/fixed.c
index ff62d69..207ab40 100644
--- a/drivers/regulator/fixed.c
+++ b/drivers/regulator/fixed.c
@@ -30,6 +30,9 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 struct fixed_voltage_data {
struct regulator_desc desc;
@@ -104,6 +107,44 @@ of_get_fixed_voltage_config(struct device *dev,
return config;
 }
 
+/**
+ * acpi_get_fixed_voltage_config - extract fixed_voltage_config structure info
+ * @dev: device requesting for fixed_voltage_config
+ * @desc: regulator description
+ *
+ * Populates fixed_voltage_config structure by extracting data through ACPI
+ * interface, returns a pointer to the populated structure of NULL if memory
+ * alloc fails.
+ */
+static struct fixed_voltage_config *
+acpi_get_fixed_voltage_config(struct device *dev,
+ const struct regulator_desc *desc)
+{
+   struct fixed_voltage_config *config;
+   const char *supply_name;
+   struct gpio_desc *gpiod;
+   int ret;
+
+   config = devm_kzalloc(dev, sizeof(*config), GFP_KERNEL);
+   if (!config)
+   return ERR_PTR(-ENOMEM);
+
+   ret = device_property_read_string(dev, "supply-name", _name);
+   if (!ret)
+   config->supply_name = supply_name;
+
+   gpiod = gpiod_get(dev, "gpio", GPIOD_ASIS);
+   if (IS_ERR(gpiod))
+   return ERR_PTR(-ENODEV);
+
+   config->gpio = desc_to_gpio(gpiod);
+   config->enable_high = device_property_read_bool(dev,
+   "enable-active-high");
+   gpiod_put(gpiod);
+
+   return config;
+}
+
 static struct regulator_ops fixed_voltage_ops = {
 };
 
@@ -124,6 +165,11 @@ static int reg_fixed_voltage_probe(struct platform_device 
*pdev)
 >desc);
if (IS_ERR(config))
return PTR_ERR(config);
+   } else if (ACPI_HANDLE(>dev)) {
+   config = acpi_get_fixed_voltage_config(>dev,
+  >desc);
+   if (IS_ERR(config))
+   return PTR_ERR(config);
} else {
config = dev_get_platdata(>dev);
}
-- 
2.1.4

[PATCH] mm/zsmalloc: avoid unnecessary iteration in get_pages_per_zspage()

[Ganesh Mahendran]

if we find a zspage with usage == 100%, there is no need to
try other zspages.

Signed-off-by: Ganesh Mahendran 
Cc: Minchan Kim 
Cc: Nitin Gupta 
Cc: Sergey Senozhatsky 
---
 mm/zsmalloc.c |3 +++
 1 file changed, 3 insertions(+)

diff --git a/mm/zsmalloc.c b/mm/zsmalloc.c
index fda7177..310c7b0 100644
--- a/mm/zsmalloc.c
+++ b/mm/zsmalloc.c
@@ -765,6 +765,9 @@ static int get_pages_per_zspage(int class_size)
if (usedpc > max_usedpc) {
max_usedpc = usedpc;
max_usedpc_order = i;
+
+   if (max_usedpc == 100)
+   break;
}
}
 
-- 
1.7.9.5

[PATCH] mm/zsmalloc: avoid unnecessary iteration in get_pages_per_zspage()

[Ganesh Mahendran]

if we find a zspage with usage == 100%, there is no need to
try other zspages.

Signed-off-by: Ganesh Mahendran 
Cc: Minchan Kim 
Cc: Nitin Gupta 
Cc: Sergey Senozhatsky 
---
 mm/zsmalloc.c |3 +++
 1 file changed, 3 insertions(+)

diff --git a/mm/zsmalloc.c b/mm/zsmalloc.c
index fda7177..310c7b0 100644
--- a/mm/zsmalloc.c
+++ b/mm/zsmalloc.c
@@ -765,6 +765,9 @@ static int get_pages_per_zspage(int class_size)
if (usedpc > max_usedpc) {
max_usedpc = usedpc;
max_usedpc_order = i;
+
+   if (max_usedpc == 100)
+   break;
}
}
 
-- 
1.7.9.5

[PATCH 0/3] mfd: lp873x: Add lp873x PMIC support

[Keerthy]

The LP873X chip is a power management IC for Portable Navigation Systems
and Tablet Computing devices. It contains the following components:

 - Regulators.
 - Configurable General Purpose Output Signals(GPO).

PMIC interacts with the main processor through i2c. PMIC has
couple of LDOs(Linear Regulators), couple of BUCKs (Step-Down DC-DC
Converter Cores) and GPOs(General Purpose Output Signals). At this
time only the regulator functionality is made available. 

Keerthy (3):
  Documentation: mfd/regulator: LP873X: Add information for the mfd and
regulator drivers
  mfd: lp873x: Add lp873x PMIC support
  regulator: lp873x: Add support for lp873x PMIC regulators

 Documentation/devicetree/bindings/mfd/lp873x.txt   |  56 +
 .../devicetree/bindings/regulator/lp873x.txt   |  98 
 drivers/mfd/Kconfig|  15 ++
 drivers/mfd/Makefile   |   2 +
 drivers/mfd/lp873x.c   |  94 
 drivers/regulator/Kconfig  |   9 +
 drivers/regulator/Makefile |   1 +
 drivers/regulator/lp873x-regulator.c   | 242 +++
 include/linux/mfd/lp873x.h | 267 +
 9 files changed, 784 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/lp873x.txt
 create mode 100644 Documentation/devicetree/bindings/regulator/lp873x.txt
 create mode 100644 drivers/mfd/lp873x.c
 create mode 100644 drivers/regulator/lp873x-regulator.c
 create mode 100644 include/linux/mfd/lp873x.h

-- 
1.9.1

[PATCH 0/3] mfd: lp873x: Add lp873x PMIC support

[Keerthy]

The LP873X chip is a power management IC for Portable Navigation Systems
and Tablet Computing devices. It contains the following components:

 - Regulators.
 - Configurable General Purpose Output Signals(GPO).

PMIC interacts with the main processor through i2c. PMIC has
couple of LDOs(Linear Regulators), couple of BUCKs (Step-Down DC-DC
Converter Cores) and GPOs(General Purpose Output Signals). At this
time only the regulator functionality is made available. 

Keerthy (3):
  Documentation: mfd/regulator: LP873X: Add information for the mfd and
regulator drivers
  mfd: lp873x: Add lp873x PMIC support
  regulator: lp873x: Add support for lp873x PMIC regulators

 Documentation/devicetree/bindings/mfd/lp873x.txt   |  56 +
 .../devicetree/bindings/regulator/lp873x.txt   |  98 
 drivers/mfd/Kconfig|  15 ++
 drivers/mfd/Makefile   |   2 +
 drivers/mfd/lp873x.c   |  94 
 drivers/regulator/Kconfig  |   9 +
 drivers/regulator/Makefile |   1 +
 drivers/regulator/lp873x-regulator.c   | 242 +++
 include/linux/mfd/lp873x.h | 267 +
 9 files changed, 784 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/lp873x.txt
 create mode 100644 Documentation/devicetree/bindings/regulator/lp873x.txt
 create mode 100644 drivers/mfd/lp873x.c
 create mode 100644 drivers/regulator/lp873x-regulator.c
 create mode 100644 include/linux/mfd/lp873x.h

-- 
1.9.1

[PATCH] mfd: lp873x: Add lp873x PMIC support

[Keerthy]

The LP873X chip is a power management IC for Portable Navigation Systems
and Tablet Computing devices. It contains the following components:

 - Regulators.
 - Configurable General Purpose Output Signals(GPO).

PMIC interacts with the main processor through i2c. PMIC has
couple of LDOs(Linear Regulators), couple of BUCKs (Step-Down DC-DC
Converter Cores) and GPOs(General Purpose Output Signals). At this
time only the regulator functionality is made available.

Signed-off-by: Keerthy 
---
 drivers/mfd/Kconfig|  15 +++
 drivers/mfd/Makefile   |   2 +
 drivers/mfd/lp873x.c   |  94 
 include/linux/mfd/lp873x.h | 265 +
 4 files changed, 376 insertions(+)
 create mode 100644 drivers/mfd/lp873x.c
 create mode 100644 include/linux/mfd/lp873x.h

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index eea61e3..1d85f10 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -1185,6 +1185,21 @@ config MFD_TPS65217
  This driver can also be built as a module.  If so, the module
  will be called tps65217.
 
+config MFD_LP873X
+   tristate "TI LP873X Power Management IC"
+   depends on I2C
+   select MFD_CORE
+   select REGMAP_I2C
+   help
+ If you say yes here you get support for the LP873X series of
+ Power Management Integrated Circuits.
+ These include voltage regulators, Thermal protection, Configurable
+ general pirpose outputs and other features that are often used in
+ portable devices.
+
+ This driver can also be built as a module.  If so, the module
+ will be called lp873x.
+
 config MFD_TPS65218
tristate "TI TPS65218 Power Management chips"
depends on I2C
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 5eaa6465d..617c688 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -22,6 +22,8 @@ obj-$(CONFIG_HTC_EGPIO)   += htc-egpio.o
 obj-$(CONFIG_HTC_PASIC3)   += htc-pasic3.o
 obj-$(CONFIG_HTC_I2CPLD)   += htc-i2cpld.o
 
+obj-$(CONFIG_MFD_LP873X)   += lp873x.o
+
 obj-$(CONFIG_MFD_DAVINCI_VOICECODEC)   += davinci_voicecodec.o
 obj-$(CONFIG_MFD_DM355EVM_MSP) += dm355evm_msp.o
 obj-$(CONFIG_MFD_TI_AM335X_TSCADC) += ti_am335x_tscadc.o
diff --git a/drivers/mfd/lp873x.c b/drivers/mfd/lp873x.c
new file mode 100644
index 000..4b9243d
--- /dev/null
+++ b/drivers/mfd/lp873x.c
@@ -0,0 +1,94 @@
+/*
+ * LP873X chip family multi-function driver
+ *
+ * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static const struct regmap_config lp873x_regmap_config = {
+   .reg_bits = 8,
+   .val_bits = 8,
+   .max_register = LP873X_REG_MAX,
+};
+
+static const struct of_device_id of_lp873x_match_table[] = {
+   { .compatible = "ti,lp873x", },
+   { .compatible = "ti,lp8733", },
+   { .compatible = "ti,lp8732", },
+   {}
+};
+MODULE_DEVICE_TABLE(of, of_lp873x_match_table);
+
+static const struct i2c_device_id lp873x_id_table[] = {
+   { "lp873x", LP873X },
+   { "lp8732", LP873X },
+   { "lp8733", LP873X },
+   { },
+};
+MODULE_DEVICE_TABLE(i2c, lp873x_id_table);
+
+static int lp873x_probe(struct i2c_client *client,
+   const struct i2c_device_id *ids)
+{
+   struct lp873x *lp873;
+   int ret;
+   unsigned int otpid;
+
+   lp873 = devm_kzalloc(>dev, sizeof(*lp873), GFP_KERNEL);
+   if (!lp873)
+   return -ENOMEM;
+
+   i2c_set_clientdata(client, lp873);
+   lp873->dev = >dev;
+   lp873->regmap = devm_regmap_init_i2c(client, _regmap_config);
+   if (IS_ERR(lp873->regmap)) {
+   ret = PTR_ERR(lp873->regmap);
+   dev_err(lp873->dev, "Failed to initialize register map: %d\n",
+   ret);
+   return ret;
+   }
+
+   mutex_init(>lp873_lock);
+
+   ret = regmap_read(lp873->regmap, LP873X_REG_OTP_REV, );
+
+   if (ret) {
+   dev_err(lp873->dev, "Failed to read otpid\n");
+   return ret;
+   }
+
+   lp873->rev = otpid & LP873X_OTP_REV_OTP_ID;
+
+   ret = of_platform_populate(client->dev.of_node, NULL, NULL,
+  >dev);
+
+   return ret;
+}
+
+static struct i2c_driver lp873x_driver = {
+   .driver = {
+   .name   = "lp873x",
+   .of_match_table = 

[PATCH 1/3] Documentation: mfd/regulator: LP873X: Add information for the mfd and regulator drivers

[Keerthy]

Add information for the mfd and regulator drivers.

Signed-off-by: Keerthy 
---
 Documentation/devicetree/bindings/mfd/lp873x.txt   | 56 +
 .../devicetree/bindings/regulator/lp873x.txt   | 98 ++
 2 files changed, 154 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/lp873x.txt
 create mode 100644 Documentation/devicetree/bindings/regulator/lp873x.txt

diff --git a/Documentation/devicetree/bindings/mfd/lp873x.txt 
b/Documentation/devicetree/bindings/mfd/lp873x.txt
new file mode 100644
index 000..050d822
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/lp873x.txt
@@ -0,0 +1,56 @@
+TI LP3943 MFD driver
+
+Required properties:
+  - compatible: "ti,lp873x", "ti,lp8732", "ti,lp8733"
+  - reg: I2C slave address.
+
+For the lp873x regulator properties please refer to:
+Documentation/devicetree/bindings/regulator/lp873x.txt
+
+Example:
+
+lp8733: lp8733@60 {
+   compatible = "ti,lp8733";
+   reg = <0x60>;
+
+   regulators {
+   compatible = "ti,lp8733-regulators";
+   buck0 {
+   regulator-name = "lp8733-buck0";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <140>;
+   regulator-min-microamp = <150>;
+   regulator-max-microamp = <400>;
+   regulator-ramp-delay = <1>;
+   regulator-always-on;
+   regulator-boot-on;
+   };
+
+   buck1 {
+   regulator-name = "lp8733-buck1";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <140>;
+   regulator-min-microamp = <150>;
+   regulator-max-microamp = <400>;
+   regulator-ramp-delay = <1>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+
+   ldo0 {
+   regulator-name = "lp8733-ldo0";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <300>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+
+   ldo1 {
+   regulator-name = "lp8733-ldo1";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <300>;
+   regulator-always-on;
+   regulator-boot-on;
+   };
+   };
+};
diff --git a/Documentation/devicetree/bindings/regulator/lp873x.txt 
b/Documentation/devicetree/bindings/regulator/lp873x.txt
new file mode 100644
index 000..079d8a5
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/lp873x.txt
@@ -0,0 +1,98 @@
+LP873X family of regulators
+
+Required properties:
+For lp873x Bucks/LDOs
+- compatible:
+  - "ti,lp8733-regulators" for lp8733 PMIC
+  - "ti,lp8732-regulators" for lp8732 PMIC
+  - "ti,lp873x-regulators" for lp8732 PMIC
+
+Examples:
+
+1) LP8733 Regulators:
+
+regulators {
+   compatible = "ti,lp8733-regulators";
+
+   buck0 {
+   regulator-name = "lp8733-buck0";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <140>;
+   regulator-min-microamp = <150>;
+   regulator-max-microamp = <400>;
+   regulator-ramp-delay = <1>;
+   regulator-always-on;
+   regulator-boot-on;
+   };
+
+   buck1 {
+   regulator-name = "lp8733-buck1";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <140>;
+   regulator-min-microamp = <150>;
+   regulator-max-microamp = <400>;
+   regulator-ramp-delay = <1>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+
+   ldo0 {
+   regulator-name = "lp8733-ldo0";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <300>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+
+   ldo1 {
+   regulator-name = "lp8733-ldo1";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <300>;
+   regulator-always-on;
+   regulator-boot-on;
+   };
+};
+
+1) LP8732 Regulators:
+
+regulators {
+   compatible = "ti,lp8732-regulators";
+
+   buck0 {
+   regulator-name = "lp8732-buck0";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <140>;
+   regulator-min-microamp = <150>;
+   regulator-max-microamp = <400>;
+   regulator-ramp-delay = 

[PATCH 3/3] regulator: lp873x: Add support for lp873x PMIC regulators

[Keerthy]

The regulators set consists of 2 BUCKs and 2 LDOs. The output
voltages are configurable and are meant to supply power to the
main processor and other components. The ramp delay is configurable
for both BUCKs.

Signed-off-by: Keerthy 
---
 drivers/regulator/Kconfig|   9 ++
 drivers/regulator/Makefile   |   1 +
 drivers/regulator/lp873x-regulator.c | 242 +++
 3 files changed, 252 insertions(+)
 create mode 100644 drivers/regulator/lp873x-regulator.c

diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index c77dc08..4d2d737 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -321,6 +321,15 @@ config REGULATOR_LP872X
help
  This driver supports LP8720/LP8725 PMIC
 
+config REGULATOR_LP873X
+   tristate "TI LP873X Power regulators"
+   depends on MFD_LP873X && OF
+   help
+ This driver supports LP873X voltage regulator chips. LP873X
+ provides two step-down converters and two general-purpose LDO
+ voltage regulators. It supports software based voltage control
+ for different voltage domains
+
 config REGULATOR_LP8755
tristate "TI LP8755 High Performance PMU driver"
depends on I2C
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 61bfbb9..7182b5f 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -42,6 +42,7 @@ obj-$(CONFIG_REGULATOR_LM363X) += lm363x-regulator.o
 obj-$(CONFIG_REGULATOR_LP3971) += lp3971.o
 obj-$(CONFIG_REGULATOR_LP3972) += lp3972.o
 obj-$(CONFIG_REGULATOR_LP872X) += lp872x.o
+obj-$(CONFIG_REGULATOR_LP873X) += lp873x-regulator.o
 obj-$(CONFIG_REGULATOR_LP8788) += lp8788-buck.o
 obj-$(CONFIG_REGULATOR_LP8788) += lp8788-ldo.o
 obj-$(CONFIG_REGULATOR_LP8755) += lp8755.o
diff --git a/drivers/regulator/lp873x-regulator.c 
b/drivers/regulator/lp873x-regulator.c
new file mode 100644
index 000..607eb13
--- /dev/null
+++ b/drivers/regulator/lp873x-regulator.c
@@ -0,0 +1,242 @@
+/*
+ * Regulator driver for LP873X PMIC
+ *
+ * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether expressed or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License version 2 for more details.
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+#define LP873X_REGULATOR(_name, _id, _of, _ops, _n, _vr, _vm, _er, _em, \
+_delay, _lr, _nlr, _cr)\
+   [_id] = {   \
+   .desc = {   \
+   .name   = _name,\
+   .id = _id,  \
+   .of_match   = of_match_ptr(_of),\
+   .regulators_node= of_match_ptr("regulators"),\
+   .ops= &_ops,\
+   .n_voltages = _n,   \
+   .type   = REGULATOR_VOLTAGE,\
+   .owner  = THIS_MODULE,  \
+   .vsel_reg   = _vr,  \
+   .vsel_mask  = _vm,  \
+   .enable_reg = _er,  \
+   .enable_mask= _em,  \
+   .ramp_delay = _delay,   \
+   .linear_ranges  = _lr,  \
+   .n_linear_ranges= _nlr, \
+   },  \
+   .ctrl2_reg = _cr,   \
+   }
+
+struct lp873x_regulator {
+   struct regulator_desc desc;
+   unsigned int ctrl2_reg;
+};
+
+static const struct lp873x_regulator regulators[];
+
+static const struct regulator_linear_range buck0_buck1_ranges[] = {
+   REGULATOR_LINEAR_RANGE(0, 0x0, 0x13, 0),
+   REGULATOR_LINEAR_RANGE(70, 0x14, 0x17, 1),
+   REGULATOR_LINEAR_RANGE(735000, 0x18, 0x9d, 5000),
+   REGULATOR_LINEAR_RANGE(142, 0x9e, 0xff, 2),
+};
+
+static const struct regulator_linear_range ldo0_ldo1_ranges[] = {
+   REGULATOR_LINEAR_RANGE(80, 0x0, 0x19, 10),
+};
+
+static unsigned int lp873x_buck_ramp_delay[] = {
+   3, 15000, 1, 7500, 3800, 1900, 940, 470
+};
+
+/* LP873X BUCK current limit */

[PATCH] mfd: lp873x: Add lp873x PMIC support

[Keerthy]

The LP873X chip is a power management IC for Portable Navigation Systems
and Tablet Computing devices. It contains the following components:

 - Regulators.
 - Configurable General Purpose Output Signals(GPO).

PMIC interacts with the main processor through i2c. PMIC has
couple of LDOs(Linear Regulators), couple of BUCKs (Step-Down DC-DC
Converter Cores) and GPOs(General Purpose Output Signals). At this
time only the regulator functionality is made available.

Signed-off-by: Keerthy 
---
 drivers/mfd/Kconfig|  15 +++
 drivers/mfd/Makefile   |   2 +
 drivers/mfd/lp873x.c   |  94 
 include/linux/mfd/lp873x.h | 265 +
 4 files changed, 376 insertions(+)
 create mode 100644 drivers/mfd/lp873x.c
 create mode 100644 include/linux/mfd/lp873x.h

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index eea61e3..1d85f10 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -1185,6 +1185,21 @@ config MFD_TPS65217
  This driver can also be built as a module.  If so, the module
  will be called tps65217.
 
+config MFD_LP873X
+   tristate "TI LP873X Power Management IC"
+   depends on I2C
+   select MFD_CORE
+   select REGMAP_I2C
+   help
+ If you say yes here you get support for the LP873X series of
+ Power Management Integrated Circuits.
+ These include voltage regulators, Thermal protection, Configurable
+ general pirpose outputs and other features that are often used in
+ portable devices.
+
+ This driver can also be built as a module.  If so, the module
+ will be called lp873x.
+
 config MFD_TPS65218
tristate "TI TPS65218 Power Management chips"
depends on I2C
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 5eaa6465d..617c688 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -22,6 +22,8 @@ obj-$(CONFIG_HTC_EGPIO)   += htc-egpio.o
 obj-$(CONFIG_HTC_PASIC3)   += htc-pasic3.o
 obj-$(CONFIG_HTC_I2CPLD)   += htc-i2cpld.o
 
+obj-$(CONFIG_MFD_LP873X)   += lp873x.o
+
 obj-$(CONFIG_MFD_DAVINCI_VOICECODEC)   += davinci_voicecodec.o
 obj-$(CONFIG_MFD_DM355EVM_MSP) += dm355evm_msp.o
 obj-$(CONFIG_MFD_TI_AM335X_TSCADC) += ti_am335x_tscadc.o
diff --git a/drivers/mfd/lp873x.c b/drivers/mfd/lp873x.c
new file mode 100644
index 000..4b9243d
--- /dev/null
+++ b/drivers/mfd/lp873x.c
@@ -0,0 +1,94 @@
+/*
+ * LP873X chip family multi-function driver
+ *
+ * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static const struct regmap_config lp873x_regmap_config = {
+   .reg_bits = 8,
+   .val_bits = 8,
+   .max_register = LP873X_REG_MAX,
+};
+
+static const struct of_device_id of_lp873x_match_table[] = {
+   { .compatible = "ti,lp873x", },
+   { .compatible = "ti,lp8733", },
+   { .compatible = "ti,lp8732", },
+   {}
+};
+MODULE_DEVICE_TABLE(of, of_lp873x_match_table);
+
+static const struct i2c_device_id lp873x_id_table[] = {
+   { "lp873x", LP873X },
+   { "lp8732", LP873X },
+   { "lp8733", LP873X },
+   { },
+};
+MODULE_DEVICE_TABLE(i2c, lp873x_id_table);
+
+static int lp873x_probe(struct i2c_client *client,
+   const struct i2c_device_id *ids)
+{
+   struct lp873x *lp873;
+   int ret;
+   unsigned int otpid;
+
+   lp873 = devm_kzalloc(>dev, sizeof(*lp873), GFP_KERNEL);
+   if (!lp873)
+   return -ENOMEM;
+
+   i2c_set_clientdata(client, lp873);
+   lp873->dev = >dev;
+   lp873->regmap = devm_regmap_init_i2c(client, _regmap_config);
+   if (IS_ERR(lp873->regmap)) {
+   ret = PTR_ERR(lp873->regmap);
+   dev_err(lp873->dev, "Failed to initialize register map: %d\n",
+   ret);
+   return ret;
+   }
+
+   mutex_init(>lp873_lock);
+
+   ret = regmap_read(lp873->regmap, LP873X_REG_OTP_REV, );
+
+   if (ret) {
+   dev_err(lp873->dev, "Failed to read otpid\n");
+   return ret;
+   }
+
+   lp873->rev = otpid & LP873X_OTP_REV_OTP_ID;
+
+   ret = of_platform_populate(client->dev.of_node, NULL, NULL,
+  >dev);
+
+   return ret;
+}
+
+static struct i2c_driver lp873x_driver = {
+   .driver = {
+   .name   = "lp873x",
+   .of_match_table = of_lp873x_match_table,
+

[PATCH 1/3] Documentation: mfd/regulator: LP873X: Add information for the mfd and regulator drivers

[Keerthy]

Add information for the mfd and regulator drivers.

Signed-off-by: Keerthy 
---
 Documentation/devicetree/bindings/mfd/lp873x.txt   | 56 +
 .../devicetree/bindings/regulator/lp873x.txt   | 98 ++
 2 files changed, 154 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/lp873x.txt
 create mode 100644 Documentation/devicetree/bindings/regulator/lp873x.txt

diff --git a/Documentation/devicetree/bindings/mfd/lp873x.txt 
b/Documentation/devicetree/bindings/mfd/lp873x.txt
new file mode 100644
index 000..050d822
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/lp873x.txt
@@ -0,0 +1,56 @@
+TI LP3943 MFD driver
+
+Required properties:
+  - compatible: "ti,lp873x", "ti,lp8732", "ti,lp8733"
+  - reg: I2C slave address.
+
+For the lp873x regulator properties please refer to:
+Documentation/devicetree/bindings/regulator/lp873x.txt
+
+Example:
+
+lp8733: lp8733@60 {
+   compatible = "ti,lp8733";
+   reg = <0x60>;
+
+   regulators {
+   compatible = "ti,lp8733-regulators";
+   buck0 {
+   regulator-name = "lp8733-buck0";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <140>;
+   regulator-min-microamp = <150>;
+   regulator-max-microamp = <400>;
+   regulator-ramp-delay = <1>;
+   regulator-always-on;
+   regulator-boot-on;
+   };
+
+   buck1 {
+   regulator-name = "lp8733-buck1";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <140>;
+   regulator-min-microamp = <150>;
+   regulator-max-microamp = <400>;
+   regulator-ramp-delay = <1>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+
+   ldo0 {
+   regulator-name = "lp8733-ldo0";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <300>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+
+   ldo1 {
+   regulator-name = "lp8733-ldo1";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <300>;
+   regulator-always-on;
+   regulator-boot-on;
+   };
+   };
+};
diff --git a/Documentation/devicetree/bindings/regulator/lp873x.txt 
b/Documentation/devicetree/bindings/regulator/lp873x.txt
new file mode 100644
index 000..079d8a5
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/lp873x.txt
@@ -0,0 +1,98 @@
+LP873X family of regulators
+
+Required properties:
+For lp873x Bucks/LDOs
+- compatible:
+  - "ti,lp8733-regulators" for lp8733 PMIC
+  - "ti,lp8732-regulators" for lp8732 PMIC
+  - "ti,lp873x-regulators" for lp8732 PMIC
+
+Examples:
+
+1) LP8733 Regulators:
+
+regulators {
+   compatible = "ti,lp8733-regulators";
+
+   buck0 {
+   regulator-name = "lp8733-buck0";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <140>;
+   regulator-min-microamp = <150>;
+   regulator-max-microamp = <400>;
+   regulator-ramp-delay = <1>;
+   regulator-always-on;
+   regulator-boot-on;
+   };
+
+   buck1 {
+   regulator-name = "lp8733-buck1";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <140>;
+   regulator-min-microamp = <150>;
+   regulator-max-microamp = <400>;
+   regulator-ramp-delay = <1>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+
+   ldo0 {
+   regulator-name = "lp8733-ldo0";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <300>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+
+   ldo1 {
+   regulator-name = "lp8733-ldo1";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <300>;
+   regulator-always-on;
+   regulator-boot-on;
+   };
+};
+
+1) LP8732 Regulators:
+
+regulators {
+   compatible = "ti,lp8732-regulators";
+
+   buck0 {
+   regulator-name = "lp8732-buck0";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <140>;
+   regulator-min-microamp = <150>;
+   regulator-max-microamp = <400>;
+   regulator-ramp-delay = <1>;
+  

[PATCH 3/3] regulator: lp873x: Add support for lp873x PMIC regulators

[Keerthy]

The regulators set consists of 2 BUCKs and 2 LDOs. The output
voltages are configurable and are meant to supply power to the
main processor and other components. The ramp delay is configurable
for both BUCKs.

Signed-off-by: Keerthy 
---
 drivers/regulator/Kconfig|   9 ++
 drivers/regulator/Makefile   |   1 +
 drivers/regulator/lp873x-regulator.c | 242 +++
 3 files changed, 252 insertions(+)
 create mode 100644 drivers/regulator/lp873x-regulator.c

diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index c77dc08..4d2d737 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -321,6 +321,15 @@ config REGULATOR_LP872X
help
  This driver supports LP8720/LP8725 PMIC
 
+config REGULATOR_LP873X
+   tristate "TI LP873X Power regulators"
+   depends on MFD_LP873X && OF
+   help
+ This driver supports LP873X voltage regulator chips. LP873X
+ provides two step-down converters and two general-purpose LDO
+ voltage regulators. It supports software based voltage control
+ for different voltage domains
+
 config REGULATOR_LP8755
tristate "TI LP8755 High Performance PMU driver"
depends on I2C
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 61bfbb9..7182b5f 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -42,6 +42,7 @@ obj-$(CONFIG_REGULATOR_LM363X) += lm363x-regulator.o
 obj-$(CONFIG_REGULATOR_LP3971) += lp3971.o
 obj-$(CONFIG_REGULATOR_LP3972) += lp3972.o
 obj-$(CONFIG_REGULATOR_LP872X) += lp872x.o
+obj-$(CONFIG_REGULATOR_LP873X) += lp873x-regulator.o
 obj-$(CONFIG_REGULATOR_LP8788) += lp8788-buck.o
 obj-$(CONFIG_REGULATOR_LP8788) += lp8788-ldo.o
 obj-$(CONFIG_REGULATOR_LP8755) += lp8755.o
diff --git a/drivers/regulator/lp873x-regulator.c 
b/drivers/regulator/lp873x-regulator.c
new file mode 100644
index 000..607eb13
--- /dev/null
+++ b/drivers/regulator/lp873x-regulator.c
@@ -0,0 +1,242 @@
+/*
+ * Regulator driver for LP873X PMIC
+ *
+ * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether expressed or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License version 2 for more details.
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+#define LP873X_REGULATOR(_name, _id, _of, _ops, _n, _vr, _vm, _er, _em, \
+_delay, _lr, _nlr, _cr)\
+   [_id] = {   \
+   .desc = {   \
+   .name   = _name,\
+   .id = _id,  \
+   .of_match   = of_match_ptr(_of),\
+   .regulators_node= of_match_ptr("regulators"),\
+   .ops= &_ops,\
+   .n_voltages = _n,   \
+   .type   = REGULATOR_VOLTAGE,\
+   .owner  = THIS_MODULE,  \
+   .vsel_reg   = _vr,  \
+   .vsel_mask  = _vm,  \
+   .enable_reg = _er,  \
+   .enable_mask= _em,  \
+   .ramp_delay = _delay,   \
+   .linear_ranges  = _lr,  \
+   .n_linear_ranges= _nlr, \
+   },  \
+   .ctrl2_reg = _cr,   \
+   }
+
+struct lp873x_regulator {
+   struct regulator_desc desc;
+   unsigned int ctrl2_reg;
+};
+
+static const struct lp873x_regulator regulators[];
+
+static const struct regulator_linear_range buck0_buck1_ranges[] = {
+   REGULATOR_LINEAR_RANGE(0, 0x0, 0x13, 0),
+   REGULATOR_LINEAR_RANGE(70, 0x14, 0x17, 1),
+   REGULATOR_LINEAR_RANGE(735000, 0x18, 0x9d, 5000),
+   REGULATOR_LINEAR_RANGE(142, 0x9e, 0xff, 2),
+};
+
+static const struct regulator_linear_range ldo0_ldo1_ranges[] = {
+   REGULATOR_LINEAR_RANGE(80, 0x0, 0x19, 10),
+};
+
+static unsigned int lp873x_buck_ramp_delay[] = {
+   3, 15000, 1, 7500, 3800, 1900, 940, 470
+};
+
+/* LP873X BUCK current limit */
+static const 

[PATCH RESEND v3 0/2] drm: introduce bus_flags for pixel clock polarity

[Stefan Agner]

This resend is just rebased on drm-next as of today (+Daniels Ack).

Dropped the first patch in version 3 since that is already applied
in v4.6. Also moved all generic changes (including the changes in
panel-simple) to the first, generic patch.

Instead of using struct drm_display_mode to convey the pixel clock
polarity information, this patchset introduces a new field called
bus_flags stored in struct drm_display_info.

--
Stefan

Changes since v2:
- Rebased to v4.6 and dropped ("drm/fsl-dcu: use mode flags for hsync/vsync
  polarity"), already part of v4.6-rc1
- Moved all generic changes to the first commit

Changes since v1:
- Introduce bus_flags to convey the pixel clock polarity from
  panel-simple.c to the driver.

Stefan Agner (2):
  drm: introduce bus_flags in drm_display_info
  drm/fsl-dcu: use bus_flags for pixel clock polarity

 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 5 +
 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h  | 4 ++--
 drivers/gpu/drm/panel/panel-simple.c   | 5 -
 include/drm/drm_crtc.h | 9 +
 4 files changed, 20 insertions(+), 3 deletions(-)

-- 
2.8.2

[PATCH RESEND v3 0/2] drm: introduce bus_flags for pixel clock polarity

[Stefan Agner]

This resend is just rebased on drm-next as of today (+Daniels Ack).

Dropped the first patch in version 3 since that is already applied
in v4.6. Also moved all generic changes (including the changes in
panel-simple) to the first, generic patch.

Instead of using struct drm_display_mode to convey the pixel clock
polarity information, this patchset introduces a new field called
bus_flags stored in struct drm_display_info.

--
Stefan

Changes since v2:
- Rebased to v4.6 and dropped ("drm/fsl-dcu: use mode flags for hsync/vsync
  polarity"), already part of v4.6-rc1
- Moved all generic changes to the first commit

Changes since v1:
- Introduce bus_flags to convey the pixel clock polarity from
  panel-simple.c to the driver.

Stefan Agner (2):
  drm: introduce bus_flags in drm_display_info
  drm/fsl-dcu: use bus_flags for pixel clock polarity

 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 5 +
 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h  | 4 ++--
 drivers/gpu/drm/panel/panel-simple.c   | 5 -
 include/drm/drm_crtc.h | 9 +
 4 files changed, 20 insertions(+), 3 deletions(-)

-- 
2.8.2

[PATCH RESEND v3 2/2] drm/fsl-dcu: use bus_flags for pixel clock polarity

[Stefan Agner]

The drivers current default configuration drives the pixel data
on rising edge of the pixel clock. However, most display sample
data on rising edge... This leads to color shift artefacts visible
especially at edges.

This patch changes the relevant defines to be useful and actually
set the bits, and changes pixel clock polarity to drive the pixel
data on falling edge by default. The patch also adds an explicit
pixel clock polarity flag to the display introduced with the driver
(NEC WQVGA "nec,nl4827hc19-05b") using the new bus_flags field to
retain the initial behavior.

Signed-off-by: Stefan Agner 
---
 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 5 +
 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h  | 4 ++--
 drivers/gpu/drm/panel/panel-simple.c   | 3 ++-
 3 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c 
b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c
index 365809e..89c0084 100644
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c
@@ -66,6 +66,7 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc 
*crtc)
 {
struct drm_device *dev = crtc->dev;
struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
+   struct drm_connector *con = _dev->connector.base;
struct drm_display_mode *mode = >state->mode;
unsigned int hbp, hfp, hsw, vbp, vfp, vsw, index, pol = 0;
 
@@ -80,6 +81,10 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc 
*crtc)
vfp = mode->vsync_start - mode->vdisplay;
vsw = mode->vsync_end - mode->vsync_start;
 
+   /* INV_PXCK as default (most display sample data on rising edge) */
+   if (!(con->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE))
+   pol |= DCU_SYN_POL_INV_PXCK;
+
if (mode->flags & DRM_MODE_FLAG_NHSYNC)
pol |= DCU_SYN_POL_INV_HS_LOW;
 
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h 
b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h
index 5bb7c26..c275f90 100644
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h
@@ -47,8 +47,8 @@
 #define DCU_VSYN_PARA_FP(x)(x)
 
 #define DCU_SYN_POL0x0024
-#define DCU_SYN_POL_INV_PXCK_FALL  (0 << 6)
-#define DCU_SYN_POL_NEG_REMAIN (0 << 5)
+#define DCU_SYN_POL_INV_PXCK   BIT(6)
+#define DCU_SYN_POL_NEGBIT(5)
 #define DCU_SYN_POL_INV_VS_LOW BIT(1)
 #define DCU_SYN_POL_INV_HS_LOW BIT(0)
 
diff --git a/drivers/gpu/drm/panel/panel-simple.c 
b/drivers/gpu/drm/panel/panel-simple.c
index 77ae07f..b19c88f 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -1053,7 +1053,8 @@ static const struct panel_desc nec_nl4827hc19_05b = {
.width = 95,
.height = 54,
},
-   .bus_format = MEDIA_BUS_FMT_RGB888_1X24
+   .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
+   .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE,
 };
 
 static const struct display_timing okaya_rs800480t_7x0gp_timing = {
-- 
2.8.2

[PATCH RESEND v3 1/2] drm: introduce bus_flags in drm_display_info

[Stefan Agner]

Introduce bus_flags to specify display bus properties like signal
polarities. This is useful for parallel display buses, e.g. to
specify the pixel clock or data enable polarity.

Suggested-by: Thierry Reding 
Acked-by: Philipp Zabel 
Acked-by: Manfred Schlaegl 
Acked-by: Daniel Vetter 
Signed-off-by: Stefan Agner 
---
 drivers/gpu/drm/panel/panel-simple.c | 2 ++
 include/drm/drm_crtc.h   | 9 +
 2 files changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-simple.c 
b/drivers/gpu/drm/panel/panel-simple.c
index ceb2048..77ae07f 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -72,6 +72,7 @@ struct panel_desc {
} delay;
 
u32 bus_format;
+   u32 bus_flags;
 };
 
 struct panel_simple {
@@ -144,6 +145,7 @@ static int panel_simple_get_fixed_modes(struct panel_simple 
*panel)
if (panel->desc->bus_format)
drm_display_info_set_bus_formats(>display_info,
 >desc->bus_format, 1);
+   connector->display_info.bus_flags = panel->desc->bus_flags;
 
return num;
 }
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 4acdaf5..d1559cd 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -118,6 +118,14 @@ enum subpixel_order {
 #define DRM_COLOR_FORMAT_RGB444(1<<0)
 #define DRM_COLOR_FORMAT_YCRCB444  (1<<1)
 #define DRM_COLOR_FORMAT_YCRCB422  (1<<2)
+
+#define DRM_BUS_FLAG_DE_LOW(1<<0)
+#define DRM_BUS_FLAG_DE_HIGH   (1<<1)
+/* drive data on pos. edge */
+#define DRM_BUS_FLAG_PIXDATA_POSEDGE   (1<<2)
+/* drive data on neg. edge */
+#define DRM_BUS_FLAG_PIXDATA_NEGEDGE   (1<<3)
+
 /*
  * Describes a given display (e.g. CRT or flat panel) and its limitations.
  */
@@ -139,6 +147,7 @@ struct drm_display_info {
 
const u32 *bus_formats;
unsigned int num_bus_formats;
+   u32 bus_flags;
 
/* Mask of supported hdmi deep color modes */
u8 edid_hdmi_dc_modes;
-- 
2.8.2

[PATCH RESEND v3 2/2] drm/fsl-dcu: use bus_flags for pixel clock polarity

[Stefan Agner]

The drivers current default configuration drives the pixel data
on rising edge of the pixel clock. However, most display sample
data on rising edge... This leads to color shift artefacts visible
especially at edges.

This patch changes the relevant defines to be useful and actually
set the bits, and changes pixel clock polarity to drive the pixel
data on falling edge by default. The patch also adds an explicit
pixel clock polarity flag to the display introduced with the driver
(NEC WQVGA "nec,nl4827hc19-05b") using the new bus_flags field to
retain the initial behavior.

Signed-off-by: Stefan Agner 
---
 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 5 +
 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h  | 4 ++--
 drivers/gpu/drm/panel/panel-simple.c   | 3 ++-
 3 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c 
b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c
index 365809e..89c0084 100644
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c
@@ -66,6 +66,7 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc 
*crtc)
 {
struct drm_device *dev = crtc->dev;
struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
+   struct drm_connector *con = _dev->connector.base;
struct drm_display_mode *mode = >state->mode;
unsigned int hbp, hfp, hsw, vbp, vfp, vsw, index, pol = 0;
 
@@ -80,6 +81,10 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc 
*crtc)
vfp = mode->vsync_start - mode->vdisplay;
vsw = mode->vsync_end - mode->vsync_start;
 
+   /* INV_PXCK as default (most display sample data on rising edge) */
+   if (!(con->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE))
+   pol |= DCU_SYN_POL_INV_PXCK;
+
if (mode->flags & DRM_MODE_FLAG_NHSYNC)
pol |= DCU_SYN_POL_INV_HS_LOW;
 
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h 
b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h
index 5bb7c26..c275f90 100644
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h
@@ -47,8 +47,8 @@
 #define DCU_VSYN_PARA_FP(x)(x)
 
 #define DCU_SYN_POL0x0024
-#define DCU_SYN_POL_INV_PXCK_FALL  (0 << 6)
-#define DCU_SYN_POL_NEG_REMAIN (0 << 5)
+#define DCU_SYN_POL_INV_PXCK   BIT(6)
+#define DCU_SYN_POL_NEGBIT(5)
 #define DCU_SYN_POL_INV_VS_LOW BIT(1)
 #define DCU_SYN_POL_INV_HS_LOW BIT(0)
 
diff --git a/drivers/gpu/drm/panel/panel-simple.c 
b/drivers/gpu/drm/panel/panel-simple.c
index 77ae07f..b19c88f 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -1053,7 +1053,8 @@ static const struct panel_desc nec_nl4827hc19_05b = {
.width = 95,
.height = 54,
},
-   .bus_format = MEDIA_BUS_FMT_RGB888_1X24
+   .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
+   .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE,
 };
 
 static const struct display_timing okaya_rs800480t_7x0gp_timing = {
-- 
2.8.2

[PATCH RESEND v3 1/2] drm: introduce bus_flags in drm_display_info

[Stefan Agner]

Introduce bus_flags to specify display bus properties like signal
polarities. This is useful for parallel display buses, e.g. to
specify the pixel clock or data enable polarity.

Suggested-by: Thierry Reding 
Acked-by: Philipp Zabel 
Acked-by: Manfred Schlaegl 
Acked-by: Daniel Vetter 
Signed-off-by: Stefan Agner 
---
 drivers/gpu/drm/panel/panel-simple.c | 2 ++
 include/drm/drm_crtc.h   | 9 +
 2 files changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-simple.c 
b/drivers/gpu/drm/panel/panel-simple.c
index ceb2048..77ae07f 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -72,6 +72,7 @@ struct panel_desc {
} delay;
 
u32 bus_format;
+   u32 bus_flags;
 };
 
 struct panel_simple {
@@ -144,6 +145,7 @@ static int panel_simple_get_fixed_modes(struct panel_simple 
*panel)
if (panel->desc->bus_format)
drm_display_info_set_bus_formats(>display_info,
 >desc->bus_format, 1);
+   connector->display_info.bus_flags = panel->desc->bus_flags;
 
return num;
 }
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 4acdaf5..d1559cd 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -118,6 +118,14 @@ enum subpixel_order {
 #define DRM_COLOR_FORMAT_RGB444(1<<0)
 #define DRM_COLOR_FORMAT_YCRCB444  (1<<1)
 #define DRM_COLOR_FORMAT_YCRCB422  (1<<2)
+
+#define DRM_BUS_FLAG_DE_LOW(1<<0)
+#define DRM_BUS_FLAG_DE_HIGH   (1<<1)
+/* drive data on pos. edge */
+#define DRM_BUS_FLAG_PIXDATA_POSEDGE   (1<<2)
+/* drive data on neg. edge */
+#define DRM_BUS_FLAG_PIXDATA_NEGEDGE   (1<<3)
+
 /*
  * Describes a given display (e.g. CRT or flat panel) and its limitations.
  */
@@ -139,6 +147,7 @@ struct drm_display_info {
 
const u32 *bus_formats;
unsigned int num_bus_formats;
+   u32 bus_flags;
 
/* Mask of supported hdmi deep color modes */
u8 edid_hdmi_dc_modes;
-- 
2.8.2

Re: [lkp] [sched/fair] 41e0d37f7a: divide error: 0000 [#1] SMP

[Wanpeng Li]

2016-05-03 23:10 GMT+08:00 Rafael J. Wysocki :
> On Tuesday, May 03, 2016 03:53:12 PM Rafael J. Wysocki wrote:
>> On Tuesday, May 03, 2016 03:22:24 PM Rafael J. Wysocki wrote:
>> > On Tue, May 3, 2016 at 2:58 PM, Rafael J. Wysocki  
>> > wrote:
>> > > On Tue, May 3, 2016 at 2:54 PM, Rafael J. Wysocki  
>> > > wrote:
>> > >> On Tue, May 3, 2016 at 2:15 PM, Rafael J. Wysocki  
>> > >> wrote:
>> > >>> On Tue, May 3, 2016 at 10:32 AM, Peter Zijlstra  
>> > >>> wrote:
>> >  On Tue, May 03, 2016 at 09:10:51AM +0800, kernel test robot wrote:
>> > > FYI, we noticed the following commit:
>> > >
>> > > https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git 
>> > > sched/core
>> > > commit 41e0d37f7ac81297c07ba311e4ad39465b8c8295 ("sched/fair: Do not 
>> > > call cpufreq hook unless util changed")
>> > 
>> > 
>> > > [   14.860950] Freeing unused kernel memory: 260K (88103edbf000 
>> > > - 88103ee0)
>> > > [   14.873013] systemd[1]: RTC configured in localtime, applying 
>> > > delta of 480 minutes to system time.
>> > > [   14.884474] random: systemd urandom read with 5 bits of entropy 
>> > > available
>> > > [   14.903975] divide error:  [#1] SMP
>> > > [   14.908375] Modules linked in:
>> > > [   14.911793] CPU: 39 PID: 1 Comm: systemd Not tainted 
>> > > 4.6.0-rc4-00016-g41e0d37 #1
>> > > [   14.920051] Hardware name: Intel Corporation S2600WP/S2600WP, 
>> > > BIOS SE5C600.86B.02.02.0002.122320131210 12/23/2013
>> > > [   14.931509] task: 8810101d8000 ti: 88081ab2 task.ti: 
>> > > 88081ab2
>> > > [   14.939862] RIP: 0010:[]  [] 
>> > > intel_pstate_get+0x32/0x40
>> > > [   14.949202] RSP: 0018:88081ab23d70  EFLAGS: 00010006
>> > > [   14.955129] RAX:  RBX: 0024 RCX: 
>> > > 8808091e0300
>> > > [   14.963094] RDX:  RSI: 0100 RDI: 
>> > > 0024
>> > > [   14.971057] RBP: 88081ab23d88 R08: 1000 R09: 
>> > > 096a1000
>> > > [   14.979022] R10: 0010 R11: 000f R12: 
>> > > 0202
>> > > [   14.986984] R13: 88101390a040 R14: 88100e48e180 R15: 
>> > > 88101390a040
>> > > [   14.994950] FS:  7f66fe117880() GS:8810139c() 
>> > > knlGS:
>> > > [   15.003982] CS:  0010 DS:  ES:  CR0: 80050033
>> > > [   15.010393] CR2: 55f78b760098 CR3: 00103d759000 CR4: 
>> > > 001406e0
>> > > [   15.018359] Stack:
>> > > [   15.020602]  81764dad 0024 88100e48e180 
>> > > 88081ab23dc8
>> > > [   15.028899]  81040267 88101390a0ac 0340 
>> > > 88081ab23f20
>> > > [   15.037197]  88103cd7c400 88100e48e180 88101390a040 
>> > > 88081ab23e30
>> > > [   15.045493] Call Trace:
>> > > [   15.048223]  [] ? cpufreq_quick_get+0x3d/0x90
>> > > [   15.054832]  [] show_cpuinfo+0x3c7/0x410
>> > > [   15.060956]  [] seq_read+0x2c4/0x3a0
>> > > [   15.066685]  [] proc_reg_read+0x48/0x70
>> > > [   15.072713]  [] __vfs_read+0x28/0xd0
>> > > [   15.078451]  [] ? 
>> > > security_file_permission+0xa3/0xc0
>> > > [   15.085737]  [] ? rw_verify_area+0x57/0xd0
>> > > [   15.092054]  [] vfs_read+0x86/0x130
>> > > [   15.097691]  [] SyS_read+0x46/0xa0
>> > > [   15.103234]  [] 
>> > > entry_SYSCALL_64_fastpath+0x1a/0xa4
>> > > [   15.110421] Code: 05 dc 1b c3 00 89 ff 55 48 89 e5 48 8b 0c f8 48 
>> > > 85 c9 74 1f 48 63 51 1c 48 63 41 20 5d 48 0f af c2 31 d2 48 0f af 81 
>> > > 88 00 00 00 <48> f7 b1 90 00 00 00 c3 31 c0 5d c3 66 90 0f 1f 44 00 
>> > > 00 8b 77
>> > > [   15.132161] RIP  [] intel_pstate_get+0x32/0x40
>> > > [   15.138875]  RSP 
>> > > [   15.142770] ---[ end trace e5d5a8bedf5502e1 ]---
>> > > [   15.149323] Kernel panic - not syncing: Fatal exception
>> > >
>> > 
>> >  That's intel_pstate.c:get_avg_frequency(), which assumes mperf != 0. 
>> >  It
>> >  being 0 seems to suggest intel_pstate_sample() hasn't been called yet 
>> >  or
>> >  so.
>> > >>>
>> > >>> Well, what's the tree based on?
>> > >>>
>> > >>> The mainline does this:
>> > >>>
>> > >>> bool sample_taken = intel_pstate_sample(cpu, time);
>> > >>>
>> > >>> if (sample_taken && !hwp_active)
>> > >>> intel_pstate_adjust_busy_pstate(cpu);
>> > >>>
>> > >>> and (the mainline version of) intel_pstate_sample() returns false when
>> > >>> it is called for the first time after setting the update_util hook.
>> > >>
>> > >> If that helps, I can expose my pm-cpufreq-fixes branch to pull from.
>> > >> It contains all cpufreq material that went into the Linus' tree to
>> > >> 

Re: [lkp] [sched/fair] 41e0d37f7a: divide error: 0000 [#1] SMP

[Wanpeng Li]

2016-05-03 23:10 GMT+08:00 Rafael J. Wysocki :
> On Tuesday, May 03, 2016 03:53:12 PM Rafael J. Wysocki wrote:
>> On Tuesday, May 03, 2016 03:22:24 PM Rafael J. Wysocki wrote:
>> > On Tue, May 3, 2016 at 2:58 PM, Rafael J. Wysocki  
>> > wrote:
>> > > On Tue, May 3, 2016 at 2:54 PM, Rafael J. Wysocki  
>> > > wrote:
>> > >> On Tue, May 3, 2016 at 2:15 PM, Rafael J. Wysocki  
>> > >> wrote:
>> > >>> On Tue, May 3, 2016 at 10:32 AM, Peter Zijlstra  
>> > >>> wrote:
>> >  On Tue, May 03, 2016 at 09:10:51AM +0800, kernel test robot wrote:
>> > > FYI, we noticed the following commit:
>> > >
>> > > https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git 
>> > > sched/core
>> > > commit 41e0d37f7ac81297c07ba311e4ad39465b8c8295 ("sched/fair: Do not 
>> > > call cpufreq hook unless util changed")
>> > 
>> > 
>> > > [   14.860950] Freeing unused kernel memory: 260K (88103edbf000 
>> > > - 88103ee0)
>> > > [   14.873013] systemd[1]: RTC configured in localtime, applying 
>> > > delta of 480 minutes to system time.
>> > > [   14.884474] random: systemd urandom read with 5 bits of entropy 
>> > > available
>> > > [   14.903975] divide error:  [#1] SMP
>> > > [   14.908375] Modules linked in:
>> > > [   14.911793] CPU: 39 PID: 1 Comm: systemd Not tainted 
>> > > 4.6.0-rc4-00016-g41e0d37 #1
>> > > [   14.920051] Hardware name: Intel Corporation S2600WP/S2600WP, 
>> > > BIOS SE5C600.86B.02.02.0002.122320131210 12/23/2013
>> > > [   14.931509] task: 8810101d8000 ti: 88081ab2 task.ti: 
>> > > 88081ab2
>> > > [   14.939862] RIP: 0010:[]  [] 
>> > > intel_pstate_get+0x32/0x40
>> > > [   14.949202] RSP: 0018:88081ab23d70  EFLAGS: 00010006
>> > > [   14.955129] RAX:  RBX: 0024 RCX: 
>> > > 8808091e0300
>> > > [   14.963094] RDX:  RSI: 0100 RDI: 
>> > > 0024
>> > > [   14.971057] RBP: 88081ab23d88 R08: 1000 R09: 
>> > > 096a1000
>> > > [   14.979022] R10: 0010 R11: 000f R12: 
>> > > 0202
>> > > [   14.986984] R13: 88101390a040 R14: 88100e48e180 R15: 
>> > > 88101390a040
>> > > [   14.994950] FS:  7f66fe117880() GS:8810139c() 
>> > > knlGS:
>> > > [   15.003982] CS:  0010 DS:  ES:  CR0: 80050033
>> > > [   15.010393] CR2: 55f78b760098 CR3: 00103d759000 CR4: 
>> > > 001406e0
>> > > [   15.018359] Stack:
>> > > [   15.020602]  81764dad 0024 88100e48e180 
>> > > 88081ab23dc8
>> > > [   15.028899]  81040267 88101390a0ac 0340 
>> > > 88081ab23f20
>> > > [   15.037197]  88103cd7c400 88100e48e180 88101390a040 
>> > > 88081ab23e30
>> > > [   15.045493] Call Trace:
>> > > [   15.048223]  [] ? cpufreq_quick_get+0x3d/0x90
>> > > [   15.054832]  [] show_cpuinfo+0x3c7/0x410
>> > > [   15.060956]  [] seq_read+0x2c4/0x3a0
>> > > [   15.066685]  [] proc_reg_read+0x48/0x70
>> > > [   15.072713]  [] __vfs_read+0x28/0xd0
>> > > [   15.078451]  [] ? 
>> > > security_file_permission+0xa3/0xc0
>> > > [   15.085737]  [] ? rw_verify_area+0x57/0xd0
>> > > [   15.092054]  [] vfs_read+0x86/0x130
>> > > [   15.097691]  [] SyS_read+0x46/0xa0
>> > > [   15.103234]  [] 
>> > > entry_SYSCALL_64_fastpath+0x1a/0xa4
>> > > [   15.110421] Code: 05 dc 1b c3 00 89 ff 55 48 89 e5 48 8b 0c f8 48 
>> > > 85 c9 74 1f 48 63 51 1c 48 63 41 20 5d 48 0f af c2 31 d2 48 0f af 81 
>> > > 88 00 00 00 <48> f7 b1 90 00 00 00 c3 31 c0 5d c3 66 90 0f 1f 44 00 
>> > > 00 8b 77
>> > > [   15.132161] RIP  [] intel_pstate_get+0x32/0x40
>> > > [   15.138875]  RSP 
>> > > [   15.142770] ---[ end trace e5d5a8bedf5502e1 ]---
>> > > [   15.149323] Kernel panic - not syncing: Fatal exception
>> > >
>> > 
>> >  That's intel_pstate.c:get_avg_frequency(), which assumes mperf != 0. 
>> >  It
>> >  being 0 seems to suggest intel_pstate_sample() hasn't been called yet 
>> >  or
>> >  so.
>> > >>>
>> > >>> Well, what's the tree based on?
>> > >>>
>> > >>> The mainline does this:
>> > >>>
>> > >>> bool sample_taken = intel_pstate_sample(cpu, time);
>> > >>>
>> > >>> if (sample_taken && !hwp_active)
>> > >>> intel_pstate_adjust_busy_pstate(cpu);
>> > >>>
>> > >>> and (the mainline version of) intel_pstate_sample() returns false when
>> > >>> it is called for the first time after setting the update_util hook.
>> > >>
>> > >> If that helps, I can expose my pm-cpufreq-fixes branch to pull from.
>> > >> It contains all cpufreq material that went into the Linus' tree to
>> > >> date and is based on 4.5-rc3.
>> > >
>> > > In fact, it is exposed already:
>> > >
>> > > 

[PATCH v2 13/13] ACPICA: Update version to 20160422

[Lv Zheng]

From: Bob Moore 

ACPICA commit a2327ba410e19c2aabaf34b711dbadf7d1dcf346

Version 20160422.

Link: https://github.com/acpica/acpica/commit/a2327ba4
Signed-off-by: Bob Moore 
Signed-off-by: Lv Zheng 
---
 include/acpi/acpixf.h |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/acpi/acpixf.h b/include/acpi/acpixf.h
index 366b364..4e4c214 100644
--- a/include/acpi/acpixf.h
+++ b/include/acpi/acpixf.h
@@ -46,7 +46,7 @@
 
 /* Current ACPICA subsystem version in MMDD format */
 
-#define ACPI_CA_VERSION 0x20160318
+#define ACPI_CA_VERSION 0x20160422
 
 #include 
 #include 
-- 
1.7.10

[PATCH v2 13/13] ACPICA: Update version to 20160422

[Lv Zheng]

From: Bob Moore 

ACPICA commit a2327ba410e19c2aabaf34b711dbadf7d1dcf346

Version 20160422.

Link: https://github.com/acpica/acpica/commit/a2327ba4
Signed-off-by: Bob Moore 
Signed-off-by: Lv Zheng 
---
 include/acpi/acpixf.h |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/acpi/acpixf.h b/include/acpi/acpixf.h
index 366b364..4e4c214 100644
--- a/include/acpi/acpixf.h
+++ b/include/acpi/acpixf.h
@@ -46,7 +46,7 @@
 
 /* Current ACPICA subsystem version in MMDD format */
 
-#define ACPI_CA_VERSION 0x20160318
+#define ACPI_CA_VERSION 0x20160422
 
 #include 
 #include 
-- 
1.7.10

[PATCH v2 12/13] ACPICA: Move all ASCII utilities to a common file

[Lv Zheng]

From: Bob Moore 

ACPICA commit ba60e4500053010bf775d58f6f61febbdb94d817

New file is utascii.c

Link: https://github.com/acpica/acpica/commit/ba60e450
Signed-off-by: Bob Moore 
Signed-off-by: Lv Zheng 
---
 drivers/acpi/acpica/Makefile |1 +
 drivers/acpi/acpica/actables.h   |2 -
 drivers/acpi/acpica/acutils.h|   13 ++-
 drivers/acpi/acpica/dbnames.c|2 +-
 drivers/acpi/acpica/exnames.c|2 +-
 drivers/acpi/acpica/tbdata.c |6 +-
 drivers/acpi/acpica/tbfind.c |2 +-
 drivers/acpi/acpica/tbinstal.c   |6 +-
 drivers/acpi/acpica/tbutils.c|   27 --
 drivers/acpi/acpica/utascii.c|  140 ++
 drivers/acpi/acpica/utstring.c   |   69 +--
 tools/power/acpi/tools/acpidump/Makefile |1 +
 tools/power/acpi/tools/acpidump/apdump.c |8 +-
 13 files changed, 168 insertions(+), 111 deletions(-)
 create mode 100644 drivers/acpi/acpica/utascii.c

diff --git a/drivers/acpi/acpica/Makefile b/drivers/acpi/acpica/Makefile
index 188597f..227bb7b 100644
--- a/drivers/acpi/acpica/Makefile
+++ b/drivers/acpi/acpica/Makefile
@@ -150,6 +150,7 @@ acpi-y +=   \
 acpi-y +=  \
utaddress.o \
utalloc.o   \
+   utascii.o   \
utbuffer.o  \
utcopy.o\
utexcep.o   \
diff --git a/drivers/acpi/acpica/actables.h b/drivers/acpi/acpica/actables.h
index 848ad3a..cd5a135 100644
--- a/drivers/acpi/acpica/actables.h
+++ b/drivers/acpi/acpica/actables.h
@@ -161,8 +161,6 @@ acpi_tb_install_fixed_table(acpi_physical_address address,
 
 acpi_status acpi_tb_parse_root_table(acpi_physical_address rsdp_address);
 
-u8 acpi_is_valid_signature(char *signature);
-
 /*
  * tbxfload
  */
diff --git a/drivers/acpi/acpica/acutils.h b/drivers/acpi/acpica/acutils.h
index 107f9e0..a7dbb2b 100644
--- a/drivers/acpi/acpica/acutils.h
+++ b/drivers/acpi/acpica/acutils.h
@@ -167,6 +167,15 @@ struct acpi_pkg_info {
 #define DB_QWORD_DISPLAY8
 
 /*
+ * utascii - ASCII utilities
+ */
+u8 acpi_ut_valid_nameseg(char *signature);
+
+u8 acpi_ut_valid_name_char(char character, u32 position);
+
+void acpi_ut_check_and_repair_ascii(u8 *name, char *repaired_name, u32 count);
+
+/*
  * utnonansi - Non-ANSI C library functions
  */
 void acpi_ut_strupr(char *src_string);
@@ -579,10 +588,6 @@ void acpi_ut_print_string(char *string, u16 max_length);
 void ut_convert_backslashes(char *pathname);
 #endif
 
-u8 acpi_ut_valid_acpi_name(char *name);
-
-u8 acpi_ut_valid_acpi_char(char character, u32 position);
-
 void acpi_ut_repair_name(char *name);
 
 #if defined (ACPI_DEBUGGER) || defined (ACPI_APPLICATION)
diff --git a/drivers/acpi/acpica/dbnames.c b/drivers/acpi/acpica/dbnames.c
index 4c9e59a..8667f14 100644
--- a/drivers/acpi/acpica/dbnames.c
+++ b/drivers/acpi/acpica/dbnames.c
@@ -709,7 +709,7 @@ acpi_db_integrity_walk(acpi_handle obj_handle,
return (AE_OK);
}
 
-   if (!acpi_ut_valid_acpi_name(node->name.ascii)) {
+   if (!acpi_ut_valid_nameseg(node->name.ascii)) {
acpi_os_printf("Invalid AcpiName for Node %p\n", node);
return (AE_OK);
}
diff --git a/drivers/acpi/acpica/exnames.c b/drivers/acpi/acpica/exnames.c
index 27c11ab..3d6af93 100644
--- a/drivers/acpi/acpica/exnames.c
+++ b/drivers/acpi/acpica/exnames.c
@@ -178,7 +178,7 @@ static acpi_status acpi_ex_name_segment(u8 ** 
in_aml_address, char *name_string)
 
for (index = 0;
 (index < ACPI_NAME_SIZE)
-&& (acpi_ut_valid_acpi_char(*aml_address, 0)); index++) {
+&& (acpi_ut_valid_name_char(*aml_address, 0)); index++) {
char_buf[index] = *aml_address++;
ACPI_DEBUG_PRINT((ACPI_DB_LOAD, "%c\n", char_buf[index]));
}
diff --git a/drivers/acpi/acpica/tbdata.c b/drivers/acpi/acpica/tbdata.c
index d471df3..1388a19 100644
--- a/drivers/acpi/acpica/tbdata.c
+++ b/drivers/acpi/acpica/tbdata.c
@@ -401,9 +401,9 @@ acpi_tb_verify_temp_table(struct acpi_table_desc 
*table_desc, char *signature)
ACPI_EXCEPTION((AE_INFO, AE_NO_MEMORY,
"%4.4s 0x%8.8X%8.8X"
" Attempted table install failed",
-   acpi_ut_valid_acpi_name(table_desc->
-   signature.
-   ascii) ?
+   acpi_ut_valid_nameseg(table_desc->
+ signature.
+ ascii) ?
table_desc->signature.ascii : "",

[PATCH v2 12/13] ACPICA: Move all ASCII utilities to a common file

[Lv Zheng]

From: Bob Moore 

ACPICA commit ba60e4500053010bf775d58f6f61febbdb94d817

New file is utascii.c

Link: https://github.com/acpica/acpica/commit/ba60e450
Signed-off-by: Bob Moore 
Signed-off-by: Lv Zheng 
---
 drivers/acpi/acpica/Makefile |1 +
 drivers/acpi/acpica/actables.h   |2 -
 drivers/acpi/acpica/acutils.h|   13 ++-
 drivers/acpi/acpica/dbnames.c|2 +-
 drivers/acpi/acpica/exnames.c|2 +-
 drivers/acpi/acpica/tbdata.c |6 +-
 drivers/acpi/acpica/tbfind.c |2 +-
 drivers/acpi/acpica/tbinstal.c   |6 +-
 drivers/acpi/acpica/tbutils.c|   27 --
 drivers/acpi/acpica/utascii.c|  140 ++
 drivers/acpi/acpica/utstring.c   |   69 +--
 tools/power/acpi/tools/acpidump/Makefile |1 +
 tools/power/acpi/tools/acpidump/apdump.c |8 +-
 13 files changed, 168 insertions(+), 111 deletions(-)
 create mode 100644 drivers/acpi/acpica/utascii.c

diff --git a/drivers/acpi/acpica/Makefile b/drivers/acpi/acpica/Makefile
index 188597f..227bb7b 100644
--- a/drivers/acpi/acpica/Makefile
+++ b/drivers/acpi/acpica/Makefile
@@ -150,6 +150,7 @@ acpi-y +=   \
 acpi-y +=  \
utaddress.o \
utalloc.o   \
+   utascii.o   \
utbuffer.o  \
utcopy.o\
utexcep.o   \
diff --git a/drivers/acpi/acpica/actables.h b/drivers/acpi/acpica/actables.h
index 848ad3a..cd5a135 100644
--- a/drivers/acpi/acpica/actables.h
+++ b/drivers/acpi/acpica/actables.h
@@ -161,8 +161,6 @@ acpi_tb_install_fixed_table(acpi_physical_address address,
 
 acpi_status acpi_tb_parse_root_table(acpi_physical_address rsdp_address);
 
-u8 acpi_is_valid_signature(char *signature);
-
 /*
  * tbxfload
  */
diff --git a/drivers/acpi/acpica/acutils.h b/drivers/acpi/acpica/acutils.h
index 107f9e0..a7dbb2b 100644
--- a/drivers/acpi/acpica/acutils.h
+++ b/drivers/acpi/acpica/acutils.h
@@ -167,6 +167,15 @@ struct acpi_pkg_info {
 #define DB_QWORD_DISPLAY8
 
 /*
+ * utascii - ASCII utilities
+ */
+u8 acpi_ut_valid_nameseg(char *signature);
+
+u8 acpi_ut_valid_name_char(char character, u32 position);
+
+void acpi_ut_check_and_repair_ascii(u8 *name, char *repaired_name, u32 count);
+
+/*
  * utnonansi - Non-ANSI C library functions
  */
 void acpi_ut_strupr(char *src_string);
@@ -579,10 +588,6 @@ void acpi_ut_print_string(char *string, u16 max_length);
 void ut_convert_backslashes(char *pathname);
 #endif
 
-u8 acpi_ut_valid_acpi_name(char *name);
-
-u8 acpi_ut_valid_acpi_char(char character, u32 position);
-
 void acpi_ut_repair_name(char *name);
 
 #if defined (ACPI_DEBUGGER) || defined (ACPI_APPLICATION)
diff --git a/drivers/acpi/acpica/dbnames.c b/drivers/acpi/acpica/dbnames.c
index 4c9e59a..8667f14 100644
--- a/drivers/acpi/acpica/dbnames.c
+++ b/drivers/acpi/acpica/dbnames.c
@@ -709,7 +709,7 @@ acpi_db_integrity_walk(acpi_handle obj_handle,
return (AE_OK);
}
 
-   if (!acpi_ut_valid_acpi_name(node->name.ascii)) {
+   if (!acpi_ut_valid_nameseg(node->name.ascii)) {
acpi_os_printf("Invalid AcpiName for Node %p\n", node);
return (AE_OK);
}
diff --git a/drivers/acpi/acpica/exnames.c b/drivers/acpi/acpica/exnames.c
index 27c11ab..3d6af93 100644
--- a/drivers/acpi/acpica/exnames.c
+++ b/drivers/acpi/acpica/exnames.c
@@ -178,7 +178,7 @@ static acpi_status acpi_ex_name_segment(u8 ** 
in_aml_address, char *name_string)
 
for (index = 0;
 (index < ACPI_NAME_SIZE)
-&& (acpi_ut_valid_acpi_char(*aml_address, 0)); index++) {
+&& (acpi_ut_valid_name_char(*aml_address, 0)); index++) {
char_buf[index] = *aml_address++;
ACPI_DEBUG_PRINT((ACPI_DB_LOAD, "%c\n", char_buf[index]));
}
diff --git a/drivers/acpi/acpica/tbdata.c b/drivers/acpi/acpica/tbdata.c
index d471df3..1388a19 100644
--- a/drivers/acpi/acpica/tbdata.c
+++ b/drivers/acpi/acpica/tbdata.c
@@ -401,9 +401,9 @@ acpi_tb_verify_temp_table(struct acpi_table_desc 
*table_desc, char *signature)
ACPI_EXCEPTION((AE_INFO, AE_NO_MEMORY,
"%4.4s 0x%8.8X%8.8X"
" Attempted table install failed",
-   acpi_ut_valid_acpi_name(table_desc->
-   signature.
-   ascii) ?
+   acpi_ut_valid_nameseg(table_desc->
+ signature.
+ ascii) ?
table_desc->signature.ascii : "",
ACPI_FORMAT_UINT64(table_desc->
 

[PATCH v2 03/13] ACPICA: ACPI 6.1: Support for new PCCT subtable

[Lv Zheng]

From: Bob Moore 

ACPICA commit de3ea7c322b9b6bdb09aa90c2e1d420cd4dce47c

Additional subspace structure was added.

Link: https://github.com/acpica/acpica/commit/de3ea7c3
Signed-off-by: Bob Moore 
Signed-off-by: Lv Zheng 
---
 include/acpi/actbl3.h |   23 ++-
 1 file changed, 22 insertions(+), 1 deletion(-)

diff --git a/include/acpi/actbl3.h b/include/acpi/actbl3.h
index f12f4bb..ebc1f4f 100644
--- a/include/acpi/actbl3.h
+++ b/include/acpi/actbl3.h
@@ -481,7 +481,8 @@ struct acpi_table_pcct {
 enum acpi_pcct_type {
ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
-   ACPI_PCCT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
+   ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2,   /* ACPI 6.1 */
+   ACPI_PCCT_TYPE_RESERVED = 3 /* 3 and greater are reserved */
 };
 
 /*
@@ -520,6 +521,26 @@ struct acpi_pcct_hw_reduced {
u16 min_turnaround_time;
 };
 
+/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
+
+struct acpi_pcct_hw_reduced_type2 {
+   struct acpi_subtable_header header;
+   u32 doorbell_interrupt;
+   u8 flags;
+   u8 reserved;
+   u64 base_address;
+   u64 length;
+   struct acpi_generic_address doorbell_register;
+   u64 preserve_mask;
+   u64 write_mask;
+   u32 latency;
+   u32 max_access_rate;
+   u16 min_turnaround_time;
+   struct acpi_generic_address doorbell_ack_register;
+   u64 ack_preserve_mask;
+   u64 ack_write_mask;
+};
+
 /* Values for doorbell flags above */
 
 #define ACPI_PCCT_INTERRUPT_POLARITY(1)
-- 
1.7.10

[PATCH v2 11/13] ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support for acpi_hw_write()

[Lv Zheng]

ACPICA commit 48eea5e7993ccb7189bd63cd726e02adafee6057

This patch adds access_width/bit_offset support in acpi_hw_write().
Lv Zheng.

Link: https://github.com/acpica/acpica/commit/48eea5e7
Link: https://bugs.acpica.org/show_bug.cgi?id=1240
Signed-off-by: Lv Zheng 
Signed-off-by: Bob Moore 
---
 drivers/acpi/acpica/hwregs.c |  146 +++---
 1 file changed, 137 insertions(+), 9 deletions(-)

diff --git a/drivers/acpi/acpica/hwregs.c b/drivers/acpi/acpica/hwregs.c
index 6eee012..0f18dbc 100644
--- a/drivers/acpi/acpica/hwregs.c
+++ b/drivers/acpi/acpica/hwregs.c
@@ -311,6 +311,12 @@ acpi_status acpi_hw_read(u32 *value, struct 
acpi_generic_address *reg)
 acpi_status acpi_hw_write(u32 value, struct acpi_generic_address *reg)
 {
u64 address;
+   u8 access_width;
+   u32 bit_width;
+   u8 bit_offset;
+   u64 value64;
+   u32 new_value32, old_value32;
+   u8 index;
acpi_status status;
 
ACPI_FUNCTION_NAME(hw_write);
@@ -322,23 +328,145 @@ acpi_status acpi_hw_write(u32 value, struct 
acpi_generic_address *reg)
return (status);
}
 
+   /* Convert access_width into number of bits based */
+
+   access_width = acpi_hw_get_access_bit_width(reg, 32);
+   bit_width = reg->bit_offset + reg->bit_width;
+   bit_offset = reg->bit_offset;
+
/*
 * Two address spaces supported: Memory or IO. PCI_Config is
 * not supported here because the GAS structure is insufficient
 */
-   if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
-   status = acpi_os_write_memory((acpi_physical_address)
- address, (u64)value,
- reg->bit_width);
-   } else {/* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier 
*/
-
-   status = acpi_hw_write_port((acpi_io_address)
-   address, value, reg->bit_width);
+   index = 0;
+   while (bit_width) {
+   /*
+* Use offset style bit reads because "Index * AccessWidth" is
+* ensured to be less than 32-bits by 
acpi_hw_validate_register().
+*/
+   new_value32 = ACPI_GET_BITS(, index * access_width,
+   ACPI_MASK_BITS_ABOVE_32
+   (access_width));
+
+   if (bit_offset >= access_width) {
+   bit_offset -= access_width;
+   } else {
+   /*
+* Use offset style bit masks because access_width is 
ensured
+* to be less than 32-bits by 
acpi_hw_validate_register() and
+* bit_offset/bit_width is less than access_width here.
+*/
+   if (bit_offset) {
+   new_value32 &= ACPI_MASK_BITS_BELOW(bit_offset);
+   }
+   if (bit_width < access_width) {
+   new_value32 &= ACPI_MASK_BITS_ABOVE(bit_width);
+   }
+
+   if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
+   if (bit_offset || bit_width < access_width) {
+   /*
+* Read old values in order not to 
modify the bits that
+* are beyond the register 
bit_width/bit_offset setting.
+*/
+   status =
+   
acpi_os_read_memory((acpi_physical_address)
+   address +
+   index *
+   ACPI_DIV_8
+   (access_width),
+   ,
+   access_width);
+   old_value32 = (u32)value64;
+
+   /*
+* Use offset style bit masks because 
access_width is
+* ensured to be less than 32-bits by
+* acpi_hw_validate_register() and 
bit_offset/bit_width is
+* less than access_width here.
+*/
+   if (bit_offset) {
+   old_value32 &=
+   ACPI_MASK_BITS_ABOVE
+  

[PATCH v2 03/13] ACPICA: ACPI 6.1: Support for new PCCT subtable

[Lv Zheng]

From: Bob Moore 

ACPICA commit de3ea7c322b9b6bdb09aa90c2e1d420cd4dce47c

Additional subspace structure was added.

Link: https://github.com/acpica/acpica/commit/de3ea7c3
Signed-off-by: Bob Moore 
Signed-off-by: Lv Zheng 
---
 include/acpi/actbl3.h |   23 ++-
 1 file changed, 22 insertions(+), 1 deletion(-)

diff --git a/include/acpi/actbl3.h b/include/acpi/actbl3.h
index f12f4bb..ebc1f4f 100644
--- a/include/acpi/actbl3.h
+++ b/include/acpi/actbl3.h
@@ -481,7 +481,8 @@ struct acpi_table_pcct {
 enum acpi_pcct_type {
ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
-   ACPI_PCCT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
+   ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2,   /* ACPI 6.1 */
+   ACPI_PCCT_TYPE_RESERVED = 3 /* 3 and greater are reserved */
 };
 
 /*
@@ -520,6 +521,26 @@ struct acpi_pcct_hw_reduced {
u16 min_turnaround_time;
 };
 
+/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
+
+struct acpi_pcct_hw_reduced_type2 {
+   struct acpi_subtable_header header;
+   u32 doorbell_interrupt;
+   u8 flags;
+   u8 reserved;
+   u64 base_address;
+   u64 length;
+   struct acpi_generic_address doorbell_register;
+   u64 preserve_mask;
+   u64 write_mask;
+   u32 latency;
+   u32 max_access_rate;
+   u16 min_turnaround_time;
+   struct acpi_generic_address doorbell_ack_register;
+   u64 ack_preserve_mask;
+   u64 ack_write_mask;
+};
+
 /* Values for doorbell flags above */
 
 #define ACPI_PCCT_INTERRUPT_POLARITY(1)
-- 
1.7.10

[PATCH v2 11/13] ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support for acpi_hw_write()

[Lv Zheng]

ACPICA commit 48eea5e7993ccb7189bd63cd726e02adafee6057

This patch adds access_width/bit_offset support in acpi_hw_write().
Lv Zheng.

Link: https://github.com/acpica/acpica/commit/48eea5e7
Link: https://bugs.acpica.org/show_bug.cgi?id=1240
Signed-off-by: Lv Zheng 
Signed-off-by: Bob Moore 
---
 drivers/acpi/acpica/hwregs.c |  146 +++---
 1 file changed, 137 insertions(+), 9 deletions(-)

diff --git a/drivers/acpi/acpica/hwregs.c b/drivers/acpi/acpica/hwregs.c
index 6eee012..0f18dbc 100644
--- a/drivers/acpi/acpica/hwregs.c
+++ b/drivers/acpi/acpica/hwregs.c
@@ -311,6 +311,12 @@ acpi_status acpi_hw_read(u32 *value, struct 
acpi_generic_address *reg)
 acpi_status acpi_hw_write(u32 value, struct acpi_generic_address *reg)
 {
u64 address;
+   u8 access_width;
+   u32 bit_width;
+   u8 bit_offset;
+   u64 value64;
+   u32 new_value32, old_value32;
+   u8 index;
acpi_status status;
 
ACPI_FUNCTION_NAME(hw_write);
@@ -322,23 +328,145 @@ acpi_status acpi_hw_write(u32 value, struct 
acpi_generic_address *reg)
return (status);
}
 
+   /* Convert access_width into number of bits based */
+
+   access_width = acpi_hw_get_access_bit_width(reg, 32);
+   bit_width = reg->bit_offset + reg->bit_width;
+   bit_offset = reg->bit_offset;
+
/*
 * Two address spaces supported: Memory or IO. PCI_Config is
 * not supported here because the GAS structure is insufficient
 */
-   if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
-   status = acpi_os_write_memory((acpi_physical_address)
- address, (u64)value,
- reg->bit_width);
-   } else {/* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier 
*/
-
-   status = acpi_hw_write_port((acpi_io_address)
-   address, value, reg->bit_width);
+   index = 0;
+   while (bit_width) {
+   /*
+* Use offset style bit reads because "Index * AccessWidth" is
+* ensured to be less than 32-bits by 
acpi_hw_validate_register().
+*/
+   new_value32 = ACPI_GET_BITS(, index * access_width,
+   ACPI_MASK_BITS_ABOVE_32
+   (access_width));
+
+   if (bit_offset >= access_width) {
+   bit_offset -= access_width;
+   } else {
+   /*
+* Use offset style bit masks because access_width is 
ensured
+* to be less than 32-bits by 
acpi_hw_validate_register() and
+* bit_offset/bit_width is less than access_width here.
+*/
+   if (bit_offset) {
+   new_value32 &= ACPI_MASK_BITS_BELOW(bit_offset);
+   }
+   if (bit_width < access_width) {
+   new_value32 &= ACPI_MASK_BITS_ABOVE(bit_width);
+   }
+
+   if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
+   if (bit_offset || bit_width < access_width) {
+   /*
+* Read old values in order not to 
modify the bits that
+* are beyond the register 
bit_width/bit_offset setting.
+*/
+   status =
+   
acpi_os_read_memory((acpi_physical_address)
+   address +
+   index *
+   ACPI_DIV_8
+   (access_width),
+   ,
+   access_width);
+   old_value32 = (u32)value64;
+
+   /*
+* Use offset style bit masks because 
access_width is
+* ensured to be less than 32-bits by
+* acpi_hw_validate_register() and 
bit_offset/bit_width is
+* less than access_width here.
+*/
+   if (bit_offset) {
+   old_value32 &=
+   ACPI_MASK_BITS_ABOVE
+   (bit_offset);
+

[PATCH v2 05/13] ACPICA: ACPI 6.0, tools/iasl: Add support for new resource descriptors

[Lv Zheng]

From: Bob Moore 

ACPICA commit 5a0555ece4ba9917e5842b21d88469ae06b4e815

Adds full support for:
i2c_serial_bus_v2
spi_serial_bus_v2
uart_serial_bus_v2

Compiler, Disassembler, Resource Manager, acpi_help.

Link: https://github.com/acpica/acpica/commit/5a0555ec
Signed-off-by: Bob Moore 
Signed-off-by: Lv Zheng 
---
 drivers/acpi/acpica/rsdumpinfo.c |9 +
 drivers/acpi/acpica/rsserial.c   |   21 ++---
 include/acpi/acrestyp.h  |1 +
 3 files changed, 24 insertions(+), 7 deletions(-)

diff --git a/drivers/acpi/acpica/rsdumpinfo.c b/drivers/acpi/acpica/rsdumpinfo.c
index 5c34913..61e8f16 100644
--- a/drivers/acpi/acpica/rsdumpinfo.c
+++ b/drivers/acpi/acpica/rsdumpinfo.c
@@ -330,19 +330,20 @@ struct acpi_rsdump_info acpi_rs_dump_fixed_dma[4] = {
{ACPI_RSD_UINT8,ACPI_RSD_OFFSET (common_serial_bus.type),   
"Type", acpi_gbl_sbt_decode}, \
{ACPI_RSD_1BITFLAG, ACPI_RSD_OFFSET 
(common_serial_bus.producer_consumer), "ProducerConsumer",  
acpi_gbl_consume_decode}, \
{ACPI_RSD_1BITFLAG, ACPI_RSD_OFFSET (common_serial_bus.slave_mode), 
"SlaveMode",acpi_gbl_sm_decode}, \
+   {ACPI_RSD_1BITFLAG, ACPI_RSD_OFFSET 
(common_serial_bus.connection_sharing),"ConnectionSharing", 
acpi_gbl_shr_decode}, \
{ACPI_RSD_UINT8,ACPI_RSD_OFFSET 
(common_serial_bus.type_revision_id), "TypeRevisionId", NULL}, \
{ACPI_RSD_UINT16,   ACPI_RSD_OFFSET 
(common_serial_bus.type_data_length), "TypeDataLength", NULL}, \
{ACPI_RSD_SOURCE,   ACPI_RSD_OFFSET 
(common_serial_bus.resource_source), "ResourceSource",  NULL}, \
{ACPI_RSD_UINT16,   ACPI_RSD_OFFSET (common_serial_bus.vendor_length),  
"VendorLength", NULL}, \
{ACPI_RSD_SHORTLISTX,ACPI_RSD_OFFSET (common_serial_bus.vendor_data),   
"VendorData",   NULL},
 
-struct acpi_rsdump_info acpi_rs_dump_common_serial_bus[10] = {
+struct acpi_rsdump_info acpi_rs_dump_common_serial_bus[11] = {
{ACPI_RSD_TITLE, ACPI_RSD_TABLE_SIZE(acpi_rs_dump_common_serial_bus),
 "Common Serial Bus", NULL},
ACPI_RS_DUMP_COMMON_SERIAL_BUS
 };
 
-struct acpi_rsdump_info acpi_rs_dump_i2c_serial_bus[13] = {
+struct acpi_rsdump_info acpi_rs_dump_i2c_serial_bus[14] = {
{ACPI_RSD_TITLE, ACPI_RSD_TABLE_SIZE(acpi_rs_dump_i2c_serial_bus),
 "I2C Serial Bus", NULL},
ACPI_RS_DUMP_COMMON_SERIAL_BUS {ACPI_RSD_1BITFLAG,
@@ -355,7 +356,7 @@ struct acpi_rsdump_info acpi_rs_dump_i2c_serial_bus[13] = {
 "SlaveAddress", NULL},
 };
 
-struct acpi_rsdump_info acpi_rs_dump_spi_serial_bus[17] = {
+struct acpi_rsdump_info acpi_rs_dump_spi_serial_bus[18] = {
{ACPI_RSD_TITLE, ACPI_RSD_TABLE_SIZE(acpi_rs_dump_spi_serial_bus),
 "Spi Serial Bus", NULL},
ACPI_RS_DUMP_COMMON_SERIAL_BUS {ACPI_RSD_1BITFLAG,
@@ -376,7 +377,7 @@ struct acpi_rsdump_info acpi_rs_dump_spi_serial_bus[17] = {
 "ConnectionSpeed", NULL},
 };
 
-struct acpi_rsdump_info acpi_rs_dump_uart_serial_bus[19] = {
+struct acpi_rsdump_info acpi_rs_dump_uart_serial_bus[20] = {
{ACPI_RSD_TITLE, ACPI_RSD_TABLE_SIZE(acpi_rs_dump_uart_serial_bus),
 "Uart Serial Bus", NULL},
ACPI_RS_DUMP_COMMON_SERIAL_BUS {ACPI_RSD_2BITFLAG,
diff --git a/drivers/acpi/acpica/rsserial.c b/drivers/acpi/acpica/rsserial.c
index 8a01296..b82c061 100644
--- a/drivers/acpi/acpica/rsserial.c
+++ b/drivers/acpi/acpica/rsserial.c
@@ -151,7 +151,7 @@ struct acpi_rsconvert_info acpi_rs_convert_gpio[18] = {
  *
  
**/
 
-struct acpi_rsconvert_info acpi_rs_convert_i2c_serial_bus[16] = {
+struct acpi_rsconvert_info acpi_rs_convert_i2c_serial_bus[17] = {
{ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_SERIAL_BUS,
 ACPI_RS_SIZE(struct acpi_resource_i2c_serialbus),
 ACPI_RSC_TABLE_SIZE(acpi_rs_convert_i2c_serial_bus)},
@@ -177,6 +177,11 @@ struct acpi_rsconvert_info 
acpi_rs_convert_i2c_serial_bus[16] = {
 AML_OFFSET(common_serial_bus.flags),
 1},
 
+   {ACPI_RSC_1BITFLAG,
+ACPI_RS_OFFSET(data.common_serial_bus.connection_sharing),
+AML_OFFSET(common_serial_bus.flags),
+2},
+
{ACPI_RSC_MOVE8,
 ACPI_RS_OFFSET(data.common_serial_bus.type_revision_id),
 AML_OFFSET(common_serial_bus.type_revision_id),
@@ -237,7 +242,7 @@ struct acpi_rsconvert_info 
acpi_rs_convert_i2c_serial_bus[16] = {
  *
  
**/
 
-struct acpi_rsconvert_info acpi_rs_convert_spi_serial_bus[20] = {
+struct acpi_rsconvert_info acpi_rs_convert_spi_serial_bus[21] = {
{ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_SERIAL_BUS,
 ACPI_RS_SIZE(struct acpi_resource_spi_serialbus),
 ACPI_RSC_TABLE_SIZE(acpi_rs_convert_spi_serial_bus)},
@@ 

[PATCH v2 10/13] ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support in acpi_hw_read()

[Lv Zheng]

ACPICA commit 96ece052d4d073aae4f935f0ff0746646aea1174
ACPICA commit 3d8583a054e410f2ea4d73b48986facad9cfc0d4

This patch adds access_width/bit_offset support in acpi_hw_read().
This also enables GAS definition where bit_width is not a power of
two. Lv Zheng.

Link: https://github.com/acpica/acpica/commit/96ece052
Link: https://github.com/acpica/acpica/commit/3d8583a0
Link: https://bugs.acpica.org/show_bug.cgi?id=1240
Signed-off-by: Lv Zheng 
Signed-off-by: Bob Moore 
---
 drivers/acpi/acpica/hwregs.c |   75 ++
 1 file changed, 62 insertions(+), 13 deletions(-)

diff --git a/drivers/acpi/acpica/hwregs.c b/drivers/acpi/acpica/hwregs.c
index 892e677..6eee012 100644
--- a/drivers/acpi/acpica/hwregs.c
+++ b/drivers/acpi/acpica/hwregs.c
@@ -195,17 +195,19 @@ acpi_hw_validate_register(struct acpi_generic_address 
*reg,
  *  64-bit values is not needed.
  *
  * LIMITATIONS: 
- *  bit_width must be exactly 8, 16, or 32.
  *  space_ID must be system_memory or system_IO.
- *  bit_offset and access_width are currently ignored, as there has
- *  not been a need to implement these.
  *
  
**/
 
 acpi_status acpi_hw_read(u32 *value, struct acpi_generic_address *reg)
 {
u64 address;
+   u8 access_width;
+   u32 bit_width;
+   u8 bit_offset;
u64 value64;
+   u32 value32;
+   u8 index;
acpi_status status;
 
ACPI_FUNCTION_NAME(hw_read);
@@ -217,28 +219,75 @@ acpi_status acpi_hw_read(u32 *value, struct 
acpi_generic_address *reg)
return (status);
}
 
-   /* Initialize entire 32-bit return value to zero */
-
+   /*
+* Initialize entire 32-bit return value to zero, convert access_width
+* into number of bits based
+*/
*value = 0;
+   access_width = acpi_hw_get_access_bit_width(reg, 32);
+   bit_width = reg->bit_offset + reg->bit_width;
+   bit_offset = reg->bit_offset;
 
/*
 * Two address spaces supported: Memory or IO. PCI_Config is
 * not supported here because the GAS structure is insufficient
 */
-   if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
-   status = acpi_os_read_memory((acpi_physical_address)
-address, , reg->bit_width);
+   index = 0;
+   while (bit_width) {
+   if (bit_offset >= access_width) {
+   value32 = 0;
+   bit_offset -= access_width;
+   } else {
+   if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
+   status =
+   acpi_os_read_memory((acpi_physical_address)
+   address +
+   index *
+   ACPI_DIV_8
+   (access_width),
+   , access_width);
+   value32 = (u32)value64;
+   } else {/* ACPI_ADR_SPACE_SYSTEM_IO, validated 
earlier */
+
+   status = acpi_hw_read_port((acpi_io_address)
+  address +
+  index *
+  ACPI_DIV_8
+  (access_width),
+  ,
+  access_width);
+   }
 
-   *value = (u32)value64;
-   } else {/* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier 
*/
+   /*
+* Use offset style bit masks because:
+* bit_offset < access_width/bit_width < access_width, 
and
+* access_width is ensured to be less than 32-bits by
+* acpi_hw_validate_register().
+*/
+   if (bit_offset) {
+   value32 &= ACPI_MASK_BITS_BELOW(bit_offset);
+   bit_offset = 0;
+   }
+   if (bit_width < access_width) {
+   value32 &= ACPI_MASK_BITS_ABOVE(bit_width);
+   }
+   }
+
+   /*
+* Use offset style bit writes because "Index * AccessWidth" is
+* ensured to be less than 32-bits by 
acpi_hw_validate_register().
+*/
+   ACPI_SET_BITS(value, index * access_width,
+  

[PATCH v2 04/13] ACPICA: ACPI 6.0: Update _BIX support for new package element

[Lv Zheng]

From: Bob Moore 

ACPICA commit 3451e6d49d37919c13ec2c0019a31534b0dfc0c0

One integer was added at the end of the _BIX method, and the
version number was incremented.

Link: https://github.com/acpica/acpica/commit/3451e6d4
Signed-off-by: Bob Moore 
Signed-off-by: Lv Zheng 
---
 drivers/acpi/acpica/acpredef.h |5 ++-
 drivers/acpi/acpica/nsprepkg.c |   86 
 2 files changed, 89 insertions(+), 2 deletions(-)

diff --git a/drivers/acpi/acpica/acpredef.h b/drivers/acpi/acpica/acpredef.h
index 4ca426b..888440b 100644
--- a/drivers/acpi/acpica/acpredef.h
+++ b/drivers/acpi/acpica/acpredef.h
@@ -129,7 +129,8 @@ enum acpi_return_package_types {
ACPI_PTYPE2_REV_FIXED = 9,
ACPI_PTYPE2_FIX_VAR = 10,
ACPI_PTYPE2_VAR_VAR = 11,
-   ACPI_PTYPE2_UUID_PAIR = 12
+   ACPI_PTYPE2_UUID_PAIR = 12,
+   ACPI_PTYPE_CUSTOM = 13
 };
 
 /* Support macros for users of the predefined info table */
@@ -340,7 +341,7 @@ const union acpi_predefined_info 
acpi_gbl_predefined_methods[] = {
 
{{"_BIX", METHOD_0ARGS,
  METHOD_RETURNS(ACPI_RTYPE_PACKAGE)}}, /* Fixed-length (16 Int),(4 
Str) */
-   PACKAGE_INFO(ACPI_PTYPE1_FIXED, ACPI_RTYPE_INTEGER, 16,
+   PACKAGE_INFO(ACPI_PTYPE_CUSTOM, ACPI_RTYPE_INTEGER, 16,
 ACPI_RTYPE_STRING, 4, 0),
 
{{"_BLT",
diff --git a/drivers/acpi/acpica/nsprepkg.c b/drivers/acpi/acpica/nsprepkg.c
index fde5a09..fbedc6e 100644
--- a/drivers/acpi/acpica/nsprepkg.c
+++ b/drivers/acpi/acpica/nsprepkg.c
@@ -62,6 +62,10 @@ acpi_ns_check_package_elements(struct acpi_evaluate_info 
*info,
   u32 count1,
   u8 type2, u32 count2, u32 start_index);
 
+static acpi_status
+acpi_ns_custom_package(struct acpi_evaluate_info *info,
+  union acpi_operand_object **elements, u32 count);
+
 
/***
  *
  * FUNCTION:acpi_ns_check_package
@@ -135,6 +139,11 @@ acpi_ns_check_package(struct acpi_evaluate_info *info,
 * PTYPE2 packages contain subpackages
 */
switch (package->ret_info.type) {
+   case ACPI_PTYPE_CUSTOM:
+
+   status = acpi_ns_custom_package(info, elements, count);
+   break;
+
case ACPI_PTYPE1_FIXED:
/*
 * The package count is fixed and there are no subpackages
@@ -626,6 +635,83 @@ package_too_small:
 
 
/***
  *
+ * FUNCTION:acpi_ns_custom_package
+ *
+ * PARAMETERS:  info- Method execution information block
+ *  elements- Pointer to the package elements array
+ *  count   - Element count for the package
+ *
+ * RETURN:  Status
+ *
+ * DESCRIPTION: Check a returned package object for the correct count and
+ *  correct type of all sub-objects.
+ *
+ * NOTE: Currently used for the _BIX method only. When needed for two or more
+ * methods, probably a detect/dispatch mechanism will be required.
+ *
+ 
**/
+
+static acpi_status
+acpi_ns_custom_package(struct acpi_evaluate_info *info,
+  union acpi_operand_object **elements, u32 count)
+{
+   u32 expected_count;
+   u32 version;
+   acpi_status status = AE_OK;
+
+   ACPI_FUNCTION_NAME(ns_custom_package);
+
+   /* Get version number, must be Integer */
+
+   if ((*elements)->common.type != ACPI_TYPE_INTEGER) {
+   ACPI_WARN_PREDEFINED((AE_INFO, info->full_pathname,
+ info->node_flags,
+ "Return Package has invalid object type 
for version number"));
+   return_ACPI_STATUS(AE_AML_OPERAND_TYPE);
+   }
+
+   version = (u32)(*elements)->integer.value;
+   expected_count = 21;/* Version 1 */
+
+   if (version == 0) {
+   expected_count = 20;/* Version 0 */
+   }
+
+   if (count < expected_count) {
+   ACPI_WARN_PREDEFINED((AE_INFO, info->full_pathname,
+ info->node_flags,
+ "Return Package is too small - found %u 
elements, expected %u",
+ count, expected_count));
+   return_ACPI_STATUS(AE_AML_OPERAND_VALUE);
+   } else if (count > expected_count) {
+   ACPI_DEBUG_PRINT((ACPI_DB_REPAIR,
+ "%s: Return Package is larger than needed - "
+ "found %u, expected %u\n",
+ info->full_pathname, count, expected_count));
+   }
+
+   /* Validate all elements of the returned package */
+
+   status = 

[PATCH v2 08/13] ACPICA: Hardware: Add optimized access bit width support

[Lv Zheng]

ACPICA commit c49a751b4dae7baec1790748a2b4b6e8ab599f51

For Access Size = 0, it actually can use user expected access bit width.
This patch implements this.

Besides of the ACPICA upstream commit, this patch also includes a fix fixing
the issue reported by the FreeBSD community.
The old register descriptors are translated in acpi_tb_init_generic_address()
with access_width being filled with 0. This breaks code in
acpi_hw_get_access_bit_width() when the registers are 16-bit IO ports and their
bit_width fields are filled with 16. The rapid fix is meant to make code
written for acpi_hw_get_access_bit_width() regression safer before the issue is
correctly fixed from acpi_tb_init_generic_address(). Reported by
John Baldwin , fixed by Lv Zheng , tested
by Jung-uk Kim .

Link: https://github.com/acpica/acpica/commit/c49a751b
Reported-by: John Baldwin 
Tested-by Jung-uk Kim .
Signed-off-by: Lv Zheng 
Signed-off-by: Bob Moore 
---
 drivers/acpi/acpica/hwregs.c |   49 --
 1 file changed, 47 insertions(+), 2 deletions(-)

diff --git a/drivers/acpi/acpica/hwregs.c b/drivers/acpi/acpica/hwregs.c
index 035fb52..892e677 100644
--- a/drivers/acpi/acpica/hwregs.c
+++ b/drivers/acpi/acpica/hwregs.c
@@ -51,6 +51,10 @@ ACPI_MODULE_NAME("hwregs")
 
 #if (!ACPI_REDUCED_HARDWARE)
 /* Local Prototypes */
+static u8
+acpi_hw_get_access_bit_width(struct acpi_generic_address *reg,
+u8 max_bit_width);
+
 static acpi_status
 acpi_hw_read_multiple(u32 *value,
  struct acpi_generic_address *register_a,
@@ -65,6 +69,48 @@ acpi_hw_write_multiple(u32 value,
 
 /**
  *
+ * FUNCTION:acpi_hw_get_access_bit_width
+ *
+ * PARAMETERS:  reg - GAS register structure
+ *  max_bit_width   - Max bit_width supported (32 or 64)
+ *
+ * RETURN:  Status
+ *
+ * DESCRIPTION: Obtain optimal access bit width
+ *
+ 
**/
+
+static u8
+acpi_hw_get_access_bit_width(struct acpi_generic_address *reg, u8 
max_bit_width)
+{
+   u64 address;
+
+   if (!reg->access_width) {
+   /*
+* Detect old register descriptors where only the bit_width 
field
+* makes senses. The target address is copied to handle possible
+* alignment issues.
+*/
+   ACPI_MOVE_64_TO_64(, >address);
+   if (!reg->bit_offset && reg->bit_width &&
+   ACPI_IS_POWER_OF_TWO(reg->bit_width) &&
+   ACPI_IS_ALIGNED(reg->bit_width, 8) &&
+   ACPI_IS_ALIGNED(address, reg->bit_width)) {
+   return (reg->bit_width);
+   } else {
+   if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) {
+   return (32);
+   } else {
+   return (max_bit_width);
+   }
+   }
+   } else {
+   return (1 << (reg->access_width + 2));
+   }
+}
+
+/**
+ *
  * FUNCTION:acpi_hw_validate_register
  *
  * PARAMETERS:  reg - GAS register structure
@@ -122,8 +168,7 @@ acpi_hw_validate_register(struct acpi_generic_address *reg,
 
/* Validate the bit_width, convert access_width into number of bits */
 
-   access_width = reg->access_width ? reg->access_width : 1;
-   access_width = 1 << (access_width + 2);
+   access_width = acpi_hw_get_access_bit_width(reg, max_bit_width);
bit_width =
ACPI_ROUND_UP(reg->bit_offset + reg->bit_width, access_width);
if (max_bit_width < bit_width) {
-- 
1.7.10

[PATCH v2 05/13] ACPICA: ACPI 6.0, tools/iasl: Add support for new resource descriptors

[Lv Zheng]

From: Bob Moore 

ACPICA commit 5a0555ece4ba9917e5842b21d88469ae06b4e815

Adds full support for:
i2c_serial_bus_v2
spi_serial_bus_v2
uart_serial_bus_v2

Compiler, Disassembler, Resource Manager, acpi_help.

Link: https://github.com/acpica/acpica/commit/5a0555ec
Signed-off-by: Bob Moore 
Signed-off-by: Lv Zheng 
---
 drivers/acpi/acpica/rsdumpinfo.c |9 +
 drivers/acpi/acpica/rsserial.c   |   21 ++---
 include/acpi/acrestyp.h  |1 +
 3 files changed, 24 insertions(+), 7 deletions(-)

diff --git a/drivers/acpi/acpica/rsdumpinfo.c b/drivers/acpi/acpica/rsdumpinfo.c
index 5c34913..61e8f16 100644
--- a/drivers/acpi/acpica/rsdumpinfo.c
+++ b/drivers/acpi/acpica/rsdumpinfo.c
@@ -330,19 +330,20 @@ struct acpi_rsdump_info acpi_rs_dump_fixed_dma[4] = {
{ACPI_RSD_UINT8,ACPI_RSD_OFFSET (common_serial_bus.type),   
"Type", acpi_gbl_sbt_decode}, \
{ACPI_RSD_1BITFLAG, ACPI_RSD_OFFSET 
(common_serial_bus.producer_consumer), "ProducerConsumer",  
acpi_gbl_consume_decode}, \
{ACPI_RSD_1BITFLAG, ACPI_RSD_OFFSET (common_serial_bus.slave_mode), 
"SlaveMode",acpi_gbl_sm_decode}, \
+   {ACPI_RSD_1BITFLAG, ACPI_RSD_OFFSET 
(common_serial_bus.connection_sharing),"ConnectionSharing", 
acpi_gbl_shr_decode}, \
{ACPI_RSD_UINT8,ACPI_RSD_OFFSET 
(common_serial_bus.type_revision_id), "TypeRevisionId", NULL}, \
{ACPI_RSD_UINT16,   ACPI_RSD_OFFSET 
(common_serial_bus.type_data_length), "TypeDataLength", NULL}, \
{ACPI_RSD_SOURCE,   ACPI_RSD_OFFSET 
(common_serial_bus.resource_source), "ResourceSource",  NULL}, \
{ACPI_RSD_UINT16,   ACPI_RSD_OFFSET (common_serial_bus.vendor_length),  
"VendorLength", NULL}, \
{ACPI_RSD_SHORTLISTX,ACPI_RSD_OFFSET (common_serial_bus.vendor_data),   
"VendorData",   NULL},
 
-struct acpi_rsdump_info acpi_rs_dump_common_serial_bus[10] = {
+struct acpi_rsdump_info acpi_rs_dump_common_serial_bus[11] = {
{ACPI_RSD_TITLE, ACPI_RSD_TABLE_SIZE(acpi_rs_dump_common_serial_bus),
 "Common Serial Bus", NULL},
ACPI_RS_DUMP_COMMON_SERIAL_BUS
 };
 
-struct acpi_rsdump_info acpi_rs_dump_i2c_serial_bus[13] = {
+struct acpi_rsdump_info acpi_rs_dump_i2c_serial_bus[14] = {
{ACPI_RSD_TITLE, ACPI_RSD_TABLE_SIZE(acpi_rs_dump_i2c_serial_bus),
 "I2C Serial Bus", NULL},
ACPI_RS_DUMP_COMMON_SERIAL_BUS {ACPI_RSD_1BITFLAG,
@@ -355,7 +356,7 @@ struct acpi_rsdump_info acpi_rs_dump_i2c_serial_bus[13] = {
 "SlaveAddress", NULL},
 };
 
-struct acpi_rsdump_info acpi_rs_dump_spi_serial_bus[17] = {
+struct acpi_rsdump_info acpi_rs_dump_spi_serial_bus[18] = {
{ACPI_RSD_TITLE, ACPI_RSD_TABLE_SIZE(acpi_rs_dump_spi_serial_bus),
 "Spi Serial Bus", NULL},
ACPI_RS_DUMP_COMMON_SERIAL_BUS {ACPI_RSD_1BITFLAG,
@@ -376,7 +377,7 @@ struct acpi_rsdump_info acpi_rs_dump_spi_serial_bus[17] = {
 "ConnectionSpeed", NULL},
 };
 
-struct acpi_rsdump_info acpi_rs_dump_uart_serial_bus[19] = {
+struct acpi_rsdump_info acpi_rs_dump_uart_serial_bus[20] = {
{ACPI_RSD_TITLE, ACPI_RSD_TABLE_SIZE(acpi_rs_dump_uart_serial_bus),
 "Uart Serial Bus", NULL},
ACPI_RS_DUMP_COMMON_SERIAL_BUS {ACPI_RSD_2BITFLAG,
diff --git a/drivers/acpi/acpica/rsserial.c b/drivers/acpi/acpica/rsserial.c
index 8a01296..b82c061 100644
--- a/drivers/acpi/acpica/rsserial.c
+++ b/drivers/acpi/acpica/rsserial.c
@@ -151,7 +151,7 @@ struct acpi_rsconvert_info acpi_rs_convert_gpio[18] = {
  *
  
**/
 
-struct acpi_rsconvert_info acpi_rs_convert_i2c_serial_bus[16] = {
+struct acpi_rsconvert_info acpi_rs_convert_i2c_serial_bus[17] = {
{ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_SERIAL_BUS,
 ACPI_RS_SIZE(struct acpi_resource_i2c_serialbus),
 ACPI_RSC_TABLE_SIZE(acpi_rs_convert_i2c_serial_bus)},
@@ -177,6 +177,11 @@ struct acpi_rsconvert_info 
acpi_rs_convert_i2c_serial_bus[16] = {
 AML_OFFSET(common_serial_bus.flags),
 1},
 
+   {ACPI_RSC_1BITFLAG,
+ACPI_RS_OFFSET(data.common_serial_bus.connection_sharing),
+AML_OFFSET(common_serial_bus.flags),
+2},
+
{ACPI_RSC_MOVE8,
 ACPI_RS_OFFSET(data.common_serial_bus.type_revision_id),
 AML_OFFSET(common_serial_bus.type_revision_id),
@@ -237,7 +242,7 @@ struct acpi_rsconvert_info 
acpi_rs_convert_i2c_serial_bus[16] = {
  *
  
**/
 
-struct acpi_rsconvert_info acpi_rs_convert_spi_serial_bus[20] = {
+struct acpi_rsconvert_info acpi_rs_convert_spi_serial_bus[21] = {
{ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_SERIAL_BUS,
 ACPI_RS_SIZE(struct acpi_resource_spi_serialbus),
 ACPI_RSC_TABLE_SIZE(acpi_rs_convert_spi_serial_bus)},
@@ -263,6 +268,11 @@ struct acpi_rsconvert_info 

[PATCH v2 10/13] ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support in acpi_hw_read()

[Lv Zheng]

ACPICA commit 96ece052d4d073aae4f935f0ff0746646aea1174
ACPICA commit 3d8583a054e410f2ea4d73b48986facad9cfc0d4

This patch adds access_width/bit_offset support in acpi_hw_read().
This also enables GAS definition where bit_width is not a power of
two. Lv Zheng.

Link: https://github.com/acpica/acpica/commit/96ece052
Link: https://github.com/acpica/acpica/commit/3d8583a0
Link: https://bugs.acpica.org/show_bug.cgi?id=1240
Signed-off-by: Lv Zheng 
Signed-off-by: Bob Moore 
---
 drivers/acpi/acpica/hwregs.c |   75 ++
 1 file changed, 62 insertions(+), 13 deletions(-)

diff --git a/drivers/acpi/acpica/hwregs.c b/drivers/acpi/acpica/hwregs.c
index 892e677..6eee012 100644
--- a/drivers/acpi/acpica/hwregs.c
+++ b/drivers/acpi/acpica/hwregs.c
@@ -195,17 +195,19 @@ acpi_hw_validate_register(struct acpi_generic_address 
*reg,
  *  64-bit values is not needed.
  *
  * LIMITATIONS: 
- *  bit_width must be exactly 8, 16, or 32.
  *  space_ID must be system_memory or system_IO.
- *  bit_offset and access_width are currently ignored, as there has
- *  not been a need to implement these.
  *
  
**/
 
 acpi_status acpi_hw_read(u32 *value, struct acpi_generic_address *reg)
 {
u64 address;
+   u8 access_width;
+   u32 bit_width;
+   u8 bit_offset;
u64 value64;
+   u32 value32;
+   u8 index;
acpi_status status;
 
ACPI_FUNCTION_NAME(hw_read);
@@ -217,28 +219,75 @@ acpi_status acpi_hw_read(u32 *value, struct 
acpi_generic_address *reg)
return (status);
}
 
-   /* Initialize entire 32-bit return value to zero */
-
+   /*
+* Initialize entire 32-bit return value to zero, convert access_width
+* into number of bits based
+*/
*value = 0;
+   access_width = acpi_hw_get_access_bit_width(reg, 32);
+   bit_width = reg->bit_offset + reg->bit_width;
+   bit_offset = reg->bit_offset;
 
/*
 * Two address spaces supported: Memory or IO. PCI_Config is
 * not supported here because the GAS structure is insufficient
 */
-   if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
-   status = acpi_os_read_memory((acpi_physical_address)
-address, , reg->bit_width);
+   index = 0;
+   while (bit_width) {
+   if (bit_offset >= access_width) {
+   value32 = 0;
+   bit_offset -= access_width;
+   } else {
+   if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
+   status =
+   acpi_os_read_memory((acpi_physical_address)
+   address +
+   index *
+   ACPI_DIV_8
+   (access_width),
+   , access_width);
+   value32 = (u32)value64;
+   } else {/* ACPI_ADR_SPACE_SYSTEM_IO, validated 
earlier */
+
+   status = acpi_hw_read_port((acpi_io_address)
+  address +
+  index *
+  ACPI_DIV_8
+  (access_width),
+  ,
+  access_width);
+   }
 
-   *value = (u32)value64;
-   } else {/* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier 
*/
+   /*
+* Use offset style bit masks because:
+* bit_offset < access_width/bit_width < access_width, 
and
+* access_width is ensured to be less than 32-bits by
+* acpi_hw_validate_register().
+*/
+   if (bit_offset) {
+   value32 &= ACPI_MASK_BITS_BELOW(bit_offset);
+   bit_offset = 0;
+   }
+   if (bit_width < access_width) {
+   value32 &= ACPI_MASK_BITS_ABOVE(bit_width);
+   }
+   }
+
+   /*
+* Use offset style bit writes because "Index * AccessWidth" is
+* ensured to be less than 32-bits by 
acpi_hw_validate_register().
+*/
+   ACPI_SET_BITS(value, index * access_width,
+ 

[PATCH v2 04/13] ACPICA: ACPI 6.0: Update _BIX support for new package element

[Lv Zheng]

From: Bob Moore 

ACPICA commit 3451e6d49d37919c13ec2c0019a31534b0dfc0c0

One integer was added at the end of the _BIX method, and the
version number was incremented.

Link: https://github.com/acpica/acpica/commit/3451e6d4
Signed-off-by: Bob Moore 
Signed-off-by: Lv Zheng 
---
 drivers/acpi/acpica/acpredef.h |5 ++-
 drivers/acpi/acpica/nsprepkg.c |   86 
 2 files changed, 89 insertions(+), 2 deletions(-)

diff --git a/drivers/acpi/acpica/acpredef.h b/drivers/acpi/acpica/acpredef.h
index 4ca426b..888440b 100644
--- a/drivers/acpi/acpica/acpredef.h
+++ b/drivers/acpi/acpica/acpredef.h
@@ -129,7 +129,8 @@ enum acpi_return_package_types {
ACPI_PTYPE2_REV_FIXED = 9,
ACPI_PTYPE2_FIX_VAR = 10,
ACPI_PTYPE2_VAR_VAR = 11,
-   ACPI_PTYPE2_UUID_PAIR = 12
+   ACPI_PTYPE2_UUID_PAIR = 12,
+   ACPI_PTYPE_CUSTOM = 13
 };
 
 /* Support macros for users of the predefined info table */
@@ -340,7 +341,7 @@ const union acpi_predefined_info 
acpi_gbl_predefined_methods[] = {
 
{{"_BIX", METHOD_0ARGS,
  METHOD_RETURNS(ACPI_RTYPE_PACKAGE)}}, /* Fixed-length (16 Int),(4 
Str) */
-   PACKAGE_INFO(ACPI_PTYPE1_FIXED, ACPI_RTYPE_INTEGER, 16,
+   PACKAGE_INFO(ACPI_PTYPE_CUSTOM, ACPI_RTYPE_INTEGER, 16,
 ACPI_RTYPE_STRING, 4, 0),
 
{{"_BLT",
diff --git a/drivers/acpi/acpica/nsprepkg.c b/drivers/acpi/acpica/nsprepkg.c
index fde5a09..fbedc6e 100644
--- a/drivers/acpi/acpica/nsprepkg.c
+++ b/drivers/acpi/acpica/nsprepkg.c
@@ -62,6 +62,10 @@ acpi_ns_check_package_elements(struct acpi_evaluate_info 
*info,
   u32 count1,
   u8 type2, u32 count2, u32 start_index);
 
+static acpi_status
+acpi_ns_custom_package(struct acpi_evaluate_info *info,
+  union acpi_operand_object **elements, u32 count);
+
 
/***
  *
  * FUNCTION:acpi_ns_check_package
@@ -135,6 +139,11 @@ acpi_ns_check_package(struct acpi_evaluate_info *info,
 * PTYPE2 packages contain subpackages
 */
switch (package->ret_info.type) {
+   case ACPI_PTYPE_CUSTOM:
+
+   status = acpi_ns_custom_package(info, elements, count);
+   break;
+
case ACPI_PTYPE1_FIXED:
/*
 * The package count is fixed and there are no subpackages
@@ -626,6 +635,83 @@ package_too_small:
 
 
/***
  *
+ * FUNCTION:acpi_ns_custom_package
+ *
+ * PARAMETERS:  info- Method execution information block
+ *  elements- Pointer to the package elements array
+ *  count   - Element count for the package
+ *
+ * RETURN:  Status
+ *
+ * DESCRIPTION: Check a returned package object for the correct count and
+ *  correct type of all sub-objects.
+ *
+ * NOTE: Currently used for the _BIX method only. When needed for two or more
+ * methods, probably a detect/dispatch mechanism will be required.
+ *
+ 
**/
+
+static acpi_status
+acpi_ns_custom_package(struct acpi_evaluate_info *info,
+  union acpi_operand_object **elements, u32 count)
+{
+   u32 expected_count;
+   u32 version;
+   acpi_status status = AE_OK;
+
+   ACPI_FUNCTION_NAME(ns_custom_package);
+
+   /* Get version number, must be Integer */
+
+   if ((*elements)->common.type != ACPI_TYPE_INTEGER) {
+   ACPI_WARN_PREDEFINED((AE_INFO, info->full_pathname,
+ info->node_flags,
+ "Return Package has invalid object type 
for version number"));
+   return_ACPI_STATUS(AE_AML_OPERAND_TYPE);
+   }
+
+   version = (u32)(*elements)->integer.value;
+   expected_count = 21;/* Version 1 */
+
+   if (version == 0) {
+   expected_count = 20;/* Version 0 */
+   }
+
+   if (count < expected_count) {
+   ACPI_WARN_PREDEFINED((AE_INFO, info->full_pathname,
+ info->node_flags,
+ "Return Package is too small - found %u 
elements, expected %u",
+ count, expected_count));
+   return_ACPI_STATUS(AE_AML_OPERAND_VALUE);
+   } else if (count > expected_count) {
+   ACPI_DEBUG_PRINT((ACPI_DB_REPAIR,
+ "%s: Return Package is larger than needed - "
+ "found %u, expected %u\n",
+ info->full_pathname, count, expected_count));
+   }
+
+   /* Validate all elements of the returned package */
+
+   status = acpi_ns_check_package_elements(info, elements,
+ 

[PATCH v2 08/13] ACPICA: Hardware: Add optimized access bit width support

[Lv Zheng]

ACPICA commit c49a751b4dae7baec1790748a2b4b6e8ab599f51

For Access Size = 0, it actually can use user expected access bit width.
This patch implements this.

Besides of the ACPICA upstream commit, this patch also includes a fix fixing
the issue reported by the FreeBSD community.
The old register descriptors are translated in acpi_tb_init_generic_address()
with access_width being filled with 0. This breaks code in
acpi_hw_get_access_bit_width() when the registers are 16-bit IO ports and their
bit_width fields are filled with 16. The rapid fix is meant to make code
written for acpi_hw_get_access_bit_width() regression safer before the issue is
correctly fixed from acpi_tb_init_generic_address(). Reported by
John Baldwin , fixed by Lv Zheng , tested
by Jung-uk Kim .

Link: https://github.com/acpica/acpica/commit/c49a751b
Reported-by: John Baldwin 
Tested-by Jung-uk Kim .
Signed-off-by: Lv Zheng 
Signed-off-by: Bob Moore 
---
 drivers/acpi/acpica/hwregs.c |   49 --
 1 file changed, 47 insertions(+), 2 deletions(-)

diff --git a/drivers/acpi/acpica/hwregs.c b/drivers/acpi/acpica/hwregs.c
index 035fb52..892e677 100644
--- a/drivers/acpi/acpica/hwregs.c
+++ b/drivers/acpi/acpica/hwregs.c
@@ -51,6 +51,10 @@ ACPI_MODULE_NAME("hwregs")
 
 #if (!ACPI_REDUCED_HARDWARE)
 /* Local Prototypes */
+static u8
+acpi_hw_get_access_bit_width(struct acpi_generic_address *reg,
+u8 max_bit_width);
+
 static acpi_status
 acpi_hw_read_multiple(u32 *value,
  struct acpi_generic_address *register_a,
@@ -65,6 +69,48 @@ acpi_hw_write_multiple(u32 value,
 
 /**
  *
+ * FUNCTION:acpi_hw_get_access_bit_width
+ *
+ * PARAMETERS:  reg - GAS register structure
+ *  max_bit_width   - Max bit_width supported (32 or 64)
+ *
+ * RETURN:  Status
+ *
+ * DESCRIPTION: Obtain optimal access bit width
+ *
+ 
**/
+
+static u8
+acpi_hw_get_access_bit_width(struct acpi_generic_address *reg, u8 
max_bit_width)
+{
+   u64 address;
+
+   if (!reg->access_width) {
+   /*
+* Detect old register descriptors where only the bit_width 
field
+* makes senses. The target address is copied to handle possible
+* alignment issues.
+*/
+   ACPI_MOVE_64_TO_64(, >address);
+   if (!reg->bit_offset && reg->bit_width &&
+   ACPI_IS_POWER_OF_TWO(reg->bit_width) &&
+   ACPI_IS_ALIGNED(reg->bit_width, 8) &&
+   ACPI_IS_ALIGNED(address, reg->bit_width)) {
+   return (reg->bit_width);
+   } else {
+   if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) {
+   return (32);
+   } else {
+   return (max_bit_width);
+   }
+   }
+   } else {
+   return (1 << (reg->access_width + 2));
+   }
+}
+
+/**
+ *
  * FUNCTION:acpi_hw_validate_register
  *
  * PARAMETERS:  reg - GAS register structure
@@ -122,8 +168,7 @@ acpi_hw_validate_register(struct acpi_generic_address *reg,
 
/* Validate the bit_width, convert access_width into number of bits */
 
-   access_width = reg->access_width ? reg->access_width : 1;
-   access_width = 1 << (access_width + 2);
+   access_width = acpi_hw_get_access_bit_width(reg, max_bit_width);
bit_width =
ACPI_ROUND_UP(reg->bit_offset + reg->bit_width, access_width);
if (max_bit_width < bit_width) {
-- 
1.7.10

[PATCH v2 07/13] ACPICA: Utilities: Add ACPI_IS_ALIGNED() macro

[Lv Zheng]

This patch introduces ACPI_IS_ALIGNED() macro. Lv Zheng.

Signed-off-by: Lv Zheng 
---
 drivers/acpi/acpica/acmacros.h |3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/acpi/acpica/acmacros.h b/drivers/acpi/acpica/acmacros.h
index 73f6653..ecbaaba 100644
--- a/drivers/acpi/acpica/acmacros.h
+++ b/drivers/acpi/acpica/acmacros.h
@@ -262,7 +262,8 @@
 
 /* Generic (power-of-two) rounding */
 
-#define ACPI_IS_POWER_OF_TWO(a) (((a) & ((a) - 1)) == 0)
+#define ACPI_IS_ALIGNED(a, s)   (((a) & ((s) - 1)) == 0)
+#define ACPI_IS_POWER_OF_TWO(a) ACPI_IS_ALIGNED(a, a)
 
 /*
  * Bitmask creation
-- 
1.7.10

[PATCH v2 09/13] ACPICA: Executer: Introduce a set of macros to handle bit width mask generation

[Lv Zheng]

ACPICA commit c23034a3a09d5ed79f1827d51f43cfbccf68ab64

A regression was reported to the shift offset >= width of type.
This patch fixes this issue. BZ 1270.
This is a part of the fix because the order of the patches are modified for
Linux upstream, containing the cleanups for the old code. Lv Zheng.

Link: https://github.com/acpica/acpica/commit/c23034a3
Link: https://bugs.acpica.org/show_bug.cgi?id=1270
Reported-by: Sascha Wildner 
Signed-off-by: Lv Zheng 
Signed-off-by: Bob Moore 
---
 drivers/acpi/acpica/acmacros.h |   12 
 drivers/acpi/acpica/exfldio.c  |   12 ++--
 2 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/drivers/acpi/acpica/acmacros.h b/drivers/acpi/acpica/acmacros.h
index ecbaaba..a3b9543 100644
--- a/drivers/acpi/acpica/acmacros.h
+++ b/drivers/acpi/acpica/acmacros.h
@@ -270,9 +270,21 @@
  * Bit positions start at zero.
  * MASK_BITS_ABOVE creates a mask starting AT the position and above
  * MASK_BITS_BELOW creates a mask starting one bit BELOW the position
+ * MASK_BITS_ABOVE/BELOW accpets a bit offset to create a mask
+ * MASK_BITS_ABOVE/BELOW_32/64 accpets a bit width to create a mask
+ * Note: The ACPI_INTEGER_BIT_SIZE check is used to bypass compiler
+ * differences with the shift operator
  */
 #define ACPI_MASK_BITS_ABOVE(position)  (~((ACPI_UINT64_MAX) << ((u32) 
(position
 #define ACPI_MASK_BITS_BELOW(position)  ((ACPI_UINT64_MAX) << ((u32) 
(position)))
+#define ACPI_MASK_BITS_ABOVE_32(width)  ((u32) ACPI_MASK_BITS_ABOVE(width))
+#define ACPI_MASK_BITS_BELOW_32(width)  ((u32) ACPI_MASK_BITS_BELOW(width))
+#define ACPI_MASK_BITS_ABOVE_64(width)  ((width) == ACPI_INTEGER_BIT_SIZE 
? \
+   
ACPI_UINT64_MAX : \
+   
ACPI_MASK_BITS_ABOVE(width))
+#define ACPI_MASK_BITS_BELOW_64(width)  ((width) == ACPI_INTEGER_BIT_SIZE 
? \
+   
(u64) 0 : \
+   
ACPI_MASK_BITS_BELOW(width))
 
 /* Bitfields within ACPI registers */
 
diff --git a/drivers/acpi/acpica/exfldio.c b/drivers/acpi/acpica/exfldio.c
index 72f9176..ee76d29 100644
--- a/drivers/acpi/acpica/exfldio.c
+++ b/drivers/acpi/acpica/exfldio.c
@@ -897,17 +897,9 @@ acpi_ex_insert_into_field(union acpi_operand_object 
*obj_desc,
 
access_bit_width = ACPI_MUL_8(obj_desc->common_field.access_byte_width);
 
-   /*
-* Create the bitmasks used for bit insertion.
-* Note: This if/else is used to bypass compiler differences with the
-* shift operator
-*/
-   if (access_bit_width == ACPI_INTEGER_BIT_SIZE) {
-   width_mask = ACPI_UINT64_MAX;
-   } else {
-   width_mask = ACPI_MASK_BITS_ABOVE(access_bit_width);
-   }
+   /* Create the bitmasks used for bit insertion */
 
+   width_mask = ACPI_MASK_BITS_ABOVE_64(access_bit_width);
mask = width_mask &
ACPI_MASK_BITS_BELOW(obj_desc->common_field.start_field_bit_offset);
 
-- 
1.7.10

[PATCH v2 06/13] ACPICA: Renamed some #defined flag constants for clarity

[Lv Zheng]

From: Bob Moore 

ACPICA commit 438905b205e64e742f9670a0970419c426264831

Expanded a couple of cryptic names.

Link: https://github.com/acpica/acpica/commit/438905b2
Signed-off-by: Bob Moore 
Signed-off-by: Lv Zheng 
---
 drivers/acpi/acpica/aclocal.h |   30 +++---
 drivers/acpi/acpica/psutils.c |2 +-
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/drivers/acpi/acpica/aclocal.h b/drivers/acpi/acpica/aclocal.h
index 166a67f..13331d7 100644
--- a/drivers/acpi/acpica/aclocal.h
+++ b/drivers/acpi/acpica/aclocal.h
@@ -856,24 +856,24 @@ struct acpi_parse_state {
 
 /* Parse object flags */
 
-#define ACPI_PARSEOP_GENERIC0x01
-#define ACPI_PARSEOP_NAMED  0x02
-#define ACPI_PARSEOP_DEFERRED   0x04
-#define ACPI_PARSEOP_BYTELIST   0x08
-#define ACPI_PARSEOP_IN_STACK   0x10
-#define ACPI_PARSEOP_TARGET 0x20
-#define ACPI_PARSEOP_IN_CACHE   0x80
+#define ACPI_PARSEOP_GENERIC0x01
+#define ACPI_PARSEOP_NAMED_OBJECT   0x02
+#define ACPI_PARSEOP_DEFERRED   0x04
+#define ACPI_PARSEOP_BYTELIST   0x08
+#define ACPI_PARSEOP_IN_STACK   0x10
+#define ACPI_PARSEOP_TARGET 0x20
+#define ACPI_PARSEOP_IN_CACHE   0x80
 
 /* Parse object disasm_flags */
 
-#define ACPI_PARSEOP_IGNORE 0x01
-#define ACPI_PARSEOP_PARAMLIST  0x02
-#define ACPI_PARSEOP_EMPTY_TERMLIST 0x04
-#define ACPI_PARSEOP_PREDEF_CHECKED 0x08
-#define ACPI_PARSEOP_CLOSING_PAREN  0x10
-#define ACPI_PARSEOP_COMPOUND   0x20
-#define ACPI_PARSEOP_ASSIGNMENT 0x40
-#define ACPI_PARSEOP_ELSEIF 0x80
+#define ACPI_PARSEOP_IGNORE 0x01
+#define ACPI_PARSEOP_PARAMETER_LIST 0x02
+#define ACPI_PARSEOP_EMPTY_TERMLIST 0x04
+#define ACPI_PARSEOP_PREDEFINED_CHECKED 0x08
+#define ACPI_PARSEOP_CLOSING_PAREN  0x10
+#define ACPI_PARSEOP_COMPOUND_ASSIGNMENT0x20
+#define ACPI_PARSEOP_ASSIGNMENT 0x40
+#define ACPI_PARSEOP_ELSEIF 0x80
 
 /*
  *
diff --git a/drivers/acpi/acpica/psutils.c b/drivers/acpi/acpica/psutils.c
index b28b0da..89cb4bf 100644
--- a/drivers/acpi/acpica/psutils.c
+++ b/drivers/acpi/acpica/psutils.c
@@ -128,7 +128,7 @@ union acpi_parse_object *acpi_ps_alloc_op(u16 opcode, u8 
*aml)
if (op_info->flags & AML_DEFER) {
flags = ACPI_PARSEOP_DEFERRED;
} else if (op_info->flags & AML_NAMED) {
-   flags = ACPI_PARSEOP_NAMED;
+   flags = ACPI_PARSEOP_NAMED_OBJECT;
} else if (opcode == AML_INT_BYTELIST_OP) {
flags = ACPI_PARSEOP_BYTELIST;
}
-- 
1.7.10

[PATCH v2 07/13] ACPICA: Utilities: Add ACPI_IS_ALIGNED() macro

[Lv Zheng]

This patch introduces ACPI_IS_ALIGNED() macro. Lv Zheng.

Signed-off-by: Lv Zheng 
---
 drivers/acpi/acpica/acmacros.h |3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/acpi/acpica/acmacros.h b/drivers/acpi/acpica/acmacros.h
index 73f6653..ecbaaba 100644
--- a/drivers/acpi/acpica/acmacros.h
+++ b/drivers/acpi/acpica/acmacros.h
@@ -262,7 +262,8 @@
 
 /* Generic (power-of-two) rounding */
 
-#define ACPI_IS_POWER_OF_TWO(a) (((a) & ((a) - 1)) == 0)
+#define ACPI_IS_ALIGNED(a, s)   (((a) & ((s) - 1)) == 0)
+#define ACPI_IS_POWER_OF_TWO(a) ACPI_IS_ALIGNED(a, a)
 
 /*
  * Bitmask creation
-- 
1.7.10

[PATCH v2 09/13] ACPICA: Executer: Introduce a set of macros to handle bit width mask generation

[Lv Zheng]

ACPICA commit c23034a3a09d5ed79f1827d51f43cfbccf68ab64

A regression was reported to the shift offset >= width of type.
This patch fixes this issue. BZ 1270.
This is a part of the fix because the order of the patches are modified for
Linux upstream, containing the cleanups for the old code. Lv Zheng.

Link: https://github.com/acpica/acpica/commit/c23034a3
Link: https://bugs.acpica.org/show_bug.cgi?id=1270
Reported-by: Sascha Wildner 
Signed-off-by: Lv Zheng 
Signed-off-by: Bob Moore 
---
 drivers/acpi/acpica/acmacros.h |   12 
 drivers/acpi/acpica/exfldio.c  |   12 ++--
 2 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/drivers/acpi/acpica/acmacros.h b/drivers/acpi/acpica/acmacros.h
index ecbaaba..a3b9543 100644
--- a/drivers/acpi/acpica/acmacros.h
+++ b/drivers/acpi/acpica/acmacros.h
@@ -270,9 +270,21 @@
  * Bit positions start at zero.
  * MASK_BITS_ABOVE creates a mask starting AT the position and above
  * MASK_BITS_BELOW creates a mask starting one bit BELOW the position
+ * MASK_BITS_ABOVE/BELOW accpets a bit offset to create a mask
+ * MASK_BITS_ABOVE/BELOW_32/64 accpets a bit width to create a mask
+ * Note: The ACPI_INTEGER_BIT_SIZE check is used to bypass compiler
+ * differences with the shift operator
  */
 #define ACPI_MASK_BITS_ABOVE(position)  (~((ACPI_UINT64_MAX) << ((u32) 
(position
 #define ACPI_MASK_BITS_BELOW(position)  ((ACPI_UINT64_MAX) << ((u32) 
(position)))
+#define ACPI_MASK_BITS_ABOVE_32(width)  ((u32) ACPI_MASK_BITS_ABOVE(width))
+#define ACPI_MASK_BITS_BELOW_32(width)  ((u32) ACPI_MASK_BITS_BELOW(width))
+#define ACPI_MASK_BITS_ABOVE_64(width)  ((width) == ACPI_INTEGER_BIT_SIZE 
? \
+   
ACPI_UINT64_MAX : \
+   
ACPI_MASK_BITS_ABOVE(width))
+#define ACPI_MASK_BITS_BELOW_64(width)  ((width) == ACPI_INTEGER_BIT_SIZE 
? \
+   
(u64) 0 : \
+   
ACPI_MASK_BITS_BELOW(width))
 
 /* Bitfields within ACPI registers */
 
diff --git a/drivers/acpi/acpica/exfldio.c b/drivers/acpi/acpica/exfldio.c
index 72f9176..ee76d29 100644
--- a/drivers/acpi/acpica/exfldio.c
+++ b/drivers/acpi/acpica/exfldio.c
@@ -897,17 +897,9 @@ acpi_ex_insert_into_field(union acpi_operand_object 
*obj_desc,
 
access_bit_width = ACPI_MUL_8(obj_desc->common_field.access_byte_width);
 
-   /*
-* Create the bitmasks used for bit insertion.
-* Note: This if/else is used to bypass compiler differences with the
-* shift operator
-*/
-   if (access_bit_width == ACPI_INTEGER_BIT_SIZE) {
-   width_mask = ACPI_UINT64_MAX;
-   } else {
-   width_mask = ACPI_MASK_BITS_ABOVE(access_bit_width);
-   }
+   /* Create the bitmasks used for bit insertion */
 
+   width_mask = ACPI_MASK_BITS_ABOVE_64(access_bit_width);
mask = width_mask &
ACPI_MASK_BITS_BELOW(obj_desc->common_field.start_field_bit_offset);
 
-- 
1.7.10

[PATCH v2 06/13] ACPICA: Renamed some #defined flag constants for clarity

[Lv Zheng]

From: Bob Moore 

ACPICA commit 438905b205e64e742f9670a0970419c426264831

Expanded a couple of cryptic names.

Link: https://github.com/acpica/acpica/commit/438905b2
Signed-off-by: Bob Moore 
Signed-off-by: Lv Zheng 
---
 drivers/acpi/acpica/aclocal.h |   30 +++---
 drivers/acpi/acpica/psutils.c |2 +-
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/drivers/acpi/acpica/aclocal.h b/drivers/acpi/acpica/aclocal.h
index 166a67f..13331d7 100644
--- a/drivers/acpi/acpica/aclocal.h
+++ b/drivers/acpi/acpica/aclocal.h
@@ -856,24 +856,24 @@ struct acpi_parse_state {
 
 /* Parse object flags */
 
-#define ACPI_PARSEOP_GENERIC0x01
-#define ACPI_PARSEOP_NAMED  0x02
-#define ACPI_PARSEOP_DEFERRED   0x04
-#define ACPI_PARSEOP_BYTELIST   0x08
-#define ACPI_PARSEOP_IN_STACK   0x10
-#define ACPI_PARSEOP_TARGET 0x20
-#define ACPI_PARSEOP_IN_CACHE   0x80
+#define ACPI_PARSEOP_GENERIC0x01
+#define ACPI_PARSEOP_NAMED_OBJECT   0x02
+#define ACPI_PARSEOP_DEFERRED   0x04
+#define ACPI_PARSEOP_BYTELIST   0x08
+#define ACPI_PARSEOP_IN_STACK   0x10
+#define ACPI_PARSEOP_TARGET 0x20
+#define ACPI_PARSEOP_IN_CACHE   0x80
 
 /* Parse object disasm_flags */
 
-#define ACPI_PARSEOP_IGNORE 0x01
-#define ACPI_PARSEOP_PARAMLIST  0x02
-#define ACPI_PARSEOP_EMPTY_TERMLIST 0x04
-#define ACPI_PARSEOP_PREDEF_CHECKED 0x08
-#define ACPI_PARSEOP_CLOSING_PAREN  0x10
-#define ACPI_PARSEOP_COMPOUND   0x20
-#define ACPI_PARSEOP_ASSIGNMENT 0x40
-#define ACPI_PARSEOP_ELSEIF 0x80
+#define ACPI_PARSEOP_IGNORE 0x01
+#define ACPI_PARSEOP_PARAMETER_LIST 0x02
+#define ACPI_PARSEOP_EMPTY_TERMLIST 0x04
+#define ACPI_PARSEOP_PREDEFINED_CHECKED 0x08
+#define ACPI_PARSEOP_CLOSING_PAREN  0x10
+#define ACPI_PARSEOP_COMPOUND_ASSIGNMENT0x20
+#define ACPI_PARSEOP_ASSIGNMENT 0x40
+#define ACPI_PARSEOP_ELSEIF 0x80
 
 /*
  *
diff --git a/drivers/acpi/acpica/psutils.c b/drivers/acpi/acpica/psutils.c
index b28b0da..89cb4bf 100644
--- a/drivers/acpi/acpica/psutils.c
+++ b/drivers/acpi/acpica/psutils.c
@@ -128,7 +128,7 @@ union acpi_parse_object *acpi_ps_alloc_op(u16 opcode, u8 
*aml)
if (op_info->flags & AML_DEFER) {
flags = ACPI_PARSEOP_DEFERRED;
} else if (op_info->flags & AML_NAMED) {
-   flags = ACPI_PARSEOP_NAMED;
+   flags = ACPI_PARSEOP_NAMED_OBJECT;
} else if (opcode == AML_INT_BYTELIST_OP) {
flags = ACPI_PARSEOP_BYTELIST;
}
-- 
1.7.10

[PATCH v2 01/13] ACPICA: Divergence: remove unwanted spaces for typedef

[Lv Zheng]

ACPICA commit b2294cae776f5a66a7697414b21949d307e6856f

This patch removes unwanted spaces for typedef. This solution doesn't cover
function types.

Note that the linuxize result of this commit is very giant and should have
many conflicts against the current Linux upstream. Thus it is required to
modify the linuxize result of this commit and the commits around it
manually in order to have them merged to the Linux upstream. Since this is
very costy, we should do this only once, and if we can't ensure to do this
only once, we need to revert the Linux code to the wrong indentation result
before merging the linuxize result of this commit. Lv Zheng.

Link: https://github.com/acpica/acpica/commit/b2294cae
Signed-off-by: Lv Zheng 
Signed-off-by: Bob Moore 
---
 drivers/acpi/acpica/acdebug.h  |6 +-
 drivers/acpi/acpica/acevents.h |1 +
 drivers/acpi/acpica/acinterp.h |2 +-
 drivers/acpi/acpica/aclocal.h  |   31 ---
 drivers/acpi/acpica/acresrc.h  |8 +-
 drivers/acpi/acpica/acutils.h  |   22 ++---
 drivers/acpi/acpica/dbcmds.c   |4 +-
 drivers/acpi/acpica/dbconvert.c|4 +-
 drivers/acpi/acpica/dbexec.c   |2 +-
 drivers/acpi/acpica/dbinput.c  |6 +-
 drivers/acpi/acpica/dbnames.c  |2 +-
 drivers/acpi/acpica/dbxface.c  |4 +-
 drivers/acpi/acpica/dscontrol.c|4 +-
 drivers/acpi/acpica/dsinit.c   |2 +-
 drivers/acpi/acpica/dsmethod.c |2 +-
 drivers/acpi/acpica/dsutils.c  |2 +-
 drivers/acpi/acpica/dswload.c  |4 +-
 drivers/acpi/acpica/dswload2.c |4 +-
 drivers/acpi/acpica/dswstate.c |   10 +--
 drivers/acpi/acpica/evgpe.c|4 +-
 drivers/acpi/acpica/evgpeblk.c |4 +-
 drivers/acpi/acpica/evgpeutil.c|4 +-
 drivers/acpi/acpica/evhandler.c|2 +-
 drivers/acpi/acpica/evmisc.c   |3 +-
 drivers/acpi/acpica/evrgnini.c |2 +-
 drivers/acpi/acpica/evxfgpe.c  |2 +-
 drivers/acpi/acpica/exconcat.c |4 +-
 drivers/acpi/acpica/exconvrt.c |4 +-
 drivers/acpi/acpica/excreate.c |2 +-
 drivers/acpi/acpica/exfield.c  |4 +-
 drivers/acpi/acpica/exfldio.c  |2 +-
 drivers/acpi/acpica/exoparg3.c |8 +-
 drivers/acpi/acpica/exoparg6.c |2 +-
 drivers/acpi/acpica/exregion.c |6 +-
 drivers/acpi/acpica/exresnte.c |4 +-
 drivers/acpi/acpica/exresolv.c |2 +-
 drivers/acpi/acpica/exresop.c  |4 +-
 drivers/acpi/acpica/exstorob.c |4 +-
 drivers/acpi/acpica/hwgpe.c|6 +-
 drivers/acpi/acpica/hwxface.c  |7 +-
 drivers/acpi/acpica/nsconvert.c|6 +-
 drivers/acpi/acpica/nsnames.c  |2 +-
 drivers/acpi/acpica/nsobject.c |4 +-
 drivers/acpi/acpica/nsrepair.c |2 +-
 drivers/acpi/acpica/nsrepair2.c|6 +-
 drivers/acpi/acpica/nsutils.c  |8 +-
 drivers/acpi/acpica/nsxfeval.c |2 +-
 drivers/acpi/acpica/nsxfname.c |6 +-
 drivers/acpi/acpica/nsxfobj.c  |6 +-
 drivers/acpi/acpica/psargs.c   |2 +-
 drivers/acpi/acpica/psparse.c  |4 +-
 drivers/acpi/acpica/psxface.c  |2 +-
 drivers/acpi/acpica/rscalc.c   |   90 ++--
 drivers/acpi/acpica/rscreate.c |2 +-
 drivers/acpi/acpica/rsmisc.c   |2 +-
 drivers/acpi/acpica/rsutils.c  |   12 +--
 drivers/acpi/acpica/rsxface.c  |6 +-
 drivers/acpi/acpica/tbdata.c   |9 +-
 drivers/acpi/acpica/tbfadt.c   |2 +-
 drivers/acpi/acpica/tbutils.c  |6 +-
 drivers/acpi/acpica/tbxface.c  |6 +-
 drivers/acpi/acpica/tbxfroot.c |8 +-
 drivers/acpi/acpica/utalloc.c  |5 +-
 drivers/acpi/acpica/utbuffer.c |   24 +++---
 drivers/acpi/acpica/utcache.c  |7 +-
 drivers/acpi/acpica/utcopy.c   |   16 ++--
 drivers/acpi/acpica/utids.c|8 +-
 

[PATCH v2 01/13] ACPICA: Divergence: remove unwanted spaces for typedef

[Lv Zheng]

ACPICA commit b2294cae776f5a66a7697414b21949d307e6856f

This patch removes unwanted spaces for typedef. This solution doesn't cover
function types.

Note that the linuxize result of this commit is very giant and should have
many conflicts against the current Linux upstream. Thus it is required to
modify the linuxize result of this commit and the commits around it
manually in order to have them merged to the Linux upstream. Since this is
very costy, we should do this only once, and if we can't ensure to do this
only once, we need to revert the Linux code to the wrong indentation result
before merging the linuxize result of this commit. Lv Zheng.

Link: https://github.com/acpica/acpica/commit/b2294cae
Signed-off-by: Lv Zheng 
Signed-off-by: Bob Moore 
---
 drivers/acpi/acpica/acdebug.h  |6 +-
 drivers/acpi/acpica/acevents.h |1 +
 drivers/acpi/acpica/acinterp.h |2 +-
 drivers/acpi/acpica/aclocal.h  |   31 ---
 drivers/acpi/acpica/acresrc.h  |8 +-
 drivers/acpi/acpica/acutils.h  |   22 ++---
 drivers/acpi/acpica/dbcmds.c   |4 +-
 drivers/acpi/acpica/dbconvert.c|4 +-
 drivers/acpi/acpica/dbexec.c   |2 +-
 drivers/acpi/acpica/dbinput.c  |6 +-
 drivers/acpi/acpica/dbnames.c  |2 +-
 drivers/acpi/acpica/dbxface.c  |4 +-
 drivers/acpi/acpica/dscontrol.c|4 +-
 drivers/acpi/acpica/dsinit.c   |2 +-
 drivers/acpi/acpica/dsmethod.c |2 +-
 drivers/acpi/acpica/dsutils.c  |2 +-
 drivers/acpi/acpica/dswload.c  |4 +-
 drivers/acpi/acpica/dswload2.c |4 +-
 drivers/acpi/acpica/dswstate.c |   10 +--
 drivers/acpi/acpica/evgpe.c|4 +-
 drivers/acpi/acpica/evgpeblk.c |4 +-
 drivers/acpi/acpica/evgpeutil.c|4 +-
 drivers/acpi/acpica/evhandler.c|2 +-
 drivers/acpi/acpica/evmisc.c   |3 +-
 drivers/acpi/acpica/evrgnini.c |2 +-
 drivers/acpi/acpica/evxfgpe.c  |2 +-
 drivers/acpi/acpica/exconcat.c |4 +-
 drivers/acpi/acpica/exconvrt.c |4 +-
 drivers/acpi/acpica/excreate.c |2 +-
 drivers/acpi/acpica/exfield.c  |4 +-
 drivers/acpi/acpica/exfldio.c  |2 +-
 drivers/acpi/acpica/exoparg3.c |8 +-
 drivers/acpi/acpica/exoparg6.c |2 +-
 drivers/acpi/acpica/exregion.c |6 +-
 drivers/acpi/acpica/exresnte.c |4 +-
 drivers/acpi/acpica/exresolv.c |2 +-
 drivers/acpi/acpica/exresop.c  |4 +-
 drivers/acpi/acpica/exstorob.c |4 +-
 drivers/acpi/acpica/hwgpe.c|6 +-
 drivers/acpi/acpica/hwxface.c  |7 +-
 drivers/acpi/acpica/nsconvert.c|6 +-
 drivers/acpi/acpica/nsnames.c  |2 +-
 drivers/acpi/acpica/nsobject.c |4 +-
 drivers/acpi/acpica/nsrepair.c |2 +-
 drivers/acpi/acpica/nsrepair2.c|6 +-
 drivers/acpi/acpica/nsutils.c  |8 +-
 drivers/acpi/acpica/nsxfeval.c |2 +-
 drivers/acpi/acpica/nsxfname.c |6 +-
 drivers/acpi/acpica/nsxfobj.c  |6 +-
 drivers/acpi/acpica/psargs.c   |2 +-
 drivers/acpi/acpica/psparse.c  |4 +-
 drivers/acpi/acpica/psxface.c  |2 +-
 drivers/acpi/acpica/rscalc.c   |   90 ++--
 drivers/acpi/acpica/rscreate.c |2 +-
 drivers/acpi/acpica/rsmisc.c   |2 +-
 drivers/acpi/acpica/rsutils.c  |   12 +--
 drivers/acpi/acpica/rsxface.c  |6 +-
 drivers/acpi/acpica/tbdata.c   |9 +-
 drivers/acpi/acpica/tbfadt.c   |2 +-
 drivers/acpi/acpica/tbutils.c  |6 +-
 drivers/acpi/acpica/tbxface.c  |6 +-
 drivers/acpi/acpica/tbxfroot.c |8 +-
 drivers/acpi/acpica/utalloc.c  |5 +-
 drivers/acpi/acpica/utbuffer.c |   24 +++---
 drivers/acpi/acpica/utcache.c  |7 +-
 drivers/acpi/acpica/utcopy.c   |   16 ++--
 drivers/acpi/acpica/utids.c|8 +-
 drivers/acpi/acpica/utmath.c   

[PATCH v2 00/13] ACPICA: 20160422 Release

[Lv Zheng]

The 20160422 ACPICA kernel-resident subsystem updates are linuxized based
on the linux-pm/linux-next branch.

NOTE:
1. Indentation improvement
The [PATCH 01] is a result of an ACPICA release process fix. It requires
much of human intervention, and many linuxized patches in the developers'
local working repositories that are not upstreamed to the ACPICA will be
burnt by this commit, and may take weeks or months for the developers to
recover. So hope we can do it correctly and rapidly.

2. AcessSize/BitOffset support
ACPICA implements ACPI hardware register accesses using ACPI 1.0 style,
which contains only BLK/LEN fields. ACPI 2.0 starts to use Generic Address
Structure to define hardware registers, the ACPI 1.0 fields can be
translated into Address/BitWidth fields and ACPI 2.0 defines new
AccessSize/BitOffset fields as an extension. While the ACPICA code of the
GAS support is still Address/BitWidth aware only. This becomes one of the
significant ACPI 2.0 gaps in ACPICA.
But as we have already switched the address favor to 64-bit (aka., favor
GAS descriptors) and there is almost no regression report, enabling
AccessSize/BitOffset awareness seems to be just a theoretical issue because
there is no existing users requiring this, and enabling it might just be an
ecosystem enabling work for the future users.
So the most important thing of this improvement is to ensure regression
safer by keeping old behavior working. [PATCH 08] is thus generated for
this purpose. After ensuring this, we need this improvement to appear in
the upstream to have more users to test it so that we can learn unknown
cases from the feedback.

The patchset has passed the following build/boot tests.
Build tests are performed as follows:
1. i386 + allyes
2. i386 + allno
3. i386 + default + ACPI_DEBUGGER=y
4. i386 + default + ACPI_DEBUGGER=n + ACPI_DEBUG=y
5. i386 + default + ACPI_DEBUG=n + ACPI=y
6. i386 + default + ACPI=n
7. x86_64 + allyes
8. x86_64 + allno
9. x86_64 + default + ACPI_DEBUGGER=y
10.x86_64 + default + ACPI_DEBUGGER=n + ACPI_DEBUG=y
11.x86_64 + default + ACPI_DEBUG=n + ACPI=y
12.x86_64 + default + ACPI=n
Boot tests are performed as follows:
1. i386 + default + ACPI_DEBUGGER=y
2. x86_64 + default + ACPI_DEBUGGER=y
Where:
1. i386: machine named as "Dell Inspiron Mini 1010"
2. x86_64: machine named as "HP Compaq 8200 Elite SFF PC"
3. default: kernel configuration with following items enabled:
   All hardware drivers related to the machines of i386/x86_64
   All "drivers/acpi" configurations
   All "drivers/platform" drivers
   All other drivers that link the APIs provided by ACPICA subsystem

The divergences checking result:
Before applying (20160318 Release):
  494 lines
After applying (20160422 Release):
  485 lines
The reduction is caused by recently merged module level improvement.

Bob Moore (7):
  ACPICA: Refactor evaluate_object to reduce nesting
  ACPICA: ACPI 6.1: Support for new PCCT subtable
  ACPICA: ACPI 6.0: Update _BIX support for new package element
  ACPICA: ACPI 6.0, tools/iasl: Add support for new resource
descriptors
  ACPICA: Renamed some #defined flag constants for clarity
  ACPICA: Move all ASCII utilities to a common file
  ACPICA: Update version to 20160422

Lv Zheng (6):
  ACPICA: Divergence: remove unwanted spaces for typedef
  ACPICA: Utilities: Add ACPI_IS_ALIGNED() macro
  ACPICA: Hardware: Add optimized access bit width support
  ACPICA: Executer: Introduce a set of macros to handle bit width mask
generation
  ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support in
acpi_hw_read()
  ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support for
acpi_hw_write()

 drivers/acpi/acpica/Makefile   |1 +
 drivers/acpi/acpica/acdebug.h  |6 +-
 drivers/acpi/acpica/acevents.h |1 +
 drivers/acpi/acpica/acinterp.h |2 +-
 drivers/acpi/acpica/aclocal.h  |   61 ++---
 drivers/acpi/acpica/acmacros.h |   15 +-
 drivers/acpi/acpica/acpredef.h |5 +-
 drivers/acpi/acpica/acresrc.h  |8 +-
 drivers/acpi/acpica/actables.h |2 -
 drivers/acpi/acpica/acutils.h  |   35 +--
 drivers/acpi/acpica/dbcmds.c   |4 +-
 drivers/acpi/acpica/dbconvert.c|4 +-
 drivers/acpi/acpica/dbexec.c   |2 +-
 drivers/acpi/acpica/dbinput.c  |6 +-
 drivers/acpi/acpica/dbnames.c  |4 +-
 drivers/acpi/acpica/dbxface.c  |4 +-
 drivers/acpi/acpica/dscontrol.c|4 +-
 drivers/acpi/acpica/dsinit.c   |2 +-
 drivers/acpi/acpica/dsmethod.c |2 +-
 drivers/acpi/acpica/dsutils.c  |2 +-
 drivers/acpi/acpica/dswload.c  |4 +-
 

[PATCH v2 02/13] ACPICA: Refactor evaluate_object to reduce nesting

[Lv Zheng]

From: Bob Moore 

ACPICA commit 599e9159f53565e4a3f3e67f6a03f81fcb10a4cf

Original patch from hanjun@linaro.org
ACPICA BZ 1072.

Link: https://github.com/acpica/acpica/commit/599e9159
Link: https://bugs.acpica.org/show_bug.cgi?id=1072
Original-by: Hanjun Guo 
Signed-off-by: Bob Moore 
Signed-off-by: Lv Zheng 
---
 drivers/acpi/acpica/nsxfeval.c |  111 
 1 file changed, 55 insertions(+), 56 deletions(-)

diff --git a/drivers/acpi/acpica/nsxfeval.c b/drivers/acpi/acpica/nsxfeval.c
index 614e4ba..d2a9b4f 100644
--- a/drivers/acpi/acpica/nsxfeval.c
+++ b/drivers/acpi/acpica/nsxfeval.c
@@ -280,13 +280,12 @@ acpi_evaluate_object(acpi_handle handle,
info->parameters[info->param_count] = NULL;
}
 
-#if 0
+#ifdef _FUTURE_FEATURE
 
/*
 * Begin incoming argument count analysis. Check for too few args
 * and too many args.
 */
-
switch (acpi_ns_get_type(info->node)) {
case ACPI_TYPE_METHOD:
 
@@ -370,68 +369,68 @@ acpi_evaluate_object(acpi_handle handle,
 * If we are expecting a return value, and all went well above,
 * copy the return value to an external object.
 */
-   if (return_buffer) {
-   if (!info->return_object) {
-   return_buffer->length = 0;
-   } else {
-   if (ACPI_GET_DESCRIPTOR_TYPE(info->return_object) ==
-   ACPI_DESC_TYPE_NAMED) {
-   /*
-* If we received a NS Node as a return object, 
this means that
-* the object we are evaluating has nothing 
interesting to
-* return (such as a mutex, etc.)  We return an 
error because
-* these types are essentially unsupported by 
this interface.
-* We don't check up front because this makes 
it easier to add
-* support for various types at a later date if 
necessary.
-*/
-   status = AE_TYPE;
-   info->return_object = NULL; /* No need to 
delete a NS Node */
-   return_buffer->length = 0;
-   }
+   if (!return_buffer) {
+   goto cleanup_return_object;
+   }
 
-   if (ACPI_SUCCESS(status)) {
+   if (!info->return_object) {
+   return_buffer->length = 0;
+   goto cleanup;
+   }
 
-   /* Dereference Index and ref_of references */
+   if (ACPI_GET_DESCRIPTOR_TYPE(info->return_object) ==
+   ACPI_DESC_TYPE_NAMED) {
+   /*
+* If we received a NS Node as a return object, this means that
+* the object we are evaluating has nothing interesting to
+* return (such as a mutex, etc.)  We return an error because
+* these types are essentially unsupported by this interface.
+* We don't check up front because this makes it easier to add
+* support for various types at a later date if necessary.
+*/
+   status = AE_TYPE;
+   info->return_object = NULL; /* No need to delete a NS Node 
*/
+   return_buffer->length = 0;
+   }
 
-   acpi_ns_resolve_references(info);
+   if (ACPI_FAILURE(status)) {
+   goto cleanup_return_object;
+   }
 
-   /* Get the size of the returned object */
+   /* Dereference Index and ref_of references */
 
-   status =
-   acpi_ut_get_object_size(info->return_object,
-   
_space_needed);
-   if (ACPI_SUCCESS(status)) {
-
-   /* Validate/Allocate/Clear caller 
buffer */
-
-   status =
-   acpi_ut_initialize_buffer
-   (return_buffer,
-buffer_space_needed);
-   if (ACPI_FAILURE(status)) {
-   /*
-* Caller's buffer is too small 
or a new one can't
-* be allocated
-*/
-   ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "Needed 
buffer size %X, %s\n",
-   

[PATCH v2 00/13] ACPICA: 20160422 Release

[Lv Zheng]

The 20160422 ACPICA kernel-resident subsystem updates are linuxized based
on the linux-pm/linux-next branch.

NOTE:
1. Indentation improvement
The [PATCH 01] is a result of an ACPICA release process fix. It requires
much of human intervention, and many linuxized patches in the developers'
local working repositories that are not upstreamed to the ACPICA will be
burnt by this commit, and may take weeks or months for the developers to
recover. So hope we can do it correctly and rapidly.

2. AcessSize/BitOffset support
ACPICA implements ACPI hardware register accesses using ACPI 1.0 style,
which contains only BLK/LEN fields. ACPI 2.0 starts to use Generic Address
Structure to define hardware registers, the ACPI 1.0 fields can be
translated into Address/BitWidth fields and ACPI 2.0 defines new
AccessSize/BitOffset fields as an extension. While the ACPICA code of the
GAS support is still Address/BitWidth aware only. This becomes one of the
significant ACPI 2.0 gaps in ACPICA.
But as we have already switched the address favor to 64-bit (aka., favor
GAS descriptors) and there is almost no regression report, enabling
AccessSize/BitOffset awareness seems to be just a theoretical issue because
there is no existing users requiring this, and enabling it might just be an
ecosystem enabling work for the future users.
So the most important thing of this improvement is to ensure regression
safer by keeping old behavior working. [PATCH 08] is thus generated for
this purpose. After ensuring this, we need this improvement to appear in
the upstream to have more users to test it so that we can learn unknown
cases from the feedback.

The patchset has passed the following build/boot tests.
Build tests are performed as follows:
1. i386 + allyes
2. i386 + allno
3. i386 + default + ACPI_DEBUGGER=y
4. i386 + default + ACPI_DEBUGGER=n + ACPI_DEBUG=y
5. i386 + default + ACPI_DEBUG=n + ACPI=y
6. i386 + default + ACPI=n
7. x86_64 + allyes
8. x86_64 + allno
9. x86_64 + default + ACPI_DEBUGGER=y
10.x86_64 + default + ACPI_DEBUGGER=n + ACPI_DEBUG=y
11.x86_64 + default + ACPI_DEBUG=n + ACPI=y
12.x86_64 + default + ACPI=n
Boot tests are performed as follows:
1. i386 + default + ACPI_DEBUGGER=y
2. x86_64 + default + ACPI_DEBUGGER=y
Where:
1. i386: machine named as "Dell Inspiron Mini 1010"
2. x86_64: machine named as "HP Compaq 8200 Elite SFF PC"
3. default: kernel configuration with following items enabled:
   All hardware drivers related to the machines of i386/x86_64
   All "drivers/acpi" configurations
   All "drivers/platform" drivers
   All other drivers that link the APIs provided by ACPICA subsystem

The divergences checking result:
Before applying (20160318 Release):
  494 lines
After applying (20160422 Release):
  485 lines
The reduction is caused by recently merged module level improvement.

Bob Moore (7):
  ACPICA: Refactor evaluate_object to reduce nesting
  ACPICA: ACPI 6.1: Support for new PCCT subtable
  ACPICA: ACPI 6.0: Update _BIX support for new package element
  ACPICA: ACPI 6.0, tools/iasl: Add support for new resource
descriptors
  ACPICA: Renamed some #defined flag constants for clarity
  ACPICA: Move all ASCII utilities to a common file
  ACPICA: Update version to 20160422

Lv Zheng (6):
  ACPICA: Divergence: remove unwanted spaces for typedef
  ACPICA: Utilities: Add ACPI_IS_ALIGNED() macro
  ACPICA: Hardware: Add optimized access bit width support
  ACPICA: Executer: Introduce a set of macros to handle bit width mask
generation
  ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support in
acpi_hw_read()
  ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support for
acpi_hw_write()

 drivers/acpi/acpica/Makefile   |1 +
 drivers/acpi/acpica/acdebug.h  |6 +-
 drivers/acpi/acpica/acevents.h |1 +
 drivers/acpi/acpica/acinterp.h |2 +-
 drivers/acpi/acpica/aclocal.h  |   61 ++---
 drivers/acpi/acpica/acmacros.h |   15 +-
 drivers/acpi/acpica/acpredef.h |5 +-
 drivers/acpi/acpica/acresrc.h  |8 +-
 drivers/acpi/acpica/actables.h |2 -
 drivers/acpi/acpica/acutils.h  |   35 +--
 drivers/acpi/acpica/dbcmds.c   |4 +-
 drivers/acpi/acpica/dbconvert.c|4 +-
 drivers/acpi/acpica/dbexec.c   |2 +-
 drivers/acpi/acpica/dbinput.c  |6 +-
 drivers/acpi/acpica/dbnames.c  |4 +-
 drivers/acpi/acpica/dbxface.c  |4 +-
 drivers/acpi/acpica/dscontrol.c|4 +-
 drivers/acpi/acpica/dsinit.c   |2 +-
 drivers/acpi/acpica/dsmethod.c |2 +-
 drivers/acpi/acpica/dsutils.c  |2 +-
 drivers/acpi/acpica/dswload.c  |4 +-
 

[PATCH v2 02/13] ACPICA: Refactor evaluate_object to reduce nesting

[Lv Zheng]

From: Bob Moore 

ACPICA commit 599e9159f53565e4a3f3e67f6a03f81fcb10a4cf

Original patch from hanjun@linaro.org
ACPICA BZ 1072.

Link: https://github.com/acpica/acpica/commit/599e9159
Link: https://bugs.acpica.org/show_bug.cgi?id=1072
Original-by: Hanjun Guo 
Signed-off-by: Bob Moore 
Signed-off-by: Lv Zheng 
---
 drivers/acpi/acpica/nsxfeval.c |  111 
 1 file changed, 55 insertions(+), 56 deletions(-)

diff --git a/drivers/acpi/acpica/nsxfeval.c b/drivers/acpi/acpica/nsxfeval.c
index 614e4ba..d2a9b4f 100644
--- a/drivers/acpi/acpica/nsxfeval.c
+++ b/drivers/acpi/acpica/nsxfeval.c
@@ -280,13 +280,12 @@ acpi_evaluate_object(acpi_handle handle,
info->parameters[info->param_count] = NULL;
}
 
-#if 0
+#ifdef _FUTURE_FEATURE
 
/*
 * Begin incoming argument count analysis. Check for too few args
 * and too many args.
 */
-
switch (acpi_ns_get_type(info->node)) {
case ACPI_TYPE_METHOD:
 
@@ -370,68 +369,68 @@ acpi_evaluate_object(acpi_handle handle,
 * If we are expecting a return value, and all went well above,
 * copy the return value to an external object.
 */
-   if (return_buffer) {
-   if (!info->return_object) {
-   return_buffer->length = 0;
-   } else {
-   if (ACPI_GET_DESCRIPTOR_TYPE(info->return_object) ==
-   ACPI_DESC_TYPE_NAMED) {
-   /*
-* If we received a NS Node as a return object, 
this means that
-* the object we are evaluating has nothing 
interesting to
-* return (such as a mutex, etc.)  We return an 
error because
-* these types are essentially unsupported by 
this interface.
-* We don't check up front because this makes 
it easier to add
-* support for various types at a later date if 
necessary.
-*/
-   status = AE_TYPE;
-   info->return_object = NULL; /* No need to 
delete a NS Node */
-   return_buffer->length = 0;
-   }
+   if (!return_buffer) {
+   goto cleanup_return_object;
+   }
 
-   if (ACPI_SUCCESS(status)) {
+   if (!info->return_object) {
+   return_buffer->length = 0;
+   goto cleanup;
+   }
 
-   /* Dereference Index and ref_of references */
+   if (ACPI_GET_DESCRIPTOR_TYPE(info->return_object) ==
+   ACPI_DESC_TYPE_NAMED) {
+   /*
+* If we received a NS Node as a return object, this means that
+* the object we are evaluating has nothing interesting to
+* return (such as a mutex, etc.)  We return an error because
+* these types are essentially unsupported by this interface.
+* We don't check up front because this makes it easier to add
+* support for various types at a later date if necessary.
+*/
+   status = AE_TYPE;
+   info->return_object = NULL; /* No need to delete a NS Node 
*/
+   return_buffer->length = 0;
+   }
 
-   acpi_ns_resolve_references(info);
+   if (ACPI_FAILURE(status)) {
+   goto cleanup_return_object;
+   }
 
-   /* Get the size of the returned object */
+   /* Dereference Index and ref_of references */
 
-   status =
-   acpi_ut_get_object_size(info->return_object,
-   
_space_needed);
-   if (ACPI_SUCCESS(status)) {
-
-   /* Validate/Allocate/Clear caller 
buffer */
-
-   status =
-   acpi_ut_initialize_buffer
-   (return_buffer,
-buffer_space_needed);
-   if (ACPI_FAILURE(status)) {
-   /*
-* Caller's buffer is too small 
or a new one can't
-* be allocated
-*/
-   ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "Needed 
buffer size %X, %s\n",
- (u32)
-  

Re: [PATCH kernel v4 10/11] powerpc/powernv/npu: Rework TCE Kill handling

[Alexey Kardashevskiy]

On 05/03/2016 05:37 PM, Alistair Popple wrote:

On Fri, 29 Apr 2016 18:55:23 Alexey Kardashevskiy wrote:

The pnv_ioda_pe struct keeps an array of peers. At the moment it is only
used to link GPU and NPU for 2 purposes:

1. Access NPU quickly when configuring DMA for GPU - this was addressed
in the previos patch by removing use of it as DMA setup is not what
the kernel would constantly do.


Agreed. It was used here because the peer array was added to deal with (2)
below ...


2. Invalidate TCE cache for NPU when it is invalidated for GPU.
GPU and NPU are in different PE. There is already a mechanism to
attach multiple iommu_table_group to the same iommu_table (used for VFIO),
we can reuse it here so does this patch.


... because we weren't aware iommu_table_group could be used to do this
instead.


This gets rid of peers[] array and PNV_IODA_PE_PEER flag as they are
not needed anymore.


Happy to see it go. I'm not too familiar with iommu groups but based on the
code and what you have described to me both here and offline everything looks
good to me. One pretty minor style comment below.

Reviewed-By: Alistair Popple 


While we are here, add TCE cache invalidation after enabling bypass.

Signed-off-by: Alexey Kardashevskiy 
---
Changes:
v4:
* reworked as "powerpc/powernv/npu: Add set/unset window helpers" has been
added
---
 arch/powerpc/platforms/powernv/npu-dma.c  | 69

+--

 arch/powerpc/platforms/powernv/pci-ioda.c | 57 -
 arch/powerpc/platforms/powernv/pci.h  |  6 ---
 3 files changed, 26 insertions(+), 106 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/npu-dma.c

b/arch/powerpc/platforms/powernv/npu-dma.c

index 800d70f..cb2d1da 100644
--- a/arch/powerpc/platforms/powernv/npu-dma.c
+++ b/arch/powerpc/platforms/powernv/npu-dma.c
@@ -136,22 +136,17 @@ static struct pnv_ioda_pe

*get_gpu_pci_dev_and_pe(struct pnv_ioda_pe *npe,

struct pnv_ioda_pe *pe;
struct pci_dn *pdn;

-   if (npe->flags & PNV_IODA_PE_PEER) {
-   pe = npe->peers[0];
-   pdev = pe->pdev;
-   } else {
-   pdev = pnv_pci_get_gpu_dev(npe->pdev);
-   if (!pdev)
-   return NULL;
+   pdev = pnv_pci_get_gpu_dev(npe->pdev);
+   if (!pdev)
+   return NULL;

-   pdn = pci_get_pdn(pdev);
-   if (WARN_ON(!pdn || pdn->pe_number == IODA_INVALID_PE))
-   return NULL;
+   pdn = pci_get_pdn(pdev);
+   if (WARN_ON(!pdn || pdn->pe_number == IODA_INVALID_PE))
+   return NULL;

-   hose = pci_bus_to_host(pdev->bus);
-   phb = hose->private_data;
-   pe = >ioda.pe_array[pdn->pe_number];
-   }
+   hose = pci_bus_to_host(pdev->bus);
+   phb = hose->private_data;
+   pe = >ioda.pe_array[pdn->pe_number];

if (gpdev)
*gpdev = pdev;
@@ -186,6 +181,10 @@ static long pnv_npu_set_window(struct pnv_ioda_pe *npe,
}
pnv_pci_ioda2_tce_invalidate_entire(phb, false);

+   /* Add the table to the list so its TCE cache will get invalidated */
+   pnv_pci_link_table_and_group(phb->hose->node, 0,
+   tbl, >table_group);


Where tbl is associated with the GPU and is what links the NPU and GPU PEs.


return 0;
 }

@@ -206,45 +205,12 @@ static long pnv_npu_unset_window(struct pnv_ioda_pe

*npe)

}
pnv_pci_ioda2_tce_invalidate_entire(phb, false);

+   pnv_pci_unlink_table_and_group(npe->table_group.tables[0],
+   >table_group);
+
return 0;
 }

-void pnv_npu_init_dma_pe(struct pnv_ioda_pe *npe)
-{
-   struct pnv_ioda_pe *gpe;
-   struct pci_dev *gpdev;
-   int i, avail = -1;
-
-   if (!npe->pdev || !(npe->flags & PNV_IODA_PE_DEV))
-   return;
-
-   gpe = get_gpu_pci_dev_and_pe(npe, );
-   if (!gpe)
-   return;
-
-   for (i = 0; i < PNV_IODA_MAX_PEER_PES; i++) {
-   /* Nothing to do if the PE is already connected. */
-   if (gpe->peers[i] == npe)
-   return;
-
-   if (!gpe->peers[i])
-   avail = i;
-   }
-
-   if (WARN_ON(avail < 0))
-   return;
-
-   gpe->peers[avail] = npe;
-   gpe->flags |= PNV_IODA_PE_PEER;
-
-   /*
-* We assume that the NPU devices only have a single peer PE
-* (the GPU PCIe device PE).
-*/
-   npe->peers[0] = gpe;
-   npe->flags |= PNV_IODA_PE_PEER;
-}
-
 /*
  * Enables 32 bit DMA on NPU.
  */
@@ -302,6 +268,9 @@ static int pnv_npu_dma_set_bypass(struct pnv_ioda_pe

*npe)

npe->pe_number, npe->pe_number,
0 /* bypass base */, top);

+   if (rc == OPAL_SUCCESS)
+   pnv_pci_ioda2_tce_invalidate_entire(phb, false);
+
return rc;
 }

diff --git 

Re: [PATCH kernel v4 10/11] powerpc/powernv/npu: Rework TCE Kill handling

[Alexey Kardashevskiy]

On 05/03/2016 05:37 PM, Alistair Popple wrote:

On Fri, 29 Apr 2016 18:55:23 Alexey Kardashevskiy wrote:

The pnv_ioda_pe struct keeps an array of peers. At the moment it is only
used to link GPU and NPU for 2 purposes:

1. Access NPU quickly when configuring DMA for GPU - this was addressed
in the previos patch by removing use of it as DMA setup is not what
the kernel would constantly do.


Agreed. It was used here because the peer array was added to deal with (2)
below ...


2. Invalidate TCE cache for NPU when it is invalidated for GPU.
GPU and NPU are in different PE. There is already a mechanism to
attach multiple iommu_table_group to the same iommu_table (used for VFIO),
we can reuse it here so does this patch.


... because we weren't aware iommu_table_group could be used to do this
instead.


This gets rid of peers[] array and PNV_IODA_PE_PEER flag as they are
not needed anymore.


Happy to see it go. I'm not too familiar with iommu groups but based on the
code and what you have described to me both here and offline everything looks
good to me. One pretty minor style comment below.

Reviewed-By: Alistair Popple 


While we are here, add TCE cache invalidation after enabling bypass.

Signed-off-by: Alexey Kardashevskiy 
---
Changes:
v4:
* reworked as "powerpc/powernv/npu: Add set/unset window helpers" has been
added
---
 arch/powerpc/platforms/powernv/npu-dma.c  | 69

+--

 arch/powerpc/platforms/powernv/pci-ioda.c | 57 -
 arch/powerpc/platforms/powernv/pci.h  |  6 ---
 3 files changed, 26 insertions(+), 106 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/npu-dma.c

b/arch/powerpc/platforms/powernv/npu-dma.c

index 800d70f..cb2d1da 100644
--- a/arch/powerpc/platforms/powernv/npu-dma.c
+++ b/arch/powerpc/platforms/powernv/npu-dma.c
@@ -136,22 +136,17 @@ static struct pnv_ioda_pe

*get_gpu_pci_dev_and_pe(struct pnv_ioda_pe *npe,

struct pnv_ioda_pe *pe;
struct pci_dn *pdn;

-   if (npe->flags & PNV_IODA_PE_PEER) {
-   pe = npe->peers[0];
-   pdev = pe->pdev;
-   } else {
-   pdev = pnv_pci_get_gpu_dev(npe->pdev);
-   if (!pdev)
-   return NULL;
+   pdev = pnv_pci_get_gpu_dev(npe->pdev);
+   if (!pdev)
+   return NULL;

-   pdn = pci_get_pdn(pdev);
-   if (WARN_ON(!pdn || pdn->pe_number == IODA_INVALID_PE))
-   return NULL;
+   pdn = pci_get_pdn(pdev);
+   if (WARN_ON(!pdn || pdn->pe_number == IODA_INVALID_PE))
+   return NULL;

-   hose = pci_bus_to_host(pdev->bus);
-   phb = hose->private_data;
-   pe = >ioda.pe_array[pdn->pe_number];
-   }
+   hose = pci_bus_to_host(pdev->bus);
+   phb = hose->private_data;
+   pe = >ioda.pe_array[pdn->pe_number];

if (gpdev)
*gpdev = pdev;
@@ -186,6 +181,10 @@ static long pnv_npu_set_window(struct pnv_ioda_pe *npe,
}
pnv_pci_ioda2_tce_invalidate_entire(phb, false);

+   /* Add the table to the list so its TCE cache will get invalidated */
+   pnv_pci_link_table_and_group(phb->hose->node, 0,
+   tbl, >table_group);


Where tbl is associated with the GPU and is what links the NPU and GPU PEs.


return 0;
 }

@@ -206,45 +205,12 @@ static long pnv_npu_unset_window(struct pnv_ioda_pe

*npe)

}
pnv_pci_ioda2_tce_invalidate_entire(phb, false);

+   pnv_pci_unlink_table_and_group(npe->table_group.tables[0],
+   >table_group);
+
return 0;
 }

-void pnv_npu_init_dma_pe(struct pnv_ioda_pe *npe)
-{
-   struct pnv_ioda_pe *gpe;
-   struct pci_dev *gpdev;
-   int i, avail = -1;
-
-   if (!npe->pdev || !(npe->flags & PNV_IODA_PE_DEV))
-   return;
-
-   gpe = get_gpu_pci_dev_and_pe(npe, );
-   if (!gpe)
-   return;
-
-   for (i = 0; i < PNV_IODA_MAX_PEER_PES; i++) {
-   /* Nothing to do if the PE is already connected. */
-   if (gpe->peers[i] == npe)
-   return;
-
-   if (!gpe->peers[i])
-   avail = i;
-   }
-
-   if (WARN_ON(avail < 0))
-   return;
-
-   gpe->peers[avail] = npe;
-   gpe->flags |= PNV_IODA_PE_PEER;
-
-   /*
-* We assume that the NPU devices only have a single peer PE
-* (the GPU PCIe device PE).
-*/
-   npe->peers[0] = gpe;
-   npe->flags |= PNV_IODA_PE_PEER;
-}
-
 /*
  * Enables 32 bit DMA on NPU.
  */
@@ -302,6 +268,9 @@ static int pnv_npu_dma_set_bypass(struct pnv_ioda_pe

*npe)

npe->pe_number, npe->pe_number,
0 /* bypass base */, top);

+   if (rc == OPAL_SUCCESS)
+   pnv_pci_ioda2_tce_invalidate_entire(phb, false);
+
return rc;
 }

diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c

linux-next: manual merge of the borntraeger tree with the kvms390 tree

[Stephen Rothwell]

Hi Christian,

Today's linux-next merge of the borntraeger tree got a conflict in:

  arch/s390/kvm/kvm-s390.c

between commit:

  be7c9d7ba9e4 ("KVM: s390: Populate mask of non-hypervisor managed facility 
bits")

from the kvms390 tree and commit:

  5c14ad932491 ("KVM: halt_polling: provide a way to qualify wakeups during 
poll")

from the borntraeger tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc arch/s390/kvm/kvm-s390.c
index c597201a5ca9,009a10e00e80..
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@@ -2985,17 -2972,13 +2986,22 @@@ void kvm_arch_commit_memory_region(stru
return;
  }
  
 +static inline unsigned long nonhyp_mask(int i)
 +{
 +  unsigned int nonhyp_fai = (sclp.hmfai << i * 2) >> 30;
 +
 +  return 0xUL >> (nonhyp_fai << 4);
 +}
 +
+ void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu)
+ {
+   vcpu->valid_wakeup = false;
+ }
+ 
  static int __init kvm_s390_init(void)
  {
 +  int i;
 +
if (!sclp.has_sief2) {
pr_info("SIE not available\n");
return -ENODEV;

linux-next: manual merge of the borntraeger tree with the kvms390 tree

[Stephen Rothwell]

Hi Christian,

Today's linux-next merge of the borntraeger tree got a conflict in:

  arch/s390/kvm/kvm-s390.c

between commit:

  be7c9d7ba9e4 ("KVM: s390: Populate mask of non-hypervisor managed facility 
bits")

from the kvms390 tree and commit:

  5c14ad932491 ("KVM: halt_polling: provide a way to qualify wakeups during 
poll")

from the borntraeger tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc arch/s390/kvm/kvm-s390.c
index c597201a5ca9,009a10e00e80..
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@@ -2985,17 -2972,13 +2986,22 @@@ void kvm_arch_commit_memory_region(stru
return;
  }
  
 +static inline unsigned long nonhyp_mask(int i)
 +{
 +  unsigned int nonhyp_fai = (sclp.hmfai << i * 2) >> 30;
 +
 +  return 0xUL >> (nonhyp_fai << 4);
 +}
 +
+ void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu)
+ {
+   vcpu->valid_wakeup = false;
+ }
+ 
  static int __init kvm_s390_init(void)
  {
 +  int i;
 +
if (!sclp.has_sief2) {
pr_info("SIE not available\n");
return -ENODEV;

Re: [PATCH] ext4 crypto: migrate into vfs's crypto engine

[Jaegeuk Kim]

On Wed, May 04, 2016 at 11:20:22PM -0400, Theodore Ts'o wrote:
> On Mon, Apr 25, 2016 at 05:15:36PM -0700, Jaegeuk Kim wrote:
> > This patch removes the most parts of internal crypto codes.
> > And then, it modifies and adds some ext4-specific crypt codes to use the 
> > generic
> > facility.
> > 
> > Signed-off-by: Jaegeuk Kim 
> 
> So I just tried this patch, and one big problem with it is that it
> breaks backwards compatibility with existing userspace code, which
> assumes that the name of the keys are prefixed with "ext4:".  I see
> that in fs/crypto.h you've changed it to be "fscrypto:".  Which is
> more general, perhaps, but the problem is that it's not what the
> existing shipping code (for example, in the Android N preview release)
> and what e2fsprogs's e4crypto is using.

I also worried about that before, but I thought there was no shipped
fs_encryption-enabled product.
Actually, f2fs has the same issue as well, since "f2fs:" was used before. :(

> If we want to use fscrypto: as a more general prefix, I could see
> doing that, but we need to provide for backwards compatibility ---
> which means that at least for ext4, we will need to look for keys
> using both the new and old prefix, and we would also want change
> e4crypto to set keys with both the "ext4" and the more general
> "fscrypto" prefix.

Got it. Let me add (*key_prefix(inode)) in fscrypt_operations so that filesystem
can give a specific prefix additionally.
Once fscrypto supports both of prefixes, does e4crypto have to set "fscrypto"?
The "ext4" should work all the time tho.

Thanks,

> 
> Cheers,
> 
>   - Ted

Re: [PATCH] ext4 crypto: migrate into vfs's crypto engine

[Jaegeuk Kim]

On Wed, May 04, 2016 at 11:20:22PM -0400, Theodore Ts'o wrote:
> On Mon, Apr 25, 2016 at 05:15:36PM -0700, Jaegeuk Kim wrote:
> > This patch removes the most parts of internal crypto codes.
> > And then, it modifies and adds some ext4-specific crypt codes to use the 
> > generic
> > facility.
> > 
> > Signed-off-by: Jaegeuk Kim 
> 
> So I just tried this patch, and one big problem with it is that it
> breaks backwards compatibility with existing userspace code, which
> assumes that the name of the keys are prefixed with "ext4:".  I see
> that in fs/crypto.h you've changed it to be "fscrypto:".  Which is
> more general, perhaps, but the problem is that it's not what the
> existing shipping code (for example, in the Android N preview release)
> and what e2fsprogs's e4crypto is using.

I also worried about that before, but I thought there was no shipped
fs_encryption-enabled product.
Actually, f2fs has the same issue as well, since "f2fs:" was used before. :(

> If we want to use fscrypto: as a more general prefix, I could see
> doing that, but we need to provide for backwards compatibility ---
> which means that at least for ext4, we will need to look for keys
> using both the new and old prefix, and we would also want change
> e4crypto to set keys with both the "ext4" and the more general
> "fscrypto" prefix.

Got it. Let me add (*key_prefix(inode)) in fscrypt_operations so that filesystem
can give a specific prefix additionally.
Once fscrypto supports both of prefixes, does e4crypto have to set "fscrypto"?
The "ext4" should work all the time tho.

Thanks,

> 
> Cheers,
> 
>   - Ted

Re: better patch for linux/bitops.h

[Jeffrey Walton]

On Wed, May 4, 2016 at 11:50 PM, Theodore Ts'o  wrote:
> ...
> But instead of arguing over what works and doesn't, let's just create
> the the test set and just try it on a wide range of compilers and
> architectures, hmmm?

What are the requirements? Here's a short list:

  * No undefined behavior
- important because the compiler writers use the C standard
  * Compiles to native "rotate IMMEDIATE" if the rotate amount is a
"constant expression" and the machine provides it
- translates to a native rotate instruction if available
- "rotate IMM" can be 3 times faster than "rotate REG"
- do any architectures *not* provide a rotate?
  * Compiles to native "rotate REGISTER" if the rotate is variable and
the machine provides it
- do any architectures *not* provide a rotate?
  * Constant time
- important to high-integrity code
- Non-security code paths probably don't care

Maybe the first thing to do is provide a different rotates for the
constant-time requirement when its in effect?

Jeff

Re: better patch for linux/bitops.h

[Jeffrey Walton]

On Wed, May 4, 2016 at 11:50 PM, Theodore Ts'o  wrote:
> ...
> But instead of arguing over what works and doesn't, let's just create
> the the test set and just try it on a wide range of compilers and
> architectures, hmmm?

What are the requirements? Here's a short list:

  * No undefined behavior
- important because the compiler writers use the C standard
  * Compiles to native "rotate IMMEDIATE" if the rotate amount is a
"constant expression" and the machine provides it
- translates to a native rotate instruction if available
- "rotate IMM" can be 3 times faster than "rotate REG"
- do any architectures *not* provide a rotate?
  * Compiles to native "rotate REGISTER" if the rotate is variable and
the machine provides it
- do any architectures *not* provide a rotate?
  * Constant time
- important to high-integrity code
- Non-security code paths probably don't care

Maybe the first thing to do is provide a different rotates for the
constant-time requirement when its in effect?

Jeff

Re: better patch for linux/bitops.h

[Theodore Ts'o]

Instead of arguing over who's "sane" or "insane", can we come up with
a agreed upon set of tests, and a set of compiler and compiler
versions for which these tests must achieve at least *working* code?
Bonus points if they achieve optimal code, but what's important is
that for a wide range of GCC versions (from ancient RHEL distributions
to bleeding edge gcc 5.x compilers) this *must* work.

>From my perspective, clang and ICC producing corret code is a very
nice to have, but most shops I know of don't yet assume that clang
produces code that is trustworthy for production systems, although it
*is* great for as far as generating compiler warnings to find
potential bugs.

But instead of arguing over what works and doesn't, let's just create
the the test set and just try it on a wide range of compilers and
architectures, hmmm?

- Ted

Re: better patch for linux/bitops.h

[Theodore Ts'o]

Instead of arguing over who's "sane" or "insane", can we come up with
a agreed upon set of tests, and a set of compiler and compiler
versions for which these tests must achieve at least *working* code?
Bonus points if they achieve optimal code, but what's important is
that for a wide range of GCC versions (from ancient RHEL distributions
to bleeding edge gcc 5.x compilers) this *must* work.

>From my perspective, clang and ICC producing corret code is a very
nice to have, but most shops I know of don't yet assume that clang
produces code that is trustworthy for production systems, although it
*is* great for as far as generating compiler warnings to find
potential bugs.

But instead of arguing over what works and doesn't, let's just create
the the test set and just try it on a wide range of compilers and
architectures, hmmm?

- Ted

Re: better patch for linux/bitops.h

[Jeffrey Walton]

>>> So you are actually saying outright that we should sacrifice *actual*
>>portability in favor of *theoretical* portability?  What kind of
>>twilight zone did we just step into?!
>>
>>I'm not sure what you mean. It will be well defined on all platforms.
>>Clang may not recognize the pattern, which means they could run
>>slower. GCC and ICC will be fine.
>>
>>Slower but correct code is what you have to live with until the Clang
>>dev's fix their compiler.
>>
>>Its kind of like what Dr. Jon Bentley said: "If it doesn't have to be
>>correct, I can make it as fast as you'd like it to be".
>
> The current code works on all compilers we care about.  The code you propose 
> does not; it doesn't work on anything but very recent versions of our 
> flagship target compiler, and pretty your own admission might even cause 
> security hazards in the kernel if compiled on clang.

I'm not sure how you're arriving at the conclusion the code does not work.

> That qualifies as insane in my book.

OK, thanks.

I see the kernel is providing IPSec, SSL/TLS, etc. You can make
SSL/TLS run faster by using aNULL and eNULL.

Jeff

Re: [RFC v2 PATCH 0/8] VFS:userns: support portable root filesystems

[Andy Lutomirski]

On May 4, 2016 7:25 PM, "Dave Chinner"  wrote:
>
> On Wed, May 04, 2016 at 06:44:14PM -0700, Andy Lutomirski wrote:
> > On Wed, May 4, 2016 at 5:23 PM, Dave Chinner  wrote:
> > > On Wed, May 04, 2016 at 04:26:46PM +0200, Djalal Harouni wrote:
> > >> This is version 2 of the VFS:userns support portable root filesystems
> > >> RFC. Changes since version 1:
> > >>
> > >> * Update documentation and remove some ambiguity about the feature.
> > >>   Based on Josh Triplett comments.
> > >> * Use a new email address to send the RFC :-)
> > >>
> > >>
> > >> This RFC tries to explore how to support filesystem operations inside
> > >> user namespace using only VFS and a per mount namespace solution. This
> > >> allows to take advantage of user namespace separations without
> > >> introducing any change at the filesystems level. All this is handled
> > >> with the virtual view of mount namespaces.
> > >
> > > [...]
> > >
> > >> As an example if the mapping 0:65535 inside mount namespace and outside
> > >> is 100:1065536, then 0:65535 will be the range that we use to
> > >> construct UIDs/GIDs mapping into init_user_ns and use it for on-disk
> > >> data. They represent the persistent values that we want to write to the
> > >> disk. Therefore, we don't keep track of any UID/GID shift that was 
> > >> applied
> > >> before, it gives portability and allows to use the previous mapping
> > >> which was freed for another root filesystem...
> > >
> > > So let me get this straight. Two /isolated/ containers, different
> > > UID/GID mappings, sharing the same files and directories. Create a
> > > new file in a writeable directory in container 1, namespace
> > > information gets stripped from on-disk uid/gid representation.
> >
> > I think the intent is a totally separate superblock for each
> > container.  Djalal, am I right?
>
> I'm pretty sure you can't have multiple superblocks point to the
> same backing device. Each superblock would then think it's the sole
> owner of the filesystem and all we get out of that is incoherent
> caching and a corrupt on-disk filesystem.

I meant separate backing stores, too.

--Andy

>
> Cheers,
>
> Dave.
> --
> Dave Chinner
> da...@fromorbit.com

Re: better patch for linux/bitops.h

[Jeffrey Walton]

>>> So you are actually saying outright that we should sacrifice *actual*
>>portability in favor of *theoretical* portability?  What kind of
>>twilight zone did we just step into?!
>>
>>I'm not sure what you mean. It will be well defined on all platforms.
>>Clang may not recognize the pattern, which means they could run
>>slower. GCC and ICC will be fine.
>>
>>Slower but correct code is what you have to live with until the Clang
>>dev's fix their compiler.
>>
>>Its kind of like what Dr. Jon Bentley said: "If it doesn't have to be
>>correct, I can make it as fast as you'd like it to be".
>
> The current code works on all compilers we care about.  The code you propose 
> does not; it doesn't work on anything but very recent versions of our 
> flagship target compiler, and pretty your own admission might even cause 
> security hazards in the kernel if compiled on clang.

I'm not sure how you're arriving at the conclusion the code does not work.

> That qualifies as insane in my book.

OK, thanks.

I see the kernel is providing IPSec, SSL/TLS, etc. You can make
SSL/TLS run faster by using aNULL and eNULL.

Jeff

Re: [RFC v2 PATCH 0/8] VFS:userns: support portable root filesystems

[Andy Lutomirski]

On May 4, 2016 7:25 PM, "Dave Chinner"  wrote:
>
> On Wed, May 04, 2016 at 06:44:14PM -0700, Andy Lutomirski wrote:
> > On Wed, May 4, 2016 at 5:23 PM, Dave Chinner  wrote:
> > > On Wed, May 04, 2016 at 04:26:46PM +0200, Djalal Harouni wrote:
> > >> This is version 2 of the VFS:userns support portable root filesystems
> > >> RFC. Changes since version 1:
> > >>
> > >> * Update documentation and remove some ambiguity about the feature.
> > >>   Based on Josh Triplett comments.
> > >> * Use a new email address to send the RFC :-)
> > >>
> > >>
> > >> This RFC tries to explore how to support filesystem operations inside
> > >> user namespace using only VFS and a per mount namespace solution. This
> > >> allows to take advantage of user namespace separations without
> > >> introducing any change at the filesystems level. All this is handled
> > >> with the virtual view of mount namespaces.
> > >
> > > [...]
> > >
> > >> As an example if the mapping 0:65535 inside mount namespace and outside
> > >> is 100:1065536, then 0:65535 will be the range that we use to
> > >> construct UIDs/GIDs mapping into init_user_ns and use it for on-disk
> > >> data. They represent the persistent values that we want to write to the
> > >> disk. Therefore, we don't keep track of any UID/GID shift that was 
> > >> applied
> > >> before, it gives portability and allows to use the previous mapping
> > >> which was freed for another root filesystem...
> > >
> > > So let me get this straight. Two /isolated/ containers, different
> > > UID/GID mappings, sharing the same files and directories. Create a
> > > new file in a writeable directory in container 1, namespace
> > > information gets stripped from on-disk uid/gid representation.
> >
> > I think the intent is a totally separate superblock for each
> > container.  Djalal, am I right?
>
> I'm pretty sure you can't have multiple superblocks point to the
> same backing device. Each superblock would then think it's the sole
> owner of the filesystem and all we get out of that is incoherent
> caching and a corrupt on-disk filesystem.

I meant separate backing stores, too.

--Andy

>
> Cheers,
>
> Dave.
> --
> Dave Chinner
> da...@fromorbit.com

Re: [PATCH 3/3] x86-32: Remove asmlinkage_protect

[Andy Lutomirski]

On Wed, May 4, 2016 at 7:44 PM, Brian Gerst  wrote:
> Now that syscalls are called from C code, which copies the args to new stack
> slots instead of overlaying pt_regs, asmlinkage_protect is no longer needed.

Acked-by: Andy Lutomirski 

asmlinkage_protect was pretty gross...

--Andy

Re: [PATCH 3/3] x86-32: Remove asmlinkage_protect

[Andy Lutomirski]

On Wed, May 4, 2016 at 7:44 PM, Brian Gerst  wrote:
> Now that syscalls are called from C code, which copies the args to new stack
> slots instead of overlaying pt_regs, asmlinkage_protect is no longer needed.

Acked-by: Andy Lutomirski 

asmlinkage_protect was pretty gross...

--Andy

Re: [PATCH 2/3] x86-32: Remove GET_THREAD_INFO from entry code

[Andy Lutomirski]

On Wed, May 4, 2016 at 7:44 PM, Brian Gerst  wrote:
> The entry code used to cache the thread_info pointer in the EBP register, but
> all the code that used it has been moved to C.  Remove the unused code to
> get the pointer.

Acked-by: Andy Lutomirski 

[PATCH] ION: Sys_heap: Makes ion buffer always alloc from page pool

[Chen Feng]

Makes the ion buffer always alloced from page pool, no matter
it's cached or not. In this way, it can improve the efficiency
of it.

Currently, there is no difference from cached or non-cached buffer
for the page pool.

Signed-off-by: Chen Feng 
---
 drivers/staging/android/ion/ion_system_heap.c | 19 ++-
 1 file changed, 2 insertions(+), 17 deletions(-)

diff --git a/drivers/staging/android/ion/ion_system_heap.c 
b/drivers/staging/android/ion/ion_system_heap.c
index b69dfc7..caf11fc 100644
--- a/drivers/staging/android/ion/ion_system_heap.c
+++ b/drivers/staging/android/ion/ion_system_heap.c
@@ -56,24 +56,10 @@ static struct page *alloc_buffer_page(struct 
ion_system_heap *heap,
  struct ion_buffer *buffer,
  unsigned long order)
 {
-   bool cached = ion_buffer_cached(buffer);
struct ion_page_pool *pool = heap->pools[order_to_index(order)];
struct page *page;
 
-   if (!cached) {
-   page = ion_page_pool_alloc(pool);
-   } else {
-   gfp_t gfp_flags = low_order_gfp_flags;
-
-   if (order > 4)
-   gfp_flags = high_order_gfp_flags;
-   page = alloc_pages(gfp_flags | __GFP_COMP, order);
-   if (!page)
-   return NULL;
-   ion_pages_sync_for_device(NULL, page, PAGE_SIZE << order,
-   DMA_BIDIRECTIONAL);
-   }
-
+   page = ion_page_pool_alloc(pool);
return page;
 }
 
@@ -81,9 +67,8 @@ static void free_buffer_page(struct ion_system_heap *heap,
 struct ion_buffer *buffer, struct page *page)
 {
unsigned int order = compound_order(page);
-   bool cached = ion_buffer_cached(buffer);
 
-   if (!cached && !(buffer->private_flags & ION_PRIV_FLAG_SHRINKER_FREE)) {
+   if (!(buffer->private_flags & ION_PRIV_FLAG_SHRINKER_FREE)) {
struct ion_page_pool *pool = heap->pools[order_to_index(order)];
 
ion_page_pool_free(pool, page);
-- 
1.9.1

Re: [PATCH 2/3] x86-32: Remove GET_THREAD_INFO from entry code

[Andy Lutomirski]

On Wed, May 4, 2016 at 7:44 PM, Brian Gerst  wrote:
> The entry code used to cache the thread_info pointer in the EBP register, but
> all the code that used it has been moved to C.  Remove the unused code to
> get the pointer.

Acked-by: Andy Lutomirski 

[PATCH] ION: Sys_heap: Makes ion buffer always alloc from page pool

[Chen Feng]

Makes the ion buffer always alloced from page pool, no matter
it's cached or not. In this way, it can improve the efficiency
of it.

Currently, there is no difference from cached or non-cached buffer
for the page pool.

Signed-off-by: Chen Feng 
---
 drivers/staging/android/ion/ion_system_heap.c | 19 ++-
 1 file changed, 2 insertions(+), 17 deletions(-)

diff --git a/drivers/staging/android/ion/ion_system_heap.c 
b/drivers/staging/android/ion/ion_system_heap.c
index b69dfc7..caf11fc 100644
--- a/drivers/staging/android/ion/ion_system_heap.c
+++ b/drivers/staging/android/ion/ion_system_heap.c
@@ -56,24 +56,10 @@ static struct page *alloc_buffer_page(struct 
ion_system_heap *heap,
  struct ion_buffer *buffer,
  unsigned long order)
 {
-   bool cached = ion_buffer_cached(buffer);
struct ion_page_pool *pool = heap->pools[order_to_index(order)];
struct page *page;
 
-   if (!cached) {
-   page = ion_page_pool_alloc(pool);
-   } else {
-   gfp_t gfp_flags = low_order_gfp_flags;
-
-   if (order > 4)
-   gfp_flags = high_order_gfp_flags;
-   page = alloc_pages(gfp_flags | __GFP_COMP, order);
-   if (!page)
-   return NULL;
-   ion_pages_sync_for_device(NULL, page, PAGE_SIZE << order,
-   DMA_BIDIRECTIONAL);
-   }
-
+   page = ion_page_pool_alloc(pool);
return page;
 }
 
@@ -81,9 +67,8 @@ static void free_buffer_page(struct ion_system_heap *heap,
 struct ion_buffer *buffer, struct page *page)
 {
unsigned int order = compound_order(page);
-   bool cached = ion_buffer_cached(buffer);
 
-   if (!cached && !(buffer->private_flags & ION_PRIV_FLAG_SHRINKER_FREE)) {
+   if (!(buffer->private_flags & ION_PRIV_FLAG_SHRINKER_FREE)) {
struct ion_page_pool *pool = heap->pools[order_to_index(order)];
 
ion_page_pool_free(pool, page);
-- 
1.9.1

Re: [PATCH 1/3] x86: Don't save/restore EFLAGS on task switch

[Andy Lutomirski]

On Wed, May 4, 2016 at 7:44 PM, Brian Gerst  wrote:
> Now that NT is filtered by the SYSENTER entry code, it is safe to skip saving 
> and
> restoring flags on task switch.  Also remove a leftover reset of flags on 
> 64-bit
> fork.

Acked-by: Andy Lutomirski 

Re: [PATCH 1/3] x86: Don't save/restore EFLAGS on task switch

[Andy Lutomirski]

On Wed, May 4, 2016 at 7:44 PM, Brian Gerst  wrote:
> Now that NT is filtered by the SYSENTER entry code, it is safe to skip saving 
> and
> restoring flags on task switch.  Also remove a leftover reset of flags on 
> 64-bit
> fork.

Acked-by: Andy Lutomirski 

Re: [PATCH v3 01/11] of: Add bindings of hw throttle for Tegra soctherm

[Wei Ni]

On 2016年05月04日 21:35, Rob Herring wrote:
> On Tue, May 03, 2016 at 06:13:20PM +0800, Wei Ni wrote:
>> Add HW throttle configuration sub-node for soctherm, which
>> is used to describe the throttle event, and worked as a
>> cooling device. The "hot" type trip in thermal zone can
>> be bound to this cooling device, and trigger the throttle
>> function.
>>
>> Signed-off-by: Wei Ni 
>> ---
>>  .../bindings/thermal/nvidia,tegra124-soctherm.txt  | 120 
>> -
>>  1 file changed, 118 insertions(+), 2 deletions(-)
>>
>> diff --git 
>> a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt 
>> b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt
>> index edebfa0a985e..6ba8ae3f59ed 100644
>> --- a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt
>> +++ b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt
>> @@ -10,8 +10,14 @@ Required properties :
>>  - compatible : For Tegra124, must contain "nvidia,tegra124-soctherm".
>>For Tegra132, must contain "nvidia,tegra132-soctherm".
>>For Tegra210, must contain "nvidia,tegra210-soctherm".
>> -- reg : Should contain 1 entry:
>> +- reg : Should contain at least 2 entries for each entry in reg-names:
>>- SOCTHERM register set
>> +  - Tegra CAR register set: Required for Tegra124 and Tegra210.
>> +  - CCROC register set: Required for Tegra132.
>> +- reg-names :  Should contain at least 2 entries:
>> +  - soctherm-reg
>> +  - car-reg
>> +  - ccroc-reg
>>  - interrupts : Defines the interrupt used by SOCTHERM
>>  - clocks : Must contain an entry for each entry in clock-names.
>>See ../clocks/clock-bindings.txt for details.
>> @@ -25,17 +31,44 @@ Required properties :
>>  - #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
>>  of this property. See  for a
>>  list of valid values when referring to thermal sensors.
>> +- nvidia,throttle-cfgs: A sub-node which is a container of configuration for
>> +each hardware throttle events. These events can be set as cooling 
>> devices.
>> +  * throttle events: Sub-nodes must be named as "nvidia,light" or 
>> "nvidia,heavy".
>> +  Properties:
>> +  - nvidia,priority: Each throttles has its own throttle settings, so 
>> the
>> +SW need to set priorities for various throttle, the HW arbiter can 
>> select
>> +the final throttle settings.
>> +Bigger value indicates higher priority, In general, higher priority
>> +translates to lower target frequency. SW needs to ensure that 
>> critical
>> +thermal alarms are given higher priority, and ensure that there is
>> +no race if priority of two vectors is set to the same value.
> 
> What are valid range of values?

The valid range is 1~100, will update it.

> 
>> +  - nvidia,cpu-throt-depth:  This property is for Tegra124 and Tegra210.
>> +It is the throttling depth of pulse skippers, it's the percentage
>> +throttling.
> 
> Add unit suffix (-percent)

Will change to "nvidia,cpu-throt-percent".

> 
>> +  - nvidia,cpu-throt-level: This property is only for Tegra132, it is 
>> the
>> +level of pulse skippers, which used to throttle clock frequencies. 
>> It
>> +indicates cpu clock throttling depth, and the depth can be 
>> programmed.
>> +Must set as following values:
>> +TEGRA_SOCTHERM_THROT_LEVEL_LOW, TEGRA_SOCTHERM_THROT_LEVEL_MED
>> +TEGRA_SOCTHERM_THROT_LEVEL_HIGH, TEGRA_SOCTHERM_THROT_LEVEL_NONE
>> +  - #cooling-cells: Should be 1. This cooling device only support 
>> on/off state.
>> +See ./thermal.txt for a description of this property.
>>  
>>  Note:
>>  - the "critical" type trip points will be set to SOC_THERM hardware as the
>>  shut down temperature. Once the temperature of this thermal zone is higher
>>  than it, the system will be shutdown or reset by hardware.
>> +- the "hot" type trip points will be set to SOC_THERM hardware as the 
>> throttle
>> +temperature. Once the the temperature of this thermal zone is higher
>> +than it, it will trigger the HW throttle event.
>>  
>>  Example :
>>  
>>  soctherm@700e2000 {
>>  compatible = "nvidia,tegra124-soctherm";
>> -reg = <0x0 0x700e2000 0x0 0x1000>;
>> +reg = <0x0 0x700e2000 0x0 0x600  /* SOC_THERM reg_base */
>> +0x0 0x60006000 0x0 0x400 /* CAR reg_base */
>> +reg-names = "soctherm-reg", "car-reg";
>>  interrupts = ;
>>  clocks = <_car TEGRA124_CLK_TSENSOR>,
>>  <_car TEGRA124_CLK_SOC_THERM>;
>> @@ -44,6 +77,76 @@ Example :
>>  reset-names = "soctherm";
>>  
>>  #thermal-sensor-cells = <1>;
>> +
>> +nvidia,throttle-cfgs {
> 
> Drop the vendor prefix in node names.

Will do it.

> 
>> +/*
>> + * When the "heavy" cooling device triggered,
>> +

Re: [PATCH v3 01/11] of: Add bindings of hw throttle for Tegra soctherm

[Wei Ni]

On 2016年05月04日 21:35, Rob Herring wrote:
> On Tue, May 03, 2016 at 06:13:20PM +0800, Wei Ni wrote:
>> Add HW throttle configuration sub-node for soctherm, which
>> is used to describe the throttle event, and worked as a
>> cooling device. The "hot" type trip in thermal zone can
>> be bound to this cooling device, and trigger the throttle
>> function.
>>
>> Signed-off-by: Wei Ni 
>> ---
>>  .../bindings/thermal/nvidia,tegra124-soctherm.txt  | 120 
>> -
>>  1 file changed, 118 insertions(+), 2 deletions(-)
>>
>> diff --git 
>> a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt 
>> b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt
>> index edebfa0a985e..6ba8ae3f59ed 100644
>> --- a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt
>> +++ b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt
>> @@ -10,8 +10,14 @@ Required properties :
>>  - compatible : For Tegra124, must contain "nvidia,tegra124-soctherm".
>>For Tegra132, must contain "nvidia,tegra132-soctherm".
>>For Tegra210, must contain "nvidia,tegra210-soctherm".
>> -- reg : Should contain 1 entry:
>> +- reg : Should contain at least 2 entries for each entry in reg-names:
>>- SOCTHERM register set
>> +  - Tegra CAR register set: Required for Tegra124 and Tegra210.
>> +  - CCROC register set: Required for Tegra132.
>> +- reg-names :  Should contain at least 2 entries:
>> +  - soctherm-reg
>> +  - car-reg
>> +  - ccroc-reg
>>  - interrupts : Defines the interrupt used by SOCTHERM
>>  - clocks : Must contain an entry for each entry in clock-names.
>>See ../clocks/clock-bindings.txt for details.
>> @@ -25,17 +31,44 @@ Required properties :
>>  - #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
>>  of this property. See  for a
>>  list of valid values when referring to thermal sensors.
>> +- nvidia,throttle-cfgs: A sub-node which is a container of configuration for
>> +each hardware throttle events. These events can be set as cooling 
>> devices.
>> +  * throttle events: Sub-nodes must be named as "nvidia,light" or 
>> "nvidia,heavy".
>> +  Properties:
>> +  - nvidia,priority: Each throttles has its own throttle settings, so 
>> the
>> +SW need to set priorities for various throttle, the HW arbiter can 
>> select
>> +the final throttle settings.
>> +Bigger value indicates higher priority, In general, higher priority
>> +translates to lower target frequency. SW needs to ensure that 
>> critical
>> +thermal alarms are given higher priority, and ensure that there is
>> +no race if priority of two vectors is set to the same value.
> 
> What are valid range of values?

The valid range is 1~100, will update it.

> 
>> +  - nvidia,cpu-throt-depth:  This property is for Tegra124 and Tegra210.
>> +It is the throttling depth of pulse skippers, it's the percentage
>> +throttling.
> 
> Add unit suffix (-percent)

Will change to "nvidia,cpu-throt-percent".

> 
>> +  - nvidia,cpu-throt-level: This property is only for Tegra132, it is 
>> the
>> +level of pulse skippers, which used to throttle clock frequencies. 
>> It
>> +indicates cpu clock throttling depth, and the depth can be 
>> programmed.
>> +Must set as following values:
>> +TEGRA_SOCTHERM_THROT_LEVEL_LOW, TEGRA_SOCTHERM_THROT_LEVEL_MED
>> +TEGRA_SOCTHERM_THROT_LEVEL_HIGH, TEGRA_SOCTHERM_THROT_LEVEL_NONE
>> +  - #cooling-cells: Should be 1. This cooling device only support 
>> on/off state.
>> +See ./thermal.txt for a description of this property.
>>  
>>  Note:
>>  - the "critical" type trip points will be set to SOC_THERM hardware as the
>>  shut down temperature. Once the temperature of this thermal zone is higher
>>  than it, the system will be shutdown or reset by hardware.
>> +- the "hot" type trip points will be set to SOC_THERM hardware as the 
>> throttle
>> +temperature. Once the the temperature of this thermal zone is higher
>> +than it, it will trigger the HW throttle event.
>>  
>>  Example :
>>  
>>  soctherm@700e2000 {
>>  compatible = "nvidia,tegra124-soctherm";
>> -reg = <0x0 0x700e2000 0x0 0x1000>;
>> +reg = <0x0 0x700e2000 0x0 0x600  /* SOC_THERM reg_base */
>> +0x0 0x60006000 0x0 0x400 /* CAR reg_base */
>> +reg-names = "soctherm-reg", "car-reg";
>>  interrupts = ;
>>  clocks = <_car TEGRA124_CLK_TSENSOR>,
>>  <_car TEGRA124_CLK_SOC_THERM>;
>> @@ -44,6 +77,76 @@ Example :
>>  reset-names = "soctherm";
>>  
>>  #thermal-sensor-cells = <1>;
>> +
>> +nvidia,throttle-cfgs {
> 
> Drop the vendor prefix in node names.

Will do it.

> 
>> +/*
>> + * When the "heavy" cooling device triggered,
>> + * the HW 

[v10, 7/7] mmc: sdhci-of-esdhc: fix host version for T4240-R1.0-R2.0

[Yangbo Lu]

The eSDHC of T4240-R1.0-R2.0 has incorrect vender version and spec version.
Acturally the right version numbers should be VVN=0x13 and SVN = 0x1.
This patch adds the GUTS driver support for eSDHC driver to get SVR(System
version register). And fix host version to avoid that incorrect version
numbers break down the ADMA data transfer.

Signed-off-by: Yangbo Lu 
Acked-by: Ulf Hansson 
Acked-by: Scott Wood 
---
Changes for v2:
- Got SVR through iomap instead of dts
Changes for v3:
- Managed GUTS through syscon instead of iomap in eSDHC driver
Changes for v4:
- Got SVR by GUTS driver instead of SYSCON
Changes for v5:
- Changed to get SVR through API fsl_guts_get_svr()
- Combined patch 4, patch 5 and patch 6 into one
Changes for v6:
- Added 'Acked-by: Ulf Hansson'
Changes for v7:
- None
Changes for v8:
- Added 'Acked-by: Scott Wood'
Changes for v9:
- None
Changes for v10:
- None
---
 drivers/mmc/host/Kconfig  |  1 +
 drivers/mmc/host/sdhci-of-esdhc.c | 23 +++
 2 files changed, 24 insertions(+)

diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 0aa484c..e15e836 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -143,6 +143,7 @@ config MMC_SDHCI_OF_ESDHC
depends on MMC_SDHCI_PLTFM
depends on PPC || ARCH_MXC || ARCH_LAYERSCAPE
select MMC_SDHCI_IO_ACCESSORS
+   select FSL_GUTS
help
  This selects the Freescale eSDHC controller support.
 
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c 
b/drivers/mmc/host/sdhci-of-esdhc.c
index 3f34d35..68cc020 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -18,6 +18,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include "sdhci-pltfm.h"
 #include "sdhci-esdhc.h"
@@ -28,6 +30,8 @@
 struct sdhci_esdhc {
u8 vendor_ver;
u8 spec_ver;
+   u32 soc_ver;
+   u8 soc_rev;
 };
 
 /**
@@ -73,6 +77,8 @@ static u32 esdhc_readl_fixup(struct sdhci_host *host,
 static u16 esdhc_readw_fixup(struct sdhci_host *host,
 int spec_reg, u32 value)
 {
+   struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+   struct sdhci_esdhc *esdhc = sdhci_pltfm_priv(pltfm_host);
u16 ret;
int shift = (spec_reg & 0x2) * 8;
 
@@ -80,6 +86,13 @@ static u16 esdhc_readw_fixup(struct sdhci_host *host,
ret = value & 0x;
else
ret = (value >> shift) & 0x;
+
+   /* Workaround for T4240-R1.0-R2.0 eSDHC which has incorrect
+* vendor version and spec version information.
+*/
+   if ((spec_reg == SDHCI_HOST_VERSION) &&
+   (esdhc->soc_ver == SVR_T4240) && (esdhc->soc_rev <= 0x20))
+   ret = (VENDOR_V_23 << SDHCI_VENDOR_VER_SHIFT) | SDHCI_SPEC_200;
return ret;
 }
 
@@ -567,10 +580,20 @@ static void esdhc_init(struct platform_device *pdev, 
struct sdhci_host *host)
struct sdhci_pltfm_host *pltfm_host;
struct sdhci_esdhc *esdhc;
u16 host_ver;
+   u32 svr;
 
pltfm_host = sdhci_priv(host);
esdhc = sdhci_pltfm_priv(pltfm_host);
 
+   fsl_guts_init();
+   svr = fsl_guts_get_svr();
+   if (svr) {
+   esdhc->soc_ver = SVR_SOC_VER(svr);
+   esdhc->soc_rev = SVR_REV(svr);
+   } else {
+   dev_err(>dev, "Failed to get SVR value!\n");
+   }
+
host_ver = sdhci_readw(host, SDHCI_HOST_VERSION);
esdhc->vendor_ver = (host_ver & SDHCI_VENDOR_VER_MASK) >>
 SDHCI_VENDOR_VER_SHIFT;
-- 
2.1.0.27.g96db324

[v10, 7/7] mmc: sdhci-of-esdhc: fix host version for T4240-R1.0-R2.0

[Yangbo Lu]

The eSDHC of T4240-R1.0-R2.0 has incorrect vender version and spec version.
Acturally the right version numbers should be VVN=0x13 and SVN = 0x1.
This patch adds the GUTS driver support for eSDHC driver to get SVR(System
version register). And fix host version to avoid that incorrect version
numbers break down the ADMA data transfer.

Signed-off-by: Yangbo Lu 
Acked-by: Ulf Hansson 
Acked-by: Scott Wood 
---
Changes for v2:
- Got SVR through iomap instead of dts
Changes for v3:
- Managed GUTS through syscon instead of iomap in eSDHC driver
Changes for v4:
- Got SVR by GUTS driver instead of SYSCON
Changes for v5:
- Changed to get SVR through API fsl_guts_get_svr()
- Combined patch 4, patch 5 and patch 6 into one
Changes for v6:
- Added 'Acked-by: Ulf Hansson'
Changes for v7:
- None
Changes for v8:
- Added 'Acked-by: Scott Wood'
Changes for v9:
- None
Changes for v10:
- None
---
 drivers/mmc/host/Kconfig  |  1 +
 drivers/mmc/host/sdhci-of-esdhc.c | 23 +++
 2 files changed, 24 insertions(+)

diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 0aa484c..e15e836 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -143,6 +143,7 @@ config MMC_SDHCI_OF_ESDHC
depends on MMC_SDHCI_PLTFM
depends on PPC || ARCH_MXC || ARCH_LAYERSCAPE
select MMC_SDHCI_IO_ACCESSORS
+   select FSL_GUTS
help
  This selects the Freescale eSDHC controller support.
 
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c 
b/drivers/mmc/host/sdhci-of-esdhc.c
index 3f34d35..68cc020 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -18,6 +18,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include "sdhci-pltfm.h"
 #include "sdhci-esdhc.h"
@@ -28,6 +30,8 @@
 struct sdhci_esdhc {
u8 vendor_ver;
u8 spec_ver;
+   u32 soc_ver;
+   u8 soc_rev;
 };
 
 /**
@@ -73,6 +77,8 @@ static u32 esdhc_readl_fixup(struct sdhci_host *host,
 static u16 esdhc_readw_fixup(struct sdhci_host *host,
 int spec_reg, u32 value)
 {
+   struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+   struct sdhci_esdhc *esdhc = sdhci_pltfm_priv(pltfm_host);
u16 ret;
int shift = (spec_reg & 0x2) * 8;
 
@@ -80,6 +86,13 @@ static u16 esdhc_readw_fixup(struct sdhci_host *host,
ret = value & 0x;
else
ret = (value >> shift) & 0x;
+
+   /* Workaround for T4240-R1.0-R2.0 eSDHC which has incorrect
+* vendor version and spec version information.
+*/
+   if ((spec_reg == SDHCI_HOST_VERSION) &&
+   (esdhc->soc_ver == SVR_T4240) && (esdhc->soc_rev <= 0x20))
+   ret = (VENDOR_V_23 << SDHCI_VENDOR_VER_SHIFT) | SDHCI_SPEC_200;
return ret;
 }
 
@@ -567,10 +580,20 @@ static void esdhc_init(struct platform_device *pdev, 
struct sdhci_host *host)
struct sdhci_pltfm_host *pltfm_host;
struct sdhci_esdhc *esdhc;
u16 host_ver;
+   u32 svr;
 
pltfm_host = sdhci_priv(host);
esdhc = sdhci_pltfm_priv(pltfm_host);
 
+   fsl_guts_init();
+   svr = fsl_guts_get_svr();
+   if (svr) {
+   esdhc->soc_ver = SVR_SOC_VER(svr);
+   esdhc->soc_rev = SVR_REV(svr);
+   } else {
+   dev_err(>dev, "Failed to get SVR value!\n");
+   }
+
host_ver = sdhci_readw(host, SDHCI_HOST_VERSION);
esdhc->vendor_ver = (host_ver & SDHCI_VENDOR_VER_MASK) >>
 SDHCI_VENDOR_VER_SHIFT;
-- 
2.1.0.27.g96db324

[v10, 4/7] dt: move guts devicetree doc out of powerpc directory

[Yangbo Lu]

Move guts devicetree doc to Documentation/devicetree/bindings/soc/fsl/
since it's used by not only PowerPC but also ARM. And add a specification
for 'little-endian' property.

Signed-off-by: Yangbo Lu 
Acked-by: Scott Wood 
Acked-by: Rob Herring 
---
Changes for v4:
- Added this patch
Changes for v5:
- Modified the description for little-endian property
Changes for v6:
- None
Changes for v7:
- None
Changes for v8:
- Added 'Acked-by: Scott Wood'
- Added 'Acked-by: Rob Herring'
Changes for v9:
- None
Changes for v10:
- None
---
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/guts.txt | 3 +++
 1 file changed, 3 insertions(+)
 rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/guts.txt (91%)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/guts.txt 
b/Documentation/devicetree/bindings/soc/fsl/guts.txt
similarity index 91%
rename from Documentation/devicetree/bindings/powerpc/fsl/guts.txt
rename to Documentation/devicetree/bindings/soc/fsl/guts.txt
index b71b203..07adca9 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/guts.txt
+++ b/Documentation/devicetree/bindings/soc/fsl/guts.txt
@@ -25,6 +25,9 @@ Recommended properties:
  - fsl,liodn-bits : Indicates the number of defined bits in the LIODN
registers, for those SOCs that have a PAMU device.
 
+ - little-endian : Indicates that the global utilities block is little
+   endian. The default is big endian.
+
 Examples:
global-utilities@e {/* global utilities block */
compatible = "fsl,mpc8548-guts";
-- 
2.1.0.27.g96db324

[v10, 4/7] dt: move guts devicetree doc out of powerpc directory

[Yangbo Lu]

Move guts devicetree doc to Documentation/devicetree/bindings/soc/fsl/
since it's used by not only PowerPC but also ARM. And add a specification
for 'little-endian' property.

Signed-off-by: Yangbo Lu 
Acked-by: Scott Wood 
Acked-by: Rob Herring 
---
Changes for v4:
- Added this patch
Changes for v5:
- Modified the description for little-endian property
Changes for v6:
- None
Changes for v7:
- None
Changes for v8:
- Added 'Acked-by: Scott Wood'
- Added 'Acked-by: Rob Herring'
Changes for v9:
- None
Changes for v10:
- None
---
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/guts.txt | 3 +++
 1 file changed, 3 insertions(+)
 rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/guts.txt (91%)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/guts.txt 
b/Documentation/devicetree/bindings/soc/fsl/guts.txt
similarity index 91%
rename from Documentation/devicetree/bindings/powerpc/fsl/guts.txt
rename to Documentation/devicetree/bindings/soc/fsl/guts.txt
index b71b203..07adca9 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/guts.txt
+++ b/Documentation/devicetree/bindings/soc/fsl/guts.txt
@@ -25,6 +25,9 @@ Recommended properties:
  - fsl,liodn-bits : Indicates the number of defined bits in the LIODN
registers, for those SOCs that have a PAMU device.
 
+ - little-endian : Indicates that the global utilities block is little
+   endian. The default is big endian.
+
 Examples:
global-utilities@e {/* global utilities block */
compatible = "fsl,mpc8548-guts";
-- 
2.1.0.27.g96db324

[v10, 6/7] MAINTAINERS: add entry for Freescale SoC drivers

[Yangbo Lu]

Add maintainer entry for Freescale SoC drivers including
the QE library and the GUTS driver now. Also add maintainer
for QE library.

Signed-off-by: Yangbo Lu 
Acked-by: Scott Wood 
Acked-by: Qiang Zhao 
---
Changes for v8:
- Added this patch
Changes for v9:
- Added linux-arm mail list
- Removed GUTS driver entry
Changes for v10:
- Changed 'DRIVER' to 'DRIVERS'
- Added 'Acked-by' of Scott and Qiang
---
 MAINTAINERS | 11 ++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 42e65d1..85c4b8b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4622,9 +4622,18 @@ F:   drivers/net/ethernet/freescale/fec_ptp.c
 F: drivers/net/ethernet/freescale/fec.h
 F: Documentation/devicetree/bindings/net/fsl-fec.txt
 
+FREESCALE SOC DRIVERS
+M: Scott Wood 
+L: linuxppc-...@lists.ozlabs.org
+L: linux-arm-ker...@lists.infradead.org
+S: Maintained
+F: drivers/soc/fsl/
+F: include/linux/fsl/
+
 FREESCALE QUICC ENGINE LIBRARY
+M: Qiang Zhao 
 L: linuxppc-...@lists.ozlabs.org
-S: Orphan
+S: Maintained
 F: drivers/soc/fsl/qe/
 F: include/soc/fsl/*qe*.h
 F: include/soc/fsl/*ucc*.h
-- 
2.1.0.27.g96db324

[v10, 1/7] Documentation: DT: update Freescale DCFG compatible

[Yangbo Lu]

Update Freescale DCFG compatible with 'fsl,-dcfg' instead
of 'fsl,ls1021a-dcfg' to include more chips such as ls1021a,
ls1043a, and ls2080a.

Signed-off-by: Yangbo Lu 
---
Changes for v8:
- Added this patch
Changes for v9:
- Added a list for the possible compatibles
Changes for v10:
- None
---
 Documentation/devicetree/bindings/arm/fsl.txt | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/fsl.txt 
b/Documentation/devicetree/bindings/arm/fsl.txt
index 752a685..465cba1 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -119,7 +119,11 @@ Freescale DCFG
 configuration and status for the device. Such as setting the secondary
 core start address and release the secondary core from holdoff and startup.
   Required properties:
-  - compatible: should be "fsl,ls1021a-dcfg"
+  - compatible: should be "fsl,-dcfg"
+Possible compatibles:
+   "fsl,ls1021a-dcfg"
+   "fsl,ls1043a-dcfg"
+   "fsl,ls2080a-dcfg"
   - reg : should contain base address and length of DCFG memory-mapped 
registers
 
 Example:
-- 
2.1.0.27.g96db324