Re: [RFC v6 07/62] powerpc: use helper functions in __hash_page_huge() for 64K PTE

2017-07-19 Thread Aneesh Kumar K.V
Ram Pai  writes:

> replace redundant code in __hash_page_huge() with helper
> functions pte_get_hash_gslot() and pte_set_hash_slot()
>

Can you fold all the helper function usage into one patch ?


> Signed-off-by: Ram Pai 
> ---
>  arch/powerpc/mm/hugetlbpage-hash64.c |   24 
>  1 files changed, 4 insertions(+), 20 deletions(-)
>
> diff --git a/arch/powerpc/mm/hugetlbpage-hash64.c 
> b/arch/powerpc/mm/hugetlbpage-hash64.c
> index 6f7aee3..e6dcd50 100644
> --- a/arch/powerpc/mm/hugetlbpage-hash64.c
> +++ b/arch/powerpc/mm/hugetlbpage-hash64.c
> @@ -23,7 +23,6 @@ int __hash_page_huge(unsigned long ea, unsigned long 
> access, unsigned long vsid,
>int ssize, unsigned int shift, unsigned int mmu_psize)
>  {
>   real_pte_t rpte;
> - unsigned long *hidxp;
>   unsigned long vpn;
>   unsigned long old_pte, new_pte;
>   unsigned long rflags, pa, sz;
> @@ -74,16 +73,10 @@ int __hash_page_huge(unsigned long ea, unsigned long 
> access, unsigned long vsid,
>   /* Check if pte already has an hpte (case 2) */
>   if (unlikely(old_pte & H_PAGE_HASHPTE)) {
>   /* There MIGHT be an HPTE for this pte */
> - unsigned long hash, slot, hidx;
> + unsigned long gslot;
>
> - hash = hpt_hash(vpn, shift, ssize);
> - hidx = __rpte_to_hidx(rpte, 0);
> - if (hidx & _PTEIDX_SECONDARY)
> - hash = ~hash;
> - slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
> - slot += hidx & _PTEIDX_GROUP_IX;
> -
> - if (mmu_hash_ops.hpte_updatepp(slot, rflags, vpn, mmu_psize,
> + gslot = pte_get_hash_gslot(vpn, shift, ssize, rpte, 0);
> + if (mmu_hash_ops.hpte_updatepp(gslot, rflags, vpn, mmu_psize,
>  mmu_psize, ssize, flags) == -1)
>   old_pte &= ~_PAGE_HPTEFLAGS;
>   }
> @@ -110,16 +103,7 @@ int __hash_page_huge(unsigned long ea, unsigned long 
> access, unsigned long vsid,
>   return -1;
>   }
>
> - /*
> -  * Insert slot number & secondary bit in PTE second half.
> -  */
> - hidxp = (unsigned long *)(ptep + PTRS_PER_PTE);
> - rpte.hidx &= ~(0xfUL);
> - *hidxp = rpte.hidx  | (slot & 0xfUL);
> - /*
> -  * check __real_pte for details on matching smp_rmb()
> -  */
> - smp_wmb();
> + new_pte |= pte_set_hash_slot(ptep, rpte, 0, slot);
>   }
>
>   /*
> -- 
> 1.7.1



Re: [RFC v6 07/62] powerpc: use helper functions in __hash_page_huge() for 64K PTE

2017-07-19 Thread Aneesh Kumar K.V
Ram Pai  writes:

> replace redundant code in __hash_page_huge() with helper
> functions pte_get_hash_gslot() and pte_set_hash_slot()
>

Can you fold all the helper function usage into one patch ?


> Signed-off-by: Ram Pai 
> ---
>  arch/powerpc/mm/hugetlbpage-hash64.c |   24 
>  1 files changed, 4 insertions(+), 20 deletions(-)
>
> diff --git a/arch/powerpc/mm/hugetlbpage-hash64.c 
> b/arch/powerpc/mm/hugetlbpage-hash64.c
> index 6f7aee3..e6dcd50 100644
> --- a/arch/powerpc/mm/hugetlbpage-hash64.c
> +++ b/arch/powerpc/mm/hugetlbpage-hash64.c
> @@ -23,7 +23,6 @@ int __hash_page_huge(unsigned long ea, unsigned long 
> access, unsigned long vsid,
>int ssize, unsigned int shift, unsigned int mmu_psize)
>  {
>   real_pte_t rpte;
> - unsigned long *hidxp;
>   unsigned long vpn;
>   unsigned long old_pte, new_pte;
>   unsigned long rflags, pa, sz;
> @@ -74,16 +73,10 @@ int __hash_page_huge(unsigned long ea, unsigned long 
> access, unsigned long vsid,
>   /* Check if pte already has an hpte (case 2) */
>   if (unlikely(old_pte & H_PAGE_HASHPTE)) {
>   /* There MIGHT be an HPTE for this pte */
> - unsigned long hash, slot, hidx;
> + unsigned long gslot;
>
> - hash = hpt_hash(vpn, shift, ssize);
> - hidx = __rpte_to_hidx(rpte, 0);
> - if (hidx & _PTEIDX_SECONDARY)
> - hash = ~hash;
> - slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
> - slot += hidx & _PTEIDX_GROUP_IX;
> -
> - if (mmu_hash_ops.hpte_updatepp(slot, rflags, vpn, mmu_psize,
> + gslot = pte_get_hash_gslot(vpn, shift, ssize, rpte, 0);
> + if (mmu_hash_ops.hpte_updatepp(gslot, rflags, vpn, mmu_psize,
>  mmu_psize, ssize, flags) == -1)
>   old_pte &= ~_PAGE_HPTEFLAGS;
>   }
> @@ -110,16 +103,7 @@ int __hash_page_huge(unsigned long ea, unsigned long 
> access, unsigned long vsid,
>   return -1;
>   }
>
> - /*
> -  * Insert slot number & secondary bit in PTE second half.
> -  */
> - hidxp = (unsigned long *)(ptep + PTRS_PER_PTE);
> - rpte.hidx &= ~(0xfUL);
> - *hidxp = rpte.hidx  | (slot & 0xfUL);
> - /*
> -  * check __real_pte for details on matching smp_rmb()
> -  */
> - smp_wmb();
> + new_pte |= pte_set_hash_slot(ptep, rpte, 0, slot);
>   }
>
>   /*
> -- 
> 1.7.1



Re: [RFC v6 06/62] powerpc: use helper functions in __hash_page_64K() for 64K PTE

2017-07-19 Thread Aneesh Kumar K.V
Ram Pai  writes:

> replace redundant code in __hash_page_64K() with helper
> functions pte_get_hash_gslot() and pte_set_hash_slot()
>

Reviewed-by: Aneesh Kumar K.V 


> Signed-off-by: Ram Pai 
> ---
>  arch/powerpc/mm/hash64_64k.c |   24 
>  1 files changed, 4 insertions(+), 20 deletions(-)
>
> diff --git a/arch/powerpc/mm/hash64_64k.c b/arch/powerpc/mm/hash64_64k.c
> index 0012618..645f621 100644
> --- a/arch/powerpc/mm/hash64_64k.c
> +++ b/arch/powerpc/mm/hash64_64k.c
> @@ -244,7 +244,6 @@ int __hash_page_64K(unsigned long ea, unsigned long 
> access,
>   unsigned long flags, int ssize)
>  {
>   real_pte_t rpte;
> - unsigned long *hidxp;
>   unsigned long hpte_group;
>   unsigned long rflags, pa;
>   unsigned long old_pte, new_pte;
> @@ -289,18 +288,12 @@ int __hash_page_64K(unsigned long ea, unsigned long 
> access,
>
>   vpn  = hpt_vpn(ea, vsid, ssize);
>   if (unlikely(old_pte & H_PAGE_HASHPTE)) {
> - unsigned long hash, slot, hidx;
> -
> - hash = hpt_hash(vpn, shift, ssize);
> - hidx = __rpte_to_hidx(rpte, 0);
> - if (hidx & _PTEIDX_SECONDARY)
> - hash = ~hash;
> - slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
> - slot += hidx & _PTEIDX_GROUP_IX;
> + unsigned long gslot;
>   /*
>* There MIGHT be an HPTE for this pte
>*/
> - if (mmu_hash_ops.hpte_updatepp(slot, rflags, vpn, MMU_PAGE_64K,
> + gslot = pte_get_hash_gslot(vpn, shift, ssize, rpte, 0);
> + if (mmu_hash_ops.hpte_updatepp(gslot, rflags, vpn, MMU_PAGE_64K,
>  MMU_PAGE_64K, ssize,
>  flags) == -1)
>   old_pte &= ~_PAGE_HPTEFLAGS;
> @@ -350,17 +343,8 @@ int __hash_page_64K(unsigned long ea, unsigned long 
> access,
>   return -1;
>   }
>
> - /*
> -  * Insert slot number & secondary bit in PTE second half.
> -  */
> - hidxp = (unsigned long *)(ptep + PTRS_PER_PTE);
> - rpte.hidx &= ~(0xfUL);
> - *hidxp = rpte.hidx  | (slot & 0xfUL);
> - /*
> -  * check __real_pte for details on matching smp_rmb()
> -  */
> - smp_wmb();
>   new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | H_PAGE_HASHPTE;
> + new_pte |= pte_set_hash_slot(ptep, rpte, 0, slot);
>   }
>   *ptep = __pte(new_pte & ~H_PAGE_BUSY);
>   return 0;
> -- 
> 1.7.1



[PATCH v4 3/4] perf utils: Add helper function is_pmu_core to detect PMU CORE devices

2017-07-19 Thread Ganapatrao Kulkarni
On some platforms, PMU core devices sysfs name is not cpu.
Adding function is_pmu_core to detect as core device using
core device specific hints in sysfs.

For arm64 platforms, all core devices have file "cpus" in sysfs.

Signed-off-by: Ganapatrao Kulkarni 
---
 tools/perf/util/pmu.c | 44 
 1 file changed, 40 insertions(+), 4 deletions(-)

diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c
index aefdbd1..0057d1c 100644
--- a/tools/perf/util/pmu.c
+++ b/tools/perf/util/pmu.c
@@ -506,6 +506,39 @@ static struct cpu_map *pmu_cpumask(const char *name)
 }
 
 /*
+ *  PMU CORE devices have different name other than cpu in sysfs on some
+ *  platforms. looking for possible sysfs files to identify as core device.
+ */
+static int is_pmu_core(const char *name)
+{
+   struct stat st;
+   char path[PATH_MAX];
+   const char *sysfs = sysfs__mountpoint();
+   const char **template;
+   const char *templates[] = {
+"%s/bus/event_source/devices/%s/cpus",
+NULL
+   };
+
+   if (!sysfs)
+   return 0;
+
+   /* Look for cpu sysfs */
+   snprintf(path, PATH_MAX, "%s/bus/event_source/devices/cpu", sysfs);
+   if ((stat(path, ) == 0) &&
+   (strncmp(name, "cpu", strlen("cpu")) == 0))
+   return 1;
+
+   for (template = templates; *template; template++) {
+   snprintf(path, PATH_MAX, *template, sysfs, name);
+   if (stat(path, ) == 0)
+   return 1;
+   }
+
+   return 0;
+}
+
+/*
  * Return the CPU id as a raw string.
  *
  * Each architecture should provide a more precise id string that
@@ -558,15 +591,18 @@ static void pmu_add_cpu_aliases(struct list_head *head, 
const char *name,
 */
i = 0;
while (1) {
-   const char *pname;
 
pe = >table[i++];
if (!pe->name)
break;
 
-   pname = pe->pmu ? pe->pmu : "cpu";
-   if (strncmp(pname, name, strlen(pname)))
-   continue;
+   if (!is_pmu_core(name)) {
+   /* check for uncore devices */
+   if (pe->pmu == NULL)
+   continue;
+   if (strncmp(pe->pmu, name, strlen(pe->pmu)))
+   continue;
+   }
 
/* need type casts to override 'const' */
__perf_pmu__new_alias(head, NULL, (char *)pe->name,
-- 
2.9.4



Re: [RFC v6 06/62] powerpc: use helper functions in __hash_page_64K() for 64K PTE

2017-07-19 Thread Aneesh Kumar K.V
Ram Pai  writes:

> replace redundant code in __hash_page_64K() with helper
> functions pte_get_hash_gslot() and pte_set_hash_slot()
>

Reviewed-by: Aneesh Kumar K.V 


> Signed-off-by: Ram Pai 
> ---
>  arch/powerpc/mm/hash64_64k.c |   24 
>  1 files changed, 4 insertions(+), 20 deletions(-)
>
> diff --git a/arch/powerpc/mm/hash64_64k.c b/arch/powerpc/mm/hash64_64k.c
> index 0012618..645f621 100644
> --- a/arch/powerpc/mm/hash64_64k.c
> +++ b/arch/powerpc/mm/hash64_64k.c
> @@ -244,7 +244,6 @@ int __hash_page_64K(unsigned long ea, unsigned long 
> access,
>   unsigned long flags, int ssize)
>  {
>   real_pte_t rpte;
> - unsigned long *hidxp;
>   unsigned long hpte_group;
>   unsigned long rflags, pa;
>   unsigned long old_pte, new_pte;
> @@ -289,18 +288,12 @@ int __hash_page_64K(unsigned long ea, unsigned long 
> access,
>
>   vpn  = hpt_vpn(ea, vsid, ssize);
>   if (unlikely(old_pte & H_PAGE_HASHPTE)) {
> - unsigned long hash, slot, hidx;
> -
> - hash = hpt_hash(vpn, shift, ssize);
> - hidx = __rpte_to_hidx(rpte, 0);
> - if (hidx & _PTEIDX_SECONDARY)
> - hash = ~hash;
> - slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
> - slot += hidx & _PTEIDX_GROUP_IX;
> + unsigned long gslot;
>   /*
>* There MIGHT be an HPTE for this pte
>*/
> - if (mmu_hash_ops.hpte_updatepp(slot, rflags, vpn, MMU_PAGE_64K,
> + gslot = pte_get_hash_gslot(vpn, shift, ssize, rpte, 0);
> + if (mmu_hash_ops.hpte_updatepp(gslot, rflags, vpn, MMU_PAGE_64K,
>  MMU_PAGE_64K, ssize,
>  flags) == -1)
>   old_pte &= ~_PAGE_HPTEFLAGS;
> @@ -350,17 +343,8 @@ int __hash_page_64K(unsigned long ea, unsigned long 
> access,
>   return -1;
>   }
>
> - /*
> -  * Insert slot number & secondary bit in PTE second half.
> -  */
> - hidxp = (unsigned long *)(ptep + PTRS_PER_PTE);
> - rpte.hidx &= ~(0xfUL);
> - *hidxp = rpte.hidx  | (slot & 0xfUL);
> - /*
> -  * check __real_pte for details on matching smp_rmb()
> -  */
> - smp_wmb();
>   new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | H_PAGE_HASHPTE;
> + new_pte |= pte_set_hash_slot(ptep, rpte, 0, slot);
>   }
>   *ptep = __pte(new_pte & ~H_PAGE_BUSY);
>   return 0;
> -- 
> 1.7.1



[PATCH v4 3/4] perf utils: Add helper function is_pmu_core to detect PMU CORE devices

2017-07-19 Thread Ganapatrao Kulkarni
On some platforms, PMU core devices sysfs name is not cpu.
Adding function is_pmu_core to detect as core device using
core device specific hints in sysfs.

For arm64 platforms, all core devices have file "cpus" in sysfs.

Signed-off-by: Ganapatrao Kulkarni 
---
 tools/perf/util/pmu.c | 44 
 1 file changed, 40 insertions(+), 4 deletions(-)

diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c
index aefdbd1..0057d1c 100644
--- a/tools/perf/util/pmu.c
+++ b/tools/perf/util/pmu.c
@@ -506,6 +506,39 @@ static struct cpu_map *pmu_cpumask(const char *name)
 }
 
 /*
+ *  PMU CORE devices have different name other than cpu in sysfs on some
+ *  platforms. looking for possible sysfs files to identify as core device.
+ */
+static int is_pmu_core(const char *name)
+{
+   struct stat st;
+   char path[PATH_MAX];
+   const char *sysfs = sysfs__mountpoint();
+   const char **template;
+   const char *templates[] = {
+"%s/bus/event_source/devices/%s/cpus",
+NULL
+   };
+
+   if (!sysfs)
+   return 0;
+
+   /* Look for cpu sysfs */
+   snprintf(path, PATH_MAX, "%s/bus/event_source/devices/cpu", sysfs);
+   if ((stat(path, ) == 0) &&
+   (strncmp(name, "cpu", strlen("cpu")) == 0))
+   return 1;
+
+   for (template = templates; *template; template++) {
+   snprintf(path, PATH_MAX, *template, sysfs, name);
+   if (stat(path, ) == 0)
+   return 1;
+   }
+
+   return 0;
+}
+
+/*
  * Return the CPU id as a raw string.
  *
  * Each architecture should provide a more precise id string that
@@ -558,15 +591,18 @@ static void pmu_add_cpu_aliases(struct list_head *head, 
const char *name,
 */
i = 0;
while (1) {
-   const char *pname;
 
pe = >table[i++];
if (!pe->name)
break;
 
-   pname = pe->pmu ? pe->pmu : "cpu";
-   if (strncmp(pname, name, strlen(pname)))
-   continue;
+   if (!is_pmu_core(name)) {
+   /* check for uncore devices */
+   if (pe->pmu == NULL)
+   continue;
+   if (strncmp(pe->pmu, name, strlen(pe->pmu)))
+   continue;
+   }
 
/* need type casts to override 'const' */
__perf_pmu__new_alias(head, NULL, (char *)pe->name,
-- 
2.9.4



[PATCH v4 1/4] perf utils: passing pmu as a parameter to function get_cpuid_str

2017-07-19 Thread Ganapatrao Kulkarni
cpuid string will not be same on all CPUs on heterogeneous
platforms like ARM's big.LITTLE, adding provision(using pmu->cpus)
to find cpuid string from associated CPUs of PMU CORE device.

Signed-off-by: Ganapatrao Kulkarni 
---
 tools/perf/arch/powerpc/util/header.c | 2 +-
 tools/perf/arch/x86/util/header.c | 2 +-
 tools/perf/util/header.h  | 3 ++-
 tools/perf/util/pmu.c | 9 +
 4 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/tools/perf/arch/powerpc/util/header.c 
b/tools/perf/arch/powerpc/util/header.c
index 9aaa6f5..2953681 100644
--- a/tools/perf/arch/powerpc/util/header.c
+++ b/tools/perf/arch/powerpc/util/header.c
@@ -34,7 +34,7 @@ get_cpuid(char *buffer, size_t sz)
 }
 
 char *
-get_cpuid_str(void)
+get_cpuid_str(struct perf_pmu *pmu __maybe_unused)
 {
char *bufp;
 
diff --git a/tools/perf/arch/x86/util/header.c 
b/tools/perf/arch/x86/util/header.c
index a74a48d..d52bc27 100644
--- a/tools/perf/arch/x86/util/header.c
+++ b/tools/perf/arch/x86/util/header.c
@@ -65,7 +65,7 @@ get_cpuid(char *buffer, size_t sz)
 }
 
 char *
-get_cpuid_str(void)
+get_cpuid_str(struct perf_pmu *pmu __maybe_unused)
 {
char *buf = malloc(128);
 
diff --git a/tools/perf/util/header.h b/tools/perf/util/header.h
index d30109b..05e5758 100644
--- a/tools/perf/util/header.h
+++ b/tools/perf/util/header.h
@@ -8,6 +8,7 @@
 #include 
 #include "event.h"
 #include "env.h"
+#include "pmu.h"
 
 enum {
HEADER_RESERVED = 0,/* always cleared */
@@ -151,5 +152,5 @@ int write_padded(int fd, const void *bf, size_t count, 
size_t count_aligned);
  */
 int get_cpuid(char *buffer, size_t sz);
 
-char *get_cpuid_str(void);
+char *get_cpuid_str(struct perf_pmu *pmu __maybe_unused);
 #endif /* __PERF_HEADER_H */
diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c
index ac16a9d..aefdbd1 100644
--- a/tools/perf/util/pmu.c
+++ b/tools/perf/util/pmu.c
@@ -511,7 +511,7 @@ static struct cpu_map *pmu_cpumask(const char *name)
  * Each architecture should provide a more precise id string that
  * can be use to match the architecture's "mapfile".
  */
-char * __weak get_cpuid_str(void)
+char * __weak get_cpuid_str(struct perf_pmu *pmu __maybe_unused)
 {
return NULL;
 }
@@ -521,7 +521,8 @@ char * __weak get_cpuid_str(void)
  * to the current running CPU. Then, add all PMU events from that table
  * as aliases.
  */
-static void pmu_add_cpu_aliases(struct list_head *head, const char *name)
+static void pmu_add_cpu_aliases(struct list_head *head, const char *name,
+   struct perf_pmu *pmu)
 {
int i;
struct pmu_events_map *map;
@@ -533,7 +534,7 @@ static void pmu_add_cpu_aliases(struct list_head *head, 
const char *name)
if (cpuid)
cpuid = strdup(cpuid);
if (!cpuid)
-   cpuid = get_cpuid_str();
+   cpuid = get_cpuid_str(pmu);
if (!cpuid)
return;
 
@@ -610,12 +611,12 @@ static struct perf_pmu *pmu_lookup(const char *name)
if (pmu_aliases(name, ))
return NULL;
 
-   pmu_add_cpu_aliases(, name);
pmu = zalloc(sizeof(*pmu));
if (!pmu)
return NULL;
 
pmu->cpus = pmu_cpumask(name);
+   pmu_add_cpu_aliases(, name, pmu);
 
INIT_LIST_HEAD(>format);
INIT_LIST_HEAD(>aliases);
-- 
2.9.4



[PATCH v4 1/4] perf utils: passing pmu as a parameter to function get_cpuid_str

2017-07-19 Thread Ganapatrao Kulkarni
cpuid string will not be same on all CPUs on heterogeneous
platforms like ARM's big.LITTLE, adding provision(using pmu->cpus)
to find cpuid string from associated CPUs of PMU CORE device.

Signed-off-by: Ganapatrao Kulkarni 
---
 tools/perf/arch/powerpc/util/header.c | 2 +-
 tools/perf/arch/x86/util/header.c | 2 +-
 tools/perf/util/header.h  | 3 ++-
 tools/perf/util/pmu.c | 9 +
 4 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/tools/perf/arch/powerpc/util/header.c 
b/tools/perf/arch/powerpc/util/header.c
index 9aaa6f5..2953681 100644
--- a/tools/perf/arch/powerpc/util/header.c
+++ b/tools/perf/arch/powerpc/util/header.c
@@ -34,7 +34,7 @@ get_cpuid(char *buffer, size_t sz)
 }
 
 char *
-get_cpuid_str(void)
+get_cpuid_str(struct perf_pmu *pmu __maybe_unused)
 {
char *bufp;
 
diff --git a/tools/perf/arch/x86/util/header.c 
b/tools/perf/arch/x86/util/header.c
index a74a48d..d52bc27 100644
--- a/tools/perf/arch/x86/util/header.c
+++ b/tools/perf/arch/x86/util/header.c
@@ -65,7 +65,7 @@ get_cpuid(char *buffer, size_t sz)
 }
 
 char *
-get_cpuid_str(void)
+get_cpuid_str(struct perf_pmu *pmu __maybe_unused)
 {
char *buf = malloc(128);
 
diff --git a/tools/perf/util/header.h b/tools/perf/util/header.h
index d30109b..05e5758 100644
--- a/tools/perf/util/header.h
+++ b/tools/perf/util/header.h
@@ -8,6 +8,7 @@
 #include 
 #include "event.h"
 #include "env.h"
+#include "pmu.h"
 
 enum {
HEADER_RESERVED = 0,/* always cleared */
@@ -151,5 +152,5 @@ int write_padded(int fd, const void *bf, size_t count, 
size_t count_aligned);
  */
 int get_cpuid(char *buffer, size_t sz);
 
-char *get_cpuid_str(void);
+char *get_cpuid_str(struct perf_pmu *pmu __maybe_unused);
 #endif /* __PERF_HEADER_H */
diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c
index ac16a9d..aefdbd1 100644
--- a/tools/perf/util/pmu.c
+++ b/tools/perf/util/pmu.c
@@ -511,7 +511,7 @@ static struct cpu_map *pmu_cpumask(const char *name)
  * Each architecture should provide a more precise id string that
  * can be use to match the architecture's "mapfile".
  */
-char * __weak get_cpuid_str(void)
+char * __weak get_cpuid_str(struct perf_pmu *pmu __maybe_unused)
 {
return NULL;
 }
@@ -521,7 +521,8 @@ char * __weak get_cpuid_str(void)
  * to the current running CPU. Then, add all PMU events from that table
  * as aliases.
  */
-static void pmu_add_cpu_aliases(struct list_head *head, const char *name)
+static void pmu_add_cpu_aliases(struct list_head *head, const char *name,
+   struct perf_pmu *pmu)
 {
int i;
struct pmu_events_map *map;
@@ -533,7 +534,7 @@ static void pmu_add_cpu_aliases(struct list_head *head, 
const char *name)
if (cpuid)
cpuid = strdup(cpuid);
if (!cpuid)
-   cpuid = get_cpuid_str();
+   cpuid = get_cpuid_str(pmu);
if (!cpuid)
return;
 
@@ -610,12 +611,12 @@ static struct perf_pmu *pmu_lookup(const char *name)
if (pmu_aliases(name, ))
return NULL;
 
-   pmu_add_cpu_aliases(, name);
pmu = zalloc(sizeof(*pmu));
if (!pmu)
return NULL;
 
pmu->cpus = pmu_cpumask(name);
+   pmu_add_cpu_aliases(, name, pmu);
 
INIT_LIST_HEAD(>format);
INIT_LIST_HEAD(>aliases);
-- 
2.9.4



Re: [RFC v6 03/62] powerpc: introduce pte_set_hash_slot() helper

2017-07-19 Thread Aneesh Kumar K.V
Ram Pai  writes:

> Introduce pte_set_hash_slot().It  sets the (H_PAGE_F_SECOND|H_PAGE_F_GIX)
> bits at  the   appropriate   location   in   the   PTE  of  4K  PTE.  For
> 64K PTE, it  sets  the  bits  in  the  second  part  of  the  PTE. Though
> the implementation  for the former just needs the slot parameter, it does
> take some additional parameters to keep the prototype consistent.
>
> This function  will  be  handy  as  we   work   towards  re-arranging the
> bits in the later patches.
>

Reviewed-by: Aneesh Kumar K.V 
> Signed-off-by: Ram Pai 
> ---
>  arch/powerpc/include/asm/book3s/64/hash-4k.h  |   15 +++
>  arch/powerpc/include/asm/book3s/64/hash-64k.h |   25 
> +
>  2 files changed, 40 insertions(+), 0 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h 
> b/arch/powerpc/include/asm/book3s/64/hash-4k.h
> index d2cf949..dc153c6 100644
> --- a/arch/powerpc/include/asm/book3s/64/hash-4k.h
> +++ b/arch/powerpc/include/asm/book3s/64/hash-4k.h
> @@ -53,6 +53,21 @@ static inline int hash__hugepd_ok(hugepd_t hpd)
>  }
>  #endif
>
> +/*
> + * 4k pte format is  different  from  64k  pte  format.  Saving  the
> + * hash_slot is just a matter of returning the pte bits that need to
> + * be modified. On 64k pte, things are a  little  more  involved and
> + * hence  needs   many   more  parameters  to  accomplish  the  same.
> + * However we  want  to abstract this out from the caller by keeping
> + * the prototype consistent across the two formats.
> + */
> +static inline unsigned long pte_set_hash_slot(pte_t *ptep, real_pte_t rpte,
> + unsigned int subpg_index, unsigned long slot)
> +{
> + return (slot << H_PAGE_F_GIX_SHIFT) &
> + (H_PAGE_F_SECOND | H_PAGE_F_GIX);
> +}
> +
>  #ifdef CONFIG_TRANSPARENT_HUGEPAGE
>
>  static inline char *get_hpte_slot_array(pmd_t *pmdp)
> diff --git a/arch/powerpc/include/asm/book3s/64/hash-64k.h 
> b/arch/powerpc/include/asm/book3s/64/hash-64k.h
> index c281f18..89ef5a9 100644
> --- a/arch/powerpc/include/asm/book3s/64/hash-64k.h
> +++ b/arch/powerpc/include/asm/book3s/64/hash-64k.h
> @@ -67,6 +67,31 @@ static inline unsigned long __rpte_to_hidx(real_pte_t 
> rpte, unsigned long index)
>   return ((rpte.hidx >> (index<<2)) & 0xfUL);
>  }
>
> +/*
> + * Commit the hash slot and return pte bits that needs to be modified.
> + * The caller is expected to modify the pte bits accordingly and
> + * commit the pte to memory.
> + */
> +static inline unsigned long pte_set_hash_slot(pte_t *ptep, real_pte_t rpte,
> + unsigned int subpg_index, unsigned long slot)
> +{
> + unsigned long *hidxp = (unsigned long *)(ptep + PTRS_PER_PTE);
> +
> + rpte.hidx &= ~(0xfUL << (subpg_index << 2));
> + *hidxp = rpte.hidx  | (slot << (subpg_index << 2));
> + /*
> +  * Commit the hidx bits to memory before returning.
> +  * Anyone reading  pte  must  ensure hidx bits are
> +  * read  only  after  reading the pte by using the
> +  * read-side  barrier  smp_rmb(). __real_pte() can
> +  * help ensure that.
> +  */
> + smp_wmb();
> +
> + /* no pte bits to be modified, return 0x0UL */
> + return 0x0UL;
> +}
> +
>  #define __rpte_to_pte(r) ((r).pte)
>  extern bool __rpte_sub_valid(real_pte_t rpte, unsigned long index);
>  /*
> -- 
> 1.7.1



[PATCH v4 4/4] perf vendor events arm64: Add ThunderX2 implementation defined pmu core events

2017-07-19 Thread Ganapatrao Kulkarni
This is not a full event list, but a short list of useful events.

Signed-off-by: Ganapatrao Kulkarni 
---
 tools/perf/pmu-events/arch/arm64/mapfile.csv   | 15 ++
 .../arm64/thunderx2/implementation-defined.json| 62 ++
 2 files changed, 77 insertions(+)
 create mode 100644 tools/perf/pmu-events/arch/arm64/mapfile.csv
 create mode 100644 
tools/perf/pmu-events/arch/arm64/thunderx2/implementation-defined.json

diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv 
b/tools/perf/pmu-events/arch/arm64/mapfile.csv
new file mode 100644
index 000..7167086
--- /dev/null
+++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
@@ -0,0 +1,15 @@
+# Format:
+#  MIDR,Version,JSON/file/pathname,Type
+#
+# where
+#  MIDRProcessor version
+#  Variant[23:20] and Revision [3:0] should be zero.
+#  Version could be used to track version of of JSON file
+#  but currently unused.
+#  JSON/file/pathname is the path to JSON file, relative
+#  to tools/perf/pmu-events/arch/arm64/.
+#  Type is core, uncore etc
+#
+#
+#Family-model,Version,Filename,EventType
+0x420f5160,v1,thunderx2,core
diff --git 
a/tools/perf/pmu-events/arch/arm64/thunderx2/implementation-defined.json 
b/tools/perf/pmu-events/arch/arm64/thunderx2/implementation-defined.json
new file mode 100644
index 000..2db45c4
--- /dev/null
+++ b/tools/perf/pmu-events/arch/arm64/thunderx2/implementation-defined.json
@@ -0,0 +1,62 @@
+[
+{
+"PublicDescription": "Attributable Level 1 data cache access, read",
+"EventCode": "0x40",
+"EventName": "l1d_cache_rd",
+"BriefDescription": "L1D cache read",
+},
+{
+"PublicDescription": "Attributable Level 1 data cache access, write ",
+"EventCode": "0x41",
+"EventName": "l1d_cache_wr",
+"BriefDescription": "L1D cache write",
+},
+{
+"PublicDescription": "Attributable Level 1 data cache refill, read",
+"EventCode": "0x42",
+"EventName": "l1d_cache_refill_rd",
+"BriefDescription": "L1D cache refill read",
+},
+{
+"PublicDescription": "Attributable Level 1 data cache refill, write",
+"EventCode": "0x43",
+"EventName": "l1d_cache_refill_wr",
+"BriefDescription": "L1D refill write",
+},
+{
+"PublicDescription": "Attributable Level 1 data TLB refill, read",
+"EventCode": "0x4C",
+"EventName": "l1d_tlb_refill_rd",
+"BriefDescription": "L1D tlb refill read",
+},
+{
+"PublicDescription": "Attributable Level 1 data TLB refill, write",
+"EventCode": "0x4D",
+"EventName": "l1d_tlb_refill_wr",
+"BriefDescription": "L1D tlb refill write",
+},
+{
+"PublicDescription": "Attributable Level 1 data or unified TLB access, 
read",
+"EventCode": "0x4E",
+"EventName": "l1d_tlb_rd",
+"BriefDescription": "L1D tlb read",
+},
+{
+"PublicDescription": "Attributable Level 1 data or unified TLB access, 
write",
+"EventCode": "0x4F",
+"EventName": "l1d_tlb_wr",
+"BriefDescription": "L1D tlb write",
+},
+{
+"PublicDescription": "Bus access read",
+"EventCode": "0x60",
+"EventName": "bus_access_rd",
+"BriefDescription": "Bus access read",
+   },
+   {
+"PublicDescription": "Bus access write",
+"EventCode": "0x61",
+"EventName": "bus_access_wr",
+"BriefDescription": "Bus access write",
+   }
+]
-- 
2.9.4



Re: [RFC v6 03/62] powerpc: introduce pte_set_hash_slot() helper

2017-07-19 Thread Aneesh Kumar K.V
Ram Pai  writes:

> Introduce pte_set_hash_slot().It  sets the (H_PAGE_F_SECOND|H_PAGE_F_GIX)
> bits at  the   appropriate   location   in   the   PTE  of  4K  PTE.  For
> 64K PTE, it  sets  the  bits  in  the  second  part  of  the  PTE. Though
> the implementation  for the former just needs the slot parameter, it does
> take some additional parameters to keep the prototype consistent.
>
> This function  will  be  handy  as  we   work   towards  re-arranging the
> bits in the later patches.
>

Reviewed-by: Aneesh Kumar K.V 
> Signed-off-by: Ram Pai 
> ---
>  arch/powerpc/include/asm/book3s/64/hash-4k.h  |   15 +++
>  arch/powerpc/include/asm/book3s/64/hash-64k.h |   25 
> +
>  2 files changed, 40 insertions(+), 0 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h 
> b/arch/powerpc/include/asm/book3s/64/hash-4k.h
> index d2cf949..dc153c6 100644
> --- a/arch/powerpc/include/asm/book3s/64/hash-4k.h
> +++ b/arch/powerpc/include/asm/book3s/64/hash-4k.h
> @@ -53,6 +53,21 @@ static inline int hash__hugepd_ok(hugepd_t hpd)
>  }
>  #endif
>
> +/*
> + * 4k pte format is  different  from  64k  pte  format.  Saving  the
> + * hash_slot is just a matter of returning the pte bits that need to
> + * be modified. On 64k pte, things are a  little  more  involved and
> + * hence  needs   many   more  parameters  to  accomplish  the  same.
> + * However we  want  to abstract this out from the caller by keeping
> + * the prototype consistent across the two formats.
> + */
> +static inline unsigned long pte_set_hash_slot(pte_t *ptep, real_pte_t rpte,
> + unsigned int subpg_index, unsigned long slot)
> +{
> + return (slot << H_PAGE_F_GIX_SHIFT) &
> + (H_PAGE_F_SECOND | H_PAGE_F_GIX);
> +}
> +
>  #ifdef CONFIG_TRANSPARENT_HUGEPAGE
>
>  static inline char *get_hpte_slot_array(pmd_t *pmdp)
> diff --git a/arch/powerpc/include/asm/book3s/64/hash-64k.h 
> b/arch/powerpc/include/asm/book3s/64/hash-64k.h
> index c281f18..89ef5a9 100644
> --- a/arch/powerpc/include/asm/book3s/64/hash-64k.h
> +++ b/arch/powerpc/include/asm/book3s/64/hash-64k.h
> @@ -67,6 +67,31 @@ static inline unsigned long __rpte_to_hidx(real_pte_t 
> rpte, unsigned long index)
>   return ((rpte.hidx >> (index<<2)) & 0xfUL);
>  }
>
> +/*
> + * Commit the hash slot and return pte bits that needs to be modified.
> + * The caller is expected to modify the pte bits accordingly and
> + * commit the pte to memory.
> + */
> +static inline unsigned long pte_set_hash_slot(pte_t *ptep, real_pte_t rpte,
> + unsigned int subpg_index, unsigned long slot)
> +{
> + unsigned long *hidxp = (unsigned long *)(ptep + PTRS_PER_PTE);
> +
> + rpte.hidx &= ~(0xfUL << (subpg_index << 2));
> + *hidxp = rpte.hidx  | (slot << (subpg_index << 2));
> + /*
> +  * Commit the hidx bits to memory before returning.
> +  * Anyone reading  pte  must  ensure hidx bits are
> +  * read  only  after  reading the pte by using the
> +  * read-side  barrier  smp_rmb(). __real_pte() can
> +  * help ensure that.
> +  */
> + smp_wmb();
> +
> + /* no pte bits to be modified, return 0x0UL */
> + return 0x0UL;
> +}
> +
>  #define __rpte_to_pte(r) ((r).pte)
>  extern bool __rpte_sub_valid(real_pte_t rpte, unsigned long index);
>  /*
> -- 
> 1.7.1



[PATCH v4 4/4] perf vendor events arm64: Add ThunderX2 implementation defined pmu core events

2017-07-19 Thread Ganapatrao Kulkarni
This is not a full event list, but a short list of useful events.

Signed-off-by: Ganapatrao Kulkarni 
---
 tools/perf/pmu-events/arch/arm64/mapfile.csv   | 15 ++
 .../arm64/thunderx2/implementation-defined.json| 62 ++
 2 files changed, 77 insertions(+)
 create mode 100644 tools/perf/pmu-events/arch/arm64/mapfile.csv
 create mode 100644 
tools/perf/pmu-events/arch/arm64/thunderx2/implementation-defined.json

diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv 
b/tools/perf/pmu-events/arch/arm64/mapfile.csv
new file mode 100644
index 000..7167086
--- /dev/null
+++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
@@ -0,0 +1,15 @@
+# Format:
+#  MIDR,Version,JSON/file/pathname,Type
+#
+# where
+#  MIDRProcessor version
+#  Variant[23:20] and Revision [3:0] should be zero.
+#  Version could be used to track version of of JSON file
+#  but currently unused.
+#  JSON/file/pathname is the path to JSON file, relative
+#  to tools/perf/pmu-events/arch/arm64/.
+#  Type is core, uncore etc
+#
+#
+#Family-model,Version,Filename,EventType
+0x420f5160,v1,thunderx2,core
diff --git 
a/tools/perf/pmu-events/arch/arm64/thunderx2/implementation-defined.json 
b/tools/perf/pmu-events/arch/arm64/thunderx2/implementation-defined.json
new file mode 100644
index 000..2db45c4
--- /dev/null
+++ b/tools/perf/pmu-events/arch/arm64/thunderx2/implementation-defined.json
@@ -0,0 +1,62 @@
+[
+{
+"PublicDescription": "Attributable Level 1 data cache access, read",
+"EventCode": "0x40",
+"EventName": "l1d_cache_rd",
+"BriefDescription": "L1D cache read",
+},
+{
+"PublicDescription": "Attributable Level 1 data cache access, write ",
+"EventCode": "0x41",
+"EventName": "l1d_cache_wr",
+"BriefDescription": "L1D cache write",
+},
+{
+"PublicDescription": "Attributable Level 1 data cache refill, read",
+"EventCode": "0x42",
+"EventName": "l1d_cache_refill_rd",
+"BriefDescription": "L1D cache refill read",
+},
+{
+"PublicDescription": "Attributable Level 1 data cache refill, write",
+"EventCode": "0x43",
+"EventName": "l1d_cache_refill_wr",
+"BriefDescription": "L1D refill write",
+},
+{
+"PublicDescription": "Attributable Level 1 data TLB refill, read",
+"EventCode": "0x4C",
+"EventName": "l1d_tlb_refill_rd",
+"BriefDescription": "L1D tlb refill read",
+},
+{
+"PublicDescription": "Attributable Level 1 data TLB refill, write",
+"EventCode": "0x4D",
+"EventName": "l1d_tlb_refill_wr",
+"BriefDescription": "L1D tlb refill write",
+},
+{
+"PublicDescription": "Attributable Level 1 data or unified TLB access, 
read",
+"EventCode": "0x4E",
+"EventName": "l1d_tlb_rd",
+"BriefDescription": "L1D tlb read",
+},
+{
+"PublicDescription": "Attributable Level 1 data or unified TLB access, 
write",
+"EventCode": "0x4F",
+"EventName": "l1d_tlb_wr",
+"BriefDescription": "L1D tlb write",
+},
+{
+"PublicDescription": "Bus access read",
+"EventCode": "0x60",
+"EventName": "bus_access_rd",
+"BriefDescription": "Bus access read",
+   },
+   {
+"PublicDescription": "Bus access write",
+"EventCode": "0x61",
+"EventName": "bus_access_wr",
+"BriefDescription": "Bus access write",
+   }
+]
-- 
2.9.4



[PATCH v4 2/4] perf tools arm64: Add support for get_cpuid_str function.

2017-07-19 Thread Ganapatrao Kulkarni
function get_cpuid_str returns MIDR string of the first online
cpu from the range of cpus associated with the pmu core device.

Signed-off-by: Ganapatrao Kulkarni 
---
 tools/perf/arch/arm64/util/Build|  1 +
 tools/perf/arch/arm64/util/header.c | 59 +
 2 files changed, 60 insertions(+)
 create mode 100644 tools/perf/arch/arm64/util/header.c

diff --git a/tools/perf/arch/arm64/util/Build b/tools/perf/arch/arm64/util/Build
index cef6fb3..b1ab72d 100644
--- a/tools/perf/arch/arm64/util/Build
+++ b/tools/perf/arch/arm64/util/Build
@@ -1,3 +1,4 @@
+libperf-y += header.o
 libperf-$(CONFIG_DWARF) += dwarf-regs.o
 libperf-$(CONFIG_LOCAL_LIBUNWIND) += unwind-libunwind.o
 
diff --git a/tools/perf/arch/arm64/util/header.c 
b/tools/perf/arch/arm64/util/header.c
new file mode 100644
index 000..4e25498
--- /dev/null
+++ b/tools/perf/arch/arm64/util/header.c
@@ -0,0 +1,59 @@
+#include 
+#include 
+#include 
+#include "header.h"
+
+#define MIDR "/regs/identification/midr_el1"
+#define MIDR_SIZE 128
+
+char *get_cpuid_str(struct perf_pmu *pmu)
+{
+   char *buf = malloc(MIDR_SIZE);
+   char *temp = NULL;
+   char path[PATH_MAX];
+   const char *sysfs = sysfs__mountpoint();
+   int cpu, ret;
+   unsigned long long midr;
+   struct cpu_map *cpus;
+   FILE *file;
+
+   if (!pmu->cpus)
+   return NULL;
+
+   if (!sysfs)
+   return NULL;
+
+   /* read midr from list of cpus mapped to this pmu */
+   cpus = cpu_map__get(pmu->cpus);
+   for (cpu = 0; cpu < cpus->nr; cpu++) {
+   ret = snprintf(path, PATH_MAX,
+   "%s/devices/system/cpu/cpu%d"MIDR,
+   sysfs, cpus->map[cpu]);
+   if (ret == PATH_MAX) {
+   pr_err("sysfs path crossed PATH_MAX(%d) size\n", 
PATH_MAX);
+   goto err;
+   }
+
+   file = fopen(path, "r");
+   if (!file)
+   continue;
+
+   temp = fgets(buf, MIDR_SIZE, file);
+   fclose(file);
+   if (!temp)
+   continue;
+
+   /* Ignore/clear Variant[23:20] and
+* Revision[3:0] of MIDR
+*/
+   midr = strtoll(buf, NULL, 16);
+   midr &= (~(0xf << 20 | 0xf));
+   snprintf(buf, MIDR_SIZE, "0x%016llx", midr);
+   cpu_map__put(cpus);
+   return buf;
+   }
+
+err:   cpu_map__put(cpus);
+   free(buf);
+   return NULL;
+}
-- 
2.9.4



Re: [RFC v6 04/62] powerpc: introduce pte_get_hash_gslot() helper

2017-07-19 Thread Aneesh Kumar K.V
Ram Pai  writes:

> Introduce pte_get_hash_gslot()() which returns the slot number of the
> HPTE in the global hash table.
>
> This function will come in handy as we work towards re-arranging the
> PTE bits in the later patches.
>

Reviewed-by: Aneesh Kumar K.V 

> Signed-off-by: Ram Pai 
> ---
>  arch/powerpc/include/asm/book3s/64/hash.h |3 +++
>  arch/powerpc/mm/hash_utils_64.c   |   18 ++
>  2 files changed, 21 insertions(+), 0 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/book3s/64/hash.h 
> b/arch/powerpc/include/asm/book3s/64/hash.h
> index d27f885..277158c 100644
> --- a/arch/powerpc/include/asm/book3s/64/hash.h
> +++ b/arch/powerpc/include/asm/book3s/64/hash.h
> @@ -156,6 +156,9 @@ static inline int hash__pte_none(pte_t pte)
>   return (pte_val(pte) & ~H_PTE_NONE_MASK) == 0;
>  }
>
> +unsigned long pte_get_hash_gslot(unsigned long vpn, unsigned long shift,
> + int ssize, real_pte_t rpte, unsigned int subpg_index);
> +
>  /* This low level function performs the actual PTE insertion
>   * Setting the PTE depends on the MMU type and other factors. It's
>   * an horrible mess that I'm not going to try to clean up now but
> diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
> index 1b494d0..d3604da 100644
> --- a/arch/powerpc/mm/hash_utils_64.c
> +++ b/arch/powerpc/mm/hash_utils_64.c
> @@ -1591,6 +1591,24 @@ static inline void tm_flush_hash_page(int local)
>  }
>  #endif
>
> +/*
> + * return the global hash slot, corresponding to the given
> + * pte, which contains the hpte.
> + */
> +unsigned long pte_get_hash_gslot(unsigned long vpn, unsigned long shift,
> + int ssize, real_pte_t rpte, unsigned int subpg_index)
> +{
> + unsigned long hash, slot, hidx;
> +
> + hash = hpt_hash(vpn, shift, ssize);
> + hidx = __rpte_to_hidx(rpte, subpg_index);
> + if (hidx & _PTEIDX_SECONDARY)
> + hash = ~hash;
> + slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
> + slot += hidx & _PTEIDX_GROUP_IX;
> + return slot;
> +}
> +
>  /* WARNING: This is called from hash_low_64.S, if you change this prototype,
>   *  do not forget to update the assembly call site !
>   */
> -- 
> 1.7.1



Re: [RFC v6 04/62] powerpc: introduce pte_get_hash_gslot() helper

2017-07-19 Thread Aneesh Kumar K.V
Ram Pai  writes:

> Introduce pte_get_hash_gslot()() which returns the slot number of the
> HPTE in the global hash table.
>
> This function will come in handy as we work towards re-arranging the
> PTE bits in the later patches.
>

Reviewed-by: Aneesh Kumar K.V 

> Signed-off-by: Ram Pai 
> ---
>  arch/powerpc/include/asm/book3s/64/hash.h |3 +++
>  arch/powerpc/mm/hash_utils_64.c   |   18 ++
>  2 files changed, 21 insertions(+), 0 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/book3s/64/hash.h 
> b/arch/powerpc/include/asm/book3s/64/hash.h
> index d27f885..277158c 100644
> --- a/arch/powerpc/include/asm/book3s/64/hash.h
> +++ b/arch/powerpc/include/asm/book3s/64/hash.h
> @@ -156,6 +156,9 @@ static inline int hash__pte_none(pte_t pte)
>   return (pte_val(pte) & ~H_PTE_NONE_MASK) == 0;
>  }
>
> +unsigned long pte_get_hash_gslot(unsigned long vpn, unsigned long shift,
> + int ssize, real_pte_t rpte, unsigned int subpg_index);
> +
>  /* This low level function performs the actual PTE insertion
>   * Setting the PTE depends on the MMU type and other factors. It's
>   * an horrible mess that I'm not going to try to clean up now but
> diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
> index 1b494d0..d3604da 100644
> --- a/arch/powerpc/mm/hash_utils_64.c
> +++ b/arch/powerpc/mm/hash_utils_64.c
> @@ -1591,6 +1591,24 @@ static inline void tm_flush_hash_page(int local)
>  }
>  #endif
>
> +/*
> + * return the global hash slot, corresponding to the given
> + * pte, which contains the hpte.
> + */
> +unsigned long pte_get_hash_gslot(unsigned long vpn, unsigned long shift,
> + int ssize, real_pte_t rpte, unsigned int subpg_index)
> +{
> + unsigned long hash, slot, hidx;
> +
> + hash = hpt_hash(vpn, shift, ssize);
> + hidx = __rpte_to_hidx(rpte, subpg_index);
> + if (hidx & _PTEIDX_SECONDARY)
> + hash = ~hash;
> + slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
> + slot += hidx & _PTEIDX_GROUP_IX;
> + return slot;
> +}
> +
>  /* WARNING: This is called from hash_low_64.S, if you change this prototype,
>   *  do not forget to update the assembly call site !
>   */
> -- 
> 1.7.1



[PATCH v4 2/4] perf tools arm64: Add support for get_cpuid_str function.

2017-07-19 Thread Ganapatrao Kulkarni
function get_cpuid_str returns MIDR string of the first online
cpu from the range of cpus associated with the pmu core device.

Signed-off-by: Ganapatrao Kulkarni 
---
 tools/perf/arch/arm64/util/Build|  1 +
 tools/perf/arch/arm64/util/header.c | 59 +
 2 files changed, 60 insertions(+)
 create mode 100644 tools/perf/arch/arm64/util/header.c

diff --git a/tools/perf/arch/arm64/util/Build b/tools/perf/arch/arm64/util/Build
index cef6fb3..b1ab72d 100644
--- a/tools/perf/arch/arm64/util/Build
+++ b/tools/perf/arch/arm64/util/Build
@@ -1,3 +1,4 @@
+libperf-y += header.o
 libperf-$(CONFIG_DWARF) += dwarf-regs.o
 libperf-$(CONFIG_LOCAL_LIBUNWIND) += unwind-libunwind.o
 
diff --git a/tools/perf/arch/arm64/util/header.c 
b/tools/perf/arch/arm64/util/header.c
new file mode 100644
index 000..4e25498
--- /dev/null
+++ b/tools/perf/arch/arm64/util/header.c
@@ -0,0 +1,59 @@
+#include 
+#include 
+#include 
+#include "header.h"
+
+#define MIDR "/regs/identification/midr_el1"
+#define MIDR_SIZE 128
+
+char *get_cpuid_str(struct perf_pmu *pmu)
+{
+   char *buf = malloc(MIDR_SIZE);
+   char *temp = NULL;
+   char path[PATH_MAX];
+   const char *sysfs = sysfs__mountpoint();
+   int cpu, ret;
+   unsigned long long midr;
+   struct cpu_map *cpus;
+   FILE *file;
+
+   if (!pmu->cpus)
+   return NULL;
+
+   if (!sysfs)
+   return NULL;
+
+   /* read midr from list of cpus mapped to this pmu */
+   cpus = cpu_map__get(pmu->cpus);
+   for (cpu = 0; cpu < cpus->nr; cpu++) {
+   ret = snprintf(path, PATH_MAX,
+   "%s/devices/system/cpu/cpu%d"MIDR,
+   sysfs, cpus->map[cpu]);
+   if (ret == PATH_MAX) {
+   pr_err("sysfs path crossed PATH_MAX(%d) size\n", 
PATH_MAX);
+   goto err;
+   }
+
+   file = fopen(path, "r");
+   if (!file)
+   continue;
+
+   temp = fgets(buf, MIDR_SIZE, file);
+   fclose(file);
+   if (!temp)
+   continue;
+
+   /* Ignore/clear Variant[23:20] and
+* Revision[3:0] of MIDR
+*/
+   midr = strtoll(buf, NULL, 16);
+   midr &= (~(0xf << 20 | 0xf));
+   snprintf(buf, MIDR_SIZE, "0x%016llx", midr);
+   cpu_map__put(cpus);
+   return buf;
+   }
+
+err:   cpu_map__put(cpus);
+   free(buf);
+   return NULL;
+}
-- 
2.9.4



[PATCH v4 0/4] Add support for ThunderX2 pmu events using json files

2017-07-19 Thread Ganapatrao Kulkarni
Extending json/jevent framework for parsing arm64 event files.
Adding jevents for ThunderX2 implementation defined PMU events.

v4:
   - Rebased to 4.13-rc1

v3:
   - Addressed comments from Will Deacon and Jayachandran C.
   - Rebased to 4.12-rc1

v2:
   - Updated as per Mark Rutland's suggestions.
   - Added provision for get_cpuid_str to get cpu id string
 from associated cpus of pmu core device.

v1: Initial patchset.

Ganapatrao Kulkarni (4):
  perf utils: passing pmu as a parameter to function get_cpuid_str
  perf tools arm64: Add support for get_cpuid_str function.
  perf utils: Add helper function is_pmu_core to detect PMU CORE devices
  perf vendor events arm64: Add ThunderX2 implementation defined pmu
core events

 tools/perf/arch/arm64/util/Build   |  1 +
 tools/perf/arch/arm64/util/header.c| 59 
 tools/perf/arch/powerpc/util/header.c  |  2 +-
 tools/perf/arch/x86/util/header.c  |  2 +-
 tools/perf/pmu-events/arch/arm64/mapfile.csv   | 15 ++
 .../arm64/thunderx2/implementation-defined.json| 62 ++
 tools/perf/util/header.h   |  3 +-
 tools/perf/util/pmu.c  | 53 +++---
 8 files changed, 186 insertions(+), 11 deletions(-)
 create mode 100644 tools/perf/arch/arm64/util/header.c
 create mode 100644 tools/perf/pmu-events/arch/arm64/mapfile.csv
 create mode 100644 
tools/perf/pmu-events/arch/arm64/thunderx2/implementation-defined.json

-- 
2.9.4



[PATCH v4 0/4] Add support for ThunderX2 pmu events using json files

2017-07-19 Thread Ganapatrao Kulkarni
Extending json/jevent framework for parsing arm64 event files.
Adding jevents for ThunderX2 implementation defined PMU events.

v4:
   - Rebased to 4.13-rc1

v3:
   - Addressed comments from Will Deacon and Jayachandran C.
   - Rebased to 4.12-rc1

v2:
   - Updated as per Mark Rutland's suggestions.
   - Added provision for get_cpuid_str to get cpu id string
 from associated cpus of pmu core device.

v1: Initial patchset.

Ganapatrao Kulkarni (4):
  perf utils: passing pmu as a parameter to function get_cpuid_str
  perf tools arm64: Add support for get_cpuid_str function.
  perf utils: Add helper function is_pmu_core to detect PMU CORE devices
  perf vendor events arm64: Add ThunderX2 implementation defined pmu
core events

 tools/perf/arch/arm64/util/Build   |  1 +
 tools/perf/arch/arm64/util/header.c| 59 
 tools/perf/arch/powerpc/util/header.c  |  2 +-
 tools/perf/arch/x86/util/header.c  |  2 +-
 tools/perf/pmu-events/arch/arm64/mapfile.csv   | 15 ++
 .../arm64/thunderx2/implementation-defined.json| 62 ++
 tools/perf/util/header.h   |  3 +-
 tools/perf/util/pmu.c  | 53 +++---
 8 files changed, 186 insertions(+), 11 deletions(-)
 create mode 100644 tools/perf/arch/arm64/util/header.c
 create mode 100644 tools/perf/pmu-events/arch/arm64/mapfile.csv
 create mode 100644 
tools/perf/pmu-events/arch/arm64/thunderx2/implementation-defined.json

-- 
2.9.4



Re: [RFC v6 05/62] powerpc: capture the PTE format changes in the dump pte report

2017-07-19 Thread Aneesh Kumar K.V
Ram Pai  writes:

> The H_PAGE_F_SECOND,H_PAGE_F_GIX are not in the 64K main-PTE.
> capture these changes in the dump pte report.
>

Reviewed-by: Aneesh Kumar K.V 

> Signed-off-by: Ram Pai 
> ---
>  arch/powerpc/mm/dump_linuxpagetables.c |3 ++-
>  1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/mm/dump_linuxpagetables.c 
> b/arch/powerpc/mm/dump_linuxpagetables.c
> index 44fe483..5627edd 100644
> --- a/arch/powerpc/mm/dump_linuxpagetables.c
> +++ b/arch/powerpc/mm/dump_linuxpagetables.c
> @@ -213,7 +213,7 @@ struct flag_info {
>   .val= H_PAGE_4K_PFN,
>   .set= "4K_pfn",
>   }, {
> -#endif
> +#else /* CONFIG_PPC_64K_PAGES */
>   .mask   = H_PAGE_F_GIX,
>   .val= H_PAGE_F_GIX,
>   .set= "f_gix",
> @@ -224,6 +224,7 @@ struct flag_info {
>   .val= H_PAGE_F_SECOND,
>   .set= "f_second",
>   }, {
> +#endif /* CONFIG_PPC_64K_PAGES */
>  #endif
>   .mask   = _PAGE_SPECIAL,
>   .val= _PAGE_SPECIAL,
> -- 
> 1.7.1



Re: [RFC v6 05/62] powerpc: capture the PTE format changes in the dump pte report

2017-07-19 Thread Aneesh Kumar K.V
Ram Pai  writes:

> The H_PAGE_F_SECOND,H_PAGE_F_GIX are not in the 64K main-PTE.
> capture these changes in the dump pte report.
>

Reviewed-by: Aneesh Kumar K.V 

> Signed-off-by: Ram Pai 
> ---
>  arch/powerpc/mm/dump_linuxpagetables.c |3 ++-
>  1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/mm/dump_linuxpagetables.c 
> b/arch/powerpc/mm/dump_linuxpagetables.c
> index 44fe483..5627edd 100644
> --- a/arch/powerpc/mm/dump_linuxpagetables.c
> +++ b/arch/powerpc/mm/dump_linuxpagetables.c
> @@ -213,7 +213,7 @@ struct flag_info {
>   .val= H_PAGE_4K_PFN,
>   .set= "4K_pfn",
>   }, {
> -#endif
> +#else /* CONFIG_PPC_64K_PAGES */
>   .mask   = H_PAGE_F_GIX,
>   .val= H_PAGE_F_GIX,
>   .set= "f_gix",
> @@ -224,6 +224,7 @@ struct flag_info {
>   .val= H_PAGE_F_SECOND,
>   .set= "f_second",
>   }, {
> +#endif /* CONFIG_PPC_64K_PAGES */
>  #endif
>   .mask   = _PAGE_SPECIAL,
>   .val= _PAGE_SPECIAL,
> -- 
> 1.7.1



Re: [RFC v6 02/62] powerpc: Free up four 64K PTE bits in 64K backed HPTE pages

2017-07-19 Thread Aneesh Kumar K.V
Ram Pai  writes:

> Rearrange 64K PTE bits to  free  up  bits 3, 4, 5  and  6
> in the 64K backed HPTE pages. This along with the earlier
> patch will  entirely free  up the four bits from 64K PTE.
> The bit numbers are  big-endian as defined in the  ISA3.0
>
> This patch  does  the  following change to 64K PTE backed
> by 64K HPTE.
>
> H_PAGE_F_SECOND (S) which  occupied  bit  4  moves to the
>   second part of the pte to bit 60.
> H_PAGE_F_GIX (G,I,X) which  occupied  bit 5, 6 and 7 also
>   moves  to  the   second part of the pte to bit 61,
>   62, 63, 64 respectively
>
> since bit 7 is now freed up, we move H_PAGE_BUSY (B) from
> bit  9  to  bit  7.
>
> The second part of the PTE will hold
> (H_PAGE_F_SECOND|H_PAGE_F_GIX) at bit 60,61,62,63.
> NOTE: None of the bits in the secondary PTE were not used
> by 64k-HPTE backed PTE.
>
> Before the patch, the 64K HPTE backed 64k PTE format was
> as follows
>
>  0 1 2 3 4  5  6  7  8 9 10...63
>  : : : : :  :  :  :  : : ::
>  v v v v v  v  v  v  v v vv
>
> ,-,-,-,-,--,--,--,--,-,-,-,-,-,--,-,-,-,
> |x|x|x| |S |G |I |X |x|B| |x|x||x|x|x|x| <- primary pte
> '_'_'_'_'__'__'__'__'_'_'_'_'_''_'_'_'_'
> | | | | |  |  |  |  | | | | |..| | | | | <- secondary pte
> '_'_'_'_'__'__'__'__'_'_'_'_'__'_'_'_'_'
>
> After the patch, the 64k HPTE backed 64k PTE format is
> as follows
>
>  0 1 2 3 4  5  6  7  8 9 10...63
>  : : : : :  :  :  :  : : ::
>  v v v v v  v  v  v  v v vv
>
> ,-,-,-,-,--,--,--,--,-,-,-,-,-,--,-,-,-,
> |x|x|x| |  |  |  |B |x| | |x|x||.|.|.|.| <- primary pte
> '_'_'_'_'__'__'__'__'_'_'_'_'_''_'_'_'_'
> | | | | |  |  |  |  | | | | |..|S|G|I|X| <- secondary pte
> '_'_'_'_'__'__'__'__'_'_'_'_'__'_'_'_'_'
>
> The above PTE changes is applicable to hugetlbpages aswell.
>
> The patch does the following code changes:
>
> a) moves  the  H_PAGE_F_SECOND and  H_PAGE_F_GIX to 4k PTE
>   header   since it is no more needed b the 64k PTEs.
> b) abstracts  out __real_pte() and __rpte_to_hidx() so the
>   caller  need not know the bit location of the slot.
> c) moves the slot bits the secondary pte.
>

Reviewed-by: Aneesh Kumar K.V 
With changes suggested for the first patch.

> Signed-off-by: Ram Pai 
> ---


-aneesh



Re: [RFC v6 02/62] powerpc: Free up four 64K PTE bits in 64K backed HPTE pages

2017-07-19 Thread Aneesh Kumar K.V
Ram Pai  writes:

> Rearrange 64K PTE bits to  free  up  bits 3, 4, 5  and  6
> in the 64K backed HPTE pages. This along with the earlier
> patch will  entirely free  up the four bits from 64K PTE.
> The bit numbers are  big-endian as defined in the  ISA3.0
>
> This patch  does  the  following change to 64K PTE backed
> by 64K HPTE.
>
> H_PAGE_F_SECOND (S) which  occupied  bit  4  moves to the
>   second part of the pte to bit 60.
> H_PAGE_F_GIX (G,I,X) which  occupied  bit 5, 6 and 7 also
>   moves  to  the   second part of the pte to bit 61,
>   62, 63, 64 respectively
>
> since bit 7 is now freed up, we move H_PAGE_BUSY (B) from
> bit  9  to  bit  7.
>
> The second part of the PTE will hold
> (H_PAGE_F_SECOND|H_PAGE_F_GIX) at bit 60,61,62,63.
> NOTE: None of the bits in the secondary PTE were not used
> by 64k-HPTE backed PTE.
>
> Before the patch, the 64K HPTE backed 64k PTE format was
> as follows
>
>  0 1 2 3 4  5  6  7  8 9 10...63
>  : : : : :  :  :  :  : : ::
>  v v v v v  v  v  v  v v vv
>
> ,-,-,-,-,--,--,--,--,-,-,-,-,-,--,-,-,-,
> |x|x|x| |S |G |I |X |x|B| |x|x||x|x|x|x| <- primary pte
> '_'_'_'_'__'__'__'__'_'_'_'_'_''_'_'_'_'
> | | | | |  |  |  |  | | | | |..| | | | | <- secondary pte
> '_'_'_'_'__'__'__'__'_'_'_'_'__'_'_'_'_'
>
> After the patch, the 64k HPTE backed 64k PTE format is
> as follows
>
>  0 1 2 3 4  5  6  7  8 9 10...63
>  : : : : :  :  :  :  : : ::
>  v v v v v  v  v  v  v v vv
>
> ,-,-,-,-,--,--,--,--,-,-,-,-,-,--,-,-,-,
> |x|x|x| |  |  |  |B |x| | |x|x||.|.|.|.| <- primary pte
> '_'_'_'_'__'__'__'__'_'_'_'_'_''_'_'_'_'
> | | | | |  |  |  |  | | | | |..|S|G|I|X| <- secondary pte
> '_'_'_'_'__'__'__'__'_'_'_'_'__'_'_'_'_'
>
> The above PTE changes is applicable to hugetlbpages aswell.
>
> The patch does the following code changes:
>
> a) moves  the  H_PAGE_F_SECOND and  H_PAGE_F_GIX to 4k PTE
>   header   since it is no more needed b the 64k PTEs.
> b) abstracts  out __real_pte() and __rpte_to_hidx() so the
>   caller  need not know the bit location of the slot.
> c) moves the slot bits the secondary pte.
>

Reviewed-by: Aneesh Kumar K.V 
With changes suggested for the first patch.

> Signed-off-by: Ram Pai 
> ---


-aneesh



Re: [RFC v6 01/62] powerpc: Free up four 64K PTE bits in 4K backed HPTE pages

2017-07-19 Thread Aneesh Kumar K.V

.

>   /*
> @@ -116,8 +104,8 @@ int __hash_page_4K(unsigned long ea, unsigned long 
> access, unsigned long vsid,
>* On hash insert failure we use old pte value and we don't
>* want slot information there if we have a insert failure.
>*/
> - old_pte &= ~(H_PAGE_HASHPTE | H_PAGE_F_GIX | H_PAGE_F_SECOND);
> - new_pte &= ~(H_PAGE_HASHPTE | H_PAGE_F_GIX | H_PAGE_F_SECOND);
> + old_pte &= ~(H_PAGE_HASHPTE);
> + new_pte &= ~(H_PAGE_HASHPTE);
>   goto htab_insert_hpte;
>   }

With the current path order and above hunk we will breaks the bisect I guess. 
With the above, when
we convert a 64k hpte to 4khpte, since this is the first patch, we
should clear that H_PAGE_F_GIX and H_PAGE_F_SECOND. We still use them
for 64k. I guess you should move this hunk to second patch.


-aneesh



Re: [RFC v6 01/62] powerpc: Free up four 64K PTE bits in 4K backed HPTE pages

2017-07-19 Thread Aneesh Kumar K.V

.

>   /*
> @@ -116,8 +104,8 @@ int __hash_page_4K(unsigned long ea, unsigned long 
> access, unsigned long vsid,
>* On hash insert failure we use old pte value and we don't
>* want slot information there if we have a insert failure.
>*/
> - old_pte &= ~(H_PAGE_HASHPTE | H_PAGE_F_GIX | H_PAGE_F_SECOND);
> - new_pte &= ~(H_PAGE_HASHPTE | H_PAGE_F_GIX | H_PAGE_F_SECOND);
> + old_pte &= ~(H_PAGE_HASHPTE);
> + new_pte &= ~(H_PAGE_HASHPTE);
>   goto htab_insert_hpte;
>   }

With the current path order and above hunk we will breaks the bisect I guess. 
With the above, when
we convert a 64k hpte to 4khpte, since this is the first patch, we
should clear that H_PAGE_F_GIX and H_PAGE_F_SECOND. We still use them
for 64k. I guess you should move this hunk to second patch.


-aneesh



[PATCH] staging: fsl-mc: fix resource_size.cocci warnings

2017-07-19 Thread Julia Lawall
 Use resource_size function on resource object
 instead of explicit computation.

Generated by: scripts/coccinelle/api/resource_size.cocci

Fixes: a037b7ec2eb7 ("staging: fsl-mc: allow the driver compile multi-arch")
CC: Laurentiu Tudor 
Signed-off-by: Julia Lawall 
Signed-off-by: Fengguang Wu 
---

url:
https://github.com/0day-ci/linux/commits/laurentiu-tudor-nxp-com/staging-fsl-mc-make-the-driver-compile-on-other-architectures/20170718-021715
:: branch date: 2 days ago
:: commit date: 2 days ago


 mc-io.c |3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

--- a/drivers/staging/fsl-mc/bus/mc-io.c
+++ b/drivers/staging/fsl-mc/bus/mc-io.c
@@ -242,8 +242,7 @@ int __must_check fsl_mc_portal_allocate(
goto error_cleanup_resource;

mc_portal_phys_addr = dpmcp_dev->regions[0].start;
-   mc_portal_size = dpmcp_dev->regions[0].end -
-dpmcp_dev->regions[0].start + 1;
+   mc_portal_size = resource_size(dpmcp_dev->regions);

if (WARN_ON(mc_portal_size != mc_bus_dev->mc_io->portal_size))
goto error_cleanup_resource;


[PATCH] staging: fsl-mc: fix resource_size.cocci warnings

2017-07-19 Thread Julia Lawall
 Use resource_size function on resource object
 instead of explicit computation.

Generated by: scripts/coccinelle/api/resource_size.cocci

Fixes: a037b7ec2eb7 ("staging: fsl-mc: allow the driver compile multi-arch")
CC: Laurentiu Tudor 
Signed-off-by: Julia Lawall 
Signed-off-by: Fengguang Wu 
---

url:
https://github.com/0day-ci/linux/commits/laurentiu-tudor-nxp-com/staging-fsl-mc-make-the-driver-compile-on-other-architectures/20170718-021715
:: branch date: 2 days ago
:: commit date: 2 days ago


 mc-io.c |3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

--- a/drivers/staging/fsl-mc/bus/mc-io.c
+++ b/drivers/staging/fsl-mc/bus/mc-io.c
@@ -242,8 +242,7 @@ int __must_check fsl_mc_portal_allocate(
goto error_cleanup_resource;

mc_portal_phys_addr = dpmcp_dev->regions[0].start;
-   mc_portal_size = dpmcp_dev->regions[0].end -
-dpmcp_dev->regions[0].start + 1;
+   mc_portal_size = resource_size(dpmcp_dev->regions);

if (WARN_ON(mc_portal_size != mc_bus_dev->mc_io->portal_size))
goto error_cleanup_resource;


Re: [PATCH] net: tehuti: don't process data if it has not been copied from userspace

2017-07-19 Thread David Miller
From: Colin King 
Date: Wed, 19 Jul 2017 18:46:59 +0100

> From: Colin Ian King 
> 
> The array data is only populated with valid information from userspace
> if cmd != SIOCDEVPRIVATE, other cases the array contains garbage on
> the stack. The subsequent switch statement acts on a subcommand in
> data[0] which could be any garbage value if cmd is SIOCDEVPRIVATE which
> seems incorrect to me.  Instead, just return EOPNOTSUPP for the case
> where cmd == SIOCDEVPRIVATE to avoid this issue.
> 
> As a side note, I suspect that the original intention of the code
> was for this ioctl to work just for cmd == SIOCDEVPRIVATE (and the
> current logic is reversed). However, I don't wont to change the current
> semantics in case any userspace code relies on this existing behaviour.
> 
> Detected by CoverityScan, CID#139647 ("Uninitialized scalar variable")
> 
> Signed-off-by: Colin Ian King 

Yeah this is the safest change for now, applied.

Francois added the register address range checking a year after the
driver was added, so maybe someone used this facility.

It should have been done via ethtool getregs...


Re: [PATCH] net: tehuti: don't process data if it has not been copied from userspace

2017-07-19 Thread David Miller
From: Colin King 
Date: Wed, 19 Jul 2017 18:46:59 +0100

> From: Colin Ian King 
> 
> The array data is only populated with valid information from userspace
> if cmd != SIOCDEVPRIVATE, other cases the array contains garbage on
> the stack. The subsequent switch statement acts on a subcommand in
> data[0] which could be any garbage value if cmd is SIOCDEVPRIVATE which
> seems incorrect to me.  Instead, just return EOPNOTSUPP for the case
> where cmd == SIOCDEVPRIVATE to avoid this issue.
> 
> As a side note, I suspect that the original intention of the code
> was for this ioctl to work just for cmd == SIOCDEVPRIVATE (and the
> current logic is reversed). However, I don't wont to change the current
> semantics in case any userspace code relies on this existing behaviour.
> 
> Detected by CoverityScan, CID#139647 ("Uninitialized scalar variable")
> 
> Signed-off-by: Colin Ian King 

Yeah this is the safest change for now, applied.

Francois added the register address range checking a year after the
driver was added, so maybe someone used this facility.

It should have been done via ethtool getregs...


Re: [PATCH] documentation: Fix two-CPU control-dependency example

2017-07-19 Thread Paul E. McKenney
On Thu, Jul 20, 2017 at 09:31:41AM +0800, Boqun Feng wrote:
> On Wed, Jul 19, 2017 at 02:56:02PM -0700, Paul E. McKenney wrote:
> > On Thu, Jul 20, 2017 at 06:33:26AM +0900, Akira Yokosawa wrote:
> > > On 2017/07/20 2:43, Paul E. McKenney wrote:
> > > > On Mon, Jul 17, 2017 at 05:24:42PM +0900, Akira Yokosawa wrote:
> > > >> >From b798b9b631e237d285aa8699da00bfb8ced33bea Mon Sep 17 00:00:00 2001
> > > >> From: Akira Yokosawa 
> > > >> Date: Mon, 17 Jul 2017 16:25:33 +0900
> > > >> Subject: [PATCH] documentation: Fix two-CPU control-dependency example
> > > >>
> > > >> In commit 5646f7acc95f ("memory-barriers: Fix control-ordering
> > > >> no-transitivity example"), the operator in "if" statement of
> > > >> the two-CPU example was modified from ">=" to ">".
> > > >> Now the example misses the point because there is no party
> > > >> who will modify "x" nor "y". So each CPU performs only the
> > > >> READ_ONCE().
> > > >>
> > > >> The point of this example is to use control dependency for ordering,
> > > >> and the WRITE_ONCE() should always be executed.
> > > >>
> > > >> So it was correct prior to the above mentioned commit. Partial
> > > >> revert of the commit (with context adjustments regarding other
> > > >> changes thereafter) restores the point.
> > > >>
> > > >> Note that the three-CPU example demonstrating the lack of
> > > >> transitivity stands regardless of this partial revert.
> > > >>
> > > >> Signed-off-by: Akira Yokosawa 
> > > > 
> > > > Hello, Akira,
> > > > 
> > > > You are quite right that many compilers would generate straightforward
> > > > code for the code fragment below, and in that case, the assertion could
> > > > never trigger due to either TSO or control dependencies, depending on
> > > > the architecture this was running on.
> > > > 
> > > > However, if the compiler was too smart for our good, it could figure
> > > > out that "x" and "y" only take on the values zero and one, so that
> > > > the "if" would always be taken.  At that point, the compiler could
> > > > simply ignore the "if" with the result shown below.
> > > > 
> > > >> ---
> > > >>  Documentation/memory-barriers.txt | 2 +-
> > > >>  1 file changed, 1 insertion(+), 1 deletion(-)
> > > >>
> > > >> diff --git a/Documentation/memory-barriers.txt 
> > > >> b/Documentation/memory-barriers.txt
> > > >> index c4ddfcd..c1ebe99 100644
> > > >> --- a/Documentation/memory-barriers.txt
> > > >> +++ b/Documentation/memory-barriers.txt
> > > >> @@ -851,7 +851,7 @@ demonstrated by two related examples, with the 
> > > >> initial values of
> > > >>CPU 0 CPU 1
> > > >>===   ===
> > > >>r1 = READ_ONCE(x);r2 = READ_ONCE(y);
> > > >> -  if (r1 > 0)   if (r2 > 0)
> > > >> +  if (r1 >= 0)  if (r2 >= 0)
> > > >>  WRITE_ONCE(y, 1); WRITE_ONCE(x, 1);
> > > >>
> > > >>assert(!(r1 == 1 && r2 == 1));
> > > > 
> > > > Original program:
> > > > 
> > > > CPU 0 CPU 1
> > > > ===   ===
> > > > r1 = READ_ONCE(x);r2 = READ_ONCE(y);
> > > > if (r1 >= 0)  if (r2 >= 0)
> > > >   WRITE_ONCE(y, 1); WRITE_ONCE(x, 1);
> > > > 
> > > > assert(!(r1 == 1 && r2 == 1));
> > > > 
> > > > Enthusiastically optimized program:
> > > > 
> > > > CPU 0 CPU 1
> > > > ===   ===
> > > > r1 = READ_ONCE(x);r2 = READ_ONCE(y);
> > > > WRITE_ONCE(y, 1); WRITE_ONCE(x, 1);
> > > > 
> > > > assert(!(r1 == 1 && r2 == 1));
> > > > 
> > > > This optimized version could trigger the assertion.
> > > > 
> > > > So we do need to stick with the ">" comparison.
> > > 
> > > Well but,
> > > 
> > > Current example:
> > > 
> > >   CPU 0 CPU 1
> > >   ===   ===
> > >   r1 = READ_ONCE(x);r2 = READ_ONCE(y);
> > >   if (r1 > 0)   if (r2 > 0)
> > > WRITE_ONCE(y, 1); WRITE_ONCE(x, 1);
> > > 
> > >   assert(!(r1 == 1 && r2 == 1));
> > > 
> > > Such a clever compiler might be able to prove that "x" and "y"
> > > are never modified and end up in the following:
> > > 
> 
> Hi Akira,
> 
> I wouldn't call that compiler a clever one, it's a broken one ;-)
> 
> So here is the thing: READ_ONCE() is a *volatile* load, which means the
> compiler has to generate code that actually does a load, so the values
> of r1 and r2 depend on the loads, therefore, a sane compiler will not 
> optimize the if()s out because the volatile semantics of READ_ONCE().
> Otherwise, I think we have a lot more to worry about than this case.
> 
> > >   CPU 0 CPU 1
> > >   ===   ===
> > >   r1 = READ_ONCE(x);r2 = READ_ONCE(y);
> > > 
> > >   

Re: [PATCH] documentation: Fix two-CPU control-dependency example

2017-07-19 Thread Paul E. McKenney
On Thu, Jul 20, 2017 at 09:31:41AM +0800, Boqun Feng wrote:
> On Wed, Jul 19, 2017 at 02:56:02PM -0700, Paul E. McKenney wrote:
> > On Thu, Jul 20, 2017 at 06:33:26AM +0900, Akira Yokosawa wrote:
> > > On 2017/07/20 2:43, Paul E. McKenney wrote:
> > > > On Mon, Jul 17, 2017 at 05:24:42PM +0900, Akira Yokosawa wrote:
> > > >> >From b798b9b631e237d285aa8699da00bfb8ced33bea Mon Sep 17 00:00:00 2001
> > > >> From: Akira Yokosawa 
> > > >> Date: Mon, 17 Jul 2017 16:25:33 +0900
> > > >> Subject: [PATCH] documentation: Fix two-CPU control-dependency example
> > > >>
> > > >> In commit 5646f7acc95f ("memory-barriers: Fix control-ordering
> > > >> no-transitivity example"), the operator in "if" statement of
> > > >> the two-CPU example was modified from ">=" to ">".
> > > >> Now the example misses the point because there is no party
> > > >> who will modify "x" nor "y". So each CPU performs only the
> > > >> READ_ONCE().
> > > >>
> > > >> The point of this example is to use control dependency for ordering,
> > > >> and the WRITE_ONCE() should always be executed.
> > > >>
> > > >> So it was correct prior to the above mentioned commit. Partial
> > > >> revert of the commit (with context adjustments regarding other
> > > >> changes thereafter) restores the point.
> > > >>
> > > >> Note that the three-CPU example demonstrating the lack of
> > > >> transitivity stands regardless of this partial revert.
> > > >>
> > > >> Signed-off-by: Akira Yokosawa 
> > > > 
> > > > Hello, Akira,
> > > > 
> > > > You are quite right that many compilers would generate straightforward
> > > > code for the code fragment below, and in that case, the assertion could
> > > > never trigger due to either TSO or control dependencies, depending on
> > > > the architecture this was running on.
> > > > 
> > > > However, if the compiler was too smart for our good, it could figure
> > > > out that "x" and "y" only take on the values zero and one, so that
> > > > the "if" would always be taken.  At that point, the compiler could
> > > > simply ignore the "if" with the result shown below.
> > > > 
> > > >> ---
> > > >>  Documentation/memory-barriers.txt | 2 +-
> > > >>  1 file changed, 1 insertion(+), 1 deletion(-)
> > > >>
> > > >> diff --git a/Documentation/memory-barriers.txt 
> > > >> b/Documentation/memory-barriers.txt
> > > >> index c4ddfcd..c1ebe99 100644
> > > >> --- a/Documentation/memory-barriers.txt
> > > >> +++ b/Documentation/memory-barriers.txt
> > > >> @@ -851,7 +851,7 @@ demonstrated by two related examples, with the 
> > > >> initial values of
> > > >>CPU 0 CPU 1
> > > >>===   ===
> > > >>r1 = READ_ONCE(x);r2 = READ_ONCE(y);
> > > >> -  if (r1 > 0)   if (r2 > 0)
> > > >> +  if (r1 >= 0)  if (r2 >= 0)
> > > >>  WRITE_ONCE(y, 1); WRITE_ONCE(x, 1);
> > > >>
> > > >>assert(!(r1 == 1 && r2 == 1));
> > > > 
> > > > Original program:
> > > > 
> > > > CPU 0 CPU 1
> > > > ===   ===
> > > > r1 = READ_ONCE(x);r2 = READ_ONCE(y);
> > > > if (r1 >= 0)  if (r2 >= 0)
> > > >   WRITE_ONCE(y, 1); WRITE_ONCE(x, 1);
> > > > 
> > > > assert(!(r1 == 1 && r2 == 1));
> > > > 
> > > > Enthusiastically optimized program:
> > > > 
> > > > CPU 0 CPU 1
> > > > ===   ===
> > > > r1 = READ_ONCE(x);r2 = READ_ONCE(y);
> > > > WRITE_ONCE(y, 1); WRITE_ONCE(x, 1);
> > > > 
> > > > assert(!(r1 == 1 && r2 == 1));
> > > > 
> > > > This optimized version could trigger the assertion.
> > > > 
> > > > So we do need to stick with the ">" comparison.
> > > 
> > > Well but,
> > > 
> > > Current example:
> > > 
> > >   CPU 0 CPU 1
> > >   ===   ===
> > >   r1 = READ_ONCE(x);r2 = READ_ONCE(y);
> > >   if (r1 > 0)   if (r2 > 0)
> > > WRITE_ONCE(y, 1); WRITE_ONCE(x, 1);
> > > 
> > >   assert(!(r1 == 1 && r2 == 1));
> > > 
> > > Such a clever compiler might be able to prove that "x" and "y"
> > > are never modified and end up in the following:
> > > 
> 
> Hi Akira,
> 
> I wouldn't call that compiler a clever one, it's a broken one ;-)
> 
> So here is the thing: READ_ONCE() is a *volatile* load, which means the
> compiler has to generate code that actually does a load, so the values
> of r1 and r2 depend on the loads, therefore, a sane compiler will not 
> optimize the if()s out because the volatile semantics of READ_ONCE().
> Otherwise, I think we have a lot more to worry about than this case.
> 
> > >   CPU 0 CPU 1
> > >   ===   ===
> > >   r1 = READ_ONCE(x);r2 = READ_ONCE(y);
> > > 
> > >   assert(!(r1 == 1 && r2 == 1));
> > > 
> > 

[PATCH] xhci: fix memleak in xhci_run()

2017-07-19 Thread shuwang
From: Shu Wang 

Found this issue by kmemleak.
xhci_run() did not check return val and free command for
xhci_queue_vendor_command()

unreferenced object 0x88011c0be500 (size 64):
  comm "kworker/0:1", pid 58, jiffies 4294670908 (age 50.420s)
  hex dump (first 32 bytes):
  backtrace:
[] kmemleak_alloc+0x4a/0xa0
[] kmem_cache_alloc_trace+0xca/0x1d0
[] xhci_alloc_command+0x44/0x130
[] xhci_run+0x4cc/0x630
[] usb_add_hcd+0x3bb/0x950
[] usb_hcd_pci_probe+0x188/0x500
[] xhci_pci_probe+0x2c/0x220
[] local_pci_probe+0x45/0xa0
[] work_for_cpu_fn+0x14/0x20
[] process_one_work+0x149/0x360
[] worker_thread+0x1d8/0x3c0
[] kthread+0x109/0x140
[] ret_from_fork+0x25/0x30
[] 0x

Signed-off-by: Shu Wang 
---
 drivers/usb/host/xhci.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 56f85df..b2a8179 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -622,8 +622,10 @@ int xhci_run(struct usb_hcd *hcd)
if (!command)
return -ENOMEM;
 
-   xhci_queue_vendor_command(xhci, command, 0, 0, 0,
+   ret = xhci_queue_vendor_command(xhci, command, 0, 0, 0,
TRB_TYPE(TRB_NEC_GET_FW));
+   if (ret)
+   xhci_free_command(xhci, command);
}
xhci_dbg_trace(xhci, trace_xhci_dbg_init,
"Finished xhci_run for USB2 roothub");
-- 
2.5.0



[PATCH] xhci: fix memleak in xhci_run()

2017-07-19 Thread shuwang
From: Shu Wang 

Found this issue by kmemleak.
xhci_run() did not check return val and free command for
xhci_queue_vendor_command()

unreferenced object 0x88011c0be500 (size 64):
  comm "kworker/0:1", pid 58, jiffies 4294670908 (age 50.420s)
  hex dump (first 32 bytes):
  backtrace:
[] kmemleak_alloc+0x4a/0xa0
[] kmem_cache_alloc_trace+0xca/0x1d0
[] xhci_alloc_command+0x44/0x130
[] xhci_run+0x4cc/0x630
[] usb_add_hcd+0x3bb/0x950
[] usb_hcd_pci_probe+0x188/0x500
[] xhci_pci_probe+0x2c/0x220
[] local_pci_probe+0x45/0xa0
[] work_for_cpu_fn+0x14/0x20
[] process_one_work+0x149/0x360
[] worker_thread+0x1d8/0x3c0
[] kthread+0x109/0x140
[] ret_from_fork+0x25/0x30
[] 0x

Signed-off-by: Shu Wang 
---
 drivers/usb/host/xhci.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 56f85df..b2a8179 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -622,8 +622,10 @@ int xhci_run(struct usb_hcd *hcd)
if (!command)
return -ENOMEM;
 
-   xhci_queue_vendor_command(xhci, command, 0, 0, 0,
+   ret = xhci_queue_vendor_command(xhci, command, 0, 0, 0,
TRB_TYPE(TRB_NEC_GET_FW));
+   if (ret)
+   xhci_free_command(xhci, command);
}
xhci_dbg_trace(xhci, trace_xhci_dbg_init,
"Finished xhci_run for USB2 roothub");
-- 
2.5.0



[PATCH v3 3/8] phy: qcom-qmp: Fix phy pipe clock name

2017-07-19 Thread Varadarajan Narayanan
Presently, the phy pipe clock's name is assumed to be either
usb3_phy_pipe_clk_src or pcie_XX_pipe_clk_src (where XX is the
phy lane's number). However, this will not work if an SoC has
more than one instance of the phy. Hence, instead of assuming
the name of the clock, fetch it from the DT.

Acked-by: Vivek Gautam 
Signed-off-by: Varadarajan Narayanan 
---
 drivers/phy/qualcomm/phy-qcom-qmp.c | 28 
 1 file changed, 16 insertions(+), 12 deletions(-)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c 
b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 78ca628..97020ec 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -925,20 +925,13 @@ static int qcom_qmp_phy_clk_init(struct device *dev)
  *clk  |   +---+   |   +-+
  * +---+
  */
-static int phy_pipe_clk_register(struct qcom_qmp *qmp, int id)
+static int phy_pipe_clk_register(struct qcom_qmp *qmp, const char *clk_name)
 {
-   char name[24];
struct clk_fixed_rate *fixed;
struct clk_init_data init = { };
 
-   switch (qmp->cfg->type) {
-   case PHY_TYPE_USB3:
-   snprintf(name, sizeof(name), "usb3_phy_pipe_clk_src");
-   break;
-   case PHY_TYPE_PCIE:
-   snprintf(name, sizeof(name), "pcie_%d_pipe_clk_src", id);
-   break;
-   default:
+   if ((qmp->cfg->type != PHY_TYPE_USB3) &&
+   (qmp->cfg->type != PHY_TYPE_PCIE)) {
/* not all phys register pipe clocks, so return success */
return 0;
}
@@ -947,7 +940,7 @@ static int phy_pipe_clk_register(struct qcom_qmp *qmp, int 
id)
if (!fixed)
return -ENOMEM;
 
-   init.name = name;
+   init.name = clk_name;
init.ops = _fixed_rate_ops;
 
/* controllers using QMP phys use 125MHz pipe clock interface */
@@ -1110,6 +1103,8 @@ static int qcom_qmp_phy_probe(struct platform_device 
*pdev)
 
id = 0;
for_each_available_child_of_node(dev->of_node, child) {
+   const char *clk_name;
+
/* Create per-lane phy */
ret = qcom_qmp_phy_create(dev, child, id);
if (ret) {
@@ -1118,11 +1113,20 @@ static int qcom_qmp_phy_probe(struct platform_device 
*pdev)
return ret;
}
 
+   ret = of_property_read_string(child, "clock-output-names",
+   _name);
+   if (ret) {
+   dev_err(dev,
+   "failed to get clock-output-names for lane%d 
phy, %d\n",
+   id, ret);
+   return ret;
+   }
+
/*
 * Register the pipe clock provided by phy.
 * See function description to see details of this pipe clock.
 */
-   ret = phy_pipe_clk_register(qmp, id);
+   ret = phy_pipe_clk_register(qmp, clk_name);
if (ret) {
dev_err(qmp->dev,
"failed to register pipe clock source\n");
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of 
Code Aurora Forum, hosted by The Linux Foundation



[PATCH v3 3/8] phy: qcom-qmp: Fix phy pipe clock name

2017-07-19 Thread Varadarajan Narayanan
Presently, the phy pipe clock's name is assumed to be either
usb3_phy_pipe_clk_src or pcie_XX_pipe_clk_src (where XX is the
phy lane's number). However, this will not work if an SoC has
more than one instance of the phy. Hence, instead of assuming
the name of the clock, fetch it from the DT.

Acked-by: Vivek Gautam 
Signed-off-by: Varadarajan Narayanan 
---
 drivers/phy/qualcomm/phy-qcom-qmp.c | 28 
 1 file changed, 16 insertions(+), 12 deletions(-)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c 
b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 78ca628..97020ec 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -925,20 +925,13 @@ static int qcom_qmp_phy_clk_init(struct device *dev)
  *clk  |   +---+   |   +-+
  * +---+
  */
-static int phy_pipe_clk_register(struct qcom_qmp *qmp, int id)
+static int phy_pipe_clk_register(struct qcom_qmp *qmp, const char *clk_name)
 {
-   char name[24];
struct clk_fixed_rate *fixed;
struct clk_init_data init = { };
 
-   switch (qmp->cfg->type) {
-   case PHY_TYPE_USB3:
-   snprintf(name, sizeof(name), "usb3_phy_pipe_clk_src");
-   break;
-   case PHY_TYPE_PCIE:
-   snprintf(name, sizeof(name), "pcie_%d_pipe_clk_src", id);
-   break;
-   default:
+   if ((qmp->cfg->type != PHY_TYPE_USB3) &&
+   (qmp->cfg->type != PHY_TYPE_PCIE)) {
/* not all phys register pipe clocks, so return success */
return 0;
}
@@ -947,7 +940,7 @@ static int phy_pipe_clk_register(struct qcom_qmp *qmp, int 
id)
if (!fixed)
return -ENOMEM;
 
-   init.name = name;
+   init.name = clk_name;
init.ops = _fixed_rate_ops;
 
/* controllers using QMP phys use 125MHz pipe clock interface */
@@ -1110,6 +1103,8 @@ static int qcom_qmp_phy_probe(struct platform_device 
*pdev)
 
id = 0;
for_each_available_child_of_node(dev->of_node, child) {
+   const char *clk_name;
+
/* Create per-lane phy */
ret = qcom_qmp_phy_create(dev, child, id);
if (ret) {
@@ -1118,11 +1113,20 @@ static int qcom_qmp_phy_probe(struct platform_device 
*pdev)
return ret;
}
 
+   ret = of_property_read_string(child, "clock-output-names",
+   _name);
+   if (ret) {
+   dev_err(dev,
+   "failed to get clock-output-names for lane%d 
phy, %d\n",
+   id, ret);
+   return ret;
+   }
+
/*
 * Register the pipe clock provided by phy.
 * See function description to see details of this pipe clock.
 */
-   ret = phy_pipe_clk_register(qmp, id);
+   ret = phy_pipe_clk_register(qmp, clk_name);
if (ret) {
dev_err(qmp->dev,
"failed to register pipe clock source\n");
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of 
Code Aurora Forum, hosted by The Linux Foundation



[PATCH v3 5/8] phy: qcom-qmp: Add support for IPQ8074

2017-07-19 Thread Varadarajan Narayanan
Add definitions required to enable QMP phy support for IPQ8074.

Signed-off-by: smuthayy 
Signed-off-by: Varadarajan Narayanan 
---
 drivers/phy/qualcomm/phy-qcom-qmp.c | 135 
 1 file changed, 135 insertions(+)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c 
b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 000ad1c..9019f66 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -59,6 +59,7 @@
 #define QSERDES_COM_PLL_RCTRL_MODE10x088
 #define QSERDES_COM_PLL_CCTRL_MODE00x090
 #define QSERDES_COM_PLL_CCTRL_MODE10x094
+#define QSERDES_COM_BIAS_EN_CTRL_BY_PSM0x0a8
 #define QSERDES_COM_SYSCLK_EN_SEL  0x0ac
 #define QSERDES_COM_RESETSM_CNTRL  0x0b4
 #define QSERDES_COM_RESTRIM_CTRL   0x0bc
@@ -143,6 +144,11 @@
 #define QPHY_LOCK_DETECT_CONFIG3   0x88
 #define QPHY_PWRUP_RESET_DLY_TIME_AUXCLK   0xa0
 #define QPHY_LP_WAKEUP_DLY_TIME_AUXCLK 0xa4
+#define QPHY_PLL_LOCK_CHK_DLY_TIME_AUXCLK_LSB  0x1A8
+#define QPHY_OSC_DTCT_ACTIONS  0x1AC
+#define QPHY_RX_SIGDET_LVL 0x1D8
+#define QPHY_L1SS_WAKEUP_DLY_TIME_AUXCLK_LSB   0x1DC
+#define QPHY_L1SS_WAKEUP_DLY_TIME_AUXCLK_MSB   0x1E0
 
 /* QPHY_SW_RESET bit */
 #define SW_RESET   BIT(0)
@@ -224,6 +230,17 @@ enum qphy_reg_layout {
[QPHY_PCS_READY_STATUS] = 0x174,
 };
 
+static const unsigned int ipq8074_pciephy_regs_layout[] = {
+   [QPHY_COM_SW_RESET] = 0x800,
+   [QPHY_COM_POWER_DOWN_CONTROL]   = 0x804,
+   [QPHY_COM_START_CONTROL]= 0x808,
+   [QPHY_COM_PCS_READY_STATUS] = QPHY_REG_INVAL,
+   [QPHY_PLL_LOCK_CHK_DLY_TIME]= 0xa8,
+   [QPHY_SW_RESET] = 0x00,
+   [QPHY_START_CTRL]   = 0x08,
+   [QPHY_PCS_READY_STATUS] = 0x174,
+};
+
 static const unsigned int usb3phy_regs_layout[] = {
[QPHY_FLL_CNTRL1]   = 0xc0,
[QPHY_FLL_CNTRL2]   = 0xc4,
@@ -582,6 +599,121 @@ static inline void qphy_clrbits(void __iomem *base, u32 
offset, u32 val)
.mask_pcs_ready = PHYSTATUS,
 };
 
+static const struct qmp_phy_init_tbl ipq8074_pcie_serdes_tbl[] = {
+   QMP_PHY_INIT_CFG(QSERDES_COM_BIAS_EN_CLKBUFLR_EN, 0x18),
+   QMP_PHY_INIT_CFG(QSERDES_COM_CLK_ENABLE1, 0x10),
+   QMP_PHY_INIT_CFG(QSERDES_COM_BG_TRIM, 0xf),
+   QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP_EN, 0x1),
+   QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_MAP, 0x0),
+   QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_TIMER1, 0x1f),
+   QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_TIMER2, 0x3f),
+   QMP_PHY_INIT_CFG(QSERDES_COM_CMN_CONFIG, 0x6),
+   QMP_PHY_INIT_CFG(QSERDES_COM_PLL_IVCO, 0xf),
+   QMP_PHY_INIT_CFG(QSERDES_COM_HSCLK_SEL, 0x0),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SVS_MODE_CLK_SEL, 0x1),
+   QMP_PHY_INIT_CFG(QSERDES_COM_CORE_CLK_EN, 0x20),
+   QMP_PHY_INIT_CFG(QSERDES_COM_CORECLK_DIV, 0xa),
+   QMP_PHY_INIT_CFG(QSERDES_COM_RESETSM_CNTRL, 0x20),
+   QMP_PHY_INIT_CFG(QSERDES_COM_BG_TIMER, 0xa),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SYSCLK_EN_SEL, 0xa),
+   QMP_PHY_INIT_CFG(QSERDES_COM_DEC_START_MODE0, 0x82),
+   QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START3_MODE0, 0x3),
+   QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START2_MODE0, 0x55),
+   QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START1_MODE0, 0x55),
+   QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP3_MODE0, 0x0),
+   QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP2_MODE0, 0xD),
+   QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP1_MODE0, 0xD04),
+   QMP_PHY_INIT_CFG(QSERDES_COM_CLK_SELECT, 0x33),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SYS_CLK_CTRL, 0x2),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SYSCLK_BUF_ENABLE, 0x1f),
+   QMP_PHY_INIT_CFG(QSERDES_COM_CP_CTRL_MODE0, 0xb),
+   QMP_PHY_INIT_CFG(QSERDES_COM_PLL_RCTRL_MODE0, 0x16),
+   QMP_PHY_INIT_CFG(QSERDES_COM_PLL_CCTRL_MODE0, 0x28),
+   QMP_PHY_INIT_CFG(QSERDES_COM_INTEGLOOP_GAIN1_MODE0, 0x0),
+   QMP_PHY_INIT_CFG(QSERDES_COM_INTEGLOOP_GAIN0_MODE0, 0x80),
+   QMP_PHY_INIT_CFG(QSERDES_COM_BIAS_EN_CTRL_BY_PSM, 0x1),
+   QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_CTRL, 0xa),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SSC_EN_CENTER, 0x1),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SSC_PER1, 0x31),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SSC_PER2, 0x1),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SSC_ADJ_PER1, 0x2),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SSC_ADJ_PER2, 0x0),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SSC_STEP_SIZE1, 0x2f),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SSC_STEP_SIZE2, 0x19),
+   QMP_PHY_INIT_CFG(QSERDES_COM_CLK_EP_DIV, 0x19),
+   QMP_PHY_INIT_CFG(QSERDES_RX_SIGDET_CNTRL, 0x7),
+};
+
+static const struct 

[PATCH v3 5/8] phy: qcom-qmp: Add support for IPQ8074

2017-07-19 Thread Varadarajan Narayanan
Add definitions required to enable QMP phy support for IPQ8074.

Signed-off-by: smuthayy 
Signed-off-by: Varadarajan Narayanan 
---
 drivers/phy/qualcomm/phy-qcom-qmp.c | 135 
 1 file changed, 135 insertions(+)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c 
b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 000ad1c..9019f66 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -59,6 +59,7 @@
 #define QSERDES_COM_PLL_RCTRL_MODE10x088
 #define QSERDES_COM_PLL_CCTRL_MODE00x090
 #define QSERDES_COM_PLL_CCTRL_MODE10x094
+#define QSERDES_COM_BIAS_EN_CTRL_BY_PSM0x0a8
 #define QSERDES_COM_SYSCLK_EN_SEL  0x0ac
 #define QSERDES_COM_RESETSM_CNTRL  0x0b4
 #define QSERDES_COM_RESTRIM_CTRL   0x0bc
@@ -143,6 +144,11 @@
 #define QPHY_LOCK_DETECT_CONFIG3   0x88
 #define QPHY_PWRUP_RESET_DLY_TIME_AUXCLK   0xa0
 #define QPHY_LP_WAKEUP_DLY_TIME_AUXCLK 0xa4
+#define QPHY_PLL_LOCK_CHK_DLY_TIME_AUXCLK_LSB  0x1A8
+#define QPHY_OSC_DTCT_ACTIONS  0x1AC
+#define QPHY_RX_SIGDET_LVL 0x1D8
+#define QPHY_L1SS_WAKEUP_DLY_TIME_AUXCLK_LSB   0x1DC
+#define QPHY_L1SS_WAKEUP_DLY_TIME_AUXCLK_MSB   0x1E0
 
 /* QPHY_SW_RESET bit */
 #define SW_RESET   BIT(0)
@@ -224,6 +230,17 @@ enum qphy_reg_layout {
[QPHY_PCS_READY_STATUS] = 0x174,
 };
 
+static const unsigned int ipq8074_pciephy_regs_layout[] = {
+   [QPHY_COM_SW_RESET] = 0x800,
+   [QPHY_COM_POWER_DOWN_CONTROL]   = 0x804,
+   [QPHY_COM_START_CONTROL]= 0x808,
+   [QPHY_COM_PCS_READY_STATUS] = QPHY_REG_INVAL,
+   [QPHY_PLL_LOCK_CHK_DLY_TIME]= 0xa8,
+   [QPHY_SW_RESET] = 0x00,
+   [QPHY_START_CTRL]   = 0x08,
+   [QPHY_PCS_READY_STATUS] = 0x174,
+};
+
 static const unsigned int usb3phy_regs_layout[] = {
[QPHY_FLL_CNTRL1]   = 0xc0,
[QPHY_FLL_CNTRL2]   = 0xc4,
@@ -582,6 +599,121 @@ static inline void qphy_clrbits(void __iomem *base, u32 
offset, u32 val)
.mask_pcs_ready = PHYSTATUS,
 };
 
+static const struct qmp_phy_init_tbl ipq8074_pcie_serdes_tbl[] = {
+   QMP_PHY_INIT_CFG(QSERDES_COM_BIAS_EN_CLKBUFLR_EN, 0x18),
+   QMP_PHY_INIT_CFG(QSERDES_COM_CLK_ENABLE1, 0x10),
+   QMP_PHY_INIT_CFG(QSERDES_COM_BG_TRIM, 0xf),
+   QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP_EN, 0x1),
+   QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_MAP, 0x0),
+   QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_TIMER1, 0x1f),
+   QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_TIMER2, 0x3f),
+   QMP_PHY_INIT_CFG(QSERDES_COM_CMN_CONFIG, 0x6),
+   QMP_PHY_INIT_CFG(QSERDES_COM_PLL_IVCO, 0xf),
+   QMP_PHY_INIT_CFG(QSERDES_COM_HSCLK_SEL, 0x0),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SVS_MODE_CLK_SEL, 0x1),
+   QMP_PHY_INIT_CFG(QSERDES_COM_CORE_CLK_EN, 0x20),
+   QMP_PHY_INIT_CFG(QSERDES_COM_CORECLK_DIV, 0xa),
+   QMP_PHY_INIT_CFG(QSERDES_COM_RESETSM_CNTRL, 0x20),
+   QMP_PHY_INIT_CFG(QSERDES_COM_BG_TIMER, 0xa),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SYSCLK_EN_SEL, 0xa),
+   QMP_PHY_INIT_CFG(QSERDES_COM_DEC_START_MODE0, 0x82),
+   QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START3_MODE0, 0x3),
+   QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START2_MODE0, 0x55),
+   QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START1_MODE0, 0x55),
+   QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP3_MODE0, 0x0),
+   QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP2_MODE0, 0xD),
+   QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP1_MODE0, 0xD04),
+   QMP_PHY_INIT_CFG(QSERDES_COM_CLK_SELECT, 0x33),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SYS_CLK_CTRL, 0x2),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SYSCLK_BUF_ENABLE, 0x1f),
+   QMP_PHY_INIT_CFG(QSERDES_COM_CP_CTRL_MODE0, 0xb),
+   QMP_PHY_INIT_CFG(QSERDES_COM_PLL_RCTRL_MODE0, 0x16),
+   QMP_PHY_INIT_CFG(QSERDES_COM_PLL_CCTRL_MODE0, 0x28),
+   QMP_PHY_INIT_CFG(QSERDES_COM_INTEGLOOP_GAIN1_MODE0, 0x0),
+   QMP_PHY_INIT_CFG(QSERDES_COM_INTEGLOOP_GAIN0_MODE0, 0x80),
+   QMP_PHY_INIT_CFG(QSERDES_COM_BIAS_EN_CTRL_BY_PSM, 0x1),
+   QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_CTRL, 0xa),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SSC_EN_CENTER, 0x1),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SSC_PER1, 0x31),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SSC_PER2, 0x1),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SSC_ADJ_PER1, 0x2),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SSC_ADJ_PER2, 0x0),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SSC_STEP_SIZE1, 0x2f),
+   QMP_PHY_INIT_CFG(QSERDES_COM_SSC_STEP_SIZE2, 0x19),
+   QMP_PHY_INIT_CFG(QSERDES_COM_CLK_EP_DIV, 0x19),
+   QMP_PHY_INIT_CFG(QSERDES_RX_SIGDET_CNTRL, 0x7),
+};
+
+static const struct qmp_phy_init_tbl ipq8074_pcie_tx_tbl[] = {
+   

[PATCH v3 0/8] Add support for IPQ8074 PCIe phy and controller

2017-07-19 Thread Varadarajan Narayanan
v3:
  PCI: dwc: qcom: Add support for IPQ8074 PCIe controller
Incoporate Stan's feedback:-
 - Add SoC Wrapper and Synopsys Core IP versions

v2:
  dt-bindings: phy: qmp: Add output-clock-names
Added Rob H's Ack

  dt-bindings: phy: qmp: Add support for QMP phy in IPQ8074
Removed example
Added IPQ8074 specific details

  phy: qcom-qmp: Fix phy pipe clock name
Added Vivek's Ack

  phy: qcom-qmp: Handle unavailable registers
No changes

  phy: qcom-qmp: Add support for IPQ8074
No changes

  PCI: dwc: qcom: Use block IP version for operations
Added new patch to use block IP version instead of v1, v2...

  dt-bindings: pci: qcom: Add support for IPQ8074
Removed example
Added IPQ8074 specific details

  PCI: dwc: qcom: Add support for IPQ8074 PCIe controller
Incorporated Bjorn's feedback:-
 - Removed reset names, helper function to assert/deassert, helper
   function to R/M/W register.
 - Renamed sys_noc clock as iface clock
 - Added deinit if phy power on fails

v1:
Add definitions required to enable QMP phy support for IPQ8074.

Add support for the IPQ8074 PCIe controller.  IPQ8074 supports
Gen 1/2, one lane, two PCIe root complex with support for MSI and
legacy interrupts, and it conforms to PCI Express Base 2.1
specification.

Varadarajan Narayanan (8):
  dt-bindings: phy: qmp: Add output-clock-names
  dt-bindings: phy: qmp: Add support for QMP phy in IPQ8074
  phy: qcom-qmp: Fix phy pipe clock name
  phy: qcom-qmp: Handle unavailable registers
  phy: qcom-qmp: Add support for IPQ8074
  PCI: dwc: qcom: Use block IP version for operations
  dt-bindings: pci: qcom: Add support for IPQ8074
  PCI: dwc: qcom: Add support for IPQ8074 PCIe controller

 .../devicetree/bindings/pci/qcom,pcie.txt  |  23 ++
 .../devicetree/bindings/phy/qcom-qmp-phy.txt   |  11 +
 drivers/pci/dwc/pcie-qcom.c| 378 +
 drivers/phy/qualcomm/phy-qcom-qmp.c| 186 --
 4 files changed, 515 insertions(+), 83 deletions(-)

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of 
Code Aurora Forum, hosted by The Linux Foundation



[PATCH v3 6/8] PCI: dwc: qcom: Use block IP version for operations

2017-07-19 Thread Varadarajan Narayanan
Presently, when support for a new SoC is added, the driver ops
structures and functions are versioned with plain 1, 2, 3 etc.
Instead use the block IP version number.

Signed-off-by: Varadarajan Narayanan 
---
 drivers/pci/dwc/pcie-qcom.c | 124 ++--
 1 file changed, 62 insertions(+), 62 deletions(-)

diff --git a/drivers/pci/dwc/pcie-qcom.c b/drivers/pci/dwc/pcie-qcom.c
index d15657d..98c74d7 100644
--- a/drivers/pci/dwc/pcie-qcom.c
+++ b/drivers/pci/dwc/pcie-qcom.c
@@ -61,7 +61,7 @@
 
 #define PERST_DELAY_US 1000
 
-struct qcom_pcie_resources_v0 {
+struct qcom_pcie_resources_2_1_0 {
struct clk *iface_clk;
struct clk *core_clk;
struct clk *phy_clk;
@@ -75,7 +75,7 @@ struct qcom_pcie_resources_v0 {
struct regulator *vdda_refclk;
 };
 
-struct qcom_pcie_resources_v1 {
+struct qcom_pcie_resources_1_0_0 {
struct clk *iface;
struct clk *aux;
struct clk *master_bus;
@@ -84,7 +84,7 @@ struct qcom_pcie_resources_v1 {
struct regulator *vdda;
 };
 
-struct qcom_pcie_resources_v2 {
+struct qcom_pcie_resources_2_3_2 {
struct clk *aux_clk;
struct clk *master_clk;
struct clk *slave_clk;
@@ -92,7 +92,7 @@ struct qcom_pcie_resources_v2 {
struct clk *pipe_clk;
 };
 
-struct qcom_pcie_resources_v3 {
+struct qcom_pcie_resources_2_4_0 {
struct clk *aux_clk;
struct clk *master_clk;
struct clk *slave_clk;
@@ -111,10 +111,10 @@ struct qcom_pcie_resources_v3 {
 };
 
 union qcom_pcie_resources {
-   struct qcom_pcie_resources_v0 v0;
-   struct qcom_pcie_resources_v1 v1;
-   struct qcom_pcie_resources_v2 v2;
-   struct qcom_pcie_resources_v3 v3;
+   struct qcom_pcie_resources_1_0_0 v1_0_0;
+   struct qcom_pcie_resources_2_1_0 v2_1_0;
+   struct qcom_pcie_resources_2_3_2 v2_3_2;
+   struct qcom_pcie_resources_2_4_0 v2_4_0;
 };
 
 struct qcom_pcie;
@@ -172,7 +172,7 @@ static int qcom_pcie_establish_link(struct qcom_pcie *pcie)
return dw_pcie_wait_for_link(pci);
 }
 
-static void qcom_pcie_v0_v1_ltssm_enable(struct qcom_pcie *pcie)
+static void qcom_pcie_2_1_0_ltssm_enable(struct qcom_pcie *pcie)
 {
u32 val;
 
@@ -182,9 +182,9 @@ static void qcom_pcie_v0_v1_ltssm_enable(struct qcom_pcie 
*pcie)
writel(val, pcie->elbi + PCIE20_ELBI_SYS_CTRL);
 }
 
-static int qcom_pcie_get_resources_v0(struct qcom_pcie *pcie)
+static int qcom_pcie_get_resources_2_1_0(struct qcom_pcie *pcie)
 {
-   struct qcom_pcie_resources_v0 *res = >res.v0;
+   struct qcom_pcie_resources_2_1_0 *res = >res.v2_1_0;
struct dw_pcie *pci = pcie->pci;
struct device *dev = pci->dev;
 
@@ -232,9 +232,9 @@ static int qcom_pcie_get_resources_v0(struct qcom_pcie 
*pcie)
return PTR_ERR_OR_ZERO(res->phy_reset);
 }
 
-static void qcom_pcie_deinit_v0(struct qcom_pcie *pcie)
+static void qcom_pcie_deinit_2_1_0(struct qcom_pcie *pcie)
 {
-   struct qcom_pcie_resources_v0 *res = >res.v0;
+   struct qcom_pcie_resources_2_1_0 *res = >res.v2_1_0;
 
reset_control_assert(res->pci_reset);
reset_control_assert(res->axi_reset);
@@ -249,9 +249,9 @@ static void qcom_pcie_deinit_v0(struct qcom_pcie *pcie)
regulator_disable(res->vdda_refclk);
 }
 
-static int qcom_pcie_init_v0(struct qcom_pcie *pcie)
+static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie)
 {
-   struct qcom_pcie_resources_v0 *res = >res.v0;
+   struct qcom_pcie_resources_2_1_0 *res = >res.v2_1_0;
struct dw_pcie *pci = pcie->pci;
struct device *dev = pci->dev;
u32 val;
@@ -367,9 +367,9 @@ static int qcom_pcie_init_v0(struct qcom_pcie *pcie)
return ret;
 }
 
-static int qcom_pcie_get_resources_v1(struct qcom_pcie *pcie)
+static int qcom_pcie_get_resources_1_0_0(struct qcom_pcie *pcie)
 {
-   struct qcom_pcie_resources_v1 *res = >res.v1;
+   struct qcom_pcie_resources_1_0_0 *res = >res.v1_0_0;
struct dw_pcie *pci = pcie->pci;
struct device *dev = pci->dev;
 
@@ -397,9 +397,9 @@ static int qcom_pcie_get_resources_v1(struct qcom_pcie 
*pcie)
return PTR_ERR_OR_ZERO(res->core);
 }
 
-static void qcom_pcie_deinit_v1(struct qcom_pcie *pcie)
+static void qcom_pcie_deinit_1_0_0(struct qcom_pcie *pcie)
 {
-   struct qcom_pcie_resources_v1 *res = >res.v1;
+   struct qcom_pcie_resources_1_0_0 *res = >res.v1_0_0;
 
reset_control_assert(res->core);
clk_disable_unprepare(res->slave_bus);
@@ -409,9 +409,9 @@ static void qcom_pcie_deinit_v1(struct qcom_pcie *pcie)
regulator_disable(res->vdda);
 }
 
-static int qcom_pcie_init_v1(struct qcom_pcie *pcie)
+static int qcom_pcie_init_1_0_0(struct qcom_pcie *pcie)
 {
-   struct qcom_pcie_resources_v1 *res = >res.v1;
+   struct qcom_pcie_resources_1_0_0 *res = >res.v1_0_0;
struct dw_pcie *pci = pcie->pci;
struct device *dev = pci->dev;
int ret;
@@ 

[PATCH v3 1/8] dt-bindings: phy: qmp: Add output-clock-names

2017-07-19 Thread Varadarajan Narayanan
The phy outputs a clock that will act as the parent for
the phy's pipe clock. Add the name of this clock to the
lane's DT node.

Acked-by: Rob Herring 
Signed-off-by: Varadarajan Narayanan 
---
 Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt 
b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
index e11c563..5d7a51f 100644
--- a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
+++ b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
@@ -60,6 +60,8 @@ Required properties for child node:
   one for each entry in clock-names.
  - clock-names: Must contain following for pcie and usb qmp phys:
 "pipe" for pipe clock specific to each lane.
+ - clock-output-names: Name of the phy clock that will be the parent for
+  the above pipe clock.
 
  - resets: a list of phandles and reset controller specifier pairs,
   one for each entry in reset-names.
@@ -96,6 +98,7 @@ Example:
 
clocks = < GCC_PCIE_0_PIPE_CLK>;
clock-names = "pipe0";
+   clock-output-names = "pcie_0_pipe_clk_src";
resets = < GCC_PCIE_0_PHY_BCR>;
reset-names = "lane0";
};
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of 
Code Aurora Forum, hosted by The Linux Foundation



Re: [kernel-hardening] Re: [RFC PATCH 6/6] arm64: add VMAP_STACK and detect out-of-bounds SP

2017-07-19 Thread Ard Biesheuvel
On 20 July 2017 at 00:32, Laura Abbott  wrote:
> On 07/19/2017 01:08 AM, Ard Biesheuvel wrote:
>> On 18 July 2017 at 22:53, Laura Abbott  wrote:
>>> On 07/15/2017 05:03 PM, Ard Biesheuvel wrote:
 On 14 July 2017 at 22:27, Mark Rutland  wrote:
> On Fri, Jul 14, 2017 at 03:06:06PM +0100, Mark Rutland wrote:
>> On Fri, Jul 14, 2017 at 01:27:14PM +0100, Ard Biesheuvel wrote:
>>> On 14 July 2017 at 11:48, Ard Biesheuvel  
>>> wrote:
 On 14 July 2017 at 11:32, Mark Rutland  wrote:
> On Thu, Jul 13, 2017 at 07:28:48PM +0100, Ard Biesheuvel wrote:
>>
>> OK, so here's a crazy idea: what if we
>> a) carve out a dedicated range in the VMALLOC area for stacks
>> b) for each stack, allocate a naturally aligned window of 2x the 
>> stack
>> size, and map the stack inside it, leaving the remaining space
>> unmapped
>>
> The logical ops (TST) and conditional branches (TB(N)Z, CB(N)Z) 
> operate
> on XZR rather than SP, so to do this we need to get the SP value into 
> a
> GPR.
>
> Previously, I assumed this meant we needed to corrupt a GPR (and hence
> stash that GPR in a sysreg), so I started writing code to free 
> sysregs.
>
> However, I now realise I was being thick, since we can stash the GPR
> in the SP:
>
> sub sp, sp, x0  // sp = orig_sp - x0
> add x0, sp, x0  // x0 = x0 - (orig_sp - x0) == orig_sp
>>
>> That comment is off, and should say x0 = x0 + (orig_sp - x0) == 
>> orig_sp
>>
> sub x0, x0, #S_FRAME_SIZE
> tb(nz)  x0, #THREAD_SHIFT, overflow
> add x0, x0, #S_FRAME_SIZE
> sub x0, sp, x0
>>>
>>> You need a neg x0, x0 here I think
>>
>> Oh, whoops. I'd mis-simplified things.
>>
>> We can avoid that by storing orig_sp + orig_x0 in sp:
>>
>>   add sp, sp, x0  // sp = orig_sp + orig_x0
>>   sub x0, sp, x0  // x0 = orig_sp
>>   < check >
>>   sub x0, sp, x0  // x0 = orig_x0
>>   sub sp, sp, x0  // sp = orig_sp
>>
>> ... which works in a locally-built kernel where I've aligned all the
>> stacks.
>
> FWIW, I've pushed out a somewhat cleaned-up (and slightly broken!)
> version of said kernel source to my arm64/vmap-stack-align branch [1].
> That's still missing the backtrace handling, IRQ stack alignment is
> broken at least on 64K pages, and there's still more cleanup and rework
> to do.
>

 I have spent some time addressing the issues mentioned in the commit
 log. Please take a look.

 git://git.kernel.org/pub/scm/linux/kernel/git/ardb/linux.git 
 vmap-arm64-mark

>>>
>>> I used vmap-arm64-mark to compile kernels for a few days. It seemed to
>>> work well enough.
>>>
>>
>> Thanks for giving this a spin. Any comments on the performance impact?
>> (if you happened to notice any)
>>
>
> I didn't notice any performance impact but I also wasn't trying that
> hard. I did try this with a different configuration and ran into
> stackspace errors almost immediately:
>
> [ 0.358026] smp: Brought up 1 node, 8 CPUs
> [ 0.359359] SMP: Total of 8 processors activated.
> [ 0.359542] CPU features: detected feature: 32-bit EL0 Support
> [0.361781] Insufficient stack space to handle exception!
> [0.362075] CPU: 4 PID: 0 Comm: swapper/4 Not tainted 
> 4.12.0-00018-ge9cf49d604ef-dirty #23
> [0.362538] Hardware name: linux,dummy-virt (DT)
> [0.362844] task: ffc03a8a3200 task.stack: ff8008e8
> [0.363389] PC is at __do_softirq+0x88/0x210
> [0.363585] LR is at __do_softirq+0x78/0x210
> [0.363859] pc : [] lr : [] pstate: 
> 8145
> [0.364109] sp : ffc03bf65ea0
> [0.364253] x29: ffc03bf66830 x28: 0002
> [0.364547] x27: ff8008e83e20 x26: fffedb5a
> [0.364777] x25: 0001 x24: 
> [0.365017] x23: ff8008dc5900 x22: ff8008c37000
> [0.365242] x21: 0003 x20: 
> [0.365557] x19: ff8008d02000 x18: 0004
> [0.365991] x17:  x16: 0008
> [0.366148] x15: ffc03a400228 x14: 
> [0.366296] x13: ff8008a50b98 x12: ffc03a916480
> [0.366442] x11: ff8008a50ba0 x10: 0008
> [0.366624] x9 : 0004 x8 : ffc03bf6f630
> [0.366779] x7 : 0020 x6 : fffedb5a
> [0.366924] x5 :  x4 : 00403326a000
> [0.367071] x3 : 0101 x2 : ff8008ce8000
> [0.367218] x1 : ff8008dc5900 x0 : 0200
> [0.367382] Task 

[PATCH v3 0/8] Add support for IPQ8074 PCIe phy and controller

2017-07-19 Thread Varadarajan Narayanan
v3:
  PCI: dwc: qcom: Add support for IPQ8074 PCIe controller
Incoporate Stan's feedback:-
 - Add SoC Wrapper and Synopsys Core IP versions

v2:
  dt-bindings: phy: qmp: Add output-clock-names
Added Rob H's Ack

  dt-bindings: phy: qmp: Add support for QMP phy in IPQ8074
Removed example
Added IPQ8074 specific details

  phy: qcom-qmp: Fix phy pipe clock name
Added Vivek's Ack

  phy: qcom-qmp: Handle unavailable registers
No changes

  phy: qcom-qmp: Add support for IPQ8074
No changes

  PCI: dwc: qcom: Use block IP version for operations
Added new patch to use block IP version instead of v1, v2...

  dt-bindings: pci: qcom: Add support for IPQ8074
Removed example
Added IPQ8074 specific details

  PCI: dwc: qcom: Add support for IPQ8074 PCIe controller
Incorporated Bjorn's feedback:-
 - Removed reset names, helper function to assert/deassert, helper
   function to R/M/W register.
 - Renamed sys_noc clock as iface clock
 - Added deinit if phy power on fails

v1:
Add definitions required to enable QMP phy support for IPQ8074.

Add support for the IPQ8074 PCIe controller.  IPQ8074 supports
Gen 1/2, one lane, two PCIe root complex with support for MSI and
legacy interrupts, and it conforms to PCI Express Base 2.1
specification.

Varadarajan Narayanan (8):
  dt-bindings: phy: qmp: Add output-clock-names
  dt-bindings: phy: qmp: Add support for QMP phy in IPQ8074
  phy: qcom-qmp: Fix phy pipe clock name
  phy: qcom-qmp: Handle unavailable registers
  phy: qcom-qmp: Add support for IPQ8074
  PCI: dwc: qcom: Use block IP version for operations
  dt-bindings: pci: qcom: Add support for IPQ8074
  PCI: dwc: qcom: Add support for IPQ8074 PCIe controller

 .../devicetree/bindings/pci/qcom,pcie.txt  |  23 ++
 .../devicetree/bindings/phy/qcom-qmp-phy.txt   |  11 +
 drivers/pci/dwc/pcie-qcom.c| 378 +
 drivers/phy/qualcomm/phy-qcom-qmp.c| 186 --
 4 files changed, 515 insertions(+), 83 deletions(-)

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of 
Code Aurora Forum, hosted by The Linux Foundation



[PATCH v3 6/8] PCI: dwc: qcom: Use block IP version for operations

2017-07-19 Thread Varadarajan Narayanan
Presently, when support for a new SoC is added, the driver ops
structures and functions are versioned with plain 1, 2, 3 etc.
Instead use the block IP version number.

Signed-off-by: Varadarajan Narayanan 
---
 drivers/pci/dwc/pcie-qcom.c | 124 ++--
 1 file changed, 62 insertions(+), 62 deletions(-)

diff --git a/drivers/pci/dwc/pcie-qcom.c b/drivers/pci/dwc/pcie-qcom.c
index d15657d..98c74d7 100644
--- a/drivers/pci/dwc/pcie-qcom.c
+++ b/drivers/pci/dwc/pcie-qcom.c
@@ -61,7 +61,7 @@
 
 #define PERST_DELAY_US 1000
 
-struct qcom_pcie_resources_v0 {
+struct qcom_pcie_resources_2_1_0 {
struct clk *iface_clk;
struct clk *core_clk;
struct clk *phy_clk;
@@ -75,7 +75,7 @@ struct qcom_pcie_resources_v0 {
struct regulator *vdda_refclk;
 };
 
-struct qcom_pcie_resources_v1 {
+struct qcom_pcie_resources_1_0_0 {
struct clk *iface;
struct clk *aux;
struct clk *master_bus;
@@ -84,7 +84,7 @@ struct qcom_pcie_resources_v1 {
struct regulator *vdda;
 };
 
-struct qcom_pcie_resources_v2 {
+struct qcom_pcie_resources_2_3_2 {
struct clk *aux_clk;
struct clk *master_clk;
struct clk *slave_clk;
@@ -92,7 +92,7 @@ struct qcom_pcie_resources_v2 {
struct clk *pipe_clk;
 };
 
-struct qcom_pcie_resources_v3 {
+struct qcom_pcie_resources_2_4_0 {
struct clk *aux_clk;
struct clk *master_clk;
struct clk *slave_clk;
@@ -111,10 +111,10 @@ struct qcom_pcie_resources_v3 {
 };
 
 union qcom_pcie_resources {
-   struct qcom_pcie_resources_v0 v0;
-   struct qcom_pcie_resources_v1 v1;
-   struct qcom_pcie_resources_v2 v2;
-   struct qcom_pcie_resources_v3 v3;
+   struct qcom_pcie_resources_1_0_0 v1_0_0;
+   struct qcom_pcie_resources_2_1_0 v2_1_0;
+   struct qcom_pcie_resources_2_3_2 v2_3_2;
+   struct qcom_pcie_resources_2_4_0 v2_4_0;
 };
 
 struct qcom_pcie;
@@ -172,7 +172,7 @@ static int qcom_pcie_establish_link(struct qcom_pcie *pcie)
return dw_pcie_wait_for_link(pci);
 }
 
-static void qcom_pcie_v0_v1_ltssm_enable(struct qcom_pcie *pcie)
+static void qcom_pcie_2_1_0_ltssm_enable(struct qcom_pcie *pcie)
 {
u32 val;
 
@@ -182,9 +182,9 @@ static void qcom_pcie_v0_v1_ltssm_enable(struct qcom_pcie 
*pcie)
writel(val, pcie->elbi + PCIE20_ELBI_SYS_CTRL);
 }
 
-static int qcom_pcie_get_resources_v0(struct qcom_pcie *pcie)
+static int qcom_pcie_get_resources_2_1_0(struct qcom_pcie *pcie)
 {
-   struct qcom_pcie_resources_v0 *res = >res.v0;
+   struct qcom_pcie_resources_2_1_0 *res = >res.v2_1_0;
struct dw_pcie *pci = pcie->pci;
struct device *dev = pci->dev;
 
@@ -232,9 +232,9 @@ static int qcom_pcie_get_resources_v0(struct qcom_pcie 
*pcie)
return PTR_ERR_OR_ZERO(res->phy_reset);
 }
 
-static void qcom_pcie_deinit_v0(struct qcom_pcie *pcie)
+static void qcom_pcie_deinit_2_1_0(struct qcom_pcie *pcie)
 {
-   struct qcom_pcie_resources_v0 *res = >res.v0;
+   struct qcom_pcie_resources_2_1_0 *res = >res.v2_1_0;
 
reset_control_assert(res->pci_reset);
reset_control_assert(res->axi_reset);
@@ -249,9 +249,9 @@ static void qcom_pcie_deinit_v0(struct qcom_pcie *pcie)
regulator_disable(res->vdda_refclk);
 }
 
-static int qcom_pcie_init_v0(struct qcom_pcie *pcie)
+static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie)
 {
-   struct qcom_pcie_resources_v0 *res = >res.v0;
+   struct qcom_pcie_resources_2_1_0 *res = >res.v2_1_0;
struct dw_pcie *pci = pcie->pci;
struct device *dev = pci->dev;
u32 val;
@@ -367,9 +367,9 @@ static int qcom_pcie_init_v0(struct qcom_pcie *pcie)
return ret;
 }
 
-static int qcom_pcie_get_resources_v1(struct qcom_pcie *pcie)
+static int qcom_pcie_get_resources_1_0_0(struct qcom_pcie *pcie)
 {
-   struct qcom_pcie_resources_v1 *res = >res.v1;
+   struct qcom_pcie_resources_1_0_0 *res = >res.v1_0_0;
struct dw_pcie *pci = pcie->pci;
struct device *dev = pci->dev;
 
@@ -397,9 +397,9 @@ static int qcom_pcie_get_resources_v1(struct qcom_pcie 
*pcie)
return PTR_ERR_OR_ZERO(res->core);
 }
 
-static void qcom_pcie_deinit_v1(struct qcom_pcie *pcie)
+static void qcom_pcie_deinit_1_0_0(struct qcom_pcie *pcie)
 {
-   struct qcom_pcie_resources_v1 *res = >res.v1;
+   struct qcom_pcie_resources_1_0_0 *res = >res.v1_0_0;
 
reset_control_assert(res->core);
clk_disable_unprepare(res->slave_bus);
@@ -409,9 +409,9 @@ static void qcom_pcie_deinit_v1(struct qcom_pcie *pcie)
regulator_disable(res->vdda);
 }
 
-static int qcom_pcie_init_v1(struct qcom_pcie *pcie)
+static int qcom_pcie_init_1_0_0(struct qcom_pcie *pcie)
 {
-   struct qcom_pcie_resources_v1 *res = >res.v1;
+   struct qcom_pcie_resources_1_0_0 *res = >res.v1_0_0;
struct dw_pcie *pci = pcie->pci;
struct device *dev = pci->dev;
int ret;
@@ -477,7 +477,7 @@ static 

[PATCH v3 1/8] dt-bindings: phy: qmp: Add output-clock-names

2017-07-19 Thread Varadarajan Narayanan
The phy outputs a clock that will act as the parent for
the phy's pipe clock. Add the name of this clock to the
lane's DT node.

Acked-by: Rob Herring 
Signed-off-by: Varadarajan Narayanan 
---
 Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt 
b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
index e11c563..5d7a51f 100644
--- a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
+++ b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
@@ -60,6 +60,8 @@ Required properties for child node:
   one for each entry in clock-names.
  - clock-names: Must contain following for pcie and usb qmp phys:
 "pipe" for pipe clock specific to each lane.
+ - clock-output-names: Name of the phy clock that will be the parent for
+  the above pipe clock.
 
  - resets: a list of phandles and reset controller specifier pairs,
   one for each entry in reset-names.
@@ -96,6 +98,7 @@ Example:
 
clocks = < GCC_PCIE_0_PIPE_CLK>;
clock-names = "pipe0";
+   clock-output-names = "pcie_0_pipe_clk_src";
resets = < GCC_PCIE_0_PHY_BCR>;
reset-names = "lane0";
};
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of 
Code Aurora Forum, hosted by The Linux Foundation



Re: [kernel-hardening] Re: [RFC PATCH 6/6] arm64: add VMAP_STACK and detect out-of-bounds SP

2017-07-19 Thread Ard Biesheuvel
On 20 July 2017 at 00:32, Laura Abbott  wrote:
> On 07/19/2017 01:08 AM, Ard Biesheuvel wrote:
>> On 18 July 2017 at 22:53, Laura Abbott  wrote:
>>> On 07/15/2017 05:03 PM, Ard Biesheuvel wrote:
 On 14 July 2017 at 22:27, Mark Rutland  wrote:
> On Fri, Jul 14, 2017 at 03:06:06PM +0100, Mark Rutland wrote:
>> On Fri, Jul 14, 2017 at 01:27:14PM +0100, Ard Biesheuvel wrote:
>>> On 14 July 2017 at 11:48, Ard Biesheuvel  
>>> wrote:
 On 14 July 2017 at 11:32, Mark Rutland  wrote:
> On Thu, Jul 13, 2017 at 07:28:48PM +0100, Ard Biesheuvel wrote:
>>
>> OK, so here's a crazy idea: what if we
>> a) carve out a dedicated range in the VMALLOC area for stacks
>> b) for each stack, allocate a naturally aligned window of 2x the 
>> stack
>> size, and map the stack inside it, leaving the remaining space
>> unmapped
>>
> The logical ops (TST) and conditional branches (TB(N)Z, CB(N)Z) 
> operate
> on XZR rather than SP, so to do this we need to get the SP value into 
> a
> GPR.
>
> Previously, I assumed this meant we needed to corrupt a GPR (and hence
> stash that GPR in a sysreg), so I started writing code to free 
> sysregs.
>
> However, I now realise I was being thick, since we can stash the GPR
> in the SP:
>
> sub sp, sp, x0  // sp = orig_sp - x0
> add x0, sp, x0  // x0 = x0 - (orig_sp - x0) == orig_sp
>>
>> That comment is off, and should say x0 = x0 + (orig_sp - x0) == 
>> orig_sp
>>
> sub x0, x0, #S_FRAME_SIZE
> tb(nz)  x0, #THREAD_SHIFT, overflow
> add x0, x0, #S_FRAME_SIZE
> sub x0, sp, x0
>>>
>>> You need a neg x0, x0 here I think
>>
>> Oh, whoops. I'd mis-simplified things.
>>
>> We can avoid that by storing orig_sp + orig_x0 in sp:
>>
>>   add sp, sp, x0  // sp = orig_sp + orig_x0
>>   sub x0, sp, x0  // x0 = orig_sp
>>   < check >
>>   sub x0, sp, x0  // x0 = orig_x0
>>   sub sp, sp, x0  // sp = orig_sp
>>
>> ... which works in a locally-built kernel where I've aligned all the
>> stacks.
>
> FWIW, I've pushed out a somewhat cleaned-up (and slightly broken!)
> version of said kernel source to my arm64/vmap-stack-align branch [1].
> That's still missing the backtrace handling, IRQ stack alignment is
> broken at least on 64K pages, and there's still more cleanup and rework
> to do.
>

 I have spent some time addressing the issues mentioned in the commit
 log. Please take a look.

 git://git.kernel.org/pub/scm/linux/kernel/git/ardb/linux.git 
 vmap-arm64-mark

>>>
>>> I used vmap-arm64-mark to compile kernels for a few days. It seemed to
>>> work well enough.
>>>
>>
>> Thanks for giving this a spin. Any comments on the performance impact?
>> (if you happened to notice any)
>>
>
> I didn't notice any performance impact but I also wasn't trying that
> hard. I did try this with a different configuration and ran into
> stackspace errors almost immediately:
>
> [ 0.358026] smp: Brought up 1 node, 8 CPUs
> [ 0.359359] SMP: Total of 8 processors activated.
> [ 0.359542] CPU features: detected feature: 32-bit EL0 Support
> [0.361781] Insufficient stack space to handle exception!
> [0.362075] CPU: 4 PID: 0 Comm: swapper/4 Not tainted 
> 4.12.0-00018-ge9cf49d604ef-dirty #23
> [0.362538] Hardware name: linux,dummy-virt (DT)
> [0.362844] task: ffc03a8a3200 task.stack: ff8008e8
> [0.363389] PC is at __do_softirq+0x88/0x210
> [0.363585] LR is at __do_softirq+0x78/0x210
> [0.363859] pc : [] lr : [] pstate: 
> 8145
> [0.364109] sp : ffc03bf65ea0
> [0.364253] x29: ffc03bf66830 x28: 0002
> [0.364547] x27: ff8008e83e20 x26: fffedb5a
> [0.364777] x25: 0001 x24: 
> [0.365017] x23: ff8008dc5900 x22: ff8008c37000
> [0.365242] x21: 0003 x20: 
> [0.365557] x19: ff8008d02000 x18: 0004
> [0.365991] x17:  x16: 0008
> [0.366148] x15: ffc03a400228 x14: 
> [0.366296] x13: ff8008a50b98 x12: ffc03a916480
> [0.366442] x11: ff8008a50ba0 x10: 0008
> [0.366624] x9 : 0004 x8 : ffc03bf6f630
> [0.366779] x7 : 0020 x6 : fffedb5a
> [0.366924] x5 :  x4 : 00403326a000
> [0.367071] x3 : 0101 x2 : ff8008ce8000
> [0.367218] x1 : ff8008dc5900 x0 : 0200
> [0.367382] Task stack: [0xff8008e8..0xff8008e84000]
> [0.367519] IRQ stack:  

[PATCH v3 8/8] PCI: dwc: qcom: Add support for IPQ8074 PCIe controller

2017-07-19 Thread Varadarajan Narayanan
Add support for the IPQ8074 PCIe controller.  IPQ8074 supports
Gen 1/2, one lane, two PCIe root complex with support for MSI and
legacy interrupts, and it conforms to PCI Express Base 2.1
specification.

The core init is the similar to the existing SoC, however the
clocks and reset lines differ.

Signed-off-by: smuthayy 
Signed-off-by: Varadarajan Narayanan 
---
 drivers/pci/dwc/pcie-qcom.c | 264 +++-
 1 file changed, 259 insertions(+), 5 deletions(-)

diff --git a/drivers/pci/dwc/pcie-qcom.c b/drivers/pci/dwc/pcie-qcom.c
index 98c74d7..b2ea953 100644
--- a/drivers/pci/dwc/pcie-qcom.c
+++ b/drivers/pci/dwc/pcie-qcom.c
@@ -37,6 +37,20 @@
 #include "pcie-designware.h"
 
 #define PCIE20_PARF_SYS_CTRL   0x00
+#define MST_WAKEUP_EN  BIT(13)
+#define SLV_WAKEUP_EN  BIT(12)
+#define MSTR_ACLK_CGC_DIS  BIT(10)
+#define SLV_ACLK_CGC_DIS   BIT(9)
+#define CORE_CLK_CGC_DIS   BIT(6)
+#define AUX_PWR_DETBIT(4)
+#define L23_CLK_RMV_DISBIT(2)
+#define L1_CLK_RMV_DIS BIT(1)
+
+#define PCIE20_COMMAND_STATUS  0x04
+#define CMD_BME_VAL0x4
+#define PCIE20_DEVICE_CONTROL2_STATUS2 0x98
+#define PCIE_CAP_CPL_TIMEOUT_DISABLE   0x10
+
 #define PCIE20_PARF_PHY_CTRL   0x40
 #define PCIE20_PARF_PHY_REFCLK 0x4C
 #define PCIE20_PARF_DBI_BASE_ADDR  0x168
@@ -58,9 +72,22 @@
 #define CFG_BRIDGE_SB_INIT BIT(0)
 
 #define PCIE20_CAP 0x70
+#define PCIE20_CAP_LINK_CAPABILITIES   (PCIE20_CAP + 0xC)
+#define PCIE20_CAP_LINK_1  (PCIE20_CAP + 0x14)
+#define PCIE_CAP_LINK1_VAL 0x2fd7f
+
+#define PCIE20_PARF_Q2A_FLUSH  0x1AC
+
+#define PCIE20_MISC_CONTROL_1_REG  0x8BC
+#define DBI_RO_WR_EN   1
 
 #define PERST_DELAY_US 1000
 
+#define AXI_CLK_RATE   2
+
+#define PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE 0x358
+#define SLV_ADDR_SPACE_SZ   0x1000
+
 struct qcom_pcie_resources_2_1_0 {
struct clk *iface_clk;
struct clk *core_clk;
@@ -110,11 +137,21 @@ struct qcom_pcie_resources_2_4_0 {
struct reset_control *phy_ahb_reset;
 };
 
+struct qcom_pcie_resources_2_3_3 {
+   struct clk *iface;
+   struct clk *axi_m_clk;
+   struct clk *axi_s_clk;
+   struct clk *ahb_clk;
+   struct clk *aux_clk;
+   struct reset_control *rst[7];
+};
+
 union qcom_pcie_resources {
struct qcom_pcie_resources_1_0_0 v1_0_0;
struct qcom_pcie_resources_2_1_0 v2_1_0;
struct qcom_pcie_resources_2_3_2 v2_3_2;
struct qcom_pcie_resources_2_4_0 v2_4_0;
+   struct qcom_pcie_resources_2_3_3 v2_3_3;
 };
 
 struct qcom_pcie;
@@ -884,6 +921,206 @@ static int qcom_pcie_init_2_4_0(struct qcom_pcie *pcie)
return ret;
 }
 
+static int qcom_pcie_get_resources_2_3_3(struct qcom_pcie *pcie)
+{
+   struct qcom_pcie_resources_2_3_3 *res = >res.v2_3_3;
+   struct dw_pcie *pci = pcie->pci;
+   struct device *dev = pci->dev;
+   int i;
+   const char *rst_names[] = {
+   "axi_m", "axi_s", "pipe",
+   "axi_m_sticky", "sticky",
+   "ahb", "sleep",
+   };
+
+   res->iface = devm_clk_get(dev, "iface");
+   if (IS_ERR(res->iface))
+   return PTR_ERR(res->iface);
+
+   res->axi_m_clk = devm_clk_get(dev, "axi_m");
+   if (IS_ERR(res->axi_m_clk))
+   return PTR_ERR(res->axi_m_clk);
+
+   res->axi_s_clk = devm_clk_get(dev, "axi_s");
+   if (IS_ERR(res->axi_s_clk))
+   return PTR_ERR(res->axi_s_clk);
+
+   res->ahb_clk = devm_clk_get(dev, "ahb");
+   if (IS_ERR(res->ahb_clk))
+   return PTR_ERR(res->ahb_clk);
+
+   res->aux_clk = devm_clk_get(dev, "aux");
+   if (IS_ERR(res->aux_clk))
+   return PTR_ERR(res->aux_clk);
+
+   for (i = 0; i < ARRAY_SIZE(rst_names); i++) {
+   res->rst[i] = devm_reset_control_get(dev, rst_names[i]);
+   if (IS_ERR(res->rst[i]))
+   return PTR_ERR(res->rst[i]);
+   }
+
+   return 0;
+}
+
+static void qcom_pcie_deinit_2_3_3(struct qcom_pcie *pcie)
+{
+   struct qcom_pcie_resources_2_3_3 *res = >res.v2_3_3;
+
+   clk_disable_unprepare(res->iface);
+   clk_disable_unprepare(res->axi_m_clk);
+   clk_disable_unprepare(res->axi_s_clk);
+   clk_disable_unprepare(res->ahb_clk);
+   clk_disable_unprepare(res->aux_clk);
+}
+
+static int 

[PATCH v3 8/8] PCI: dwc: qcom: Add support for IPQ8074 PCIe controller

2017-07-19 Thread Varadarajan Narayanan
Add support for the IPQ8074 PCIe controller.  IPQ8074 supports
Gen 1/2, one lane, two PCIe root complex with support for MSI and
legacy interrupts, and it conforms to PCI Express Base 2.1
specification.

The core init is the similar to the existing SoC, however the
clocks and reset lines differ.

Signed-off-by: smuthayy 
Signed-off-by: Varadarajan Narayanan 
---
 drivers/pci/dwc/pcie-qcom.c | 264 +++-
 1 file changed, 259 insertions(+), 5 deletions(-)

diff --git a/drivers/pci/dwc/pcie-qcom.c b/drivers/pci/dwc/pcie-qcom.c
index 98c74d7..b2ea953 100644
--- a/drivers/pci/dwc/pcie-qcom.c
+++ b/drivers/pci/dwc/pcie-qcom.c
@@ -37,6 +37,20 @@
 #include "pcie-designware.h"
 
 #define PCIE20_PARF_SYS_CTRL   0x00
+#define MST_WAKEUP_EN  BIT(13)
+#define SLV_WAKEUP_EN  BIT(12)
+#define MSTR_ACLK_CGC_DIS  BIT(10)
+#define SLV_ACLK_CGC_DIS   BIT(9)
+#define CORE_CLK_CGC_DIS   BIT(6)
+#define AUX_PWR_DETBIT(4)
+#define L23_CLK_RMV_DISBIT(2)
+#define L1_CLK_RMV_DIS BIT(1)
+
+#define PCIE20_COMMAND_STATUS  0x04
+#define CMD_BME_VAL0x4
+#define PCIE20_DEVICE_CONTROL2_STATUS2 0x98
+#define PCIE_CAP_CPL_TIMEOUT_DISABLE   0x10
+
 #define PCIE20_PARF_PHY_CTRL   0x40
 #define PCIE20_PARF_PHY_REFCLK 0x4C
 #define PCIE20_PARF_DBI_BASE_ADDR  0x168
@@ -58,9 +72,22 @@
 #define CFG_BRIDGE_SB_INIT BIT(0)
 
 #define PCIE20_CAP 0x70
+#define PCIE20_CAP_LINK_CAPABILITIES   (PCIE20_CAP + 0xC)
+#define PCIE20_CAP_LINK_1  (PCIE20_CAP + 0x14)
+#define PCIE_CAP_LINK1_VAL 0x2fd7f
+
+#define PCIE20_PARF_Q2A_FLUSH  0x1AC
+
+#define PCIE20_MISC_CONTROL_1_REG  0x8BC
+#define DBI_RO_WR_EN   1
 
 #define PERST_DELAY_US 1000
 
+#define AXI_CLK_RATE   2
+
+#define PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE 0x358
+#define SLV_ADDR_SPACE_SZ   0x1000
+
 struct qcom_pcie_resources_2_1_0 {
struct clk *iface_clk;
struct clk *core_clk;
@@ -110,11 +137,21 @@ struct qcom_pcie_resources_2_4_0 {
struct reset_control *phy_ahb_reset;
 };
 
+struct qcom_pcie_resources_2_3_3 {
+   struct clk *iface;
+   struct clk *axi_m_clk;
+   struct clk *axi_s_clk;
+   struct clk *ahb_clk;
+   struct clk *aux_clk;
+   struct reset_control *rst[7];
+};
+
 union qcom_pcie_resources {
struct qcom_pcie_resources_1_0_0 v1_0_0;
struct qcom_pcie_resources_2_1_0 v2_1_0;
struct qcom_pcie_resources_2_3_2 v2_3_2;
struct qcom_pcie_resources_2_4_0 v2_4_0;
+   struct qcom_pcie_resources_2_3_3 v2_3_3;
 };
 
 struct qcom_pcie;
@@ -884,6 +921,206 @@ static int qcom_pcie_init_2_4_0(struct qcom_pcie *pcie)
return ret;
 }
 
+static int qcom_pcie_get_resources_2_3_3(struct qcom_pcie *pcie)
+{
+   struct qcom_pcie_resources_2_3_3 *res = >res.v2_3_3;
+   struct dw_pcie *pci = pcie->pci;
+   struct device *dev = pci->dev;
+   int i;
+   const char *rst_names[] = {
+   "axi_m", "axi_s", "pipe",
+   "axi_m_sticky", "sticky",
+   "ahb", "sleep",
+   };
+
+   res->iface = devm_clk_get(dev, "iface");
+   if (IS_ERR(res->iface))
+   return PTR_ERR(res->iface);
+
+   res->axi_m_clk = devm_clk_get(dev, "axi_m");
+   if (IS_ERR(res->axi_m_clk))
+   return PTR_ERR(res->axi_m_clk);
+
+   res->axi_s_clk = devm_clk_get(dev, "axi_s");
+   if (IS_ERR(res->axi_s_clk))
+   return PTR_ERR(res->axi_s_clk);
+
+   res->ahb_clk = devm_clk_get(dev, "ahb");
+   if (IS_ERR(res->ahb_clk))
+   return PTR_ERR(res->ahb_clk);
+
+   res->aux_clk = devm_clk_get(dev, "aux");
+   if (IS_ERR(res->aux_clk))
+   return PTR_ERR(res->aux_clk);
+
+   for (i = 0; i < ARRAY_SIZE(rst_names); i++) {
+   res->rst[i] = devm_reset_control_get(dev, rst_names[i]);
+   if (IS_ERR(res->rst[i]))
+   return PTR_ERR(res->rst[i]);
+   }
+
+   return 0;
+}
+
+static void qcom_pcie_deinit_2_3_3(struct qcom_pcie *pcie)
+{
+   struct qcom_pcie_resources_2_3_3 *res = >res.v2_3_3;
+
+   clk_disable_unprepare(res->iface);
+   clk_disable_unprepare(res->axi_m_clk);
+   clk_disable_unprepare(res->axi_s_clk);
+   clk_disable_unprepare(res->ahb_clk);
+   clk_disable_unprepare(res->aux_clk);
+}
+
+static int qcom_pcie_enable_resources_2_3_3(struct qcom_pcie *pcie)
+{
+   struct 

[PATCH v3 7/8] dt-bindings: pci: qcom: Add support for IPQ8074

2017-07-19 Thread Varadarajan Narayanan
Add support for the IPQ8074 PCIe controller.  IPQ8074 supports Gen 1/2, one
lane, two PCIe root complex with support for MSI and legacy interrupts, and
it conforms to PCI Express Base 2.1 specification.

Signed-off-by: Varadarajan Narayanan 
---
 .../devicetree/bindings/pci/qcom,pcie.txt  | 23 ++
 1 file changed, 23 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt 
b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
index 9d418b7..b3e36ef 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
@@ -9,6 +9,7 @@
- "qcom,pcie-apq8084" for apq8084
- "qcom,pcie-msm8996" for msm8996 or apq8096
- "qcom,pcie-ipq4019" for ipq4019
+   - "qcom,pcie-ipq8074" for ipq8074
 
 - reg:
Usage: required
@@ -105,6 +106,16 @@
- "bus_master"  Master AXI clock
- "bus_slave"   Slave AXI clock
 
+- clock-names:
+   Usage: required for ipq8074
+   Value type: 
+   Definition: Should contain the following entries
+   - "iface"   PCIe to SysNOC BIU clock
+   - "axi_m"   AXI Master clock
+   - "axi_s"   AXI Slave clock
+   - "ahb" AHB clock
+   - "aux" Auxiliary clock
+
 - resets:
Usage: required
Value type: 
@@ -144,6 +155,18 @@
- "ahb" AHB reset
- "phy_ahb" PHY AHB reset
 
+- reset-names:
+   Usage: required for ipq8074
+   Value type: 
+   Definition: Should contain the following entries
+   - "pipe"PIPE reset
+   - "sleep"   Sleep reset
+   - "sticky"  Core Sticky reset
+   - "axi_m"   AXI Master reset
+   - "axi_s"   AXI Slave reset
+   - "ahb" AHB Reset
+   - "axi_m_sticky"AXI Master Sticky reset
+
 - power-domains:
Usage: required for apq8084 and msm8996/apq8096
Value type: 
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of 
Code Aurora Forum, hosted by The Linux Foundation



[PATCH v3 7/8] dt-bindings: pci: qcom: Add support for IPQ8074

2017-07-19 Thread Varadarajan Narayanan
Add support for the IPQ8074 PCIe controller.  IPQ8074 supports Gen 1/2, one
lane, two PCIe root complex with support for MSI and legacy interrupts, and
it conforms to PCI Express Base 2.1 specification.

Signed-off-by: Varadarajan Narayanan 
---
 .../devicetree/bindings/pci/qcom,pcie.txt  | 23 ++
 1 file changed, 23 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt 
b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
index 9d418b7..b3e36ef 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
@@ -9,6 +9,7 @@
- "qcom,pcie-apq8084" for apq8084
- "qcom,pcie-msm8996" for msm8996 or apq8096
- "qcom,pcie-ipq4019" for ipq4019
+   - "qcom,pcie-ipq8074" for ipq8074
 
 - reg:
Usage: required
@@ -105,6 +106,16 @@
- "bus_master"  Master AXI clock
- "bus_slave"   Slave AXI clock
 
+- clock-names:
+   Usage: required for ipq8074
+   Value type: 
+   Definition: Should contain the following entries
+   - "iface"   PCIe to SysNOC BIU clock
+   - "axi_m"   AXI Master clock
+   - "axi_s"   AXI Slave clock
+   - "ahb" AHB clock
+   - "aux" Auxiliary clock
+
 - resets:
Usage: required
Value type: 
@@ -144,6 +155,18 @@
- "ahb" AHB reset
- "phy_ahb" PHY AHB reset
 
+- reset-names:
+   Usage: required for ipq8074
+   Value type: 
+   Definition: Should contain the following entries
+   - "pipe"PIPE reset
+   - "sleep"   Sleep reset
+   - "sticky"  Core Sticky reset
+   - "axi_m"   AXI Master reset
+   - "axi_s"   AXI Slave reset
+   - "ahb" AHB Reset
+   - "axi_m_sticky"AXI Master Sticky reset
+
 - power-domains:
Usage: required for apq8084 and msm8996/apq8096
Value type: 
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of 
Code Aurora Forum, hosted by The Linux Foundation



[PATCH v3 4/8] phy: qcom-qmp: Handle unavailable registers

2017-07-19 Thread Varadarajan Narayanan
In some implementations of the QMP phy, some registers might not
be present. Provide a way identify such registers and not access
those registers.

Signed-off-by: Varadarajan Narayanan 
---
 drivers/phy/qualcomm/phy-qcom-qmp.c | 23 ++-
 1 file changed, 14 insertions(+), 9 deletions(-)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c 
b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 97020ec..000ad1c 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -187,6 +187,8 @@ struct qmp_phy_init_tbl {
.in_layout = 1, \
}
 
+#define QPHY_REG_INVAL 0xu
+
 /* set of registers with offsets different per-PHY */
 enum qphy_reg_layout {
/* Common block control registers */
@@ -676,15 +678,18 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)
qphy_setbits(serdes, cfg->regs[QPHY_COM_START_CONTROL],
 SERDES_START | PCS_START);
 
-   status = serdes + cfg->regs[QPHY_COM_PCS_READY_STATUS];
-   mask = cfg->mask_com_pcs_ready;
-
-   ret = readl_poll_timeout(status, val, (val & mask), 10,
-PHY_INIT_COMPLETE_TIMEOUT);
-   if (ret) {
-   dev_err(qmp->dev,
-   "phy common block init timed-out\n");
-   goto err_com_init;
+   if (cfg->regs[QPHY_COM_PCS_READY_STATUS] != QPHY_REG_INVAL) {
+   status = serdes + cfg->regs[QPHY_COM_PCS_READY_STATUS];
+   mask = cfg->mask_com_pcs_ready;
+
+   ret = readl_poll_timeout(status, val, (val & mask), 10,
+PHY_INIT_COMPLETE_TIMEOUT);
+   if (ret) {
+   dev_err(qmp->dev,
+   "%s: phy common block init timed-out\n",
+   __func__);
+   goto err_com_init;
+   }
}
}
 
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of 
Code Aurora Forum, hosted by The Linux Foundation



[PATCH v3 2/8] dt-bindings: phy: qmp: Add support for QMP phy in IPQ8074

2017-07-19 Thread Varadarajan Narayanan
IPQ8074 uses QMP phy controller that provides support to PCIe and
USB. Adding dt binding information for the same.

Signed-off-by: Varadarajan Narayanan 
---
 Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 8 
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt 
b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
index 5d7a51f..82fe0c4 100644
--- a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
+++ b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
@@ -6,6 +6,7 @@ controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
 
 Required properties:
  - compatible: compatible list, contains:
+  "qcom,ipq8074-qmp-pcie-phy" for PCIe phy on IPQ8074
   "qcom,msm8996-qmp-pcie-phy" for 14nm PCIe phy on msm8996,
   "qcom,msm8996-qmp-usb3-phy" for 14nm USB3 phy on msm8996.
 
@@ -38,6 +39,8 @@ Required properties:
 "phy", "common", "cfg".
For "qcom,msm8996-qmp-usb3-phy" must contain
 "phy", "common".
+   For "qcom,ipq8074-qmp-pcie-phy" must contain:
+"phy", "phy_phy".
 
  - vdda-phy-supply: Phandle to a regulator supply to PHY core block.
  - vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block.
@@ -63,6 +66,11 @@ Required properties for child node:
  - clock-output-names: Name of the phy clock that will be the parent for
   the above pipe clock.
 
+   For "qcom,ipq8074-qmp-pcie-phy":
+   - "pcie20_phy0_pipe_clk"Pipe Clock parent
+   (or)
+ "pcie20_phy1_pipe_clk"
+
  - resets: a list of phandles and reset controller specifier pairs,
   one for each entry in reset-names.
  - reset-names: Must contain following for pcie qmp phys:
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of 
Code Aurora Forum, hosted by The Linux Foundation



[PATCH v3 4/8] phy: qcom-qmp: Handle unavailable registers

2017-07-19 Thread Varadarajan Narayanan
In some implementations of the QMP phy, some registers might not
be present. Provide a way identify such registers and not access
those registers.

Signed-off-by: Varadarajan Narayanan 
---
 drivers/phy/qualcomm/phy-qcom-qmp.c | 23 ++-
 1 file changed, 14 insertions(+), 9 deletions(-)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c 
b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 97020ec..000ad1c 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -187,6 +187,8 @@ struct qmp_phy_init_tbl {
.in_layout = 1, \
}
 
+#define QPHY_REG_INVAL 0xu
+
 /* set of registers with offsets different per-PHY */
 enum qphy_reg_layout {
/* Common block control registers */
@@ -676,15 +678,18 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)
qphy_setbits(serdes, cfg->regs[QPHY_COM_START_CONTROL],
 SERDES_START | PCS_START);
 
-   status = serdes + cfg->regs[QPHY_COM_PCS_READY_STATUS];
-   mask = cfg->mask_com_pcs_ready;
-
-   ret = readl_poll_timeout(status, val, (val & mask), 10,
-PHY_INIT_COMPLETE_TIMEOUT);
-   if (ret) {
-   dev_err(qmp->dev,
-   "phy common block init timed-out\n");
-   goto err_com_init;
+   if (cfg->regs[QPHY_COM_PCS_READY_STATUS] != QPHY_REG_INVAL) {
+   status = serdes + cfg->regs[QPHY_COM_PCS_READY_STATUS];
+   mask = cfg->mask_com_pcs_ready;
+
+   ret = readl_poll_timeout(status, val, (val & mask), 10,
+PHY_INIT_COMPLETE_TIMEOUT);
+   if (ret) {
+   dev_err(qmp->dev,
+   "%s: phy common block init timed-out\n",
+   __func__);
+   goto err_com_init;
+   }
}
}
 
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of 
Code Aurora Forum, hosted by The Linux Foundation



[PATCH v3 2/8] dt-bindings: phy: qmp: Add support for QMP phy in IPQ8074

2017-07-19 Thread Varadarajan Narayanan
IPQ8074 uses QMP phy controller that provides support to PCIe and
USB. Adding dt binding information for the same.

Signed-off-by: Varadarajan Narayanan 
---
 Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 8 
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt 
b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
index 5d7a51f..82fe0c4 100644
--- a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
+++ b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
@@ -6,6 +6,7 @@ controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
 
 Required properties:
  - compatible: compatible list, contains:
+  "qcom,ipq8074-qmp-pcie-phy" for PCIe phy on IPQ8074
   "qcom,msm8996-qmp-pcie-phy" for 14nm PCIe phy on msm8996,
   "qcom,msm8996-qmp-usb3-phy" for 14nm USB3 phy on msm8996.
 
@@ -38,6 +39,8 @@ Required properties:
 "phy", "common", "cfg".
For "qcom,msm8996-qmp-usb3-phy" must contain
 "phy", "common".
+   For "qcom,ipq8074-qmp-pcie-phy" must contain:
+"phy", "phy_phy".
 
  - vdda-phy-supply: Phandle to a regulator supply to PHY core block.
  - vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block.
@@ -63,6 +66,11 @@ Required properties for child node:
  - clock-output-names: Name of the phy clock that will be the parent for
   the above pipe clock.
 
+   For "qcom,ipq8074-qmp-pcie-phy":
+   - "pcie20_phy0_pipe_clk"Pipe Clock parent
+   (or)
+ "pcie20_phy1_pipe_clk"
+
  - resets: a list of phandles and reset controller specifier pairs,
   one for each entry in reset-names.
  - reset-names: Must contain following for pcie qmp phys:
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of 
Code Aurora Forum, hosted by The Linux Foundation



Re: [PATCH v2 12/25] dt-bindings: qcom_nandc: QPIC NAND documentation

2017-07-19 Thread Abhishek Sahu

On 2017-07-20 01:09, Boris Brezillon wrote:

On Wed, 19 Jul 2017 17:18:00 +0530
Abhishek Sahu  wrote:


1. QPIC NAND will use compatible string "qcom,qpic-nandc-v1.4.0"
2. QPIC NAND will 3 BAM channels: command, data tx and data rx
   while EBI2 NAND uses only single ADM channel.
3. CRCI is only required for ADM DMA and its not required for
   QPIC NAND.

Signed-off-by: Abhishek Sahu 
---
 .../devicetree/bindings/mtd/qcom_nandc.txt | 54 
--

 1 file changed, 51 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt 
b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt

index b24adfe..8efaeb0 100644
--- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
+++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
@@ -1,13 +1,15 @@
 * Qualcomm NAND controller

 Required properties:
-- compatible:  should be "qcom,ebi2-nandc" - EBI2 NAND which uses ADM
-   DMA like IPQ8064.
-
+- compatible:  must be one of the following:
+   * "qcom,ebi2-nandc" - EBI2 NAND which uses ADM DMA like IPQ8064.
+	* "qcom,qpic-nandc-v1.4.0" - QPIC NAND v1.4.0 which uses BAM DMA 
like IPQ4019.

 - reg: MMIO address range
 - clocks:  must contain core clock and always on clock
 - clock-names:		must contain "core" for the core clock and "aon" for 
the

always on clock
+
+EBI2 specific properties:
 - dmas:DMA specifier, consisting of a phandle to the 
ADM DMA
controller node and the channel number to be used for
NAND. Refer to dma.txt and qcom_adm.txt for more details
@@ -18,6 +20,12 @@ Required properties:
 - qcom,data-crci:  must contain the ADM data type CRCI block instance
number specified for the NAND controller on the given
platform
+
+QPIC specific properties:
+- dmas:DMA specifier, consisting of a phandle to the 
BAM DMA
+   and the channel number to be used for NAND. Refer to
+   dma.txt, qcom_bam_dma.txt for more details
+- dma-names:   must contain all 3 channel names : "tx", "rx", "cmd"
 - #address-cells:  <1> - subnodes give the chip-select number
 - #size-cells: <0>

@@ -84,3 +92,43 @@ nand@1ac0 {
};
};
 };
+
+nand@79b {


I think I already mentioned I'd prefer to have

nand-controller@ {



 Sorry. I Missed that part. I will change it in v3.


+   compatible = "qcom,qpic-nandc-v1.4.0";
+   reg = <0x79b 0x1000>;
+
+   clocks = < GCC_QPIC_CLK>,
+   < GCC_QPIC_AHB_CLK>;
+   clock-names = "core", "aon";
+
+   dmas = < 0>,
+   < 1>,
+   < 2>;
+   dma-names = "tx", "rx", "cmd";
+
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   nandcs@0 {


and
nand@x {

here.



 Will change this also.


+   reg = <0>;
+   nand-ecc-strength = <4>;
+   nand-ecc-step-size = <512>;
+   nand-bus-width = <8>;
+
+   partitions {
+   compatible = "fixed-partitions";
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   partition@0 {
+   label = "boot-nand";
+   reg = <0 0x58a>;
+   };
+
+   partition@58a {
+   label = "fs-nand";
+   reg = <0x58a 0x400>;
+   };
+   };
+   };
+};


--
Abhishek Sahu


Re: [PATCH v2 12/25] dt-bindings: qcom_nandc: QPIC NAND documentation

2017-07-19 Thread Abhishek Sahu

On 2017-07-20 01:09, Boris Brezillon wrote:

On Wed, 19 Jul 2017 17:18:00 +0530
Abhishek Sahu  wrote:


1. QPIC NAND will use compatible string "qcom,qpic-nandc-v1.4.0"
2. QPIC NAND will 3 BAM channels: command, data tx and data rx
   while EBI2 NAND uses only single ADM channel.
3. CRCI is only required for ADM DMA and its not required for
   QPIC NAND.

Signed-off-by: Abhishek Sahu 
---
 .../devicetree/bindings/mtd/qcom_nandc.txt | 54 
--

 1 file changed, 51 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt 
b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt

index b24adfe..8efaeb0 100644
--- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
+++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
@@ -1,13 +1,15 @@
 * Qualcomm NAND controller

 Required properties:
-- compatible:  should be "qcom,ebi2-nandc" - EBI2 NAND which uses ADM
-   DMA like IPQ8064.
-
+- compatible:  must be one of the following:
+   * "qcom,ebi2-nandc" - EBI2 NAND which uses ADM DMA like IPQ8064.
+	* "qcom,qpic-nandc-v1.4.0" - QPIC NAND v1.4.0 which uses BAM DMA 
like IPQ4019.

 - reg: MMIO address range
 - clocks:  must contain core clock and always on clock
 - clock-names:		must contain "core" for the core clock and "aon" for 
the

always on clock
+
+EBI2 specific properties:
 - dmas:DMA specifier, consisting of a phandle to the 
ADM DMA
controller node and the channel number to be used for
NAND. Refer to dma.txt and qcom_adm.txt for more details
@@ -18,6 +20,12 @@ Required properties:
 - qcom,data-crci:  must contain the ADM data type CRCI block instance
number specified for the NAND controller on the given
platform
+
+QPIC specific properties:
+- dmas:DMA specifier, consisting of a phandle to the 
BAM DMA
+   and the channel number to be used for NAND. Refer to
+   dma.txt, qcom_bam_dma.txt for more details
+- dma-names:   must contain all 3 channel names : "tx", "rx", "cmd"
 - #address-cells:  <1> - subnodes give the chip-select number
 - #size-cells: <0>

@@ -84,3 +92,43 @@ nand@1ac0 {
};
};
 };
+
+nand@79b {


I think I already mentioned I'd prefer to have

nand-controller@ {



 Sorry. I Missed that part. I will change it in v3.


+   compatible = "qcom,qpic-nandc-v1.4.0";
+   reg = <0x79b 0x1000>;
+
+   clocks = < GCC_QPIC_CLK>,
+   < GCC_QPIC_AHB_CLK>;
+   clock-names = "core", "aon";
+
+   dmas = < 0>,
+   < 1>,
+   < 2>;
+   dma-names = "tx", "rx", "cmd";
+
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   nandcs@0 {


and
nand@x {

here.



 Will change this also.


+   reg = <0>;
+   nand-ecc-strength = <4>;
+   nand-ecc-step-size = <512>;
+   nand-bus-width = <8>;
+
+   partitions {
+   compatible = "fixed-partitions";
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   partition@0 {
+   label = "boot-nand";
+   reg = <0 0x58a>;
+   };
+
+   partition@58a {
+   label = "fs-nand";
+   reg = <0x58a 0x400>;
+   };
+   };
+   };
+};


--
Abhishek Sahu


[PATCH] net: bonding: Fix transmit load balancing in balance-alb mode

2017-07-19 Thread Kosuke Tatsukawa
balance-alb mode used to have transmit dynamic load balancing feature
enabled by default.  However, transmit dynamic load balancing no longer
works in balance-alb after commit 8b426dc54cf4 ("bonding: remove
hardcoded value").

Both balance-tlb and balance-alb use the function bond_do_alb_xmit() to
send packets.  This function uses the parameter tlb_dynamic_lb.
tlb_dynamic_lb used to have the default value of 1 for balance-alb, but
now the value is set to 0 except in balance-tlb.

Re-enable transmit dyanmic load balancing by initializing tlb_dynamic_lb
for balance-alb similar to balance-tlb.

Signed-off-by: Kosuke Tatsukawa 
Cc: sta...@vger.kernel.org
---
 drivers/net/bonding/bond_main.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
index 14ff622..181839d 100644
--- a/drivers/net/bonding/bond_main.c
+++ b/drivers/net/bonding/bond_main.c
@@ -4596,7 +4596,7 @@ static int bond_check_params(struct bond_params *params)
}
ad_user_port_key = valptr->value;
 
-   if (bond_mode == BOND_MODE_TLB) {
+   if ((bond_mode == BOND_MODE_TLB) || (bond_mode == BOND_MODE_ALB)) {
bond_opt_initstr(, "default");
valptr = bond_opt_parse(bond_opt_get(BOND_OPT_TLB_DYNAMIC_LB),
);



[PATCH] net: bonding: Fix transmit load balancing in balance-alb mode

2017-07-19 Thread Kosuke Tatsukawa
balance-alb mode used to have transmit dynamic load balancing feature
enabled by default.  However, transmit dynamic load balancing no longer
works in balance-alb after commit 8b426dc54cf4 ("bonding: remove
hardcoded value").

Both balance-tlb and balance-alb use the function bond_do_alb_xmit() to
send packets.  This function uses the parameter tlb_dynamic_lb.
tlb_dynamic_lb used to have the default value of 1 for balance-alb, but
now the value is set to 0 except in balance-tlb.

Re-enable transmit dyanmic load balancing by initializing tlb_dynamic_lb
for balance-alb similar to balance-tlb.

Signed-off-by: Kosuke Tatsukawa 
Cc: sta...@vger.kernel.org
---
 drivers/net/bonding/bond_main.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
index 14ff622..181839d 100644
--- a/drivers/net/bonding/bond_main.c
+++ b/drivers/net/bonding/bond_main.c
@@ -4596,7 +4596,7 @@ static int bond_check_params(struct bond_params *params)
}
ad_user_port_key = valptr->value;
 
-   if (bond_mode == BOND_MODE_TLB) {
+   if ((bond_mode == BOND_MODE_TLB) || (bond_mode == BOND_MODE_ALB)) {
bond_opt_initstr(, "default");
valptr = bond_opt_parse(bond_opt_get(BOND_OPT_TLB_DYNAMIC_LB),
);



Re: [PATCH v4 01/14] spi: qup: Enable chip select support

2017-07-19 Thread Varadarajan Narayanan
Brown,

On Mon, Jul 17, 2017 at 05:01:51PM +0100, Mark Brown wrote:
> On Tue, Jun 27, 2017 at 03:15:18PM +0530, Varadarajan Narayanan wrote:
>
> > the chip select support was removed earlier in commit
> > 4a8573abe965115bc5b064401fd669b74e985258. Since the chip
>
> Please include human readable descriptions of things like commits and
> issues being discussed in e-mail in your mails, this makes them much
> easier for humans to read especially when they have no internet access.
> I do frequently catch up on my mail on flights or while otherwise
> travelling so this is even more pressing for me than just being about
> making things a bit easier to read.

Sorry. The commit being referred to is 
(https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=4a8573abe965115bc5b064401fd669b74e985258)

commit 4a8573abe965115bc5b064401fd669b74e985258
Author: Andy Gross 
Date:   Thu Jun 12 14:34:10 2014 -0500

spi: qup: Remove chip select function

This patch removes the chip select function.  Chip select should 
instead be
supported using GPIOs, defining the DT entry "cs-gpios", and letting 
the SPI
core assert/deassert the chip select as it sees fit.

The chip select control inside the controller is buggy.  It is supposed 
to
automatically assert the chip select based on the activity in the 
controller,
but it is buggy and doesn't work at all.  So instead we elect to use 
GPIOs.

Signed-off-by: Andy Gross 
Signed-off-by: Mark Brown 

Will update the commit log and repost the patches.

Thanks
Varada

--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of 
Code Aurora Forum, hosted by The Linux Foundation


Re: [PATCH v4 01/14] spi: qup: Enable chip select support

2017-07-19 Thread Varadarajan Narayanan
Brown,

On Mon, Jul 17, 2017 at 05:01:51PM +0100, Mark Brown wrote:
> On Tue, Jun 27, 2017 at 03:15:18PM +0530, Varadarajan Narayanan wrote:
>
> > the chip select support was removed earlier in commit
> > 4a8573abe965115bc5b064401fd669b74e985258. Since the chip
>
> Please include human readable descriptions of things like commits and
> issues being discussed in e-mail in your mails, this makes them much
> easier for humans to read especially when they have no internet access.
> I do frequently catch up on my mail on flights or while otherwise
> travelling so this is even more pressing for me than just being about
> making things a bit easier to read.

Sorry. The commit being referred to is 
(https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=4a8573abe965115bc5b064401fd669b74e985258)

commit 4a8573abe965115bc5b064401fd669b74e985258
Author: Andy Gross 
Date:   Thu Jun 12 14:34:10 2014 -0500

spi: qup: Remove chip select function

This patch removes the chip select function.  Chip select should 
instead be
supported using GPIOs, defining the DT entry "cs-gpios", and letting 
the SPI
core assert/deassert the chip select as it sees fit.

The chip select control inside the controller is buggy.  It is supposed 
to
automatically assert the chip select based on the activity in the 
controller,
but it is buggy and doesn't work at all.  So instead we elect to use 
GPIOs.

Signed-off-by: Andy Gross 
Signed-off-by: Mark Brown 

Will update the commit log and repost the patches.

Thanks
Varada

--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of 
Code Aurora Forum, hosted by The Linux Foundation


RE: Re: [PATCH] devfreq: Convert to using %pOF instead of full_name

2017-07-19 Thread MyungJoo Ham
> On 2017년 07월 19일 06:42, Rob Herring wrote:
> > Now that we have a custom printf format specifier, convert users of
> > full_name to use %pOF instead. This is preparation to remove storing
> > of the full path string for each node.
> > 
> > Signed-off-by: Rob Herring 
> > Cc: Chanwoo Choi 
> > Cc: MyungJoo Ham 
> > Cc: Kyungmin Park 
> > Cc: linux...@vger.kernel.org
> > ---
> >  drivers/devfreq/devfreq-event.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/devfreq/devfreq-event.c 
> > b/drivers/devfreq/devfreq-event.c
> > index 8648b32ebc89..d67242d87744 100644
> > --- a/drivers/devfreq/devfreq-event.c
> > +++ b/drivers/devfreq/devfreq-event.c
> > @@ -277,8 +277,8 @@ int devfreq_event_get_edev_count(struct device *dev)
> > sizeof(u32));
> > if (count < 0) {
> > dev_err(dev,
> > -   "failed to get the count of devfreq-event in %s node\n",
> > -   dev->of_node->full_name);
> > +   "failed to get the count of devfreq-event in %pOF 
> > node\n",
> > +   dev->of_node);
> > return count;
> > }
> > 
> 
> Reviewed-by: Chanwoo Choi 
> 

Acked-by: MyungJoo Ham 





RE: Re: [PATCH] devfreq: Convert to using %pOF instead of full_name

2017-07-19 Thread MyungJoo Ham
> On 2017년 07월 19일 06:42, Rob Herring wrote:
> > Now that we have a custom printf format specifier, convert users of
> > full_name to use %pOF instead. This is preparation to remove storing
> > of the full path string for each node.
> > 
> > Signed-off-by: Rob Herring 
> > Cc: Chanwoo Choi 
> > Cc: MyungJoo Ham 
> > Cc: Kyungmin Park 
> > Cc: linux...@vger.kernel.org
> > ---
> >  drivers/devfreq/devfreq-event.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/devfreq/devfreq-event.c 
> > b/drivers/devfreq/devfreq-event.c
> > index 8648b32ebc89..d67242d87744 100644
> > --- a/drivers/devfreq/devfreq-event.c
> > +++ b/drivers/devfreq/devfreq-event.c
> > @@ -277,8 +277,8 @@ int devfreq_event_get_edev_count(struct device *dev)
> > sizeof(u32));
> > if (count < 0) {
> > dev_err(dev,
> > -   "failed to get the count of devfreq-event in %s node\n",
> > -   dev->of_node->full_name);
> > +   "failed to get the count of devfreq-event in %pOF 
> > node\n",
> > +   dev->of_node);
> > return count;
> > }
> > 
> 
> Reviewed-by: Chanwoo Choi 
> 

Acked-by: MyungJoo Ham 





Re: [linux-sunxi] [PATCH v4 4/5] ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu

2017-07-19 Thread icenowy

在 2017-07-20 10:03,icen...@aosc.io 写道:

在 2017-07-20 06:59,Ondřej Jirman 写道:

Hi,

Icenowy Zheng píše v Út 04. 04. 2017 v 17:50 +0800:

From: Icenowy Zheng 

Now we have driver for the PRCM CCU, switch to use it instead of
old-style clock nodes for apb0-related clocks in sunxi-h3-h5.dtsi .

The mux 3 of R_CCU is still the internal oscillator, which is said to 
be
16MHz plus minus 30%, and get a measured value of 15MHz~16MHz on my 
two

H3 boards and one H5 board.


There's issue with the new r_ccu that breaks r_i2c. (no devices can be
found on the bus). Reverting this patch fixes the issue with the I2C
controller. (everything else being the same)

Here's the code I'm using: 
https://github.com/megous/linux/commits/oran

ge-pi-4.12

The last commit is the revert.

The issue manifests itself by non-working DVFS, because kernel lacks
access to SY8106A regulator, because r_i2c doesn't work with sunxi-ng
clock driver (sun8i-r).

Relevant difference in registers between working/non-working state is
just this (diff -u):

 0x01f02400 = 0x
 0x01f02404 = 0x
-0x01f02408 = 0x0091
+0x01f02408 = 0x0095 DATA register inisde the I2C controller
 0x01f0240c = 0x0044
 0x01f02410 = 0x00f8
-0x01f02414 = 0x0059
+0x01f02414 = 0x CLOCK setup register inside the I2C 
controller

 0x01f02418 = 0x
 0x01f0241c = 0x
 0x01f02420 = 0x003a

It looks like the new sunxi-ng clock driver causes the I2C driver to
not correctly configure the CLOCK register. I don't know why and I'm
not sure how to deal with this. Any ideas what can I do next?

thank you and regards,
  o.


It seems to be a very very very weird problem -- the CPUS_CFG register
seems to be not accessible in non-secure mode on H3, and if the r_ccu
driver reads it a value of 0x0 is read out (which means that the parent
of ar100 is osc32k), but the real initial value of the register is
0x0001 (which means the parent is osc24M).

So the bus clock of r_i2c is wrongly claimed as 32kHz, not 24MHz, then
the r_i2c fails to work.


The protection to AR100 registers can be removed by writing 1 to 
0x01f015d0

(0x1d0 at PRCM memory region).

Interestingly this controlling register can be written in non-secure 
world,

so it's still broken secure/non-secure division ;-)



This clock problem doesn't exist for A64.




Signed-off-by: Icenowy Zheng 
---
Changes in v4:
- Temporarily dropped the CCU headers.
Changes in v3:
- Change osc32000 to iosc.

 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 45 
--

 1 file changed, 14 insertions(+), 31 deletions(-)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi 
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi

index 6640ebfa6419..1aeeacb3a884 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -68,31 +68,12 @@
clock-output-names = "osc32k";
};

-   apb0: apb0_clk {
-   compatible = "fixed-factor-clock";
+   iosc: internal-osc-clk {
#clock-cells = <0>;
-   clock-div = <1>;
-   clock-mult = <1>;
-   clocks = <>;
-   clock-output-names = "apb0";
-   };
-
-   apb0_gates: clk@01f01428 {
-   compatible = "allwinner,sun8i-h3-apb0-gates-clk",
-"allwinner,sun4i-a10-gates-clk";
-   reg = <0x01f01428 0x4>;
-   #clock-cells = <1>;
-   clocks = <>;
-   clock-indices = <0>, <1>;
-   clock-output-names = "apb0_pio", "apb0_ir";
-   };
-
-   ir_clk: ir_clk@01f01454 {
-   compatible = "allwinner,sun4i-a10-mod0-clk";
-   reg = <0x01f01454 0x4>;
-   #clock-cells = <0>;
-   clocks = <>, <>;
-   clock-output-names = "ir";
+   compatible = "fixed-clock";
+   clock-frequency = <1600>;
+   clock-accuracy = <3>;
+   clock-output-names = "iosc";
};
};

@@ -576,9 +557,12 @@
 ;
};

-   apb0_reset: reset@01f014b0 {
-   reg = <0x01f014b0 0x4>;
-   compatible = "allwinner,sun6i-a31-clock-reset";
+   r_ccu: clock@1f01400 {
+   compatible = "allwinner,sun50i-a64-r-ccu";
+   reg = <0x01f01400 0x100>;
+   clocks = <>, <>, <>;
+   clock-names = "hosc", "losc", "iosc";
+   #clock-cells = <1>;
#reset-cells = <1>;
};

@@ -589,9 +573,9 @@

ir: ir@01f02000 {

Re: [linux-sunxi] [PATCH v4 4/5] ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu

2017-07-19 Thread icenowy

在 2017-07-20 10:03,icen...@aosc.io 写道:

在 2017-07-20 06:59,Ondřej Jirman 写道:

Hi,

Icenowy Zheng píše v Út 04. 04. 2017 v 17:50 +0800:

From: Icenowy Zheng 

Now we have driver for the PRCM CCU, switch to use it instead of
old-style clock nodes for apb0-related clocks in sunxi-h3-h5.dtsi .

The mux 3 of R_CCU is still the internal oscillator, which is said to 
be
16MHz plus minus 30%, and get a measured value of 15MHz~16MHz on my 
two

H3 boards and one H5 board.


There's issue with the new r_ccu that breaks r_i2c. (no devices can be
found on the bus). Reverting this patch fixes the issue with the I2C
controller. (everything else being the same)

Here's the code I'm using: 
https://github.com/megous/linux/commits/oran

ge-pi-4.12

The last commit is the revert.

The issue manifests itself by non-working DVFS, because kernel lacks
access to SY8106A regulator, because r_i2c doesn't work with sunxi-ng
clock driver (sun8i-r).

Relevant difference in registers between working/non-working state is
just this (diff -u):

 0x01f02400 = 0x
 0x01f02404 = 0x
-0x01f02408 = 0x0091
+0x01f02408 = 0x0095 DATA register inisde the I2C controller
 0x01f0240c = 0x0044
 0x01f02410 = 0x00f8
-0x01f02414 = 0x0059
+0x01f02414 = 0x CLOCK setup register inside the I2C 
controller

 0x01f02418 = 0x
 0x01f0241c = 0x
 0x01f02420 = 0x003a

It looks like the new sunxi-ng clock driver causes the I2C driver to
not correctly configure the CLOCK register. I don't know why and I'm
not sure how to deal with this. Any ideas what can I do next?

thank you and regards,
  o.


It seems to be a very very very weird problem -- the CPUS_CFG register
seems to be not accessible in non-secure mode on H3, and if the r_ccu
driver reads it a value of 0x0 is read out (which means that the parent
of ar100 is osc32k), but the real initial value of the register is
0x0001 (which means the parent is osc24M).

So the bus clock of r_i2c is wrongly claimed as 32kHz, not 24MHz, then
the r_i2c fails to work.


The protection to AR100 registers can be removed by writing 1 to 
0x01f015d0

(0x1d0 at PRCM memory region).

Interestingly this controlling register can be written in non-secure 
world,

so it's still broken secure/non-secure division ;-)



This clock problem doesn't exist for A64.




Signed-off-by: Icenowy Zheng 
---
Changes in v4:
- Temporarily dropped the CCU headers.
Changes in v3:
- Change osc32000 to iosc.

 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 45 
--

 1 file changed, 14 insertions(+), 31 deletions(-)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi 
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi

index 6640ebfa6419..1aeeacb3a884 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -68,31 +68,12 @@
clock-output-names = "osc32k";
};

-   apb0: apb0_clk {
-   compatible = "fixed-factor-clock";
+   iosc: internal-osc-clk {
#clock-cells = <0>;
-   clock-div = <1>;
-   clock-mult = <1>;
-   clocks = <>;
-   clock-output-names = "apb0";
-   };
-
-   apb0_gates: clk@01f01428 {
-   compatible = "allwinner,sun8i-h3-apb0-gates-clk",
-"allwinner,sun4i-a10-gates-clk";
-   reg = <0x01f01428 0x4>;
-   #clock-cells = <1>;
-   clocks = <>;
-   clock-indices = <0>, <1>;
-   clock-output-names = "apb0_pio", "apb0_ir";
-   };
-
-   ir_clk: ir_clk@01f01454 {
-   compatible = "allwinner,sun4i-a10-mod0-clk";
-   reg = <0x01f01454 0x4>;
-   #clock-cells = <0>;
-   clocks = <>, <>;
-   clock-output-names = "ir";
+   compatible = "fixed-clock";
+   clock-frequency = <1600>;
+   clock-accuracy = <3>;
+   clock-output-names = "iosc";
};
};

@@ -576,9 +557,12 @@
 ;
};

-   apb0_reset: reset@01f014b0 {
-   reg = <0x01f014b0 0x4>;
-   compatible = "allwinner,sun6i-a31-clock-reset";
+   r_ccu: clock@1f01400 {
+   compatible = "allwinner,sun50i-a64-r-ccu";
+   reg = <0x01f01400 0x100>;
+   clocks = <>, <>, <>;
+   clock-names = "hosc", "losc", "iosc";
+   #clock-cells = <1>;
#reset-cells = <1>;
};

@@ -589,9 +573,9 @@

ir: ir@01f02000 {
compatible = 

Re: linux-next: build warning after merge of the char-misc tree

2017-07-19 Thread Greg KH
On Thu, Jul 20, 2017 at 02:12:03PM +1000, Stephen Rothwell wrote:
> Hi all,
> 
> After merging the char-misc tree, yesterday's linux-next build (i386
> defconfig) produced this warning:
> 
> In file included from /home/sfr/next/next/arch/x86/entry/vdso/vma.c:25:0:
> /home/sfr/next/next/arch/x86/include/asm/mshyperv.h:181:15: warning: return 
> type defaults to 'int' [-Wreturn-type]  
>  static inline hyperv_cleanup(void) {}
>^
> 
> Introduced by commit
> 
>   2e252fbf777d ("x86/hyper-v: include hyperv/ only when CONFIG_HYPERV is set")

Ugh, KY, can you send me a fix for this?

All of these gcc-7 warnings are keeping me from seeing the "real"
problems now :(

thanks,

greg k-h


Re: linux-next: build warning after merge of the char-misc tree

2017-07-19 Thread Greg KH
On Thu, Jul 20, 2017 at 02:12:03PM +1000, Stephen Rothwell wrote:
> Hi all,
> 
> After merging the char-misc tree, yesterday's linux-next build (i386
> defconfig) produced this warning:
> 
> In file included from /home/sfr/next/next/arch/x86/entry/vdso/vma.c:25:0:
> /home/sfr/next/next/arch/x86/include/asm/mshyperv.h:181:15: warning: return 
> type defaults to 'int' [-Wreturn-type]  
>  static inline hyperv_cleanup(void) {}
>^
> 
> Introduced by commit
> 
>   2e252fbf777d ("x86/hyper-v: include hyperv/ only when CONFIG_HYPERV is set")

Ugh, KY, can you send me a fix for this?

All of these gcc-7 warnings are keeping me from seeing the "real"
problems now :(

thanks,

greg k-h


Re: [PATCH v2 4/7] driver core: add devm_device_add_group() and friends

2017-07-19 Thread Greg Kroah-Hartman
On Wed, Jul 19, 2017 at 05:24:33PM -0700, Dmitry Torokhov wrote:
> Many drivers create additional driver-specific device attributes when
> binding to the device, and providing managed version of
> device_create_group() will simplify unbinding and error handling in probe
> path for such drivers.
> 
> Without managed version driver writers either have to mix manual and
> managed resources, which is prone to errors, or open-code this function by
> providing a wrapper to device_add_group() and use it with devm_add_action()
> or devm_add_action_or_reset().
> 
> Signed-off-by: Dmitry Torokhov 
> ---
>  drivers/base/core.c| 130 
> +
>  include/linux/device.h |   9 
>  2 files changed, 139 insertions(+)
> 
> diff --git a/drivers/base/core.c b/drivers/base/core.c
> index 14f8cf5c8b05..09723532725d 100644
> --- a/drivers/base/core.c
> +++ b/drivers/base/core.c
> @@ -1035,6 +1035,136 @@ void device_remove_groups(struct device *dev,
>  }
>  EXPORT_SYMBOL_GPL(device_remove_groups);
>  
> +union device_attr_group_devres {
> + const struct attribute_group *group;
> + const struct attribute_group **groups;
> +};
> +
> +static int devm_attr_group_match(struct device *dev, void *res, void *data)
> +{
> + return ((union device_attr_group_devres *)res)->group == data;
> +}
> +
> +static void devm_attr_group_remove(struct device *dev, void *res)
> +{
> + union device_attr_group_devres *devres = res;
> + const struct attribute_group *group = devres->group;
> +
> + dev_dbg(dev, "%s: removing group %p\n", __func__, group);
> + sysfs_remove_group(>kobj, group);
> +}
> +
> +static void devm_attr_groups_remove(struct device *dev, void *res)
> +{
> + union device_attr_group_devres *devres = res;
> + const struct attribute_group **groups = devres->groups;
> +
> + dev_dbg(dev, "%s: removing groups %p\n", __func__, groups);
> + sysfs_remove_groups(>kobj, groups);
> +}
> +
> +/**
> + * devm_device_add_group - given a device, create a managed attribute group
> + * @dev: The device to create the group for
> + * @grp: The attribute group to create
> + *
> + * This function creates a group for the first time.  It will explicitly
> + * warn and error if any of the attribute files being created already exist.
> + *
> + * Returns 0 on success or error code on failure.
> + */
> +int devm_device_add_group(struct device *dev, const struct attribute_group 
> *grp)
> +{
> + union device_attr_group_devres *devres;
> + int error;
> +
> + devres = devres_alloc(devm_attr_group_remove,
> +   sizeof(*devres), GFP_KERNEL);
> + if (!devres)
> + return -ENOMEM;
> +
> + error = sysfs_create_group(>kobj, grp);

Minor nit, this can now call device_create_group(), right?

Same with below I think as well.

It's fine, these look great, I'll queue them up this afternoon...

Thanks for persisting with these, and sorry it took so long to convince
me I was wrong :)

greg k-h


Re: [PATCH v2 4/7] driver core: add devm_device_add_group() and friends

2017-07-19 Thread Greg Kroah-Hartman
On Wed, Jul 19, 2017 at 05:24:33PM -0700, Dmitry Torokhov wrote:
> Many drivers create additional driver-specific device attributes when
> binding to the device, and providing managed version of
> device_create_group() will simplify unbinding and error handling in probe
> path for such drivers.
> 
> Without managed version driver writers either have to mix manual and
> managed resources, which is prone to errors, or open-code this function by
> providing a wrapper to device_add_group() and use it with devm_add_action()
> or devm_add_action_or_reset().
> 
> Signed-off-by: Dmitry Torokhov 
> ---
>  drivers/base/core.c| 130 
> +
>  include/linux/device.h |   9 
>  2 files changed, 139 insertions(+)
> 
> diff --git a/drivers/base/core.c b/drivers/base/core.c
> index 14f8cf5c8b05..09723532725d 100644
> --- a/drivers/base/core.c
> +++ b/drivers/base/core.c
> @@ -1035,6 +1035,136 @@ void device_remove_groups(struct device *dev,
>  }
>  EXPORT_SYMBOL_GPL(device_remove_groups);
>  
> +union device_attr_group_devres {
> + const struct attribute_group *group;
> + const struct attribute_group **groups;
> +};
> +
> +static int devm_attr_group_match(struct device *dev, void *res, void *data)
> +{
> + return ((union device_attr_group_devres *)res)->group == data;
> +}
> +
> +static void devm_attr_group_remove(struct device *dev, void *res)
> +{
> + union device_attr_group_devres *devres = res;
> + const struct attribute_group *group = devres->group;
> +
> + dev_dbg(dev, "%s: removing group %p\n", __func__, group);
> + sysfs_remove_group(>kobj, group);
> +}
> +
> +static void devm_attr_groups_remove(struct device *dev, void *res)
> +{
> + union device_attr_group_devres *devres = res;
> + const struct attribute_group **groups = devres->groups;
> +
> + dev_dbg(dev, "%s: removing groups %p\n", __func__, groups);
> + sysfs_remove_groups(>kobj, groups);
> +}
> +
> +/**
> + * devm_device_add_group - given a device, create a managed attribute group
> + * @dev: The device to create the group for
> + * @grp: The attribute group to create
> + *
> + * This function creates a group for the first time.  It will explicitly
> + * warn and error if any of the attribute files being created already exist.
> + *
> + * Returns 0 on success or error code on failure.
> + */
> +int devm_device_add_group(struct device *dev, const struct attribute_group 
> *grp)
> +{
> + union device_attr_group_devres *devres;
> + int error;
> +
> + devres = devres_alloc(devm_attr_group_remove,
> +   sizeof(*devres), GFP_KERNEL);
> + if (!devres)
> + return -ENOMEM;
> +
> + error = sysfs_create_group(>kobj, grp);

Minor nit, this can now call device_create_group(), right?

Same with below I think as well.

It's fine, these look great, I'll queue them up this afternoon...

Thanks for persisting with these, and sorry it took so long to convince
me I was wrong :)

greg k-h


Re: [PATCH 4.9 00/72] 4.9.39-stable review

2017-07-19 Thread Greg Kroah-Hartman
On Wed, Jul 19, 2017 at 09:28:58PM +0530, Sumit Semwal wrote:
> Hi Greg,
> 
> On 19 July 2017 at 15:53, Greg Kroah-Hartman  
> wrote:
> > This is the start of the stable review cycle for the 4.9.39 release.
> > There are 72 patches in this series, all will be posted as a response
> > to this one.  If anyone has any issues with these being applied, please
> > let me know.
> >
> > Responses should be made by Fri Jul 21 10:23:57 UTC 2017.
> > Anything received after that time might be too late.
> >
> For arm64, built and boot tested with defconfig on hikey, no regressions 
> noted.

Thanks for testing and letting me know.

greg k-h


Re: [PATCH 4.9 00/72] 4.9.39-stable review

2017-07-19 Thread Greg Kroah-Hartman
On Wed, Jul 19, 2017 at 09:28:58PM +0530, Sumit Semwal wrote:
> Hi Greg,
> 
> On 19 July 2017 at 15:53, Greg Kroah-Hartman  
> wrote:
> > This is the start of the stable review cycle for the 4.9.39 release.
> > There are 72 patches in this series, all will be posted as a response
> > to this one.  If anyone has any issues with these being applied, please
> > let me know.
> >
> > Responses should be made by Fri Jul 21 10:23:57 UTC 2017.
> > Anything received after that time might be too late.
> >
> For arm64, built and boot tested with defconfig on hikey, no regressions 
> noted.

Thanks for testing and letting me know.

greg k-h


Re: [PATCH 3.18 00/28] 3.18.62-stable review

2017-07-19 Thread Greg Kroah-Hartman
On Wed, Jul 19, 2017 at 05:40:35PM -0600, Shuah Khan wrote:
> On 07/19/2017 05:15 AM, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 3.18.62 release.
> > There are 28 patches in this series, all will be posted as a response
> > to this one.  If anyone has any issues with these being applied, please
> > let me know.
> > 
> > Responses should be made by Fri Jul 21 11:13:09 UTC 2017.
> > Anything received after that time might be too late.
> > 
> > The whole patch series can be found in one patch at:
> > kernel.org/pub/linux/kernel/v3.x/stable-review/patch-3.18.62-rc1.gz
> > or in the git tree and branch at:
> >   git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git 
> > linux-3.18.y
> > and the diffstat can be found below.
> > 
> > thanks,
> > 
> > greg k-h
> > 
> 
> Compiled and booted on my test system. No dmesg regressions.

Thanks for testing all of these and letting me know.

greg k-h


Re: [PATCH 3.18 00/28] 3.18.62-stable review

2017-07-19 Thread Greg Kroah-Hartman
On Wed, Jul 19, 2017 at 05:40:35PM -0600, Shuah Khan wrote:
> On 07/19/2017 05:15 AM, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 3.18.62 release.
> > There are 28 patches in this series, all will be posted as a response
> > to this one.  If anyone has any issues with these being applied, please
> > let me know.
> > 
> > Responses should be made by Fri Jul 21 11:13:09 UTC 2017.
> > Anything received after that time might be too late.
> > 
> > The whole patch series can be found in one patch at:
> > kernel.org/pub/linux/kernel/v3.x/stable-review/patch-3.18.62-rc1.gz
> > or in the git tree and branch at:
> >   git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git 
> > linux-3.18.y
> > and the diffstat can be found below.
> > 
> > thanks,
> > 
> > greg k-h
> > 
> 
> Compiled and booted on my test system. No dmesg regressions.

Thanks for testing all of these and letting me know.

greg k-h


Re: [PATCH 4.12 00/84] 4.12.3-stable review

2017-07-19 Thread Greg Kroah-Hartman
On Wed, Jul 19, 2017 at 01:35:59PM -0700, Guenter Roeck wrote:
> On Wed, Jul 19, 2017 at 11:43:06AM +0200, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 4.12.3 release.
> > There are 84 patches in this series, all will be posted as a response
> > to this one.  If anyone has any issues with these being applied, please
> > let me know.
> > 
> > Responses should be made by Fri Jul 21 09:22:37 UTC 2017.
> > Anything received after that time might be too late.
> > 
> Build results:
>   total: 145 pass: 145 fail: 0
> Qemu test results:
>   total: 122 pass: 122 fail: 0
> 
> Details are available at http://kerneltests.org/builders.

Great, thanks for letting me know about all of these.

greg k-h


Re: [PATCH 4.12 00/84] 4.12.3-stable review

2017-07-19 Thread Greg Kroah-Hartman
On Wed, Jul 19, 2017 at 01:35:59PM -0700, Guenter Roeck wrote:
> On Wed, Jul 19, 2017 at 11:43:06AM +0200, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 4.12.3 release.
> > There are 84 patches in this series, all will be posted as a response
> > to this one.  If anyone has any issues with these being applied, please
> > let me know.
> > 
> > Responses should be made by Fri Jul 21 09:22:37 UTC 2017.
> > Anything received after that time might be too late.
> > 
> Build results:
>   total: 145 pass: 145 fail: 0
> Qemu test results:
>   total: 122 pass: 122 fail: 0
> 
> Details are available at http://kerneltests.org/builders.

Great, thanks for letting me know about all of these.

greg k-h


[RESEND PATCH] unicore32: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - MTD_PARTITIONS: commit 6a8a98b22b10 ("mtd: kill
   CONFIG_MTD_PARTITIONS");
 - MTD_CHAR: commit 660685d9d1b4 ("mtd: merge mtdchar module with
   mtdcore");
 - NETDEV_1000: commit f860b0522f65 ("drivers/net: Kconfig and Makefile
   cleanup"); NET_ETHERNET should be replaced with just ETHERNET but
   that is separate change;

Signed-off-by: Krzysztof Kozlowski 
---
 arch/unicore32/configs/unicore32_defconfig | 4 
 1 file changed, 4 deletions(-)

diff --git a/arch/unicore32/configs/unicore32_defconfig 
b/arch/unicore32/configs/unicore32_defconfig
index aebd01fc28e5..510a7ee38ce3 100644
--- a/arch/unicore32/configs/unicore32_defconfig
+++ b/arch/unicore32/configs/unicore32_defconfig
@@ -1,5 +1,4 @@
 ### General setup
-CONFIG_EXPERIMENTAL=y
 CONFIG_LOCALVERSION="-unicore32"
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
@@ -75,8 +74,6 @@ CONFIG_PUV3_UART=n
 #  Memory Technology Device (MTD) support
 CONFIG_MTD=m
 CONFIG_MTD_UBI=m
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=m
 CONFIG_MTD_BLKDEVS=m
 #  RAM/ROM/Flash chip drivers
 CONFIG_MTD_CFI=m
@@ -101,7 +98,6 @@ CONFIG_SATA_VIA=y
 #  Network device support
 CONFIG_NETDEVICES=y
 CONFIG_NET_ETHERNET=y
-CONFIG_NETDEV_1000=y
 #  Wireless LAN
 CONFIG_WLAN_80211=n
 CONFIG_RT2X00=n
-- 
2.7.4



[RESEND PATCH] unicore32: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - MTD_PARTITIONS: commit 6a8a98b22b10 ("mtd: kill
   CONFIG_MTD_PARTITIONS");
 - MTD_CHAR: commit 660685d9d1b4 ("mtd: merge mtdchar module with
   mtdcore");
 - NETDEV_1000: commit f860b0522f65 ("drivers/net: Kconfig and Makefile
   cleanup"); NET_ETHERNET should be replaced with just ETHERNET but
   that is separate change;

Signed-off-by: Krzysztof Kozlowski 
---
 arch/unicore32/configs/unicore32_defconfig | 4 
 1 file changed, 4 deletions(-)

diff --git a/arch/unicore32/configs/unicore32_defconfig 
b/arch/unicore32/configs/unicore32_defconfig
index aebd01fc28e5..510a7ee38ce3 100644
--- a/arch/unicore32/configs/unicore32_defconfig
+++ b/arch/unicore32/configs/unicore32_defconfig
@@ -1,5 +1,4 @@
 ### General setup
-CONFIG_EXPERIMENTAL=y
 CONFIG_LOCALVERSION="-unicore32"
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
@@ -75,8 +74,6 @@ CONFIG_PUV3_UART=n
 #  Memory Technology Device (MTD) support
 CONFIG_MTD=m
 CONFIG_MTD_UBI=m
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=m
 CONFIG_MTD_BLKDEVS=m
 #  RAM/ROM/Flash chip drivers
 CONFIG_MTD_CFI=m
@@ -101,7 +98,6 @@ CONFIG_SATA_VIA=y
 #  Network device support
 CONFIG_NETDEVICES=y
 CONFIG_NET_ETHERNET=y
-CONFIG_NETDEV_1000=y
 #  Wireless LAN
 CONFIG_WLAN_80211=n
 CONFIG_RT2X00=n
-- 
2.7.4



[RESEND PATCH] tile: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - CRYPTO_ZLIB: commit 110492183c4b ("crypto: compress - remove unused
   pcomp interface");
 - IP_NF_TARGET_ULOG: commit d4da843e6fad ("netfilter: kill remnants of
   ulog targets");

Signed-off-by: Krzysztof Kozlowski 
---
 arch/tile/configs/tilegx_defconfig  | 1 -
 arch/tile/configs/tilepro_defconfig | 2 --
 2 files changed, 3 deletions(-)

diff --git a/arch/tile/configs/tilegx_defconfig 
b/arch/tile/configs/tilegx_defconfig
index 0d925fa0f0c1..9f94435cc44f 100644
--- a/arch/tile/configs/tilegx_defconfig
+++ b/arch/tile/configs/tilegx_defconfig
@@ -409,5 +409,4 @@ CONFIG_CRYPTO_SEED=m
 CONFIG_CRYPTO_SERPENT=m
 CONFIG_CRYPTO_TEA=m
 CONFIG_CRYPTO_TWOFISH=m
-CONFIG_CRYPTO_ZLIB=m
 CONFIG_CRYPTO_LZO=m
diff --git a/arch/tile/configs/tilepro_defconfig 
b/arch/tile/configs/tilepro_defconfig
index 149d8e8eacb8..1c5bd4f8ffca 100644
--- a/arch/tile/configs/tilepro_defconfig
+++ b/arch/tile/configs/tilepro_defconfig
@@ -189,7 +189,6 @@ CONFIG_IP_NF_MATCH_ECN=m
 CONFIG_IP_NF_MATCH_TTL=m
 CONFIG_IP_NF_FILTER=y
 CONFIG_IP_NF_TARGET_REJECT=y
-CONFIG_IP_NF_TARGET_ULOG=m
 CONFIG_IP_NF_MANGLE=m
 CONFIG_IP_NF_TARGET_ECN=m
 CONFIG_IP_NF_TARGET_TTL=m
@@ -521,7 +520,6 @@ CONFIG_CRYPTO_SEED=m
 CONFIG_CRYPTO_SERPENT=m
 CONFIG_CRYPTO_TEA=m
 CONFIG_CRYPTO_TWOFISH=m
-CONFIG_CRYPTO_ZLIB=m
 CONFIG_CRYPTO_LZO=m
 CONFIG_CRC_CCITT=m
 CONFIG_CRC7=m
-- 
2.7.4



[RESEND PATCH] tile: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - CRYPTO_ZLIB: commit 110492183c4b ("crypto: compress - remove unused
   pcomp interface");
 - IP_NF_TARGET_ULOG: commit d4da843e6fad ("netfilter: kill remnants of
   ulog targets");

Signed-off-by: Krzysztof Kozlowski 
---
 arch/tile/configs/tilegx_defconfig  | 1 -
 arch/tile/configs/tilepro_defconfig | 2 --
 2 files changed, 3 deletions(-)

diff --git a/arch/tile/configs/tilegx_defconfig 
b/arch/tile/configs/tilegx_defconfig
index 0d925fa0f0c1..9f94435cc44f 100644
--- a/arch/tile/configs/tilegx_defconfig
+++ b/arch/tile/configs/tilegx_defconfig
@@ -409,5 +409,4 @@ CONFIG_CRYPTO_SEED=m
 CONFIG_CRYPTO_SERPENT=m
 CONFIG_CRYPTO_TEA=m
 CONFIG_CRYPTO_TWOFISH=m
-CONFIG_CRYPTO_ZLIB=m
 CONFIG_CRYPTO_LZO=m
diff --git a/arch/tile/configs/tilepro_defconfig 
b/arch/tile/configs/tilepro_defconfig
index 149d8e8eacb8..1c5bd4f8ffca 100644
--- a/arch/tile/configs/tilepro_defconfig
+++ b/arch/tile/configs/tilepro_defconfig
@@ -189,7 +189,6 @@ CONFIG_IP_NF_MATCH_ECN=m
 CONFIG_IP_NF_MATCH_TTL=m
 CONFIG_IP_NF_FILTER=y
 CONFIG_IP_NF_TARGET_REJECT=y
-CONFIG_IP_NF_TARGET_ULOG=m
 CONFIG_IP_NF_MANGLE=m
 CONFIG_IP_NF_TARGET_ECN=m
 CONFIG_IP_NF_TARGET_TTL=m
@@ -521,7 +520,6 @@ CONFIG_CRYPTO_SEED=m
 CONFIG_CRYPTO_SERPENT=m
 CONFIG_CRYPTO_TEA=m
 CONFIG_CRYPTO_TWOFISH=m
-CONFIG_CRYPTO_ZLIB=m
 CONFIG_CRYPTO_LZO=m
 CONFIG_CRC_CCITT=m
 CONFIG_CRC7=m
-- 
2.7.4



[RESEND PATCH] m32r: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - IP_NF_QUEUE: commit 3dd6664fac7e ("netfilter: remove unused "config
   IP_NF_QUEUE"");
 - IP_NF_TARGET_ULOG: commit d4da843e6fad ("netfilter: kill remnants of
   ulog targets");
 - VIDEO_OUTPUT_CONTROL: commit f167a64e9d67 ("video / output: Drop
   display output class support");
 - MTD_PARTITIONS: commit 6a8a98b22b10 ("mtd: kill
   CONFIG_MTD_PARTITIONS");
 - MTD_CHAR: commit 660685d9d1b4 ("mtd: merge mtdchar module with
   mtdcore");
 - MTD_CONCAT: commit f53fdebcc3e1 ("mtd: drop MTD_CONCAT from Kconfig
   entirely");

Signed-off-by: Krzysztof Kozlowski 
---
 arch/m32r/configs/m32104ut_defconfig | 4 
 arch/m32r/configs/m32700ut.smp_defconfig | 3 ---
 arch/m32r/configs/m32700ut.up_defconfig  | 3 ---
 arch/m32r/configs/mappi.nommu_defconfig  | 2 --
 arch/m32r/configs/mappi.smp_defconfig| 4 
 arch/m32r/configs/mappi.up_defconfig | 4 
 arch/m32r/configs/mappi2.opsp_defconfig  | 2 --
 arch/m32r/configs/mappi2.vdec2_defconfig | 2 --
 arch/m32r/configs/mappi3.smp_defconfig   | 4 
 arch/m32r/configs/oaks32r_defconfig  | 2 --
 arch/m32r/configs/opsput_defconfig   | 2 --
 arch/m32r/configs/usrv_defconfig | 5 -
 12 files changed, 37 deletions(-)

diff --git a/arch/m32r/configs/m32104ut_defconfig 
b/arch/m32r/configs/m32104ut_defconfig
index be30e094db71..4aa42acbd512 100644
--- a/arch/m32r/configs/m32104ut_defconfig
+++ b/arch/m32r/configs/m32104ut_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
@@ -40,7 +39,6 @@ CONFIG_NETFILTER_XT_MATCH_REALM=m
 CONFIG_NETFILTER_XT_MATCH_SCTP=m
 CONFIG_NETFILTER_XT_MATCH_STRING=m
 CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
-CONFIG_IP_NF_QUEUE=m
 CONFIG_IP_NF_IPTABLES=m
 CONFIG_IP_NF_MATCH_ADDRTYPE=m
 CONFIG_IP_NF_MATCH_ECN=m
@@ -48,7 +46,6 @@ CONFIG_IP_NF_MATCH_TTL=m
 CONFIG_IP_NF_FILTER=m
 CONFIG_IP_NF_TARGET_REJECT=m
 CONFIG_IP_NF_TARGET_LOG=m
-CONFIG_IP_NF_TARGET_ULOG=m
 CONFIG_IP_NF_MANGLE=m
 CONFIG_IP_NF_TARGET_ECN=m
 CONFIG_IP_NF_TARGET_TTL=m
@@ -106,7 +103,6 @@ CONFIG_SENSORS_SMSC47M1=m
 CONFIG_SENSORS_W83781D=m
 CONFIG_SENSORS_W83L785TS=m
 CONFIG_SENSORS_W83627HF=m
-CONFIG_VIDEO_OUTPUT_CONTROL=m
 CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
 CONFIG_EXT2_FS_POSIX_ACL=y
diff --git a/arch/m32r/configs/m32700ut.smp_defconfig 
b/arch/m32r/configs/m32700ut.smp_defconfig
index a3d727ed6a16..41a0495b65df 100644
--- a/arch/m32r/configs/m32700ut.smp_defconfig
+++ b/arch/m32r/configs/m32700ut.smp_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_IKCONFIG=y
@@ -30,7 +29,6 @@ CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
 # CONFIG_IPV6 is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_REDBOOT_PARTS=y
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_CFI=m
@@ -63,7 +61,6 @@ CONFIG_SERIAL_M32R_SIO_CONSOLE=y
 CONFIG_SERIAL_M32R_PLDSIO=y
 CONFIG_HW_RANDOM=y
 CONFIG_DS1302=y
-CONFIG_VIDEO_OUTPUT_CONTROL=m
 CONFIG_FB=y
 CONFIG_FIRMWARE_EDID=y
 CONFIG_FB_S1D13XXX=y
diff --git a/arch/m32r/configs/m32700ut.up_defconfig 
b/arch/m32r/configs/m32700ut.up_defconfig
index b8334163099d..20078a866f45 100644
--- a/arch/m32r/configs/m32700ut.up_defconfig
+++ b/arch/m32r/configs/m32700ut.up_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_IKCONFIG=y
@@ -29,7 +28,6 @@ CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
 # CONFIG_IPV6 is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_REDBOOT_PARTS=y
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_CFI=m
@@ -62,7 +60,6 @@ CONFIG_SERIAL_M32R_SIO_CONSOLE=y
 CONFIG_SERIAL_M32R_PLDSIO=y
 CONFIG_HW_RANDOM=y
 CONFIG_DS1302=y
-CONFIG_VIDEO_OUTPUT_CONTROL=m
 CONFIG_FB=y
 CONFIG_FIRMWARE_EDID=y
 CONFIG_FB_S1D13XXX=y
diff --git a/arch/m32r/configs/mappi.nommu_defconfig 
b/arch/m32r/configs/mappi.nommu_defconfig
index 7c90ce2fc42b..4bf3820e054a 100644
--- a/arch/m32r/configs/mappi.nommu_defconfig
+++ b/arch/m32r/configs/mappi.nommu_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_IKCONFIG=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -39,7 +38,6 @@ CONFIG_NETDEVICES=y
 # CONFIG_VT is not set
 CONFIG_SERIAL_M32R_SIO_CONSOLE=y
 CONFIG_HW_RANDOM=y
-CONFIG_VIDEO_OUTPUT_CONTROL=m
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 CONFIG_NFS_FS=y
diff --git a/arch/m32r/configs/mappi.smp_defconfig 
b/arch/m32r/configs/mappi.smp_defconfig
index 367d07cebcd3..f9ed7bdbf4de 100644
--- a/arch/m32r/configs/mappi.smp_defconfig
+++ b/arch/m32r/configs/mappi.smp_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
@@ -31,9 +30,7 @@ CONFIG_IP_PNP_DHCP=y
 # CONFIG_IPV6 is not set
 # CONFIG_STANDALONE is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_NBD=m
@@ -50,7 +47,6 @@ CONFIG_NETDEVICES=y
 # CONFIG_VT is not set
 

[RESEND PATCH] m32r: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - IP_NF_QUEUE: commit 3dd6664fac7e ("netfilter: remove unused "config
   IP_NF_QUEUE"");
 - IP_NF_TARGET_ULOG: commit d4da843e6fad ("netfilter: kill remnants of
   ulog targets");
 - VIDEO_OUTPUT_CONTROL: commit f167a64e9d67 ("video / output: Drop
   display output class support");
 - MTD_PARTITIONS: commit 6a8a98b22b10 ("mtd: kill
   CONFIG_MTD_PARTITIONS");
 - MTD_CHAR: commit 660685d9d1b4 ("mtd: merge mtdchar module with
   mtdcore");
 - MTD_CONCAT: commit f53fdebcc3e1 ("mtd: drop MTD_CONCAT from Kconfig
   entirely");

Signed-off-by: Krzysztof Kozlowski 
---
 arch/m32r/configs/m32104ut_defconfig | 4 
 arch/m32r/configs/m32700ut.smp_defconfig | 3 ---
 arch/m32r/configs/m32700ut.up_defconfig  | 3 ---
 arch/m32r/configs/mappi.nommu_defconfig  | 2 --
 arch/m32r/configs/mappi.smp_defconfig| 4 
 arch/m32r/configs/mappi.up_defconfig | 4 
 arch/m32r/configs/mappi2.opsp_defconfig  | 2 --
 arch/m32r/configs/mappi2.vdec2_defconfig | 2 --
 arch/m32r/configs/mappi3.smp_defconfig   | 4 
 arch/m32r/configs/oaks32r_defconfig  | 2 --
 arch/m32r/configs/opsput_defconfig   | 2 --
 arch/m32r/configs/usrv_defconfig | 5 -
 12 files changed, 37 deletions(-)

diff --git a/arch/m32r/configs/m32104ut_defconfig 
b/arch/m32r/configs/m32104ut_defconfig
index be30e094db71..4aa42acbd512 100644
--- a/arch/m32r/configs/m32104ut_defconfig
+++ b/arch/m32r/configs/m32104ut_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
@@ -40,7 +39,6 @@ CONFIG_NETFILTER_XT_MATCH_REALM=m
 CONFIG_NETFILTER_XT_MATCH_SCTP=m
 CONFIG_NETFILTER_XT_MATCH_STRING=m
 CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
-CONFIG_IP_NF_QUEUE=m
 CONFIG_IP_NF_IPTABLES=m
 CONFIG_IP_NF_MATCH_ADDRTYPE=m
 CONFIG_IP_NF_MATCH_ECN=m
@@ -48,7 +46,6 @@ CONFIG_IP_NF_MATCH_TTL=m
 CONFIG_IP_NF_FILTER=m
 CONFIG_IP_NF_TARGET_REJECT=m
 CONFIG_IP_NF_TARGET_LOG=m
-CONFIG_IP_NF_TARGET_ULOG=m
 CONFIG_IP_NF_MANGLE=m
 CONFIG_IP_NF_TARGET_ECN=m
 CONFIG_IP_NF_TARGET_TTL=m
@@ -106,7 +103,6 @@ CONFIG_SENSORS_SMSC47M1=m
 CONFIG_SENSORS_W83781D=m
 CONFIG_SENSORS_W83L785TS=m
 CONFIG_SENSORS_W83627HF=m
-CONFIG_VIDEO_OUTPUT_CONTROL=m
 CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
 CONFIG_EXT2_FS_POSIX_ACL=y
diff --git a/arch/m32r/configs/m32700ut.smp_defconfig 
b/arch/m32r/configs/m32700ut.smp_defconfig
index a3d727ed6a16..41a0495b65df 100644
--- a/arch/m32r/configs/m32700ut.smp_defconfig
+++ b/arch/m32r/configs/m32700ut.smp_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_IKCONFIG=y
@@ -30,7 +29,6 @@ CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
 # CONFIG_IPV6 is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_REDBOOT_PARTS=y
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_CFI=m
@@ -63,7 +61,6 @@ CONFIG_SERIAL_M32R_SIO_CONSOLE=y
 CONFIG_SERIAL_M32R_PLDSIO=y
 CONFIG_HW_RANDOM=y
 CONFIG_DS1302=y
-CONFIG_VIDEO_OUTPUT_CONTROL=m
 CONFIG_FB=y
 CONFIG_FIRMWARE_EDID=y
 CONFIG_FB_S1D13XXX=y
diff --git a/arch/m32r/configs/m32700ut.up_defconfig 
b/arch/m32r/configs/m32700ut.up_defconfig
index b8334163099d..20078a866f45 100644
--- a/arch/m32r/configs/m32700ut.up_defconfig
+++ b/arch/m32r/configs/m32700ut.up_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_IKCONFIG=y
@@ -29,7 +28,6 @@ CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
 # CONFIG_IPV6 is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_REDBOOT_PARTS=y
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_CFI=m
@@ -62,7 +60,6 @@ CONFIG_SERIAL_M32R_SIO_CONSOLE=y
 CONFIG_SERIAL_M32R_PLDSIO=y
 CONFIG_HW_RANDOM=y
 CONFIG_DS1302=y
-CONFIG_VIDEO_OUTPUT_CONTROL=m
 CONFIG_FB=y
 CONFIG_FIRMWARE_EDID=y
 CONFIG_FB_S1D13XXX=y
diff --git a/arch/m32r/configs/mappi.nommu_defconfig 
b/arch/m32r/configs/mappi.nommu_defconfig
index 7c90ce2fc42b..4bf3820e054a 100644
--- a/arch/m32r/configs/mappi.nommu_defconfig
+++ b/arch/m32r/configs/mappi.nommu_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_IKCONFIG=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -39,7 +38,6 @@ CONFIG_NETDEVICES=y
 # CONFIG_VT is not set
 CONFIG_SERIAL_M32R_SIO_CONSOLE=y
 CONFIG_HW_RANDOM=y
-CONFIG_VIDEO_OUTPUT_CONTROL=m
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 CONFIG_NFS_FS=y
diff --git a/arch/m32r/configs/mappi.smp_defconfig 
b/arch/m32r/configs/mappi.smp_defconfig
index 367d07cebcd3..f9ed7bdbf4de 100644
--- a/arch/m32r/configs/mappi.smp_defconfig
+++ b/arch/m32r/configs/mappi.smp_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
@@ -31,9 +30,7 @@ CONFIG_IP_PNP_DHCP=y
 # CONFIG_IPV6 is not set
 # CONFIG_STANDALONE is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_NBD=m
@@ -50,7 +47,6 @@ CONFIG_NETDEVICES=y
 # CONFIG_VT is not set
 

[RESEND PATCH] x86: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - IP_NF_TARGET_ULOG: commit d4da843e6fad ("netfilter: kill remnants of
   ulog targets");
 - USB_LIBUSUAL: commit f61870ee6f8c ("usb: remove libusual");

Signed-off-by: Krzysztof Kozlowski 
---
 arch/x86/configs/i386_defconfig   | 3 ---
 arch/x86/configs/x86_64_defconfig | 3 ---
 2 files changed, 6 deletions(-)

diff --git a/arch/x86/configs/i386_defconfig b/arch/x86/configs/i386_defconfig
index 6cf79e1a6830..0eb9f92f3717 100644
--- a/arch/x86/configs/i386_defconfig
+++ b/arch/x86/configs/i386_defconfig
@@ -1,5 +1,4 @@
 # CONFIG_64BIT is not set
-CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
@@ -125,7 +124,6 @@ CONFIG_NF_CONNTRACK_IPV4=y
 CONFIG_IP_NF_IPTABLES=y
 CONFIG_IP_NF_FILTER=y
 CONFIG_IP_NF_TARGET_REJECT=y
-CONFIG_IP_NF_TARGET_ULOG=y
 CONFIG_NF_NAT=y
 CONFIG_IP_NF_TARGET_MASQUERADE=y
 CONFIG_IP_NF_MANGLE=y
@@ -255,7 +253,6 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_UHCI_HCD=y
 CONFIG_USB_PRINTER=y
 CONFIG_USB_STORAGE=y
-CONFIG_USB_LIBUSUAL=y
 CONFIG_EDAC=y
 CONFIG_RTC_CLASS=y
 # CONFIG_RTC_HCTOSYS is not set
diff --git a/arch/x86/configs/x86_64_defconfig 
b/arch/x86/configs/x86_64_defconfig
index de45f57b410d..4a4b16e56d35 100644
--- a/arch/x86/configs/x86_64_defconfig
+++ b/arch/x86/configs/x86_64_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
@@ -124,7 +123,6 @@ CONFIG_NF_CONNTRACK_IPV4=y
 CONFIG_IP_NF_IPTABLES=y
 CONFIG_IP_NF_FILTER=y
 CONFIG_IP_NF_TARGET_REJECT=y
-CONFIG_IP_NF_TARGET_ULOG=y
 CONFIG_NF_NAT=y
 CONFIG_IP_NF_TARGET_MASQUERADE=y
 CONFIG_IP_NF_MANGLE=y
@@ -251,7 +249,6 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_UHCI_HCD=y
 CONFIG_USB_PRINTER=y
 CONFIG_USB_STORAGE=y
-CONFIG_USB_LIBUSUAL=y
 CONFIG_EDAC=y
 CONFIG_RTC_CLASS=y
 # CONFIG_RTC_HCTOSYS is not set
-- 
2.7.4



[RESEND PATCH] x86: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - IP_NF_TARGET_ULOG: commit d4da843e6fad ("netfilter: kill remnants of
   ulog targets");
 - USB_LIBUSUAL: commit f61870ee6f8c ("usb: remove libusual");

Signed-off-by: Krzysztof Kozlowski 
---
 arch/x86/configs/i386_defconfig   | 3 ---
 arch/x86/configs/x86_64_defconfig | 3 ---
 2 files changed, 6 deletions(-)

diff --git a/arch/x86/configs/i386_defconfig b/arch/x86/configs/i386_defconfig
index 6cf79e1a6830..0eb9f92f3717 100644
--- a/arch/x86/configs/i386_defconfig
+++ b/arch/x86/configs/i386_defconfig
@@ -1,5 +1,4 @@
 # CONFIG_64BIT is not set
-CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
@@ -125,7 +124,6 @@ CONFIG_NF_CONNTRACK_IPV4=y
 CONFIG_IP_NF_IPTABLES=y
 CONFIG_IP_NF_FILTER=y
 CONFIG_IP_NF_TARGET_REJECT=y
-CONFIG_IP_NF_TARGET_ULOG=y
 CONFIG_NF_NAT=y
 CONFIG_IP_NF_TARGET_MASQUERADE=y
 CONFIG_IP_NF_MANGLE=y
@@ -255,7 +253,6 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_UHCI_HCD=y
 CONFIG_USB_PRINTER=y
 CONFIG_USB_STORAGE=y
-CONFIG_USB_LIBUSUAL=y
 CONFIG_EDAC=y
 CONFIG_RTC_CLASS=y
 # CONFIG_RTC_HCTOSYS is not set
diff --git a/arch/x86/configs/x86_64_defconfig 
b/arch/x86/configs/x86_64_defconfig
index de45f57b410d..4a4b16e56d35 100644
--- a/arch/x86/configs/x86_64_defconfig
+++ b/arch/x86/configs/x86_64_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
@@ -124,7 +123,6 @@ CONFIG_NF_CONNTRACK_IPV4=y
 CONFIG_IP_NF_IPTABLES=y
 CONFIG_IP_NF_FILTER=y
 CONFIG_IP_NF_TARGET_REJECT=y
-CONFIG_IP_NF_TARGET_ULOG=y
 CONFIG_NF_NAT=y
 CONFIG_IP_NF_TARGET_MASQUERADE=y
 CONFIG_IP_NF_MANGLE=y
@@ -251,7 +249,6 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_UHCI_HCD=y
 CONFIG_USB_PRINTER=y
 CONFIG_USB_STORAGE=y
-CONFIG_USB_LIBUSUAL=y
 CONFIG_EDAC=y
 CONFIG_RTC_CLASS=y
 # CONFIG_RTC_HCTOSYS is not set
-- 
2.7.4



[RESEND PATCH] um: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig option INET_LRO. It is gone since
commit 7bbf3cae65b6 ("ipv4: Remove inet_lro library").

Signed-off-by: Krzysztof Kozlowski 
---
 arch/um/configs/i386_defconfig   | 1 -
 arch/um/configs/x86_64_defconfig | 1 -
 2 files changed, 2 deletions(-)

diff --git a/arch/um/configs/i386_defconfig b/arch/um/configs/i386_defconfig
index 5636221b8785..8f114e3b0a7a 100644
--- a/arch/um/configs/i386_defconfig
+++ b/arch/um/configs/i386_defconfig
@@ -53,7 +53,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
-# CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
 CONFIG_UML_NET=y
 CONFIG_UML_NET_ETHERTAP=y
diff --git a/arch/um/configs/x86_64_defconfig b/arch/um/configs/x86_64_defconfig
index 7a67b7ac1a7e..5d0875fc0db2 100644
--- a/arch/um/configs/x86_64_defconfig
+++ b/arch/um/configs/x86_64_defconfig
@@ -51,7 +51,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
-# CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
 CONFIG_UML_NET=y
 CONFIG_UML_NET_ETHERTAP=y
-- 
2.7.4



[RESEND PATCH] sh: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - INET_LRO: commit 7bbf3cae65b6 ("ipv4: Remove inet_lro library");
 - MTD_CONCAT: commit f53fdebcc3e1 ("mtd: drop MTD_CONCAT from Kconfig
   entirely");
 - MTD_PARTITIONS: commit 6a8a98b22b10 ("mtd: kill
   CONFIG_MTD_PARTITIONS");
 - MTD_CHAR: commit 660685d9d1b4 ("mtd: merge mtdchar module with
   mtdcore");
 - NETDEV_1000 and NETDEV_1: commit f860b0522f65 ("drivers/net:
   Kconfig and Makefile cleanup"); NET_ETHERNET should be replaced with
   just ETHERNET but that is separate change;
 - HID_SUPPORT: commit 1f41a6a99476 ("HID: Fix the generic Kconfig
   options");
 - RCU_CPU_STALL_DETECTOR: commit a00e0d714fbd ("rcu: Remove conditional
   compilation for RCU CPU stall warnings");
 - SYSCTL_SYSCALL_CHECK: commit 7c60c48f58a7 ("sysctl: Improve the
   sysctl sanity checks");
 - VIDEO_OUTPUT_CONTROL: commit f167a64e9d67 ("video / output: Drop
   display output class support");
 - MISC_DEVICES: commit 7c5763b8453a ("drivers: misc: Remove
   MISC_DEVICES config option");
 - AUTOFS_FS: commit 561c5cf9236a ("staging: Remove autofs3");
 - IP_NF_QUEUE: commit 3dd6664fac7e ("netfilter: remove unused "config
   IP_NF_QUEUE"");
 - USB_DEVICE_CLASS: commit 007bab91324e ("USB: remove
   CONFIG_USB_DEVICE_CLASS");
 - USB_LIBUSUAL: commit f61870ee6f8c ("usb: remove libusual");
 - DISPLAY_SUPPORT: commit 5a6b5e02d673 ("fbdev: remove display
   subsystem");
 - IP_NF_TARGET_ULOG: commit d4da843e6fad ("netfilter: kill remnants of
   ulog targets");
 - IP6_NF_QUEUE: commit d16cf20e2f2f ("netfilter: remove ip_queue
   support");
 - IP6_NF_TARGET_LOG: commit 6939c33a757b ("netfilter: merge ipt_LOG and
   ip6_LOG into xt_LOG");

Signed-off-by: Krzysztof Kozlowski 
---
 arch/sh/configs/ap325rxa_defconfig  | 10 --
 arch/sh/configs/apsh4a3a_defconfig  |  9 -
 arch/sh/configs/apsh4ad0a_defconfig |  6 --
 arch/sh/configs/cayman_defconfig|  4 
 arch/sh/configs/dreamcast_defconfig |  6 --
 arch/sh/configs/ecovec24-romimage_defconfig |  7 ---
 arch/sh/configs/ecovec24_defconfig  |  9 -
 arch/sh/configs/edosk7705_defconfig |  2 --
 arch/sh/configs/edosk7760_defconfig | 11 ---
 arch/sh/configs/espt_defconfig  | 10 --
 arch/sh/configs/hp6xx_defconfig |  4 
 arch/sh/configs/kfr2r09-romimage_defconfig  |  5 -
 arch/sh/configs/kfr2r09_defconfig   |  7 ---
 arch/sh/configs/landisk_defconfig   |  4 
 arch/sh/configs/lboxre2_defconfig   |  3 ---
 arch/sh/configs/magicpanelr2_defconfig  |  9 -
 arch/sh/configs/microdev_defconfig  |  3 ---
 arch/sh/configs/migor_defconfig |  8 
 arch/sh/configs/polaris_defconfig   |  9 -
 arch/sh/configs/r7780mp_defconfig   |  4 
 arch/sh/configs/r7785rp_defconfig   |  3 ---
 arch/sh/configs/rsk7201_defconfig   |  8 
 arch/sh/configs/rsk7203_defconfig   | 10 --
 arch/sh/configs/rsk7264_defconfig   |  3 ---
 arch/sh/configs/rsk7269_defconfig   |  4 
 arch/sh/configs/rts7751r2d1_defconfig   |  5 -
 arch/sh/configs/rts7751r2dplus_defconfig|  8 
 arch/sh/configs/sdk7780_defconfig   |  9 -
 arch/sh/configs/sdk7786_defconfig   |  9 -
 arch/sh/configs/se7206_defconfig|  8 
 arch/sh/configs/se7343_defconfig|  9 -
 arch/sh/configs/se7619_defconfig|  5 -
 arch/sh/configs/se7705_defconfig|  5 -
 arch/sh/configs/se7712_defconfig|  7 ---
 arch/sh/configs/se7721_defconfig|  6 --
 arch/sh/configs/se7722_defconfig|  3 ---
 arch/sh/configs/se7724_defconfig|  9 -
 arch/sh/configs/se7750_defconfig|  5 -
 arch/sh/configs/se7751_defconfig|  5 -
 arch/sh/configs/se7780_defconfig|  7 ---
 arch/sh/configs/secureedge5410_defconfig|  9 -
 arch/sh/configs/sh03_defconfig  |  4 
 arch/sh/configs/sh2007_defconfig|  8 
 arch/sh/configs/sh7710voipgw_defconfig  |  5 -
 arch/sh/configs/sh7724_generic_defconfig|  3 ---
 arch/sh/configs/sh7757lcr_defconfig |  4 
 arch/sh/configs/sh7763rdp_defconfig |  9 -
 arch/sh/configs/sh7770_generic_defconfig|  3 ---
 arch/sh/configs/sh7785lcr_32bit_defconfig   | 10 --
 arch/sh/configs/sh7785lcr_defconfig |  9 -
 arch/sh/configs/shmin_defconfig |  4 
 arch/sh/configs/shx3_defconfig  |  6 --
 arch/sh/configs/titan_defconfig |  8 
 arch/sh/configs/ul2_defconfig   |  9 -
 arch/sh/configs/urquell_defconfig   |  9 -
 55 files changed, 358 

[RESEND PATCH] score: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - INET_LRO: commit 7bbf3cae65b6 ("ipv4: Remove inet_lro library");
 - MISC_DEVICES: commit 7c5763b8453a ("drivers: misc: Remove
   MISC_DEVICES config option");
 - NETDEV_1000 and NETDEV_1: commit f860b0522f65 ("drivers/net:
   Kconfig and Makefile cleanup"); NET_ETHERNET should be replaced with
   just ETHERNET but that is separate change;
 - HID_SUPPORT: commit 1f41a6a99476 ("HID: Fix the generic Kconfig
   options");
 - AUTOFS_FS: commit 561c5cf9236a ("staging: Remove autofs3");
 - RCU_CPU_STALL_DETECTOR: commit a00e0d714fbd ("rcu: Remove conditional
   compilation for RCU CPU stall warnings");

Signed-off-by: Krzysztof Kozlowski 
---
 arch/score/configs/spct6600_defconfig | 8 
 1 file changed, 8 deletions(-)

diff --git a/arch/score/configs/spct6600_defconfig 
b/arch/score/configs/spct6600_defconfig
index b2d8802f43b4..1c90a7fbfb03 100644
--- a/arch/score/configs/spct6600_defconfig
+++ b/arch/score/configs/spct6600_defconfig
@@ -1,6 +1,5 @@
 CONFIG_HZ_100=y
 CONFIG_PREEMPT_VOLUNTARY=y
-CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
@@ -25,7 +24,6 @@ CONFIG_NET_KEY=y
 CONFIG_INET=y
 CONFIG_IP_MULTICAST=y
 CONFIG_ARPD=y
-# CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
 # CONFIG_STANDALONE is not set
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
@@ -33,10 +31,7 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_CRYPTOLOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=1
-# CONFIG_MISC_DEVICES is not set
 CONFIG_NETDEVICES=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_1 is not set
 # CONFIG_INPUT_MOUSEDEV is not set
 # CONFIG_INPUT_KEYBOARD is not set
 # CONFIG_INPUT_MOUSE is not set
@@ -48,7 +43,6 @@ CONFIG_RAW_DRIVER=y
 CONFIG_MAX_RAW_DEVS=8192
 # CONFIG_HWMON is not set
 # CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
 # CONFIG_USB_SUPPORT is not set
 CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
@@ -56,7 +50,6 @@ CONFIG_EXT2_FS_POSIX_ACL=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_AUTOFS_FS=y
 CONFIG_AUTOFS4_FS=y
 CONFIG_PROC_KCORE=y
 # CONFIG_PROC_PAGE_MONITOR is not set
@@ -69,7 +62,6 @@ CONFIG_NFS_V4=y
 CONFIG_NFSD=y
 CONFIG_NFSD_V3_ACL=y
 CONFIG_NFSD_V4=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SECURITY=y
 CONFIG_SECURITY_NETWORK=y
 CONFIG_CRYPTO_NULL=y
-- 
2.7.4



[RESEND PATCH] um: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig option INET_LRO. It is gone since
commit 7bbf3cae65b6 ("ipv4: Remove inet_lro library").

Signed-off-by: Krzysztof Kozlowski 
---
 arch/um/configs/i386_defconfig   | 1 -
 arch/um/configs/x86_64_defconfig | 1 -
 2 files changed, 2 deletions(-)

diff --git a/arch/um/configs/i386_defconfig b/arch/um/configs/i386_defconfig
index 5636221b8785..8f114e3b0a7a 100644
--- a/arch/um/configs/i386_defconfig
+++ b/arch/um/configs/i386_defconfig
@@ -53,7 +53,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
-# CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
 CONFIG_UML_NET=y
 CONFIG_UML_NET_ETHERTAP=y
diff --git a/arch/um/configs/x86_64_defconfig b/arch/um/configs/x86_64_defconfig
index 7a67b7ac1a7e..5d0875fc0db2 100644
--- a/arch/um/configs/x86_64_defconfig
+++ b/arch/um/configs/x86_64_defconfig
@@ -51,7 +51,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
-# CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
 CONFIG_UML_NET=y
 CONFIG_UML_NET_ETHERTAP=y
-- 
2.7.4



[RESEND PATCH] sh: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - INET_LRO: commit 7bbf3cae65b6 ("ipv4: Remove inet_lro library");
 - MTD_CONCAT: commit f53fdebcc3e1 ("mtd: drop MTD_CONCAT from Kconfig
   entirely");
 - MTD_PARTITIONS: commit 6a8a98b22b10 ("mtd: kill
   CONFIG_MTD_PARTITIONS");
 - MTD_CHAR: commit 660685d9d1b4 ("mtd: merge mtdchar module with
   mtdcore");
 - NETDEV_1000 and NETDEV_1: commit f860b0522f65 ("drivers/net:
   Kconfig and Makefile cleanup"); NET_ETHERNET should be replaced with
   just ETHERNET but that is separate change;
 - HID_SUPPORT: commit 1f41a6a99476 ("HID: Fix the generic Kconfig
   options");
 - RCU_CPU_STALL_DETECTOR: commit a00e0d714fbd ("rcu: Remove conditional
   compilation for RCU CPU stall warnings");
 - SYSCTL_SYSCALL_CHECK: commit 7c60c48f58a7 ("sysctl: Improve the
   sysctl sanity checks");
 - VIDEO_OUTPUT_CONTROL: commit f167a64e9d67 ("video / output: Drop
   display output class support");
 - MISC_DEVICES: commit 7c5763b8453a ("drivers: misc: Remove
   MISC_DEVICES config option");
 - AUTOFS_FS: commit 561c5cf9236a ("staging: Remove autofs3");
 - IP_NF_QUEUE: commit 3dd6664fac7e ("netfilter: remove unused "config
   IP_NF_QUEUE"");
 - USB_DEVICE_CLASS: commit 007bab91324e ("USB: remove
   CONFIG_USB_DEVICE_CLASS");
 - USB_LIBUSUAL: commit f61870ee6f8c ("usb: remove libusual");
 - DISPLAY_SUPPORT: commit 5a6b5e02d673 ("fbdev: remove display
   subsystem");
 - IP_NF_TARGET_ULOG: commit d4da843e6fad ("netfilter: kill remnants of
   ulog targets");
 - IP6_NF_QUEUE: commit d16cf20e2f2f ("netfilter: remove ip_queue
   support");
 - IP6_NF_TARGET_LOG: commit 6939c33a757b ("netfilter: merge ipt_LOG and
   ip6_LOG into xt_LOG");

Signed-off-by: Krzysztof Kozlowski 
---
 arch/sh/configs/ap325rxa_defconfig  | 10 --
 arch/sh/configs/apsh4a3a_defconfig  |  9 -
 arch/sh/configs/apsh4ad0a_defconfig |  6 --
 arch/sh/configs/cayman_defconfig|  4 
 arch/sh/configs/dreamcast_defconfig |  6 --
 arch/sh/configs/ecovec24-romimage_defconfig |  7 ---
 arch/sh/configs/ecovec24_defconfig  |  9 -
 arch/sh/configs/edosk7705_defconfig |  2 --
 arch/sh/configs/edosk7760_defconfig | 11 ---
 arch/sh/configs/espt_defconfig  | 10 --
 arch/sh/configs/hp6xx_defconfig |  4 
 arch/sh/configs/kfr2r09-romimage_defconfig  |  5 -
 arch/sh/configs/kfr2r09_defconfig   |  7 ---
 arch/sh/configs/landisk_defconfig   |  4 
 arch/sh/configs/lboxre2_defconfig   |  3 ---
 arch/sh/configs/magicpanelr2_defconfig  |  9 -
 arch/sh/configs/microdev_defconfig  |  3 ---
 arch/sh/configs/migor_defconfig |  8 
 arch/sh/configs/polaris_defconfig   |  9 -
 arch/sh/configs/r7780mp_defconfig   |  4 
 arch/sh/configs/r7785rp_defconfig   |  3 ---
 arch/sh/configs/rsk7201_defconfig   |  8 
 arch/sh/configs/rsk7203_defconfig   | 10 --
 arch/sh/configs/rsk7264_defconfig   |  3 ---
 arch/sh/configs/rsk7269_defconfig   |  4 
 arch/sh/configs/rts7751r2d1_defconfig   |  5 -
 arch/sh/configs/rts7751r2dplus_defconfig|  8 
 arch/sh/configs/sdk7780_defconfig   |  9 -
 arch/sh/configs/sdk7786_defconfig   |  9 -
 arch/sh/configs/se7206_defconfig|  8 
 arch/sh/configs/se7343_defconfig|  9 -
 arch/sh/configs/se7619_defconfig|  5 -
 arch/sh/configs/se7705_defconfig|  5 -
 arch/sh/configs/se7712_defconfig|  7 ---
 arch/sh/configs/se7721_defconfig|  6 --
 arch/sh/configs/se7722_defconfig|  3 ---
 arch/sh/configs/se7724_defconfig|  9 -
 arch/sh/configs/se7750_defconfig|  5 -
 arch/sh/configs/se7751_defconfig|  5 -
 arch/sh/configs/se7780_defconfig|  7 ---
 arch/sh/configs/secureedge5410_defconfig|  9 -
 arch/sh/configs/sh03_defconfig  |  4 
 arch/sh/configs/sh2007_defconfig|  8 
 arch/sh/configs/sh7710voipgw_defconfig  |  5 -
 arch/sh/configs/sh7724_generic_defconfig|  3 ---
 arch/sh/configs/sh7757lcr_defconfig |  4 
 arch/sh/configs/sh7763rdp_defconfig |  9 -
 arch/sh/configs/sh7770_generic_defconfig|  3 ---
 arch/sh/configs/sh7785lcr_32bit_defconfig   | 10 --
 arch/sh/configs/sh7785lcr_defconfig |  9 -
 arch/sh/configs/shmin_defconfig |  4 
 arch/sh/configs/shx3_defconfig  |  6 --
 arch/sh/configs/titan_defconfig |  8 
 arch/sh/configs/ul2_defconfig   |  9 -
 arch/sh/configs/urquell_defconfig   |  9 -
 55 files changed, 358 deletions(-)

diff --git 

[RESEND PATCH] score: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - INET_LRO: commit 7bbf3cae65b6 ("ipv4: Remove inet_lro library");
 - MISC_DEVICES: commit 7c5763b8453a ("drivers: misc: Remove
   MISC_DEVICES config option");
 - NETDEV_1000 and NETDEV_1: commit f860b0522f65 ("drivers/net:
   Kconfig and Makefile cleanup"); NET_ETHERNET should be replaced with
   just ETHERNET but that is separate change;
 - HID_SUPPORT: commit 1f41a6a99476 ("HID: Fix the generic Kconfig
   options");
 - AUTOFS_FS: commit 561c5cf9236a ("staging: Remove autofs3");
 - RCU_CPU_STALL_DETECTOR: commit a00e0d714fbd ("rcu: Remove conditional
   compilation for RCU CPU stall warnings");

Signed-off-by: Krzysztof Kozlowski 
---
 arch/score/configs/spct6600_defconfig | 8 
 1 file changed, 8 deletions(-)

diff --git a/arch/score/configs/spct6600_defconfig 
b/arch/score/configs/spct6600_defconfig
index b2d8802f43b4..1c90a7fbfb03 100644
--- a/arch/score/configs/spct6600_defconfig
+++ b/arch/score/configs/spct6600_defconfig
@@ -1,6 +1,5 @@
 CONFIG_HZ_100=y
 CONFIG_PREEMPT_VOLUNTARY=y
-CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
@@ -25,7 +24,6 @@ CONFIG_NET_KEY=y
 CONFIG_INET=y
 CONFIG_IP_MULTICAST=y
 CONFIG_ARPD=y
-# CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
 # CONFIG_STANDALONE is not set
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
@@ -33,10 +31,7 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_CRYPTOLOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=1
-# CONFIG_MISC_DEVICES is not set
 CONFIG_NETDEVICES=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_1 is not set
 # CONFIG_INPUT_MOUSEDEV is not set
 # CONFIG_INPUT_KEYBOARD is not set
 # CONFIG_INPUT_MOUSE is not set
@@ -48,7 +43,6 @@ CONFIG_RAW_DRIVER=y
 CONFIG_MAX_RAW_DEVS=8192
 # CONFIG_HWMON is not set
 # CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
 # CONFIG_USB_SUPPORT is not set
 CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
@@ -56,7 +50,6 @@ CONFIG_EXT2_FS_POSIX_ACL=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_AUTOFS_FS=y
 CONFIG_AUTOFS4_FS=y
 CONFIG_PROC_KCORE=y
 # CONFIG_PROC_PAGE_MONITOR is not set
@@ -69,7 +62,6 @@ CONFIG_NFS_V4=y
 CONFIG_NFSD=y
 CONFIG_NFSD_V3_ACL=y
 CONFIG_NFSD_V4=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SECURITY=y
 CONFIG_SECURITY_NETWORK=y
 CONFIG_CRYPTO_NULL=y
-- 
2.7.4



[RESEND PATCH] sparc: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - INET_LRO: commit 7bbf3cae65b6 ("ipv4: Remove inet_lro library");
 - AUTOFS_FS: commit 561c5cf9236a ("staging: Remove autofs3");
 - RCU_CPU_STALL_DETECTOR: commit a00e0d714fbd ("rcu: Remove conditional
   compilation for RCU CPU stall warnings");
 - USB_DEVICE_CLASS: commit 007bab91324e ("USB: remove
   CONFIG_USB_DEVICE_CLASS");
 - SYSCTL_SYSCALL_CHECK: commit 7c60c48f58a7 ("sysctl: Improve the
   sysctl sanity checks");

Signed-off-by: Krzysztof Kozlowski 
Acked-by: David S. Miller 
---
 arch/sparc/configs/sparc32_defconfig | 4 
 arch/sparc/configs/sparc64_defconfig | 4 
 2 files changed, 8 deletions(-)

diff --git a/arch/sparc/configs/sparc32_defconfig 
b/arch/sparc/configs/sparc32_defconfig
index c74d3701ad68..207a43a2d8b3 100644
--- a/arch/sparc/configs/sparc32_defconfig
+++ b/arch/sparc/configs/sparc32_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -23,7 +22,6 @@ CONFIG_IP_PNP_DHCP=y
 CONFIG_INET_AH=y
 CONFIG_INET_ESP=y
 CONFIG_INET_IPCOMP=y
-# CONFIG_INET_LRO is not set
 CONFIG_INET6_AH=m
 CONFIG_INET6_ESP=m
 CONFIG_INET6_IPCOMP=m
@@ -69,7 +67,6 @@ CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
 CONFIG_EXT2_FS_POSIX_ACL=y
 CONFIG_EXT2_FS_SECURITY=y
-CONFIG_AUTOFS_FS=m
 CONFIG_AUTOFS4_FS=m
 CONFIG_ISO9660_FS=m
 CONFIG_PROC_KCORE=y
@@ -82,7 +79,6 @@ CONFIG_NLS=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_HUNG_TASK=y
 # CONFIG_SCHED_DEBUG is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_KGDB=y
 CONFIG_KGDB_TESTS=y
 CONFIG_CRYPTO_NULL=m
diff --git a/arch/sparc/configs/sparc64_defconfig 
b/arch/sparc/configs/sparc64_defconfig
index b2e650d1764f..ca8609d7292f 100644
--- a/arch/sparc/configs/sparc64_defconfig
+++ b/arch/sparc/configs/sparc64_defconfig
@@ -1,5 +1,4 @@
 CONFIG_64BIT=y
-CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
@@ -184,7 +183,6 @@ CONFIG_HID_TOPSEED=y
 CONFIG_HID_THRUSTMASTER=y
 CONFIG_HID_ZEROPLUS=y
 CONFIG_USB=y
-# CONFIG_USB_DEVICE_CLASS is not set
 CONFIG_USB_EHCI_HCD=m
 # CONFIG_USB_EHCI_TT_NEWSCHED is not set
 CONFIG_USB_OHCI_HCD=y
@@ -210,8 +208,6 @@ CONFIG_LOCKUP_DETECTOR=y
 CONFIG_DETECT_HUNG_TASK=y
 # CONFIG_SCHED_DEBUG is not set
 CONFIG_SCHEDSTATS=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_BLK_DEV_IO_TRACE=y
 CONFIG_UPROBE_EVENTS=y
 CONFIG_KEYS=y
-- 
2.7.4



[RESEND PATCH] sparc: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - INET_LRO: commit 7bbf3cae65b6 ("ipv4: Remove inet_lro library");
 - AUTOFS_FS: commit 561c5cf9236a ("staging: Remove autofs3");
 - RCU_CPU_STALL_DETECTOR: commit a00e0d714fbd ("rcu: Remove conditional
   compilation for RCU CPU stall warnings");
 - USB_DEVICE_CLASS: commit 007bab91324e ("USB: remove
   CONFIG_USB_DEVICE_CLASS");
 - SYSCTL_SYSCALL_CHECK: commit 7c60c48f58a7 ("sysctl: Improve the
   sysctl sanity checks");

Signed-off-by: Krzysztof Kozlowski 
Acked-by: David S. Miller 
---
 arch/sparc/configs/sparc32_defconfig | 4 
 arch/sparc/configs/sparc64_defconfig | 4 
 2 files changed, 8 deletions(-)

diff --git a/arch/sparc/configs/sparc32_defconfig 
b/arch/sparc/configs/sparc32_defconfig
index c74d3701ad68..207a43a2d8b3 100644
--- a/arch/sparc/configs/sparc32_defconfig
+++ b/arch/sparc/configs/sparc32_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -23,7 +22,6 @@ CONFIG_IP_PNP_DHCP=y
 CONFIG_INET_AH=y
 CONFIG_INET_ESP=y
 CONFIG_INET_IPCOMP=y
-# CONFIG_INET_LRO is not set
 CONFIG_INET6_AH=m
 CONFIG_INET6_ESP=m
 CONFIG_INET6_IPCOMP=m
@@ -69,7 +67,6 @@ CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
 CONFIG_EXT2_FS_POSIX_ACL=y
 CONFIG_EXT2_FS_SECURITY=y
-CONFIG_AUTOFS_FS=m
 CONFIG_AUTOFS4_FS=m
 CONFIG_ISO9660_FS=m
 CONFIG_PROC_KCORE=y
@@ -82,7 +79,6 @@ CONFIG_NLS=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_HUNG_TASK=y
 # CONFIG_SCHED_DEBUG is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_KGDB=y
 CONFIG_KGDB_TESTS=y
 CONFIG_CRYPTO_NULL=m
diff --git a/arch/sparc/configs/sparc64_defconfig 
b/arch/sparc/configs/sparc64_defconfig
index b2e650d1764f..ca8609d7292f 100644
--- a/arch/sparc/configs/sparc64_defconfig
+++ b/arch/sparc/configs/sparc64_defconfig
@@ -1,5 +1,4 @@
 CONFIG_64BIT=y
-CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
@@ -184,7 +183,6 @@ CONFIG_HID_TOPSEED=y
 CONFIG_HID_THRUSTMASTER=y
 CONFIG_HID_ZEROPLUS=y
 CONFIG_USB=y
-# CONFIG_USB_DEVICE_CLASS is not set
 CONFIG_USB_EHCI_HCD=m
 # CONFIG_USB_EHCI_TT_NEWSCHED is not set
 CONFIG_USB_OHCI_HCD=y
@@ -210,8 +208,6 @@ CONFIG_LOCKUP_DETECTOR=y
 CONFIG_DETECT_HUNG_TASK=y
 # CONFIG_SCHED_DEBUG is not set
 CONFIG_SCHEDSTATS=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_BLK_DEV_IO_TRACE=y
 CONFIG_UPROBE_EVENTS=y
 CONFIG_KEYS=y
-- 
2.7.4



[RESEND PATCH] powerpc: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig option USB_LED. It is gone since
commit a335aaf3125c ("usb: misc: remove outdated USB LED driver").

Signed-off-by: Krzysztof Kozlowski 
---
 arch/powerpc/configs/c2k_defconfig| 1 -
 arch/powerpc/configs/ppc6xx_defconfig | 1 -
 2 files changed, 2 deletions(-)

diff --git a/arch/powerpc/configs/c2k_defconfig 
b/arch/powerpc/configs/c2k_defconfig
index 7c9d95370150..10f5ffd08956 100644
--- a/arch/powerpc/configs/c2k_defconfig
+++ b/arch/powerpc/configs/c2k_defconfig
@@ -298,7 +298,6 @@ CONFIG_USB_EMI62=m
 CONFIG_USB_RIO500=m
 CONFIG_USB_LEGOTOWER=m
 CONFIG_USB_LCD=m
-CONFIG_USB_LED=m
 CONFIG_USB_TEST=m
 CONFIG_USB_ATM=m
 CONFIG_USB_SPEEDTOUCH=m
diff --git a/arch/powerpc/configs/ppc6xx_defconfig 
b/arch/powerpc/configs/ppc6xx_defconfig
index 18d0d60dadbf..f170744738cf 100644
--- a/arch/powerpc/configs/ppc6xx_defconfig
+++ b/arch/powerpc/configs/ppc6xx_defconfig
@@ -967,7 +967,6 @@ CONFIG_USB_ADUTUX=m
 CONFIG_USB_SEVSEG=m
 CONFIG_USB_LEGOTOWER=m
 CONFIG_USB_LCD=m
-CONFIG_USB_LED=m
 CONFIG_USB_IDMOUSE=m
 CONFIG_USB_FTDI_ELAN=m
 CONFIG_USB_APPLEDISPLAY=m
-- 
2.7.4



[RESEND PATCH] powerpc: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig option USB_LED. It is gone since
commit a335aaf3125c ("usb: misc: remove outdated USB LED driver").

Signed-off-by: Krzysztof Kozlowski 
---
 arch/powerpc/configs/c2k_defconfig| 1 -
 arch/powerpc/configs/ppc6xx_defconfig | 1 -
 2 files changed, 2 deletions(-)

diff --git a/arch/powerpc/configs/c2k_defconfig 
b/arch/powerpc/configs/c2k_defconfig
index 7c9d95370150..10f5ffd08956 100644
--- a/arch/powerpc/configs/c2k_defconfig
+++ b/arch/powerpc/configs/c2k_defconfig
@@ -298,7 +298,6 @@ CONFIG_USB_EMI62=m
 CONFIG_USB_RIO500=m
 CONFIG_USB_LEGOTOWER=m
 CONFIG_USB_LCD=m
-CONFIG_USB_LED=m
 CONFIG_USB_TEST=m
 CONFIG_USB_ATM=m
 CONFIG_USB_SPEEDTOUCH=m
diff --git a/arch/powerpc/configs/ppc6xx_defconfig 
b/arch/powerpc/configs/ppc6xx_defconfig
index 18d0d60dadbf..f170744738cf 100644
--- a/arch/powerpc/configs/ppc6xx_defconfig
+++ b/arch/powerpc/configs/ppc6xx_defconfig
@@ -967,7 +967,6 @@ CONFIG_USB_ADUTUX=m
 CONFIG_USB_SEVSEG=m
 CONFIG_USB_LEGOTOWER=m
 CONFIG_USB_LCD=m
-CONFIG_USB_LED=m
 CONFIG_USB_IDMOUSE=m
 CONFIG_USB_FTDI_ELAN=m
 CONFIG_USB_APPLEDISPLAY=m
-- 
2.7.4



[RESEND PATCH] parisc: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - INET_LRO: commit 7bbf3cae65b6 ("ipv4: Remove inet_lro library");
 - IP_NF_QUEUE: commit 3dd6664fac7e ("netfilter: remove unused "config
   IP_NF_QUEUE"");
 - VIDEO_OUTPUT_CONTROL: commit f167a64e9d67 ("video / output: Drop
   display output class support");
 - RCU_CPU_STALL_DETECTOR: commit a00e0d714fbd ("rcu: Remove conditional
   compilation for RCU CPU stall warnings");
 - IP_NF_TARGET_ULOG: commit d4da843e6fad ("netfilter: kill remnants of
   ulog targets");
 - IP6_NF_TARGET_LOG: commit 6939c33a757b ("netfilter: merge ipt_LOG and
   ip6_LOG into xt_LOG");
 - AUTOFS_FS: commit 561c5cf9236a ("staging: Remove autofs3");

Signed-off-by: Krzysztof Kozlowski 
---
 arch/parisc/configs/712_defconfig   | 5 -
 arch/parisc/configs/a500_defconfig  | 6 --
 arch/parisc/configs/b180_defconfig  | 3 ---
 arch/parisc/configs/c3000_defconfig | 5 -
 arch/parisc/configs/default_defconfig   | 5 -
 arch/parisc/configs/generic-32bit_defconfig | 2 --
 6 files changed, 26 deletions(-)

diff --git a/arch/parisc/configs/712_defconfig 
b/arch/parisc/configs/712_defconfig
index 143d02652792..493e03c2a219 100644
--- a/arch/parisc/configs/712_defconfig
+++ b/arch/parisc/configs/712_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
@@ -32,11 +31,9 @@ CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 CONFIG_INET_AH=m
 CONFIG_INET_ESP=m
-# CONFIG_INET_LRO is not set
 CONFIG_INET_DIAG=m
 # CONFIG_IPV6 is not set
 CONFIG_NETFILTER=y
-CONFIG_IP_NF_QUEUE=m
 CONFIG_LLC2=m
 CONFIG_NET_PKTGEN=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
@@ -94,7 +91,6 @@ CONFIG_PPDEV=m
 # CONFIG_HW_RANDOM is not set
 CONFIG_RAW_DRIVER=y
 # CONFIG_HWMON is not set
-CONFIG_VIDEO_OUTPUT_CONTROL=m
 CONFIG_FB=y
 CONFIG_FB_MODE_HELPERS=y
 CONFIG_FB_TILEBLITTING=y
@@ -181,7 +177,6 @@ CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DEBUG_MUTEXES=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_CRYPTO_NULL=m
 CONFIG_CRYPTO_TEST=m
 CONFIG_CRYPTO_HMAC=y
diff --git a/arch/parisc/configs/a500_defconfig 
b/arch/parisc/configs/a500_defconfig
index 1a4f776b49b8..8d67e2373920 100644
--- a/arch/parisc/configs/a500_defconfig
+++ b/arch/parisc/configs/a500_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
@@ -43,21 +42,18 @@ CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 CONFIG_INET_AH=m
 CONFIG_INET_ESP=m
-# CONFIG_INET_LRO is not set
 CONFIG_INET6_AH=m
 CONFIG_INET6_ESP=m
 CONFIG_INET6_IPCOMP=m
 CONFIG_IPV6_TUNNEL=m
 CONFIG_NETFILTER=y
 # CONFIG_NETFILTER_XT_MATCH_DCCP is not set
-CONFIG_IP_NF_QUEUE=m
 CONFIG_IP_NF_IPTABLES=m
 CONFIG_IP_NF_MATCH_ECN=m
 CONFIG_IP_NF_MATCH_TTL=m
 CONFIG_IP_NF_FILTER=m
 CONFIG_IP_NF_TARGET_REJECT=m
 CONFIG_IP_NF_TARGET_LOG=m
-CONFIG_IP_NF_TARGET_ULOG=m
 CONFIG_IP_NF_MANGLE=m
 CONFIG_IP_NF_TARGET_ECN=m
 CONFIG_IP_NF_RAW=m
@@ -70,7 +66,6 @@ CONFIG_IP6_NF_MATCH_OPTS=m
 CONFIG_IP6_NF_MATCH_HL=m
 CONFIG_IP6_NF_MATCH_IPV6HEADER=m
 CONFIG_IP6_NF_MATCH_RT=m
-CONFIG_IP6_NF_TARGET_LOG=m
 CONFIG_IP6_NF_FILTER=m
 CONFIG_IP6_NF_TARGET_REJECT=m
 CONFIG_IP6_NF_MANGLE=m
@@ -192,7 +187,6 @@ CONFIG_DEBUG_FS=y
 CONFIG_HEADERS_CHECK=y
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_CRYPTO_NULL=m
 CONFIG_CRYPTO_TEST=m
 CONFIG_CRYPTO_HMAC=y
diff --git a/arch/parisc/configs/b180_defconfig 
b/arch/parisc/configs/b180_defconfig
index f1a0c25bef8d..0eca8208591c 100644
--- a/arch/parisc/configs/b180_defconfig
+++ b/arch/parisc/configs/b180_defconfig
@@ -25,7 +25,6 @@ CONFIG_INET=y
 CONFIG_IP_MULTICAST=y
 CONFIG_IP_PNP=y
 CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_LRO is not set
 CONFIG_IPV6=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_DEVTMPFS=y
@@ -71,7 +70,6 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
 CONFIG_PRINTER=y
 # CONFIG_HW_RANDOM is not set
 # CONFIG_HWMON is not set
-CONFIG_VIDEO_OUTPUT_CONTROL=m
 CONFIG_FB=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_LOGO=y
@@ -105,6 +103,5 @@ CONFIG_NLS_UTF8=m
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_HEADERS_CHECK=y
 CONFIG_DEBUG_KERNEL=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SECURITY=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/parisc/configs/c3000_defconfig 
b/arch/parisc/configs/c3000_defconfig
index 8e8f0e34f817..8337f5adf414 100644
--- a/arch/parisc/configs/c3000_defconfig
+++ b/arch/parisc/configs/c3000_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
@@ -31,13 +30,11 @@ CONFIG_INET=y
 CONFIG_IP_MULTICAST=y
 CONFIG_IP_PNP=y
 CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
 CONFIG_INET6_IPCOMP=m
 CONFIG_IPV6_TUNNEL=m
 CONFIG_NETFILTER=y
 CONFIG_NETFILTER_DEBUG=y
-CONFIG_IP_NF_QUEUE=m
 

[RESEND PATCH] parisc: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - INET_LRO: commit 7bbf3cae65b6 ("ipv4: Remove inet_lro library");
 - IP_NF_QUEUE: commit 3dd6664fac7e ("netfilter: remove unused "config
   IP_NF_QUEUE"");
 - VIDEO_OUTPUT_CONTROL: commit f167a64e9d67 ("video / output: Drop
   display output class support");
 - RCU_CPU_STALL_DETECTOR: commit a00e0d714fbd ("rcu: Remove conditional
   compilation for RCU CPU stall warnings");
 - IP_NF_TARGET_ULOG: commit d4da843e6fad ("netfilter: kill remnants of
   ulog targets");
 - IP6_NF_TARGET_LOG: commit 6939c33a757b ("netfilter: merge ipt_LOG and
   ip6_LOG into xt_LOG");
 - AUTOFS_FS: commit 561c5cf9236a ("staging: Remove autofs3");

Signed-off-by: Krzysztof Kozlowski 
---
 arch/parisc/configs/712_defconfig   | 5 -
 arch/parisc/configs/a500_defconfig  | 6 --
 arch/parisc/configs/b180_defconfig  | 3 ---
 arch/parisc/configs/c3000_defconfig | 5 -
 arch/parisc/configs/default_defconfig   | 5 -
 arch/parisc/configs/generic-32bit_defconfig | 2 --
 6 files changed, 26 deletions(-)

diff --git a/arch/parisc/configs/712_defconfig 
b/arch/parisc/configs/712_defconfig
index 143d02652792..493e03c2a219 100644
--- a/arch/parisc/configs/712_defconfig
+++ b/arch/parisc/configs/712_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
@@ -32,11 +31,9 @@ CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 CONFIG_INET_AH=m
 CONFIG_INET_ESP=m
-# CONFIG_INET_LRO is not set
 CONFIG_INET_DIAG=m
 # CONFIG_IPV6 is not set
 CONFIG_NETFILTER=y
-CONFIG_IP_NF_QUEUE=m
 CONFIG_LLC2=m
 CONFIG_NET_PKTGEN=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
@@ -94,7 +91,6 @@ CONFIG_PPDEV=m
 # CONFIG_HW_RANDOM is not set
 CONFIG_RAW_DRIVER=y
 # CONFIG_HWMON is not set
-CONFIG_VIDEO_OUTPUT_CONTROL=m
 CONFIG_FB=y
 CONFIG_FB_MODE_HELPERS=y
 CONFIG_FB_TILEBLITTING=y
@@ -181,7 +177,6 @@ CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DEBUG_MUTEXES=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_CRYPTO_NULL=m
 CONFIG_CRYPTO_TEST=m
 CONFIG_CRYPTO_HMAC=y
diff --git a/arch/parisc/configs/a500_defconfig 
b/arch/parisc/configs/a500_defconfig
index 1a4f776b49b8..8d67e2373920 100644
--- a/arch/parisc/configs/a500_defconfig
+++ b/arch/parisc/configs/a500_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
@@ -43,21 +42,18 @@ CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 CONFIG_INET_AH=m
 CONFIG_INET_ESP=m
-# CONFIG_INET_LRO is not set
 CONFIG_INET6_AH=m
 CONFIG_INET6_ESP=m
 CONFIG_INET6_IPCOMP=m
 CONFIG_IPV6_TUNNEL=m
 CONFIG_NETFILTER=y
 # CONFIG_NETFILTER_XT_MATCH_DCCP is not set
-CONFIG_IP_NF_QUEUE=m
 CONFIG_IP_NF_IPTABLES=m
 CONFIG_IP_NF_MATCH_ECN=m
 CONFIG_IP_NF_MATCH_TTL=m
 CONFIG_IP_NF_FILTER=m
 CONFIG_IP_NF_TARGET_REJECT=m
 CONFIG_IP_NF_TARGET_LOG=m
-CONFIG_IP_NF_TARGET_ULOG=m
 CONFIG_IP_NF_MANGLE=m
 CONFIG_IP_NF_TARGET_ECN=m
 CONFIG_IP_NF_RAW=m
@@ -70,7 +66,6 @@ CONFIG_IP6_NF_MATCH_OPTS=m
 CONFIG_IP6_NF_MATCH_HL=m
 CONFIG_IP6_NF_MATCH_IPV6HEADER=m
 CONFIG_IP6_NF_MATCH_RT=m
-CONFIG_IP6_NF_TARGET_LOG=m
 CONFIG_IP6_NF_FILTER=m
 CONFIG_IP6_NF_TARGET_REJECT=m
 CONFIG_IP6_NF_MANGLE=m
@@ -192,7 +187,6 @@ CONFIG_DEBUG_FS=y
 CONFIG_HEADERS_CHECK=y
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_CRYPTO_NULL=m
 CONFIG_CRYPTO_TEST=m
 CONFIG_CRYPTO_HMAC=y
diff --git a/arch/parisc/configs/b180_defconfig 
b/arch/parisc/configs/b180_defconfig
index f1a0c25bef8d..0eca8208591c 100644
--- a/arch/parisc/configs/b180_defconfig
+++ b/arch/parisc/configs/b180_defconfig
@@ -25,7 +25,6 @@ CONFIG_INET=y
 CONFIG_IP_MULTICAST=y
 CONFIG_IP_PNP=y
 CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_LRO is not set
 CONFIG_IPV6=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_DEVTMPFS=y
@@ -71,7 +70,6 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
 CONFIG_PRINTER=y
 # CONFIG_HW_RANDOM is not set
 # CONFIG_HWMON is not set
-CONFIG_VIDEO_OUTPUT_CONTROL=m
 CONFIG_FB=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_LOGO=y
@@ -105,6 +103,5 @@ CONFIG_NLS_UTF8=m
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_HEADERS_CHECK=y
 CONFIG_DEBUG_KERNEL=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SECURITY=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/parisc/configs/c3000_defconfig 
b/arch/parisc/configs/c3000_defconfig
index 8e8f0e34f817..8337f5adf414 100644
--- a/arch/parisc/configs/c3000_defconfig
+++ b/arch/parisc/configs/c3000_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
@@ -31,13 +30,11 @@ CONFIG_INET=y
 CONFIG_IP_MULTICAST=y
 CONFIG_IP_PNP=y
 CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
 CONFIG_INET6_IPCOMP=m
 CONFIG_IPV6_TUNNEL=m
 CONFIG_NETFILTER=y
 CONFIG_NETFILTER_DEBUG=y
-CONFIG_IP_NF_QUEUE=m
 CONFIG_NET_PKTGEN=m
 

[RESEND PATCH] mn10300: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - INET_LRO: commit 7bbf3cae65b6 ("ipv4: Remove inet_lro library");
 - MTD_PARTITIONS: commit 6a8a98b22b10 ("mtd: kill
   CONFIG_MTD_PARTITIONS");
 - MTD_CHAR: commit 660685d9d1b4 ("mtd: merge mtdchar module with
   mtdcore");
 - NETDEV_1000 and NETDEV_1: commit f860b0522f65 ("drivers/net:
   Kconfig and Makefile cleanup"); NET_ETHERNET should be replaced with
   just ETHERNET but that is separate change;
 - HID_SUPPORT: commit 1f41a6a99476 ("HID: Fix the generic Kconfig
   options");
 - RCU_CPU_STALL_DETECTOR: commit a00e0d714fbd ("rcu: Remove conditional
   compilation for RCU CPU stall warnings");

Signed-off-by: Krzysztof Kozlowski 
---
 arch/mn10300/configs/asb2303_defconfig | 6 --
 arch/mn10300/configs/asb2364_defconfig | 8 
 2 files changed, 14 deletions(-)

diff --git a/arch/mn10300/configs/asb2303_defconfig 
b/arch/mn10300/configs/asb2303_defconfig
index 1fd41ec1dfb5..d06dae131139 100644
--- a/arch/mn10300/configs/asb2303_defconfig
+++ b/arch/mn10300/configs/asb2303_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_TINY_RCU=y
@@ -28,16 +27,13 @@ CONFIG_IP_PNP_BOOTP=y
 # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
 # CONFIG_INET_XFRM_MODE_TUNNEL is not set
 # CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
 # CONFIG_IPV6 is not set
 # CONFIG_WIRELESS is not set
 CONFIG_MTD=y
 CONFIG_MTD_DEBUG=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_REDBOOT_PARTS=y
 CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
-CONFIG_MTD_CHAR=y
 CONFIG_MTD_CFI=y
 CONFIG_MTD_JEDECPROBE=y
 CONFIG_MTD_CFI_ADV_OPTIONS=y
@@ -48,8 +44,6 @@ CONFIG_MTD_PHYSMAP=y
 CONFIG_NETDEVICES=y
 CONFIG_NET_ETHERNET=y
 CONFIG_SMC91X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_1 is not set
 # CONFIG_WLAN is not set
 # CONFIG_INPUT is not set
 # CONFIG_SERIO is not set
diff --git a/arch/mn10300/configs/asb2364_defconfig 
b/arch/mn10300/configs/asb2364_defconfig
index cd0a6cb17dee..b1d80cee97ee 100644
--- a/arch/mn10300/configs/asb2364_defconfig
+++ b/arch/mn10300/configs/asb2364_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_BSD_PROCESS_ACCT=y
@@ -40,7 +39,6 @@ CONFIG_IP_PNP_BOOTP=y
 # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
 # CONFIG_INET_XFRM_MODE_TUNNEL is not set
 # CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
 CONFIG_IPV6=y
 # CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
@@ -50,10 +48,8 @@ CONFIG_IPV6=y
 CONFIG_CONNECTOR=y
 CONFIG_MTD=y
 CONFIG_MTD_DEBUG=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_REDBOOT_PARTS=y
 CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
-CONFIG_MTD_CHAR=y
 CONFIG_MTD_CFI=y
 CONFIG_MTD_JEDECPROBE=y
 CONFIG_MTD_CFI_ADV_OPTIONS=y
@@ -64,8 +60,6 @@ CONFIG_MTD_PHYSMAP=y
 CONFIG_NETDEVICES=y
 CONFIG_NET_ETHERNET=y
 CONFIG_SMSC911X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_1 is not set
 # CONFIG_INPUT_MOUSEDEV is not set
 # CONFIG_INPUT_KEYBOARD is not set
 # CONFIG_INPUT_MOUSE is not set
@@ -77,7 +71,6 @@ CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_SHARE_IRQ=y
 # CONFIG_HW_RANDOM is not set
 # CONFIG_HWMON is not set
-# CONFIG_HID_SUPPORT is not set
 # CONFIG_USB_SUPPORT is not set
 CONFIG_PROC_KCORE=y
 # CONFIG_PROC_PAGE_MONITOR is not set
@@ -93,4 +86,3 @@ CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_HUNG_TASK=y
 # CONFIG_DEBUG_BUGVERBOSE is not set
 CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-- 
2.7.4



[RESEND PATCH] mn10300: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - INET_LRO: commit 7bbf3cae65b6 ("ipv4: Remove inet_lro library");
 - MTD_PARTITIONS: commit 6a8a98b22b10 ("mtd: kill
   CONFIG_MTD_PARTITIONS");
 - MTD_CHAR: commit 660685d9d1b4 ("mtd: merge mtdchar module with
   mtdcore");
 - NETDEV_1000 and NETDEV_1: commit f860b0522f65 ("drivers/net:
   Kconfig and Makefile cleanup"); NET_ETHERNET should be replaced with
   just ETHERNET but that is separate change;
 - HID_SUPPORT: commit 1f41a6a99476 ("HID: Fix the generic Kconfig
   options");
 - RCU_CPU_STALL_DETECTOR: commit a00e0d714fbd ("rcu: Remove conditional
   compilation for RCU CPU stall warnings");

Signed-off-by: Krzysztof Kozlowski 
---
 arch/mn10300/configs/asb2303_defconfig | 6 --
 arch/mn10300/configs/asb2364_defconfig | 8 
 2 files changed, 14 deletions(-)

diff --git a/arch/mn10300/configs/asb2303_defconfig 
b/arch/mn10300/configs/asb2303_defconfig
index 1fd41ec1dfb5..d06dae131139 100644
--- a/arch/mn10300/configs/asb2303_defconfig
+++ b/arch/mn10300/configs/asb2303_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_TINY_RCU=y
@@ -28,16 +27,13 @@ CONFIG_IP_PNP_BOOTP=y
 # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
 # CONFIG_INET_XFRM_MODE_TUNNEL is not set
 # CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
 # CONFIG_IPV6 is not set
 # CONFIG_WIRELESS is not set
 CONFIG_MTD=y
 CONFIG_MTD_DEBUG=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_REDBOOT_PARTS=y
 CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
-CONFIG_MTD_CHAR=y
 CONFIG_MTD_CFI=y
 CONFIG_MTD_JEDECPROBE=y
 CONFIG_MTD_CFI_ADV_OPTIONS=y
@@ -48,8 +44,6 @@ CONFIG_MTD_PHYSMAP=y
 CONFIG_NETDEVICES=y
 CONFIG_NET_ETHERNET=y
 CONFIG_SMC91X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_1 is not set
 # CONFIG_WLAN is not set
 # CONFIG_INPUT is not set
 # CONFIG_SERIO is not set
diff --git a/arch/mn10300/configs/asb2364_defconfig 
b/arch/mn10300/configs/asb2364_defconfig
index cd0a6cb17dee..b1d80cee97ee 100644
--- a/arch/mn10300/configs/asb2364_defconfig
+++ b/arch/mn10300/configs/asb2364_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_BSD_PROCESS_ACCT=y
@@ -40,7 +39,6 @@ CONFIG_IP_PNP_BOOTP=y
 # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
 # CONFIG_INET_XFRM_MODE_TUNNEL is not set
 # CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
 CONFIG_IPV6=y
 # CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
@@ -50,10 +48,8 @@ CONFIG_IPV6=y
 CONFIG_CONNECTOR=y
 CONFIG_MTD=y
 CONFIG_MTD_DEBUG=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_REDBOOT_PARTS=y
 CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
-CONFIG_MTD_CHAR=y
 CONFIG_MTD_CFI=y
 CONFIG_MTD_JEDECPROBE=y
 CONFIG_MTD_CFI_ADV_OPTIONS=y
@@ -64,8 +60,6 @@ CONFIG_MTD_PHYSMAP=y
 CONFIG_NETDEVICES=y
 CONFIG_NET_ETHERNET=y
 CONFIG_SMSC911X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_1 is not set
 # CONFIG_INPUT_MOUSEDEV is not set
 # CONFIG_INPUT_KEYBOARD is not set
 # CONFIG_INPUT_MOUSE is not set
@@ -77,7 +71,6 @@ CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_SHARE_IRQ=y
 # CONFIG_HW_RANDOM is not set
 # CONFIG_HWMON is not set
-# CONFIG_HID_SUPPORT is not set
 # CONFIG_USB_SUPPORT is not set
 CONFIG_PROC_KCORE=y
 # CONFIG_PROC_PAGE_MONITOR is not set
@@ -93,4 +86,3 @@ CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_HUNG_TASK=y
 # CONFIG_DEBUG_BUGVERBOSE is not set
 CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-- 
2.7.4



[RESEND PATCH] nios2: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig option INET_LRO. It is gone since
commit 7bbf3cae65b6 ("ipv4: Remove inet_lro library").

Signed-off-by: Krzysztof Kozlowski 
---
 arch/nios2/configs/10m50_defconfig | 1 -
 arch/nios2/configs/3c120_defconfig | 1 -
 2 files changed, 2 deletions(-)

diff --git a/arch/nios2/configs/10m50_defconfig 
b/arch/nios2/configs/10m50_defconfig
index 8b2a30b3b34f..c601c8ff1ae6 100644
--- a/arch/nios2/configs/10m50_defconfig
+++ b/arch/nios2/configs/10m50_defconfig
@@ -33,7 +33,6 @@ CONFIG_IP_PNP_RARP=y
 # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
 # CONFIG_INET_XFRM_MODE_TUNNEL is not set
 # CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
 # CONFIG_WIRELESS is not set
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
diff --git a/arch/nios2/configs/3c120_defconfig 
b/arch/nios2/configs/3c120_defconfig
index 9451940678a0..fce33588d55c 100644
--- a/arch/nios2/configs/3c120_defconfig
+++ b/arch/nios2/configs/3c120_defconfig
@@ -35,7 +35,6 @@ CONFIG_IP_PNP_RARP=y
 # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
 # CONFIG_INET_XFRM_MODE_TUNNEL is not set
 # CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
 # CONFIG_WIRELESS is not set
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-- 
2.7.4



[RESEND PATCH] nios2: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig option INET_LRO. It is gone since
commit 7bbf3cae65b6 ("ipv4: Remove inet_lro library").

Signed-off-by: Krzysztof Kozlowski 
---
 arch/nios2/configs/10m50_defconfig | 1 -
 arch/nios2/configs/3c120_defconfig | 1 -
 2 files changed, 2 deletions(-)

diff --git a/arch/nios2/configs/10m50_defconfig 
b/arch/nios2/configs/10m50_defconfig
index 8b2a30b3b34f..c601c8ff1ae6 100644
--- a/arch/nios2/configs/10m50_defconfig
+++ b/arch/nios2/configs/10m50_defconfig
@@ -33,7 +33,6 @@ CONFIG_IP_PNP_RARP=y
 # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
 # CONFIG_INET_XFRM_MODE_TUNNEL is not set
 # CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
 # CONFIG_WIRELESS is not set
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
diff --git a/arch/nios2/configs/3c120_defconfig 
b/arch/nios2/configs/3c120_defconfig
index 9451940678a0..fce33588d55c 100644
--- a/arch/nios2/configs/3c120_defconfig
+++ b/arch/nios2/configs/3c120_defconfig
@@ -35,7 +35,6 @@ CONFIG_IP_PNP_RARP=y
 # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
 # CONFIG_INET_XFRM_MODE_TUNNEL is not set
 # CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
 # CONFIG_WIRELESS is not set
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-- 
2.7.4



[RESEND PATCH] cris: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - INET_LRO: commit 7bbf3cae65b6 ("ipv4: Remove inet_lro library");

Signed-off-by: Krzysztof Kozlowski 
---
 arch/cris/configs/artpec_3_defconfig   | 2 --
 arch/cris/configs/dev88_defconfig  | 1 -
 arch/cris/configs/etrax-100lx_defconfig| 1 -
 arch/cris/configs/etrax-100lx_v2_defconfig | 2 --
 arch/cris/configs/etraxfs_defconfig| 2 --
 5 files changed, 8 deletions(-)

diff --git a/arch/cris/configs/artpec_3_defconfig 
b/arch/cris/configs/artpec_3_defconfig
index d31851f29db8..c4645e3c11cd 100644
--- a/arch/cris/configs/artpec_3_defconfig
+++ b/arch/cris/configs/artpec_3_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 # CONFIG_SWAP is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -16,7 +15,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
-# CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
 CONFIG_NETFILTER=y
 CONFIG_ETRAX_ETHERNET=y
diff --git a/arch/cris/configs/dev88_defconfig 
b/arch/cris/configs/dev88_defconfig
index beff4ee6edb3..79b9a330357d 100644
--- a/arch/cris/configs/dev88_defconfig
+++ b/arch/cris/configs/dev88_defconfig
@@ -19,7 +19,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
-# CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
 CONFIG_NETFILTER=y
 CONFIG_ETRAX_ETHERNET=y
diff --git a/arch/cris/configs/etrax-100lx_defconfig 
b/arch/cris/configs/etrax-100lx_defconfig
index cbbcefeaa8fc..32592c6ef62f 100644
--- a/arch/cris/configs/etrax-100lx_defconfig
+++ b/arch/cris/configs/etrax-100lx_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_ETRAX_LED1R=2
 CONFIG_ETRAX_LED2G=2
diff --git a/arch/cris/configs/etrax-100lx_v2_defconfig 
b/arch/cris/configs/etrax-100lx_v2_defconfig
index d90ac95c1e44..a411042487dc 100644
--- a/arch/cris/configs/etrax-100lx_v2_defconfig
+++ b/arch/cris/configs/etrax-100lx_v2_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 # CONFIG_SWAP is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -17,7 +16,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
-# CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
 CONFIG_NETFILTER=y
 CONFIG_ETRAX_ETHERNET=y
diff --git a/arch/cris/configs/etraxfs_defconfig 
b/arch/cris/configs/etraxfs_defconfig
index f714e9dfef9b..fa4b093657c3 100644
--- a/arch/cris/configs/etraxfs_defconfig
+++ b/arch/cris/configs/etraxfs_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 # CONFIG_SWAP is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -16,7 +15,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
-# CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
 CONFIG_NETFILTER=y
 CONFIG_ETRAX_ETHERNET=y
-- 
2.7.4



[RESEND PATCH] hexagon: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - NETDEV_1000 and NETDEV_1: commit f860b0522f65 ("drivers/net:
   Kconfig and Makefile cleanup"); NET_ETHERNET should be replaced with
   just ETHERNET but that is separate change;
 - HID_SUPPORT: commit 1f41a6a99476 ("HID: Fix the generic Kconfig
   options");
 - INET_LRO: commit 7bbf3cae65b6 ("ipv4: Remove inet_lro library");

Signed-off-by: Krzysztof Kozlowski 
Acked-by: Richard Kuo 
---
 arch/hexagon/configs/comet_defconfig | 5 -
 1 file changed, 5 deletions(-)

diff --git a/arch/hexagon/configs/comet_defconfig 
b/arch/hexagon/configs/comet_defconfig
index e324f65f41e7..0db9c1384b32 100644
--- a/arch/hexagon/configs/comet_defconfig
+++ b/arch/hexagon/configs/comet_defconfig
@@ -1,7 +1,6 @@
 CONFIG_SMP=y
 CONFIG_DEFAULT_MMAP_MIN_ADDR=0
 CONFIG_HZ_100=y
-CONFIG_EXPERIMENTAL=y
 CONFIG_CROSS_COMPILE="hexagon-"
 CONFIG_LOCALVERSION="-smp"
 # CONFIG_LOCALVERSION_AUTO is not set
@@ -27,8 +26,6 @@ CONFIG_NETDEVICES=y
 CONFIG_MII=y
 CONFIG_PHYLIB=y
 CONFIG_NET_ETHERNET=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_1 is not set
 # CONFIG_INPUT_MOUSEDEV is not set
 # CONFIG_INPUT_KEYBOARD is not set
 # CONFIG_INPUT_MOUSE is not set
@@ -42,7 +39,6 @@ CONFIG_SPI_DEBUG=y
 CONFIG_SPI_BITBANG=y
 # CONFIG_HWMON is not set
 # CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
 # CONFIG_USB_SUPPORT is not set
 CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
@@ -68,7 +64,6 @@ CONFIG_INET=y
 # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
 # CONFIG_INET_XFRM_MODE_TUNNEL is not set
 # CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
 # CONFIG_IPV6 is not set
 CONFIG_CRYPTO_MD5=y
-- 
2.7.4



[RESEND PATCH] cris: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - INET_LRO: commit 7bbf3cae65b6 ("ipv4: Remove inet_lro library");

Signed-off-by: Krzysztof Kozlowski 
---
 arch/cris/configs/artpec_3_defconfig   | 2 --
 arch/cris/configs/dev88_defconfig  | 1 -
 arch/cris/configs/etrax-100lx_defconfig| 1 -
 arch/cris/configs/etrax-100lx_v2_defconfig | 2 --
 arch/cris/configs/etraxfs_defconfig| 2 --
 5 files changed, 8 deletions(-)

diff --git a/arch/cris/configs/artpec_3_defconfig 
b/arch/cris/configs/artpec_3_defconfig
index d31851f29db8..c4645e3c11cd 100644
--- a/arch/cris/configs/artpec_3_defconfig
+++ b/arch/cris/configs/artpec_3_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 # CONFIG_SWAP is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -16,7 +15,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
-# CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
 CONFIG_NETFILTER=y
 CONFIG_ETRAX_ETHERNET=y
diff --git a/arch/cris/configs/dev88_defconfig 
b/arch/cris/configs/dev88_defconfig
index beff4ee6edb3..79b9a330357d 100644
--- a/arch/cris/configs/dev88_defconfig
+++ b/arch/cris/configs/dev88_defconfig
@@ -19,7 +19,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
-# CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
 CONFIG_NETFILTER=y
 CONFIG_ETRAX_ETHERNET=y
diff --git a/arch/cris/configs/etrax-100lx_defconfig 
b/arch/cris/configs/etrax-100lx_defconfig
index cbbcefeaa8fc..32592c6ef62f 100644
--- a/arch/cris/configs/etrax-100lx_defconfig
+++ b/arch/cris/configs/etrax-100lx_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_ETRAX_LED1R=2
 CONFIG_ETRAX_LED2G=2
diff --git a/arch/cris/configs/etrax-100lx_v2_defconfig 
b/arch/cris/configs/etrax-100lx_v2_defconfig
index d90ac95c1e44..a411042487dc 100644
--- a/arch/cris/configs/etrax-100lx_v2_defconfig
+++ b/arch/cris/configs/etrax-100lx_v2_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 # CONFIG_SWAP is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -17,7 +16,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
-# CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
 CONFIG_NETFILTER=y
 CONFIG_ETRAX_ETHERNET=y
diff --git a/arch/cris/configs/etraxfs_defconfig 
b/arch/cris/configs/etraxfs_defconfig
index f714e9dfef9b..fa4b093657c3 100644
--- a/arch/cris/configs/etraxfs_defconfig
+++ b/arch/cris/configs/etraxfs_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 # CONFIG_SWAP is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -16,7 +15,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
-# CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
 CONFIG_NETFILTER=y
 CONFIG_ETRAX_ETHERNET=y
-- 
2.7.4



[RESEND PATCH] hexagon: defconfig: Cleanup from old Kconfig options

2017-07-19 Thread Krzysztof Kozlowski
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - NETDEV_1000 and NETDEV_1: commit f860b0522f65 ("drivers/net:
   Kconfig and Makefile cleanup"); NET_ETHERNET should be replaced with
   just ETHERNET but that is separate change;
 - HID_SUPPORT: commit 1f41a6a99476 ("HID: Fix the generic Kconfig
   options");
 - INET_LRO: commit 7bbf3cae65b6 ("ipv4: Remove inet_lro library");

Signed-off-by: Krzysztof Kozlowski 
Acked-by: Richard Kuo 
---
 arch/hexagon/configs/comet_defconfig | 5 -
 1 file changed, 5 deletions(-)

diff --git a/arch/hexagon/configs/comet_defconfig 
b/arch/hexagon/configs/comet_defconfig
index e324f65f41e7..0db9c1384b32 100644
--- a/arch/hexagon/configs/comet_defconfig
+++ b/arch/hexagon/configs/comet_defconfig
@@ -1,7 +1,6 @@
 CONFIG_SMP=y
 CONFIG_DEFAULT_MMAP_MIN_ADDR=0
 CONFIG_HZ_100=y
-CONFIG_EXPERIMENTAL=y
 CONFIG_CROSS_COMPILE="hexagon-"
 CONFIG_LOCALVERSION="-smp"
 # CONFIG_LOCALVERSION_AUTO is not set
@@ -27,8 +26,6 @@ CONFIG_NETDEVICES=y
 CONFIG_MII=y
 CONFIG_PHYLIB=y
 CONFIG_NET_ETHERNET=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_1 is not set
 # CONFIG_INPUT_MOUSEDEV is not set
 # CONFIG_INPUT_KEYBOARD is not set
 # CONFIG_INPUT_MOUSE is not set
@@ -42,7 +39,6 @@ CONFIG_SPI_DEBUG=y
 CONFIG_SPI_BITBANG=y
 # CONFIG_HWMON is not set
 # CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
 # CONFIG_USB_SUPPORT is not set
 CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
@@ -68,7 +64,6 @@ CONFIG_INET=y
 # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
 # CONFIG_INET_XFRM_MODE_TUNNEL is not set
 # CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
 # CONFIG_IPV6 is not set
 CONFIG_CRYPTO_MD5=y
-- 
2.7.4



  1   2   3   4   5   6   7   8   9   10   >