Re: Moving unmaintained filesystems to staging

[Luis R. Rodriguez]

On Wed, Apr 25, 2018 at 11:11 PM, Pavel Machek  wrote:
> On Wed 2018-04-25 08:46:02, Matthew Wilcox wrote:
>> Recently ncpfs got moved to staging.  Also recently, we had some fuzzer
>> developers report bugs in hfs, which they deem a security hole because
>> Ubuntu attempts to automount an inserted USB device as hfs.
>
> We promise "no-regressions" for code in main repository, no such
> promise for staging. We have quite a lot of code without maintainer.
>
> Moving code to staging means it will get broken -- staging was not
> designed for this. I believe moving anything there is bad idea.
>
> Staging is for ugly code, not for code that needs new maintainter.

Staging is also a hospice for drivers on their way out. Can some of
these be eventually be axed?

  Luis

Re: Moving unmaintained filesystems to staging

[Luis R. Rodriguez]

On Wed, Apr 25, 2018 at 11:11 PM, Pavel Machek  wrote:
> On Wed 2018-04-25 08:46:02, Matthew Wilcox wrote:
>> Recently ncpfs got moved to staging.  Also recently, we had some fuzzer
>> developers report bugs in hfs, which they deem a security hole because
>> Ubuntu attempts to automount an inserted USB device as hfs.
>
> We promise "no-regressions" for code in main repository, no such
> promise for staging. We have quite a lot of code without maintainer.
>
> Moving code to staging means it will get broken -- staging was not
> designed for this. I believe moving anything there is bad idea.
>
> Staging is for ugly code, not for code that needs new maintainter.

Staging is also a hospice for drivers on their way out. Can some of
these be eventually be axed?

  Luis

Re: [Lsf-pc] [LSF/MM TOPIC NOTES] x86 ZONE_DMA love

[Rik van Riel]

On Thu, 2018-04-26 at 21:54 +, Luis R. Rodriguez wrote:
> Below are my notes on the ZONE_DMA discussion at LSF/MM 2018. There
> were some
> earlier discussion prior to my arrival to the session about moving
> around
> ZOME_DMA around, if someone has notes on that please share too :)

We took notes during LSF/MM 2018. Not a whole lot
on your topic, but most of the MM and plenary
topics have some notes.

https://etherpad.wikimedia.org/p/LSFMM2018

-- 
All Rights Reversed.

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Re: [Lsf-pc] [LSF/MM TOPIC NOTES] x86 ZONE_DMA love

[Rik van Riel]

On Thu, 2018-04-26 at 21:54 +, Luis R. Rodriguez wrote:
> Below are my notes on the ZONE_DMA discussion at LSF/MM 2018. There
> were some
> earlier discussion prior to my arrival to the session about moving
> around
> ZOME_DMA around, if someone has notes on that please share too :)

We took notes during LSF/MM 2018. Not a whole lot
on your topic, but most of the MM and plenary
topics have some notes.

https://etherpad.wikimedia.org/p/LSFMM2018

-- 
All Rights Reversed.

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[PATCH 2/3] tracing: Add field parsing hist error for hist triggers

[Tom Zanussi]

If the user specifies a nonexistent field for a hist trigger, the
current code correctly flags that as an error, but doesn't tell the
user what happened.

Fix this by invoking hist_err() with an appropriate message when
nonexistent fields are specified.

Before:

  # echo 'hist:keys=pid:ts0=common_timestamp.usecs' >> 
/sys/kernel/debug/tracing/events/sched/sched_switch/trigger
  -su: echo: write error: Invalid argument
  # cat /sys/kernel/debug/tracing/events/sched/sched_switch/hist

After:

  # echo 'hist:keys=pid:ts0=common_timestamp.usecs' >> 
/sys/kernel/debug/tracing/events/sched/sched_switch/trigger
  -su: echo: write error: Invalid argument
  # cat /sys/kernel/debug/tracing/events/sched/sched_switch/hist
  ERROR: Couldn't find field: pid
Last command: keys=pid:ts0=common_timestamp.usecs

Signed-off-by: Tom Zanussi 
Reported-by: Masami Hiramatsu 
---
 kernel/trace/trace_events_hist.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/kernel/trace/trace_events_hist.c b/kernel/trace/trace_events_hist.c
index 66c87be..f231fa2 100644
--- a/kernel/trace/trace_events_hist.c
+++ b/kernel/trace/trace_events_hist.c
@@ -2481,6 +2481,7 @@ static struct hist_field *parse_var_ref(struct 
hist_trigger_data *hist_data,
else {
field = trace_find_event_field(file->event_call, field_name);
if (!field || !field->size) {
+   hist_err("Couldn't find field: ", field_name);
field = ERR_PTR(-EINVAL);
goto out;
}
-- 
1.9.3

[PATCH 2/3] tracing: Add field parsing hist error for hist triggers

[Tom Zanussi]

If the user specifies a nonexistent field for a hist trigger, the
current code correctly flags that as an error, but doesn't tell the
user what happened.

Fix this by invoking hist_err() with an appropriate message when
nonexistent fields are specified.

Before:

  # echo 'hist:keys=pid:ts0=common_timestamp.usecs' >> 
/sys/kernel/debug/tracing/events/sched/sched_switch/trigger
  -su: echo: write error: Invalid argument
  # cat /sys/kernel/debug/tracing/events/sched/sched_switch/hist

After:

  # echo 'hist:keys=pid:ts0=common_timestamp.usecs' >> 
/sys/kernel/debug/tracing/events/sched/sched_switch/trigger
  -su: echo: write error: Invalid argument
  # cat /sys/kernel/debug/tracing/events/sched/sched_switch/hist
  ERROR: Couldn't find field: pid
Last command: keys=pid:ts0=common_timestamp.usecs

Signed-off-by: Tom Zanussi 
Reported-by: Masami Hiramatsu 
---
 kernel/trace/trace_events_hist.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/kernel/trace/trace_events_hist.c b/kernel/trace/trace_events_hist.c
index 66c87be..f231fa2 100644
--- a/kernel/trace/trace_events_hist.c
+++ b/kernel/trace/trace_events_hist.c
@@ -2481,6 +2481,7 @@ static struct hist_field *parse_var_ref(struct 
hist_trigger_data *hist_data,
else {
field = trace_find_event_field(file->event_call, field_name);
if (!field || !field->size) {
+   hist_err("Couldn't find field: ", field_name);
field = ERR_PTR(-EINVAL);
goto out;
}
-- 
1.9.3

[PATCH 0/3] A few hist trigger fixes

[Tom Zanussi]

Hi Steve,

Here are a few patches that fix some problems found when testing the
hist trigger inter-event (e.g. latency) support patches.

The first fixes a problem I noticed when printing flags.

The remaining two add some hist_err() calls for fields, the first
reported by Masami, the second something I noticed when fixing the
first.

Thanks,

Tom

The following changes since commit 0566e40ce7c493d39006cdd7edf17bfdc52eb2ac:

  tracing: initcall: Ordered comparison of function pointers (2018-04-26 
15:02:46 -0400)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/zanussi/linux-trace.git 
ftrace/hist-fixes-1

Tom Zanussi (3):
  tracing: Restore proper field flag printing when displaying triggers
  tracing: Add field parsing hist error for hist triggers
  tracing: Add field modifier parsing hist error for hist triggers

 kernel/trace/trace_events_hist.c | 12 
 1 file changed, 12 insertions(+)

-- 
1.9.3

[PATCH 1/3] tracing: Restore proper field flag printing when displaying triggers

[Tom Zanussi]

The flag-printing code used when displaying hist triggers somehow got
dropped during refactoring of the inter-event patchset.  This restores
it.

Below are a couple examples - in the first case, .usecs wasn't being
displayed properly for common_timestamps and the second illustrates
the same for other flags such as .execname.

Before:

  # echo 'hist:key=common_pid.execname:val=count:sort=count' > 
/sys/kernel/debug/tracing/events/syscalls/sys_enter_read/trigger
  # cat /sys/kernel/debug/tracing/events/syscalls/sys_enter_read/trigger
  hist:keys=common_pid:vals=hitcount,count:sort=count:size=2048 [active]

  # echo 'hist:keys=pid:ts0=common_timestamp.usecs if comm=="cyclictest"' >> 
/sys/kernel/debug/tracing/events/sched/sched_wakeup/trigger
  # cat /sys/kernel/debug/tracing/events/sched/sched_wakeup/trigger
  
hist:keys=pid:vals=hitcount:ts0=common_timestamp:sort=hitcount:size=2048:clock=global
 if comm=="cyclictest" [active]

After:

  # echo 'hist:key=common_pid.execname:val=count:sort=count' > 
/sys/kernel/debug/tracing/events/syscalls/sys_enter_read/trigger
  # cat /sys/kernel/debug/tracing/events/syscalls/sys_enter_read/trigger
  hist:keys=common_pid.execname:vals=hitcount,count:sort=count:size=2048 
[active]

  # echo 'hist:keys=pid:ts0=common_timestamp.usecs if comm=="cyclictest"' >> 
/sys/kernel/debug/tracing/events/sched/sched_wakeup/trigger
  # cat /sys/kernel/debug/tracing/events/sched/sched_wakeup/trigger
  
hist:keys=pid:vals=hitcount:ts0=common_timestamp.usecs:sort=hitcount:size=2048:clock=global
 if comm=="cyclictest" [active]

Signed-off-by: Tom Zanussi 
---
 kernel/trace/trace_events_hist.c | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/kernel/trace/trace_events_hist.c b/kernel/trace/trace_events_hist.c
index 0d7b3ff..66c87be 100644
--- a/kernel/trace/trace_events_hist.c
+++ b/kernel/trace/trace_events_hist.c
@@ -4913,6 +4913,16 @@ static void hist_field_print(struct seq_file *m, struct 
hist_field *hist_field)
seq_printf(m, "%s", field_name);
} else if (hist_field->flags & HIST_FIELD_FL_TIMESTAMP)
seq_puts(m, "common_timestamp");
+
+   if (hist_field->flags) {
+   if (!(hist_field->flags & HIST_FIELD_FL_VAR_REF) &&
+   !(hist_field->flags & HIST_FIELD_FL_EXPR)) {
+   const char *flags = get_hist_field_flags(hist_field);
+
+   if (flags)
+   seq_printf(m, ".%s", flags);
+   }
+   }
 }
 
 static int event_hist_trigger_print(struct seq_file *m,
-- 
1.9.3

[PATCH 3/3] tracing: Add field modifier parsing hist error for hist triggers

[Tom Zanussi]

If the user specifies an invalid field modifier for a hist trigger,
the current code correctly flags that as an error, but doesn't tell
the user what happened.

Fix this by invoking hist_err() with an appropriate message when
invalid modifiers are specified.

Before:

  # echo 'hist:keys=pid:ts0=common_timestamp.junkusecs' >> 
/sys/kernel/debug/tracing/events/sched/sched_wakeup/trigger
  -su: echo: write error: Invalid argument
  # cat /sys/kernel/debug/tracing/events/sched/sched_wakeup/hist

After:

  # echo 'hist:keys=pid:ts0=common_timestamp.junkusecs' >> 
/sys/kernel/debug/tracing/events/sched/sched_wakeup/trigger
  -su: echo: write error: Invalid argument
  # cat /sys/kernel/debug/tracing/events/sched/sched_wakeup/hist
  ERROR: Invalid field modifier: junkusecs
Last command: keys=pid:ts0=common_timestamp.junkusecs

Signed-off-by: Tom Zanussi 
---
 kernel/trace/trace_events_hist.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/kernel/trace/trace_events_hist.c b/kernel/trace/trace_events_hist.c
index f231fa2..b9061ed 100644
--- a/kernel/trace/trace_events_hist.c
+++ b/kernel/trace/trace_events_hist.c
@@ -2466,6 +2466,7 @@ static struct hist_field *parse_var_ref(struct 
hist_trigger_data *hist_data,
else if (strcmp(modifier, "usecs") == 0)
*flags |= HIST_FIELD_FL_TIMESTAMP_USECS;
else {
+   hist_err("Invalid field modifier: ", modifier);
field = ERR_PTR(-EINVAL);
goto out;
}
-- 
1.9.3

[PATCH 0/3] A few hist trigger fixes

[Tom Zanussi]

Hi Steve,

Here are a few patches that fix some problems found when testing the
hist trigger inter-event (e.g. latency) support patches.

The first fixes a problem I noticed when printing flags.

The remaining two add some hist_err() calls for fields, the first
reported by Masami, the second something I noticed when fixing the
first.

Thanks,

Tom

The following changes since commit 0566e40ce7c493d39006cdd7edf17bfdc52eb2ac:

  tracing: initcall: Ordered comparison of function pointers (2018-04-26 
15:02:46 -0400)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/zanussi/linux-trace.git 
ftrace/hist-fixes-1

Tom Zanussi (3):
  tracing: Restore proper field flag printing when displaying triggers
  tracing: Add field parsing hist error for hist triggers
  tracing: Add field modifier parsing hist error for hist triggers

 kernel/trace/trace_events_hist.c | 12 
 1 file changed, 12 insertions(+)

-- 
1.9.3

[PATCH 1/3] tracing: Restore proper field flag printing when displaying triggers

[Tom Zanussi]

The flag-printing code used when displaying hist triggers somehow got
dropped during refactoring of the inter-event patchset.  This restores
it.

Below are a couple examples - in the first case, .usecs wasn't being
displayed properly for common_timestamps and the second illustrates
the same for other flags such as .execname.

Before:

  # echo 'hist:key=common_pid.execname:val=count:sort=count' > 
/sys/kernel/debug/tracing/events/syscalls/sys_enter_read/trigger
  # cat /sys/kernel/debug/tracing/events/syscalls/sys_enter_read/trigger
  hist:keys=common_pid:vals=hitcount,count:sort=count:size=2048 [active]

  # echo 'hist:keys=pid:ts0=common_timestamp.usecs if comm=="cyclictest"' >> 
/sys/kernel/debug/tracing/events/sched/sched_wakeup/trigger
  # cat /sys/kernel/debug/tracing/events/sched/sched_wakeup/trigger
  
hist:keys=pid:vals=hitcount:ts0=common_timestamp:sort=hitcount:size=2048:clock=global
 if comm=="cyclictest" [active]

After:

  # echo 'hist:key=common_pid.execname:val=count:sort=count' > 
/sys/kernel/debug/tracing/events/syscalls/sys_enter_read/trigger
  # cat /sys/kernel/debug/tracing/events/syscalls/sys_enter_read/trigger
  hist:keys=common_pid.execname:vals=hitcount,count:sort=count:size=2048 
[active]

  # echo 'hist:keys=pid:ts0=common_timestamp.usecs if comm=="cyclictest"' >> 
/sys/kernel/debug/tracing/events/sched/sched_wakeup/trigger
  # cat /sys/kernel/debug/tracing/events/sched/sched_wakeup/trigger
  
hist:keys=pid:vals=hitcount:ts0=common_timestamp.usecs:sort=hitcount:size=2048:clock=global
 if comm=="cyclictest" [active]

Signed-off-by: Tom Zanussi 
---
 kernel/trace/trace_events_hist.c | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/kernel/trace/trace_events_hist.c b/kernel/trace/trace_events_hist.c
index 0d7b3ff..66c87be 100644
--- a/kernel/trace/trace_events_hist.c
+++ b/kernel/trace/trace_events_hist.c
@@ -4913,6 +4913,16 @@ static void hist_field_print(struct seq_file *m, struct 
hist_field *hist_field)
seq_printf(m, "%s", field_name);
} else if (hist_field->flags & HIST_FIELD_FL_TIMESTAMP)
seq_puts(m, "common_timestamp");
+
+   if (hist_field->flags) {
+   if (!(hist_field->flags & HIST_FIELD_FL_VAR_REF) &&
+   !(hist_field->flags & HIST_FIELD_FL_EXPR)) {
+   const char *flags = get_hist_field_flags(hist_field);
+
+   if (flags)
+   seq_printf(m, ".%s", flags);
+   }
+   }
 }
 
 static int event_hist_trigger_print(struct seq_file *m,
-- 
1.9.3

[PATCH 3/3] tracing: Add field modifier parsing hist error for hist triggers

[Tom Zanussi]

If the user specifies an invalid field modifier for a hist trigger,
the current code correctly flags that as an error, but doesn't tell
the user what happened.

Fix this by invoking hist_err() with an appropriate message when
invalid modifiers are specified.

Before:

  # echo 'hist:keys=pid:ts0=common_timestamp.junkusecs' >> 
/sys/kernel/debug/tracing/events/sched/sched_wakeup/trigger
  -su: echo: write error: Invalid argument
  # cat /sys/kernel/debug/tracing/events/sched/sched_wakeup/hist

After:

  # echo 'hist:keys=pid:ts0=common_timestamp.junkusecs' >> 
/sys/kernel/debug/tracing/events/sched/sched_wakeup/trigger
  -su: echo: write error: Invalid argument
  # cat /sys/kernel/debug/tracing/events/sched/sched_wakeup/hist
  ERROR: Invalid field modifier: junkusecs
Last command: keys=pid:ts0=common_timestamp.junkusecs

Signed-off-by: Tom Zanussi 
---
 kernel/trace/trace_events_hist.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/kernel/trace/trace_events_hist.c b/kernel/trace/trace_events_hist.c
index f231fa2..b9061ed 100644
--- a/kernel/trace/trace_events_hist.c
+++ b/kernel/trace/trace_events_hist.c
@@ -2466,6 +2466,7 @@ static struct hist_field *parse_var_ref(struct 
hist_trigger_data *hist_data,
else if (strcmp(modifier, "usecs") == 0)
*flags |= HIST_FIELD_FL_TIMESTAMP_USECS;
else {
+   hist_err("Invalid field modifier: ", modifier);
field = ERR_PTR(-EINVAL);
goto out;
}
-- 
1.9.3

Re: Linux 4.17.0-rc2 - WARNING: inconsistent lock state

[Theodore Y. Ts'o]

On Wed, Apr 25, 2018 at 08:44:04AM -0600, Shuah Khan wrote:
> I am seeing the following on my system with 4.17-rc2. Probably in 4.17-rc1
> as well.
> 
> Something to be concerned about. Is this related to
> Commit: a45403b51582a87872927a3e0fc0a389c26867f1
> ext4: always initialize the crc32c checksum driver?

It should be fixed by 6c1e851c4ed: random: fix possible sleeping
allocation from irq context.

- Ted

Re: Linux 4.17.0-rc2 - WARNING: inconsistent lock state

[Theodore Y. Ts'o]

On Wed, Apr 25, 2018 at 08:44:04AM -0600, Shuah Khan wrote:
> I am seeing the following on my system with 4.17-rc2. Probably in 4.17-rc1
> as well.
> 
> Something to be concerned about. Is this related to
> Commit: a45403b51582a87872927a3e0fc0a389c26867f1
> ext4: always initialize the crc32c checksum driver?

It should be fixed by 6c1e851c4ed: random: fix possible sleeping
allocation from irq context.

- Ted

RE: Makefile:636: arch/score/Makefile: No such file or directory

[Li, Philip]

> >Please stop trying to build the removed architectures: tile, blackfin,
> >metag, m32r, frv, mn10300, cris and score.
> >
> >https://lwn.net/Articles/748074/ has details about why this broke.
> 
> Sorry about that!  It looks the architectures removal is not thorough
> enough. Hao, would you help take a look?
sure, we will handle this.

> 
> >Note that we do have a few new architectures that you may want
> >to add if you haven't done this already: nds32 and riscv were added
> >this year, and a couple of older architectures that didn't have upstream
> >gcc releases now have those, and I uploaded gcc binaries to
> >https://cdn.kernel.org/pub/tools/crosstool/.
> >
> >This should allow building everything we have in the kernel now.
> >Unfortunately the nds32 toolchain I uploaded is a little incomplete,
> >but I have a gcc-6.4 build that (mostly) works and gcc-8 should
> >be fine as well once it gets released.
> 
> OK, thanks for the tips! Philip may help plan add the 2 new archs
> nds32 and riscv.
thanks for info, we will add new archs support in near future.

> 
> Thanks,
> Fengguang

RE: Makefile:636: arch/score/Makefile: No such file or directory

[Li, Philip]

> >Please stop trying to build the removed architectures: tile, blackfin,
> >metag, m32r, frv, mn10300, cris and score.
> >
> >https://lwn.net/Articles/748074/ has details about why this broke.
> 
> Sorry about that!  It looks the architectures removal is not thorough
> enough. Hao, would you help take a look?
sure, we will handle this.

> 
> >Note that we do have a few new architectures that you may want
> >to add if you haven't done this already: nds32 and riscv were added
> >this year, and a couple of older architectures that didn't have upstream
> >gcc releases now have those, and I uploaded gcc binaries to
> >https://cdn.kernel.org/pub/tools/crosstool/.
> >
> >This should allow building everything we have in the kernel now.
> >Unfortunately the nds32 toolchain I uploaded is a little incomplete,
> >but I have a gcc-6.4 build that (mostly) works and gcc-8 should
> >be fine as well once it gets released.
> 
> OK, thanks for the tips! Philip may help plan add the 2 new archs
> nds32 and riscv.
thanks for info, we will add new archs support in near future.

> 
> Thanks,
> Fengguang

[PATCH v3] KVM: Extend MAX_IRQ_ROUTES to 4096 for all archs

[Wanpeng Li]

From: Wanpeng Li 

Our virtual machines make use of device assignment by configuring
12 NVMe disks for high I/O performance. Each NVMe device has 129 
MSI-X Table entries:
Capabilities: [50] MSI-X: Enable+ Count=129 Masked-Vector table: BAR=0 
offset=2000
The windows virtual machines fail to boot since they will map the number of 
MSI-table entries that the NVMe hardware reported to the bus to msi routing 
table, this will exceed the 1024. This patch extends MAX_IRQ_ROUTES to 4096
for all archs, in the future this might be extended again if needed.

Reviewed-by: Cornelia Huck 
Cc: Paolo Bonzini 
Cc: Radim Krčmář 
Cc: Cornelia Huck 
Cc: Christian Borntraeger 
Signed-off-by: Wanpeng Li 
Signed-off-by: Tonny Lu 
---
v2 -> v3:
 * update comments in the code
v1 -> v2:
 * extend MAX_IRQ_ROUTES to 4096 for all archs 

 include/linux/kvm_host.h | 8 +---
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h
index 6930c63..6d6e79c 100644
--- a/include/linux/kvm_host.h
+++ b/include/linux/kvm_host.h
@@ -1045,13 +1045,7 @@ static inline int mmu_notifier_retry(struct kvm *kvm, 
unsigned long mmu_seq)
 
 #ifdef CONFIG_HAVE_KVM_IRQ_ROUTING
 
-#ifdef CONFIG_S390
-#define KVM_MAX_IRQ_ROUTES 4096 //FIXME: we can have more than that...
-#elif defined(CONFIG_ARM64)
-#define KVM_MAX_IRQ_ROUTES 4096
-#else
-#define KVM_MAX_IRQ_ROUTES 1024
-#endif
+#define KVM_MAX_IRQ_ROUTES 4096 /* might need extension/rework in the future */
 
 bool kvm_arch_can_set_irq_routing(struct kvm *kvm);
 int kvm_set_irq_routing(struct kvm *kvm,
-- 
2.7.4

[PATCH v3] KVM: Extend MAX_IRQ_ROUTES to 4096 for all archs

[Wanpeng Li]

From: Wanpeng Li 

Our virtual machines make use of device assignment by configuring
12 NVMe disks for high I/O performance. Each NVMe device has 129 
MSI-X Table entries:
Capabilities: [50] MSI-X: Enable+ Count=129 Masked-Vector table: BAR=0 
offset=2000
The windows virtual machines fail to boot since they will map the number of 
MSI-table entries that the NVMe hardware reported to the bus to msi routing 
table, this will exceed the 1024. This patch extends MAX_IRQ_ROUTES to 4096
for all archs, in the future this might be extended again if needed.

Reviewed-by: Cornelia Huck 
Cc: Paolo Bonzini 
Cc: Radim Krčmář 
Cc: Cornelia Huck 
Cc: Christian Borntraeger 
Signed-off-by: Wanpeng Li 
Signed-off-by: Tonny Lu 
---
v2 -> v3:
 * update comments in the code
v1 -> v2:
 * extend MAX_IRQ_ROUTES to 4096 for all archs 

 include/linux/kvm_host.h | 8 +---
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h
index 6930c63..6d6e79c 100644
--- a/include/linux/kvm_host.h
+++ b/include/linux/kvm_host.h
@@ -1045,13 +1045,7 @@ static inline int mmu_notifier_retry(struct kvm *kvm, 
unsigned long mmu_seq)
 
 #ifdef CONFIG_HAVE_KVM_IRQ_ROUTING
 
-#ifdef CONFIG_S390
-#define KVM_MAX_IRQ_ROUTES 4096 //FIXME: we can have more than that...
-#elif defined(CONFIG_ARM64)
-#define KVM_MAX_IRQ_ROUTES 4096
-#else
-#define KVM_MAX_IRQ_ROUTES 1024
-#endif
+#define KVM_MAX_IRQ_ROUTES 4096 /* might need extension/rework in the future */
 
 bool kvm_arch_can_set_irq_routing(struct kvm *kvm);
 int kvm_set_irq_routing(struct kvm *kvm,
-- 
2.7.4

Re: [RFC PATCH v3 1/3] ima: extend clone() with IMA namespace support

[Eric W. Biederman]

Stefan Berger  writes:

> On 04/19/2018 11:35 AM, John Johansen wrote:

>> It sounds like its already decided, with ima and selinux going with an 
>> unshare file within their own fs.
>>
>> AppArmor went a different route already, splitting namespace creation (mkdir 
>> in the apparmorfs policy/namespace dir) and the task entering the namespace 
>> with a write apparmor's equiv of setexeccon.
>>
> I am supporting procfs entries for the IMA namespace spawned by writing a
> boolean '1' into IMA's securityfs 'unshare' file. It would allow to use
> setns(fd, 0), obviously with the 0 parameter. I think this is an important
> function to support considering entering a set of namespace. I am just 
> wondering
> about the 0 parameter. We don't have a CLONE flag for it, so there's not other
> way to support it then. Does it matter ?

That should be fine.  We can pick a flag for setns at some point for
IMA.  The setns function uses the flag field as an enumeration so any of
the low 8 bits or a combination with overlapping bit is valid to setns.

Eric

Re: [RFC PATCH v3 1/3] ima: extend clone() with IMA namespace support

[Eric W. Biederman]

Stefan Berger  writes:

> On 04/19/2018 11:35 AM, John Johansen wrote:

>> It sounds like its already decided, with ima and selinux going with an 
>> unshare file within their own fs.
>>
>> AppArmor went a different route already, splitting namespace creation (mkdir 
>> in the apparmorfs policy/namespace dir) and the task entering the namespace 
>> with a write apparmor's equiv of setexeccon.
>>
> I am supporting procfs entries for the IMA namespace spawned by writing a
> boolean '1' into IMA's securityfs 'unshare' file. It would allow to use
> setns(fd, 0), obviously with the 0 parameter. I think this is an important
> function to support considering entering a set of namespace. I am just 
> wondering
> about the 0 parameter. We don't have a CLONE flag for it, so there's not other
> way to support it then. Does it matter ?

That should be fine.  We can pick a flag for setns at some point for
IMA.  The setns function uses the flag field as an enumeration so any of
the low 8 bits or a combination with overlapping bit is valid to setns.

Eric

[PATCH] reset: uniphier: add LD11/LD20 stream demux system reset control

[Katsuhiro Suzuki]

Add reset lines for MPEG2 transport stream I/O and demux system (HSC)
on UniPhier LD11/LD20 SoCs.

Signed-off-by: Katsuhiro Suzuki 
---
 drivers/reset/reset-uniphier.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c
index 360e06b20c53..7a3a449c4900 100644
--- a/drivers/reset/reset-uniphier.c
+++ b/drivers/reset/reset-uniphier.c
@@ -99,6 +99,7 @@ static const struct uniphier_reset_data 
uniphier_ld11_sys_reset_data[] = {
UNIPHIER_RESETX(4, 0x200c, 2),  /* eMMC */
UNIPHIER_RESETX(6, 0x200c, 6),  /* Ether */
UNIPHIER_RESETX(8, 0x200c, 8),  /* STDMAC (HSC, MIO) */
+   UNIPHIER_RESETX(9, 0x200c, 9),  /* HSC */
UNIPHIER_RESETX(40, 0x2008, 0), /* AIO */
UNIPHIER_RESETX(41, 0x2008, 1), /* EVEA */
UNIPHIER_RESETX(42, 0x2010, 2), /* EXIV */
@@ -110,6 +111,7 @@ static const struct uniphier_reset_data 
uniphier_ld20_sys_reset_data[] = {
UNIPHIER_RESETX(4, 0x200c, 2),  /* eMMC */
UNIPHIER_RESETX(6, 0x200c, 6),  /* Ether */
UNIPHIER_RESETX(8, 0x200c, 8),  /* STDMAC (HSC) */
+   UNIPHIER_RESETX(9, 0x200c, 9),  /* HSC */
UNIPHIER_RESETX(12, 0x200c, 5), /* GIO (PCIe, USB3) */
UNIPHIER_RESETX(16, 0x200c, 12),/* USB30-PHY0 */
UNIPHIER_RESETX(17, 0x200c, 13),/* USB30-PHY1 */
-- 
2.17.0

[PATCH] reset: uniphier: add LD11/LD20 stream demux system reset control

[Katsuhiro Suzuki]

Add reset lines for MPEG2 transport stream I/O and demux system (HSC)
on UniPhier LD11/LD20 SoCs.

Signed-off-by: Katsuhiro Suzuki 
---
 drivers/reset/reset-uniphier.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c
index 360e06b20c53..7a3a449c4900 100644
--- a/drivers/reset/reset-uniphier.c
+++ b/drivers/reset/reset-uniphier.c
@@ -99,6 +99,7 @@ static const struct uniphier_reset_data 
uniphier_ld11_sys_reset_data[] = {
UNIPHIER_RESETX(4, 0x200c, 2),  /* eMMC */
UNIPHIER_RESETX(6, 0x200c, 6),  /* Ether */
UNIPHIER_RESETX(8, 0x200c, 8),  /* STDMAC (HSC, MIO) */
+   UNIPHIER_RESETX(9, 0x200c, 9),  /* HSC */
UNIPHIER_RESETX(40, 0x2008, 0), /* AIO */
UNIPHIER_RESETX(41, 0x2008, 1), /* EVEA */
UNIPHIER_RESETX(42, 0x2010, 2), /* EXIV */
@@ -110,6 +111,7 @@ static const struct uniphier_reset_data 
uniphier_ld20_sys_reset_data[] = {
UNIPHIER_RESETX(4, 0x200c, 2),  /* eMMC */
UNIPHIER_RESETX(6, 0x200c, 6),  /* Ether */
UNIPHIER_RESETX(8, 0x200c, 8),  /* STDMAC (HSC) */
+   UNIPHIER_RESETX(9, 0x200c, 9),  /* HSC */
UNIPHIER_RESETX(12, 0x200c, 5), /* GIO (PCIe, USB3) */
UNIPHIER_RESETX(16, 0x200c, 12),/* USB30-PHY0 */
UNIPHIER_RESETX(17, 0x200c, 13),/* USB30-PHY1 */
-- 
2.17.0

[PATCH] clk: uniphier: add LD11/LD20 stream demux system clock

[Katsuhiro Suzuki]

Add clock for MPEG2 transport stream I/O and demux system (HSC) on
UniPhier LD11/LD20 SoCs.

Signed-off-by: Katsuhiro Suzuki 
---
 drivers/clk/uniphier/clk-uniphier-sys.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c 
b/drivers/clk/uniphier/clk-uniphier-sys.c
index ebc78ab2df05..4f5ff9fa11fd 100644
--- a/drivers/clk/uniphier/clk-uniphier-sys.c
+++ b/drivers/clk/uniphier/clk-uniphier-sys.c
@@ -51,6 +51,9 @@
 #define UNIPHIER_LD11_SYS_CLK_STDMAC(idx)  \
UNIPHIER_CLK_GATE("stdmac", (idx), NULL, 0x210c, 8)
 
+#define UNIPHIER_LD11_SYS_CLK_HSC(idx) \
+   UNIPHIER_CLK_GATE("hsc", (idx), NULL, 0x210c, 9)
+
 #define UNIPHIER_PRO4_SYS_CLK_GIO(idx) \
UNIPHIER_CLK_GATE("gio", (idx), NULL, 0x2104, 6)
 
@@ -182,6 +185,7 @@ const struct uniphier_clk_data uniphier_ld11_sys_clk_data[] 
= {
/* Index 5 reserved for eMMC PHY */
UNIPHIER_LD11_SYS_CLK_ETHER(6),
UNIPHIER_LD11_SYS_CLK_STDMAC(8),/* HSC, MIO */
+   UNIPHIER_LD11_SYS_CLK_HSC(9),
UNIPHIER_CLK_FACTOR("usb2", -1, "ref", 24, 25),
UNIPHIER_LD11_SYS_CLK_AIO(40),
UNIPHIER_LD11_SYS_CLK_EVEA(41),
@@ -215,6 +219,7 @@ const struct uniphier_clk_data uniphier_ld20_sys_clk_data[] 
= {
UNIPHIER_LD20_SYS_CLK_SD,
UNIPHIER_LD11_SYS_CLK_ETHER(6),
UNIPHIER_LD11_SYS_CLK_STDMAC(8),/* HSC */
+   UNIPHIER_LD11_SYS_CLK_HSC(9),
/* GIO is always clock-enabled: no function for 0x210c bit5 */
/*
 * clock for USB Link is enabled by the logic "OR" of bit 14 and bit 15.
-- 
2.17.0

[PATCH] clk: uniphier: add LD11/LD20 stream demux system clock

[Katsuhiro Suzuki]

Add clock for MPEG2 transport stream I/O and demux system (HSC) on
UniPhier LD11/LD20 SoCs.

Signed-off-by: Katsuhiro Suzuki 
---
 drivers/clk/uniphier/clk-uniphier-sys.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c 
b/drivers/clk/uniphier/clk-uniphier-sys.c
index ebc78ab2df05..4f5ff9fa11fd 100644
--- a/drivers/clk/uniphier/clk-uniphier-sys.c
+++ b/drivers/clk/uniphier/clk-uniphier-sys.c
@@ -51,6 +51,9 @@
 #define UNIPHIER_LD11_SYS_CLK_STDMAC(idx)  \
UNIPHIER_CLK_GATE("stdmac", (idx), NULL, 0x210c, 8)
 
+#define UNIPHIER_LD11_SYS_CLK_HSC(idx) \
+   UNIPHIER_CLK_GATE("hsc", (idx), NULL, 0x210c, 9)
+
 #define UNIPHIER_PRO4_SYS_CLK_GIO(idx) \
UNIPHIER_CLK_GATE("gio", (idx), NULL, 0x2104, 6)
 
@@ -182,6 +185,7 @@ const struct uniphier_clk_data uniphier_ld11_sys_clk_data[] 
= {
/* Index 5 reserved for eMMC PHY */
UNIPHIER_LD11_SYS_CLK_ETHER(6),
UNIPHIER_LD11_SYS_CLK_STDMAC(8),/* HSC, MIO */
+   UNIPHIER_LD11_SYS_CLK_HSC(9),
UNIPHIER_CLK_FACTOR("usb2", -1, "ref", 24, 25),
UNIPHIER_LD11_SYS_CLK_AIO(40),
UNIPHIER_LD11_SYS_CLK_EVEA(41),
@@ -215,6 +219,7 @@ const struct uniphier_clk_data uniphier_ld20_sys_clk_data[] 
= {
UNIPHIER_LD20_SYS_CLK_SD,
UNIPHIER_LD11_SYS_CLK_ETHER(6),
UNIPHIER_LD11_SYS_CLK_STDMAC(8),/* HSC */
+   UNIPHIER_LD11_SYS_CLK_HSC(9),
/* GIO is always clock-enabled: no function for 0x210c bit5 */
/*
 * clock for USB Link is enabled by the logic "OR" of bit 14 and bit 15.
-- 
2.17.0

[PATCH 1/2] pinctrl: uniphier: add LD20 MPEG2-TS I/O pin-mux settings

[Katsuhiro Suzuki]

The MPEG2-TS input/output core both accepts serial TS and parallel TS.

The serial TS interface uses following pins:
  hscin0_s : HS0DOUT[0-3]
  hscin1_s : HS0DOUT[4-7]
  hscin2_s : HS1BCLKIN, HS1SYNCIN, HS1VALIN, HS1DIN0
  hscin3_s : HS1DIN[2-5]
  hscout0_s: HS0DOUT[0-3]
  hscout1_s: HS0DOUT[4-7]

And the parallel TS interface uses following pins:
  hscin0_p : HS0BCLKIN, HS0SYNCIN, HS0VALIN, HS0DIN[0-7]
  hscin1_p : HS1BCLKIN, HS1SYNCIN, HS1VALIN, HS1DIN[0-7]
  hscout0_p: HS0BCLKOUT, HS0SYNCOUT, HS0VALOUT, HS0DOUT[0-7]

Signed-off-by: Katsuhiro Suzuki 
---
 .../pinctrl/uniphier/pinctrl-uniphier-ld20.c  | 54 +++
 1 file changed, 54 insertions(+)

diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c 
b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
index bf8f0c3bea5e..6528c13ea4bd 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
@@ -566,6 +566,33 @@ static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 
0, 0, 0, 0, 0, 0, 0,
 static const unsigned ether_rmii_pins[] = {30, 31, 32, 33, 34, 35, 36, 37, 39,
   41, 42, 45};
 static const int ether_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1};
+static const unsigned hscin0_ci_pins[] = {102, 103, 104, 105, 106, 107, 108,
+   109, 110, 111, 112};
+static const int hscin0_ci_muxvals[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
+static const unsigned hscin0_p_pins[] = {102, 103, 104, 105, 106, 107, 108, 
109,
+110, 111, 112};
+static const int hscin0_p_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned hscin1_p_pins[] = {124, 125, 126, 127, 128, 129, 130, 
131,
+132, 133, 134};
+static const int hscin1_p_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned hscin0_s_pins[] = {116, 117, 118, 119};
+static const int hscin0_s_muxvals[] = {3, 3, 3, 3};
+static const unsigned hscin1_s_pins[] = {120, 121, 122, 123};
+static const int hscin1_s_muxvals[] = {3, 3, 3, 3};
+static const unsigned hscin2_s_pins[] = {124, 125, 126, 127};
+static const int hscin2_s_muxvals[] = {3, 3, 3, 3};
+static const unsigned hscin3_s_pins[] = {129, 130, 131, 132};
+static const int hscin3_s_muxvals[] = {3, 3, 3, 3};
+static const unsigned hscout0_ci_pins[] = {113, 114, 115, 116, 117, 118, 119,
+  120, 121, 122, 123};
+static const int hscout0_ci_muxvals[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
+static const unsigned hscout0_p_pins[] = {113, 114, 115, 116, 117, 118, 119,
+ 120, 121, 122, 123};
+static const int hscout0_p_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned hscout0_s_pins[] = {116, 117, 118, 119};
+static const int hscout0_s_muxvals[] = {4, 4, 4, 4};
+static const unsigned hscout1_s_pins[] = {120, 121, 122, 123};
+static const int hscout1_s_muxvals[] = {4, 4, 4, 4};
 static const unsigned i2c0_pins[] = {63, 64};
 static const int i2c0_muxvals[] = {0, 0};
 static const unsigned i2c1_pins[] = {65, 66};
@@ -641,6 +668,17 @@ static const struct uniphier_pinctrl_group 
uniphier_ld20_groups[] = {
UNIPHIER_PINCTRL_GROUP(emmc_dat8),
UNIPHIER_PINCTRL_GROUP(ether_rgmii),
UNIPHIER_PINCTRL_GROUP(ether_rmii),
+   UNIPHIER_PINCTRL_GROUP(hscin0_ci),
+   UNIPHIER_PINCTRL_GROUP(hscin0_p),
+   UNIPHIER_PINCTRL_GROUP(hscin1_p),
+   UNIPHIER_PINCTRL_GROUP(hscin0_s),
+   UNIPHIER_PINCTRL_GROUP(hscin1_s),
+   UNIPHIER_PINCTRL_GROUP(hscin2_s),
+   UNIPHIER_PINCTRL_GROUP(hscin3_s),
+   UNIPHIER_PINCTRL_GROUP(hscout0_ci),
+   UNIPHIER_PINCTRL_GROUP(hscout0_p),
+   UNIPHIER_PINCTRL_GROUP(hscout0_s),
+   UNIPHIER_PINCTRL_GROUP(hscout1_s),
UNIPHIER_PINCTRL_GROUP(i2c0),
UNIPHIER_PINCTRL_GROUP(i2c1),
UNIPHIER_PINCTRL_GROUP(i2c3),
@@ -668,6 +706,16 @@ static const char * const aoutiec1_groups[] = {"aoutiec1"};
 static const char * const emmc_groups[] = {"emmc", "emmc_dat8"};
 static const char * const ether_rgmii_groups[] = {"ether_rgmii"};
 static const char * const ether_rmii_groups[] = {"ether_rmii"};
+static const char * const hscin0_groups[] = {"hscin0_s",
+"hscin0_p",
+"hscout0_ci"};
+static const char * const hscin1_groups[] = {"hscin1_s", "hscin0_p"};
+static const char * const hscin2_groups[] = {"hscin2_s"};
+static const char * const hscin3_groups[] = {"hscin3_s"};
+static const char * const hscout0_groups[] = {"hscout0_s",
+ "hscout0_p",
+ "hscout0_ci"};
+static const char * const hscout1_groups[] = {"hscout1_s"};
 static const char * const i2c0_groups[] = {"i2c0"};
 static const char * const i2c1_groups[] = {"i2c1"};
 

[PATCH 1/2] pinctrl: uniphier: add LD20 MPEG2-TS I/O pin-mux settings

[Katsuhiro Suzuki]

The MPEG2-TS input/output core both accepts serial TS and parallel TS.

The serial TS interface uses following pins:
  hscin0_s : HS0DOUT[0-3]
  hscin1_s : HS0DOUT[4-7]
  hscin2_s : HS1BCLKIN, HS1SYNCIN, HS1VALIN, HS1DIN0
  hscin3_s : HS1DIN[2-5]
  hscout0_s: HS0DOUT[0-3]
  hscout1_s: HS0DOUT[4-7]

And the parallel TS interface uses following pins:
  hscin0_p : HS0BCLKIN, HS0SYNCIN, HS0VALIN, HS0DIN[0-7]
  hscin1_p : HS1BCLKIN, HS1SYNCIN, HS1VALIN, HS1DIN[0-7]
  hscout0_p: HS0BCLKOUT, HS0SYNCOUT, HS0VALOUT, HS0DOUT[0-7]

Signed-off-by: Katsuhiro Suzuki 
---
 .../pinctrl/uniphier/pinctrl-uniphier-ld20.c  | 54 +++
 1 file changed, 54 insertions(+)

diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c 
b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
index bf8f0c3bea5e..6528c13ea4bd 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
@@ -566,6 +566,33 @@ static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 
0, 0, 0, 0, 0, 0, 0,
 static const unsigned ether_rmii_pins[] = {30, 31, 32, 33, 34, 35, 36, 37, 39,
   41, 42, 45};
 static const int ether_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1};
+static const unsigned hscin0_ci_pins[] = {102, 103, 104, 105, 106, 107, 108,
+   109, 110, 111, 112};
+static const int hscin0_ci_muxvals[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
+static const unsigned hscin0_p_pins[] = {102, 103, 104, 105, 106, 107, 108, 
109,
+110, 111, 112};
+static const int hscin0_p_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned hscin1_p_pins[] = {124, 125, 126, 127, 128, 129, 130, 
131,
+132, 133, 134};
+static const int hscin1_p_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned hscin0_s_pins[] = {116, 117, 118, 119};
+static const int hscin0_s_muxvals[] = {3, 3, 3, 3};
+static const unsigned hscin1_s_pins[] = {120, 121, 122, 123};
+static const int hscin1_s_muxvals[] = {3, 3, 3, 3};
+static const unsigned hscin2_s_pins[] = {124, 125, 126, 127};
+static const int hscin2_s_muxvals[] = {3, 3, 3, 3};
+static const unsigned hscin3_s_pins[] = {129, 130, 131, 132};
+static const int hscin3_s_muxvals[] = {3, 3, 3, 3};
+static const unsigned hscout0_ci_pins[] = {113, 114, 115, 116, 117, 118, 119,
+  120, 121, 122, 123};
+static const int hscout0_ci_muxvals[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
+static const unsigned hscout0_p_pins[] = {113, 114, 115, 116, 117, 118, 119,
+ 120, 121, 122, 123};
+static const int hscout0_p_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned hscout0_s_pins[] = {116, 117, 118, 119};
+static const int hscout0_s_muxvals[] = {4, 4, 4, 4};
+static const unsigned hscout1_s_pins[] = {120, 121, 122, 123};
+static const int hscout1_s_muxvals[] = {4, 4, 4, 4};
 static const unsigned i2c0_pins[] = {63, 64};
 static const int i2c0_muxvals[] = {0, 0};
 static const unsigned i2c1_pins[] = {65, 66};
@@ -641,6 +668,17 @@ static const struct uniphier_pinctrl_group 
uniphier_ld20_groups[] = {
UNIPHIER_PINCTRL_GROUP(emmc_dat8),
UNIPHIER_PINCTRL_GROUP(ether_rgmii),
UNIPHIER_PINCTRL_GROUP(ether_rmii),
+   UNIPHIER_PINCTRL_GROUP(hscin0_ci),
+   UNIPHIER_PINCTRL_GROUP(hscin0_p),
+   UNIPHIER_PINCTRL_GROUP(hscin1_p),
+   UNIPHIER_PINCTRL_GROUP(hscin0_s),
+   UNIPHIER_PINCTRL_GROUP(hscin1_s),
+   UNIPHIER_PINCTRL_GROUP(hscin2_s),
+   UNIPHIER_PINCTRL_GROUP(hscin3_s),
+   UNIPHIER_PINCTRL_GROUP(hscout0_ci),
+   UNIPHIER_PINCTRL_GROUP(hscout0_p),
+   UNIPHIER_PINCTRL_GROUP(hscout0_s),
+   UNIPHIER_PINCTRL_GROUP(hscout1_s),
UNIPHIER_PINCTRL_GROUP(i2c0),
UNIPHIER_PINCTRL_GROUP(i2c1),
UNIPHIER_PINCTRL_GROUP(i2c3),
@@ -668,6 +706,16 @@ static const char * const aoutiec1_groups[] = {"aoutiec1"};
 static const char * const emmc_groups[] = {"emmc", "emmc_dat8"};
 static const char * const ether_rgmii_groups[] = {"ether_rgmii"};
 static const char * const ether_rmii_groups[] = {"ether_rmii"};
+static const char * const hscin0_groups[] = {"hscin0_s",
+"hscin0_p",
+"hscout0_ci"};
+static const char * const hscin1_groups[] = {"hscin1_s", "hscin0_p"};
+static const char * const hscin2_groups[] = {"hscin2_s"};
+static const char * const hscin3_groups[] = {"hscin3_s"};
+static const char * const hscout0_groups[] = {"hscout0_s",
+ "hscout0_p",
+ "hscout0_ci"};
+static const char * const hscout1_groups[] = {"hscout1_s"};
 static const char * const i2c0_groups[] = {"i2c0"};
 static const char * const i2c1_groups[] = {"i2c1"};
 static const char * const 

[PATCH 2/2] pinctrl: uniphier: add LD11 MPEG2-TS I/O pin-mux settings

[Katsuhiro Suzuki]

The MPEG2-TS input/output core both accepts serial TS and parallel TS.

The serial TS interface uses following pins:
  hscin0_s : HS0DOUT[0-3]
  hscin1_s : HS0DOUT[4-7]
  hscin2_s : HS1BCLKIN, HS1SYNCIN, HS1VALIN, HS1DIN0
  hscout0_s: HS0DOUT[0-3]
  hscout1_s: HS0DOUT[4-7]

And the parallel TS interface uses following pins:
  hscin0_p : HS0BCLKIN, HS0SYNCIN, HS0VALIN, HS0DIN[0-7]
  hscin1_p : HS1BCLKIN, HS1SYNCIN, HS1VALIN, HS1DIN[0-7]
  hscout0_p: HS0BCLKOUT, HS0SYNCOUT, HS0VALOUT, HS0DOUT[0-7]

Signed-off-by: Katsuhiro Suzuki 
---
 .../pinctrl/uniphier/pinctrl-uniphier-ld11.c  | 49 +++
 1 file changed, 49 insertions(+)

diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c 
b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c
index 0976fbfecd50..5b5864efb514 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c
@@ -481,6 +481,31 @@ static const int emmc_dat8_muxvals[] = {0, 0, 0, 0};
 static const unsigned ether_rmii_pins[] = {6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
   16, 17};
 static const int ether_rmii_muxvals[] = {4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4};
+static const unsigned hscin0_ci_pins[] = {102, 103, 104, 105, 106, 107, 108,
+   109, 110, 111, 112};
+static const int hscin0_ci_muxvals[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
+static const unsigned hscin0_p_pins[] = {102, 103, 104, 105, 106, 107, 108, 
109,
+110, 111, 112};
+static const int hscin0_p_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned hscin1_p_pins[] = {124, 125, 126, 127, 128, 129, 130, 
131,
+132, 133, 134};
+static const int hscin1_p_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned hscin0_s_pins[] = {116, 117, 118, 119};
+static const int hscin0_s_muxvals[] = {3, 3, 3, 3};
+static const unsigned hscin1_s_pins[] = {120, 121, 122, 123};
+static const int hscin1_s_muxvals[] = {3, 3, 3, 3};
+static const unsigned hscin2_s_pins[] = {124, 125, 126, 127};
+static const int hscin2_s_muxvals[] = {3, 3, 3, 3};
+static const unsigned hscout0_ci_pins[] = {113, 114, 115, 116, 117, 118, 119,
+  120, 121, 122, 123};
+static const int hscout0_ci_muxvals[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
+static const unsigned hscout0_p_pins[] = {113, 114, 115, 116, 117, 118, 119,
+ 120, 121, 122, 123};
+static const int hscout0_p_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned hscout0_s_pins[] = {116, 117, 118, 119};
+static const int hscout0_s_muxvals[] = {4, 4, 4, 4};
+static const unsigned hscout1_s_pins[] = {120, 121, 122, 123};
+static const int hscout1_s_muxvals[] = {4, 4, 4, 4};
 static const unsigned i2c0_pins[] = {63, 64};
 static const int i2c0_muxvals[] = {0, 0};
 static const unsigned i2c1_pins[] = {65, 66};
@@ -556,6 +581,16 @@ static const struct uniphier_pinctrl_group 
uniphier_ld11_groups[] = {
UNIPHIER_PINCTRL_GROUP(emmc),
UNIPHIER_PINCTRL_GROUP(emmc_dat8),
UNIPHIER_PINCTRL_GROUP(ether_rmii),
+   UNIPHIER_PINCTRL_GROUP(hscin0_ci),
+   UNIPHIER_PINCTRL_GROUP(hscin0_p),
+   UNIPHIER_PINCTRL_GROUP(hscin1_p),
+   UNIPHIER_PINCTRL_GROUP(hscin0_s),
+   UNIPHIER_PINCTRL_GROUP(hscin1_s),
+   UNIPHIER_PINCTRL_GROUP(hscin2_s),
+   UNIPHIER_PINCTRL_GROUP(hscout0_ci),
+   UNIPHIER_PINCTRL_GROUP(hscout0_p),
+   UNIPHIER_PINCTRL_GROUP(hscout0_s),
+   UNIPHIER_PINCTRL_GROUP(hscout1_s),
UNIPHIER_PINCTRL_GROUP(i2c0),
UNIPHIER_PINCTRL_GROUP(i2c1),
UNIPHIER_PINCTRL_GROUP(i2c3),
@@ -583,6 +618,15 @@ static const char * const aout1_groups[] = {"aout1"};
 static const char * const aoutiec1_groups[] = {"aoutiec1"};
 static const char * const emmc_groups[] = {"emmc", "emmc_dat8"};
 static const char * const ether_rmii_groups[] = {"ether_rmii"};
+static const char * const hscin0_groups[] = {"hscin0_s",
+"hscin0_p",
+"hscout0_ci"};
+static const char * const hscin1_groups[] = {"hscin1_s", "hscin0_p"};
+static const char * const hscin2_groups[] = {"hscin2_s"};
+static const char * const hscout0_groups[] = {"hscout0_s",
+ "hscout0_p",
+ "hscout0_ci"};
+static const char * const hscout1_groups[] = {"hscout1_s"};
 static const char * const i2c0_groups[] = {"i2c0"};
 static const char * const i2c1_groups[] = {"i2c1"};
 static const char * const i2c3_groups[] = {"i2c3"};
@@ -603,6 +647,11 @@ static const struct uniphier_pinmux_function 
uniphier_ld11_functions[] = {
UNIPHIER_PINMUX_FUNCTION(aoutiec1),
UNIPHIER_PINMUX_FUNCTION(emmc),
UNIPHIER_PINMUX_FUNCTION(ether_rmii),
+   

[PATCH 2/2] pinctrl: uniphier: add LD11 MPEG2-TS I/O pin-mux settings

[Katsuhiro Suzuki]

The MPEG2-TS input/output core both accepts serial TS and parallel TS.

The serial TS interface uses following pins:
  hscin0_s : HS0DOUT[0-3]
  hscin1_s : HS0DOUT[4-7]
  hscin2_s : HS1BCLKIN, HS1SYNCIN, HS1VALIN, HS1DIN0
  hscout0_s: HS0DOUT[0-3]
  hscout1_s: HS0DOUT[4-7]

And the parallel TS interface uses following pins:
  hscin0_p : HS0BCLKIN, HS0SYNCIN, HS0VALIN, HS0DIN[0-7]
  hscin1_p : HS1BCLKIN, HS1SYNCIN, HS1VALIN, HS1DIN[0-7]
  hscout0_p: HS0BCLKOUT, HS0SYNCOUT, HS0VALOUT, HS0DOUT[0-7]

Signed-off-by: Katsuhiro Suzuki 
---
 .../pinctrl/uniphier/pinctrl-uniphier-ld11.c  | 49 +++
 1 file changed, 49 insertions(+)

diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c 
b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c
index 0976fbfecd50..5b5864efb514 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c
@@ -481,6 +481,31 @@ static const int emmc_dat8_muxvals[] = {0, 0, 0, 0};
 static const unsigned ether_rmii_pins[] = {6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
   16, 17};
 static const int ether_rmii_muxvals[] = {4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4};
+static const unsigned hscin0_ci_pins[] = {102, 103, 104, 105, 106, 107, 108,
+   109, 110, 111, 112};
+static const int hscin0_ci_muxvals[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
+static const unsigned hscin0_p_pins[] = {102, 103, 104, 105, 106, 107, 108, 
109,
+110, 111, 112};
+static const int hscin0_p_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned hscin1_p_pins[] = {124, 125, 126, 127, 128, 129, 130, 
131,
+132, 133, 134};
+static const int hscin1_p_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned hscin0_s_pins[] = {116, 117, 118, 119};
+static const int hscin0_s_muxvals[] = {3, 3, 3, 3};
+static const unsigned hscin1_s_pins[] = {120, 121, 122, 123};
+static const int hscin1_s_muxvals[] = {3, 3, 3, 3};
+static const unsigned hscin2_s_pins[] = {124, 125, 126, 127};
+static const int hscin2_s_muxvals[] = {3, 3, 3, 3};
+static const unsigned hscout0_ci_pins[] = {113, 114, 115, 116, 117, 118, 119,
+  120, 121, 122, 123};
+static const int hscout0_ci_muxvals[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
+static const unsigned hscout0_p_pins[] = {113, 114, 115, 116, 117, 118, 119,
+ 120, 121, 122, 123};
+static const int hscout0_p_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned hscout0_s_pins[] = {116, 117, 118, 119};
+static const int hscout0_s_muxvals[] = {4, 4, 4, 4};
+static const unsigned hscout1_s_pins[] = {120, 121, 122, 123};
+static const int hscout1_s_muxvals[] = {4, 4, 4, 4};
 static const unsigned i2c0_pins[] = {63, 64};
 static const int i2c0_muxvals[] = {0, 0};
 static const unsigned i2c1_pins[] = {65, 66};
@@ -556,6 +581,16 @@ static const struct uniphier_pinctrl_group 
uniphier_ld11_groups[] = {
UNIPHIER_PINCTRL_GROUP(emmc),
UNIPHIER_PINCTRL_GROUP(emmc_dat8),
UNIPHIER_PINCTRL_GROUP(ether_rmii),
+   UNIPHIER_PINCTRL_GROUP(hscin0_ci),
+   UNIPHIER_PINCTRL_GROUP(hscin0_p),
+   UNIPHIER_PINCTRL_GROUP(hscin1_p),
+   UNIPHIER_PINCTRL_GROUP(hscin0_s),
+   UNIPHIER_PINCTRL_GROUP(hscin1_s),
+   UNIPHIER_PINCTRL_GROUP(hscin2_s),
+   UNIPHIER_PINCTRL_GROUP(hscout0_ci),
+   UNIPHIER_PINCTRL_GROUP(hscout0_p),
+   UNIPHIER_PINCTRL_GROUP(hscout0_s),
+   UNIPHIER_PINCTRL_GROUP(hscout1_s),
UNIPHIER_PINCTRL_GROUP(i2c0),
UNIPHIER_PINCTRL_GROUP(i2c1),
UNIPHIER_PINCTRL_GROUP(i2c3),
@@ -583,6 +618,15 @@ static const char * const aout1_groups[] = {"aout1"};
 static const char * const aoutiec1_groups[] = {"aoutiec1"};
 static const char * const emmc_groups[] = {"emmc", "emmc_dat8"};
 static const char * const ether_rmii_groups[] = {"ether_rmii"};
+static const char * const hscin0_groups[] = {"hscin0_s",
+"hscin0_p",
+"hscout0_ci"};
+static const char * const hscin1_groups[] = {"hscin1_s", "hscin0_p"};
+static const char * const hscin2_groups[] = {"hscin2_s"};
+static const char * const hscout0_groups[] = {"hscout0_s",
+ "hscout0_p",
+ "hscout0_ci"};
+static const char * const hscout1_groups[] = {"hscout1_s"};
 static const char * const i2c0_groups[] = {"i2c0"};
 static const char * const i2c1_groups[] = {"i2c1"};
 static const char * const i2c3_groups[] = {"i2c3"};
@@ -603,6 +647,11 @@ static const struct uniphier_pinmux_function 
uniphier_ld11_functions[] = {
UNIPHIER_PINMUX_FUNCTION(aoutiec1),
UNIPHIER_PINMUX_FUNCTION(emmc),
UNIPHIER_PINMUX_FUNCTION(ether_rmii),
+   UNIPHIER_PINMUX_FUNCTION(hscin0),
+   

Proposal

[MS Zeliha Omer Faruk]

Hello

   Greetings to you today i asked before but i did't get a response please
i know this might come to you as a surprise because you do not know me
personally i have a business proposal for you please reply for more
info.



Best Regards,

Esentepe Mahallesi Büyükdere
Caddesi Kristal Kule Binasi
No:215
 Sisli - Istanbul, Turkey

Proposal

[MS Zeliha Omer Faruk]

Hello

   Greetings to you today i asked before but i did't get a response please
i know this might come to you as a surprise because you do not know me
personally i have a business proposal for you please reply for more
info.



Best Regards,

Esentepe Mahallesi Büyükdere
Caddesi Kristal Kule Binasi
No:215
 Sisli - Istanbul, Turkey

Re: [PATCH net-next 1/2 v2] netns: restrict uevents

[Eric W. Biederman]

Christian Brauner  writes:

> On Thu, Apr 26, 2018 at 12:10:30PM -0500, Eric W. Biederman wrote:
>> Christian Brauner  writes:
>> 
>> > On Thu, Apr 26, 2018 at 11:47:19AM -0500, Eric W. Biederman wrote:
>> >> Christian Brauner  writes:
>> >> 
>> >> > On Tue, Apr 24, 2018 at 06:00:35PM -0500, Eric W. Biederman wrote:
>> >> >> Christian Brauner  writes:
>> >> >> 
>> >> >> > On Wed, Apr 25, 2018, 00:41 Eric W. Biederman 
>> >> >> >  wrote:
>> >> >> >
>> >> >> >  Bah. This code is obviously correct and probably wrong.
>> >> >> >
>> >> >> >  How do we deliver uevents for network devices that are outside of 
>> >> >> > the
>> >> >> >  initial user namespace? The kernel still needs to deliver those.
>> >> >> >
>> >> >> >  The logic to figure out which network namespace a device needs to be
>> >> >> >  delivered to is is present in kobj_bcast_filter. That logic will 
>> >> >> > almost
>> >> >> >  certainly need to be turned inside out. Sign not as easy as I would
>> >> >> >  have hoped.
>> >> >> >
>> >> >> > My first patch that we discussed put additional filtering logic into 
>> >> >> > kobj_bcast_filter for that very reason. But I can move that logic
>> >> >> > out and come up with a new patch.
>> >> >> 
>> >> >> I may have mis-understood.
>> >> >> 
>> >> >> I heard and am still hearing additional filtering to reduce the places
>> >> >> the packet is delievered.
>> >> >> 
>> >> >> I am saying something needs to change to increase the number of places
>> >> >> the packet is delivered.
>> >> >> 
>> >> >> For the special class of devices that kobj_bcast_filter would apply to
>> >> >> those need to be delivered to netowrk namespaces  that are no longer on
>> >> >> uevent_sock_list.
>> >> >> 
>> >> >> So the code fundamentally needs to split into two paths.  Ordinary
>> >> >> devices that use uevent_sock_list.  Network devices that are just
>> >> >> delivered in their own network namespace.
>> >> >> 
>> >> >> netlink_broadcast_filtered gets to go away completely.
>> >> >
>> >> > The split *might* make sense but I think you're wrong about removing the
>> >> > kobj_bcast_filter. The current filter doesn't operate on the uevent
>> >> > socket in uevent_sock_list itself it rather operates on the sockets in
>> >> > mc_list. And if socket in mc_list can have a different network namespace
>> >> > then the uevent_socket itself then your way won't work. That's why my
>> >> > original patch added additional filtering in there. The way I see it we
>> >> > need something like:
>> >> 
>> >> We already filter the sockets in the mc_list by network namespace.
>> >
>> > Oh really? That's good to know. I haven't found where in the code this
>> > actually happens. I thought that when netlink_bind() is called anyone
>> > could register themselves in mc_list.
>> 
>> The code in af_netlink.c does:
>> > static void do_one_broadcast(struct sock *sk,
>> >struct netlink_broadcast_data *p)
>> > {
>> >struct netlink_sock *nlk = nlk_sk(sk);
>> >int val;
>> > 
>> >if (p->exclude_sk == sk)
>> >return;
>> > 
>> >if (nlk->portid == p->portid || p->group - 1 >= nlk->ngroups ||
>> >!test_bit(p->group - 1, nlk->groups))
>> >return;
>> > 
>> >if (!net_eq(sock_net(sk), p->net)) {
>>  Here
>> >if (!(nlk->flags & NETLINK_F_LISTEN_ALL_NSID))
>> >return;
>> ^^^ Here
>> > 
>> >if (!peernet_has_id(sock_net(sk), p->net))
>> >return;
>> > 
>> >if (!file_ns_capable(sk->sk_socket->file, p->net->user_ns,
>> > CAP_NET_BROADCAST))
>> >return;
>> >}
>> 
>> Which if you are not a magic NETLINK_F_LISTEN_ALL_NSID socket filters
>> you out if you are the wrong network namespace.
>> 
>> 
>> >> When a packet is transmitted with netlink_broadcast it is only
>> >> transmitted within a single network namespace.
>> >> 
>> >> Even in the case of a NETLINK_F_LISTEN_ALL_NSID socket the skb is tagged
>> >> with it's source network namespace so no confusion will result, and the
>> >> permission checks have been done to make it safe. So you can safely
>> >> ignore that case.  Please ignore that case.  It only needs to be
>> >> considered if refactoring af_netlink.c
>> >> 
>> >> When I added netlink_broadcast_filtered I imagined that we would need
>> >> code that worked across network namespaces that worked for different
>> >> namespaces.   So it looked like we would need the level of granularity
>> >> that you can get with netlink_broadcast_filtered.  It turns out we don't
>> >> and that it was a case of over design.  As the only split we care about
>> >> is per network namespace there is no need for
>> >> netlink_broadcast_filtered.
>> >> 
>> >> > 

Re: [PATCH net-next 1/2 v2] netns: restrict uevents

[Eric W. Biederman]

Christian Brauner  writes:

> On Thu, Apr 26, 2018 at 12:10:30PM -0500, Eric W. Biederman wrote:
>> Christian Brauner  writes:
>> 
>> > On Thu, Apr 26, 2018 at 11:47:19AM -0500, Eric W. Biederman wrote:
>> >> Christian Brauner  writes:
>> >> 
>> >> > On Tue, Apr 24, 2018 at 06:00:35PM -0500, Eric W. Biederman wrote:
>> >> >> Christian Brauner  writes:
>> >> >> 
>> >> >> > On Wed, Apr 25, 2018, 00:41 Eric W. Biederman 
>> >> >> >  wrote:
>> >> >> >
>> >> >> >  Bah. This code is obviously correct and probably wrong.
>> >> >> >
>> >> >> >  How do we deliver uevents for network devices that are outside of 
>> >> >> > the
>> >> >> >  initial user namespace? The kernel still needs to deliver those.
>> >> >> >
>> >> >> >  The logic to figure out which network namespace a device needs to be
>> >> >> >  delivered to is is present in kobj_bcast_filter. That logic will 
>> >> >> > almost
>> >> >> >  certainly need to be turned inside out. Sign not as easy as I would
>> >> >> >  have hoped.
>> >> >> >
>> >> >> > My first patch that we discussed put additional filtering logic into 
>> >> >> > kobj_bcast_filter for that very reason. But I can move that logic
>> >> >> > out and come up with a new patch.
>> >> >> 
>> >> >> I may have mis-understood.
>> >> >> 
>> >> >> I heard and am still hearing additional filtering to reduce the places
>> >> >> the packet is delievered.
>> >> >> 
>> >> >> I am saying something needs to change to increase the number of places
>> >> >> the packet is delivered.
>> >> >> 
>> >> >> For the special class of devices that kobj_bcast_filter would apply to
>> >> >> those need to be delivered to netowrk namespaces  that are no longer on
>> >> >> uevent_sock_list.
>> >> >> 
>> >> >> So the code fundamentally needs to split into two paths.  Ordinary
>> >> >> devices that use uevent_sock_list.  Network devices that are just
>> >> >> delivered in their own network namespace.
>> >> >> 
>> >> >> netlink_broadcast_filtered gets to go away completely.
>> >> >
>> >> > The split *might* make sense but I think you're wrong about removing the
>> >> > kobj_bcast_filter. The current filter doesn't operate on the uevent
>> >> > socket in uevent_sock_list itself it rather operates on the sockets in
>> >> > mc_list. And if socket in mc_list can have a different network namespace
>> >> > then the uevent_socket itself then your way won't work. That's why my
>> >> > original patch added additional filtering in there. The way I see it we
>> >> > need something like:
>> >> 
>> >> We already filter the sockets in the mc_list by network namespace.
>> >
>> > Oh really? That's good to know. I haven't found where in the code this
>> > actually happens. I thought that when netlink_bind() is called anyone
>> > could register themselves in mc_list.
>> 
>> The code in af_netlink.c does:
>> > static void do_one_broadcast(struct sock *sk,
>> >struct netlink_broadcast_data *p)
>> > {
>> >struct netlink_sock *nlk = nlk_sk(sk);
>> >int val;
>> > 
>> >if (p->exclude_sk == sk)
>> >return;
>> > 
>> >if (nlk->portid == p->portid || p->group - 1 >= nlk->ngroups ||
>> >!test_bit(p->group - 1, nlk->groups))
>> >return;
>> > 
>> >if (!net_eq(sock_net(sk), p->net)) {
>>  Here
>> >if (!(nlk->flags & NETLINK_F_LISTEN_ALL_NSID))
>> >return;
>> ^^^ Here
>> > 
>> >if (!peernet_has_id(sock_net(sk), p->net))
>> >return;
>> > 
>> >if (!file_ns_capable(sk->sk_socket->file, p->net->user_ns,
>> > CAP_NET_BROADCAST))
>> >return;
>> >}
>> 
>> Which if you are not a magic NETLINK_F_LISTEN_ALL_NSID socket filters
>> you out if you are the wrong network namespace.
>> 
>> 
>> >> When a packet is transmitted with netlink_broadcast it is only
>> >> transmitted within a single network namespace.
>> >> 
>> >> Even in the case of a NETLINK_F_LISTEN_ALL_NSID socket the skb is tagged
>> >> with it's source network namespace so no confusion will result, and the
>> >> permission checks have been done to make it safe. So you can safely
>> >> ignore that case.  Please ignore that case.  It only needs to be
>> >> considered if refactoring af_netlink.c
>> >> 
>> >> When I added netlink_broadcast_filtered I imagined that we would need
>> >> code that worked across network namespaces that worked for different
>> >> namespaces.   So it looked like we would need the level of granularity
>> >> that you can get with netlink_broadcast_filtered.  It turns out we don't
>> >> and that it was a case of over design.  As the only split we care about
>> >> is per network namespace there is no need for
>> >> netlink_broadcast_filtered.
>> >> 
>> >> > init_user_ns_broadcast_filtered(uevent_sock_list, kobj_bcast_filter);
>> >> > user_ns_broadcast_filtered(uevent_sock_list,kobj_bcast_filter);
>> >> >
>> >> > The question that 

[PATCH] staging: mt7621-eth: fix line over 80 char / extra line in mtk_set_link_ksettings()

[Jefferson Capovilla]

Fix 'line over 80 characters' issue found by checkpatch.pl script in
mtk_set_link_ksettings().
Fix extra line before end of function.

Signed-off-by: Jefferson Capovilla 
---
 drivers/staging/mt7621-eth/ethtool.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/mt7621-eth/ethtool.c 
b/drivers/staging/mt7621-eth/ethtool.c
index 38ba0c0..e9f4092 100644
--- a/drivers/staging/mt7621-eth/ethtool.c
+++ b/drivers/staging/mt7621-eth/ethtool.c
@@ -52,7 +52,8 @@ static int mtk_set_link_ksettings(struct net_device *dev,
mac->phy_dev = mac->hw->phy->phy[cmd->base.phy_address];
mac->phy_flags = MTK_PHY_FLAG_PORT;
} else if (mac->hw->mii_bus) {
-   mac->phy_dev = mdiobus_get_phy(mac->hw->mii_bus, 
cmd->base.phy_address);
+   mac->phy_dev = mdiobus_get_phy(mac->hw->mii_bus,
+  cmd->base.phy_address);
if (!mac->phy_dev)
return -ENODEV;
mac->phy_flags = MTK_PHY_FLAG_ATTACH;
@@ -62,7 +63,6 @@ static int mtk_set_link_ksettings(struct net_device *dev,
}
 
return phy_ethtool_ksettings_set(mac->phy_dev, cmd);
-
 }
 
 static void mtk_get_drvinfo(struct net_device *dev,
-- 
2.7.4

[PATCH] staging: mt7621-eth: fix line over 80 char / extra line in mtk_set_link_ksettings()

[Jefferson Capovilla]

Fix 'line over 80 characters' issue found by checkpatch.pl script in
mtk_set_link_ksettings().
Fix extra line before end of function.

Signed-off-by: Jefferson Capovilla 
---
 drivers/staging/mt7621-eth/ethtool.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/mt7621-eth/ethtool.c 
b/drivers/staging/mt7621-eth/ethtool.c
index 38ba0c0..e9f4092 100644
--- a/drivers/staging/mt7621-eth/ethtool.c
+++ b/drivers/staging/mt7621-eth/ethtool.c
@@ -52,7 +52,8 @@ static int mtk_set_link_ksettings(struct net_device *dev,
mac->phy_dev = mac->hw->phy->phy[cmd->base.phy_address];
mac->phy_flags = MTK_PHY_FLAG_PORT;
} else if (mac->hw->mii_bus) {
-   mac->phy_dev = mdiobus_get_phy(mac->hw->mii_bus, 
cmd->base.phy_address);
+   mac->phy_dev = mdiobus_get_phy(mac->hw->mii_bus,
+  cmd->base.phy_address);
if (!mac->phy_dev)
return -ENODEV;
mac->phy_flags = MTK_PHY_FLAG_ATTACH;
@@ -62,7 +63,6 @@ static int mtk_set_link_ksettings(struct net_device *dev,
}
 
return phy_ethtool_ksettings_set(mac->phy_dev, cmd);
-
 }
 
 static void mtk_get_drvinfo(struct net_device *dev,
-- 
2.7.4

[PATCH v9 02/27] clk: davinci: da850-pll: change PLL0 to CLK_OF_DECLARE

[David Lechner]

PLL0 on davinci/da850-type device needs to be registered early in boot
because it is needed for clocksource/clockevent. Change the driver
to use CLK_OF_DECLARE for this special case.

Signed-off-by: David Lechner 
---

v9 changes:
- new patch in v9


 drivers/clk/davinci/pll-da850.c | 26 ++
 drivers/clk/davinci/pll.c   |  4 +++-
 drivers/clk/davinci/pll.h   |  2 +-
 3 files changed, 26 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/davinci/pll-da850.c b/drivers/clk/davinci/pll-da850.c
index 00a6ece7b524..743527de1da2 100644
--- a/drivers/clk/davinci/pll-da850.c
+++ b/drivers/clk/davinci/pll-da850.c
@@ -12,6 +12,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 
@@ -135,11 +137,27 @@ static const struct davinci_pll_sysclk_info 
*da850_pll0_sysclk_info[] = {
NULL
 };
 
-int of_da850_pll0_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip)
+void of_da850_pll0_init(struct device_node *node)
 {
-   return of_davinci_pll_init(dev, dev->of_node, _pll0_info,
-  _pll0_obsclk_info,
-  da850_pll0_sysclk_info, 7, base, cfgchip);
+   void __iomem *base;
+   struct regmap *cfgchip;
+
+   base = of_iomap(node, 0);
+   if (!base) {
+   pr_err("%s: ioremap failed\n", __func__);
+   return;
+   }
+
+   cfgchip = syscon_regmap_lookup_by_compatible("ti,da830-cfgchip");
+   if (IS_ERR(cfgchip)) {
+   pr_warn("%s: failed to get cfgchip (%ld)\n", __func__,
+   PTR_ERR(cfgchip));
+   cfgchip = NULL;
+   }
+
+   of_davinci_pll_init(NULL, node, _pll0_info,
+   _pll0_obsclk_info,
+   da850_pll0_sysclk_info, 7, base, cfgchip);
 }
 
 static const struct davinci_pll_clk_info da850_pll1_info = {
diff --git a/drivers/clk/davinci/pll.c b/drivers/clk/davinci/pll.c
index 7c4d808b8fdb..7d55e7470005 100644
--- a/drivers/clk/davinci/pll.c
+++ b/drivers/clk/davinci/pll.c
@@ -794,8 +794,10 @@ static struct davinci_pll_platform_data 
*davinci_pll_get_pdata(struct device *de
return pdata;
 }
 
+/* needed in early boot for clocksource/clockevent */
+CLK_OF_DECLARE(da850_pll0, "ti,da850-pll0", of_da850_pll0_init);
+
 static const struct of_device_id davinci_pll_of_match[] = {
-   { .compatible = "ti,da850-pll0", .data = of_da850_pll0_init },
{ .compatible = "ti,da850-pll1", .data = of_da850_pll1_init },
{ }
 };
diff --git a/drivers/clk/davinci/pll.h b/drivers/clk/davinci/pll.h
index 92a0978a7d29..5fe59ca45638 100644
--- a/drivers/clk/davinci/pll.h
+++ b/drivers/clk/davinci/pll.h
@@ -126,7 +126,7 @@ int da830_pll_init(struct device *dev, void __iomem *base, 
struct regmap *cfgchi
 
 int da850_pll0_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip);
 int da850_pll1_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip);
-int of_da850_pll0_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip);
+void of_da850_pll0_init(struct device_node *node);
 int of_da850_pll1_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip);
 
 int dm355_pll1_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip);
-- 
2.17.0

[PATCH v9 02/27] clk: davinci: da850-pll: change PLL0 to CLK_OF_DECLARE

[David Lechner]

PLL0 on davinci/da850-type device needs to be registered early in boot
because it is needed for clocksource/clockevent. Change the driver
to use CLK_OF_DECLARE for this special case.

Signed-off-by: David Lechner 
---

v9 changes:
- new patch in v9


 drivers/clk/davinci/pll-da850.c | 26 ++
 drivers/clk/davinci/pll.c   |  4 +++-
 drivers/clk/davinci/pll.h   |  2 +-
 3 files changed, 26 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/davinci/pll-da850.c b/drivers/clk/davinci/pll-da850.c
index 00a6ece7b524..743527de1da2 100644
--- a/drivers/clk/davinci/pll-da850.c
+++ b/drivers/clk/davinci/pll-da850.c
@@ -12,6 +12,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 
@@ -135,11 +137,27 @@ static const struct davinci_pll_sysclk_info 
*da850_pll0_sysclk_info[] = {
NULL
 };
 
-int of_da850_pll0_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip)
+void of_da850_pll0_init(struct device_node *node)
 {
-   return of_davinci_pll_init(dev, dev->of_node, _pll0_info,
-  _pll0_obsclk_info,
-  da850_pll0_sysclk_info, 7, base, cfgchip);
+   void __iomem *base;
+   struct regmap *cfgchip;
+
+   base = of_iomap(node, 0);
+   if (!base) {
+   pr_err("%s: ioremap failed\n", __func__);
+   return;
+   }
+
+   cfgchip = syscon_regmap_lookup_by_compatible("ti,da830-cfgchip");
+   if (IS_ERR(cfgchip)) {
+   pr_warn("%s: failed to get cfgchip (%ld)\n", __func__,
+   PTR_ERR(cfgchip));
+   cfgchip = NULL;
+   }
+
+   of_davinci_pll_init(NULL, node, _pll0_info,
+   _pll0_obsclk_info,
+   da850_pll0_sysclk_info, 7, base, cfgchip);
 }
 
 static const struct davinci_pll_clk_info da850_pll1_info = {
diff --git a/drivers/clk/davinci/pll.c b/drivers/clk/davinci/pll.c
index 7c4d808b8fdb..7d55e7470005 100644
--- a/drivers/clk/davinci/pll.c
+++ b/drivers/clk/davinci/pll.c
@@ -794,8 +794,10 @@ static struct davinci_pll_platform_data 
*davinci_pll_get_pdata(struct device *de
return pdata;
 }
 
+/* needed in early boot for clocksource/clockevent */
+CLK_OF_DECLARE(da850_pll0, "ti,da850-pll0", of_da850_pll0_init);
+
 static const struct of_device_id davinci_pll_of_match[] = {
-   { .compatible = "ti,da850-pll0", .data = of_da850_pll0_init },
{ .compatible = "ti,da850-pll1", .data = of_da850_pll1_init },
{ }
 };
diff --git a/drivers/clk/davinci/pll.h b/drivers/clk/davinci/pll.h
index 92a0978a7d29..5fe59ca45638 100644
--- a/drivers/clk/davinci/pll.h
+++ b/drivers/clk/davinci/pll.h
@@ -126,7 +126,7 @@ int da830_pll_init(struct device *dev, void __iomem *base, 
struct regmap *cfgchi
 
 int da850_pll0_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip);
 int da850_pll1_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip);
-int of_da850_pll0_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip);
+void of_da850_pll0_init(struct device_node *node);
 int of_da850_pll1_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip);
 
 int dm355_pll1_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip);
-- 
2.17.0

[PATCH v9 00/27] ARM: davinci: convert to common clock framework​

[David Lechner]

This series converts mach-davinci to use the common clock framework.

The series works like this, the first 3 patches fix some issues with the clock
drivers that have already been accepted into the mainline kernel.

Then, starting with "ARM: davinci: pass clock as parameter to
davinci_timer_init()", we get the mach code ready for the switch by adding the
code needed for the new clock drivers and adding #ifndef CONFIG_COMMON_CLK
around the legacy clocks so that we can switch easily between the old and the
new.

"ARM: davinci: switch to common clock framework" actually flips the switch
to start using the new clock drivers. Then the next 8 patches remove all
of the old clock code.

The final four patches add device tree clock support to the one SoC that
supports it.

This series has been tested on TI OMAP-L138 LCDK (both device tree and legacy
board file).


Changes:

v9 changes (also see individual patches for details):
- Rebased on linux-davnci/master (f5e3203bb775)
- Dropped drivers/clk patches that landed in v4.17
- New drivers/clk patches for early boot special case
- New patch for ti,davinci-timer device tree bindings
- Updated mach/davinci patches to register clocks in early boot when needed

v8 changes (also see individual patches for details):
- Rebased on linux-davinci/master
- Dropped use of __init and __initconst attributes in clk drivers
- Add clkdev lookups for PLL SYSCLKs
- Fix genpd clock reference counting issue
- Fix PSC clock driver loading order issue
- Fix typo in device tree and add more power-domains properties

v7 changes (also see individual patches for details):
- Rebased on linux-davinci/master (v4.16-rc)
- Convert clock drivers to platform devices
- New patch "ARM: davinci: pass clock as parameter to davinci_timer_init()"
- Fix issues with lcdk and aemif clock lookups and power domains
- Fixed other minor issues brought up in v6 review

v6 changes (also see individual patches for details):
- All of the device tree bindings are changed
- All of the clock drivers are changed significantly
- Fixed issues brought up during review of v5
- "ARM: davinci: move davinci_clk_init() to init_time" is removed from this
  series and submitted separately

v5 changes:
- Basically, this is an entirely new series
- Patches are broken up into bite-sized pieces
- Converted PSC clock driver to use regmap
- Restored "force" flag for certain DA850 clocks
- Added device tree bindings
- Moved more of the clock init to drivers/clk
- Fixed frequency scaling (maybe*)

* I have frequency scaling using cpufreq-dt, so I know the clocks are doing
  what they need to do to make this work, but I haven't figured out how to
  test davinci-cpufreq driver yet. (Patches to make cpufreq-dt work will be
  sent separately after this series has landed.)


Dependencies:

Only one dependency didn't land in v4.17. It is just a runtime dependency for
the LCDK board to make the display work.

- "drm/tilcdc: Fix setting clock divider for omap-l138"[1]

[1]: https://patchwork.freedesktop.org/patch/210696/

You can find a working branch with everything included (plus a few extras, like
cpufreq-dt) in the "common-clk-v8" branch of 
https://github.com/dlech/ev3dev-kernel.git.


Testing/debugging for the uninitiated:

I only have one device to test with, which is based on da850, so I will
have to rely on others to do some testing here. Since we are dealing with
clocks, if something isn't working, you most likely won't see output on
the serial port. To figure out what is going on, you need to enable...

CONFIG_DEBUG_LL=y
CONFIG_EARLY_PRINTK=y

and add "earlyprintk clk_ignore_unused" to the kernel command line options.
You may need to select a different UART for this depending on your board. I
think UART1 is the default in the kernel configuration.

On da850 devices comment out the lines:

else
clk_set_parent(clk, parent->clk);

in da850.c or, if using device tree, comment out the lines:

assigned-clocks = <_clk>;
assigned-clock-parents = <_sysclk 2>;

in da850.dtsi when doing earlyprintk, otherwise the UART1 and UART2 clock
source will change during boot and cause garbled output after a point. 


David Lechner (27):
  clk: davinci: pll: allow dev == NULL
  clk: davinci: da850-pll: change PLL0 to CLK_OF_DECLARE
  clk: davinci: psc: allow for dev == NULL
  ARM: davinci: pass clock as parameter to davinci_timer_init()
  ARM: davinci: da830: add new clock init using common clock framework
  ARM: davinci: da850: add new clock init using common clock framework
  ARM: davinci: dm355: add new clock init using common clock framework
  ARM: davinci: dm365: add new clock init using common clock framework
  ARM: davinci: dm644x: add new clock init using common clock framework
  ARM: davinci: dm646x: add new clock init using common clock framework
  ARM: davinci: da8xx: add new USB PHY clock init using common clock
framework
  ARM: davinci: da8xx: add new sata_refclk init using common 

[PATCH v9 00/27] ARM: davinci: convert to common clock framework​

[David Lechner]

This series converts mach-davinci to use the common clock framework.

The series works like this, the first 3 patches fix some issues with the clock
drivers that have already been accepted into the mainline kernel.

Then, starting with "ARM: davinci: pass clock as parameter to
davinci_timer_init()", we get the mach code ready for the switch by adding the
code needed for the new clock drivers and adding #ifndef CONFIG_COMMON_CLK
around the legacy clocks so that we can switch easily between the old and the
new.

"ARM: davinci: switch to common clock framework" actually flips the switch
to start using the new clock drivers. Then the next 8 patches remove all
of the old clock code.

The final four patches add device tree clock support to the one SoC that
supports it.

This series has been tested on TI OMAP-L138 LCDK (both device tree and legacy
board file).


Changes:

v9 changes (also see individual patches for details):
- Rebased on linux-davnci/master (f5e3203bb775)
- Dropped drivers/clk patches that landed in v4.17
- New drivers/clk patches for early boot special case
- New patch for ti,davinci-timer device tree bindings
- Updated mach/davinci patches to register clocks in early boot when needed

v8 changes (also see individual patches for details):
- Rebased on linux-davinci/master
- Dropped use of __init and __initconst attributes in clk drivers
- Add clkdev lookups for PLL SYSCLKs
- Fix genpd clock reference counting issue
- Fix PSC clock driver loading order issue
- Fix typo in device tree and add more power-domains properties

v7 changes (also see individual patches for details):
- Rebased on linux-davinci/master (v4.16-rc)
- Convert clock drivers to platform devices
- New patch "ARM: davinci: pass clock as parameter to davinci_timer_init()"
- Fix issues with lcdk and aemif clock lookups and power domains
- Fixed other minor issues brought up in v6 review

v6 changes (also see individual patches for details):
- All of the device tree bindings are changed
- All of the clock drivers are changed significantly
- Fixed issues brought up during review of v5
- "ARM: davinci: move davinci_clk_init() to init_time" is removed from this
  series and submitted separately

v5 changes:
- Basically, this is an entirely new series
- Patches are broken up into bite-sized pieces
- Converted PSC clock driver to use regmap
- Restored "force" flag for certain DA850 clocks
- Added device tree bindings
- Moved more of the clock init to drivers/clk
- Fixed frequency scaling (maybe*)

* I have frequency scaling using cpufreq-dt, so I know the clocks are doing
  what they need to do to make this work, but I haven't figured out how to
  test davinci-cpufreq driver yet. (Patches to make cpufreq-dt work will be
  sent separately after this series has landed.)


Dependencies:

Only one dependency didn't land in v4.17. It is just a runtime dependency for
the LCDK board to make the display work.

- "drm/tilcdc: Fix setting clock divider for omap-l138"[1]

[1]: https://patchwork.freedesktop.org/patch/210696/

You can find a working branch with everything included (plus a few extras, like
cpufreq-dt) in the "common-clk-v8" branch of 
https://github.com/dlech/ev3dev-kernel.git.


Testing/debugging for the uninitiated:

I only have one device to test with, which is based on da850, so I will
have to rely on others to do some testing here. Since we are dealing with
clocks, if something isn't working, you most likely won't see output on
the serial port. To figure out what is going on, you need to enable...

CONFIG_DEBUG_LL=y
CONFIG_EARLY_PRINTK=y

and add "earlyprintk clk_ignore_unused" to the kernel command line options.
You may need to select a different UART for this depending on your board. I
think UART1 is the default in the kernel configuration.

On da850 devices comment out the lines:

else
clk_set_parent(clk, parent->clk);

in da850.c or, if using device tree, comment out the lines:

assigned-clocks = <_clk>;
assigned-clock-parents = <_sysclk 2>;

in da850.dtsi when doing earlyprintk, otherwise the UART1 and UART2 clock
source will change during boot and cause garbled output after a point. 


David Lechner (27):
  clk: davinci: pll: allow dev == NULL
  clk: davinci: da850-pll: change PLL0 to CLK_OF_DECLARE
  clk: davinci: psc: allow for dev == NULL
  ARM: davinci: pass clock as parameter to davinci_timer_init()
  ARM: davinci: da830: add new clock init using common clock framework
  ARM: davinci: da850: add new clock init using common clock framework
  ARM: davinci: dm355: add new clock init using common clock framework
  ARM: davinci: dm365: add new clock init using common clock framework
  ARM: davinci: dm644x: add new clock init using common clock framework
  ARM: davinci: dm646x: add new clock init using common clock framework
  ARM: davinci: da8xx: add new USB PHY clock init using common clock
framework
  ARM: davinci: da8xx: add new sata_refclk init using common 

[PATCH v9 03/27] clk: davinci: psc: allow for dev == NULL

[David Lechner]

On some davinci SoCs, we need to register the PSC clocks during early
boot because they are needed for clocksource/clockevent. These changes
allow for dev == NULL because in this case, we won't have a platform
device for the clocks.

Signed-off-by: David Lechner 
---

v9 changes:
- new patch in v9


 drivers/clk/davinci/psc-dm355.c  |  2 +-
 drivers/clk/davinci/psc-dm365.c  |  2 +-
 drivers/clk/davinci/psc-dm644x.c |  2 +-
 drivers/clk/davinci/psc-dm646x.c |  2 +-
 drivers/clk/davinci/psc.c| 70 
 include/linux/clk/davinci.h  |  5 +++
 6 files changed, 72 insertions(+), 11 deletions(-)

diff --git a/drivers/clk/davinci/psc-dm355.c b/drivers/clk/davinci/psc-dm355.c
index 6995ecea2677..001288dfdfb1 100644
--- a/drivers/clk/davinci/psc-dm355.c
+++ b/drivers/clk/davinci/psc-dm355.c
@@ -68,7 +68,7 @@ static const struct davinci_lpsc_clk_info dm355_psc_info[] = {
{ }
 };
 
-static int dm355_psc_init(struct device *dev, void __iomem *base)
+int dm355_psc_init(struct device *dev, void __iomem *base)
 {
return davinci_psc_register_clocks(dev, dm355_psc_info, 42, base);
 }
diff --git a/drivers/clk/davinci/psc-dm365.c b/drivers/clk/davinci/psc-dm365.c
index 3ad915f37376..5b5b55b0b59a 100644
--- a/drivers/clk/davinci/psc-dm365.c
+++ b/drivers/clk/davinci/psc-dm365.c
@@ -73,7 +73,7 @@ static const struct davinci_lpsc_clk_info dm365_psc_info[] = {
{ }
 };
 
-static int dm365_psc_init(struct device *dev, void __iomem *base)
+int dm365_psc_init(struct device *dev, void __iomem *base)
 {
return davinci_psc_register_clocks(dev, dm365_psc_info, 52, base);
 }
diff --git a/drivers/clk/davinci/psc-dm644x.c b/drivers/clk/davinci/psc-dm644x.c
index c22367baa46f..74668931be48 100644
--- a/drivers/clk/davinci/psc-dm644x.c
+++ b/drivers/clk/davinci/psc-dm644x.c
@@ -63,7 +63,7 @@ static const struct davinci_lpsc_clk_info dm644x_psc_info[] = 
{
{ }
 };
 
-static int dm644x_psc_init(struct device *dev, void __iomem *base)
+int dm644x_psc_init(struct device *dev, void __iomem *base)
 {
return davinci_psc_register_clocks(dev, dm644x_psc_info, 41, base);
 }
diff --git a/drivers/clk/davinci/psc-dm646x.c b/drivers/clk/davinci/psc-dm646x.c
index 468ef86ea40b..22473affa7cf 100644
--- a/drivers/clk/davinci/psc-dm646x.c
+++ b/drivers/clk/davinci/psc-dm646x.c
@@ -58,7 +58,7 @@ static const struct davinci_lpsc_clk_info dm646x_psc_info[] = 
{
{ }
 };
 
-static int dm646x_psc_init(struct device *dev, void __iomem *base)
+int dm646x_psc_init(struct device *dev, void __iomem *base)
 {
return davinci_psc_register_clocks(dev, dm646x_psc_info, 46, base);
 }
diff --git a/drivers/clk/davinci/psc.c b/drivers/clk/davinci/psc.c
index ce170e600f09..1d4bcdd6bba0 100644
--- a/drivers/clk/davinci/psc.c
+++ b/drivers/clk/davinci/psc.c
@@ -63,7 +63,7 @@ struct davinci_psc_data {
 
 /**
  * struct davinci_lpsc_clk - LPSC clock structure
- * @dev: the device that provides this LPSC
+ * @dev: the device that provides this LPSC or NULL
  * @hw: clk_hw for the LPSC
  * @pm_domain: power domain for the LPSC
  * @genpd_clk: clock reference owned by @pm_domain
@@ -86,6 +86,50 @@ struct davinci_lpsc_clk {
 #define to_davinci_psc_data(x) container_of(x, struct davinci_psc_data, x)
 #define to_davinci_lpsc_clk(x) container_of(x, struct davinci_lpsc_clk, x)
 
+static inline void *_devm_kzalloc(struct device *dev, size_t size, gfp_t flags)
+{
+   if (dev)
+   return devm_kzalloc(dev, size, flags);
+
+   return kzalloc(size, flags);
+}
+
+static inline void *_devm_kcalloc(struct device *dev, size_t n, size_t size,
+ gfp_t flags)
+{
+   if (dev)
+   return devm_kcalloc(dev, n, size, flags);
+
+   return kcalloc(n, size, flags);
+}
+
+static inline void *_devm_kmalloc_array(struct device *dev, size_t n,
+   size_t size, gfp_t flags)
+{
+   if (dev)
+   return devm_kmalloc_array(dev, n, size, flags);
+
+   return kmalloc_array(n, size, flags);
+}
+
+static inline int _devm_clk_hw_register(struct device *dev, struct clk_hw *hw)
+{
+   if (dev)
+   return devm_clk_hw_register(dev, hw);
+
+   return clk_hw_register(NULL, hw);
+}
+
+static inline struct regmap
+*_devm_regmap_init_mmio(struct device *dev, void __iomem *regs,
+   const struct regmap_config *config)
+{
+   if (dev)
+   return devm_regmap_init_mmio(dev, regs, config);
+
+   return regmap_init_mmio(NULL, regs, config);
+}
+
 /**
  * best_dev_name - get the "best" device name.
  * @dev: the device
@@ -221,6 +265,7 @@ static void davinci_psc_genpd_detach_dev(struct 
generic_pm_domain *pm_domain,
 
 /**
  * davinci_lpsc_clk_register - register LPSC clock
+ * @dev: the clocks's device or NULL
  * @name: name of this clock
  * @parent_name: name of clock's parent
  * @regmap: PSC MMIO region
@@ -238,7 +283,7 @@ 

[PATCH v9 03/27] clk: davinci: psc: allow for dev == NULL

[David Lechner]

On some davinci SoCs, we need to register the PSC clocks during early
boot because they are needed for clocksource/clockevent. These changes
allow for dev == NULL because in this case, we won't have a platform
device for the clocks.

Signed-off-by: David Lechner 
---

v9 changes:
- new patch in v9


 drivers/clk/davinci/psc-dm355.c  |  2 +-
 drivers/clk/davinci/psc-dm365.c  |  2 +-
 drivers/clk/davinci/psc-dm644x.c |  2 +-
 drivers/clk/davinci/psc-dm646x.c |  2 +-
 drivers/clk/davinci/psc.c| 70 
 include/linux/clk/davinci.h  |  5 +++
 6 files changed, 72 insertions(+), 11 deletions(-)

diff --git a/drivers/clk/davinci/psc-dm355.c b/drivers/clk/davinci/psc-dm355.c
index 6995ecea2677..001288dfdfb1 100644
--- a/drivers/clk/davinci/psc-dm355.c
+++ b/drivers/clk/davinci/psc-dm355.c
@@ -68,7 +68,7 @@ static const struct davinci_lpsc_clk_info dm355_psc_info[] = {
{ }
 };
 
-static int dm355_psc_init(struct device *dev, void __iomem *base)
+int dm355_psc_init(struct device *dev, void __iomem *base)
 {
return davinci_psc_register_clocks(dev, dm355_psc_info, 42, base);
 }
diff --git a/drivers/clk/davinci/psc-dm365.c b/drivers/clk/davinci/psc-dm365.c
index 3ad915f37376..5b5b55b0b59a 100644
--- a/drivers/clk/davinci/psc-dm365.c
+++ b/drivers/clk/davinci/psc-dm365.c
@@ -73,7 +73,7 @@ static const struct davinci_lpsc_clk_info dm365_psc_info[] = {
{ }
 };
 
-static int dm365_psc_init(struct device *dev, void __iomem *base)
+int dm365_psc_init(struct device *dev, void __iomem *base)
 {
return davinci_psc_register_clocks(dev, dm365_psc_info, 52, base);
 }
diff --git a/drivers/clk/davinci/psc-dm644x.c b/drivers/clk/davinci/psc-dm644x.c
index c22367baa46f..74668931be48 100644
--- a/drivers/clk/davinci/psc-dm644x.c
+++ b/drivers/clk/davinci/psc-dm644x.c
@@ -63,7 +63,7 @@ static const struct davinci_lpsc_clk_info dm644x_psc_info[] = 
{
{ }
 };
 
-static int dm644x_psc_init(struct device *dev, void __iomem *base)
+int dm644x_psc_init(struct device *dev, void __iomem *base)
 {
return davinci_psc_register_clocks(dev, dm644x_psc_info, 41, base);
 }
diff --git a/drivers/clk/davinci/psc-dm646x.c b/drivers/clk/davinci/psc-dm646x.c
index 468ef86ea40b..22473affa7cf 100644
--- a/drivers/clk/davinci/psc-dm646x.c
+++ b/drivers/clk/davinci/psc-dm646x.c
@@ -58,7 +58,7 @@ static const struct davinci_lpsc_clk_info dm646x_psc_info[] = 
{
{ }
 };
 
-static int dm646x_psc_init(struct device *dev, void __iomem *base)
+int dm646x_psc_init(struct device *dev, void __iomem *base)
 {
return davinci_psc_register_clocks(dev, dm646x_psc_info, 46, base);
 }
diff --git a/drivers/clk/davinci/psc.c b/drivers/clk/davinci/psc.c
index ce170e600f09..1d4bcdd6bba0 100644
--- a/drivers/clk/davinci/psc.c
+++ b/drivers/clk/davinci/psc.c
@@ -63,7 +63,7 @@ struct davinci_psc_data {
 
 /**
  * struct davinci_lpsc_clk - LPSC clock structure
- * @dev: the device that provides this LPSC
+ * @dev: the device that provides this LPSC or NULL
  * @hw: clk_hw for the LPSC
  * @pm_domain: power domain for the LPSC
  * @genpd_clk: clock reference owned by @pm_domain
@@ -86,6 +86,50 @@ struct davinci_lpsc_clk {
 #define to_davinci_psc_data(x) container_of(x, struct davinci_psc_data, x)
 #define to_davinci_lpsc_clk(x) container_of(x, struct davinci_lpsc_clk, x)
 
+static inline void *_devm_kzalloc(struct device *dev, size_t size, gfp_t flags)
+{
+   if (dev)
+   return devm_kzalloc(dev, size, flags);
+
+   return kzalloc(size, flags);
+}
+
+static inline void *_devm_kcalloc(struct device *dev, size_t n, size_t size,
+ gfp_t flags)
+{
+   if (dev)
+   return devm_kcalloc(dev, n, size, flags);
+
+   return kcalloc(n, size, flags);
+}
+
+static inline void *_devm_kmalloc_array(struct device *dev, size_t n,
+   size_t size, gfp_t flags)
+{
+   if (dev)
+   return devm_kmalloc_array(dev, n, size, flags);
+
+   return kmalloc_array(n, size, flags);
+}
+
+static inline int _devm_clk_hw_register(struct device *dev, struct clk_hw *hw)
+{
+   if (dev)
+   return devm_clk_hw_register(dev, hw);
+
+   return clk_hw_register(NULL, hw);
+}
+
+static inline struct regmap
+*_devm_regmap_init_mmio(struct device *dev, void __iomem *regs,
+   const struct regmap_config *config)
+{
+   if (dev)
+   return devm_regmap_init_mmio(dev, regs, config);
+
+   return regmap_init_mmio(NULL, regs, config);
+}
+
 /**
  * best_dev_name - get the "best" device name.
  * @dev: the device
@@ -221,6 +265,7 @@ static void davinci_psc_genpd_detach_dev(struct 
generic_pm_domain *pm_domain,
 
 /**
  * davinci_lpsc_clk_register - register LPSC clock
+ * @dev: the clocks's device or NULL
  * @name: name of this clock
  * @parent_name: name of clock's parent
  * @regmap: PSC MMIO region
@@ -238,7 +283,7 @@ 

[PATCH v9 01/27] clk: davinci: pll: allow dev == NULL

[David Lechner]

This modifies the TI DaVinci PLL clock driver to allow for the case
when dev == NULL. On some (most) SoCs that use this driver, the PLL
clock needs to be registered during early boot because it is used
for clocksource/clockevent and there will be no platform device available.

Signed-off-by: David Lechner 
---

v9 changes:
- new patch in v9


 drivers/clk/davinci/pll-da830.c  |   4 +-
 drivers/clk/davinci/pll-da850.c  |  21 ++---
 drivers/clk/davinci/pll-dm355.c  |   8 +-
 drivers/clk/davinci/pll-dm365.c  |   8 +-
 drivers/clk/davinci/pll-dm644x.c |   8 +-
 drivers/clk/davinci/pll-dm646x.c |   8 +-
 drivers/clk/davinci/pll.c| 130 +++
 drivers/clk/davinci/pll.h|  35 +
 include/linux/clk/davinci.h  |  24 ++
 9 files changed, 153 insertions(+), 93 deletions(-)
 create mode 100644 include/linux/clk/davinci.h

diff --git a/drivers/clk/davinci/pll-da830.c b/drivers/clk/davinci/pll-da830.c
index 929a3d3a9adb..76f62f2e5ccb 100644
--- a/drivers/clk/davinci/pll-da830.c
+++ b/drivers/clk/davinci/pll-da830.c
@@ -36,11 +36,11 @@ SYSCLK(5, pll0_sysclk5, pll0_pllen, 5, 0);
 SYSCLK(6, pll0_sysclk6, pll0_pllen, 5, SYSCLK_FIXED_DIV);
 SYSCLK(7, pll0_sysclk7, pll0_pllen, 5, 0);
 
-int da830_pll_init(struct device *dev, void __iomem *base)
+int da830_pll_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip)
 {
struct clk *clk;
 
-   davinci_pll_clk_register(dev, _pll_info, "ref_clk", base);
+   davinci_pll_clk_register(dev, _pll_info, "ref_clk", base, 
cfgchip);
 
clk = davinci_pll_sysclk_register(dev, _sysclk2, base);
clk_register_clkdev(clk, "pll0_sysclk2", "da830-psc0");
diff --git a/drivers/clk/davinci/pll-da850.c b/drivers/clk/davinci/pll-da850.c
index 2a038b7908cc..00a6ece7b524 100644
--- a/drivers/clk/davinci/pll-da850.c
+++ b/drivers/clk/davinci/pll-da850.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -81,11 +82,11 @@ static const struct davinci_pll_obsclk_info 
da850_pll0_obsclk_info = {
.ocsrc_mask = GENMASK(4, 0),
 };
 
-int da850_pll0_init(struct device *dev, void __iomem *base)
+int da850_pll0_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip)
 {
struct clk *clk;
 
-   davinci_pll_clk_register(dev, _pll0_info, "ref_clk", base);
+   davinci_pll_clk_register(dev, _pll0_info, "ref_clk", base, 
cfgchip);
 
clk = davinci_pll_sysclk_register(dev, _sysclk1, base);
clk_register_clkdev(clk, "pll0_sysclk1", "da850-psc0");
@@ -134,11 +135,11 @@ static const struct davinci_pll_sysclk_info 
*da850_pll0_sysclk_info[] = {
NULL
 };
 
-int of_da850_pll0_init(struct device *dev, void __iomem *base)
+int of_da850_pll0_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip)
 {
-   return of_davinci_pll_init(dev, _pll0_info,
+   return of_davinci_pll_init(dev, dev->of_node, _pll0_info,
   _pll0_obsclk_info,
-  da850_pll0_sysclk_info, 7, base);
+  da850_pll0_sysclk_info, 7, base, cfgchip);
 }
 
 static const struct davinci_pll_clk_info da850_pll1_info = {
@@ -179,11 +180,11 @@ static const struct davinci_pll_obsclk_info 
da850_pll1_obsclk_info = {
.ocsrc_mask = GENMASK(4, 0),
 };
 
-int da850_pll1_init(struct device *dev, void __iomem *base)
+int da850_pll1_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip)
 {
struct clk *clk;
 
-   davinci_pll_clk_register(dev, _pll1_info, "oscin", base);
+   davinci_pll_clk_register(dev, _pll1_info, "oscin", base, cfgchip);
 
davinci_pll_sysclk_register(dev, _sysclk1, base);
 
@@ -204,9 +205,9 @@ static const struct davinci_pll_sysclk_info 
*da850_pll1_sysclk_info[] = {
NULL
 };
 
-int of_da850_pll1_init(struct device *dev, void __iomem *base)
+int of_da850_pll1_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip)
 {
-   return of_davinci_pll_init(dev, _pll1_info,
+   return of_davinci_pll_init(dev, dev->of_node, _pll1_info,
   _pll1_obsclk_info,
-  da850_pll1_sysclk_info, 3, base);
+  da850_pll1_sysclk_info, 3, base, cfgchip);
 }
diff --git a/drivers/clk/davinci/pll-dm355.c b/drivers/clk/davinci/pll-dm355.c
index 5345f8286c50..a0cff4212ac3 100644
--- a/drivers/clk/davinci/pll-dm355.c
+++ b/drivers/clk/davinci/pll-dm355.c
@@ -27,11 +27,11 @@ SYSCLK(2, pll1_sysclk2, pll1, 5, SYSCLK_FIXED_DIV | 
SYSCLK_ALWAYS_ENABLED);
 SYSCLK(3, pll1_sysclk3, pll1, 5, SYSCLK_ALWAYS_ENABLED);
 SYSCLK(4, pll1_sysclk4, pll1, 5, SYSCLK_ALWAYS_ENABLED);
 
-int dm355_pll1_init(struct device *dev, void __iomem *base)
+int dm355_pll1_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip)
 {
struct clk *clk;
 
-   davinci_pll_clk_register(dev, _pll1_info, 

[PATCH v9 01/27] clk: davinci: pll: allow dev == NULL

[David Lechner]

This modifies the TI DaVinci PLL clock driver to allow for the case
when dev == NULL. On some (most) SoCs that use this driver, the PLL
clock needs to be registered during early boot because it is used
for clocksource/clockevent and there will be no platform device available.

Signed-off-by: David Lechner 
---

v9 changes:
- new patch in v9


 drivers/clk/davinci/pll-da830.c  |   4 +-
 drivers/clk/davinci/pll-da850.c  |  21 ++---
 drivers/clk/davinci/pll-dm355.c  |   8 +-
 drivers/clk/davinci/pll-dm365.c  |   8 +-
 drivers/clk/davinci/pll-dm644x.c |   8 +-
 drivers/clk/davinci/pll-dm646x.c |   8 +-
 drivers/clk/davinci/pll.c| 130 +++
 drivers/clk/davinci/pll.h|  35 +
 include/linux/clk/davinci.h  |  24 ++
 9 files changed, 153 insertions(+), 93 deletions(-)
 create mode 100644 include/linux/clk/davinci.h

diff --git a/drivers/clk/davinci/pll-da830.c b/drivers/clk/davinci/pll-da830.c
index 929a3d3a9adb..76f62f2e5ccb 100644
--- a/drivers/clk/davinci/pll-da830.c
+++ b/drivers/clk/davinci/pll-da830.c
@@ -36,11 +36,11 @@ SYSCLK(5, pll0_sysclk5, pll0_pllen, 5, 0);
 SYSCLK(6, pll0_sysclk6, pll0_pllen, 5, SYSCLK_FIXED_DIV);
 SYSCLK(7, pll0_sysclk7, pll0_pllen, 5, 0);
 
-int da830_pll_init(struct device *dev, void __iomem *base)
+int da830_pll_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip)
 {
struct clk *clk;
 
-   davinci_pll_clk_register(dev, _pll_info, "ref_clk", base);
+   davinci_pll_clk_register(dev, _pll_info, "ref_clk", base, 
cfgchip);
 
clk = davinci_pll_sysclk_register(dev, _sysclk2, base);
clk_register_clkdev(clk, "pll0_sysclk2", "da830-psc0");
diff --git a/drivers/clk/davinci/pll-da850.c b/drivers/clk/davinci/pll-da850.c
index 2a038b7908cc..00a6ece7b524 100644
--- a/drivers/clk/davinci/pll-da850.c
+++ b/drivers/clk/davinci/pll-da850.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -81,11 +82,11 @@ static const struct davinci_pll_obsclk_info 
da850_pll0_obsclk_info = {
.ocsrc_mask = GENMASK(4, 0),
 };
 
-int da850_pll0_init(struct device *dev, void __iomem *base)
+int da850_pll0_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip)
 {
struct clk *clk;
 
-   davinci_pll_clk_register(dev, _pll0_info, "ref_clk", base);
+   davinci_pll_clk_register(dev, _pll0_info, "ref_clk", base, 
cfgchip);
 
clk = davinci_pll_sysclk_register(dev, _sysclk1, base);
clk_register_clkdev(clk, "pll0_sysclk1", "da850-psc0");
@@ -134,11 +135,11 @@ static const struct davinci_pll_sysclk_info 
*da850_pll0_sysclk_info[] = {
NULL
 };
 
-int of_da850_pll0_init(struct device *dev, void __iomem *base)
+int of_da850_pll0_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip)
 {
-   return of_davinci_pll_init(dev, _pll0_info,
+   return of_davinci_pll_init(dev, dev->of_node, _pll0_info,
   _pll0_obsclk_info,
-  da850_pll0_sysclk_info, 7, base);
+  da850_pll0_sysclk_info, 7, base, cfgchip);
 }
 
 static const struct davinci_pll_clk_info da850_pll1_info = {
@@ -179,11 +180,11 @@ static const struct davinci_pll_obsclk_info 
da850_pll1_obsclk_info = {
.ocsrc_mask = GENMASK(4, 0),
 };
 
-int da850_pll1_init(struct device *dev, void __iomem *base)
+int da850_pll1_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip)
 {
struct clk *clk;
 
-   davinci_pll_clk_register(dev, _pll1_info, "oscin", base);
+   davinci_pll_clk_register(dev, _pll1_info, "oscin", base, cfgchip);
 
davinci_pll_sysclk_register(dev, _sysclk1, base);
 
@@ -204,9 +205,9 @@ static const struct davinci_pll_sysclk_info 
*da850_pll1_sysclk_info[] = {
NULL
 };
 
-int of_da850_pll1_init(struct device *dev, void __iomem *base)
+int of_da850_pll1_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip)
 {
-   return of_davinci_pll_init(dev, _pll1_info,
+   return of_davinci_pll_init(dev, dev->of_node, _pll1_info,
   _pll1_obsclk_info,
-  da850_pll1_sysclk_info, 3, base);
+  da850_pll1_sysclk_info, 3, base, cfgchip);
 }
diff --git a/drivers/clk/davinci/pll-dm355.c b/drivers/clk/davinci/pll-dm355.c
index 5345f8286c50..a0cff4212ac3 100644
--- a/drivers/clk/davinci/pll-dm355.c
+++ b/drivers/clk/davinci/pll-dm355.c
@@ -27,11 +27,11 @@ SYSCLK(2, pll1_sysclk2, pll1, 5, SYSCLK_FIXED_DIV | 
SYSCLK_ALWAYS_ENABLED);
 SYSCLK(3, pll1_sysclk3, pll1, 5, SYSCLK_ALWAYS_ENABLED);
 SYSCLK(4, pll1_sysclk4, pll1, 5, SYSCLK_ALWAYS_ENABLED);
 
-int dm355_pll1_init(struct device *dev, void __iomem *base)
+int dm355_pll1_init(struct device *dev, void __iomem *base, struct regmap 
*cfgchip)
 {
struct clk *clk;
 
-   davinci_pll_clk_register(dev, _pll1_info, "ref_clk", base);
+   

[PATCH v9 07/27] ARM: davinci: dm355: add new clock init using common clock framework

[David Lechner]

This adds the new board-specific clock init in mach-davinci/dm355.c
using the new common clock framework drivers.

The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.

Also clean up the #includes since we are adding some here.

Signed-off-by: David Lechner 
---

v9 changes:
- register PLL1 and PSC in dm355_init_time() instead of as platform device so
  that we get the correct timer0 clock for davinci_timer_init()
- Fixed size of PLL memory block

v8 changes:
- none

v7 changes:
- add clock platform device declarations
- register platform devices instead of registering clocks directly
- add davinci prefix to commit description

v6 changes:
- add blank lines between function calls


 arch/arm/mach-davinci/board-dm355-evm.c |  2 +
 arch/arm/mach-davinci/board-dm355-leopard.c |  2 +
 arch/arm/mach-davinci/davinci.h |  1 +
 arch/arm/mach-davinci/dm355.c   | 69 +
 4 files changed, 62 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-davinci/board-dm355-evm.c 
b/arch/arm/mach-davinci/board-dm355-evm.c
index cb30637d9eaf..ea03ddcd35f5 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -384,6 +384,8 @@ static __init void dm355_evm_init(void)
struct clk *aemif;
int ret;
 
+   dm355_register_clocks();
+
ret = dm355_gpio_register();
if (ret)
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c 
b/arch/arm/mach-davinci/board-dm355-leopard.c
index 59743bd76793..09f82160bbed 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -233,6 +233,8 @@ static __init void dm355_leopard_init(void)
struct clk *aemif;
int ret;
 
+   dm355_register_clocks();
+
ret = dm355_gpio_register();
if (ret)
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index 376cdd51ce9d..c2c634b6578e 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -84,6 +84,7 @@ int davinci_init_wdt(void);
 /* DM355 function declarations */
 void dm355_init(void);
 void dm355_init_time(void);
+void dm355_register_clocks(void);
 void dm355_init_spi0(unsigned chipselect_mask,
const struct spi_board_info *info, unsigned len);
 void dm355_init_asp1(u32 evt_enable);
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 0da7516018ca..14014b942e8a 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -8,31 +8,37 @@
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
  */
-#include 
-#include 
-#include 
-#include 
+
+#include 
+#include 
+#include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 #include 
 
+#include 
 #include 
-#include "psc.h"
-#include 
 #include 
-#include 
+#include 
 #include 
-#include 
+#include 
 
+#include "asp.h"
 #include "davinci.h"
-#include "clock.h"
 #include "mux.h"
-#include "asp.h"
+
+#ifndef CONFIG_COMMON_CLK
+#include "clock.h"
+#include "psc.h"
+#endif
 
 #define DM355_UART2_BASE   (IO_PHYS + 0x206000)
 #define DM355_OSD_BASE (IO_PHYS + 0x70200)
@@ -43,6 +49,7 @@
  */
 #define DM355_REF_FREQ 2400/* 24 or 36 MHz */
 
+#ifndef CONFIG_COMMON_CLK
 static struct pll_data pll1_data = {
.num   = 1,
.phys_base = DAVINCI_PLL1_BASE,
@@ -382,7 +389,7 @@ static struct clk_lookup dm355_clks[] = {
CLK(NULL, "usb", _clk),
CLK(NULL, NULL, NULL),
 };
-
+#endif
 /*--*/
 
 static u64 dm355_spi0_dma_mask = DMA_BIT_MASK(32);
@@ -1046,8 +1053,46 @@ void __init dm355_init(void)
 
 void __init dm355_init_time(void)
 {
+#ifdef CONFIG_COMMON_CLK
+   void __iomem *pll1, *psc;
+   struct clk *clk;
+
+   clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM355_REF_FREQ);
+
+   pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K);
+   dm355_pll1_init(NULL, pll1, NULL);
+
+   psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K);
+   dm355_psc_init(NULL, psc);
+
+   clk = clk_get(NULL, "timer0");
+
+   davinci_timer_init(clk);
+#else
davinci_clk_init(dm355_clks);
davinci_timer_init(_clk);
+#endif
+}
+
+static struct resource dm355_pll2_resources[] = {
+   {
+   .start  = DAVINCI_PLL2_BASE,
+   .end= DAVINCI_PLL2_BASE + SZ_1K - 1,
+   .flags  = IORESOURCE_MEM,
+   },
+};
+
+static struct platform_device dm355_pll2_device = {
+   .name   = "dm355-pll2",
+   .id = -1,
+   .resource   = dm355_pll2_resources,
+   .num_resources  = 

[PATCH v9 04/27] ARM: davinci: pass clock as parameter to davinci_timer_init()

[David Lechner]

This changes davinci_timer_init() so that we pass the clock as a
parameter instead of using clk_get(). This is done in preparation
for converting to the common clock framework.

It removes the requirement that we have to have a clock with con_id
of "timer0", which will be good for DT bindings since clock-names =
"timer0" doesn't really make sense.

Also, drop use of extern in header file since we are touching the
definition.

Signed-off-by: David Lechner 
---

v9 changes:
- drop comment about using ref_clk

v8 changes:
- none

v7 changes:
- new in v7


 arch/arm/mach-davinci/da830.c   | 2 +-
 arch/arm/mach-davinci/da850.c   | 2 +-
 arch/arm/mach-davinci/dm355.c   | 2 +-
 arch/arm/mach-davinci/dm365.c   | 2 +-
 arch/arm/mach-davinci/dm644x.c  | 2 +-
 arch/arm/mach-davinci/dm646x.c  | 2 +-
 arch/arm/mach-davinci/include/mach/common.h | 3 ++-
 arch/arm/mach-davinci/time.c| 5 +
 8 files changed, 9 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 350d7673aa4d..0b17e5a22e5e 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -1224,5 +1224,5 @@ void __init da830_init(void)
 void __init da830_init_time(void)
 {
davinci_clk_init(da830_clks);
-   davinci_timer_init();
+   davinci_timer_init(_0_clk);
 }
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 34117e614e08..1dbf01c4124b 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -1396,5 +1396,5 @@ void __init da850_init(void)
 void __init da850_init_time(void)
 {
davinci_clk_init(da850_clks);
-   davinci_timer_init();
+   davinci_timer_init(_0_clk);
 }
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index f29480495c18..0da7516018ca 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -1047,7 +1047,7 @@ void __init dm355_init(void)
 void __init dm355_init_time(void)
 {
davinci_clk_init(dm355_clks);
-   davinci_timer_init();
+   davinci_timer_init(_clk);
 }
 
 int __init dm355_init_video(struct vpfe_config *vpfe_cfg,
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 1e3df9df1e10..871372a59da8 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1172,7 +1172,7 @@ void __init dm365_init(void)
 void __init dm365_init_time(void)
 {
davinci_clk_init(dm365_clks);
-   davinci_timer_init();
+   davinci_timer_init(_clk);
 }
 
 static struct resource dm365_vpss_resources[] = {
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index a2e8586c8a6d..708df0ed8554 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -935,7 +935,7 @@ void __init dm644x_init(void)
 void __init dm644x_init_time(void)
 {
davinci_clk_init(dm644x_clks);
-   davinci_timer_init();
+   davinci_timer_init(_clk);
 }
 
 int __init dm644x_init_video(struct vpfe_config *vpfe_cfg,
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 109ab1fa0d2c..e1d6e92f434a 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -956,7 +956,7 @@ void __init dm646x_init_time(unsigned long ref_clk_rate,
ref_clk.rate = ref_clk_rate;
aux_clkin.rate = aux_clkin_rate;
davinci_clk_init(dm646x_clks);
-   davinci_timer_init();
+   davinci_timer_init(_clk);
 }
 
 static int __init dm646x_init_devices(void)
diff --git a/arch/arm/mach-davinci/include/mach/common.h 
b/arch/arm/mach-davinci/include/mach/common.h
index f0d5e858f158..5f45d0ac66a8 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -12,11 +12,12 @@
 #ifndef __ARCH_ARM_MACH_DAVINCI_COMMON_H
 #define __ARCH_ARM_MACH_DAVINCI_COMMON_H
 
+#include 
 #include 
 #include 
 #include 
 
-extern void davinci_timer_init(void);
+void davinci_timer_init(struct clk *clk);
 
 extern void davinci_irq_init(void);
 extern void __iomem *davinci_intc_base;
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 1bb991ad9c1e..486896f309c5 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -334,10 +334,8 @@ static struct clock_event_device clockevent_davinci = {
.set_state_oneshot  = davinci_set_oneshot,
 };
 
-
-void __init davinci_timer_init(void)
+void __init davinci_timer_init(struct clk *timer_clk)
 {
-   struct clk *timer_clk;
struct davinci_soc_info *soc_info = _soc_info;
unsigned int clockevent_id;
unsigned int clocksource_id;
@@ -373,7 +371,6 @@ void __init davinci_timer_init(void)
}
}
 
-   timer_clk = clk_get(NULL, "timer0");
BUG_ON(IS_ERR(timer_clk));
clk_prepare_enable(timer_clk);
 
-- 
2.17.0

[PATCH v9 05/27] ARM: davinci: da830: add new clock init using common clock framework

[David Lechner]

This adds the new board-specific clock init in mach-davinci/da830.c
using the new common clock framework drivers.

The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.

Also clean up the #includes since we are adding some here.

Signed-off-by: David Lechner 
---

v9 changes:
- register PLL in da830_init_time() instead of as platform device so that we
  get the correct timer0 clock for davinci_timer_init()

v8 changes:
- none

v7 changes:
- add clock platform device declarations
- register platform devices instead of registering clocks directly
- clkdev lookup is moved to drivers/clk
- add davinci prefix to commit description

v6 changes:
- add blank lines between function calls
- include da8xx_register_cfgchip()


 arch/arm/mach-davinci/board-da830-evm.c|  2 +
 arch/arm/mach-davinci/da830.c  | 70 --
 arch/arm/mach-davinci/include/mach/da8xx.h |  1 +
 3 files changed, 67 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da830-evm.c 
b/arch/arm/mach-davinci/board-da830-evm.c
index 004f9c8de032..3973124e5f1d 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -551,6 +551,8 @@ static __init void da830_evm_init(void)
struct davinci_soc_info *soc_info = _soc_info;
int ret;
 
+   da830_register_clocks();
+
ret = da830_register_gpio();
if (ret)
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 0b17e5a22e5e..8a79e245db1f 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -8,23 +8,27 @@
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
  */
+#include 
+#include 
 #include 
 #include 
-#include 
 #include 
 
 #include 
 
-#include "psc.h"
-#include 
-#include 
 #include 
-#include 
+#include 
 #include 
+#include 
+#include 
 
-#include "clock.h"
 #include "mux.h"
 
+#ifndef CONFIG_COMMON_CLK
+#include "clock.h"
+#include "psc.h"
+#endif
+
 /* Offsets of the 8 compare registers on the da830 */
 #define DA830_CMP12_0  0x60
 #define DA830_CMP12_1  0x64
@@ -37,6 +41,7 @@
 
 #define DA830_REF_FREQ 2400
 
+#ifndef CONFIG_COMMON_CLK
 static struct pll_data pll0_data = {
.num= 1,
.phys_base  = DA8XX_PLL0_BASE,
@@ -432,6 +437,7 @@ static struct clk_lookup da830_clks[] = {
CLK(NULL,   "rmii", _clk),
CLK(NULL,   NULL,   NULL),
 };
+#endif
 
 /*
  * Device specific mux setup
@@ -1223,6 +1229,58 @@ void __init da830_init(void)
 
 void __init da830_init_time(void)
 {
+#ifdef CONFIG_COMMON_CLK
+   void __iomem *pll;
+   struct clk *clk;
+
+   clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DA830_REF_FREQ);
+
+   pll = ioremap(DA8XX_PLL0_BASE, SZ_4K);
+
+   da830_pll_init(NULL, pll, NULL);
+
+   clk = clk_get(NULL, "timer0");
+
+   davinci_timer_init(clk);
+#else
davinci_clk_init(da830_clks);
davinci_timer_init(_0_clk);
+#endif
+}
+
+static struct resource da830_psc0_resources[] = {
+   {
+   .start  = DA8XX_PSC0_BASE,
+   .end= DA8XX_PSC0_BASE + SZ_4K - 1,
+   .flags  = IORESOURCE_MEM,
+   },
+};
+
+static struct platform_device da830_psc0_device = {
+   .name   = "da830-psc0",
+   .id = -1,
+   .resource   = da830_psc0_resources,
+   .num_resources  = ARRAY_SIZE(da830_psc0_resources),
+};
+
+static struct resource da830_psc1_resources[] = {
+   {
+   .start  = DA8XX_PSC1_BASE,
+   .end= DA8XX_PSC1_BASE + SZ_4K - 1,
+   .flags  = IORESOURCE_MEM,
+   },
+};
+
+static struct platform_device da830_psc1_device = {
+   .name   = "da830-psc1",
+   .id = -1,
+   .resource   = da830_psc1_resources,
+   .num_resources  = ARRAY_SIZE(da830_psc1_resources),
+};
+
+void __init da830_register_clocks(void)
+{
+   /* PLL is registered in da830_init_time() */
+   platform_device_register(_psc0_device);
+   platform_device_register(_psc1_device);
 }
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h 
b/arch/arm/mach-davinci/include/mach/da8xx.h
index 9fd6d0125762..64861ac6a9d4 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -89,6 +89,7 @@ extern unsigned int da850_max_speed;
 
 void da830_init(void);
 void da830_init_time(void);
+void da830_register_clocks(void);
 
 void da850_init(void);
 void da850_init_time(void);
-- 
2.17.0

[PATCH v9 04/27] ARM: davinci: pass clock as parameter to davinci_timer_init()

[David Lechner]

This changes davinci_timer_init() so that we pass the clock as a
parameter instead of using clk_get(). This is done in preparation
for converting to the common clock framework.

It removes the requirement that we have to have a clock with con_id
of "timer0", which will be good for DT bindings since clock-names =
"timer0" doesn't really make sense.

Also, drop use of extern in header file since we are touching the
definition.

Signed-off-by: David Lechner 
---

v9 changes:
- drop comment about using ref_clk

v8 changes:
- none

v7 changes:
- new in v7


 arch/arm/mach-davinci/da830.c   | 2 +-
 arch/arm/mach-davinci/da850.c   | 2 +-
 arch/arm/mach-davinci/dm355.c   | 2 +-
 arch/arm/mach-davinci/dm365.c   | 2 +-
 arch/arm/mach-davinci/dm644x.c  | 2 +-
 arch/arm/mach-davinci/dm646x.c  | 2 +-
 arch/arm/mach-davinci/include/mach/common.h | 3 ++-
 arch/arm/mach-davinci/time.c| 5 +
 8 files changed, 9 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 350d7673aa4d..0b17e5a22e5e 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -1224,5 +1224,5 @@ void __init da830_init(void)
 void __init da830_init_time(void)
 {
davinci_clk_init(da830_clks);
-   davinci_timer_init();
+   davinci_timer_init(_0_clk);
 }
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 34117e614e08..1dbf01c4124b 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -1396,5 +1396,5 @@ void __init da850_init(void)
 void __init da850_init_time(void)
 {
davinci_clk_init(da850_clks);
-   davinci_timer_init();
+   davinci_timer_init(_0_clk);
 }
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index f29480495c18..0da7516018ca 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -1047,7 +1047,7 @@ void __init dm355_init(void)
 void __init dm355_init_time(void)
 {
davinci_clk_init(dm355_clks);
-   davinci_timer_init();
+   davinci_timer_init(_clk);
 }
 
 int __init dm355_init_video(struct vpfe_config *vpfe_cfg,
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 1e3df9df1e10..871372a59da8 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1172,7 +1172,7 @@ void __init dm365_init(void)
 void __init dm365_init_time(void)
 {
davinci_clk_init(dm365_clks);
-   davinci_timer_init();
+   davinci_timer_init(_clk);
 }
 
 static struct resource dm365_vpss_resources[] = {
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index a2e8586c8a6d..708df0ed8554 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -935,7 +935,7 @@ void __init dm644x_init(void)
 void __init dm644x_init_time(void)
 {
davinci_clk_init(dm644x_clks);
-   davinci_timer_init();
+   davinci_timer_init(_clk);
 }
 
 int __init dm644x_init_video(struct vpfe_config *vpfe_cfg,
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 109ab1fa0d2c..e1d6e92f434a 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -956,7 +956,7 @@ void __init dm646x_init_time(unsigned long ref_clk_rate,
ref_clk.rate = ref_clk_rate;
aux_clkin.rate = aux_clkin_rate;
davinci_clk_init(dm646x_clks);
-   davinci_timer_init();
+   davinci_timer_init(_clk);
 }
 
 static int __init dm646x_init_devices(void)
diff --git a/arch/arm/mach-davinci/include/mach/common.h 
b/arch/arm/mach-davinci/include/mach/common.h
index f0d5e858f158..5f45d0ac66a8 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -12,11 +12,12 @@
 #ifndef __ARCH_ARM_MACH_DAVINCI_COMMON_H
 #define __ARCH_ARM_MACH_DAVINCI_COMMON_H
 
+#include 
 #include 
 #include 
 #include 
 
-extern void davinci_timer_init(void);
+void davinci_timer_init(struct clk *clk);
 
 extern void davinci_irq_init(void);
 extern void __iomem *davinci_intc_base;
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 1bb991ad9c1e..486896f309c5 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -334,10 +334,8 @@ static struct clock_event_device clockevent_davinci = {
.set_state_oneshot  = davinci_set_oneshot,
 };
 
-
-void __init davinci_timer_init(void)
+void __init davinci_timer_init(struct clk *timer_clk)
 {
-   struct clk *timer_clk;
struct davinci_soc_info *soc_info = _soc_info;
unsigned int clockevent_id;
unsigned int clocksource_id;
@@ -373,7 +371,6 @@ void __init davinci_timer_init(void)
}
}
 
-   timer_clk = clk_get(NULL, "timer0");
BUG_ON(IS_ERR(timer_clk));
clk_prepare_enable(timer_clk);
 
-- 
2.17.0

[PATCH v9 05/27] ARM: davinci: da830: add new clock init using common clock framework

[David Lechner]

This adds the new board-specific clock init in mach-davinci/da830.c
using the new common clock framework drivers.

The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.

Also clean up the #includes since we are adding some here.

Signed-off-by: David Lechner 
---

v9 changes:
- register PLL in da830_init_time() instead of as platform device so that we
  get the correct timer0 clock for davinci_timer_init()

v8 changes:
- none

v7 changes:
- add clock platform device declarations
- register platform devices instead of registering clocks directly
- clkdev lookup is moved to drivers/clk
- add davinci prefix to commit description

v6 changes:
- add blank lines between function calls
- include da8xx_register_cfgchip()


 arch/arm/mach-davinci/board-da830-evm.c|  2 +
 arch/arm/mach-davinci/da830.c  | 70 --
 arch/arm/mach-davinci/include/mach/da8xx.h |  1 +
 3 files changed, 67 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da830-evm.c 
b/arch/arm/mach-davinci/board-da830-evm.c
index 004f9c8de032..3973124e5f1d 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -551,6 +551,8 @@ static __init void da830_evm_init(void)
struct davinci_soc_info *soc_info = _soc_info;
int ret;
 
+   da830_register_clocks();
+
ret = da830_register_gpio();
if (ret)
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 0b17e5a22e5e..8a79e245db1f 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -8,23 +8,27 @@
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
  */
+#include 
+#include 
 #include 
 #include 
-#include 
 #include 
 
 #include 
 
-#include "psc.h"
-#include 
-#include 
 #include 
-#include 
+#include 
 #include 
+#include 
+#include 
 
-#include "clock.h"
 #include "mux.h"
 
+#ifndef CONFIG_COMMON_CLK
+#include "clock.h"
+#include "psc.h"
+#endif
+
 /* Offsets of the 8 compare registers on the da830 */
 #define DA830_CMP12_0  0x60
 #define DA830_CMP12_1  0x64
@@ -37,6 +41,7 @@
 
 #define DA830_REF_FREQ 2400
 
+#ifndef CONFIG_COMMON_CLK
 static struct pll_data pll0_data = {
.num= 1,
.phys_base  = DA8XX_PLL0_BASE,
@@ -432,6 +437,7 @@ static struct clk_lookup da830_clks[] = {
CLK(NULL,   "rmii", _clk),
CLK(NULL,   NULL,   NULL),
 };
+#endif
 
 /*
  * Device specific mux setup
@@ -1223,6 +1229,58 @@ void __init da830_init(void)
 
 void __init da830_init_time(void)
 {
+#ifdef CONFIG_COMMON_CLK
+   void __iomem *pll;
+   struct clk *clk;
+
+   clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DA830_REF_FREQ);
+
+   pll = ioremap(DA8XX_PLL0_BASE, SZ_4K);
+
+   da830_pll_init(NULL, pll, NULL);
+
+   clk = clk_get(NULL, "timer0");
+
+   davinci_timer_init(clk);
+#else
davinci_clk_init(da830_clks);
davinci_timer_init(_0_clk);
+#endif
+}
+
+static struct resource da830_psc0_resources[] = {
+   {
+   .start  = DA8XX_PSC0_BASE,
+   .end= DA8XX_PSC0_BASE + SZ_4K - 1,
+   .flags  = IORESOURCE_MEM,
+   },
+};
+
+static struct platform_device da830_psc0_device = {
+   .name   = "da830-psc0",
+   .id = -1,
+   .resource   = da830_psc0_resources,
+   .num_resources  = ARRAY_SIZE(da830_psc0_resources),
+};
+
+static struct resource da830_psc1_resources[] = {
+   {
+   .start  = DA8XX_PSC1_BASE,
+   .end= DA8XX_PSC1_BASE + SZ_4K - 1,
+   .flags  = IORESOURCE_MEM,
+   },
+};
+
+static struct platform_device da830_psc1_device = {
+   .name   = "da830-psc1",
+   .id = -1,
+   .resource   = da830_psc1_resources,
+   .num_resources  = ARRAY_SIZE(da830_psc1_resources),
+};
+
+void __init da830_register_clocks(void)
+{
+   /* PLL is registered in da830_init_time() */
+   platform_device_register(_psc0_device);
+   platform_device_register(_psc1_device);
 }
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h 
b/arch/arm/mach-davinci/include/mach/da8xx.h
index 9fd6d0125762..64861ac6a9d4 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -89,6 +89,7 @@ extern unsigned int da850_max_speed;
 
 void da830_init(void);
 void da830_init_time(void);
+void da830_register_clocks(void);
 
 void da850_init(void);
 void da850_init_time(void);
-- 
2.17.0

[PATCH v9 07/27] ARM: davinci: dm355: add new clock init using common clock framework

[David Lechner]

This adds the new board-specific clock init in mach-davinci/dm355.c
using the new common clock framework drivers.

The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.

Also clean up the #includes since we are adding some here.

Signed-off-by: David Lechner 
---

v9 changes:
- register PLL1 and PSC in dm355_init_time() instead of as platform device so
  that we get the correct timer0 clock for davinci_timer_init()
- Fixed size of PLL memory block

v8 changes:
- none

v7 changes:
- add clock platform device declarations
- register platform devices instead of registering clocks directly
- add davinci prefix to commit description

v6 changes:
- add blank lines between function calls


 arch/arm/mach-davinci/board-dm355-evm.c |  2 +
 arch/arm/mach-davinci/board-dm355-leopard.c |  2 +
 arch/arm/mach-davinci/davinci.h |  1 +
 arch/arm/mach-davinci/dm355.c   | 69 +
 4 files changed, 62 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-davinci/board-dm355-evm.c 
b/arch/arm/mach-davinci/board-dm355-evm.c
index cb30637d9eaf..ea03ddcd35f5 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -384,6 +384,8 @@ static __init void dm355_evm_init(void)
struct clk *aemif;
int ret;
 
+   dm355_register_clocks();
+
ret = dm355_gpio_register();
if (ret)
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c 
b/arch/arm/mach-davinci/board-dm355-leopard.c
index 59743bd76793..09f82160bbed 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -233,6 +233,8 @@ static __init void dm355_leopard_init(void)
struct clk *aemif;
int ret;
 
+   dm355_register_clocks();
+
ret = dm355_gpio_register();
if (ret)
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index 376cdd51ce9d..c2c634b6578e 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -84,6 +84,7 @@ int davinci_init_wdt(void);
 /* DM355 function declarations */
 void dm355_init(void);
 void dm355_init_time(void);
+void dm355_register_clocks(void);
 void dm355_init_spi0(unsigned chipselect_mask,
const struct spi_board_info *info, unsigned len);
 void dm355_init_asp1(u32 evt_enable);
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 0da7516018ca..14014b942e8a 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -8,31 +8,37 @@
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
  */
-#include 
-#include 
-#include 
-#include 
+
+#include 
+#include 
+#include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 #include 
 
+#include 
 #include 
-#include "psc.h"
-#include 
 #include 
-#include 
+#include 
 #include 
-#include 
+#include 
 
+#include "asp.h"
 #include "davinci.h"
-#include "clock.h"
 #include "mux.h"
-#include "asp.h"
+
+#ifndef CONFIG_COMMON_CLK
+#include "clock.h"
+#include "psc.h"
+#endif
 
 #define DM355_UART2_BASE   (IO_PHYS + 0x206000)
 #define DM355_OSD_BASE (IO_PHYS + 0x70200)
@@ -43,6 +49,7 @@
  */
 #define DM355_REF_FREQ 2400/* 24 or 36 MHz */
 
+#ifndef CONFIG_COMMON_CLK
 static struct pll_data pll1_data = {
.num   = 1,
.phys_base = DAVINCI_PLL1_BASE,
@@ -382,7 +389,7 @@ static struct clk_lookup dm355_clks[] = {
CLK(NULL, "usb", _clk),
CLK(NULL, NULL, NULL),
 };
-
+#endif
 /*--*/
 
 static u64 dm355_spi0_dma_mask = DMA_BIT_MASK(32);
@@ -1046,8 +1053,46 @@ void __init dm355_init(void)
 
 void __init dm355_init_time(void)
 {
+#ifdef CONFIG_COMMON_CLK
+   void __iomem *pll1, *psc;
+   struct clk *clk;
+
+   clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM355_REF_FREQ);
+
+   pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K);
+   dm355_pll1_init(NULL, pll1, NULL);
+
+   psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K);
+   dm355_psc_init(NULL, psc);
+
+   clk = clk_get(NULL, "timer0");
+
+   davinci_timer_init(clk);
+#else
davinci_clk_init(dm355_clks);
davinci_timer_init(_clk);
+#endif
+}
+
+static struct resource dm355_pll2_resources[] = {
+   {
+   .start  = DAVINCI_PLL2_BASE,
+   .end= DAVINCI_PLL2_BASE + SZ_1K - 1,
+   .flags  = IORESOURCE_MEM,
+   },
+};
+
+static struct platform_device dm355_pll2_device = {
+   .name   = "dm355-pll2",
+   .id = -1,
+   .resource   = dm355_pll2_resources,
+   .num_resources  = ARRAY_SIZE(dm355_pll2_resources),
+};
+

[PATCH v9 08/27] ARM: davinci: dm365: add new clock init using common clock framework

[David Lechner]

This adds the new board-specific clock init in mach-davinci/dm365.c
using the new common clock framework drivers.

The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.

Also clean up the #includes since we are adding some here.

Signed-off-by: David Lechner 
---

v9 changes:
- register PLL1 and PSC in dm365_init_time() instead of as platform device so
  that we get the correct timer0 clock for davinci_timer_init()
- Fixed size of PLL memory block

v8 changes:
- none

v7 changes:
- add clock platform device declarations
- register platform devices instead of registering clocks directly
- add davinci prefix to commit description

v6 changes:
- add blank lines between function calls


 arch/arm/mach-davinci/board-dm365-evm.c |  2 +
 arch/arm/mach-davinci/davinci.h |  1 +
 arch/arm/mach-davinci/dm365.c   | 56 +++--
 3 files changed, 47 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-davinci/board-dm365-evm.c 
b/arch/arm/mach-davinci/board-dm365-evm.c
index 0ac085b58a2b..36b69a131cfa 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -741,6 +741,8 @@ static __init void dm365_evm_init(void)
 {
int ret;
 
+   dm365_register_clocks();
+
ret = dm365_gpio_register();
if (ret)
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index c2c634b6578e..a799b5266d4b 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -94,6 +94,7 @@ int dm355_gpio_register(void);
 /* DM365 function declarations */
 void dm365_init(void);
 void dm365_init_time(void);
+void dm365_register_clocks(void);
 void dm365_init_asp(void);
 void dm365_init_vc(void);
 void dm365_init_ks(struct davinci_ks_platform_data *pdata);
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 871372a59da8..76de426a0e41 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -12,32 +12,38 @@
  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */
-#include 
-#include 
-#include 
-#include 
+
+#include 
+#include 
+#include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 #include 
 
+#include 
 #include 
-#include "psc.h"
-#include 
 #include 
-#include 
+#include 
 #include 
-#include 
+#include 
 
+#include "asp.h"
 #include "davinci.h"
-#include "clock.h"
 #include "mux.h"
-#include "asp.h"
+
+#ifndef CONFIG_COMMON_CLK
+#include "clock.h"
+#include "psc.h"
+#endif
 
 #define DM365_REF_FREQ 2400/* 24 MHz on the DM365 EVM */
 #define DM365_RTC_BASE 0x01c69000
@@ -54,6 +60,7 @@
 #define DM365_EMAC_CNTRL_RAM_OFFSET0x1000
 #define DM365_EMAC_CNTRL_RAM_SIZE  0x2000
 
+#ifndef CONFIG_COMMON_CLK
 static struct pll_data pll1_data = {
.num= 1,
.phys_base  = DAVINCI_PLL1_BASE,
@@ -485,7 +492,7 @@ static struct clk_lookup dm365_clks[] = {
CLK(NULL, "mjcp", _clk),
CLK(NULL, NULL, NULL),
 };
-
+#endif
 /*--*/
 
 #define INTMUX 0x18
@@ -1171,8 +1178,33 @@ void __init dm365_init(void)
 
 void __init dm365_init_time(void)
 {
+#ifdef CONFIG_COMMON_CLK
+   void __iomem *pll1, *pll2, *psc;
+   struct clk *clk;
+
+   clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM365_REF_FREQ);
+
+   pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K);
+   dm365_pll1_init(NULL, pll1, NULL);
+
+   pll2 = ioremap(DAVINCI_PLL2_BASE, SZ_1K);
+   dm365_pll2_init(NULL, pll2, NULL);
+
+   psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K);
+   dm365_psc_init(NULL, psc);
+
+   clk = clk_get(NULL, "timer0");
+
+   davinci_timer_init(clk);
+#else
davinci_clk_init(dm365_clks);
davinci_timer_init(_clk);
+#endif
+}
+
+void __init dm365_register_clocks(void)
+{
+   /* all clocks are currently registered in dm365_init_time() */
 }
 
 static struct resource dm365_vpss_resources[] = {
-- 
2.17.0

[PATCH v9 08/27] ARM: davinci: dm365: add new clock init using common clock framework

[David Lechner]

This adds the new board-specific clock init in mach-davinci/dm365.c
using the new common clock framework drivers.

The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.

Also clean up the #includes since we are adding some here.

Signed-off-by: David Lechner 
---

v9 changes:
- register PLL1 and PSC in dm365_init_time() instead of as platform device so
  that we get the correct timer0 clock for davinci_timer_init()
- Fixed size of PLL memory block

v8 changes:
- none

v7 changes:
- add clock platform device declarations
- register platform devices instead of registering clocks directly
- add davinci prefix to commit description

v6 changes:
- add blank lines between function calls


 arch/arm/mach-davinci/board-dm365-evm.c |  2 +
 arch/arm/mach-davinci/davinci.h |  1 +
 arch/arm/mach-davinci/dm365.c   | 56 +++--
 3 files changed, 47 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-davinci/board-dm365-evm.c 
b/arch/arm/mach-davinci/board-dm365-evm.c
index 0ac085b58a2b..36b69a131cfa 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -741,6 +741,8 @@ static __init void dm365_evm_init(void)
 {
int ret;
 
+   dm365_register_clocks();
+
ret = dm365_gpio_register();
if (ret)
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index c2c634b6578e..a799b5266d4b 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -94,6 +94,7 @@ int dm355_gpio_register(void);
 /* DM365 function declarations */
 void dm365_init(void);
 void dm365_init_time(void);
+void dm365_register_clocks(void);
 void dm365_init_asp(void);
 void dm365_init_vc(void);
 void dm365_init_ks(struct davinci_ks_platform_data *pdata);
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 871372a59da8..76de426a0e41 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -12,32 +12,38 @@
  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */
-#include 
-#include 
-#include 
-#include 
+
+#include 
+#include 
+#include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 #include 
 
+#include 
 #include 
-#include "psc.h"
-#include 
 #include 
-#include 
+#include 
 #include 
-#include 
+#include 
 
+#include "asp.h"
 #include "davinci.h"
-#include "clock.h"
 #include "mux.h"
-#include "asp.h"
+
+#ifndef CONFIG_COMMON_CLK
+#include "clock.h"
+#include "psc.h"
+#endif
 
 #define DM365_REF_FREQ 2400/* 24 MHz on the DM365 EVM */
 #define DM365_RTC_BASE 0x01c69000
@@ -54,6 +60,7 @@
 #define DM365_EMAC_CNTRL_RAM_OFFSET0x1000
 #define DM365_EMAC_CNTRL_RAM_SIZE  0x2000
 
+#ifndef CONFIG_COMMON_CLK
 static struct pll_data pll1_data = {
.num= 1,
.phys_base  = DAVINCI_PLL1_BASE,
@@ -485,7 +492,7 @@ static struct clk_lookup dm365_clks[] = {
CLK(NULL, "mjcp", _clk),
CLK(NULL, NULL, NULL),
 };
-
+#endif
 /*--*/
 
 #define INTMUX 0x18
@@ -1171,8 +1178,33 @@ void __init dm365_init(void)
 
 void __init dm365_init_time(void)
 {
+#ifdef CONFIG_COMMON_CLK
+   void __iomem *pll1, *pll2, *psc;
+   struct clk *clk;
+
+   clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM365_REF_FREQ);
+
+   pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K);
+   dm365_pll1_init(NULL, pll1, NULL);
+
+   pll2 = ioremap(DAVINCI_PLL2_BASE, SZ_1K);
+   dm365_pll2_init(NULL, pll2, NULL);
+
+   psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K);
+   dm365_psc_init(NULL, psc);
+
+   clk = clk_get(NULL, "timer0");
+
+   davinci_timer_init(clk);
+#else
davinci_clk_init(dm365_clks);
davinci_timer_init(_clk);
+#endif
+}
+
+void __init dm365_register_clocks(void)
+{
+   /* all clocks are currently registered in dm365_init_time() */
 }
 
 static struct resource dm365_vpss_resources[] = {
-- 
2.17.0

[PATCH v9 10/27] ARM: davinci: dm646x: add new clock init using common clock framework

[David Lechner]

This adds the new board-specific clock init in mach-davinci/dm646x.c
using the new common clock framework drivers.

The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.

Also clean up the #includes since we are adding some here.

Signed-off-by: David Lechner 
---

v9 changes:
- register PLL1 and PSC in dm646x_init_time() instead of as platform device so
  that we get the correct timer0 clock for davinci_timer_init()
- Fixed size of PLL memory block

v8 changes:
- register clkdev lookup for ref_clk and aux_clkin

v7 changes:
- add clock platform device declarations
- register platform devices instead of registering clocks directly
- add davinci prefix to commit description

v6 changes:
- add blank lines between function calls


 arch/arm/mach-davinci/board-dm646x-evm.c |  2 +
 arch/arm/mach-davinci/davinci.h  |  1 +
 arch/arm/mach-davinci/dm646x.c   | 63 +---
 3 files changed, 58 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c 
b/arch/arm/mach-davinci/board-dm646x-evm.c
index 2d37f5b0e1f5..d672804df817 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -772,6 +772,8 @@ static __init void evm_init(void)
int ret;
struct davinci_soc_info *soc_info = _soc_info;
 
+   dm646x_register_clocks();
+
ret = dm646x_gpio_register();
if (ret)
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index 16aca5853ab2..fa99197d36f9 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -116,6 +116,7 @@ int dm644x_gpio_register(void);
 /* DM646x function declarations */
 void dm646x_init(void);
 void dm646x_init_time(unsigned long ref_clk_rate, unsigned long 
aux_clkin_rate);
+void dm646x_register_clocks(void);
 void dm646x_init_mcasp0(struct snd_platform_data *pdata);
 void dm646x_init_mcasp1(struct snd_platform_data *pdata);
 int dm646x_init_edma(struct edma_rsv_info *rsv);
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index e1d6e92f434a..d260ca5f6827 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -8,29 +8,35 @@
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
  */
+
+#include 
+#include 
+#include 
 #include 
 #include 
 #include 
-#include 
-#include 
-#include 
 #include 
 #include 
+#include 
+#include 
 
 #include 
 
+#include 
 #include 
 #include 
-#include "psc.h"
 #include 
-#include 
 #include 
-#include 
+#include 
 
+#include "asp.h"
 #include "davinci.h"
-#include "clock.h"
 #include "mux.h"
-#include "asp.h"
+
+#ifndef CONFIG_COMMON_CLK
+#include "clock.h"
+#include "psc.h"
+#endif
 
 #define DAVINCI_VPIF_BASE   (0x01C12000)
 
@@ -46,6 +52,7 @@
 #define DM646X_EMAC_CNTRL_RAM_OFFSET   0x2000
 #define DM646X_EMAC_CNTRL_RAM_SIZE 0x2000
 
+#ifndef CONFIG_COMMON_CLK
 static struct pll_data pll1_data = {
.num   = 1,
.phys_base = DAVINCI_PLL1_BASE,
@@ -356,6 +363,7 @@ static struct clk_lookup dm646x_clks[] = {
CLK(NULL, "vpif1", _clk),
CLK(NULL, NULL, NULL),
 };
+#endif
 
 static struct emac_platform_data dm646x_emac_pdata = {
.ctrl_reg_offset= DM646X_EMAC_CNTRL_OFFSET,
@@ -953,10 +961,49 @@ void __init dm646x_init(void)
 void __init dm646x_init_time(unsigned long ref_clk_rate,
 unsigned long aux_clkin_rate)
 {
+#ifdef CONFIG_COMMON_CLK
+   void __iomem *pll1, *psc;
+   struct clk *clk;
+
+   clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, ref_clk_rate);
+   clk_register_fixed_rate(NULL, "aux_clkin", NULL, 0, aux_clkin_rate);
+
+   pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K);
+   dm355_pll1_init(NULL, pll1, NULL);
+
+   psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K);
+   dm355_psc_init(NULL, psc);
+
+   clk = clk_get(NULL, "timer0");
+
+   davinci_timer_init(clk);
+#else
ref_clk.rate = ref_clk_rate;
aux_clkin.rate = aux_clkin_rate;
davinci_clk_init(dm646x_clks);
davinci_timer_init(_clk);
+#endif
+}
+
+static struct resource dm646x_pll2_resources[] = {
+   {
+   .start  = DAVINCI_PLL2_BASE,
+   .end= DAVINCI_PLL2_BASE + SZ_1K - 1,
+   .flags  = IORESOURCE_MEM,
+   },
+};
+
+static struct platform_device dm646x_pll2_device = {
+   .name   = "dm646x-pll2",
+   .id = -1,
+   .resource   = dm646x_pll2_resources,
+   .num_resources  = ARRAY_SIZE(dm646x_pll2_resources),
+};
+
+void __init dm646x_register_clocks(void)
+{
+   /* PLL1 and PSC are registered in dm646x_init_time() */
+   platform_device_register(_pll2_device);
 }
 
 static int __init dm646x_init_devices(void)
-- 
2.17.0

[PATCH v9 10/27] ARM: davinci: dm646x: add new clock init using common clock framework

[David Lechner]

This adds the new board-specific clock init in mach-davinci/dm646x.c
using the new common clock framework drivers.

The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.

Also clean up the #includes since we are adding some here.

Signed-off-by: David Lechner 
---

v9 changes:
- register PLL1 and PSC in dm646x_init_time() instead of as platform device so
  that we get the correct timer0 clock for davinci_timer_init()
- Fixed size of PLL memory block

v8 changes:
- register clkdev lookup for ref_clk and aux_clkin

v7 changes:
- add clock platform device declarations
- register platform devices instead of registering clocks directly
- add davinci prefix to commit description

v6 changes:
- add blank lines between function calls


 arch/arm/mach-davinci/board-dm646x-evm.c |  2 +
 arch/arm/mach-davinci/davinci.h  |  1 +
 arch/arm/mach-davinci/dm646x.c   | 63 +---
 3 files changed, 58 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c 
b/arch/arm/mach-davinci/board-dm646x-evm.c
index 2d37f5b0e1f5..d672804df817 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -772,6 +772,8 @@ static __init void evm_init(void)
int ret;
struct davinci_soc_info *soc_info = _soc_info;
 
+   dm646x_register_clocks();
+
ret = dm646x_gpio_register();
if (ret)
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index 16aca5853ab2..fa99197d36f9 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -116,6 +116,7 @@ int dm644x_gpio_register(void);
 /* DM646x function declarations */
 void dm646x_init(void);
 void dm646x_init_time(unsigned long ref_clk_rate, unsigned long 
aux_clkin_rate);
+void dm646x_register_clocks(void);
 void dm646x_init_mcasp0(struct snd_platform_data *pdata);
 void dm646x_init_mcasp1(struct snd_platform_data *pdata);
 int dm646x_init_edma(struct edma_rsv_info *rsv);
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index e1d6e92f434a..d260ca5f6827 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -8,29 +8,35 @@
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
  */
+
+#include 
+#include 
+#include 
 #include 
 #include 
 #include 
-#include 
-#include 
-#include 
 #include 
 #include 
+#include 
+#include 
 
 #include 
 
+#include 
 #include 
 #include 
-#include "psc.h"
 #include 
-#include 
 #include 
-#include 
+#include 
 
+#include "asp.h"
 #include "davinci.h"
-#include "clock.h"
 #include "mux.h"
-#include "asp.h"
+
+#ifndef CONFIG_COMMON_CLK
+#include "clock.h"
+#include "psc.h"
+#endif
 
 #define DAVINCI_VPIF_BASE   (0x01C12000)
 
@@ -46,6 +52,7 @@
 #define DM646X_EMAC_CNTRL_RAM_OFFSET   0x2000
 #define DM646X_EMAC_CNTRL_RAM_SIZE 0x2000
 
+#ifndef CONFIG_COMMON_CLK
 static struct pll_data pll1_data = {
.num   = 1,
.phys_base = DAVINCI_PLL1_BASE,
@@ -356,6 +363,7 @@ static struct clk_lookup dm646x_clks[] = {
CLK(NULL, "vpif1", _clk),
CLK(NULL, NULL, NULL),
 };
+#endif
 
 static struct emac_platform_data dm646x_emac_pdata = {
.ctrl_reg_offset= DM646X_EMAC_CNTRL_OFFSET,
@@ -953,10 +961,49 @@ void __init dm646x_init(void)
 void __init dm646x_init_time(unsigned long ref_clk_rate,
 unsigned long aux_clkin_rate)
 {
+#ifdef CONFIG_COMMON_CLK
+   void __iomem *pll1, *psc;
+   struct clk *clk;
+
+   clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, ref_clk_rate);
+   clk_register_fixed_rate(NULL, "aux_clkin", NULL, 0, aux_clkin_rate);
+
+   pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K);
+   dm355_pll1_init(NULL, pll1, NULL);
+
+   psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K);
+   dm355_psc_init(NULL, psc);
+
+   clk = clk_get(NULL, "timer0");
+
+   davinci_timer_init(clk);
+#else
ref_clk.rate = ref_clk_rate;
aux_clkin.rate = aux_clkin_rate;
davinci_clk_init(dm646x_clks);
davinci_timer_init(_clk);
+#endif
+}
+
+static struct resource dm646x_pll2_resources[] = {
+   {
+   .start  = DAVINCI_PLL2_BASE,
+   .end= DAVINCI_PLL2_BASE + SZ_1K - 1,
+   .flags  = IORESOURCE_MEM,
+   },
+};
+
+static struct platform_device dm646x_pll2_device = {
+   .name   = "dm646x-pll2",
+   .id = -1,
+   .resource   = dm646x_pll2_resources,
+   .num_resources  = ARRAY_SIZE(dm646x_pll2_resources),
+};
+
+void __init dm646x_register_clocks(void)
+{
+   /* PLL1 and PSC are registered in dm646x_init_time() */
+   platform_device_register(_pll2_device);
 }
 
 static int __init dm646x_init_devices(void)
-- 
2.17.0

[PATCH v9 12/27] ARM: davinci: da8xx: add new sata_refclk init using common clock framework

[David Lechner]

This adds the new SATA REFCLK clock init in mach-davinci/devices-da8xx.c
using the new common clock framework drivers.

The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.

Also, the #includes are sorted since we are adding some here.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- none

v8 changes:
- none

v7 changes:
- none

v6 changes:
- none


 arch/arm/mach-davinci/devices-da8xx.c | 36 ---
 1 file changed, 27 insertions(+), 9 deletions(-)

diff --git a/arch/arm/mach-davinci/devices-da8xx.c 
b/arch/arm/mach-davinci/devices-da8xx.c
index 78390c64e6ca..73de449bbc68 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -10,25 +10,30 @@
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
  */
-#include 
-#include 
-#include 
-#include 
 #include 
+#include 
 #include 
-#include 
+#include 
+#include 
 #include 
+#include 
+#include 
+#include 
+#include 
 
-#include 
 #include 
-#include 
+#include 
 #include 
-#include 
+#include 
+
+#include "asp.h"
 #include "cpuidle.h"
 #include "sram.h"
 
+#ifndef CONFIG_COMMON_CLK
+#include 
 #include "clock.h"
-#include "asp.h"
+#endif
 
 #define DA8XX_TPCC_BASE0x01c0
 #define DA8XX_TPTC0_BASE   0x01c08000
@@ -1040,6 +1045,7 @@ int __init da8xx_register_spi_bus(int instance, unsigned 
num_chipselect)
 }
 
 #ifdef CONFIG_ARCH_DAVINCI_DA850
+#ifndef CONFIG_COMMON_CLK
 static struct clk sata_refclk = {
.name   = "sata_refclk",
.set_rate   = davinci_simple_set_rate,
@@ -1061,6 +1067,18 @@ int __init da850_register_sata_refclk(int rate)
 
return 0;
 }
+#else
+int __init da850_register_sata_refclk(int rate)
+{
+   struct clk *clk;
+
+   clk = clk_register_fixed_rate(NULL, "sata_refclk", NULL, 0, rate);
+   if (IS_ERR(clk))
+   return PTR_ERR(clk);
+
+   return clk_register_clkdev(clk, "refclk", "ahci_da850");
+}
+#endif
 
 static struct resource da850_sata_resources[] = {
{
-- 
2.17.0

[PATCH v9 12/27] ARM: davinci: da8xx: add new sata_refclk init using common clock framework

[David Lechner]

This adds the new SATA REFCLK clock init in mach-davinci/devices-da8xx.c
using the new common clock framework drivers.

The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.

Also, the #includes are sorted since we are adding some here.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- none

v8 changes:
- none

v7 changes:
- none

v6 changes:
- none


 arch/arm/mach-davinci/devices-da8xx.c | 36 ---
 1 file changed, 27 insertions(+), 9 deletions(-)

diff --git a/arch/arm/mach-davinci/devices-da8xx.c 
b/arch/arm/mach-davinci/devices-da8xx.c
index 78390c64e6ca..73de449bbc68 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -10,25 +10,30 @@
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
  */
-#include 
-#include 
-#include 
-#include 
 #include 
+#include 
 #include 
-#include 
+#include 
+#include 
 #include 
+#include 
+#include 
+#include 
+#include 
 
-#include 
 #include 
-#include 
+#include 
 #include 
-#include 
+#include 
+
+#include "asp.h"
 #include "cpuidle.h"
 #include "sram.h"
 
+#ifndef CONFIG_COMMON_CLK
+#include 
 #include "clock.h"
-#include "asp.h"
+#endif
 
 #define DA8XX_TPCC_BASE0x01c0
 #define DA8XX_TPTC0_BASE   0x01c08000
@@ -1040,6 +1045,7 @@ int __init da8xx_register_spi_bus(int instance, unsigned 
num_chipselect)
 }
 
 #ifdef CONFIG_ARCH_DAVINCI_DA850
+#ifndef CONFIG_COMMON_CLK
 static struct clk sata_refclk = {
.name   = "sata_refclk",
.set_rate   = davinci_simple_set_rate,
@@ -1061,6 +1067,18 @@ int __init da850_register_sata_refclk(int rate)
 
return 0;
 }
+#else
+int __init da850_register_sata_refclk(int rate)
+{
+   struct clk *clk;
+
+   clk = clk_register_fixed_rate(NULL, "sata_refclk", NULL, 0, rate);
+   if (IS_ERR(clk))
+   return PTR_ERR(clk);
+
+   return clk_register_clkdev(clk, "refclk", "ahci_da850");
+}
+#endif
 
 static struct resource da850_sata_resources[] = {
{
-- 
2.17.0

[PATCH v9 13/27] ARM: davinci: remove CONFIG_DAVINCI_RESET_CLOCKS

[David Lechner]

The common clock framework will take care of disabling unused clocks when
we switch from the legacy davinci clocks and having this enabled will
cause compile errors after we switch, so remove it now.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- none

v8 changes:
- none

v7 changes:
- none

v6 changes:
- none


 arch/arm/mach-davinci/Kconfig   | 12 
 arch/arm/mach-davinci/common.c  |  1 -
 arch/arm/mach-davinci/include/mach/common.h |  6 --
 3 files changed, 19 deletions(-)

diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index 05c3eecf47cb..ba9912b4dfab 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -231,18 +231,6 @@ config DAVINCI_MUX_WARNINGS
  to change the pin multiplexing setup. When there are no warnings
  printed, it's safe to deselect DAVINCI_MUX for your product.
 
-config DAVINCI_RESET_CLOCKS
-   bool "Reset unused clocks during boot"
-   depends on ARCH_DAVINCI
-   help
- Say Y if you want to reset unused clocks during boot.
- This option saves power, but assumes all drivers are
- using the clock framework. Broken drivers that do not
- yet use clock framework may not work with this option.
- If you are booting from another operating system, you
- probably do not want this option enabled until your
- device drivers work properly.
-
 endmenu
 
 endif
diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c
index bcb6a7ba84e9..e03f95ccd95c 100644
--- a/arch/arm/mach-davinci/common.c
+++ b/arch/arm/mach-davinci/common.c
@@ -118,5 +118,4 @@ void __init davinci_common_init(const struct 
davinci_soc_info *soc_info)
 void __init davinci_init_late(void)
 {
davinci_cpufreq_init();
-   davinci_clk_disable_unused();
 }
diff --git a/arch/arm/mach-davinci/include/mach/common.h 
b/arch/arm/mach-davinci/include/mach/common.h
index 5f45d0ac66a8..ded8f5f42725 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -83,12 +83,6 @@ extern void davinci_common_init(const struct 
davinci_soc_info *soc_info);
 extern void davinci_init_ide(void);
 void davinci_init_late(void);
 
-#ifdef CONFIG_DAVINCI_RESET_CLOCKS
-int davinci_clk_disable_unused(void);
-#else
-static inline int davinci_clk_disable_unused(void) { return 0; }
-#endif
-
 #ifdef CONFIG_CPU_FREQ
 int davinci_cpufreq_init(void);
 #else
-- 
2.17.0

[PATCH v9 13/27] ARM: davinci: remove CONFIG_DAVINCI_RESET_CLOCKS

[David Lechner]

The common clock framework will take care of disabling unused clocks when
we switch from the legacy davinci clocks and having this enabled will
cause compile errors after we switch, so remove it now.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- none

v8 changes:
- none

v7 changes:
- none

v6 changes:
- none


 arch/arm/mach-davinci/Kconfig   | 12 
 arch/arm/mach-davinci/common.c  |  1 -
 arch/arm/mach-davinci/include/mach/common.h |  6 --
 3 files changed, 19 deletions(-)

diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index 05c3eecf47cb..ba9912b4dfab 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -231,18 +231,6 @@ config DAVINCI_MUX_WARNINGS
  to change the pin multiplexing setup. When there are no warnings
  printed, it's safe to deselect DAVINCI_MUX for your product.
 
-config DAVINCI_RESET_CLOCKS
-   bool "Reset unused clocks during boot"
-   depends on ARCH_DAVINCI
-   help
- Say Y if you want to reset unused clocks during boot.
- This option saves power, but assumes all drivers are
- using the clock framework. Broken drivers that do not
- yet use clock framework may not work with this option.
- If you are booting from another operating system, you
- probably do not want this option enabled until your
- device drivers work properly.
-
 endmenu
 
 endif
diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c
index bcb6a7ba84e9..e03f95ccd95c 100644
--- a/arch/arm/mach-davinci/common.c
+++ b/arch/arm/mach-davinci/common.c
@@ -118,5 +118,4 @@ void __init davinci_common_init(const struct 
davinci_soc_info *soc_info)
 void __init davinci_init_late(void)
 {
davinci_cpufreq_init();
-   davinci_clk_disable_unused();
 }
diff --git a/arch/arm/mach-davinci/include/mach/common.h 
b/arch/arm/mach-davinci/include/mach/common.h
index 5f45d0ac66a8..ded8f5f42725 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -83,12 +83,6 @@ extern void davinci_common_init(const struct 
davinci_soc_info *soc_info);
 extern void davinci_init_ide(void);
 void davinci_init_late(void);
 
-#ifdef CONFIG_DAVINCI_RESET_CLOCKS
-int davinci_clk_disable_unused(void);
-#else
-static inline int davinci_clk_disable_unused(void) { return 0; }
-#endif
-
 #ifdef CONFIG_CPU_FREQ
 int davinci_cpufreq_init(void);
 #else
-- 
2.17.0

[PATCH v9 11/27] ARM: davinci: da8xx: add new USB PHY clock init using common clock framework

[David Lechner]

This adds the new USB PHY clock init in mach-davinci/usb-da8xx.c using
the new common clock framework drivers.

The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.

Signed-off-by: David Lechner 
---

v9 changes:
- none

v8 changes:
- rebased on "ARM: davinci: DA8XX: fix oops in USB PHY driver due to stack
  allocated platform platform_data"

v7 changes:
- register platform device instead of registering clocks directly
- USB PHY clocks now treated as single device instead of registering them
  separately

v6 changes:
- rename stuff to match changes in "clk: davinci: New driver for TI DA8XX USB
  PHY clocks"
- take advantage of syscon lookup changes in "mfd: syscon: Add syscon_register()
  function"


 arch/arm/mach-davinci/board-da830-evm.c |  8 ++-
 arch/arm/mach-davinci/board-omapl138-hawk.c |  9 +--
 arch/arm/mach-davinci/da8xx-dt.c|  8 ++-
 arch/arm/mach-davinci/include/mach/da8xx.h  |  1 +
 arch/arm/mach-davinci/usb-da8xx.c   | 26 +++--
 5 files changed, 46 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da830-evm.c 
b/arch/arm/mach-davinci/board-da830-evm.c
index 3973124e5f1d..6e77c458ec8e 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -110,6 +110,12 @@ static __init void da830_evm_usb_init(void)
 {
int ret;
 
+#ifdef CONFIG_COMMON_CLK
+   ret = da8xx_register_usb_phy_clocks();
+   if (ret)
+   pr_warn("%s: USB PHY CLK registration failed: %d\n",
+   __func__, ret);
+#else
/* USB_REFCLKIN is not used. */
ret = da8xx_register_usb20_phy_clk(false);
if (ret)
@@ -120,7 +126,7 @@ static __init void da830_evm_usb_init(void)
if (ret)
pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
__func__, ret);
-
+#endif
ret = da8xx_register_usb_phy();
if (ret)
pr_warn("%s: USB PHY registration failed: %d\n",
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c 
b/arch/arm/mach-davinci/board-omapl138-hawk.c
index eb09e333b6cd..6a866d29b114 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -231,7 +231,12 @@ static __init void omapl138_hawk_usb_init(void)
pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret);
return;
}
-
+#ifdef CONFIG_COMMON_CLK
+   ret = da8xx_register_usb_phy_clocks();
+   if (ret)
+   pr_warn("%s: USB PHY CLK registration failed: %d\n",
+   __func__, ret);
+#else
ret = da8xx_register_usb20_phy_clk(false);
if (ret)
pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n",
@@ -241,7 +246,7 @@ static __init void omapl138_hawk_usb_init(void)
if (ret)
pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
__func__, ret);
-
+#endif
ret = da8xx_register_usb_phy();
if (ret)
pr_warn("%s: USB PHY registration failed: %d\n",
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index 91dd9cb6d113..c4edf051ef9b 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -69,6 +69,12 @@ static void __init da850_init_machine(void)
 
da850_register_clocks();
 
+#ifdef CONFIG_COMMON_CLK
+   ret = da8xx_register_usb_phy_clocks();
+   if (ret)
+   pr_warn("%s: USB PHY CLK registration failed: %d\n",
+   __func__, ret);
+#else
ret = da8xx_register_usb20_phy_clk(false);
if (ret)
pr_warn("%s: registering USB 2.0 PHY clock failed: %d",
@@ -77,7 +83,7 @@ static void __init da850_init_machine(void)
if (ret)
pr_warn("%s: registering USB 1.1 PHY clock failed: %d",
__func__, ret);
-
+#endif
ret = da850_register_sata_refclk(sata_refclkpn);
if (ret)
pr_warn("%s: registering SATA REFCLK failed: %d",
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h 
b/arch/arm/mach-davinci/include/mach/da8xx.h
index 612e45437cec..5d7b1de9aa7e 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -106,6 +106,7 @@ int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
 int da8xx_register_usb_refclkin(int rate);
 int da8xx_register_usb20_phy_clk(bool use_usb_refclkin);
 int da8xx_register_usb11_phy_clk(bool use_usb_refclkin);
+int da8xx_register_usb_phy_clocks(void);
 int da850_register_sata_refclk(int rate);
 int da8xx_register_emac(void);
 int da8xx_register_uio_pruss(void);
diff --git a/arch/arm/mach-davinci/usb-da8xx.c 
b/arch/arm/mach-davinci/usb-da8xx.c
index 50445f0e98de..c8d2f3075e69 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ 

[PATCH v9 11/27] ARM: davinci: da8xx: add new USB PHY clock init using common clock framework

[David Lechner]

This adds the new USB PHY clock init in mach-davinci/usb-da8xx.c using
the new common clock framework drivers.

The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.

Signed-off-by: David Lechner 
---

v9 changes:
- none

v8 changes:
- rebased on "ARM: davinci: DA8XX: fix oops in USB PHY driver due to stack
  allocated platform platform_data"

v7 changes:
- register platform device instead of registering clocks directly
- USB PHY clocks now treated as single device instead of registering them
  separately

v6 changes:
- rename stuff to match changes in "clk: davinci: New driver for TI DA8XX USB
  PHY clocks"
- take advantage of syscon lookup changes in "mfd: syscon: Add syscon_register()
  function"


 arch/arm/mach-davinci/board-da830-evm.c |  8 ++-
 arch/arm/mach-davinci/board-omapl138-hawk.c |  9 +--
 arch/arm/mach-davinci/da8xx-dt.c|  8 ++-
 arch/arm/mach-davinci/include/mach/da8xx.h  |  1 +
 arch/arm/mach-davinci/usb-da8xx.c   | 26 +++--
 5 files changed, 46 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da830-evm.c 
b/arch/arm/mach-davinci/board-da830-evm.c
index 3973124e5f1d..6e77c458ec8e 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -110,6 +110,12 @@ static __init void da830_evm_usb_init(void)
 {
int ret;
 
+#ifdef CONFIG_COMMON_CLK
+   ret = da8xx_register_usb_phy_clocks();
+   if (ret)
+   pr_warn("%s: USB PHY CLK registration failed: %d\n",
+   __func__, ret);
+#else
/* USB_REFCLKIN is not used. */
ret = da8xx_register_usb20_phy_clk(false);
if (ret)
@@ -120,7 +126,7 @@ static __init void da830_evm_usb_init(void)
if (ret)
pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
__func__, ret);
-
+#endif
ret = da8xx_register_usb_phy();
if (ret)
pr_warn("%s: USB PHY registration failed: %d\n",
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c 
b/arch/arm/mach-davinci/board-omapl138-hawk.c
index eb09e333b6cd..6a866d29b114 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -231,7 +231,12 @@ static __init void omapl138_hawk_usb_init(void)
pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret);
return;
}
-
+#ifdef CONFIG_COMMON_CLK
+   ret = da8xx_register_usb_phy_clocks();
+   if (ret)
+   pr_warn("%s: USB PHY CLK registration failed: %d\n",
+   __func__, ret);
+#else
ret = da8xx_register_usb20_phy_clk(false);
if (ret)
pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n",
@@ -241,7 +246,7 @@ static __init void omapl138_hawk_usb_init(void)
if (ret)
pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
__func__, ret);
-
+#endif
ret = da8xx_register_usb_phy();
if (ret)
pr_warn("%s: USB PHY registration failed: %d\n",
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index 91dd9cb6d113..c4edf051ef9b 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -69,6 +69,12 @@ static void __init da850_init_machine(void)
 
da850_register_clocks();
 
+#ifdef CONFIG_COMMON_CLK
+   ret = da8xx_register_usb_phy_clocks();
+   if (ret)
+   pr_warn("%s: USB PHY CLK registration failed: %d\n",
+   __func__, ret);
+#else
ret = da8xx_register_usb20_phy_clk(false);
if (ret)
pr_warn("%s: registering USB 2.0 PHY clock failed: %d",
@@ -77,7 +83,7 @@ static void __init da850_init_machine(void)
if (ret)
pr_warn("%s: registering USB 1.1 PHY clock failed: %d",
__func__, ret);
-
+#endif
ret = da850_register_sata_refclk(sata_refclkpn);
if (ret)
pr_warn("%s: registering SATA REFCLK failed: %d",
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h 
b/arch/arm/mach-davinci/include/mach/da8xx.h
index 612e45437cec..5d7b1de9aa7e 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -106,6 +106,7 @@ int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
 int da8xx_register_usb_refclkin(int rate);
 int da8xx_register_usb20_phy_clk(bool use_usb_refclkin);
 int da8xx_register_usb11_phy_clk(bool use_usb_refclkin);
+int da8xx_register_usb_phy_clocks(void);
 int da850_register_sata_refclk(int rate);
 int da8xx_register_emac(void);
 int da8xx_register_uio_pruss(void);
diff --git a/arch/arm/mach-davinci/usb-da8xx.c 
b/arch/arm/mach-davinci/usb-da8xx.c
index 50445f0e98de..c8d2f3075e69 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -2,29 

[PATCH v9 17/27] ARM: davinci: da850: Remove legacy clock init

[David Lechner]

This removes the unused legacy clock init code from
arch/arm/mach-davinci/da850.c.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- rebased

v8 changes:
- none

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased


 arch/arm/mach-davinci/board-omapl138-hawk.c |  12 +-
 arch/arm/mach-davinci/da850.c   | 653 +---
 arch/arm/mach-davinci/da8xx-dt.c|  12 +-
 3 files changed, 3 insertions(+), 674 deletions(-)

diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c 
b/arch/arm/mach-davinci/board-omapl138-hawk.c
index 6a866d29b114..6c997c59a3cd 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -231,22 +231,12 @@ static __init void omapl138_hawk_usb_init(void)
pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret);
return;
}
-#ifdef CONFIG_COMMON_CLK
+
ret = da8xx_register_usb_phy_clocks();
if (ret)
pr_warn("%s: USB PHY CLK registration failed: %d\n",
__func__, ret);
-#else
-   ret = da8xx_register_usb20_phy_clk(false);
-   if (ret)
-   pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n",
-   __func__, ret);
 
-   ret = da8xx_register_usb11_phy_clk(false);
-   if (ret)
-   pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
-   __func__, ret);
-#endif
ret = da8xx_register_usb_phy();
if (ret)
pr_warn("%s: USB PHY registration failed: %d\n",
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 9e00beb943c9..4528bbf0c861 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -38,559 +38,12 @@
 
 #include "mux.h"
 
-#ifndef CONFIG_COMMON_CLK
-#include "clock.h"
-#include "psc.h"
-#endif
-
 #define DA850_PLL1_BASE0x01e1a000
 #define DA850_TIMER64P2_BASE   0x01f0c000
 #define DA850_TIMER64P3_BASE   0x01f0d000
 
 #define DA850_REF_FREQ 2400
 
-#ifndef CONFIG_COMMON_CLK
-static int da850_set_armrate(struct clk *clk, unsigned long rate);
-static int da850_round_armrate(struct clk *clk, unsigned long rate);
-static int da850_set_pll0rate(struct clk *clk, unsigned long armrate);
-
-static struct pll_data pll0_data = {
-   .num= 1,
-   .phys_base  = DA8XX_PLL0_BASE,
-   .flags  = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
-};
-
-static struct clk ref_clk = {
-   .name   = "ref_clk",
-   .rate   = DA850_REF_FREQ,
-   .set_rate   = davinci_simple_set_rate,
-};
-
-static struct clk pll0_clk = {
-   .name   = "pll0",
-   .parent = _clk,
-   .pll_data   = _data,
-   .flags  = CLK_PLL,
-   .set_rate   = da850_set_pll0rate,
-};
-
-static struct clk pll0_aux_clk = {
-   .name   = "pll0_aux_clk",
-   .parent = _clk,
-   .flags  = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll0_sysclk1 = {
-   .name   = "pll0_sysclk1",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV1,
-};
-
-static struct clk pll0_sysclk2 = {
-   .name   = "pll0_sysclk2",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV2,
-};
-
-static struct clk pll0_sysclk3 = {
-   .name   = "pll0_sysclk3",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV3,
-   .set_rate   = davinci_set_sysclk_rate,
-   .maxrate= 1,
-};
-
-static struct clk pll0_sysclk4 = {
-   .name   = "pll0_sysclk4",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV4,
-};
-
-static struct clk pll0_sysclk5 = {
-   .name   = "pll0_sysclk5",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV5,
-};
-
-static struct clk pll0_sysclk6 = {
-   .name   = "pll0_sysclk6",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV6,
-};
-
-static struct clk pll0_sysclk7 = {
-   .name   = "pll0_sysclk7",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV7,
-};
-
-static struct pll_data pll1_data = {
-   .num= 2,
-   .phys_base  = DA850_PLL1_BASE,
-   .flags  = PLL_HAS_POSTDIV,
-};
-
-static struct clk pll1_clk = {
-   .name   = "pll1",
-   .parent = _clk,
-   .pll_data   = _data,
-   .flags  = CLK_PLL,
-};
-
-static struct clk pll1_aux_clk = {
-   .name   = "pll1_aux_clk",
-   .parent = _clk,
-   .flags  = CLK_PLL | 

[PATCH v9 17/27] ARM: davinci: da850: Remove legacy clock init

[David Lechner]

This removes the unused legacy clock init code from
arch/arm/mach-davinci/da850.c.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- rebased

v8 changes:
- none

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased


 arch/arm/mach-davinci/board-omapl138-hawk.c |  12 +-
 arch/arm/mach-davinci/da850.c   | 653 +---
 arch/arm/mach-davinci/da8xx-dt.c|  12 +-
 3 files changed, 3 insertions(+), 674 deletions(-)

diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c 
b/arch/arm/mach-davinci/board-omapl138-hawk.c
index 6a866d29b114..6c997c59a3cd 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -231,22 +231,12 @@ static __init void omapl138_hawk_usb_init(void)
pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret);
return;
}
-#ifdef CONFIG_COMMON_CLK
+
ret = da8xx_register_usb_phy_clocks();
if (ret)
pr_warn("%s: USB PHY CLK registration failed: %d\n",
__func__, ret);
-#else
-   ret = da8xx_register_usb20_phy_clk(false);
-   if (ret)
-   pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n",
-   __func__, ret);
 
-   ret = da8xx_register_usb11_phy_clk(false);
-   if (ret)
-   pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
-   __func__, ret);
-#endif
ret = da8xx_register_usb_phy();
if (ret)
pr_warn("%s: USB PHY registration failed: %d\n",
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 9e00beb943c9..4528bbf0c861 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -38,559 +38,12 @@
 
 #include "mux.h"
 
-#ifndef CONFIG_COMMON_CLK
-#include "clock.h"
-#include "psc.h"
-#endif
-
 #define DA850_PLL1_BASE0x01e1a000
 #define DA850_TIMER64P2_BASE   0x01f0c000
 #define DA850_TIMER64P3_BASE   0x01f0d000
 
 #define DA850_REF_FREQ 2400
 
-#ifndef CONFIG_COMMON_CLK
-static int da850_set_armrate(struct clk *clk, unsigned long rate);
-static int da850_round_armrate(struct clk *clk, unsigned long rate);
-static int da850_set_pll0rate(struct clk *clk, unsigned long armrate);
-
-static struct pll_data pll0_data = {
-   .num= 1,
-   .phys_base  = DA8XX_PLL0_BASE,
-   .flags  = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
-};
-
-static struct clk ref_clk = {
-   .name   = "ref_clk",
-   .rate   = DA850_REF_FREQ,
-   .set_rate   = davinci_simple_set_rate,
-};
-
-static struct clk pll0_clk = {
-   .name   = "pll0",
-   .parent = _clk,
-   .pll_data   = _data,
-   .flags  = CLK_PLL,
-   .set_rate   = da850_set_pll0rate,
-};
-
-static struct clk pll0_aux_clk = {
-   .name   = "pll0_aux_clk",
-   .parent = _clk,
-   .flags  = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll0_sysclk1 = {
-   .name   = "pll0_sysclk1",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV1,
-};
-
-static struct clk pll0_sysclk2 = {
-   .name   = "pll0_sysclk2",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV2,
-};
-
-static struct clk pll0_sysclk3 = {
-   .name   = "pll0_sysclk3",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV3,
-   .set_rate   = davinci_set_sysclk_rate,
-   .maxrate= 1,
-};
-
-static struct clk pll0_sysclk4 = {
-   .name   = "pll0_sysclk4",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV4,
-};
-
-static struct clk pll0_sysclk5 = {
-   .name   = "pll0_sysclk5",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV5,
-};
-
-static struct clk pll0_sysclk6 = {
-   .name   = "pll0_sysclk6",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV6,
-};
-
-static struct clk pll0_sysclk7 = {
-   .name   = "pll0_sysclk7",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV7,
-};
-
-static struct pll_data pll1_data = {
-   .num= 2,
-   .phys_base  = DA850_PLL1_BASE,
-   .flags  = PLL_HAS_POSTDIV,
-};
-
-static struct clk pll1_clk = {
-   .name   = "pll1",
-   .parent = _clk,
-   .pll_data   = _data,
-   .flags  = CLK_PLL,
-};
-
-static struct clk pll1_aux_clk = {
-   .name   = "pll1_aux_clk",
-   .parent = _clk,
-   .flags  = CLK_PLL | PRE_PLL,
-};
-
-static struct clk 

[PATCH v9 14/27] ARM: davinci_all_defconfig: remove CONFIG_DAVINCI_RESET_CLOCKS

[David Lechner]

This removes CONFIG_DAVINCI_RESET_CLOCKS. The option has been removed from
the kernel.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- none

v8 changes:
- none

v7 changes:
- none

v6 changes:
- none


 arch/arm/configs/davinci_all_defconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm/configs/davinci_all_defconfig 
b/arch/arm/configs/davinci_all_defconfig
index 21b2d7791df4..f83ea4131df2 100644
--- a/arch/arm/configs/davinci_all_defconfig
+++ b/arch/arm/configs/davinci_all_defconfig
@@ -31,7 +31,6 @@ CONFIG_MACH_MITYOMAPL138=y
 CONFIG_MACH_OMAPL138_HAWKBOARD=y
 CONFIG_DAVINCI_MUX_DEBUG=y
 CONFIG_DAVINCI_MUX_WARNINGS=y
-CONFIG_DAVINCI_RESET_CLOCKS=y
 CONFIG_PREEMPT=y
 CONFIG_AEABI=y
 CONFIG_CMA=y
-- 
2.17.0

[PATCH v9 14/27] ARM: davinci_all_defconfig: remove CONFIG_DAVINCI_RESET_CLOCKS

[David Lechner]

This removes CONFIG_DAVINCI_RESET_CLOCKS. The option has been removed from
the kernel.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- none

v8 changes:
- none

v7 changes:
- none

v6 changes:
- none


 arch/arm/configs/davinci_all_defconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm/configs/davinci_all_defconfig 
b/arch/arm/configs/davinci_all_defconfig
index 21b2d7791df4..f83ea4131df2 100644
--- a/arch/arm/configs/davinci_all_defconfig
+++ b/arch/arm/configs/davinci_all_defconfig
@@ -31,7 +31,6 @@ CONFIG_MACH_MITYOMAPL138=y
 CONFIG_MACH_OMAPL138_HAWKBOARD=y
 CONFIG_DAVINCI_MUX_DEBUG=y
 CONFIG_DAVINCI_MUX_WARNINGS=y
-CONFIG_DAVINCI_RESET_CLOCKS=y
 CONFIG_PREEMPT=y
 CONFIG_AEABI=y
 CONFIG_CMA=y
-- 
2.17.0

[PATCH v9 15/27] ARM: davinci: switch to common clock framework

[David Lechner]

This switches ARCH_DAVINCI to use the common clock framework. The legacy
clock code in arch/arm/mach-davinci/ is no longer used. New drivers in
drivers/clk/davinci/ are used instead.

A few macros had to be moved to prevent compilation errors.

Signed-off-by: David Lechner 
---

v9 changes:
- none

v8 changes:
- none

v7 changes:
- s/compile/compilation and space instead of tab
- add PM_GENERIC_DOMAINS dependencies

v6 changes:
- clean up indent on Common objects section


 arch/arm/Kconfig| 5 -
 arch/arm/mach-davinci/Makefile  | 4 ++--
 arch/arm/mach-davinci/clock.h   | 4 
 arch/arm/mach-davinci/davinci.h | 4 
 arch/arm/mach-davinci/psc.h | 2 --
 5 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a7f8e7f4b88f..a57ad13810c8 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -609,13 +609,16 @@ config ARCH_S3C24XX
 config ARCH_DAVINCI
bool "TI DaVinci"
select ARCH_HAS_HOLES_MEMORYMODEL
-   select CLKDEV_LOOKUP
+   select COMMON_CLK
select CPU_ARM926T
select GENERIC_ALLOCATOR
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_CHIP
select GPIOLIB
select HAVE_IDE
+   select PM_GENERIC_DOMAINS if PM
+   select PM_GENERIC_DOMAINS_OF if PM && OF
+   select RESET_CONTROLLER
select USE_OF
select ZONE_DMA
help
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 4e8178050027..8725d8bea567 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -5,8 +5,8 @@
 #
 
 # Common objects
-obj-y  := time.o clock.o serial.o psc.o \
-  usb.o common.o sram.o aemif.o
+obj-y  := time.o serial.o usb.o \
+  common.o sram.o aemif.o
 
 obj-$(CONFIG_DAVINCI_MUX)  += mux.o
 
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index d7894d5aaa25..2d058568e004 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -12,10 +12,6 @@
 #ifndef __ARCH_ARM_DAVINCI_CLOCK_H
 #define __ARCH_ARM_DAVINCI_CLOCK_H
 
-#define DAVINCI_PLL1_BASE 0x01c40800
-#define DAVINCI_PLL2_BASE 0x01c40c00
-#define MAX_PLL 2
-
 /* PLL/Reset register offsets */
 #define PLLCTL  0x100
 #define PLLCTL_PLLENBIT(0)
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index fa99197d36f9..db4c95ef4d5c 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -35,6 +35,10 @@
 #include 
 #include 
 
+#define DAVINCI_PLL1_BASE  0x01c40800
+#define DAVINCI_PLL2_BASE  0x01c40c00
+#define DAVINCI_PWR_SLEEP_CNTRL_BASE   0x01c41000
+
 #define DAVINCI_SYSTEM_MODULE_BASE 0x01c4
 #define SYSMOD_VDAC_CONFIG 0x2c
 #define SYSMOD_VIDCLKCTL   0x38
diff --git a/arch/arm/mach-davinci/psc.h b/arch/arm/mach-davinci/psc.h
index 8af9f09fc10c..b58707cf7033 100644
--- a/arch/arm/mach-davinci/psc.h
+++ b/arch/arm/mach-davinci/psc.h
@@ -27,8 +27,6 @@
 #ifndef __ASM_ARCH_PSC_H
 #define __ASM_ARCH_PSC_H
 
-#defineDAVINCI_PWR_SLEEP_CNTRL_BASE0x01C41000
-
 /* Power and Sleep Controller (PSC) Domains */
 #define DAVINCI_GPSC_ARMDOMAIN 0
 #define DAVINCI_GPSC_DSPDOMAIN 1
-- 
2.17.0

[PATCH v9 15/27] ARM: davinci: switch to common clock framework

[David Lechner]

This switches ARCH_DAVINCI to use the common clock framework. The legacy
clock code in arch/arm/mach-davinci/ is no longer used. New drivers in
drivers/clk/davinci/ are used instead.

A few macros had to be moved to prevent compilation errors.

Signed-off-by: David Lechner 
---

v9 changes:
- none

v8 changes:
- none

v7 changes:
- s/compile/compilation and space instead of tab
- add PM_GENERIC_DOMAINS dependencies

v6 changes:
- clean up indent on Common objects section


 arch/arm/Kconfig| 5 -
 arch/arm/mach-davinci/Makefile  | 4 ++--
 arch/arm/mach-davinci/clock.h   | 4 
 arch/arm/mach-davinci/davinci.h | 4 
 arch/arm/mach-davinci/psc.h | 2 --
 5 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a7f8e7f4b88f..a57ad13810c8 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -609,13 +609,16 @@ config ARCH_S3C24XX
 config ARCH_DAVINCI
bool "TI DaVinci"
select ARCH_HAS_HOLES_MEMORYMODEL
-   select CLKDEV_LOOKUP
+   select COMMON_CLK
select CPU_ARM926T
select GENERIC_ALLOCATOR
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_CHIP
select GPIOLIB
select HAVE_IDE
+   select PM_GENERIC_DOMAINS if PM
+   select PM_GENERIC_DOMAINS_OF if PM && OF
+   select RESET_CONTROLLER
select USE_OF
select ZONE_DMA
help
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 4e8178050027..8725d8bea567 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -5,8 +5,8 @@
 #
 
 # Common objects
-obj-y  := time.o clock.o serial.o psc.o \
-  usb.o common.o sram.o aemif.o
+obj-y  := time.o serial.o usb.o \
+  common.o sram.o aemif.o
 
 obj-$(CONFIG_DAVINCI_MUX)  += mux.o
 
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index d7894d5aaa25..2d058568e004 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -12,10 +12,6 @@
 #ifndef __ARCH_ARM_DAVINCI_CLOCK_H
 #define __ARCH_ARM_DAVINCI_CLOCK_H
 
-#define DAVINCI_PLL1_BASE 0x01c40800
-#define DAVINCI_PLL2_BASE 0x01c40c00
-#define MAX_PLL 2
-
 /* PLL/Reset register offsets */
 #define PLLCTL  0x100
 #define PLLCTL_PLLENBIT(0)
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index fa99197d36f9..db4c95ef4d5c 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -35,6 +35,10 @@
 #include 
 #include 
 
+#define DAVINCI_PLL1_BASE  0x01c40800
+#define DAVINCI_PLL2_BASE  0x01c40c00
+#define DAVINCI_PWR_SLEEP_CNTRL_BASE   0x01c41000
+
 #define DAVINCI_SYSTEM_MODULE_BASE 0x01c4
 #define SYSMOD_VDAC_CONFIG 0x2c
 #define SYSMOD_VIDCLKCTL   0x38
diff --git a/arch/arm/mach-davinci/psc.h b/arch/arm/mach-davinci/psc.h
index 8af9f09fc10c..b58707cf7033 100644
--- a/arch/arm/mach-davinci/psc.h
+++ b/arch/arm/mach-davinci/psc.h
@@ -27,8 +27,6 @@
 #ifndef __ASM_ARCH_PSC_H
 #define __ASM_ARCH_PSC_H
 
-#defineDAVINCI_PWR_SLEEP_CNTRL_BASE0x01C41000
-
 /* Power and Sleep Controller (PSC) Domains */
 #define DAVINCI_GPSC_ARMDOMAIN 0
 #define DAVINCI_GPSC_DSPDOMAIN 1
-- 
2.17.0

[PATCH v9 09/27] ARM: davinci: dm644x: add new clock init using common clock framework

[David Lechner]

This adds the new board-specific clock init in mach-davinci/dm644x.c
using the new common clock framework drivers.

The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.

Also clean up the #includes since we are adding some here.

Signed-off-by: David Lechner 
---

v9 changes:
- register PLL1 and PSC in dm644x_init_time() instead of as platform device so
  that we get the correct timer0 clock for davinci_timer_init()
- Fixed size of PLL memory block

v8 changes:
- none

v7 changes:
- add clock platform device declarations
- register platform devices instead of registering clocks directly
- add davinci prefix to commit description

v6 changes:
- add blank lines between function calls


 arch/arm/mach-davinci/board-dm644x-evm.c  |  2 +
 arch/arm/mach-davinci/board-neuros-osd2.c |  2 +
 arch/arm/mach-davinci/board-sffsdr.c  |  2 +
 arch/arm/mach-davinci/davinci.h   |  1 +
 arch/arm/mach-davinci/dm644x.c| 64 +++
 5 files changed, 62 insertions(+), 9 deletions(-)

diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c 
b/arch/arm/mach-davinci/board-dm644x-evm.c
index 5bf024784738..190a28cc91bd 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -768,6 +768,8 @@ static __init void davinci_evm_init(void)
struct clk *aemif_clk;
struct davinci_soc_info *soc_info = _soc_info;
 
+   dm644x_register_clocks();
+
dm644x_init_devices();
 
ret = dm644x_gpio_register();
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c 
b/arch/arm/mach-davinci/board-neuros-osd2.c
index 0b13237e63f2..06e7f592b62b 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -174,6 +174,8 @@ static __init void davinci_ntosd2_init(void)
struct clk *aemif_clk;
struct davinci_soc_info *soc_info = _soc_info;
 
+   dm644x_register_clocks();
+
dm644x_init_devices();
 
ret = dm644x_gpio_register();
diff --git a/arch/arm/mach-davinci/board-sffsdr.c 
b/arch/arm/mach-davinci/board-sffsdr.c
index e7c1728b0833..792bb84d5011 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -134,6 +134,8 @@ static __init void davinci_sffsdr_init(void)
 {
struct davinci_soc_info *soc_info = _soc_info;
 
+   dm644x_register_clocks();
+
dm644x_init_devices();
 
platform_add_devices(davinci_sffsdr_devices,
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index a799b5266d4b..16aca5853ab2 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -108,6 +108,7 @@ int dm365_gpio_register(void);
 void dm644x_init(void);
 void dm644x_init_devices(void);
 void dm644x_init_time(void);
+void dm644x_register_clocks(void);
 void dm644x_init_asp(void);
 int dm644x_init_video(struct vpfe_config *, struct vpbe_config *);
 int dm644x_gpio_register(void);
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 708df0ed8554..b359f9a68134 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -8,28 +8,34 @@
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
  */
-#include 
-#include 
-#include 
+
+#include 
+#include 
+#include 
 #include 
-#include 
+#include 
 #include 
 #include 
+#include 
+#include 
 
 #include 
 
+#include 
 #include 
 #include 
-#include "psc.h"
 #include 
-#include 
 #include 
-#include 
+#include 
 
+#include "asp.h"
 #include "davinci.h"
-#include "clock.h"
 #include "mux.h"
-#include "asp.h"
+
+#ifndef CONFIG_COMMON_CLK
+#include "clock.h"
+#include "psc.h"
+#endif
 
 /*
  * Device specific clocks
@@ -43,6 +49,7 @@
 #define DM644X_EMAC_CNTRL_RAM_OFFSET   0x2000
 #define DM644X_EMAC_CNTRL_RAM_SIZE 0x2000
 
+#ifndef CONFIG_COMMON_CLK
 static struct pll_data pll1_data = {
.num   = 1,
.phys_base = DAVINCI_PLL1_BASE,
@@ -326,6 +333,7 @@ static struct clk_lookup dm644x_clks[] = {
CLK("davinci-wdt", NULL, _clk),
CLK(NULL, NULL, NULL),
 };
+#endif
 
 static struct emac_platform_data dm644x_emac_pdata = {
.ctrl_reg_offset= DM644X_EMAC_CNTRL_OFFSET,
@@ -934,8 +942,46 @@ void __init dm644x_init(void)
 
 void __init dm644x_init_time(void)
 {
+#ifdef CONFIG_COMMON_CLK
+   void __iomem *pll1, *psc;
+   struct clk *clk;
+
+   clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM644X_REF_FREQ);
+
+   pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K);
+   dm355_pll1_init(NULL, pll1, NULL);
+
+   psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K);
+   dm355_psc_init(NULL, psc);
+
+   clk = clk_get(NULL, "timer0");
+
+   davinci_timer_init(clk);
+#else
davinci_clk_init(dm644x_clks);
davinci_timer_init(_clk);
+#endif
+}
+
+static struct resource dm644x_pll2_resources[] = {
+   {
+  

[PATCH v9 09/27] ARM: davinci: dm644x: add new clock init using common clock framework

[David Lechner]

This adds the new board-specific clock init in mach-davinci/dm644x.c
using the new common clock framework drivers.

The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.

Also clean up the #includes since we are adding some here.

Signed-off-by: David Lechner 
---

v9 changes:
- register PLL1 and PSC in dm644x_init_time() instead of as platform device so
  that we get the correct timer0 clock for davinci_timer_init()
- Fixed size of PLL memory block

v8 changes:
- none

v7 changes:
- add clock platform device declarations
- register platform devices instead of registering clocks directly
- add davinci prefix to commit description

v6 changes:
- add blank lines between function calls


 arch/arm/mach-davinci/board-dm644x-evm.c  |  2 +
 arch/arm/mach-davinci/board-neuros-osd2.c |  2 +
 arch/arm/mach-davinci/board-sffsdr.c  |  2 +
 arch/arm/mach-davinci/davinci.h   |  1 +
 arch/arm/mach-davinci/dm644x.c| 64 +++
 5 files changed, 62 insertions(+), 9 deletions(-)

diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c 
b/arch/arm/mach-davinci/board-dm644x-evm.c
index 5bf024784738..190a28cc91bd 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -768,6 +768,8 @@ static __init void davinci_evm_init(void)
struct clk *aemif_clk;
struct davinci_soc_info *soc_info = _soc_info;
 
+   dm644x_register_clocks();
+
dm644x_init_devices();
 
ret = dm644x_gpio_register();
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c 
b/arch/arm/mach-davinci/board-neuros-osd2.c
index 0b13237e63f2..06e7f592b62b 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -174,6 +174,8 @@ static __init void davinci_ntosd2_init(void)
struct clk *aemif_clk;
struct davinci_soc_info *soc_info = _soc_info;
 
+   dm644x_register_clocks();
+
dm644x_init_devices();
 
ret = dm644x_gpio_register();
diff --git a/arch/arm/mach-davinci/board-sffsdr.c 
b/arch/arm/mach-davinci/board-sffsdr.c
index e7c1728b0833..792bb84d5011 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -134,6 +134,8 @@ static __init void davinci_sffsdr_init(void)
 {
struct davinci_soc_info *soc_info = _soc_info;
 
+   dm644x_register_clocks();
+
dm644x_init_devices();
 
platform_add_devices(davinci_sffsdr_devices,
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index a799b5266d4b..16aca5853ab2 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -108,6 +108,7 @@ int dm365_gpio_register(void);
 void dm644x_init(void);
 void dm644x_init_devices(void);
 void dm644x_init_time(void);
+void dm644x_register_clocks(void);
 void dm644x_init_asp(void);
 int dm644x_init_video(struct vpfe_config *, struct vpbe_config *);
 int dm644x_gpio_register(void);
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 708df0ed8554..b359f9a68134 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -8,28 +8,34 @@
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
  */
-#include 
-#include 
-#include 
+
+#include 
+#include 
+#include 
 #include 
-#include 
+#include 
 #include 
 #include 
+#include 
+#include 
 
 #include 
 
+#include 
 #include 
 #include 
-#include "psc.h"
 #include 
-#include 
 #include 
-#include 
+#include 
 
+#include "asp.h"
 #include "davinci.h"
-#include "clock.h"
 #include "mux.h"
-#include "asp.h"
+
+#ifndef CONFIG_COMMON_CLK
+#include "clock.h"
+#include "psc.h"
+#endif
 
 /*
  * Device specific clocks
@@ -43,6 +49,7 @@
 #define DM644X_EMAC_CNTRL_RAM_OFFSET   0x2000
 #define DM644X_EMAC_CNTRL_RAM_SIZE 0x2000
 
+#ifndef CONFIG_COMMON_CLK
 static struct pll_data pll1_data = {
.num   = 1,
.phys_base = DAVINCI_PLL1_BASE,
@@ -326,6 +333,7 @@ static struct clk_lookup dm644x_clks[] = {
CLK("davinci-wdt", NULL, _clk),
CLK(NULL, NULL, NULL),
 };
+#endif
 
 static struct emac_platform_data dm644x_emac_pdata = {
.ctrl_reg_offset= DM644X_EMAC_CNTRL_OFFSET,
@@ -934,8 +942,46 @@ void __init dm644x_init(void)
 
 void __init dm644x_init_time(void)
 {
+#ifdef CONFIG_COMMON_CLK
+   void __iomem *pll1, *psc;
+   struct clk *clk;
+
+   clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM644X_REF_FREQ);
+
+   pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K);
+   dm355_pll1_init(NULL, pll1, NULL);
+
+   psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K);
+   dm355_psc_init(NULL, psc);
+
+   clk = clk_get(NULL, "timer0");
+
+   davinci_timer_init(clk);
+#else
davinci_clk_init(dm644x_clks);
davinci_timer_init(_clk);
+#endif
+}
+
+static struct resource dm644x_pll2_resources[] = {
+   {
+   .start  = 

Re: [PATCH 31/61] net: dsa: simplify getting .drvdata

[Florian Fainelli]

On 04/19/2018 07:06 AM, Wolfram Sang wrote:
> We should get drvdata from struct device directly. Going via
> platform_device is an unneeded step back and forth.
> 
> Signed-off-by: Wolfram Sang 
> ---
> 
> Build tested only. buildbot is happy. Please apply individually.

Similar to my other comment on patch 4, would not you want to use
dev_set_drvdata() to be consistent? This would be functionally equivalent.
--
Florian

Re: [PATCH 31/61] net: dsa: simplify getting .drvdata

[Florian Fainelli]

On 04/19/2018 07:06 AM, Wolfram Sang wrote:
> We should get drvdata from struct device directly. Going via
> platform_device is an unneeded step back and forth.
> 
> Signed-off-by: Wolfram Sang 
> ---
> 
> Build tested only. buildbot is happy. Please apply individually.

Similar to my other comment on patch 4, would not you want to use
dev_set_drvdata() to be consistent? This would be functionally equivalent.
--
Florian

[PATCH 2/2] Use bit-wise majority to recover the contents of ONFI parameter

[Jane Wan]

Signed-off-by: Jane Wan 
---
 drivers/mtd/nand/nand_base.c |   35 +++
 1 file changed, 31 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index c2e1232..161b523 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -3153,8 +3153,10 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, 
struct nand_chip *chip,
int *busw)
 {
struct nand_onfi_params *p = >onfi_params;
-   int i, j;
-   int val;
+   int i, j, k, len, val;
+   uint8_t copy[3][256], v8;
+
+   len = (sizeof(*p) > 256) ? 256 : sizeof(*p);
 
/* Try ONFI for unknown chip or LP */
chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
@@ -3170,11 +3172,36 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, 
struct nand_chip *chip,
le16_to_cpu(p->crc)) {
break;
}
+   pr_err("CRC of parameter page %d is not valid\n", i);
+   for (j = 0; j < len; j++)
+   copy[i][j] = ((uint8_t *)p)[j];
}
 
if (i == 3) {
-   pr_err("Could not find valid ONFI parameter page; aborting\n");
-   return 0;
+   pr_err("Could not find valid ONFI parameter page\n");
+   pr_info("Recover ONFI parameters with bit-wise majority\n");
+   for (j = 0; j < len; j++) {
+   if (copy[0][j] == copy[1][j] ||
+   copy[0][j] == copy[2][j]) {
+   ((uint8_t *)p)[j] = copy[0][j];
+   } else if (copy[1][j] == copy[2][j]) {
+   ((uint8_t *)p)[j] = copy[1][j];
+   } else {
+   ((uint8_t *)p)[j] = 0;
+   for (k = 0; k < 8; k++) {
+   v8 = (copy[0][j] >> k) & 0x1;
+   v8 += (copy[1][j] >> k) & 0x1;
+   v8 += (copy[2][j] >> k) & 0x1;
+   if (v8 > 1)
+   ((uint8_t *)p)[j] |= (1 << k);
+   }
+   }
+   }
+   if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) !=
+   le16_to_cpu(p->crc)) {
+   pr_err("ONFI parameter recovery failed, aborting\n");
+   return 0;
+   }
}
 
/* Check version */
-- 
1.7.9.5

[PATCH v9 18/27] ARM: davinci: dm355: Remove legacy clock init

[David Lechner]

This removes the unused legacy clock init code from
arch/arm/mach-davinci/dm355.c.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- rebased

v8 changes:
- none

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased


 arch/arm/mach-davinci/dm355.c | 357 --
 1 file changed, 357 deletions(-)

diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 14014b942e8a..9f7d38d12c88 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -35,11 +35,6 @@
 #include "davinci.h"
 #include "mux.h"
 
-#ifndef CONFIG_COMMON_CLK
-#include "clock.h"
-#include "psc.h"
-#endif
-
 #define DM355_UART2_BASE   (IO_PHYS + 0x206000)
 #define DM355_OSD_BASE (IO_PHYS + 0x70200)
 #define DM355_VENC_BASE(IO_PHYS + 0x70400)
@@ -49,349 +44,6 @@
  */
 #define DM355_REF_FREQ 2400/* 24 or 36 MHz */
 
-#ifndef CONFIG_COMMON_CLK
-static struct pll_data pll1_data = {
-   .num   = 1,
-   .phys_base = DAVINCI_PLL1_BASE,
-   .flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
-};
-
-static struct pll_data pll2_data = {
-   .num   = 2,
-   .phys_base = DAVINCI_PLL2_BASE,
-   .flags = PLL_HAS_PREDIV,
-};
-
-static struct clk ref_clk = {
-   .name = "ref_clk",
-   /* FIXME -- crystal rate is board-specific */
-   .rate = DM355_REF_FREQ,
-};
-
-static struct clk pll1_clk = {
-   .name = "pll1",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .pll_data = _data,
-};
-
-static struct clk pll1_aux_clk = {
-   .name = "pll1_aux_clk",
-   .parent = _clk,
-   .flags = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll1_sysclk1 = {
-   .name = "pll1_sysclk1",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV1,
-};
-
-static struct clk pll1_sysclk2 = {
-   .name = "pll1_sysclk2",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV2,
-};
-
-static struct clk pll1_sysclk3 = {
-   .name = "pll1_sysclk3",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV3,
-};
-
-static struct clk pll1_sysclk4 = {
-   .name = "pll1_sysclk4",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV4,
-};
-
-static struct clk pll1_sysclkbp = {
-   .name = "pll1_sysclkbp",
-   .parent = _clk,
-   .flags = CLK_PLL | PRE_PLL,
-   .div_reg = BPDIV
-};
-
-static struct clk vpss_dac_clk = {
-   .name = "vpss_dac",
-   .parent = _sysclk3,
-   .lpsc = DM355_LPSC_VPSS_DAC,
-};
-
-static struct clk vpss_master_clk = {
-   .name = "vpss_master",
-   .parent = _sysclk4,
-   .lpsc = DAVINCI_LPSC_VPSSMSTR,
-   .flags = CLK_PSC,
-};
-
-static struct clk vpss_slave_clk = {
-   .name = "vpss_slave",
-   .parent = _sysclk4,
-   .lpsc = DAVINCI_LPSC_VPSSSLV,
-};
-
-static struct clk clkout1_clk = {
-   .name = "clkout1",
-   .parent = _aux_clk,
-   /* NOTE:  clkout1 can be externally gated by muxing GPIO-18 */
-};
-
-static struct clk clkout2_clk = {
-   .name = "clkout2",
-   .parent = _sysclkbp,
-};
-
-static struct clk pll2_clk = {
-   .name = "pll2",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .pll_data = _data,
-};
-
-static struct clk pll2_sysclk1 = {
-   .name = "pll2_sysclk1",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV1,
-};
-
-static struct clk pll2_sysclkbp = {
-   .name = "pll2_sysclkbp",
-   .parent = _clk,
-   .flags = CLK_PLL | PRE_PLL,
-   .div_reg = BPDIV
-};
-
-static struct clk clkout3_clk = {
-   .name = "clkout3",
-   .parent = _sysclkbp,
-   /* NOTE:  clkout3 can be externally gated by muxing GPIO-16 */
-};
-
-static struct clk arm_clk = {
-   .name = "arm_clk",
-   .parent = _sysclk1,
-   .lpsc = DAVINCI_LPSC_ARM,
-   .flags = ALWAYS_ENABLED,
-};
-
-/*
- * NOT LISTED below, and not touched by Linux
- *   - in SyncReset state by default
- * .lpsc = DAVINCI_LPSC_TPCC,
- * .lpsc = DAVINCI_LPSC_TPTC0,
- * .lpsc = DAVINCI_LPSC_TPTC1,
- * .lpsc = DAVINCI_LPSC_DDR_EMIF, .parent = _clk,
- * .lpsc = DAVINCI_LPSC_MEMSTICK,
- *   - in Enabled state by default
- * .lpsc = DAVINCI_LPSC_SYSTEM_SUBSYS,
- * .lpsc = DAVINCI_LPSC_SCR2,  // "bus"
- * .lpsc = DAVINCI_LPSC_SCR3,  // "bus"
- * .lpsc = DAVINCI_LPSC_SCR4,  // "bus"
- * .lpsc = DAVINCI_LPSC_CROSSBAR,  // "emulation"
- * .lpsc = DAVINCI_LPSC_CFG27, // "test"
- * .lpsc = DAVINCI_LPSC_CFG3,  // "test"
- * .lpsc = DAVINCI_LPSC_CFG5,  // "test"
- */
-
-static struct clk mjcp_clk = {
-   .name = "mjcp",
-   .parent = _sysclk1,
-   .lpsc = DAVINCI_LPSC_IMCOP,
-};
-
-static struct clk uart0_clk = {
-   .name = "uart0",
-   .parent = _aux_clk,
-   .lpsc = DAVINCI_LPSC_UART0,
-};
-

[PATCH 2/2] Use bit-wise majority to recover the contents of ONFI parameter

[Jane Wan]

Signed-off-by: Jane Wan 
---
 drivers/mtd/nand/nand_base.c |   35 +++
 1 file changed, 31 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index c2e1232..161b523 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -3153,8 +3153,10 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, 
struct nand_chip *chip,
int *busw)
 {
struct nand_onfi_params *p = >onfi_params;
-   int i, j;
-   int val;
+   int i, j, k, len, val;
+   uint8_t copy[3][256], v8;
+
+   len = (sizeof(*p) > 256) ? 256 : sizeof(*p);
 
/* Try ONFI for unknown chip or LP */
chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
@@ -3170,11 +3172,36 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, 
struct nand_chip *chip,
le16_to_cpu(p->crc)) {
break;
}
+   pr_err("CRC of parameter page %d is not valid\n", i);
+   for (j = 0; j < len; j++)
+   copy[i][j] = ((uint8_t *)p)[j];
}
 
if (i == 3) {
-   pr_err("Could not find valid ONFI parameter page; aborting\n");
-   return 0;
+   pr_err("Could not find valid ONFI parameter page\n");
+   pr_info("Recover ONFI parameters with bit-wise majority\n");
+   for (j = 0; j < len; j++) {
+   if (copy[0][j] == copy[1][j] ||
+   copy[0][j] == copy[2][j]) {
+   ((uint8_t *)p)[j] = copy[0][j];
+   } else if (copy[1][j] == copy[2][j]) {
+   ((uint8_t *)p)[j] = copy[1][j];
+   } else {
+   ((uint8_t *)p)[j] = 0;
+   for (k = 0; k < 8; k++) {
+   v8 = (copy[0][j] >> k) & 0x1;
+   v8 += (copy[1][j] >> k) & 0x1;
+   v8 += (copy[2][j] >> k) & 0x1;
+   if (v8 > 1)
+   ((uint8_t *)p)[j] |= (1 << k);
+   }
+   }
+   }
+   if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) !=
+   le16_to_cpu(p->crc)) {
+   pr_err("ONFI parameter recovery failed, aborting\n");
+   return 0;
+   }
}
 
/* Check version */
-- 
1.7.9.5

[PATCH v9 18/27] ARM: davinci: dm355: Remove legacy clock init

[David Lechner]

This removes the unused legacy clock init code from
arch/arm/mach-davinci/dm355.c.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- rebased

v8 changes:
- none

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased


 arch/arm/mach-davinci/dm355.c | 357 --
 1 file changed, 357 deletions(-)

diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 14014b942e8a..9f7d38d12c88 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -35,11 +35,6 @@
 #include "davinci.h"
 #include "mux.h"
 
-#ifndef CONFIG_COMMON_CLK
-#include "clock.h"
-#include "psc.h"
-#endif
-
 #define DM355_UART2_BASE   (IO_PHYS + 0x206000)
 #define DM355_OSD_BASE (IO_PHYS + 0x70200)
 #define DM355_VENC_BASE(IO_PHYS + 0x70400)
@@ -49,349 +44,6 @@
  */
 #define DM355_REF_FREQ 2400/* 24 or 36 MHz */
 
-#ifndef CONFIG_COMMON_CLK
-static struct pll_data pll1_data = {
-   .num   = 1,
-   .phys_base = DAVINCI_PLL1_BASE,
-   .flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
-};
-
-static struct pll_data pll2_data = {
-   .num   = 2,
-   .phys_base = DAVINCI_PLL2_BASE,
-   .flags = PLL_HAS_PREDIV,
-};
-
-static struct clk ref_clk = {
-   .name = "ref_clk",
-   /* FIXME -- crystal rate is board-specific */
-   .rate = DM355_REF_FREQ,
-};
-
-static struct clk pll1_clk = {
-   .name = "pll1",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .pll_data = _data,
-};
-
-static struct clk pll1_aux_clk = {
-   .name = "pll1_aux_clk",
-   .parent = _clk,
-   .flags = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll1_sysclk1 = {
-   .name = "pll1_sysclk1",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV1,
-};
-
-static struct clk pll1_sysclk2 = {
-   .name = "pll1_sysclk2",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV2,
-};
-
-static struct clk pll1_sysclk3 = {
-   .name = "pll1_sysclk3",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV3,
-};
-
-static struct clk pll1_sysclk4 = {
-   .name = "pll1_sysclk4",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV4,
-};
-
-static struct clk pll1_sysclkbp = {
-   .name = "pll1_sysclkbp",
-   .parent = _clk,
-   .flags = CLK_PLL | PRE_PLL,
-   .div_reg = BPDIV
-};
-
-static struct clk vpss_dac_clk = {
-   .name = "vpss_dac",
-   .parent = _sysclk3,
-   .lpsc = DM355_LPSC_VPSS_DAC,
-};
-
-static struct clk vpss_master_clk = {
-   .name = "vpss_master",
-   .parent = _sysclk4,
-   .lpsc = DAVINCI_LPSC_VPSSMSTR,
-   .flags = CLK_PSC,
-};
-
-static struct clk vpss_slave_clk = {
-   .name = "vpss_slave",
-   .parent = _sysclk4,
-   .lpsc = DAVINCI_LPSC_VPSSSLV,
-};
-
-static struct clk clkout1_clk = {
-   .name = "clkout1",
-   .parent = _aux_clk,
-   /* NOTE:  clkout1 can be externally gated by muxing GPIO-18 */
-};
-
-static struct clk clkout2_clk = {
-   .name = "clkout2",
-   .parent = _sysclkbp,
-};
-
-static struct clk pll2_clk = {
-   .name = "pll2",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .pll_data = _data,
-};
-
-static struct clk pll2_sysclk1 = {
-   .name = "pll2_sysclk1",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV1,
-};
-
-static struct clk pll2_sysclkbp = {
-   .name = "pll2_sysclkbp",
-   .parent = _clk,
-   .flags = CLK_PLL | PRE_PLL,
-   .div_reg = BPDIV
-};
-
-static struct clk clkout3_clk = {
-   .name = "clkout3",
-   .parent = _sysclkbp,
-   /* NOTE:  clkout3 can be externally gated by muxing GPIO-16 */
-};
-
-static struct clk arm_clk = {
-   .name = "arm_clk",
-   .parent = _sysclk1,
-   .lpsc = DAVINCI_LPSC_ARM,
-   .flags = ALWAYS_ENABLED,
-};
-
-/*
- * NOT LISTED below, and not touched by Linux
- *   - in SyncReset state by default
- * .lpsc = DAVINCI_LPSC_TPCC,
- * .lpsc = DAVINCI_LPSC_TPTC0,
- * .lpsc = DAVINCI_LPSC_TPTC1,
- * .lpsc = DAVINCI_LPSC_DDR_EMIF, .parent = _clk,
- * .lpsc = DAVINCI_LPSC_MEMSTICK,
- *   - in Enabled state by default
- * .lpsc = DAVINCI_LPSC_SYSTEM_SUBSYS,
- * .lpsc = DAVINCI_LPSC_SCR2,  // "bus"
- * .lpsc = DAVINCI_LPSC_SCR3,  // "bus"
- * .lpsc = DAVINCI_LPSC_SCR4,  // "bus"
- * .lpsc = DAVINCI_LPSC_CROSSBAR,  // "emulation"
- * .lpsc = DAVINCI_LPSC_CFG27, // "test"
- * .lpsc = DAVINCI_LPSC_CFG3,  // "test"
- * .lpsc = DAVINCI_LPSC_CFG5,  // "test"
- */
-
-static struct clk mjcp_clk = {
-   .name = "mjcp",
-   .parent = _sysclk1,
-   .lpsc = DAVINCI_LPSC_IMCOP,
-};
-
-static struct clk uart0_clk = {
-   .name = "uart0",
-   .parent = _aux_clk,
-   .lpsc = DAVINCI_LPSC_UART0,
-};
-
-static struct clk uart1_clk = {
- 

Re: [PATCH] net/mlx5: report persistent netdev stats across ifdown/ifup commands

[Qing Huang]

Thanks! Looks like Eran's patch will be available much sooner than v4.18 
release time frame (since v4.16 was just released).


We will wait. :-)


On 04/26/2018 04:43 PM, Saeed Mahameed wrote:

Before you address my comments, it looks like Eran's work is
converging and we will finalize the internal
review next week, in which case submission will take 2-3 weeks from today.

So i suggest to wait.

please checkout:
https://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux.git/commit/?h=testing/mlx5e-stats=15ffb7f87432d073e8ac0e6b895188d40fdda4d4

[PATCH 1/2] Fix FSL NAND driver to read all ONFI parameter pages

[Jane Wan]

Signed-off-by: Jane Wan 
---
 drivers/mtd/nand/fsl_ifc_nand.c |   10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index ca36b35..a3cf6ca 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -413,6 +413,7 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned 
int command,
struct fsl_ifc_mtd *priv = chip->priv;
struct fsl_ifc_ctrl *ctrl = priv->ctrl;
struct fsl_ifc_runtime __iomem *ifc = ctrl->rregs;
+   int len;
 
/* clear the read buffer */
ifc_nand_ctrl->read_bytes = 0;
@@ -462,11 +463,12 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, 
unsigned int command,
ifc_out32(column, >ifc_nand.row3);
 
/*
-* although currently it's 8 bytes for READID, we always read
-* the maximum 256 bytes(for PARAM)
+* For READID, read 8 bytes that are currently used.
+* For PARAM, read all 3 copies of 256-bytes pages.
 */
-   ifc_out32(256, >ifc_nand.nand_fbcr);
-   ifc_nand_ctrl->read_bytes = 256;
+   len = (command == NAND_CMD_PARAM) ? (3 * 256) : 8;
+   ifc_out32(len, >ifc_nand.nand_fbcr);
+   ifc_nand_ctrl->read_bytes = len;
 
set_addr(mtd, 0, 0, 0);
fsl_ifc_run_command(mtd);
-- 
1.7.9.5

Re: [PATCH] net/mlx5: report persistent netdev stats across ifdown/ifup commands

[Qing Huang]

Thanks! Looks like Eran's patch will be available much sooner than v4.18 
release time frame (since v4.16 was just released).


We will wait. :-)


On 04/26/2018 04:43 PM, Saeed Mahameed wrote:

Before you address my comments, it looks like Eran's work is
converging and we will finalize the internal
review next week, in which case submission will take 2-3 weeks from today.

So i suggest to wait.

please checkout:
https://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux.git/commit/?h=testing/mlx5e-stats=15ffb7f87432d073e8ac0e6b895188d40fdda4d4

[PATCH 1/2] Fix FSL NAND driver to read all ONFI parameter pages

[Jane Wan]

Signed-off-by: Jane Wan 
---
 drivers/mtd/nand/fsl_ifc_nand.c |   10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index ca36b35..a3cf6ca 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -413,6 +413,7 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned 
int command,
struct fsl_ifc_mtd *priv = chip->priv;
struct fsl_ifc_ctrl *ctrl = priv->ctrl;
struct fsl_ifc_runtime __iomem *ifc = ctrl->rregs;
+   int len;
 
/* clear the read buffer */
ifc_nand_ctrl->read_bytes = 0;
@@ -462,11 +463,12 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, 
unsigned int command,
ifc_out32(column, >ifc_nand.row3);
 
/*
-* although currently it's 8 bytes for READID, we always read
-* the maximum 256 bytes(for PARAM)
+* For READID, read 8 bytes that are currently used.
+* For PARAM, read all 3 copies of 256-bytes pages.
 */
-   ifc_out32(256, >ifc_nand.nand_fbcr);
-   ifc_nand_ctrl->read_bytes = 256;
+   len = (command == NAND_CMD_PARAM) ? (3 * 256) : 8;
+   ifc_out32(len, >ifc_nand.nand_fbcr);
+   ifc_nand_ctrl->read_bytes = len;
 
set_addr(mtd, 0, 0, 0);
fsl_ifc_run_command(mtd);
-- 
1.7.9.5

[PATCH 0/2] Fix fsl_ifc_nand reading ONFI parameters to meet ONFI spec

[Jane Wan]

Per ONFI specification (Rev. 4.0), if the CRC of the first parameter page
read is not valid, the host should read redundant parameter page copies
until it finds a valid copy.  If all three parameter pages have invalid
CRC values, the bit-wise majority may be used to recover the contents of
the parameter pages from the parameter page copies present.

The FSL NAND driver only reads the first page.  The first patch fixes the
driver to read all three parameter pages.  The second patch is the change
for using bit-wise majority to recover the contents of ONFI parameter.

Jane Wan (2):
  Fix FSL NAND driver to read all ONFI parameter pages
  Use bit-wise majority to recover the contents of ONFI parameter

 drivers/mtd/nand/fsl_ifc_nand.c |   10 ++
 drivers/mtd/nand/nand_base.c|   35 +++
 2 files changed, 37 insertions(+), 8 deletions(-)

-- 
1.7.9.5

[PATCH 0/2] Fix fsl_ifc_nand reading ONFI parameters to meet ONFI spec

[Jane Wan]

Per ONFI specification (Rev. 4.0), if the CRC of the first parameter page
read is not valid, the host should read redundant parameter page copies
until it finds a valid copy.  If all three parameter pages have invalid
CRC values, the bit-wise majority may be used to recover the contents of
the parameter pages from the parameter page copies present.

The FSL NAND driver only reads the first page.  The first patch fixes the
driver to read all three parameter pages.  The second patch is the change
for using bit-wise majority to recover the contents of ONFI parameter.

Jane Wan (2):
  Fix FSL NAND driver to read all ONFI parameter pages
  Use bit-wise majority to recover the contents of ONFI parameter

 drivers/mtd/nand/fsl_ifc_nand.c |   10 ++
 drivers/mtd/nand/nand_base.c|   35 +++
 2 files changed, 37 insertions(+), 8 deletions(-)

-- 
1.7.9.5

[PATCH v9 16/27] ARM: davinci: da830: Remove legacy clock init

[David Lechner]

This removes the unused legacy clock init code from
arch/arm/mach-davinci/da830.c.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- rebased

v8 changes:
- none

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased

 arch/arm/mach-davinci/board-da830-evm.c |  12 -
 arch/arm/mach-davinci/da830.c   | 412 
 2 files changed, 424 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da830-evm.c 
b/arch/arm/mach-davinci/board-da830-evm.c
index 6e77c458ec8e..d283faefaf97 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -110,23 +110,11 @@ static __init void da830_evm_usb_init(void)
 {
int ret;
 
-#ifdef CONFIG_COMMON_CLK
ret = da8xx_register_usb_phy_clocks();
if (ret)
pr_warn("%s: USB PHY CLK registration failed: %d\n",
__func__, ret);
-#else
-   /* USB_REFCLKIN is not used. */
-   ret = da8xx_register_usb20_phy_clk(false);
-   if (ret)
-   pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n",
-   __func__, ret);
 
-   ret = da8xx_register_usb11_phy_clk(false);
-   if (ret)
-   pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
-   __func__, ret);
-#endif
ret = da8xx_register_usb_phy();
if (ret)
pr_warn("%s: USB PHY registration failed: %d\n",
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 8a79e245db1f..0bc5bd2665df 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -24,11 +24,6 @@
 
 #include "mux.h"
 
-#ifndef CONFIG_COMMON_CLK
-#include "clock.h"
-#include "psc.h"
-#endif
-
 /* Offsets of the 8 compare registers on the da830 */
 #define DA830_CMP12_0  0x60
 #define DA830_CMP12_1  0x64
@@ -41,404 +36,6 @@
 
 #define DA830_REF_FREQ 2400
 
-#ifndef CONFIG_COMMON_CLK
-static struct pll_data pll0_data = {
-   .num= 1,
-   .phys_base  = DA8XX_PLL0_BASE,
-   .flags  = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
-};
-
-static struct clk ref_clk = {
-   .name   = "ref_clk",
-   .rate   = DA830_REF_FREQ,
-};
-
-static struct clk pll0_clk = {
-   .name   = "pll0",
-   .parent = _clk,
-   .pll_data   = _data,
-   .flags  = CLK_PLL,
-};
-
-static struct clk pll0_aux_clk = {
-   .name   = "pll0_aux_clk",
-   .parent = _clk,
-   .flags  = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll0_sysclk2 = {
-   .name   = "pll0_sysclk2",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV2,
-};
-
-static struct clk pll0_sysclk3 = {
-   .name   = "pll0_sysclk3",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV3,
-};
-
-static struct clk pll0_sysclk4 = {
-   .name   = "pll0_sysclk4",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV4,
-};
-
-static struct clk pll0_sysclk5 = {
-   .name   = "pll0_sysclk5",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV5,
-};
-
-static struct clk pll0_sysclk6 = {
-   .name   = "pll0_sysclk6",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV6,
-};
-
-static struct clk pll0_sysclk7 = {
-   .name   = "pll0_sysclk7",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV7,
-};
-
-static struct clk i2c0_clk = {
-   .name   = "i2c0",
-   .parent = _aux_clk,
-};
-
-static struct clk timerp64_0_clk = {
-   .name   = "timer0",
-   .parent = _aux_clk,
-};
-
-static struct clk timerp64_1_clk = {
-   .name   = "timer1",
-   .parent = _aux_clk,
-};
-
-static struct clk arm_rom_clk = {
-   .name   = "arm_rom",
-   .parent = _sysclk2,
-   .lpsc   = DA8XX_LPSC0_ARM_RAM_ROM,
-   .flags  = ALWAYS_ENABLED,
-};
-
-static struct clk scr0_ss_clk = {
-   .name   = "scr0_ss",
-   .parent = _sysclk2,
-   .lpsc   = DA8XX_LPSC0_SCR0_SS,
-   .flags  = ALWAYS_ENABLED,
-};
-
-static struct clk scr1_ss_clk = {
-   .name   = "scr1_ss",
-   .parent = _sysclk2,
-   .lpsc   = DA8XX_LPSC0_SCR1_SS,
-   .flags  = ALWAYS_ENABLED,
-};
-
-static struct clk scr2_ss_clk = {
-   .name   = "scr2_ss",
-   .parent = _sysclk2,
-   .lpsc   = DA8XX_LPSC0_SCR2_SS,
-   .flags  = ALWAYS_ENABLED,
-};
-
-static struct clk dmax_clk = {
-   .name 

[PATCH v9 16/27] ARM: davinci: da830: Remove legacy clock init

[David Lechner]

This removes the unused legacy clock init code from
arch/arm/mach-davinci/da830.c.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- rebased

v8 changes:
- none

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased

 arch/arm/mach-davinci/board-da830-evm.c |  12 -
 arch/arm/mach-davinci/da830.c   | 412 
 2 files changed, 424 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da830-evm.c 
b/arch/arm/mach-davinci/board-da830-evm.c
index 6e77c458ec8e..d283faefaf97 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -110,23 +110,11 @@ static __init void da830_evm_usb_init(void)
 {
int ret;
 
-#ifdef CONFIG_COMMON_CLK
ret = da8xx_register_usb_phy_clocks();
if (ret)
pr_warn("%s: USB PHY CLK registration failed: %d\n",
__func__, ret);
-#else
-   /* USB_REFCLKIN is not used. */
-   ret = da8xx_register_usb20_phy_clk(false);
-   if (ret)
-   pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n",
-   __func__, ret);
 
-   ret = da8xx_register_usb11_phy_clk(false);
-   if (ret)
-   pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
-   __func__, ret);
-#endif
ret = da8xx_register_usb_phy();
if (ret)
pr_warn("%s: USB PHY registration failed: %d\n",
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 8a79e245db1f..0bc5bd2665df 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -24,11 +24,6 @@
 
 #include "mux.h"
 
-#ifndef CONFIG_COMMON_CLK
-#include "clock.h"
-#include "psc.h"
-#endif
-
 /* Offsets of the 8 compare registers on the da830 */
 #define DA830_CMP12_0  0x60
 #define DA830_CMP12_1  0x64
@@ -41,404 +36,6 @@
 
 #define DA830_REF_FREQ 2400
 
-#ifndef CONFIG_COMMON_CLK
-static struct pll_data pll0_data = {
-   .num= 1,
-   .phys_base  = DA8XX_PLL0_BASE,
-   .flags  = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
-};
-
-static struct clk ref_clk = {
-   .name   = "ref_clk",
-   .rate   = DA830_REF_FREQ,
-};
-
-static struct clk pll0_clk = {
-   .name   = "pll0",
-   .parent = _clk,
-   .pll_data   = _data,
-   .flags  = CLK_PLL,
-};
-
-static struct clk pll0_aux_clk = {
-   .name   = "pll0_aux_clk",
-   .parent = _clk,
-   .flags  = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll0_sysclk2 = {
-   .name   = "pll0_sysclk2",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV2,
-};
-
-static struct clk pll0_sysclk3 = {
-   .name   = "pll0_sysclk3",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV3,
-};
-
-static struct clk pll0_sysclk4 = {
-   .name   = "pll0_sysclk4",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV4,
-};
-
-static struct clk pll0_sysclk5 = {
-   .name   = "pll0_sysclk5",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV5,
-};
-
-static struct clk pll0_sysclk6 = {
-   .name   = "pll0_sysclk6",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV6,
-};
-
-static struct clk pll0_sysclk7 = {
-   .name   = "pll0_sysclk7",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV7,
-};
-
-static struct clk i2c0_clk = {
-   .name   = "i2c0",
-   .parent = _aux_clk,
-};
-
-static struct clk timerp64_0_clk = {
-   .name   = "timer0",
-   .parent = _aux_clk,
-};
-
-static struct clk timerp64_1_clk = {
-   .name   = "timer1",
-   .parent = _aux_clk,
-};
-
-static struct clk arm_rom_clk = {
-   .name   = "arm_rom",
-   .parent = _sysclk2,
-   .lpsc   = DA8XX_LPSC0_ARM_RAM_ROM,
-   .flags  = ALWAYS_ENABLED,
-};
-
-static struct clk scr0_ss_clk = {
-   .name   = "scr0_ss",
-   .parent = _sysclk2,
-   .lpsc   = DA8XX_LPSC0_SCR0_SS,
-   .flags  = ALWAYS_ENABLED,
-};
-
-static struct clk scr1_ss_clk = {
-   .name   = "scr1_ss",
-   .parent = _sysclk2,
-   .lpsc   = DA8XX_LPSC0_SCR1_SS,
-   .flags  = ALWAYS_ENABLED,
-};
-
-static struct clk scr2_ss_clk = {
-   .name   = "scr2_ss",
-   .parent = _sysclk2,
-   .lpsc   = DA8XX_LPSC0_SCR2_SS,
-   .flags  = ALWAYS_ENABLED,
-};
-
-static struct clk dmax_clk = {
-   .name   = "dmax",
-   .parent = 

[PATCH v9 20/27] ARM: davinci: dm644x: Remove legacy clock init

[David Lechner]

This removes the unused legacy clock init code from
arch/arm/mach-davinci/dm644x.c.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- rebased

v8 changes:
- none

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased


 arch/arm/mach-davinci/dm644x.c | 300 -
 1 file changed, 300 deletions(-)

diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index b359f9a68134..cf7b9b80816d 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -32,11 +32,6 @@
 #include "davinci.h"
 #include "mux.h"
 
-#ifndef CONFIG_COMMON_CLK
-#include "clock.h"
-#include "psc.h"
-#endif
-
 /*
  * Device specific clocks
  */
@@ -49,292 +44,6 @@
 #define DM644X_EMAC_CNTRL_RAM_OFFSET   0x2000
 #define DM644X_EMAC_CNTRL_RAM_SIZE 0x2000
 
-#ifndef CONFIG_COMMON_CLK
-static struct pll_data pll1_data = {
-   .num   = 1,
-   .phys_base = DAVINCI_PLL1_BASE,
-};
-
-static struct pll_data pll2_data = {
-   .num   = 2,
-   .phys_base = DAVINCI_PLL2_BASE,
-};
-
-static struct clk ref_clk = {
-   .name = "ref_clk",
-   .rate = DM644X_REF_FREQ,
-};
-
-static struct clk pll1_clk = {
-   .name = "pll1",
-   .parent = _clk,
-   .pll_data = _data,
-   .flags = CLK_PLL,
-};
-
-static struct clk pll1_sysclk1 = {
-   .name = "pll1_sysclk1",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV1,
-};
-
-static struct clk pll1_sysclk2 = {
-   .name = "pll1_sysclk2",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV2,
-};
-
-static struct clk pll1_sysclk3 = {
-   .name = "pll1_sysclk3",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV3,
-};
-
-static struct clk pll1_sysclk5 = {
-   .name = "pll1_sysclk5",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV5,
-};
-
-static struct clk pll1_aux_clk = {
-   .name = "pll1_aux_clk",
-   .parent = _clk,
-   .flags = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll1_sysclkbp = {
-   .name = "pll1_sysclkbp",
-   .parent = _clk,
-   .flags = CLK_PLL | PRE_PLL,
-   .div_reg = BPDIV
-};
-
-static struct clk pll2_clk = {
-   .name = "pll2",
-   .parent = _clk,
-   .pll_data = _data,
-   .flags = CLK_PLL,
-};
-
-static struct clk pll2_sysclk1 = {
-   .name = "pll2_sysclk1",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV1,
-};
-
-static struct clk pll2_sysclk2 = {
-   .name = "pll2_sysclk2",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV2,
-};
-
-static struct clk pll2_sysclkbp = {
-   .name = "pll2_sysclkbp",
-   .parent = _clk,
-   .flags = CLK_PLL | PRE_PLL,
-   .div_reg = BPDIV
-};
-
-static struct clk dsp_clk = {
-   .name = "dsp",
-   .parent = _sysclk1,
-   .lpsc = DAVINCI_LPSC_GEM,
-   .domain = DAVINCI_GPSC_DSPDOMAIN,
-   .usecount = 1,  /* REVISIT how to disable? */
-};
-
-static struct clk arm_clk = {
-   .name = "arm",
-   .parent = _sysclk2,
-   .lpsc = DAVINCI_LPSC_ARM,
-   .flags = ALWAYS_ENABLED,
-};
-
-static struct clk vicp_clk = {
-   .name = "vicp",
-   .parent = _sysclk2,
-   .lpsc = DAVINCI_LPSC_IMCOP,
-   .domain = DAVINCI_GPSC_DSPDOMAIN,
-   .usecount = 1,  /* REVISIT how to disable? */
-};
-
-static struct clk vpss_master_clk = {
-   .name = "vpss_master",
-   .parent = _sysclk3,
-   .lpsc = DAVINCI_LPSC_VPSSMSTR,
-   .flags = CLK_PSC,
-};
-
-static struct clk vpss_slave_clk = {
-   .name = "vpss_slave",
-   .parent = _sysclk3,
-   .lpsc = DAVINCI_LPSC_VPSSSLV,
-};
-
-static struct clk uart0_clk = {
-   .name = "uart0",
-   .parent = _aux_clk,
-   .lpsc = DAVINCI_LPSC_UART0,
-};
-
-static struct clk uart1_clk = {
-   .name = "uart1",
-   .parent = _aux_clk,
-   .lpsc = DAVINCI_LPSC_UART1,
-};
-
-static struct clk uart2_clk = {
-   .name = "uart2",
-   .parent = _aux_clk,
-   .lpsc = DAVINCI_LPSC_UART2,
-};
-
-static struct clk emac_clk = {
-   .name = "emac",
-   .parent = _sysclk5,
-   .lpsc = DAVINCI_LPSC_EMAC_WRAPPER,
-};
-
-static struct clk i2c_clk = {
-   .name = "i2c",
-   .parent = _aux_clk,
-   .lpsc = DAVINCI_LPSC_I2C,
-};
-
-static struct clk ide_clk = {
-   .name = "ide",
-   .parent = _sysclk5,
-   .lpsc = DAVINCI_LPSC_ATA,
-};
-
-static struct clk asp_clk = {
-   .name = "asp0",
-   .parent = _sysclk5,
-   .lpsc = DAVINCI_LPSC_McBSP,
-};
-
-static struct clk mmcsd_clk = {
-   .name = "mmcsd",
-   .parent = _sysclk5,
-   .lpsc = DAVINCI_LPSC_MMC_SD,
-};
-
-static struct clk spi_clk = {
-   .name = "spi",
-   .parent = _sysclk5,
-   .lpsc = DAVINCI_LPSC_SPI,
-};
-
-static struct clk gpio_clk = {
-   

[PATCH v9 20/27] ARM: davinci: dm644x: Remove legacy clock init

[David Lechner]

This removes the unused legacy clock init code from
arch/arm/mach-davinci/dm644x.c.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- rebased

v8 changes:
- none

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased


 arch/arm/mach-davinci/dm644x.c | 300 -
 1 file changed, 300 deletions(-)

diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index b359f9a68134..cf7b9b80816d 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -32,11 +32,6 @@
 #include "davinci.h"
 #include "mux.h"
 
-#ifndef CONFIG_COMMON_CLK
-#include "clock.h"
-#include "psc.h"
-#endif
-
 /*
  * Device specific clocks
  */
@@ -49,292 +44,6 @@
 #define DM644X_EMAC_CNTRL_RAM_OFFSET   0x2000
 #define DM644X_EMAC_CNTRL_RAM_SIZE 0x2000
 
-#ifndef CONFIG_COMMON_CLK
-static struct pll_data pll1_data = {
-   .num   = 1,
-   .phys_base = DAVINCI_PLL1_BASE,
-};
-
-static struct pll_data pll2_data = {
-   .num   = 2,
-   .phys_base = DAVINCI_PLL2_BASE,
-};
-
-static struct clk ref_clk = {
-   .name = "ref_clk",
-   .rate = DM644X_REF_FREQ,
-};
-
-static struct clk pll1_clk = {
-   .name = "pll1",
-   .parent = _clk,
-   .pll_data = _data,
-   .flags = CLK_PLL,
-};
-
-static struct clk pll1_sysclk1 = {
-   .name = "pll1_sysclk1",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV1,
-};
-
-static struct clk pll1_sysclk2 = {
-   .name = "pll1_sysclk2",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV2,
-};
-
-static struct clk pll1_sysclk3 = {
-   .name = "pll1_sysclk3",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV3,
-};
-
-static struct clk pll1_sysclk5 = {
-   .name = "pll1_sysclk5",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV5,
-};
-
-static struct clk pll1_aux_clk = {
-   .name = "pll1_aux_clk",
-   .parent = _clk,
-   .flags = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll1_sysclkbp = {
-   .name = "pll1_sysclkbp",
-   .parent = _clk,
-   .flags = CLK_PLL | PRE_PLL,
-   .div_reg = BPDIV
-};
-
-static struct clk pll2_clk = {
-   .name = "pll2",
-   .parent = _clk,
-   .pll_data = _data,
-   .flags = CLK_PLL,
-};
-
-static struct clk pll2_sysclk1 = {
-   .name = "pll2_sysclk1",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV1,
-};
-
-static struct clk pll2_sysclk2 = {
-   .name = "pll2_sysclk2",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV2,
-};
-
-static struct clk pll2_sysclkbp = {
-   .name = "pll2_sysclkbp",
-   .parent = _clk,
-   .flags = CLK_PLL | PRE_PLL,
-   .div_reg = BPDIV
-};
-
-static struct clk dsp_clk = {
-   .name = "dsp",
-   .parent = _sysclk1,
-   .lpsc = DAVINCI_LPSC_GEM,
-   .domain = DAVINCI_GPSC_DSPDOMAIN,
-   .usecount = 1,  /* REVISIT how to disable? */
-};
-
-static struct clk arm_clk = {
-   .name = "arm",
-   .parent = _sysclk2,
-   .lpsc = DAVINCI_LPSC_ARM,
-   .flags = ALWAYS_ENABLED,
-};
-
-static struct clk vicp_clk = {
-   .name = "vicp",
-   .parent = _sysclk2,
-   .lpsc = DAVINCI_LPSC_IMCOP,
-   .domain = DAVINCI_GPSC_DSPDOMAIN,
-   .usecount = 1,  /* REVISIT how to disable? */
-};
-
-static struct clk vpss_master_clk = {
-   .name = "vpss_master",
-   .parent = _sysclk3,
-   .lpsc = DAVINCI_LPSC_VPSSMSTR,
-   .flags = CLK_PSC,
-};
-
-static struct clk vpss_slave_clk = {
-   .name = "vpss_slave",
-   .parent = _sysclk3,
-   .lpsc = DAVINCI_LPSC_VPSSSLV,
-};
-
-static struct clk uart0_clk = {
-   .name = "uart0",
-   .parent = _aux_clk,
-   .lpsc = DAVINCI_LPSC_UART0,
-};
-
-static struct clk uart1_clk = {
-   .name = "uart1",
-   .parent = _aux_clk,
-   .lpsc = DAVINCI_LPSC_UART1,
-};
-
-static struct clk uart2_clk = {
-   .name = "uart2",
-   .parent = _aux_clk,
-   .lpsc = DAVINCI_LPSC_UART2,
-};
-
-static struct clk emac_clk = {
-   .name = "emac",
-   .parent = _sysclk5,
-   .lpsc = DAVINCI_LPSC_EMAC_WRAPPER,
-};
-
-static struct clk i2c_clk = {
-   .name = "i2c",
-   .parent = _aux_clk,
-   .lpsc = DAVINCI_LPSC_I2C,
-};
-
-static struct clk ide_clk = {
-   .name = "ide",
-   .parent = _sysclk5,
-   .lpsc = DAVINCI_LPSC_ATA,
-};
-
-static struct clk asp_clk = {
-   .name = "asp0",
-   .parent = _sysclk5,
-   .lpsc = DAVINCI_LPSC_McBSP,
-};
-
-static struct clk mmcsd_clk = {
-   .name = "mmcsd",
-   .parent = _sysclk5,
-   .lpsc = DAVINCI_LPSC_MMC_SD,
-};
-
-static struct clk spi_clk = {
-   .name = "spi",
-   .parent = _sysclk5,
-   .lpsc = DAVINCI_LPSC_SPI,
-};
-
-static struct clk gpio_clk = {
-   .name = "gpio",
-   .parent = 

[PATCH v9 23/27] ARM: davinci: remove legacy clocks

[David Lechner]

This removes the unused legacy clock code from arch/arm/mach-davinci/.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- none

v8 changes:
- none

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased


 arch/arm/mach-davinci/clock.c   | 745 
 arch/arm/mach-davinci/clock.h   |  72 --
 arch/arm/mach-davinci/common.c  |   2 -
 arch/arm/mach-davinci/devices.c |   1 -
 arch/arm/mach-davinci/include/mach/clock.h  |   3 -
 arch/arm/mach-davinci/include/mach/common.h |   2 -
 arch/arm/mach-davinci/psc.c | 137 
 arch/arm/mach-davinci/psc.h |  10 -
 arch/arm/mach-davinci/time.c|   2 -
 9 files changed, 974 deletions(-)
 delete mode 100644 arch/arm/mach-davinci/clock.c
 delete mode 100644 arch/arm/mach-davinci/psc.c

diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
deleted file mode 100644
index f77a4f766050..
--- a/arch/arm/mach-davinci/clock.c
+++ /dev/null
@@ -1,745 +0,0 @@
-/*
- * Clock and PLL control for DaVinci devices
- *
- * Copyright (C) 2006-2007 Texas Instruments.
- * Copyright (C) 2008-2009 Deep Root Systems, LLC
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-
-#include 
-#include "psc.h"
-#include 
-#include "clock.h"
-
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
-static DEFINE_SPINLOCK(clockfw_lock);
-
-void davinci_clk_enable(struct clk *clk)
-{
-   if (clk->parent)
-   davinci_clk_enable(clk->parent);
-   if (clk->usecount++ == 0) {
-   if (clk->flags & CLK_PSC)
-   davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
-  true, clk->flags);
-   else if (clk->clk_enable)
-   clk->clk_enable(clk);
-   }
-}
-
-void davinci_clk_disable(struct clk *clk)
-{
-   if (WARN_ON(clk->usecount == 0))
-   return;
-   if (--clk->usecount == 0) {
-   if (!(clk->flags & CLK_PLL) && (clk->flags & CLK_PSC))
-   davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
-  false, clk->flags);
-   else if (clk->clk_disable)
-   clk->clk_disable(clk);
-   }
-   if (clk->parent)
-   davinci_clk_disable(clk->parent);
-}
-
-int davinci_clk_reset(struct clk *clk, bool reset)
-{
-   unsigned long flags;
-
-   if (clk == NULL || IS_ERR(clk))
-   return -EINVAL;
-
-   spin_lock_irqsave(_lock, flags);
-   if (clk->flags & CLK_PSC)
-   davinci_psc_reset(clk->gpsc, clk->lpsc, reset);
-   spin_unlock_irqrestore(_lock, flags);
-
-   return 0;
-}
-EXPORT_SYMBOL(davinci_clk_reset);
-
-int davinci_clk_reset_assert(struct clk *clk)
-{
-   if (clk == NULL || IS_ERR(clk) || !clk->reset)
-   return -EINVAL;
-
-   return clk->reset(clk, true);
-}
-EXPORT_SYMBOL(davinci_clk_reset_assert);
-
-int davinci_clk_reset_deassert(struct clk *clk)
-{
-   if (clk == NULL || IS_ERR(clk) || !clk->reset)
-   return -EINVAL;
-
-   return clk->reset(clk, false);
-}
-EXPORT_SYMBOL(davinci_clk_reset_deassert);
-
-int clk_enable(struct clk *clk)
-{
-   unsigned long flags;
-
-   if (!clk)
-   return 0;
-   else if (IS_ERR(clk))
-   return -EINVAL;
-
-   spin_lock_irqsave(_lock, flags);
-   davinci_clk_enable(clk);
-   spin_unlock_irqrestore(_lock, flags);
-
-   return 0;
-}
-EXPORT_SYMBOL(clk_enable);
-
-void clk_disable(struct clk *clk)
-{
-   unsigned long flags;
-
-   if (clk == NULL || IS_ERR(clk))
-   return;
-
-   spin_lock_irqsave(_lock, flags);
-   davinci_clk_disable(clk);
-   spin_unlock_irqrestore(_lock, flags);
-}
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
-   if (clk == NULL || IS_ERR(clk))
-   return 0;
-
-   return clk->rate;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-long clk_round_rate(struct clk *clk, unsigned long rate)
-{
-   if (clk == NULL || IS_ERR(clk))
-   return 0;
-
-   if (clk->round_rate)
-   return clk->round_rate(clk, rate);
-
-   return clk->rate;
-}
-EXPORT_SYMBOL(clk_round_rate);
-
-/* Propagate rate to children */
-static void propagate_rate(struct clk *root)
-{
-   struct clk *clk;
-
-   list_for_each_entry(clk, >children, childnode) {
-   if (clk->recalc)
-   clk->rate = 

[PATCH v9 23/27] ARM: davinci: remove legacy clocks

[David Lechner]

This removes the unused legacy clock code from arch/arm/mach-davinci/.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- none

v8 changes:
- none

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased


 arch/arm/mach-davinci/clock.c   | 745 
 arch/arm/mach-davinci/clock.h   |  72 --
 arch/arm/mach-davinci/common.c  |   2 -
 arch/arm/mach-davinci/devices.c |   1 -
 arch/arm/mach-davinci/include/mach/clock.h  |   3 -
 arch/arm/mach-davinci/include/mach/common.h |   2 -
 arch/arm/mach-davinci/psc.c | 137 
 arch/arm/mach-davinci/psc.h |  10 -
 arch/arm/mach-davinci/time.c|   2 -
 9 files changed, 974 deletions(-)
 delete mode 100644 arch/arm/mach-davinci/clock.c
 delete mode 100644 arch/arm/mach-davinci/psc.c

diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
deleted file mode 100644
index f77a4f766050..
--- a/arch/arm/mach-davinci/clock.c
+++ /dev/null
@@ -1,745 +0,0 @@
-/*
- * Clock and PLL control for DaVinci devices
- *
- * Copyright (C) 2006-2007 Texas Instruments.
- * Copyright (C) 2008-2009 Deep Root Systems, LLC
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-
-#include 
-#include "psc.h"
-#include 
-#include "clock.h"
-
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
-static DEFINE_SPINLOCK(clockfw_lock);
-
-void davinci_clk_enable(struct clk *clk)
-{
-   if (clk->parent)
-   davinci_clk_enable(clk->parent);
-   if (clk->usecount++ == 0) {
-   if (clk->flags & CLK_PSC)
-   davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
-  true, clk->flags);
-   else if (clk->clk_enable)
-   clk->clk_enable(clk);
-   }
-}
-
-void davinci_clk_disable(struct clk *clk)
-{
-   if (WARN_ON(clk->usecount == 0))
-   return;
-   if (--clk->usecount == 0) {
-   if (!(clk->flags & CLK_PLL) && (clk->flags & CLK_PSC))
-   davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
-  false, clk->flags);
-   else if (clk->clk_disable)
-   clk->clk_disable(clk);
-   }
-   if (clk->parent)
-   davinci_clk_disable(clk->parent);
-}
-
-int davinci_clk_reset(struct clk *clk, bool reset)
-{
-   unsigned long flags;
-
-   if (clk == NULL || IS_ERR(clk))
-   return -EINVAL;
-
-   spin_lock_irqsave(_lock, flags);
-   if (clk->flags & CLK_PSC)
-   davinci_psc_reset(clk->gpsc, clk->lpsc, reset);
-   spin_unlock_irqrestore(_lock, flags);
-
-   return 0;
-}
-EXPORT_SYMBOL(davinci_clk_reset);
-
-int davinci_clk_reset_assert(struct clk *clk)
-{
-   if (clk == NULL || IS_ERR(clk) || !clk->reset)
-   return -EINVAL;
-
-   return clk->reset(clk, true);
-}
-EXPORT_SYMBOL(davinci_clk_reset_assert);
-
-int davinci_clk_reset_deassert(struct clk *clk)
-{
-   if (clk == NULL || IS_ERR(clk) || !clk->reset)
-   return -EINVAL;
-
-   return clk->reset(clk, false);
-}
-EXPORT_SYMBOL(davinci_clk_reset_deassert);
-
-int clk_enable(struct clk *clk)
-{
-   unsigned long flags;
-
-   if (!clk)
-   return 0;
-   else if (IS_ERR(clk))
-   return -EINVAL;
-
-   spin_lock_irqsave(_lock, flags);
-   davinci_clk_enable(clk);
-   spin_unlock_irqrestore(_lock, flags);
-
-   return 0;
-}
-EXPORT_SYMBOL(clk_enable);
-
-void clk_disable(struct clk *clk)
-{
-   unsigned long flags;
-
-   if (clk == NULL || IS_ERR(clk))
-   return;
-
-   spin_lock_irqsave(_lock, flags);
-   davinci_clk_disable(clk);
-   spin_unlock_irqrestore(_lock, flags);
-}
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
-   if (clk == NULL || IS_ERR(clk))
-   return 0;
-
-   return clk->rate;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-long clk_round_rate(struct clk *clk, unsigned long rate)
-{
-   if (clk == NULL || IS_ERR(clk))
-   return 0;
-
-   if (clk->round_rate)
-   return clk->round_rate(clk, rate);
-
-   return clk->rate;
-}
-EXPORT_SYMBOL(clk_round_rate);
-
-/* Propagate rate to children */
-static void propagate_rate(struct clk *root)
-{
-   struct clk *clk;
-
-   list_for_each_entry(clk, >children, childnode) {
-   if (clk->recalc)
-   clk->rate = clk->recalc(clk);
-   

[PATCH v9 19/27] ARM: davinci: dm365: Remove legacy clock init

[David Lechner]

This removes the unused legacy clock init code from
arch/arm/mach-davinci/dm365.c.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- rebased

v8 changes:
- none

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased


 arch/arm/mach-davinci/dm365.c | 449 --
 1 file changed, 449 deletions(-)

diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 76de426a0e41..abcf2a5ed89b 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -40,11 +40,6 @@
 #include "davinci.h"
 #include "mux.h"
 
-#ifndef CONFIG_COMMON_CLK
-#include "clock.h"
-#include "psc.h"
-#endif
-
 #define DM365_REF_FREQ 2400/* 24 MHz on the DM365 EVM */
 #define DM365_RTC_BASE 0x01c69000
 #define DM365_KEYSCAN_BASE 0x01c69400
@@ -60,441 +55,6 @@
 #define DM365_EMAC_CNTRL_RAM_OFFSET0x1000
 #define DM365_EMAC_CNTRL_RAM_SIZE  0x2000
 
-#ifndef CONFIG_COMMON_CLK
-static struct pll_data pll1_data = {
-   .num= 1,
-   .phys_base  = DAVINCI_PLL1_BASE,
-   .flags  = PLL_HAS_POSTDIV | PLL_HAS_PREDIV,
-};
-
-static struct pll_data pll2_data = {
-   .num= 2,
-   .phys_base  = DAVINCI_PLL2_BASE,
-   .flags  = PLL_HAS_POSTDIV | PLL_HAS_PREDIV,
-};
-
-static struct clk ref_clk = {
-   .name   = "ref_clk",
-   .rate   = DM365_REF_FREQ,
-};
-
-static struct clk pll1_clk = {
-   .name   = "pll1",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .pll_data   = _data,
-};
-
-static struct clk pll1_aux_clk = {
-   .name   = "pll1_aux_clk",
-   .parent = _clk,
-   .flags  = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll1_sysclkbp = {
-   .name   = "pll1_sysclkbp",
-   .parent = _clk,
-   .flags  = CLK_PLL | PRE_PLL,
-   .div_reg= BPDIV
-};
-
-static struct clk clkout0_clk = {
-   .name   = "clkout0",
-   .parent = _clk,
-   .flags  = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll1_sysclk1 = {
-   .name   = "pll1_sysclk1",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV1,
-};
-
-static struct clk pll1_sysclk2 = {
-   .name   = "pll1_sysclk2",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV2,
-};
-
-static struct clk pll1_sysclk3 = {
-   .name   = "pll1_sysclk3",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV3,
-};
-
-static struct clk pll1_sysclk4 = {
-   .name   = "pll1_sysclk4",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV4,
-};
-
-static struct clk pll1_sysclk5 = {
-   .name   = "pll1_sysclk5",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV5,
-};
-
-static struct clk pll1_sysclk6 = {
-   .name   = "pll1_sysclk6",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV6,
-};
-
-static struct clk pll1_sysclk7 = {
-   .name   = "pll1_sysclk7",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV7,
-};
-
-static struct clk pll1_sysclk8 = {
-   .name   = "pll1_sysclk8",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV8,
-};
-
-static struct clk pll1_sysclk9 = {
-   .name   = "pll1_sysclk9",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV9,
-};
-
-static struct clk pll2_clk = {
-   .name   = "pll2",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .pll_data   = _data,
-};
-
-static struct clk pll2_aux_clk = {
-   .name   = "pll2_aux_clk",
-   .parent = _clk,
-   .flags  = CLK_PLL | PRE_PLL,
-};
-
-static struct clk clkout1_clk = {
-   .name   = "clkout1",
-   .parent = _clk,
-   .flags  = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll2_sysclk1 = {
-   .name   = "pll2_sysclk1",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV1,
-};
-
-static struct clk pll2_sysclk2 = {
-   .name   = "pll2_sysclk2",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV2,
-};
-
-static struct clk pll2_sysclk3 = {
-   .name   = "pll2_sysclk3",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV3,
-};
-
-static struct clk pll2_sysclk4 = {
-   .name  

[PATCH v9 21/27] ARM: davinci: dm646x: Remove legacy clock init

[David Lechner]

This removes the unused legacy clock init code from
arch/arm/mach-davinci/dm646x.c.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- rebased

v8 changes:
- none

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased


 arch/arm/mach-davinci/dm646x.c | 329 -
 1 file changed, 329 deletions(-)

diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index d260ca5f6827..6248d986baa2 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -33,11 +33,6 @@
 #include "davinci.h"
 #include "mux.h"
 
-#ifndef CONFIG_COMMON_CLK
-#include "clock.h"
-#include "psc.h"
-#endif
-
 #define DAVINCI_VPIF_BASE   (0x01C12000)
 
 #define VDD3P3V_VID_MASK   (BIT_MASK(3) | BIT_MASK(2) | BIT_MASK(1) |\
@@ -52,319 +47,6 @@
 #define DM646X_EMAC_CNTRL_RAM_OFFSET   0x2000
 #define DM646X_EMAC_CNTRL_RAM_SIZE 0x2000
 
-#ifndef CONFIG_COMMON_CLK
-static struct pll_data pll1_data = {
-   .num   = 1,
-   .phys_base = DAVINCI_PLL1_BASE,
-};
-
-static struct pll_data pll2_data = {
-   .num   = 2,
-   .phys_base = DAVINCI_PLL2_BASE,
-};
-
-static struct clk ref_clk = {
-   .name = "ref_clk",
-   /* rate is initialized in dm646x_init_time() */
-};
-
-static struct clk aux_clkin = {
-   .name = "aux_clkin",
-   /* rate is initialized in dm646x_init_time() */
-};
-
-static struct clk pll1_clk = {
-   .name = "pll1",
-   .parent = _clk,
-   .pll_data = _data,
-   .flags = CLK_PLL,
-};
-
-static struct clk pll1_sysclk1 = {
-   .name = "pll1_sysclk1",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV1,
-};
-
-static struct clk pll1_sysclk2 = {
-   .name = "pll1_sysclk2",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV2,
-};
-
-static struct clk pll1_sysclk3 = {
-   .name = "pll1_sysclk3",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV3,
-};
-
-static struct clk pll1_sysclk4 = {
-   .name = "pll1_sysclk4",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV4,
-};
-
-static struct clk pll1_sysclk5 = {
-   .name = "pll1_sysclk5",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV5,
-};
-
-static struct clk pll1_sysclk6 = {
-   .name = "pll1_sysclk6",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV6,
-};
-
-static struct clk pll1_sysclk8 = {
-   .name = "pll1_sysclk8",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV8,
-};
-
-static struct clk pll1_sysclk9 = {
-   .name = "pll1_sysclk9",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV9,
-};
-
-static struct clk pll1_sysclkbp = {
-   .name = "pll1_sysclkbp",
-   .parent = _clk,
-   .flags = CLK_PLL | PRE_PLL,
-   .div_reg = BPDIV,
-};
-
-static struct clk pll1_aux_clk = {
-   .name = "pll1_aux_clk",
-   .parent = _clk,
-   .flags = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll2_clk = {
-   .name = "pll2_clk",
-   .parent = _clk,
-   .pll_data = _data,
-   .flags = CLK_PLL,
-};
-
-static struct clk pll2_sysclk1 = {
-   .name = "pll2_sysclk1",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV1,
-};
-
-static struct clk dsp_clk = {
-   .name = "dsp",
-   .parent = _sysclk1,
-   .lpsc = DM646X_LPSC_C64X_CPU,
-   .usecount = 1,  /* REVISIT how to disable? */
-};
-
-static struct clk arm_clk = {
-   .name = "arm",
-   .parent = _sysclk2,
-   .lpsc = DM646X_LPSC_ARM,
-   .flags = ALWAYS_ENABLED,
-};
-
-static struct clk edma_cc_clk = {
-   .name = "edma_cc",
-   .parent = _sysclk2,
-   .lpsc = DM646X_LPSC_TPCC,
-   .flags = ALWAYS_ENABLED,
-};
-
-static struct clk edma_tc0_clk = {
-   .name = "edma_tc0",
-   .parent = _sysclk2,
-   .lpsc = DM646X_LPSC_TPTC0,
-   .flags = ALWAYS_ENABLED,
-};
-
-static struct clk edma_tc1_clk = {
-   .name = "edma_tc1",
-   .parent = _sysclk2,
-   .lpsc = DM646X_LPSC_TPTC1,
-   .flags = ALWAYS_ENABLED,
-};
-
-static struct clk edma_tc2_clk = {
-   .name = "edma_tc2",
-   .parent = _sysclk2,
-   .lpsc = DM646X_LPSC_TPTC2,
-   .flags = ALWAYS_ENABLED,
-};
-
-static struct clk edma_tc3_clk = {
-   .name = "edma_tc3",
-   .parent = _sysclk2,
-   .lpsc = DM646X_LPSC_TPTC3,
-   .flags = ALWAYS_ENABLED,
-};
-
-static struct clk uart0_clk = {
-   .name = "uart0",
-   .parent = _clkin,
-   .lpsc = DM646X_LPSC_UART0,
-};
-
-static struct clk uart1_clk = {
-   .name = "uart1",
-   .parent = _clkin,
-   .lpsc = DM646X_LPSC_UART1,
-};
-
-static struct clk uart2_clk = {
-   .name = "uart2",
-   .parent = _clkin,
-   .lpsc = DM646X_LPSC_UART2,
-};
-
-static struct clk i2c_clk 

[PATCH v9 21/27] ARM: davinci: dm646x: Remove legacy clock init

[David Lechner]

This removes the unused legacy clock init code from
arch/arm/mach-davinci/dm646x.c.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- rebased

v8 changes:
- none

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased


 arch/arm/mach-davinci/dm646x.c | 329 -
 1 file changed, 329 deletions(-)

diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index d260ca5f6827..6248d986baa2 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -33,11 +33,6 @@
 #include "davinci.h"
 #include "mux.h"
 
-#ifndef CONFIG_COMMON_CLK
-#include "clock.h"
-#include "psc.h"
-#endif
-
 #define DAVINCI_VPIF_BASE   (0x01C12000)
 
 #define VDD3P3V_VID_MASK   (BIT_MASK(3) | BIT_MASK(2) | BIT_MASK(1) |\
@@ -52,319 +47,6 @@
 #define DM646X_EMAC_CNTRL_RAM_OFFSET   0x2000
 #define DM646X_EMAC_CNTRL_RAM_SIZE 0x2000
 
-#ifndef CONFIG_COMMON_CLK
-static struct pll_data pll1_data = {
-   .num   = 1,
-   .phys_base = DAVINCI_PLL1_BASE,
-};
-
-static struct pll_data pll2_data = {
-   .num   = 2,
-   .phys_base = DAVINCI_PLL2_BASE,
-};
-
-static struct clk ref_clk = {
-   .name = "ref_clk",
-   /* rate is initialized in dm646x_init_time() */
-};
-
-static struct clk aux_clkin = {
-   .name = "aux_clkin",
-   /* rate is initialized in dm646x_init_time() */
-};
-
-static struct clk pll1_clk = {
-   .name = "pll1",
-   .parent = _clk,
-   .pll_data = _data,
-   .flags = CLK_PLL,
-};
-
-static struct clk pll1_sysclk1 = {
-   .name = "pll1_sysclk1",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV1,
-};
-
-static struct clk pll1_sysclk2 = {
-   .name = "pll1_sysclk2",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV2,
-};
-
-static struct clk pll1_sysclk3 = {
-   .name = "pll1_sysclk3",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV3,
-};
-
-static struct clk pll1_sysclk4 = {
-   .name = "pll1_sysclk4",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV4,
-};
-
-static struct clk pll1_sysclk5 = {
-   .name = "pll1_sysclk5",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV5,
-};
-
-static struct clk pll1_sysclk6 = {
-   .name = "pll1_sysclk6",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV6,
-};
-
-static struct clk pll1_sysclk8 = {
-   .name = "pll1_sysclk8",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV8,
-};
-
-static struct clk pll1_sysclk9 = {
-   .name = "pll1_sysclk9",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV9,
-};
-
-static struct clk pll1_sysclkbp = {
-   .name = "pll1_sysclkbp",
-   .parent = _clk,
-   .flags = CLK_PLL | PRE_PLL,
-   .div_reg = BPDIV,
-};
-
-static struct clk pll1_aux_clk = {
-   .name = "pll1_aux_clk",
-   .parent = _clk,
-   .flags = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll2_clk = {
-   .name = "pll2_clk",
-   .parent = _clk,
-   .pll_data = _data,
-   .flags = CLK_PLL,
-};
-
-static struct clk pll2_sysclk1 = {
-   .name = "pll2_sysclk1",
-   .parent = _clk,
-   .flags = CLK_PLL,
-   .div_reg = PLLDIV1,
-};
-
-static struct clk dsp_clk = {
-   .name = "dsp",
-   .parent = _sysclk1,
-   .lpsc = DM646X_LPSC_C64X_CPU,
-   .usecount = 1,  /* REVISIT how to disable? */
-};
-
-static struct clk arm_clk = {
-   .name = "arm",
-   .parent = _sysclk2,
-   .lpsc = DM646X_LPSC_ARM,
-   .flags = ALWAYS_ENABLED,
-};
-
-static struct clk edma_cc_clk = {
-   .name = "edma_cc",
-   .parent = _sysclk2,
-   .lpsc = DM646X_LPSC_TPCC,
-   .flags = ALWAYS_ENABLED,
-};
-
-static struct clk edma_tc0_clk = {
-   .name = "edma_tc0",
-   .parent = _sysclk2,
-   .lpsc = DM646X_LPSC_TPTC0,
-   .flags = ALWAYS_ENABLED,
-};
-
-static struct clk edma_tc1_clk = {
-   .name = "edma_tc1",
-   .parent = _sysclk2,
-   .lpsc = DM646X_LPSC_TPTC1,
-   .flags = ALWAYS_ENABLED,
-};
-
-static struct clk edma_tc2_clk = {
-   .name = "edma_tc2",
-   .parent = _sysclk2,
-   .lpsc = DM646X_LPSC_TPTC2,
-   .flags = ALWAYS_ENABLED,
-};
-
-static struct clk edma_tc3_clk = {
-   .name = "edma_tc3",
-   .parent = _sysclk2,
-   .lpsc = DM646X_LPSC_TPTC3,
-   .flags = ALWAYS_ENABLED,
-};
-
-static struct clk uart0_clk = {
-   .name = "uart0",
-   .parent = _clkin,
-   .lpsc = DM646X_LPSC_UART0,
-};
-
-static struct clk uart1_clk = {
-   .name = "uart1",
-   .parent = _clkin,
-   .lpsc = DM646X_LPSC_UART1,
-};
-
-static struct clk uart2_clk = {
-   .name = "uart2",
-   .parent = _clkin,
-   .lpsc = DM646X_LPSC_UART2,
-};
-
-static struct clk i2c_clk = {
-   .name = "I2CCLK",
-   

[PATCH v9 19/27] ARM: davinci: dm365: Remove legacy clock init

[David Lechner]

This removes the unused legacy clock init code from
arch/arm/mach-davinci/dm365.c.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- rebased

v8 changes:
- none

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased


 arch/arm/mach-davinci/dm365.c | 449 --
 1 file changed, 449 deletions(-)

diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 76de426a0e41..abcf2a5ed89b 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -40,11 +40,6 @@
 #include "davinci.h"
 #include "mux.h"
 
-#ifndef CONFIG_COMMON_CLK
-#include "clock.h"
-#include "psc.h"
-#endif
-
 #define DM365_REF_FREQ 2400/* 24 MHz on the DM365 EVM */
 #define DM365_RTC_BASE 0x01c69000
 #define DM365_KEYSCAN_BASE 0x01c69400
@@ -60,441 +55,6 @@
 #define DM365_EMAC_CNTRL_RAM_OFFSET0x1000
 #define DM365_EMAC_CNTRL_RAM_SIZE  0x2000
 
-#ifndef CONFIG_COMMON_CLK
-static struct pll_data pll1_data = {
-   .num= 1,
-   .phys_base  = DAVINCI_PLL1_BASE,
-   .flags  = PLL_HAS_POSTDIV | PLL_HAS_PREDIV,
-};
-
-static struct pll_data pll2_data = {
-   .num= 2,
-   .phys_base  = DAVINCI_PLL2_BASE,
-   .flags  = PLL_HAS_POSTDIV | PLL_HAS_PREDIV,
-};
-
-static struct clk ref_clk = {
-   .name   = "ref_clk",
-   .rate   = DM365_REF_FREQ,
-};
-
-static struct clk pll1_clk = {
-   .name   = "pll1",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .pll_data   = _data,
-};
-
-static struct clk pll1_aux_clk = {
-   .name   = "pll1_aux_clk",
-   .parent = _clk,
-   .flags  = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll1_sysclkbp = {
-   .name   = "pll1_sysclkbp",
-   .parent = _clk,
-   .flags  = CLK_PLL | PRE_PLL,
-   .div_reg= BPDIV
-};
-
-static struct clk clkout0_clk = {
-   .name   = "clkout0",
-   .parent = _clk,
-   .flags  = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll1_sysclk1 = {
-   .name   = "pll1_sysclk1",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV1,
-};
-
-static struct clk pll1_sysclk2 = {
-   .name   = "pll1_sysclk2",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV2,
-};
-
-static struct clk pll1_sysclk3 = {
-   .name   = "pll1_sysclk3",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV3,
-};
-
-static struct clk pll1_sysclk4 = {
-   .name   = "pll1_sysclk4",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV4,
-};
-
-static struct clk pll1_sysclk5 = {
-   .name   = "pll1_sysclk5",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV5,
-};
-
-static struct clk pll1_sysclk6 = {
-   .name   = "pll1_sysclk6",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV6,
-};
-
-static struct clk pll1_sysclk7 = {
-   .name   = "pll1_sysclk7",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV7,
-};
-
-static struct clk pll1_sysclk8 = {
-   .name   = "pll1_sysclk8",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV8,
-};
-
-static struct clk pll1_sysclk9 = {
-   .name   = "pll1_sysclk9",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV9,
-};
-
-static struct clk pll2_clk = {
-   .name   = "pll2",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .pll_data   = _data,
-};
-
-static struct clk pll2_aux_clk = {
-   .name   = "pll2_aux_clk",
-   .parent = _clk,
-   .flags  = CLK_PLL | PRE_PLL,
-};
-
-static struct clk clkout1_clk = {
-   .name   = "clkout1",
-   .parent = _clk,
-   .flags  = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll2_sysclk1 = {
-   .name   = "pll2_sysclk1",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV1,
-};
-
-static struct clk pll2_sysclk2 = {
-   .name   = "pll2_sysclk2",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV2,
-};
-
-static struct clk pll2_sysclk3 = {
-   .name   = "pll2_sysclk3",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV3,
-};
-
-static struct clk pll2_sysclk4 = {
-   .name   = "pll2_sysclk4",
-   .parent

[PATCH v9 22/27] ARM: davinci: da8xx: Remove legacy USB and SATA clock init

[David Lechner]

This removes the unused legacy USB and SATA clock init code from
arch/arm/mach-davinci/{devices,usb}-da8xx}.c.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- none

v8 changes:
- none

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased


 arch/arm/mach-davinci/devices-da8xx.c  |  29 ---
 arch/arm/mach-davinci/include/mach/da8xx.h |   3 -
 arch/arm/mach-davinci/usb-da8xx.c  | 238 -
 3 files changed, 270 deletions(-)

diff --git a/arch/arm/mach-davinci/devices-da8xx.c 
b/arch/arm/mach-davinci/devices-da8xx.c
index 73de449bbc68..1fd3619f6a09 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -30,11 +30,6 @@
 #include "cpuidle.h"
 #include "sram.h"
 
-#ifndef CONFIG_COMMON_CLK
-#include 
-#include "clock.h"
-#endif
-
 #define DA8XX_TPCC_BASE0x01c0
 #define DA8XX_TPTC0_BASE   0x01c08000
 #define DA8XX_TPTC1_BASE   0x01c08400
@@ -1045,29 +1040,6 @@ int __init da8xx_register_spi_bus(int instance, unsigned 
num_chipselect)
 }
 
 #ifdef CONFIG_ARCH_DAVINCI_DA850
-#ifndef CONFIG_COMMON_CLK
-static struct clk sata_refclk = {
-   .name   = "sata_refclk",
-   .set_rate   = davinci_simple_set_rate,
-};
-
-static struct clk_lookup sata_refclk_lookup =
-   CLK("ahci_da850", "refclk", _refclk);
-
-int __init da850_register_sata_refclk(int rate)
-{
-   int ret;
-
-   sata_refclk.rate = rate;
-   ret = clk_register(_refclk);
-   if (ret)
-   return ret;
-
-   clkdev_add(_refclk_lookup);
-
-   return 0;
-}
-#else
 int __init da850_register_sata_refclk(int rate)
 {
struct clk *clk;
@@ -1078,7 +1050,6 @@ int __init da850_register_sata_refclk(int rate)
 
return clk_register_clkdev(clk, "refclk", "ahci_da850");
 }
-#endif
 
 static struct resource da850_sata_resources[] = {
{
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h 
b/arch/arm/mach-davinci/include/mach/da8xx.h
index 5d7b1de9aa7e..ab4a57f433f4 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -103,9 +103,6 @@ int da8xx_register_watchdog(void);
 int da8xx_register_usb_phy(void);
 int da8xx_register_usb20(unsigned mA, unsigned potpgt);
 int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
-int da8xx_register_usb_refclkin(int rate);
-int da8xx_register_usb20_phy_clk(bool use_usb_refclkin);
-int da8xx_register_usb11_phy_clk(bool use_usb_refclkin);
 int da8xx_register_usb_phy_clocks(void);
 int da850_register_sata_refclk(int rate);
 int da8xx_register_emac(void);
diff --git a/arch/arm/mach-davinci/usb-da8xx.c 
b/arch/arm/mach-davinci/usb-da8xx.c
index c8d2f3075e69..c17ce66a3d95 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -20,11 +20,6 @@
 #include 
 #include 
 
-#ifndef CONFIG_COMMON_CLK
-#include 
-#include "clock.h"
-#endif
-
 #define DA8XX_USB0_BASE0x01e0
 #define DA8XX_USB1_BASE0x01e25000
 
@@ -87,11 +82,6 @@ static struct platform_device da8xx_usb20_dev = {
.name   = "musb-da8xx",
.id = -1,
.dev = {
-   /*
-* Setting init_name so that clock lookup will work in
-* usb20_phy_clk_enable() even if this device is not registered.
-*/
-   .init_name  = "musb-da8xx",
.platform_data  = _data,
.dma_mask   = _dmamask,
.coherent_dma_mask  = DMA_BIT_MASK(32),
@@ -140,234 +130,6 @@ int __init da8xx_register_usb11(struct 
da8xx_ohci_root_hub *pdata)
return platform_device_register(_usb11_device);
 }
 
-#ifndef CONFIG_COMMON_CLK
-static struct clk usb_refclkin = {
-   .name   = "usb_refclkin",
-   .set_rate   = davinci_simple_set_rate,
-};
-
-static struct clk_lookup usb_refclkin_lookup =
-   CLK(NULL, "usb_refclkin", _refclkin);
-
-/**
- * da8xx_register_usb_refclkin - register USB_REFCLKIN clock
- *
- * @rate: The clock rate in Hz
- *
- * This clock is only needed if the board provides an external USB_REFCLKIN
- * signal, in which case it will be used as the parent of usb20_phy_clk and/or
- * usb11_phy_clk.
- */
-int __init da8xx_register_usb_refclkin(int rate)
-{
-   int ret;
-
-   usb_refclkin.rate = rate;
-   ret = clk_register(_refclkin);
-   if (ret)
-   return ret;
-
-   clkdev_add(_refclkin_lookup);
-
-   return 0;
-}
-
-static void usb20_phy_clk_enable(struct clk *clk)
-{
-   u32 val;
-   u32 timeout = 50; /* 500 msec */
-
-   val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
-
-   /* The USB 2.O PLL requires that the USB 2.O PSC is enabled as well. */
-   davinci_clk_enable(usb20_clk);
-
-   /*
-* Turn on 

[PATCH v9 22/27] ARM: davinci: da8xx: Remove legacy USB and SATA clock init

[David Lechner]

This removes the unused legacy USB and SATA clock init code from
arch/arm/mach-davinci/{devices,usb}-da8xx}.c.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v9 changes:
- none

v8 changes:
- none

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased


 arch/arm/mach-davinci/devices-da8xx.c  |  29 ---
 arch/arm/mach-davinci/include/mach/da8xx.h |   3 -
 arch/arm/mach-davinci/usb-da8xx.c  | 238 -
 3 files changed, 270 deletions(-)

diff --git a/arch/arm/mach-davinci/devices-da8xx.c 
b/arch/arm/mach-davinci/devices-da8xx.c
index 73de449bbc68..1fd3619f6a09 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -30,11 +30,6 @@
 #include "cpuidle.h"
 #include "sram.h"
 
-#ifndef CONFIG_COMMON_CLK
-#include 
-#include "clock.h"
-#endif
-
 #define DA8XX_TPCC_BASE0x01c0
 #define DA8XX_TPTC0_BASE   0x01c08000
 #define DA8XX_TPTC1_BASE   0x01c08400
@@ -1045,29 +1040,6 @@ int __init da8xx_register_spi_bus(int instance, unsigned 
num_chipselect)
 }
 
 #ifdef CONFIG_ARCH_DAVINCI_DA850
-#ifndef CONFIG_COMMON_CLK
-static struct clk sata_refclk = {
-   .name   = "sata_refclk",
-   .set_rate   = davinci_simple_set_rate,
-};
-
-static struct clk_lookup sata_refclk_lookup =
-   CLK("ahci_da850", "refclk", _refclk);
-
-int __init da850_register_sata_refclk(int rate)
-{
-   int ret;
-
-   sata_refclk.rate = rate;
-   ret = clk_register(_refclk);
-   if (ret)
-   return ret;
-
-   clkdev_add(_refclk_lookup);
-
-   return 0;
-}
-#else
 int __init da850_register_sata_refclk(int rate)
 {
struct clk *clk;
@@ -1078,7 +1050,6 @@ int __init da850_register_sata_refclk(int rate)
 
return clk_register_clkdev(clk, "refclk", "ahci_da850");
 }
-#endif
 
 static struct resource da850_sata_resources[] = {
{
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h 
b/arch/arm/mach-davinci/include/mach/da8xx.h
index 5d7b1de9aa7e..ab4a57f433f4 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -103,9 +103,6 @@ int da8xx_register_watchdog(void);
 int da8xx_register_usb_phy(void);
 int da8xx_register_usb20(unsigned mA, unsigned potpgt);
 int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
-int da8xx_register_usb_refclkin(int rate);
-int da8xx_register_usb20_phy_clk(bool use_usb_refclkin);
-int da8xx_register_usb11_phy_clk(bool use_usb_refclkin);
 int da8xx_register_usb_phy_clocks(void);
 int da850_register_sata_refclk(int rate);
 int da8xx_register_emac(void);
diff --git a/arch/arm/mach-davinci/usb-da8xx.c 
b/arch/arm/mach-davinci/usb-da8xx.c
index c8d2f3075e69..c17ce66a3d95 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -20,11 +20,6 @@
 #include 
 #include 
 
-#ifndef CONFIG_COMMON_CLK
-#include 
-#include "clock.h"
-#endif
-
 #define DA8XX_USB0_BASE0x01e0
 #define DA8XX_USB1_BASE0x01e25000
 
@@ -87,11 +82,6 @@ static struct platform_device da8xx_usb20_dev = {
.name   = "musb-da8xx",
.id = -1,
.dev = {
-   /*
-* Setting init_name so that clock lookup will work in
-* usb20_phy_clk_enable() even if this device is not registered.
-*/
-   .init_name  = "musb-da8xx",
.platform_data  = _data,
.dma_mask   = _dmamask,
.coherent_dma_mask  = DMA_BIT_MASK(32),
@@ -140,234 +130,6 @@ int __init da8xx_register_usb11(struct 
da8xx_ohci_root_hub *pdata)
return platform_device_register(_usb11_device);
 }
 
-#ifndef CONFIG_COMMON_CLK
-static struct clk usb_refclkin = {
-   .name   = "usb_refclkin",
-   .set_rate   = davinci_simple_set_rate,
-};
-
-static struct clk_lookup usb_refclkin_lookup =
-   CLK(NULL, "usb_refclkin", _refclkin);
-
-/**
- * da8xx_register_usb_refclkin - register USB_REFCLKIN clock
- *
- * @rate: The clock rate in Hz
- *
- * This clock is only needed if the board provides an external USB_REFCLKIN
- * signal, in which case it will be used as the parent of usb20_phy_clk and/or
- * usb11_phy_clk.
- */
-int __init da8xx_register_usb_refclkin(int rate)
-{
-   int ret;
-
-   usb_refclkin.rate = rate;
-   ret = clk_register(_refclkin);
-   if (ret)
-   return ret;
-
-   clkdev_add(_refclkin_lookup);
-
-   return 0;
-}
-
-static void usb20_phy_clk_enable(struct clk *clk)
-{
-   u32 val;
-   u32 timeout = 50; /* 500 msec */
-
-   val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
-
-   /* The USB 2.O PLL requires that the USB 2.O PSC is enabled as well. */
-   davinci_clk_enable(usb20_clk);
-
-   /*
-* Turn on the USB 2.0 PHY, but just the PLL, and 

[PATCH v9 25/27] ARM: davinci: add device tree support to timer

[David Lechner]

This adds device tree support to the davinci timer so that when clocks
are moved to device tree, the timer will still work.

Signed-off-by: David Lechner 
---

v9 changes:
- none (there were supposed to be changed, but apparently they got squashed
  into the next commit - will fix on the next round)

v8 changes:
- none

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased

 arch/arm/mach-davinci/Kconfig |  1 +
 arch/arm/mach-davinci/time.c  | 31 +++
 2 files changed, 32 insertions(+)

diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index ba9912b4dfab..da8a039d65f9 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -59,6 +59,7 @@ config MACH_DA8XX_DT
default y
depends on ARCH_DAVINCI_DA850
select PINCTRL
+   select TIMER_OF
help
  Say y here to include support for TI DaVinci DA850 based using
  Flattened Device Tree. More information at Documentation/devicetree
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 7ea3db0ff062..7a8c6fada644 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -397,3 +398,33 @@ void __init davinci_timer_init(struct clk *timer_clk)
for (i=0; i< ARRAY_SIZE(timers); i++)
timer32_config([i]);
 }
+
+static int __init of_davinci_timer_init(struct device_node *np)
+{
+   struct clk *clk;
+
+   clk = of_clk_get(np, 0);
+   if (IS_ERR(clk)) {
+   struct of_phandle_args clkspec;
+
+   /*
+* Fall back to using ref_clk if the actual clock is not
+* available. This currently always happens because platform
+* clocks (i.e PLLs and PSCs) are registered as platform
+* devices and therefore are not available at this point in
+* the boot process.
+*/
+   clkspec.np = of_find_node_by_name(NULL, "ref_clk");
+   if (IS_ERR(clkspec.np)) {
+   pr_err("%s: No clock available for timer!\n", __func__);
+   return PTR_ERR(clkspec.np);
+   }
+   clk = of_clk_get_from_provider();
+   of_node_put(clkspec.np);
+   }
+
+   davinci_timer_init(clk);
+
+   return 0;
+}
+TIMER_OF_DECLARE(davinci_timer, "ti,davinci-timer", of_davinci_timer_init);
-- 
2.17.0

[PATCH v9 25/27] ARM: davinci: add device tree support to timer

[David Lechner]

This adds device tree support to the davinci timer so that when clocks
are moved to device tree, the timer will still work.

Signed-off-by: David Lechner 
---

v9 changes:
- none (there were supposed to be changed, but apparently they got squashed
  into the next commit - will fix on the next round)

v8 changes:
- none

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased

 arch/arm/mach-davinci/Kconfig |  1 +
 arch/arm/mach-davinci/time.c  | 31 +++
 2 files changed, 32 insertions(+)

diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index ba9912b4dfab..da8a039d65f9 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -59,6 +59,7 @@ config MACH_DA8XX_DT
default y
depends on ARCH_DAVINCI_DA850
select PINCTRL
+   select TIMER_OF
help
  Say y here to include support for TI DaVinci DA850 based using
  Flattened Device Tree. More information at Documentation/devicetree
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 7ea3db0ff062..7a8c6fada644 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -397,3 +398,33 @@ void __init davinci_timer_init(struct clk *timer_clk)
for (i=0; i< ARRAY_SIZE(timers); i++)
timer32_config([i]);
 }
+
+static int __init of_davinci_timer_init(struct device_node *np)
+{
+   struct clk *clk;
+
+   clk = of_clk_get(np, 0);
+   if (IS_ERR(clk)) {
+   struct of_phandle_args clkspec;
+
+   /*
+* Fall back to using ref_clk if the actual clock is not
+* available. This currently always happens because platform
+* clocks (i.e PLLs and PSCs) are registered as platform
+* devices and therefore are not available at this point in
+* the boot process.
+*/
+   clkspec.np = of_find_node_by_name(NULL, "ref_clk");
+   if (IS_ERR(clkspec.np)) {
+   pr_err("%s: No clock available for timer!\n", __func__);
+   return PTR_ERR(clkspec.np);
+   }
+   clk = of_clk_get_from_provider();
+   of_node_put(clkspec.np);
+   }
+
+   davinci_timer_init(clk);
+
+   return 0;
+}
+TIMER_OF_DECLARE(davinci_timer, "ti,davinci-timer", of_davinci_timer_init);
-- 
2.17.0

[PATCH v9 26/27] ARM: davinci: da8xx-dt: switch to device tree clocks

[David Lechner]

This removes all of the clock init code from da8xx-dt.c. This includes
all of the OF_DEV_AUXDATA that was just used for looking up clocks.

Signed-off-by: David Lechner 
---

v9 changes:
- changes to arch/arm/mach-davinci/time.c accidentally got squashed into this
  commit. will drop this later.

v8 changes:
- none

v7 changes:
- rebased
- drop of_platform_default_populate(NULL, NULL, NULL)
- add change in pm_domain.c

v6 changes:
- removed misleading statement from commit message


 arch/arm/mach-davinci/da8xx-dt.c  | 58 ---
 arch/arm/mach-davinci/pm_domain.c |  5 +++
 arch/arm/mach-davinci/time.c  |  9 ++---
 3 files changed, 10 insertions(+), 62 deletions(-)

diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index 088bc5c0318b..23ac4108f812 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -19,67 +19,10 @@
 #include "cp_intc.h"
 #include 
 
-static struct of_dev_auxdata da850_aemif_auxdata_lookup[] = {
-   OF_DEV_AUXDATA("ti,davinci-nand", 0x6200, "davinci-nand.0", NULL),
-   {}
-};
-
-static struct aemif_platform_data aemif_data = {
-   .dev_lookup = da850_aemif_auxdata_lookup,
-};
-
-static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = {
-   OF_DEV_AUXDATA("ti,davinci-i2c", 0x01c22000, "i2c_davinci.1", NULL),
-   OF_DEV_AUXDATA("ti,davinci-i2c", 0x01e28000, "i2c_davinci.2", NULL),
-   OF_DEV_AUXDATA("ti,davinci-wdt", 0x01c21000, "davinci-wdt", NULL),
-   OF_DEV_AUXDATA("ti,da830-mmc", 0x01c4, "da830-mmc.0", NULL),
-   OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f0, "ehrpwm.0", NULL),
-   OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f02000, "ehrpwm.1", NULL),
-   OF_DEV_AUXDATA("ti,da850-ecap", 0x01f06000, "ecap.0", NULL),
-   OF_DEV_AUXDATA("ti,da850-ecap", 0x01f07000, "ecap.1", NULL),
-   OF_DEV_AUXDATA("ti,da850-ecap", 0x01f08000, "ecap.2", NULL),
-   OF_DEV_AUXDATA("ti,da830-spi", 0x01c41000, "spi_davinci.0", NULL),
-   OF_DEV_AUXDATA("ti,da830-spi", 0x01f0e000, "spi_davinci.1", NULL),
-   OF_DEV_AUXDATA("ns16550a", 0x01c42000, "serial8250.0", NULL),
-   OF_DEV_AUXDATA("ns16550a", 0x01d0c000, "serial8250.1", NULL),
-   OF_DEV_AUXDATA("ns16550a", 0x01d0d000, "serial8250.2", NULL),
-   OF_DEV_AUXDATA("ti,davinci_mdio", 0x01e24000, "davinci_mdio.0", NULL),
-   OF_DEV_AUXDATA("ti,davinci-dm6467-emac", 0x01e2, "davinci_emac.1",
-  NULL),
-   OF_DEV_AUXDATA("ti,da830-mcasp-audio", 0x01d0, "davinci-mcasp.0", 
NULL),
-   OF_DEV_AUXDATA("ti,da850-aemif", 0x6800, "ti-aemif", _data),
-   OF_DEV_AUXDATA("ti,da850-tilcdc", 0x01e13000, "da8xx_lcdc.0", NULL),
-   OF_DEV_AUXDATA("ti,da830-ohci", 0x01e25000, "ohci-da8xx", NULL),
-   OF_DEV_AUXDATA("ti,da830-musb", 0x01e0, "musb-da8xx", NULL),
-   OF_DEV_AUXDATA("ti,da830-usb-phy", 0x01c1417c, "da8xx-usb-phy", NULL),
-   OF_DEV_AUXDATA("ti,da850-ahci", 0x01e18000, "ahci_da850", NULL),
-   OF_DEV_AUXDATA("ti,da850-vpif", 0x01e17000, "vpif", NULL),
-   OF_DEV_AUXDATA("ti,da850-dsp", 0x1180, "davinci-rproc.0", NULL),
-   {}
-};
-
 #ifdef CONFIG_ARCH_DAVINCI_DA850
 
 static void __init da850_init_machine(void)
 {
-   /* All existing boards use 100MHz SATA refclkpn */
-   static const unsigned long sata_refclkpn = 100 * 1000 * 1000;
-
-   int ret;
-
-   da850_register_clocks();
-
-   ret = da8xx_register_usb_phy_clocks();
-   if (ret)
-   pr_warn("%s: USB PHY CLK registration failed: %d\n",
-   __func__, ret);
-
-   ret = da850_register_sata_refclk(sata_refclkpn);
-   if (ret)
-   pr_warn("%s: registering SATA REFCLK failed: %d",
-   __func__, ret);
-
-   of_platform_default_populate(NULL, da850_auxdata_lookup, NULL);
davinci_pm_init();
pdata_quirks_init();
 }
@@ -94,7 +37,6 @@ static const char *const da850_boards_compat[] __initconst = {
 
 DT_MACHINE_START(DA850_DT, "Generic DA850/OMAP-L138/AM18x")
.map_io = da850_init,
-   .init_time  = da850_init_time,
.init_machine   = da850_init_machine,
.dt_compat  = da850_boards_compat,
.init_late  = davinci_init_late,
diff --git a/arch/arm/mach-davinci/pm_domain.c 
b/arch/arm/mach-davinci/pm_domain.c
index 78eac2c0c146..e251fd593bfd 100644
--- a/arch/arm/mach-davinci/pm_domain.c
+++ b/arch/arm/mach-davinci/pm_domain.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 
 static struct dev_pm_domain davinci_pm_domain = {
.ops = {
@@ -28,6 +29,10 @@ static struct pm_clk_notifier_block platform_bus_notifier = {
 
 static int __init davinci_pm_runtime_init(void)
 {
+   if (of_have_populated_dt())
+   return 0;
+
+   /* Use pm_clk as fallback if we're not using genpd. */
pm_clk_add_notifier(_bus_type, _bus_notifier);
 

[PATCH v9 27/27] ARM: dts: da850: Add clocks

[David Lechner]

This adds clock provider nodes for da850 and wires them up to all of the
devices.

Signed-off-by: David Lechner 
---

v9 changes:
- change mcasp and vpif nodes from clocks to power-domains

v8 changes:
- fix typo in clock-names property of psc0
- added power-domains properties to nodes that define that property in their
  device tree bindings

v7 changes:
- move ref_clk frequency to board-specific DT files
- enable sata_refclk in da850-lcdk.dts
- drop async2 fixed factor clock
- add power-domains for devices that use them
- fix USB PHY clock-names property
- move assigned-clocks to PSC device node
- drop clocks property from devices that don't use it (e.g. EDMA)
- add clock to RTC node
- add clock-ranges to usb0 and aemif nodes
- add clock-names property to aemif node
- fix typo in psc1 clock-names

v6 changes:
- updated for device tree bindings changes earlier in this series
- use single async2 clock instead of duplicate fixed factor clocks
- add clock-names property to mdio node


 arch/arm/boot/dts/da850-enbw-cmc.dts |   4 +
 arch/arm/boot/dts/da850-evm.dts  |   4 +
 arch/arm/boot/dts/da850-lcdk.dts |   9 ++
 arch/arm/boot/dts/da850-lego-ev3.dts |   4 +
 arch/arm/boot/dts/da850.dtsi | 166 +++
 5 files changed, 187 insertions(+)

diff --git a/arch/arm/boot/dts/da850-enbw-cmc.dts 
b/arch/arm/boot/dts/da850-enbw-cmc.dts
index 14dff3e188ed..0102ffc5aa53 100644
--- a/arch/arm/boot/dts/da850-enbw-cmc.dts
+++ b/arch/arm/boot/dts/da850-enbw-cmc.dts
@@ -35,6 +35,10 @@
};
 };
 
+_clk {
+   clock-frequency = <2400>;
+};
+
  {
ti,edma-reserved-slot-ranges = <32 50>;
 };
diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
index 11cf3765214f..48f6318f4c69 100644
--- a/arch/arm/boot/dts/da850-evm.dts
+++ b/arch/arm/boot/dts/da850-evm.dts
@@ -200,6 +200,10 @@
};
 };
 
+_clk {
+   clock-frequency = <2400>;
+};
+
 /include/ "tps6507x.dtsi"
 
  {
diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts
index 0edf769ea95c..0177e3ed20fe 100644
--- a/arch/arm/boot/dts/da850-lcdk.dts
+++ b/arch/arm/boot/dts/da850-lcdk.dts
@@ -123,6 +123,10 @@
};
 };
 
+_clk {
+   clock-frequency = <2400>;
+};
+
 _core {
status = "okay";
 
@@ -175,6 +179,11 @@
status = "okay";
 };
 
+_refclk {
+   status = "okay";
+   clock-frequency = <1>;
+};
+
  {
status = "okay";
 };
diff --git a/arch/arm/boot/dts/da850-lego-ev3.dts 
b/arch/arm/boot/dts/da850-lego-ev3.dts
index 0a7cfa48b17e..9252ea2c3d3b 100644
--- a/arch/arm/boot/dts/da850-lego-ev3.dts
+++ b/arch/arm/boot/dts/da850-lego-ev3.dts
@@ -193,6 +193,10 @@
};
 };
 
+_clk {
+   clock-frequency = <2400>;
+};
+
 _core {
status = "okay";
 
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index f6f1597b03df..acf71973fec7 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -32,6 +32,25 @@
reg = <0xfffee000 0x2000>;
};
};
+   clocks: clocks {
+   ref_clk: ref_clk {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-output-names = "ref_clk";
+   };
+   sata_refclk: sata_refclk {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-output-names = "sata_refclk";
+   status = "disabled";
+   };
+   usb_refclkin: usb_refclkin {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-output-names = "usb_refclkin";
+   status = "disabled";
+   };
+   };
dsp: dsp@1180 {
compatible = "ti,da850-dsp";
reg = <0x1180 0x4>,
@@ -42,6 +61,7 @@
reg-names = "l2sram", "l1pram", "l1dram", "host1cfg", "chipsig";
interrupt-parent = <>;
interrupts = <28>;
+   clocks = < 15>;
status = "disabled";
};
soc@1c0 {
@@ -52,6 +72,37 @@
ranges = <0x0 0x01c0 0x40>;
interrupt-parent = <>;
 
+   psc0: clock-controller@1 {
+   compatible = "ti,da850-psc0";
+   reg = <0x1 0x1000>;
+   #clock-cells = <1>;
+   #power-domain-cells = <1>;
+   clocks = <_sysclk 1>, <_sysclk 2>,
+<_sysclk 4>, <_sysclk 6>,
+<_clk>;
+   clock-names = "pll0_sysclk1", "pll0_sysclk2",
+ "pll0_sysclk4", "pll0_sysclk6",
+ "async1";
+   };
+ 

[PATCH v9 26/27] ARM: davinci: da8xx-dt: switch to device tree clocks

[David Lechner]

This removes all of the clock init code from da8xx-dt.c. This includes
all of the OF_DEV_AUXDATA that was just used for looking up clocks.

Signed-off-by: David Lechner 
---

v9 changes:
- changes to arch/arm/mach-davinci/time.c accidentally got squashed into this
  commit. will drop this later.

v8 changes:
- none

v7 changes:
- rebased
- drop of_platform_default_populate(NULL, NULL, NULL)
- add change in pm_domain.c

v6 changes:
- removed misleading statement from commit message


 arch/arm/mach-davinci/da8xx-dt.c  | 58 ---
 arch/arm/mach-davinci/pm_domain.c |  5 +++
 arch/arm/mach-davinci/time.c  |  9 ++---
 3 files changed, 10 insertions(+), 62 deletions(-)

diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index 088bc5c0318b..23ac4108f812 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -19,67 +19,10 @@
 #include "cp_intc.h"
 #include 
 
-static struct of_dev_auxdata da850_aemif_auxdata_lookup[] = {
-   OF_DEV_AUXDATA("ti,davinci-nand", 0x6200, "davinci-nand.0", NULL),
-   {}
-};
-
-static struct aemif_platform_data aemif_data = {
-   .dev_lookup = da850_aemif_auxdata_lookup,
-};
-
-static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = {
-   OF_DEV_AUXDATA("ti,davinci-i2c", 0x01c22000, "i2c_davinci.1", NULL),
-   OF_DEV_AUXDATA("ti,davinci-i2c", 0x01e28000, "i2c_davinci.2", NULL),
-   OF_DEV_AUXDATA("ti,davinci-wdt", 0x01c21000, "davinci-wdt", NULL),
-   OF_DEV_AUXDATA("ti,da830-mmc", 0x01c4, "da830-mmc.0", NULL),
-   OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f0, "ehrpwm.0", NULL),
-   OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f02000, "ehrpwm.1", NULL),
-   OF_DEV_AUXDATA("ti,da850-ecap", 0x01f06000, "ecap.0", NULL),
-   OF_DEV_AUXDATA("ti,da850-ecap", 0x01f07000, "ecap.1", NULL),
-   OF_DEV_AUXDATA("ti,da850-ecap", 0x01f08000, "ecap.2", NULL),
-   OF_DEV_AUXDATA("ti,da830-spi", 0x01c41000, "spi_davinci.0", NULL),
-   OF_DEV_AUXDATA("ti,da830-spi", 0x01f0e000, "spi_davinci.1", NULL),
-   OF_DEV_AUXDATA("ns16550a", 0x01c42000, "serial8250.0", NULL),
-   OF_DEV_AUXDATA("ns16550a", 0x01d0c000, "serial8250.1", NULL),
-   OF_DEV_AUXDATA("ns16550a", 0x01d0d000, "serial8250.2", NULL),
-   OF_DEV_AUXDATA("ti,davinci_mdio", 0x01e24000, "davinci_mdio.0", NULL),
-   OF_DEV_AUXDATA("ti,davinci-dm6467-emac", 0x01e2, "davinci_emac.1",
-  NULL),
-   OF_DEV_AUXDATA("ti,da830-mcasp-audio", 0x01d0, "davinci-mcasp.0", 
NULL),
-   OF_DEV_AUXDATA("ti,da850-aemif", 0x6800, "ti-aemif", _data),
-   OF_DEV_AUXDATA("ti,da850-tilcdc", 0x01e13000, "da8xx_lcdc.0", NULL),
-   OF_DEV_AUXDATA("ti,da830-ohci", 0x01e25000, "ohci-da8xx", NULL),
-   OF_DEV_AUXDATA("ti,da830-musb", 0x01e0, "musb-da8xx", NULL),
-   OF_DEV_AUXDATA("ti,da830-usb-phy", 0x01c1417c, "da8xx-usb-phy", NULL),
-   OF_DEV_AUXDATA("ti,da850-ahci", 0x01e18000, "ahci_da850", NULL),
-   OF_DEV_AUXDATA("ti,da850-vpif", 0x01e17000, "vpif", NULL),
-   OF_DEV_AUXDATA("ti,da850-dsp", 0x1180, "davinci-rproc.0", NULL),
-   {}
-};
-
 #ifdef CONFIG_ARCH_DAVINCI_DA850
 
 static void __init da850_init_machine(void)
 {
-   /* All existing boards use 100MHz SATA refclkpn */
-   static const unsigned long sata_refclkpn = 100 * 1000 * 1000;
-
-   int ret;
-
-   da850_register_clocks();
-
-   ret = da8xx_register_usb_phy_clocks();
-   if (ret)
-   pr_warn("%s: USB PHY CLK registration failed: %d\n",
-   __func__, ret);
-
-   ret = da850_register_sata_refclk(sata_refclkpn);
-   if (ret)
-   pr_warn("%s: registering SATA REFCLK failed: %d",
-   __func__, ret);
-
-   of_platform_default_populate(NULL, da850_auxdata_lookup, NULL);
davinci_pm_init();
pdata_quirks_init();
 }
@@ -94,7 +37,6 @@ static const char *const da850_boards_compat[] __initconst = {
 
 DT_MACHINE_START(DA850_DT, "Generic DA850/OMAP-L138/AM18x")
.map_io = da850_init,
-   .init_time  = da850_init_time,
.init_machine   = da850_init_machine,
.dt_compat  = da850_boards_compat,
.init_late  = davinci_init_late,
diff --git a/arch/arm/mach-davinci/pm_domain.c 
b/arch/arm/mach-davinci/pm_domain.c
index 78eac2c0c146..e251fd593bfd 100644
--- a/arch/arm/mach-davinci/pm_domain.c
+++ b/arch/arm/mach-davinci/pm_domain.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 
 static struct dev_pm_domain davinci_pm_domain = {
.ops = {
@@ -28,6 +29,10 @@ static struct pm_clk_notifier_block platform_bus_notifier = {
 
 static int __init davinci_pm_runtime_init(void)
 {
+   if (of_have_populated_dt())
+   return 0;
+
+   /* Use pm_clk as fallback if we're not using genpd. */
pm_clk_add_notifier(_bus_type, _bus_notifier);
 
return 0;
diff --git 

[PATCH v9 27/27] ARM: dts: da850: Add clocks

[David Lechner]

This adds clock provider nodes for da850 and wires them up to all of the
devices.

Signed-off-by: David Lechner 
---

v9 changes:
- change mcasp and vpif nodes from clocks to power-domains

v8 changes:
- fix typo in clock-names property of psc0
- added power-domains properties to nodes that define that property in their
  device tree bindings

v7 changes:
- move ref_clk frequency to board-specific DT files
- enable sata_refclk in da850-lcdk.dts
- drop async2 fixed factor clock
- add power-domains for devices that use them
- fix USB PHY clock-names property
- move assigned-clocks to PSC device node
- drop clocks property from devices that don't use it (e.g. EDMA)
- add clock to RTC node
- add clock-ranges to usb0 and aemif nodes
- add clock-names property to aemif node
- fix typo in psc1 clock-names

v6 changes:
- updated for device tree bindings changes earlier in this series
- use single async2 clock instead of duplicate fixed factor clocks
- add clock-names property to mdio node


 arch/arm/boot/dts/da850-enbw-cmc.dts |   4 +
 arch/arm/boot/dts/da850-evm.dts  |   4 +
 arch/arm/boot/dts/da850-lcdk.dts |   9 ++
 arch/arm/boot/dts/da850-lego-ev3.dts |   4 +
 arch/arm/boot/dts/da850.dtsi | 166 +++
 5 files changed, 187 insertions(+)

diff --git a/arch/arm/boot/dts/da850-enbw-cmc.dts 
b/arch/arm/boot/dts/da850-enbw-cmc.dts
index 14dff3e188ed..0102ffc5aa53 100644
--- a/arch/arm/boot/dts/da850-enbw-cmc.dts
+++ b/arch/arm/boot/dts/da850-enbw-cmc.dts
@@ -35,6 +35,10 @@
};
 };
 
+_clk {
+   clock-frequency = <2400>;
+};
+
  {
ti,edma-reserved-slot-ranges = <32 50>;
 };
diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
index 11cf3765214f..48f6318f4c69 100644
--- a/arch/arm/boot/dts/da850-evm.dts
+++ b/arch/arm/boot/dts/da850-evm.dts
@@ -200,6 +200,10 @@
};
 };
 
+_clk {
+   clock-frequency = <2400>;
+};
+
 /include/ "tps6507x.dtsi"
 
  {
diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts
index 0edf769ea95c..0177e3ed20fe 100644
--- a/arch/arm/boot/dts/da850-lcdk.dts
+++ b/arch/arm/boot/dts/da850-lcdk.dts
@@ -123,6 +123,10 @@
};
 };
 
+_clk {
+   clock-frequency = <2400>;
+};
+
 _core {
status = "okay";
 
@@ -175,6 +179,11 @@
status = "okay";
 };
 
+_refclk {
+   status = "okay";
+   clock-frequency = <1>;
+};
+
  {
status = "okay";
 };
diff --git a/arch/arm/boot/dts/da850-lego-ev3.dts 
b/arch/arm/boot/dts/da850-lego-ev3.dts
index 0a7cfa48b17e..9252ea2c3d3b 100644
--- a/arch/arm/boot/dts/da850-lego-ev3.dts
+++ b/arch/arm/boot/dts/da850-lego-ev3.dts
@@ -193,6 +193,10 @@
};
 };
 
+_clk {
+   clock-frequency = <2400>;
+};
+
 _core {
status = "okay";
 
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index f6f1597b03df..acf71973fec7 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -32,6 +32,25 @@
reg = <0xfffee000 0x2000>;
};
};
+   clocks: clocks {
+   ref_clk: ref_clk {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-output-names = "ref_clk";
+   };
+   sata_refclk: sata_refclk {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-output-names = "sata_refclk";
+   status = "disabled";
+   };
+   usb_refclkin: usb_refclkin {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-output-names = "usb_refclkin";
+   status = "disabled";
+   };
+   };
dsp: dsp@1180 {
compatible = "ti,da850-dsp";
reg = <0x1180 0x4>,
@@ -42,6 +61,7 @@
reg-names = "l2sram", "l1pram", "l1dram", "host1cfg", "chipsig";
interrupt-parent = <>;
interrupts = <28>;
+   clocks = < 15>;
status = "disabled";
};
soc@1c0 {
@@ -52,6 +72,37 @@
ranges = <0x0 0x01c0 0x40>;
interrupt-parent = <>;
 
+   psc0: clock-controller@1 {
+   compatible = "ti,da850-psc0";
+   reg = <0x1 0x1000>;
+   #clock-cells = <1>;
+   #power-domain-cells = <1>;
+   clocks = <_sysclk 1>, <_sysclk 2>,
+<_sysclk 4>, <_sysclk 6>,
+<_clk>;
+   clock-names = "pll0_sysclk1", "pll0_sysclk2",
+ "pll0_sysclk4", "pll0_sysclk6",
+ "async1";
+   };
+   pll0: 

[PATCH v9 24/27] dt-bindings: timer: new bindings for TI DaVinci timer

[David Lechner]

This adds new device tree bindings for the timer IP block of TI
DaVinci-like SoCs.

Signed-off-by: David Lechner 
---

v9 changes:
- new patch in v9


 .../bindings/timer/ti,davinci-timer.txt   | 24 +++
 1 file changed, 24 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/ti,davinci-timer.txt

diff --git a/Documentation/devicetree/bindings/timer/ti,davinci-timer.txt 
b/Documentation/devicetree/bindings/timer/ti,davinci-timer.txt
new file mode 100644
index ..2091eca46981
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/ti,davinci-timer.txt
@@ -0,0 +1,24 @@
+* Device tree bindings for Texas Instruments DaVinci timer
+
+This document provides bindings for the 64-bit timer in the DaVinci
+architecture devices. The timer can be configured as a general-purpose 64-bit
+timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
+timers, each half can operate in conjunction (chain mode) or independently
+(unchained mode) of each other.
+
+It is global timer is a free running up-counter and can generate interrupt
+when the counter reaches preset counter values.
+
+Required properties:
+
+- compatible : should be "ti,davinci-timer".
+- reg : specifies base physical address and count of the registers.
+- clocks : the clock feeding the timer clock.
+
+Example:
+
+   clocksource: timer@2 {
+   compatible = "ti,davinci-timer";
+   reg = <0x2 0x1000>;
+   clocks = <_auxclk>;
+   };
-- 
2.17.0

[PATCH v9 24/27] dt-bindings: timer: new bindings for TI DaVinci timer

[David Lechner]

This adds new device tree bindings for the timer IP block of TI
DaVinci-like SoCs.

Signed-off-by: David Lechner 
---

v9 changes:
- new patch in v9


 .../bindings/timer/ti,davinci-timer.txt   | 24 +++
 1 file changed, 24 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/ti,davinci-timer.txt

diff --git a/Documentation/devicetree/bindings/timer/ti,davinci-timer.txt 
b/Documentation/devicetree/bindings/timer/ti,davinci-timer.txt
new file mode 100644
index ..2091eca46981
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/ti,davinci-timer.txt
@@ -0,0 +1,24 @@
+* Device tree bindings for Texas Instruments DaVinci timer
+
+This document provides bindings for the 64-bit timer in the DaVinci
+architecture devices. The timer can be configured as a general-purpose 64-bit
+timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
+timers, each half can operate in conjunction (chain mode) or independently
+(unchained mode) of each other.
+
+It is global timer is a free running up-counter and can generate interrupt
+when the counter reaches preset counter values.
+
+Required properties:
+
+- compatible : should be "ti,davinci-timer".
+- reg : specifies base physical address and count of the registers.
+- clocks : the clock feeding the timer clock.
+
+Example:
+
+   clocksource: timer@2 {
+   compatible = "ti,davinci-timer";
+   reg = <0x2 0x1000>;
+   clocks = <_auxclk>;
+   };
-- 
2.17.0

[PATCH v9 06/27] ARM: davinci: da850: add new clock init using common clock framework

[David Lechner]

This adds the new board-specific clock init in mach-davinci/da850.c
using the new common clock framework drivers.

The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.

Also clean up the #includes since we are adding some here.

Some CFGCHIP macros were removed because we are now including
linux/mfd/da8xx-cfgchip.h which defines the same values.

Signed-off-by: David Lechner 
---

v9 changes:
- register PLL in da850_init_time() instead of as platform device so that we
  get the correct timer0 clock for davinci_timer_init()

v8 changes:
- add platform data for PLL clocks

v7 changes:
- add clock platform device declarations
- register platform devices instead of registering clocks directly
- clkdev lookup is moved to drivers/clk
- add davinci prefix to commit description

v6 changes:
- add blank lines between function calls
- include da8xx_register_cfgchip()
- add async1 and async2 clock domains


 arch/arm/mach-davinci/board-da850-evm.c |   2 +
 arch/arm/mach-davinci/board-mityomapl138.c  |   2 +
 arch/arm/mach-davinci/board-omapl138-hawk.c |   2 +
 arch/arm/mach-davinci/da850.c   | 155 ++--
 arch/arm/mach-davinci/da8xx-dt.c|   2 +
 arch/arm/mach-davinci/include/mach/da8xx.h  |   1 +
 6 files changed, 151 insertions(+), 13 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da850-evm.c 
b/arch/arm/mach-davinci/board-da850-evm.c
index 3063478bcc36..78a670aafea0 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1334,6 +1334,8 @@ static __init void da850_evm_init(void)
 {
int ret;
 
+   da850_register_clocks();
+
ret = da850_register_gpio();
if (ret)
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c 
b/arch/arm/mach-davinci/board-mityomapl138.c
index d1c85484c2e2..f442784eded3 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -502,6 +502,8 @@ static void __init mityomapl138_init(void)
 {
int ret;
 
+   da850_register_clocks();
+
/* for now, no special EDMA channels are reserved */
ret = da850_register_edma(NULL);
if (ret)
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c 
b/arch/arm/mach-davinci/board-omapl138-hawk.c
index 0d32042b728f..eb09e333b6cd 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -281,6 +281,8 @@ static __init void omapl138_hawk_init(void)
 {
int ret;
 
+   da850_register_clocks();
+
ret = da850_register_gpio();
if (ret)
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 1dbf01c4124b..9e00beb943c9 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -11,39 +11,45 @@
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
  */
+
+#include 
+#include 
 #include 
+#include 
 #include 
 #include 
-#include 
+#include 
+#include 
+#include 
+#include 
 #include 
-#include 
+#include 
 #include 
-#include 
 
 #include 
 
-#include "psc.h"
-#include 
-#include 
 #include 
-#include 
-#include 
 #include 
+#include 
+#include 
+#include 
 #include 
+#include 
 
-#include "clock.h"
 #include "mux.h"
 
+#ifndef CONFIG_COMMON_CLK
+#include "clock.h"
+#include "psc.h"
+#endif
+
 #define DA850_PLL1_BASE0x01e1a000
 #define DA850_TIMER64P2_BASE   0x01f0c000
 #define DA850_TIMER64P3_BASE   0x01f0d000
 
 #define DA850_REF_FREQ 2400
 
-#define CFGCHIP3_ASYNC3_CLKSRC BIT(4)
-#define CFGCHIP3_PLL1_MASTER_LOCK  BIT(5)
-#define CFGCHIP0_PLL_MASTER_LOCK   BIT(4)
-
+#ifndef CONFIG_COMMON_CLK
 static int da850_set_armrate(struct clk *clk, unsigned long rate);
 static int da850_round_armrate(struct clk *clk, unsigned long rate);
 static int da850_set_pll0rate(struct clk *clk, unsigned long armrate);
@@ -583,6 +589,7 @@ static struct clk_lookup da850_clks[] = {
CLK("ecap.2",   "fck",  _clk),
CLK(NULL,   NULL,   NULL),
 };
+#endif
 
 /*
  * Device specific mux setup
@@ -1170,6 +1177,7 @@ int da850_register_cpufreq(char *async_clk)
return platform_device_register(_cpufreq_device);
 }
 
+#ifndef CONFIG_COMMON_CLK
 static int da850_round_armrate(struct clk *clk, unsigned long rate)
 {
int ret = 0, diff;
@@ -1232,12 +1240,14 @@ static int da850_set_pll0rate(struct clk *clk, unsigned 
long rate)
 
return 0;
 }
+#endif /* CONFIG_COMMON_CLK */
 #else
 int __init da850_register_cpufreq(char *async_clk)
 {
return 0;
 }
 
+#ifndef CONFIG_COMMON_CLK
 static int da850_set_armrate(struct clk *clk, unsigned long rate)
 {
return -EINVAL;
@@ -1252,6 +1262,7 @@ static int da850_round_armrate(struct clk 

[PATCH v9 06/27] ARM: davinci: da850: add new clock init using common clock framework

[David Lechner]

This adds the new board-specific clock init in mach-davinci/da850.c
using the new common clock framework drivers.

The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.

Also clean up the #includes since we are adding some here.

Some CFGCHIP macros were removed because we are now including
linux/mfd/da8xx-cfgchip.h which defines the same values.

Signed-off-by: David Lechner 
---

v9 changes:
- register PLL in da850_init_time() instead of as platform device so that we
  get the correct timer0 clock for davinci_timer_init()

v8 changes:
- add platform data for PLL clocks

v7 changes:
- add clock platform device declarations
- register platform devices instead of registering clocks directly
- clkdev lookup is moved to drivers/clk
- add davinci prefix to commit description

v6 changes:
- add blank lines between function calls
- include da8xx_register_cfgchip()
- add async1 and async2 clock domains


 arch/arm/mach-davinci/board-da850-evm.c |   2 +
 arch/arm/mach-davinci/board-mityomapl138.c  |   2 +
 arch/arm/mach-davinci/board-omapl138-hawk.c |   2 +
 arch/arm/mach-davinci/da850.c   | 155 ++--
 arch/arm/mach-davinci/da8xx-dt.c|   2 +
 arch/arm/mach-davinci/include/mach/da8xx.h  |   1 +
 6 files changed, 151 insertions(+), 13 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da850-evm.c 
b/arch/arm/mach-davinci/board-da850-evm.c
index 3063478bcc36..78a670aafea0 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1334,6 +1334,8 @@ static __init void da850_evm_init(void)
 {
int ret;
 
+   da850_register_clocks();
+
ret = da850_register_gpio();
if (ret)
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c 
b/arch/arm/mach-davinci/board-mityomapl138.c
index d1c85484c2e2..f442784eded3 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -502,6 +502,8 @@ static void __init mityomapl138_init(void)
 {
int ret;
 
+   da850_register_clocks();
+
/* for now, no special EDMA channels are reserved */
ret = da850_register_edma(NULL);
if (ret)
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c 
b/arch/arm/mach-davinci/board-omapl138-hawk.c
index 0d32042b728f..eb09e333b6cd 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -281,6 +281,8 @@ static __init void omapl138_hawk_init(void)
 {
int ret;
 
+   da850_register_clocks();
+
ret = da850_register_gpio();
if (ret)
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 1dbf01c4124b..9e00beb943c9 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -11,39 +11,45 @@
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
  */
+
+#include 
+#include 
 #include 
+#include 
 #include 
 #include 
-#include 
+#include 
+#include 
+#include 
+#include 
 #include 
-#include 
+#include 
 #include 
-#include 
 
 #include 
 
-#include "psc.h"
-#include 
-#include 
 #include 
-#include 
-#include 
 #include 
+#include 
+#include 
+#include 
 #include 
+#include 
 
-#include "clock.h"
 #include "mux.h"
 
+#ifndef CONFIG_COMMON_CLK
+#include "clock.h"
+#include "psc.h"
+#endif
+
 #define DA850_PLL1_BASE0x01e1a000
 #define DA850_TIMER64P2_BASE   0x01f0c000
 #define DA850_TIMER64P3_BASE   0x01f0d000
 
 #define DA850_REF_FREQ 2400
 
-#define CFGCHIP3_ASYNC3_CLKSRC BIT(4)
-#define CFGCHIP3_PLL1_MASTER_LOCK  BIT(5)
-#define CFGCHIP0_PLL_MASTER_LOCK   BIT(4)
-
+#ifndef CONFIG_COMMON_CLK
 static int da850_set_armrate(struct clk *clk, unsigned long rate);
 static int da850_round_armrate(struct clk *clk, unsigned long rate);
 static int da850_set_pll0rate(struct clk *clk, unsigned long armrate);
@@ -583,6 +589,7 @@ static struct clk_lookup da850_clks[] = {
CLK("ecap.2",   "fck",  _clk),
CLK(NULL,   NULL,   NULL),
 };
+#endif
 
 /*
  * Device specific mux setup
@@ -1170,6 +1177,7 @@ int da850_register_cpufreq(char *async_clk)
return platform_device_register(_cpufreq_device);
 }
 
+#ifndef CONFIG_COMMON_CLK
 static int da850_round_armrate(struct clk *clk, unsigned long rate)
 {
int ret = 0, diff;
@@ -1232,12 +1240,14 @@ static int da850_set_pll0rate(struct clk *clk, unsigned 
long rate)
 
return 0;
 }
+#endif /* CONFIG_COMMON_CLK */
 #else
 int __init da850_register_cpufreq(char *async_clk)
 {
return 0;
 }
 
+#ifndef CONFIG_COMMON_CLK
 static int da850_set_armrate(struct clk *clk, unsigned long rate)
 {
return -EINVAL;
@@ -1252,6 +1262,7 @@ static int da850_round_armrate(struct clk *clk, unsigned 
long