Re: [PATCH] mtd: spi-nor: parse SFDP 4-byte Address Instruction Table
On Tue, 20 Nov 2018 11:55:21 + wrote: > + > + /* > + * We set nor->addr_width here to skip spi_nor_set_4byte_opcodes() > + * later because this latest function implements a legacy quirk for > + * the erase size of Spansion memory. However this quirk is no longer > + * needed with new SFDP compliant memories. > + */ > + nor->addr_width = 4; > + nor->flags |= SPI_NOR_4B_OPCODES; You mean SNOR_F_4B_OPCODES (the one introduced here [1]), because SPI_NOR_4B_OPCODES should only be used for flash_info->flags and might soon conflict with another SNOR_F_ flag? [1]http://patchwork.ozlabs.org/patch/991476/
Re: [PATCH] mtd: spi-nor: parse SFDP 4-byte Address Instruction Table
On Tue, 20 Nov 2018 11:55:21 + wrote: > + > + /* > + * We set nor->addr_width here to skip spi_nor_set_4byte_opcodes() > + * later because this latest function implements a legacy quirk for > + * the erase size of Spansion memory. However this quirk is no longer > + * needed with new SFDP compliant memories. > + */ > + nor->addr_width = 4; > + nor->flags |= SPI_NOR_4B_OPCODES; You mean SNOR_F_4B_OPCODES (the one introduced here [1]), because SPI_NOR_4B_OPCODES should only be used for flash_info->flags and might soon conflict with another SNOR_F_ flag? [1]http://patchwork.ozlabs.org/patch/991476/
Re: [PATCH v5 2/7] tpm: remove definition of TPM2_ACTIVE_PCR_BANKS
On 11/16/2018 2:38 PM, Jarkko Sakkinen wrote:
On Wed, Nov 14, 2018 at 04:31:03PM +0100, Roberto Sassu wrote:
tcg_efi_specid_event and tcg_pcr_event2 declaration contains static arrays
for a list of hash algorithms used for event logs and event log digests.
However, according to TCG EFI Protocol Specification, these arrays have
variable sizes. Setting the array size to zero or 3 does not make any
difference, because the parser has to adjust the offset depending on the
actual array size to access structure members after the static arrays.
Thus, this patch removes the declaration of TPM2_ACTIVE_PCR_BANKS and sets
the array size to zero.
Fixes: 4d23cc323cdb ("tpm: add securityfs support for TPM 2.0 firmware
event log")
Signed-off-by: Roberto Sassu
---
include/linux/tpm_eventlog.h | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/include/linux/tpm_eventlog.h b/include/linux/tpm_eventlog.h
index 20d9da77fc11..3d5d162f09cc 100644
--- a/include/linux/tpm_eventlog.h
+++ b/include/linux/tpm_eventlog.h
@@ -8,7 +8,6 @@
#define TCG_EVENT_NAME_LEN_MAX255
#define MAX_TEXT_EVENT1000/* Max event string length */
#define ACPI_TCPA_SIG "TCPA"/* 0x41504354 /'TCPA' */
-#define TPM2_ACTIVE_PCR_BANKS 3
#define EFI_TCG2_EVENT_LOG_FORMAT_TCG_1_2 0x1
#define EFI_TCG2_EVENT_LOG_FORMAT_TCG_2 0x2
@@ -90,7 +89,7 @@ struct tcg_efi_specid_event {
u8 spec_errata;
u8 uintnsize;
u32 num_algs;
- struct tcg_efi_specid_event_algs digest_sizes[TPM2_ACTIVE_PCR_BANKS];
+ struct tcg_efi_specid_event_algs digest_sizes[0];
u8 vendor_info_size;
u8 vendor_info[0];
} __packed;
@@ -117,7 +116,7 @@ struct tcg_pcr_event2 {
u32 pcr_idx;
u32 event_type;
u32 count;
- struct tpm2_digest digests[TPM2_ACTIVE_PCR_BANKS];
+ struct tpm2_digest digests[0];
struct tcg_event_field event;
} __packed;
--
2.17.1
NAK for the same reason as last time.
No Fixes tag, or Fixes tag without newline?
Roberto
/Jarkko
--
HUAWEI TECHNOLOGIES Duesseldorf GmbH, HRB 56063
Managing Director: Bo PENG, Jian LI, Yanli SHI
Re: [PATCH v5 2/7] tpm: remove definition of TPM2_ACTIVE_PCR_BANKS
On 11/16/2018 2:38 PM, Jarkko Sakkinen wrote:
On Wed, Nov 14, 2018 at 04:31:03PM +0100, Roberto Sassu wrote:
tcg_efi_specid_event and tcg_pcr_event2 declaration contains static arrays
for a list of hash algorithms used for event logs and event log digests.
However, according to TCG EFI Protocol Specification, these arrays have
variable sizes. Setting the array size to zero or 3 does not make any
difference, because the parser has to adjust the offset depending on the
actual array size to access structure members after the static arrays.
Thus, this patch removes the declaration of TPM2_ACTIVE_PCR_BANKS and sets
the array size to zero.
Fixes: 4d23cc323cdb ("tpm: add securityfs support for TPM 2.0 firmware
event log")
Signed-off-by: Roberto Sassu
---
include/linux/tpm_eventlog.h | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/include/linux/tpm_eventlog.h b/include/linux/tpm_eventlog.h
index 20d9da77fc11..3d5d162f09cc 100644
--- a/include/linux/tpm_eventlog.h
+++ b/include/linux/tpm_eventlog.h
@@ -8,7 +8,6 @@
#define TCG_EVENT_NAME_LEN_MAX255
#define MAX_TEXT_EVENT1000/* Max event string length */
#define ACPI_TCPA_SIG "TCPA"/* 0x41504354 /'TCPA' */
-#define TPM2_ACTIVE_PCR_BANKS 3
#define EFI_TCG2_EVENT_LOG_FORMAT_TCG_1_2 0x1
#define EFI_TCG2_EVENT_LOG_FORMAT_TCG_2 0x2
@@ -90,7 +89,7 @@ struct tcg_efi_specid_event {
u8 spec_errata;
u8 uintnsize;
u32 num_algs;
- struct tcg_efi_specid_event_algs digest_sizes[TPM2_ACTIVE_PCR_BANKS];
+ struct tcg_efi_specid_event_algs digest_sizes[0];
u8 vendor_info_size;
u8 vendor_info[0];
} __packed;
@@ -117,7 +116,7 @@ struct tcg_pcr_event2 {
u32 pcr_idx;
u32 event_type;
u32 count;
- struct tpm2_digest digests[TPM2_ACTIVE_PCR_BANKS];
+ struct tpm2_digest digests[0];
struct tcg_event_field event;
} __packed;
--
2.17.1
NAK for the same reason as last time.
No Fixes tag, or Fixes tag without newline?
Roberto
/Jarkko
--
HUAWEI TECHNOLOGIES Duesseldorf GmbH, HRB 56063
Managing Director: Bo PENG, Jian LI, Yanli SHI
[PATCH v3] spi: mediatek: Add bindings for mediatek MT7629 soc platform
This patch adds a DT binding documentation for the MT7629 soc. Signed-off-by: Leilk Liu --- v3: remove cover-letter. v2: remove "mediatek,mt7629-spi" compatible according Matthias's advice. v1: This series are based on 4.20-rc1 and provide two patches to support mt7629 IC. --- .../devicetree/bindings/spi/spi-mt65xx.txt |1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt index 7940940..69c3567 100644 --- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt +++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt @@ -6,6 +6,7 @@ Required properties: - mediatek,mt2712-spi: for mt2712 platforms - mediatek,mt6589-spi: for mt6589 platforms - mediatek,mt7622-spi: for mt7622 platforms +- "mediatek,mt7629-spi", "mediatek,mt7622-spi": for mt7629 platforms - mediatek,mt8135-spi: for mt8135 platforms - mediatek,mt8173-spi: for mt8173 platforms - mediatek,mt8183-spi: for mt8183 platforms -- 1.7.9.5
[PATCH v3] spi: mediatek: Add bindings for mediatek MT7629 soc platform
This patch adds a DT binding documentation for the MT7629 soc. Signed-off-by: Leilk Liu --- v3: remove cover-letter. v2: remove "mediatek,mt7629-spi" compatible according Matthias's advice. v1: This series are based on 4.20-rc1 and provide two patches to support mt7629 IC. --- .../devicetree/bindings/spi/spi-mt65xx.txt |1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt index 7940940..69c3567 100644 --- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt +++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt @@ -6,6 +6,7 @@ Required properties: - mediatek,mt2712-spi: for mt2712 platforms - mediatek,mt6589-spi: for mt6589 platforms - mediatek,mt7622-spi: for mt7622 platforms +- "mediatek,mt7629-spi", "mediatek,mt7622-spi": for mt7629 platforms - mediatek,mt8135-spi: for mt8135 platforms - mediatek,mt8173-spi: for mt8173 platforms - mediatek,mt8183-spi: for mt8183 platforms -- 1.7.9.5
Re: [PATCH v2 00/12] tracing: Unifying dynamic event interface
Ping? Hi Tom, This series, especially [09/12] tracing: Remove unneeded synth_event_mutex will effect your current working series. Please tell me your opinion. Thank you, On Mon, 5 Nov 2018 17:59:46 +0900 Masami Hiramatsu wrote: > Hi, > > This is v2 series of unifying dynamic event interface on ftrace. > Currently ftrace has 3 dynamic event interfaces, kprobes, uprobes > and synthetic. This series unifies those dynamic event interfaces > to "dynamic_events" so that we can add other dynamic events easily > on same interface, e.g. function events. > The older interfaces are left on the tracefs for backward > compatibility. > > dynamic_events syntax has no difference from kprobe_events and > uprobe_events. You can use same syntax for dynamic_events interface. > For synthetic events, similar to the probe events, dynamic_events > adds "s:[GROUP/]" prefix, where the "GROUP/" must be "synthetic/". > > s:[synthetic/] type arg [type arg]... > > E.g. > > $ echo 'wakeup_latency u64 lat pid_t pid char' > synthetic_events > > is same as > > $ echo 's:wakeup_latency u64 lat pid_t pid char' > dynamic_events > > Or > > $ echo 's:synthetic/wakeup_latency u64 lat pid_t pid char' > dynamic_events > > This series modifies synthetic event interface behavior a bit, > reorder lock dependency and related cleanups so that we can integrate > the synthetic event to dynamic_events interface. > > In this version, I changed the generic '!' erase command, which > now supports entire line style like other interfaces. So you can > delete events via dynamic_events as below > > $ cat dynamic_events | while read line; \ >do echo "!$line" >> dynamic_events; done > > Also, the big change will be removing dyn_event_mutex and > synth_event_mutex because all those parts are protected by > event_mutex. > > Changes from v2 are here; > > New patches: > - Reorder event_mutex and synth_event_mutex to solve >AB-BA deadlock correctly. ([2/12]) > - Simplify creation and deletion of synthetic event. ([3/12]) > - Retern -ENOENT if there is no synthetic event when deleting ([4/12]) > - Integrate similar probe argument parsers ([5/12]) > - Use dyn_event framework for synthetic events ([9/12]) > - Remove synth_event_mutex ([10/12]) > - Remove unused APIs ([11/12]) > > Modified patches: > [6/12] - [8/12] > - Generalize delete event and export as dyn_event_release_all(). > - Add match operation for find deleting event. > - Reorder event_mutex and dyn_event_mutex to solve lock dependency >issue. > - Pass const char **argv for create operation and use -ECANCELED to >signal for trying next dyn_event_operations. > - Remove dyn_event_mutex. > > [12/12] > - Accept entire line, but instead of checking the given entire line >strictly, simply checking the event and group name. > > Tom, thanks for your Ack for v1 series. Since I changed many things > from v1 (not only minor change), I decided to not add your Ack for > this version. Anyway, what I've added in this version are related to > synthetic events. I need your review for those. > (especially removing synth_event_mutex) > > You can try it from my git tree. > > https://github.com/mhiramat/linux/tree/unify-dynamic-events-v2 > > Thank you, > > --- > > Masami Hiramatsu (12): > tracing/uprobes: Add busy check when cleanup all uprobes > tracing: Lock event_mutex before synth_event_mutex > tracing: Simplify creation and deletion of synthetic event > tracing: Integrate similar probe argument parsers > tracing: Add unified dynamic event framework > tracing/kprobes: Use dyn_event framework for kprobe events > tracing/uprobes: Use dyn_event framework for uprobe events > tracing: Use dyn_event framework for synthetic events > tracing: Remove unneeded synth_event_mutex > tracing: Remove orphaned trace_add/remove_event_call functions > tracing: Add generic event-name based remove event method > selftests/ftrace: Add testcases for dynamic event > > > Documentation/trace/kprobetrace.rst|3 > Documentation/trace/uprobetracer.rst |4 > include/linux/trace_events.h |4 > kernel/trace/Kconfig |6 > kernel/trace/Makefile |1 > kernel/trace/trace.c | 12 + > kernel/trace/trace_dynevent.c | 217 > kernel/trace/trace_dynevent.h | 119 +++ > kernel/trace/trace_events.c| 12 - > kernel/trace/trace_events_hist.c | 322 ++ > kernel/trace/trace_kprobe.c| 357 > ++-- > kernel/trace/trace_probe.c | 74 > kernel/trace/trace_probe.h |9 - > kernel/trace/trace_uprobe.c| 305 - >
Re: [PATCH v2 00/12] tracing: Unifying dynamic event interface
Ping? Hi Tom, This series, especially [09/12] tracing: Remove unneeded synth_event_mutex will effect your current working series. Please tell me your opinion. Thank you, On Mon, 5 Nov 2018 17:59:46 +0900 Masami Hiramatsu wrote: > Hi, > > This is v2 series of unifying dynamic event interface on ftrace. > Currently ftrace has 3 dynamic event interfaces, kprobes, uprobes > and synthetic. This series unifies those dynamic event interfaces > to "dynamic_events" so that we can add other dynamic events easily > on same interface, e.g. function events. > The older interfaces are left on the tracefs for backward > compatibility. > > dynamic_events syntax has no difference from kprobe_events and > uprobe_events. You can use same syntax for dynamic_events interface. > For synthetic events, similar to the probe events, dynamic_events > adds "s:[GROUP/]" prefix, where the "GROUP/" must be "synthetic/". > > s:[synthetic/] type arg [type arg]... > > E.g. > > $ echo 'wakeup_latency u64 lat pid_t pid char' > synthetic_events > > is same as > > $ echo 's:wakeup_latency u64 lat pid_t pid char' > dynamic_events > > Or > > $ echo 's:synthetic/wakeup_latency u64 lat pid_t pid char' > dynamic_events > > This series modifies synthetic event interface behavior a bit, > reorder lock dependency and related cleanups so that we can integrate > the synthetic event to dynamic_events interface. > > In this version, I changed the generic '!' erase command, which > now supports entire line style like other interfaces. So you can > delete events via dynamic_events as below > > $ cat dynamic_events | while read line; \ >do echo "!$line" >> dynamic_events; done > > Also, the big change will be removing dyn_event_mutex and > synth_event_mutex because all those parts are protected by > event_mutex. > > Changes from v2 are here; > > New patches: > - Reorder event_mutex and synth_event_mutex to solve >AB-BA deadlock correctly. ([2/12]) > - Simplify creation and deletion of synthetic event. ([3/12]) > - Retern -ENOENT if there is no synthetic event when deleting ([4/12]) > - Integrate similar probe argument parsers ([5/12]) > - Use dyn_event framework for synthetic events ([9/12]) > - Remove synth_event_mutex ([10/12]) > - Remove unused APIs ([11/12]) > > Modified patches: > [6/12] - [8/12] > - Generalize delete event and export as dyn_event_release_all(). > - Add match operation for find deleting event. > - Reorder event_mutex and dyn_event_mutex to solve lock dependency >issue. > - Pass const char **argv for create operation and use -ECANCELED to >signal for trying next dyn_event_operations. > - Remove dyn_event_mutex. > > [12/12] > - Accept entire line, but instead of checking the given entire line >strictly, simply checking the event and group name. > > Tom, thanks for your Ack for v1 series. Since I changed many things > from v1 (not only minor change), I decided to not add your Ack for > this version. Anyway, what I've added in this version are related to > synthetic events. I need your review for those. > (especially removing synth_event_mutex) > > You can try it from my git tree. > > https://github.com/mhiramat/linux/tree/unify-dynamic-events-v2 > > Thank you, > > --- > > Masami Hiramatsu (12): > tracing/uprobes: Add busy check when cleanup all uprobes > tracing: Lock event_mutex before synth_event_mutex > tracing: Simplify creation and deletion of synthetic event > tracing: Integrate similar probe argument parsers > tracing: Add unified dynamic event framework > tracing/kprobes: Use dyn_event framework for kprobe events > tracing/uprobes: Use dyn_event framework for uprobe events > tracing: Use dyn_event framework for synthetic events > tracing: Remove unneeded synth_event_mutex > tracing: Remove orphaned trace_add/remove_event_call functions > tracing: Add generic event-name based remove event method > selftests/ftrace: Add testcases for dynamic event > > > Documentation/trace/kprobetrace.rst|3 > Documentation/trace/uprobetracer.rst |4 > include/linux/trace_events.h |4 > kernel/trace/Kconfig |6 > kernel/trace/Makefile |1 > kernel/trace/trace.c | 12 + > kernel/trace/trace_dynevent.c | 217 > kernel/trace/trace_dynevent.h | 119 +++ > kernel/trace/trace_events.c| 12 - > kernel/trace/trace_events_hist.c | 322 ++ > kernel/trace/trace_kprobe.c| 357 > ++-- > kernel/trace/trace_probe.c | 74 > kernel/trace/trace_probe.h |9 - > kernel/trace/trace_uprobe.c| 305 - >
[PATCH v2] lzo: fix ip overrun during compress.
It`s possible ip overrun in lzo1x_1_do_compress() when compressed page is point to the end of memory and which virtual address is 0xf000. Leading to a NULL pointer access during the get_unaligned_le32(ip). Fix this panic: [ 2738.034508] Unable to handle kernel NULL pointer dereference at virtual address 0009 [ 2738.034515] Mem abort info: [ 2738.034518] Exception class = DABT (current EL), IL = 32 bits [ 2738.034520] SET = 0, FnV = 0 [ 2738.034523] EA = 0, S1PTW = 0 [ 2738.034524] FSC = 5 [ 2738.034526] Data abort info: [ 2738.034528] ISV = 0, ISS = 0x0005 [ 2738.034530] CM = 0, WnR = 0 [ 2738.034533] user pgtable: 4k pages, 39-bit VAs, pgd = 94cee000 [ 2738.034535] [0009] *pgd=, *pud= ... [ 2738.034592] pc : lzo1x_1_do_compress+0x198/0x610 [ 2738.034595] lr : lzo1x_1_compress+0x98/0x3d8 [ 2738.034597] sp : ff801caa3470 pstate : 00c00145 [ 2738.034598] x29: ff801caa3500 x28: 1000 [ 2738.034601] x27: 1000 x26: f000 [ 2738.034604] x25: 4ebc x24: [ 2738.034607] x23: 004c x22: f7b8 [ 2738.034610] x21: 2e2ee0b3 x20: 2e2ee0bb [ 2738.034612] x19: 0fcc x18: f84a [ 2738.034615] x17: 801b03d6 x16: 0782 [ 2738.034618] x15: 2e2ee0bf x14: fff0 [ 2738.034620] x13: 000f x12: 0020 [ 2738.034623] x11: 1824429d x10: ffec [ 2738.034626] x9 : 0009 x8 : [ 2738.034628] x7 : 0868 x6 : 0434 [ 2738.034631] x5 : 4ebc x4 : [ 2738.034633] x3 : ff801caa3510 x2 : 2e2ee000 [ 2738.034636] x1 : x0 : f000 ... [ 2738.034717] Process kworker/u16:1 (pid: 8705, stack limit = 0xff801caa) [ 2738.034720] Call trace: [ 2738.034722] lzo1x_1_do_compress+0x198/0x610 [ 2738.034725] lzo_compress+0x48/0x88 [ 2738.034729] crypto_compress+0x14/0x20 [ 2738.034733] zcomp_compress+0x2c/0x38 [ 2738.034736] zram_bvec_rw+0x3d0/0x860 [ 2738.034738] zram_rw_page+0x88/0xe0 [ 2738.034742] bdev_write_page+0x70/0xc0 [ 2738.034745] __swap_writepage+0x58/0x3f8 [ 2738.034747] swap_writepage+0x40/0x50 [ 2738.034750] shrink_page_list+0x4fc/0xe58 [ 2738.034753] reclaim_pages_from_list+0xa0/0x150 [ 2738.034756] reclaim_pte_range+0x18c/0x1f8 [ 2738.034759] __walk_page_range+0xf8/0x1e0 [ 2738.034762] walk_page_range+0xf8/0x130 [ 2738.034765] reclaim_task_anon+0xcc/0x168 [ 2738.034767] swap_fn+0x438/0x668 [ 2738.034771] process_one_work+0x1fc/0x460 [ 2738.034773] worker_thread+0x2d0/0x478 [ 2738.034775] kthread+0x110/0x120 [ 2738.034778] ret_from_fork+0x10/0x18 [ 2738.034781] Code: 3800167f 54a8 d100066f 1431 (b9400131) [ 2738.034784] ---[ end trace 9b5cca106f0e54d1 ]--- [ 2738.035473] Kernel panic - not syncing: Fatal exception crash> dis lzo1x_1_do_compress+100 3 -l ../kernel/msm-4.14/lib/lzo/lzo1x_compress.c: 44 0xff8dec8c6af4 : cmp x9, x10 0xff8dec8c6af8 : b.cc0xff8dec8c6c28 0xff8dec8c6afc : b 0xff8dec8c7094 crash> dis lzo1x_1_do_compress+0x198 0xff8dec8c6c28 : ldr w17, [x9] ip = x9 = 0x0009 is overflow. Signed-off-by: liyueyi --- lib/lzo/lzo1x_compress.c | 14 +++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/lib/lzo/lzo1x_compress.c b/lib/lzo/lzo1x_compress.c index 236eb21..b15082b 100644 --- a/lib/lzo/lzo1x_compress.c +++ b/lib/lzo/lzo1x_compress.c @@ -17,6 +17,9 @@ #include #include "lzodefs.h" +#define OVERFLOW_ADD_CHECK(a, b) \ + (((a) + (b)) < (a)) + static noinline size_t lzo1x_1_do_compress(const unsigned char *in, size_t in_len, unsigned char *out, size_t *out_len, @@ -39,6 +42,8 @@ lzo1x_1_do_compress(const unsigned char *in, size_t in_len, size_t t, m_len, m_off; u32 dv; literal: + if (unlikely(OVERFLOW_ADD_CHECK(ip, 1 + ((ip - ii) >> 5 + break; ip += 1 + ((ip - ii) >> 5); next: if (unlikely(ip >= ip_end)) @@ -99,7 +104,8 @@ lzo1x_1_do_compress(const unsigned char *in, size_t in_len, m_len += 8; v = get_unaligned((const u64 *) (ip + m_len)) ^ get_unaligned((const u64 *) (m_pos + m_len)); - if (unlikely(ip + m_len >= ip_end)) + if (unlikely(OVERFLOW_ADD_CHECK(ip, m_len) + || (ip + m_len >= ip_end))) goto m_len_done; } while (v == 0); } @@ -124,7 +130,8 @@ lzo1x_1_do_compress(const unsigned char *in, size_t in_len, m_len += 4;
[PATCH v2] lzo: fix ip overrun during compress.
It`s possible ip overrun in lzo1x_1_do_compress() when compressed page is point to the end of memory and which virtual address is 0xf000. Leading to a NULL pointer access during the get_unaligned_le32(ip). Fix this panic: [ 2738.034508] Unable to handle kernel NULL pointer dereference at virtual address 0009 [ 2738.034515] Mem abort info: [ 2738.034518] Exception class = DABT (current EL), IL = 32 bits [ 2738.034520] SET = 0, FnV = 0 [ 2738.034523] EA = 0, S1PTW = 0 [ 2738.034524] FSC = 5 [ 2738.034526] Data abort info: [ 2738.034528] ISV = 0, ISS = 0x0005 [ 2738.034530] CM = 0, WnR = 0 [ 2738.034533] user pgtable: 4k pages, 39-bit VAs, pgd = 94cee000 [ 2738.034535] [0009] *pgd=, *pud= ... [ 2738.034592] pc : lzo1x_1_do_compress+0x198/0x610 [ 2738.034595] lr : lzo1x_1_compress+0x98/0x3d8 [ 2738.034597] sp : ff801caa3470 pstate : 00c00145 [ 2738.034598] x29: ff801caa3500 x28: 1000 [ 2738.034601] x27: 1000 x26: f000 [ 2738.034604] x25: 4ebc x24: [ 2738.034607] x23: 004c x22: f7b8 [ 2738.034610] x21: 2e2ee0b3 x20: 2e2ee0bb [ 2738.034612] x19: 0fcc x18: f84a [ 2738.034615] x17: 801b03d6 x16: 0782 [ 2738.034618] x15: 2e2ee0bf x14: fff0 [ 2738.034620] x13: 000f x12: 0020 [ 2738.034623] x11: 1824429d x10: ffec [ 2738.034626] x9 : 0009 x8 : [ 2738.034628] x7 : 0868 x6 : 0434 [ 2738.034631] x5 : 4ebc x4 : [ 2738.034633] x3 : ff801caa3510 x2 : 2e2ee000 [ 2738.034636] x1 : x0 : f000 ... [ 2738.034717] Process kworker/u16:1 (pid: 8705, stack limit = 0xff801caa) [ 2738.034720] Call trace: [ 2738.034722] lzo1x_1_do_compress+0x198/0x610 [ 2738.034725] lzo_compress+0x48/0x88 [ 2738.034729] crypto_compress+0x14/0x20 [ 2738.034733] zcomp_compress+0x2c/0x38 [ 2738.034736] zram_bvec_rw+0x3d0/0x860 [ 2738.034738] zram_rw_page+0x88/0xe0 [ 2738.034742] bdev_write_page+0x70/0xc0 [ 2738.034745] __swap_writepage+0x58/0x3f8 [ 2738.034747] swap_writepage+0x40/0x50 [ 2738.034750] shrink_page_list+0x4fc/0xe58 [ 2738.034753] reclaim_pages_from_list+0xa0/0x150 [ 2738.034756] reclaim_pte_range+0x18c/0x1f8 [ 2738.034759] __walk_page_range+0xf8/0x1e0 [ 2738.034762] walk_page_range+0xf8/0x130 [ 2738.034765] reclaim_task_anon+0xcc/0x168 [ 2738.034767] swap_fn+0x438/0x668 [ 2738.034771] process_one_work+0x1fc/0x460 [ 2738.034773] worker_thread+0x2d0/0x478 [ 2738.034775] kthread+0x110/0x120 [ 2738.034778] ret_from_fork+0x10/0x18 [ 2738.034781] Code: 3800167f 54a8 d100066f 1431 (b9400131) [ 2738.034784] ---[ end trace 9b5cca106f0e54d1 ]--- [ 2738.035473] Kernel panic - not syncing: Fatal exception crash> dis lzo1x_1_do_compress+100 3 -l ../kernel/msm-4.14/lib/lzo/lzo1x_compress.c: 44 0xff8dec8c6af4 : cmp x9, x10 0xff8dec8c6af8 : b.cc0xff8dec8c6c28 0xff8dec8c6afc : b 0xff8dec8c7094 crash> dis lzo1x_1_do_compress+0x198 0xff8dec8c6c28 : ldr w17, [x9] ip = x9 = 0x0009 is overflow. Signed-off-by: liyueyi --- lib/lzo/lzo1x_compress.c | 14 +++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/lib/lzo/lzo1x_compress.c b/lib/lzo/lzo1x_compress.c index 236eb21..b15082b 100644 --- a/lib/lzo/lzo1x_compress.c +++ b/lib/lzo/lzo1x_compress.c @@ -17,6 +17,9 @@ #include #include "lzodefs.h" +#define OVERFLOW_ADD_CHECK(a, b) \ + (((a) + (b)) < (a)) + static noinline size_t lzo1x_1_do_compress(const unsigned char *in, size_t in_len, unsigned char *out, size_t *out_len, @@ -39,6 +42,8 @@ lzo1x_1_do_compress(const unsigned char *in, size_t in_len, size_t t, m_len, m_off; u32 dv; literal: + if (unlikely(OVERFLOW_ADD_CHECK(ip, 1 + ((ip - ii) >> 5 + break; ip += 1 + ((ip - ii) >> 5); next: if (unlikely(ip >= ip_end)) @@ -99,7 +104,8 @@ lzo1x_1_do_compress(const unsigned char *in, size_t in_len, m_len += 8; v = get_unaligned((const u64 *) (ip + m_len)) ^ get_unaligned((const u64 *) (m_pos + m_len)); - if (unlikely(ip + m_len >= ip_end)) + if (unlikely(OVERFLOW_ADD_CHECK(ip, m_len) + || (ip + m_len >= ip_end))) goto m_len_done; } while (v == 0); } @@ -124,7 +130,8 @@ lzo1x_1_do_compress(const unsigned char *in, size_t in_len, m_len += 4;
[PATCH] sound/soc/rockchip: add RT5640 codec option
The Firefly-RK3399 DeviceTree (`arch/arm64/boot/dts/rockchip/rk3399-firefly.dts`) defines a `simple-audio-card` device which selects a `realtek,rt5640` codec. This codec however is inaccessible in the kernel configuration (`SND_SOC_RT5640`) and thus cannot be used. This patch adds a new configuration option named `SND_SOC_ROCKCHIP_RT5640` which selects `SND_SOC_RT5640` and `SND_SIMPLE_CARD`, but does nothing else. It enables `SND_SIMPLE_CARD`, because that's what the Firefly has. I'm not sure if there are Rockchip products which need a different sound card driver with RT5640. Signed-off-by: Max Kellermann --- sound/soc/rockchip/Kconfig | 10 ++ 1 file changed, 10 insertions(+) diff --git a/sound/soc/rockchip/Kconfig b/sound/soc/rockchip/Kconfig index 957046ac6c8c..ac2e27043107 100644 --- a/sound/soc/rockchip/Kconfig +++ b/sound/soc/rockchip/Kconfig @@ -42,6 +42,16 @@ config SND_SOC_ROCKCHIP_MAX98090 Say Y or M here if you want to add support for SoC audio on Rockchip boards using the MAX98090 codec, such as Veyron. +config SND_SOC_ROCKCHIP_RT5640 + tristate "ASoC support for Rockchip boards using a RT5640 codec" + depends on SND_SOC_ROCKCHIP + select SND_SOC_ROCKCHIP_I2S + select SND_SOC_RT5640 + select SND_SIMPLE_CARD + help + Say Y or M here if you want to add support for SoC audio on Rockchip + boards using the RT5640 codec, such as Firefly-RK3399. + config SND_SOC_ROCKCHIP_RT5645 tristate "ASoC support for Rockchip boards using a RT5645/RT5650 codec" depends on SND_SOC_ROCKCHIP && I2C && GPIOLIB && CLKDEV_LOOKUP -- 2.19.2
[PATCH] sound/soc/rockchip: add RT5640 codec option
The Firefly-RK3399 DeviceTree (`arch/arm64/boot/dts/rockchip/rk3399-firefly.dts`) defines a `simple-audio-card` device which selects a `realtek,rt5640` codec. This codec however is inaccessible in the kernel configuration (`SND_SOC_RT5640`) and thus cannot be used. This patch adds a new configuration option named `SND_SOC_ROCKCHIP_RT5640` which selects `SND_SOC_RT5640` and `SND_SIMPLE_CARD`, but does nothing else. It enables `SND_SIMPLE_CARD`, because that's what the Firefly has. I'm not sure if there are Rockchip products which need a different sound card driver with RT5640. Signed-off-by: Max Kellermann --- sound/soc/rockchip/Kconfig | 10 ++ 1 file changed, 10 insertions(+) diff --git a/sound/soc/rockchip/Kconfig b/sound/soc/rockchip/Kconfig index 957046ac6c8c..ac2e27043107 100644 --- a/sound/soc/rockchip/Kconfig +++ b/sound/soc/rockchip/Kconfig @@ -42,6 +42,16 @@ config SND_SOC_ROCKCHIP_MAX98090 Say Y or M here if you want to add support for SoC audio on Rockchip boards using the MAX98090 codec, such as Veyron. +config SND_SOC_ROCKCHIP_RT5640 + tristate "ASoC support for Rockchip boards using a RT5640 codec" + depends on SND_SOC_ROCKCHIP + select SND_SOC_ROCKCHIP_I2S + select SND_SOC_RT5640 + select SND_SIMPLE_CARD + help + Say Y or M here if you want to add support for SoC audio on Rockchip + boards using the RT5640 codec, such as Firefly-RK3399. + config SND_SOC_ROCKCHIP_RT5645 tristate "ASoC support for Rockchip boards using a RT5645/RT5650 codec" depends on SND_SOC_ROCKCHIP && I2C && GPIOLIB && CLKDEV_LOOKUP -- 2.19.2
[PATCH v3 1/3] perf annotate: Compute average IPC and IPC coverage per symbol
Add support to perf report annotate view or perf annotate --stdio2 to
aggregate the IPC derived from timed LBRs per symbol. We compute the
average IPC and the IPC coverage percentage.
For example,
$ perf annotate --stdio2
Percent IPC Cycle (Average IPC: 2.30, IPC Coverage: 54.8%)
Disassembly of section .text:
0003aac0 :
8.32 3.28 sub$0x18,%rsp
3.28 mov$0x1,%esi
3.28 xor%eax,%eax
3.28 cmpl
$0x0,argp_program_version_hook@@GLIBC_2.2.5+0x1e0
11.57 3.28 1 ↓ je 20
lock cmpxchg %esi,__abort_msg@@GLIBC_PRIVATE+0x8a0
↓ jne29
↓ jmp43
11.57 1.1020: cmpxchg %esi,__abort_msg@@GLIBC_PRIVATE+0x8a0
0.00 1.10 1 ↓ je 43
29: lea__abort_msg@@GLIBC_PRIVATE+0x8a0,%rdi
sub$0x80,%rsp
→ callq __lll_lock_wait_private
add$0x80,%rsp
0.00 3.0043: lea__ctype_b@GLIBC_2.2.5+0x38,%rdi
3.00 lea0xc(%rsp),%rsi
8.49 3.00 1 → callq __random_r
7.91 1.94 cmpl
$0x0,argp_program_version_hook@@GLIBC_2.2.5+0x1e0
0.00 1.94 1 ↓ je 68
lock decl __abort_msg@@GLIBC_PRIVATE+0x8a0
↓ jne70
↓ jmp8a
0.00 2.0068: decl __abort_msg@@GLIBC_PRIVATE+0x8a0
21.56 2.00 1 ↓ je 8a
70: lea__abort_msg@@GLIBC_PRIVATE+0x8a0,%rdi
sub$0x80,%rsp
→ callq __lll_unlock_wake_private
add$0x80,%rsp
21.56 2.908a: movslq 0xc(%rsp),%rax
2.90 add$0x18,%rsp
9.03 2.90 1 ← retq
It shows for this symbol the average IPC is 2.30 and the IPC coverage
is 54.8%.
Signed-off-by: Jin Yao
---
tools/perf/util/annotate.c | 41 ++---
tools/perf/util/annotate.h | 5 +
2 files changed, 43 insertions(+), 3 deletions(-)
diff --git a/tools/perf/util/annotate.c b/tools/perf/util/annotate.c
index 6936daf..4b2b1b0 100644
--- a/tools/perf/util/annotate.c
+++ b/tools/perf/util/annotate.c
@@ -1000,6 +1000,7 @@ static unsigned annotation__count_insn(struct annotation
*notes, u64 start, u64
static void annotation__count_and_fill(struct annotation *notes, u64 start,
u64 end, struct cyc_hist *ch)
{
unsigned n_insn;
+ unsigned int cover_insn = 0;
u64 offset;
n_insn = annotation__count_insn(notes, start, end);
@@ -1013,21 +1014,34 @@ static void annotation__count_and_fill(struct
annotation *notes, u64 start, u64
for (offset = start; offset <= end; offset++) {
struct annotation_line *al = notes->offsets[offset];
- if (al)
+ if (al && al->ipc == 0.0) {
al->ipc = ipc;
+ cover_insn++;
+ }
+ }
+
+ if (cover_insn) {
+ notes->hit_cycles += ch->cycles;
+ notes->hit_insn += n_insn * ch->num;
+ notes->cover_insn += cover_insn;
}
}
}
void annotation__compute_ipc(struct annotation *notes, size_t size)
{
- u64 offset;
+ s64 offset;
if (!notes->src || !notes->src->cycles_hist)
return;
+ notes->total_insn = annotation__count_insn(notes, 0, size - 1);
+ notes->hit_cycles = 0;
+ notes->hit_insn = 0;
+ notes->cover_insn = 0;
+
pthread_mutex_lock(>lock);
- for (offset = 0; offset < size; ++offset) {
+ for (offset = size - 1; offset >= 0; --offset) {
struct cyc_hist *ch;
ch = >src->cycles_hist[offset];
@@ -2563,6 +2577,22 @@ static void disasm_line__write(struct disasm_line *dl,
struct annotation *notes,
disasm_line__scnprintf(dl, bf, size, !notes->options->use_offset);
}
+static void ipc_coverage_string(char *bf, int size, struct annotation *notes)
+{
+ double ipc = 0.0, coverage = 0.0;
+
+ if (notes->hit_cycles)
+ ipc = notes->hit_insn / ((double)notes->hit_cycles);
+
+ if (notes->total_insn) {
+ coverage = notes->cover_insn * 100.0 /
+ ((double)notes->total_insn);
+ }
+
+ scnprintf(bf, size, "(Average IPC: %.2f, IPC Coverage: %.1f%%)",
+ ipc, coverage);
+}
+
static void __annotation_line__write(struct annotation_line *al, struct
annotation *notes,
bool first_line, bool current_entry, bool
change_color, int width,
void *obj,
[PATCH v3 1/3] perf annotate: Compute average IPC and IPC coverage per symbol
Add support to perf report annotate view or perf annotate --stdio2 to
aggregate the IPC derived from timed LBRs per symbol. We compute the
average IPC and the IPC coverage percentage.
For example,
$ perf annotate --stdio2
Percent IPC Cycle (Average IPC: 2.30, IPC Coverage: 54.8%)
Disassembly of section .text:
0003aac0 :
8.32 3.28 sub$0x18,%rsp
3.28 mov$0x1,%esi
3.28 xor%eax,%eax
3.28 cmpl
$0x0,argp_program_version_hook@@GLIBC_2.2.5+0x1e0
11.57 3.28 1 ↓ je 20
lock cmpxchg %esi,__abort_msg@@GLIBC_PRIVATE+0x8a0
↓ jne29
↓ jmp43
11.57 1.1020: cmpxchg %esi,__abort_msg@@GLIBC_PRIVATE+0x8a0
0.00 1.10 1 ↓ je 43
29: lea__abort_msg@@GLIBC_PRIVATE+0x8a0,%rdi
sub$0x80,%rsp
→ callq __lll_lock_wait_private
add$0x80,%rsp
0.00 3.0043: lea__ctype_b@GLIBC_2.2.5+0x38,%rdi
3.00 lea0xc(%rsp),%rsi
8.49 3.00 1 → callq __random_r
7.91 1.94 cmpl
$0x0,argp_program_version_hook@@GLIBC_2.2.5+0x1e0
0.00 1.94 1 ↓ je 68
lock decl __abort_msg@@GLIBC_PRIVATE+0x8a0
↓ jne70
↓ jmp8a
0.00 2.0068: decl __abort_msg@@GLIBC_PRIVATE+0x8a0
21.56 2.00 1 ↓ je 8a
70: lea__abort_msg@@GLIBC_PRIVATE+0x8a0,%rdi
sub$0x80,%rsp
→ callq __lll_unlock_wake_private
add$0x80,%rsp
21.56 2.908a: movslq 0xc(%rsp),%rax
2.90 add$0x18,%rsp
9.03 2.90 1 ← retq
It shows for this symbol the average IPC is 2.30 and the IPC coverage
is 54.8%.
Signed-off-by: Jin Yao
---
tools/perf/util/annotate.c | 41 ++---
tools/perf/util/annotate.h | 5 +
2 files changed, 43 insertions(+), 3 deletions(-)
diff --git a/tools/perf/util/annotate.c b/tools/perf/util/annotate.c
index 6936daf..4b2b1b0 100644
--- a/tools/perf/util/annotate.c
+++ b/tools/perf/util/annotate.c
@@ -1000,6 +1000,7 @@ static unsigned annotation__count_insn(struct annotation
*notes, u64 start, u64
static void annotation__count_and_fill(struct annotation *notes, u64 start,
u64 end, struct cyc_hist *ch)
{
unsigned n_insn;
+ unsigned int cover_insn = 0;
u64 offset;
n_insn = annotation__count_insn(notes, start, end);
@@ -1013,21 +1014,34 @@ static void annotation__count_and_fill(struct
annotation *notes, u64 start, u64
for (offset = start; offset <= end; offset++) {
struct annotation_line *al = notes->offsets[offset];
- if (al)
+ if (al && al->ipc == 0.0) {
al->ipc = ipc;
+ cover_insn++;
+ }
+ }
+
+ if (cover_insn) {
+ notes->hit_cycles += ch->cycles;
+ notes->hit_insn += n_insn * ch->num;
+ notes->cover_insn += cover_insn;
}
}
}
void annotation__compute_ipc(struct annotation *notes, size_t size)
{
- u64 offset;
+ s64 offset;
if (!notes->src || !notes->src->cycles_hist)
return;
+ notes->total_insn = annotation__count_insn(notes, 0, size - 1);
+ notes->hit_cycles = 0;
+ notes->hit_insn = 0;
+ notes->cover_insn = 0;
+
pthread_mutex_lock(>lock);
- for (offset = 0; offset < size; ++offset) {
+ for (offset = size - 1; offset >= 0; --offset) {
struct cyc_hist *ch;
ch = >src->cycles_hist[offset];
@@ -2563,6 +2577,22 @@ static void disasm_line__write(struct disasm_line *dl,
struct annotation *notes,
disasm_line__scnprintf(dl, bf, size, !notes->options->use_offset);
}
+static void ipc_coverage_string(char *bf, int size, struct annotation *notes)
+{
+ double ipc = 0.0, coverage = 0.0;
+
+ if (notes->hit_cycles)
+ ipc = notes->hit_insn / ((double)notes->hit_cycles);
+
+ if (notes->total_insn) {
+ coverage = notes->cover_insn * 100.0 /
+ ((double)notes->total_insn);
+ }
+
+ scnprintf(bf, size, "(Average IPC: %.2f, IPC Coverage: %.1f%%)",
+ ipc, coverage);
+}
+
static void __annotation_line__write(struct annotation_line *al, struct
annotation *notes,
bool first_line, bool current_entry, bool
change_color, int width,
void *obj,
[PATCH v3 3/3] perf report: Display average IPC and IPC coverage per symbol
Support displaying the average IPC and IPC coverage per symbol
in perf report TUI and stdio modes.
For example,
$ perf record -b ...
$ perf report -s symbol
Overhead Symbol IPC [IPC Coverage]
39.60% [.] __random 2.30 [ 54.8%]
18.02% [.] main 0.43 [ 54.3%]
14.21% [.] compute_flag 2.29 [100.0%]
14.16% [.] rand 0.36 [100.0%]
7.06% [.] __random_r 2.57 [ 70.5%]
6.85% [.] rand@plt 0.00 [ 0.0%]
Jiri Olsa provides the patch to support the
stdio mode. I merge Jiri's code in this patch.
$ perf report -s symbol --stdio
# Overhead Symbol IPC [IPC Coverage]
# ...
#
39.60% [.] __random 2.30 [ 54.8%]
18.02% [.] main 0.43 [ 54.3%]
14.21% [.] compute_flag 2.29 [100.0%]
14.16% [.] rand 0.36 [100.0%]
7.06% [.] __random_r 2.57 [ 70.5%]
6.85% [.] rand@plt 0.00 [ 0.0%]
0.02% [k] run_timer_softirq 1.60 [ 57.2%]
The columns "IPC" and "[IPC Coverage]" are automatically enabled
when the sort-key "symbol" is specified. If the perf.data doesn't
contain timed LBR information, columns are filled with "-".
For example,
# Overhead Symbol IPC [IPC Coverage]
# ...
#
46.57% [.] main - -
17.60% [.] rand - -
15.84% [.] __random_r - -
11.90% [.] __random - -
6.50% [.] compute_flag - -
1.59% [.] rand@plt - -
0.00% [.] _dl_relocate_object - -
0.00% [k] tlb_flush_mmu- -
0.00% [k] perf_event_mmap - -
0.00% [k] native_sched_clock - -
0.00% [k] intel_pmu_handle_irq_v4 - -
0.00% [k] native_write_msr - -
v3:
---
Removed the sortkey 'ipc' from command-line. The columns "IPC"
and "[IPC Coverage]" are automatically enabled when "symbol"
is specified.
v2:
---
Merge in Jiri's patch to support stdio mode
Signed-off-by: Jin Yao
---
tools/perf/builtin-report.c | 26 ---
tools/perf/util/hist.h | 1 +
tools/perf/util/sort.c | 61 +
tools/perf/util/sort.h | 2 ++
4 files changed, 87 insertions(+), 3 deletions(-)
diff --git a/tools/perf/builtin-report.c b/tools/perf/builtin-report.c
index 257c9c1..4958095 100644
--- a/tools/perf/builtin-report.c
+++ b/tools/perf/builtin-report.c
@@ -85,6 +85,7 @@ struct report {
int socket_filter;
DECLARE_BITMAP(cpu_bitmap, MAX_NR_CPUS);
struct branch_type_stat brtype_stat;
+ boolsymbol_ipc;
};
static int report__config(const char *var, const char *value, void *cb)
@@ -129,7 +130,7 @@ static int hist_iter__report_callback(struct
hist_entry_iter *iter,
struct mem_info *mi;
struct branch_info *bi;
- if (!ui__has_annotation())
+ if (!ui__has_annotation() && !rep->symbol_ipc)
return 0;
hist__account_cycles(sample->branch_stack, al, sample,
@@ -174,7 +175,7 @@ static int hist_iter__branch_callback(struct
hist_entry_iter *iter,
struct perf_evsel *evsel = iter->evsel;
int err;
- if (!ui__has_annotation())
+ if (!ui__has_annotation() && !rep->symbol_ipc)
return 0;
hist__account_cycles(sample->branch_stack, al, sample,
@@ -1133,6 +1134,7 @@ int cmd_report(int argc, const char **argv)
.mode = PERF_DATA_MODE_READ,
};
int ret = hists__init();
+ char sort_tmp[128];
if (ret < 0)
return ret;
@@ -1284,6 +1286,24 @@ int cmd_report(int argc, const char **argv)
else
use_browser = 0;
+ if (sort_order && strstr(sort_order, "ipc")) {
+ parse_options_usage(report_usage, options, "s", 1);
+ goto error;
+ }
+
+ if (sort_order && strstr(sort_order, "symbol")) {
+ if (sort__mode == SORT_MODE__BRANCH) {
+ snprintf(sort_tmp, sizeof(sort_tmp), "%s,%s",
+sort_order, "ipc_lbr");
+ report.symbol_ipc = true;
+ } else {
+ snprintf(sort_tmp, sizeof(sort_tmp), "%s,%s",
+sort_order, "ipc_null");
+ }
+
+ sort_order = sort_tmp;
+ }
+
if (setup_sorting(session->evlist) < 0) {
if (sort_order)
parse_options_usage(report_usage,
[PATCH v3 3/3] perf report: Display average IPC and IPC coverage per symbol
Support displaying the average IPC and IPC coverage per symbol
in perf report TUI and stdio modes.
For example,
$ perf record -b ...
$ perf report -s symbol
Overhead Symbol IPC [IPC Coverage]
39.60% [.] __random 2.30 [ 54.8%]
18.02% [.] main 0.43 [ 54.3%]
14.21% [.] compute_flag 2.29 [100.0%]
14.16% [.] rand 0.36 [100.0%]
7.06% [.] __random_r 2.57 [ 70.5%]
6.85% [.] rand@plt 0.00 [ 0.0%]
Jiri Olsa provides the patch to support the
stdio mode. I merge Jiri's code in this patch.
$ perf report -s symbol --stdio
# Overhead Symbol IPC [IPC Coverage]
# ...
#
39.60% [.] __random 2.30 [ 54.8%]
18.02% [.] main 0.43 [ 54.3%]
14.21% [.] compute_flag 2.29 [100.0%]
14.16% [.] rand 0.36 [100.0%]
7.06% [.] __random_r 2.57 [ 70.5%]
6.85% [.] rand@plt 0.00 [ 0.0%]
0.02% [k] run_timer_softirq 1.60 [ 57.2%]
The columns "IPC" and "[IPC Coverage]" are automatically enabled
when the sort-key "symbol" is specified. If the perf.data doesn't
contain timed LBR information, columns are filled with "-".
For example,
# Overhead Symbol IPC [IPC Coverage]
# ...
#
46.57% [.] main - -
17.60% [.] rand - -
15.84% [.] __random_r - -
11.90% [.] __random - -
6.50% [.] compute_flag - -
1.59% [.] rand@plt - -
0.00% [.] _dl_relocate_object - -
0.00% [k] tlb_flush_mmu- -
0.00% [k] perf_event_mmap - -
0.00% [k] native_sched_clock - -
0.00% [k] intel_pmu_handle_irq_v4 - -
0.00% [k] native_write_msr - -
v3:
---
Removed the sortkey 'ipc' from command-line. The columns "IPC"
and "[IPC Coverage]" are automatically enabled when "symbol"
is specified.
v2:
---
Merge in Jiri's patch to support stdio mode
Signed-off-by: Jin Yao
---
tools/perf/builtin-report.c | 26 ---
tools/perf/util/hist.h | 1 +
tools/perf/util/sort.c | 61 +
tools/perf/util/sort.h | 2 ++
4 files changed, 87 insertions(+), 3 deletions(-)
diff --git a/tools/perf/builtin-report.c b/tools/perf/builtin-report.c
index 257c9c1..4958095 100644
--- a/tools/perf/builtin-report.c
+++ b/tools/perf/builtin-report.c
@@ -85,6 +85,7 @@ struct report {
int socket_filter;
DECLARE_BITMAP(cpu_bitmap, MAX_NR_CPUS);
struct branch_type_stat brtype_stat;
+ boolsymbol_ipc;
};
static int report__config(const char *var, const char *value, void *cb)
@@ -129,7 +130,7 @@ static int hist_iter__report_callback(struct
hist_entry_iter *iter,
struct mem_info *mi;
struct branch_info *bi;
- if (!ui__has_annotation())
+ if (!ui__has_annotation() && !rep->symbol_ipc)
return 0;
hist__account_cycles(sample->branch_stack, al, sample,
@@ -174,7 +175,7 @@ static int hist_iter__branch_callback(struct
hist_entry_iter *iter,
struct perf_evsel *evsel = iter->evsel;
int err;
- if (!ui__has_annotation())
+ if (!ui__has_annotation() && !rep->symbol_ipc)
return 0;
hist__account_cycles(sample->branch_stack, al, sample,
@@ -1133,6 +1134,7 @@ int cmd_report(int argc, const char **argv)
.mode = PERF_DATA_MODE_READ,
};
int ret = hists__init();
+ char sort_tmp[128];
if (ret < 0)
return ret;
@@ -1284,6 +1286,24 @@ int cmd_report(int argc, const char **argv)
else
use_browser = 0;
+ if (sort_order && strstr(sort_order, "ipc")) {
+ parse_options_usage(report_usage, options, "s", 1);
+ goto error;
+ }
+
+ if (sort_order && strstr(sort_order, "symbol")) {
+ if (sort__mode == SORT_MODE__BRANCH) {
+ snprintf(sort_tmp, sizeof(sort_tmp), "%s,%s",
+sort_order, "ipc_lbr");
+ report.symbol_ipc = true;
+ } else {
+ snprintf(sort_tmp, sizeof(sort_tmp), "%s,%s",
+sort_order, "ipc_null");
+ }
+
+ sort_order = sort_tmp;
+ }
+
if (setup_sorting(session->evlist) < 0) {
if (sort_order)
parse_options_usage(report_usage,
[PATCH v3 2/3] perf annotate: Create a annotate2 flag in struct symbol
We often use the symbol__annotate2() to annotate a specified symbol.
While annotating may take some time, so in order to avoid annotating
the same symbol repeatedly, the patch creates a new flag to indicate
the symbol has been annotated.
Signed-off-by: Jin Yao
---
tools/perf/util/annotate.c | 1 +
tools/perf/util/symbol.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/tools/perf/util/annotate.c b/tools/perf/util/annotate.c
index 4b2b1b0..f69d8e1 100644
--- a/tools/perf/util/annotate.c
+++ b/tools/perf/util/annotate.c
@@ -2798,6 +2798,7 @@ int symbol__annotate2(struct symbol *sym, struct map
*map, struct perf_evsel *ev
notes->nr_events = nr_pcnt;
annotation__update_column_widths(notes);
+ sym->annotate2 = true;
return 0;
diff --git a/tools/perf/util/symbol.h b/tools/perf/util/symbol.h
index d026d21..14d9d43 100644
--- a/tools/perf/util/symbol.h
+++ b/tools/perf/util/symbol.h
@@ -63,6 +63,7 @@ struct symbol {
u8 ignore:1;
u8 inlined:1;
u8 arch_sym;
+ boolannotate2;
charname[0];
};
--
2.7.4
[PATCH v3 0/3] perf report/annotate: Support average IPC and IPC coverage for function
Add supporting of displaying the average IPC and IPC coverage
percentage per function.
For example,
$ perf record -b ...
$ perf report -s symbol or
perf report -s symbol --stdio
Overhead Symbol IPC [IPC Coverage]
39.60% [.] __random 2.30 [ 54.8%]
18.02% [.] main 0.43 [ 54.3%]
14.21% [.] compute_flag 2.29 [100.0%]
14.16% [.] rand 0.36 [100.0%]
7.06% [.] __random_r 2.57 [ 70.5%]
6.85% [.] rand@plt 0.00 [ 0.0%]
...
$ perf annotate --stdio2
Percent IPC Cycle (Average IPC: 2.30, IPC Coverage: 54.8%)
Disassembly of section .text:
0003aac0 :
8.32 3.28 sub$0x18,%rsp
3.28 mov$0x1,%esi
3.28 xor%eax,%eax
3.28 cmpl
$0x0,argp_program_version_hook@@GLIBC_2.2.5+0x1e0
11.57 3.28 1 ↓ je 20
lock cmpxchg %esi,__abort_msg@@GLIBC_PRIVATE+0x8a0
↓ jne29
↓ jmp43
11.57 1.1020: cmpxchg %esi,__abort_msg@@GLIBC_PRIVATE+0x8a0
...
v3:
---
Remove the sortkey "ipc" from command-line. The columns "IPC"
and "[IPC Coverage]" are automatically enabled when "symbol"
is specified.
Patch "perf report: Display average IPC and IPC coverage per symbol"
is impacted.
v2:
---
1. Merge in Jiri's patch to support stdio mode
2. Add a new patch "perf annotate: Create a annotate2 flag
in struct symbol" which records if the symbol has been
annotated yet.
3. Minor update such as adding { } for multiline code in 'if'
condition.
Jin Yao (3):
perf annotate: Compute average IPC and IPC coverage per symbol
perf annotate: Create a annotate2 flag in struct symbol
perf report: Display average IPC and IPC coverage per symbol
tools/perf/builtin-report.c | 26 ---
tools/perf/util/annotate.c | 42 ---
tools/perf/util/annotate.h | 5
tools/perf/util/hist.h | 1 +
tools/perf/util/sort.c | 61 +
tools/perf/util/sort.h | 2 ++
tools/perf/util/symbol.h| 1 +
7 files changed, 132 insertions(+), 6 deletions(-)
--
2.7.4
[PATCH v3 2/3] perf annotate: Create a annotate2 flag in struct symbol
We often use the symbol__annotate2() to annotate a specified symbol.
While annotating may take some time, so in order to avoid annotating
the same symbol repeatedly, the patch creates a new flag to indicate
the symbol has been annotated.
Signed-off-by: Jin Yao
---
tools/perf/util/annotate.c | 1 +
tools/perf/util/symbol.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/tools/perf/util/annotate.c b/tools/perf/util/annotate.c
index 4b2b1b0..f69d8e1 100644
--- a/tools/perf/util/annotate.c
+++ b/tools/perf/util/annotate.c
@@ -2798,6 +2798,7 @@ int symbol__annotate2(struct symbol *sym, struct map
*map, struct perf_evsel *ev
notes->nr_events = nr_pcnt;
annotation__update_column_widths(notes);
+ sym->annotate2 = true;
return 0;
diff --git a/tools/perf/util/symbol.h b/tools/perf/util/symbol.h
index d026d21..14d9d43 100644
--- a/tools/perf/util/symbol.h
+++ b/tools/perf/util/symbol.h
@@ -63,6 +63,7 @@ struct symbol {
u8 ignore:1;
u8 inlined:1;
u8 arch_sym;
+ boolannotate2;
charname[0];
};
--
2.7.4
[PATCH v3 0/3] perf report/annotate: Support average IPC and IPC coverage for function
Add supporting of displaying the average IPC and IPC coverage
percentage per function.
For example,
$ perf record -b ...
$ perf report -s symbol or
perf report -s symbol --stdio
Overhead Symbol IPC [IPC Coverage]
39.60% [.] __random 2.30 [ 54.8%]
18.02% [.] main 0.43 [ 54.3%]
14.21% [.] compute_flag 2.29 [100.0%]
14.16% [.] rand 0.36 [100.0%]
7.06% [.] __random_r 2.57 [ 70.5%]
6.85% [.] rand@plt 0.00 [ 0.0%]
...
$ perf annotate --stdio2
Percent IPC Cycle (Average IPC: 2.30, IPC Coverage: 54.8%)
Disassembly of section .text:
0003aac0 :
8.32 3.28 sub$0x18,%rsp
3.28 mov$0x1,%esi
3.28 xor%eax,%eax
3.28 cmpl
$0x0,argp_program_version_hook@@GLIBC_2.2.5+0x1e0
11.57 3.28 1 ↓ je 20
lock cmpxchg %esi,__abort_msg@@GLIBC_PRIVATE+0x8a0
↓ jne29
↓ jmp43
11.57 1.1020: cmpxchg %esi,__abort_msg@@GLIBC_PRIVATE+0x8a0
...
v3:
---
Remove the sortkey "ipc" from command-line. The columns "IPC"
and "[IPC Coverage]" are automatically enabled when "symbol"
is specified.
Patch "perf report: Display average IPC and IPC coverage per symbol"
is impacted.
v2:
---
1. Merge in Jiri's patch to support stdio mode
2. Add a new patch "perf annotate: Create a annotate2 flag
in struct symbol" which records if the symbol has been
annotated yet.
3. Minor update such as adding { } for multiline code in 'if'
condition.
Jin Yao (3):
perf annotate: Compute average IPC and IPC coverage per symbol
perf annotate: Create a annotate2 flag in struct symbol
perf report: Display average IPC and IPC coverage per symbol
tools/perf/builtin-report.c | 26 ---
tools/perf/util/annotate.c | 42 ---
tools/perf/util/annotate.h | 5
tools/perf/util/hist.h | 1 +
tools/perf/util/sort.c | 61 +
tools/perf/util/sort.h | 2 ++
tools/perf/util/symbol.h| 1 +
7 files changed, 132 insertions(+), 6 deletions(-)
--
2.7.4
Re: [PATCH] sis5513: fix potential use after free
On Wed, Nov 28, 2018 at 08:55:26AM +0800, Pan Bian wrote: > The function sis_find_family drops lpc_bridge reference via pci_dev_put, > however, after that, field lpc_bridge->revision is read. This may result > in a use after free bug. The patch moves the put operation after the > condition check. > > Signed-off-by: Pan Bian Looks good, Reviewed-by: Christoph Hellwig
Re: [PATCH] ata: read ->revision before dropping pci_device reference
Looks good, Reviewed-by: Christoph Hellwig
Re: [PATCH] sis5513: fix potential use after free
On Wed, Nov 28, 2018 at 08:55:26AM +0800, Pan Bian wrote: > The function sis_find_family drops lpc_bridge reference via pci_dev_put, > however, after that, field lpc_bridge->revision is read. This may result > in a use after free bug. The patch moves the put operation after the > condition check. > > Signed-off-by: Pan Bian Looks good, Reviewed-by: Christoph Hellwig
Re: [PATCH] ata: read ->revision before dropping pci_device reference
Looks good, Reviewed-by: Christoph Hellwig
Re: [PATCH] Little memset_explicit optimisation
On Wed, Nov 28, 2018 at 06:32:27AM +, David CARLIER wrote: > Bad entrance with bad idea I m afraid :-) sorry for the noise. We all start somewhere, no worries :) -- Cheers, Joey Pabalinas signature.asc Description: PGP signature
Re: [PATCH] Little memset_explicit optimisation
On Wed, Nov 28, 2018 at 06:32:27AM +, David CARLIER wrote: > Bad entrance with bad idea I m afraid :-) sorry for the noise. We all start somewhere, no worries :) -- Cheers, Joey Pabalinas signature.asc Description: PGP signature
Re: [PATCH] arm64: dts: qcom: sdm845-mtp: Mark protected gcc clocks
Quoting Bjorn Andersson (2018-11-21 23:30:43) > On Wed 21 Nov 01:01 PST 2018, Stephen Boyd wrote: > > > Quoting Bjorn Andersson (2018-11-05 21:50:13) > > > As of v4.20-rc1 probing the GCC driver on a SDM845 device with the > > > standard security implementation causes an access violation and an > > > immediate system restart. Use the protected-clocks property to mark the > > > offending clocks protected for the MTP, in order to allow it to boot. > > > > > > Cc: Stephen Boyd > > > Signed-off-by: Bjorn Andersson > > > --- > > > > > > This depends on the acceptance of > > > https://lore.kernel.org/lkml/20181105194011.43770-1-swb...@chromium.org/ > > > > Do you need me to merge this into clk-fixes so that Andy can send this > > up for v4.20 final? I thought you may have other boot blocking issues so > > this wouldn't be a critical fix. > > > > We resolved the gpio-related issues, so iirc this is the only other item > preventing the MTP from booting. So yes please. > > Unless you enable USB support, because configuring the first USB > controller in host currently crashes the device - I've not yet found the > cause for this though. > Ok let me do the necessary shuffling to get this all lined up for merging later this week, including this dts patch.
Re: [PATCH] arm64: dts: qcom: sdm845-mtp: Mark protected gcc clocks
Quoting Bjorn Andersson (2018-11-21 23:30:43) > On Wed 21 Nov 01:01 PST 2018, Stephen Boyd wrote: > > > Quoting Bjorn Andersson (2018-11-05 21:50:13) > > > As of v4.20-rc1 probing the GCC driver on a SDM845 device with the > > > standard security implementation causes an access violation and an > > > immediate system restart. Use the protected-clocks property to mark the > > > offending clocks protected for the MTP, in order to allow it to boot. > > > > > > Cc: Stephen Boyd > > > Signed-off-by: Bjorn Andersson > > > --- > > > > > > This depends on the acceptance of > > > https://lore.kernel.org/lkml/20181105194011.43770-1-swb...@chromium.org/ > > > > Do you need me to merge this into clk-fixes so that Andy can send this > > up for v4.20 final? I thought you may have other boot blocking issues so > > this wouldn't be a critical fix. > > > > We resolved the gpio-related issues, so iirc this is the only other item > preventing the MTP from booting. So yes please. > > Unless you enable USB support, because configuring the first USB > controller in host currently crashes the device - I've not yet found the > cause for this though. > Ok let me do the necessary shuffling to get this all lined up for merging later this week, including this dts patch.
Re: [PATCH] Little memset_explicit optimisation
Bad entrance with bad idea I m afraid :-) sorry for the noise.
Re: [PATCH] Little memset_explicit optimisation
Bad entrance with bad idea I m afraid :-) sorry for the noise.
Re: [LKP] [mm] ac5b2c1891: vm-scalability.throughput -61.3% regression
On Tue 27-11-18 14:50:05, Linus Torvalds wrote: > On Tue, Nov 27, 2018 at 12:57 PM Andrea Arcangeli wrote: > > > > This difference can only happen with defrag=always, and that's not the > > current upstream default. > > Ok, thanks. That makes it a bit less critical. > > > That MADV_HUGEPAGE causes flights with NUMA balancing is not great > > indeed, qemu needs NUMA locality too, but then the badness caused by > > __GFP_THISNODE was a larger regression in the worst case for qemu. > [...] > > So the short term alternative again would be the alternate patch that > > does __GFP_THISNODE|GFP_ONLY_COMPACT appended below. > > Sounds like we should probably do this. Particularly since Vlastimil > pointed out that we'd otherwise have issues with the back-port for 4.4 > where that "defrag=always" was the default. > > The patch doesn't look horrible, and it directly addresses this > particular issue. > > Is there some reason we wouldn't want to do it? We have discussed it previously and the biggest concern was that it introduces a new GFP flag with a very weird and one-off semantic. Anytime we have done that in the past it basically kicked back because people have started to use such a flag and any further changes were really hard to do. So I would really prefer some more systematic solution. And I believe we can do that here. MADV_HUGEPAGE (resp. THP always enabled) has gained a local memory policy with the patch which got effectively reverted. I do believe that conflating "I want THP" with "I want them local" is just wrong from the API point of view. There are different classes of usecases which obviously disagree on the later. So I believe that a long term solution should introduce a MPOL_NODE_RECLAIM kind of policy. It would effectively reclaim local nodes (within NODE_RECLAIM distance) before falling to other nodes. Apart from that we need a less disruptive reclaim driven by compaction and Mel is already working on that AFAIK. -- Michal Hocko SUSE Labs
Re: [LKP] [mm] ac5b2c1891: vm-scalability.throughput -61.3% regression
On Tue 27-11-18 14:50:05, Linus Torvalds wrote: > On Tue, Nov 27, 2018 at 12:57 PM Andrea Arcangeli wrote: > > > > This difference can only happen with defrag=always, and that's not the > > current upstream default. > > Ok, thanks. That makes it a bit less critical. > > > That MADV_HUGEPAGE causes flights with NUMA balancing is not great > > indeed, qemu needs NUMA locality too, but then the badness caused by > > __GFP_THISNODE was a larger regression in the worst case for qemu. > [...] > > So the short term alternative again would be the alternate patch that > > does __GFP_THISNODE|GFP_ONLY_COMPACT appended below. > > Sounds like we should probably do this. Particularly since Vlastimil > pointed out that we'd otherwise have issues with the back-port for 4.4 > where that "defrag=always" was the default. > > The patch doesn't look horrible, and it directly addresses this > particular issue. > > Is there some reason we wouldn't want to do it? We have discussed it previously and the biggest concern was that it introduces a new GFP flag with a very weird and one-off semantic. Anytime we have done that in the past it basically kicked back because people have started to use such a flag and any further changes were really hard to do. So I would really prefer some more systematic solution. And I believe we can do that here. MADV_HUGEPAGE (resp. THP always enabled) has gained a local memory policy with the patch which got effectively reverted. I do believe that conflating "I want THP" with "I want them local" is just wrong from the API point of view. There are different classes of usecases which obviously disagree on the later. So I believe that a long term solution should introduce a MPOL_NODE_RECLAIM kind of policy. It would effectively reclaim local nodes (within NODE_RECLAIM distance) before falling to other nodes. Apart from that we need a less disruptive reclaim driven by compaction and Mel is already working on that AFAIK. -- Michal Hocko SUSE Labs
RE: [PATCH] ALSA: pcm: Fix starvation on down_write_nonblock()
> > > > Hrm, converting unconditionally with msleep() looks too drastic. > > Yes, it looks drastic. But, IMHO, I can't say busy-spin is not non-drastic. Fix typo in this comment: I can't say busy-spin is not drastic. Thanks Chanho
RE: [PATCH] ALSA: pcm: Fix starvation on down_write_nonblock()
> > > > Hrm, converting unconditionally with msleep() looks too drastic. > > Yes, it looks drastic. But, IMHO, I can't say busy-spin is not non-drastic. Fix typo in this comment: I can't say busy-spin is not drastic. Thanks Chanho
Re: [PATCH] lzo: fix ip overrun during compress.
Hi Willy, On 2018/11/28 12:08, Willy Tarreau wrote: > Hi Yueyi, > > On Tue, Nov 27, 2018 at 10:34:26AM +, Yueyi Li wrote: >> It`s possible ip overrun in lzo1x_1_do_compress() when compressed page is >> point to the end of memory and which virtual address is 0xf000. >> Leading to a NULL pointer access during the get_unaligned_le32(ip). > Thanks for this report. > > (...) >> diff --git a/lib/lzo/lzo1x_compress.c b/lib/lzo/lzo1x_compress.c >> index 236eb21..a0265a6 100644 >> --- a/lib/lzo/lzo1x_compress.c >> +++ b/lib/lzo/lzo1x_compress.c >> @@ -17,6 +17,9 @@ >> #include >> #include "lzodefs.h" >> >> +#define OVERFLOW_ADD_CHECK(a, b) \ >> +((size_t)~0 - (size_t)(a) < (size_t)(b) ? true : false) >> + > I think the test would be easier to grasp this way : > > #define OVERFLOW_ADD_CHECK(a, b) \ > ((size_t)(b) >= (size_t)((void*)0 - (void *)(a))) > > But the following should be more efficient since we build with > -fno-strict-overflow : > > #define OVERFLOW_ADD_CHECK(a, b) \ > (((a) + (b)) < (a)) Thanks for the suggestion, I will change it in next version. > Could you please recheck ? > > Thanks, > Willy Thanks, Yueyi
Re: [PATCH] lzo: fix ip overrun during compress.
Hi Willy, On 2018/11/28 12:08, Willy Tarreau wrote: > Hi Yueyi, > > On Tue, Nov 27, 2018 at 10:34:26AM +, Yueyi Li wrote: >> It`s possible ip overrun in lzo1x_1_do_compress() when compressed page is >> point to the end of memory and which virtual address is 0xf000. >> Leading to a NULL pointer access during the get_unaligned_le32(ip). > Thanks for this report. > > (...) >> diff --git a/lib/lzo/lzo1x_compress.c b/lib/lzo/lzo1x_compress.c >> index 236eb21..a0265a6 100644 >> --- a/lib/lzo/lzo1x_compress.c >> +++ b/lib/lzo/lzo1x_compress.c >> @@ -17,6 +17,9 @@ >> #include >> #include "lzodefs.h" >> >> +#define OVERFLOW_ADD_CHECK(a, b) \ >> +((size_t)~0 - (size_t)(a) < (size_t)(b) ? true : false) >> + > I think the test would be easier to grasp this way : > > #define OVERFLOW_ADD_CHECK(a, b) \ > ((size_t)(b) >= (size_t)((void*)0 - (void *)(a))) > > But the following should be more efficient since we build with > -fno-strict-overflow : > > #define OVERFLOW_ADD_CHECK(a, b) \ > (((a) + (b)) < (a)) Thanks for the suggestion, I will change it in next version. > Could you please recheck ? > > Thanks, > Willy Thanks, Yueyi
Re: [patch 20/24] x86/speculation: Split out TIF update
On Tue, 27 Nov 2018, Thomas Gleixner wrote: > > Does it really have to? > > > > We need this special handling only if the next task has TIF_SPEC_UPDATE > > set, which is one-off event globally (when seccomp marks all its threads > > so due to seccomp filter change), and once all the TIF_SPEC_UPDATE tasks > > schedule at least once, we're in a consistent state again and don't need > > this, as every running task will then have its TIF consistent with MSR > > value. > > And how so? You set the bits is spec_flags. And then you set the TIF_UPDATE > bit which is evaluated once. Yeah, that was a complete brainfart on my side, sorry for the noise, disregard that crap. I blame it all on the dentist appointment I went through before writing the patch :p Thanks, -- Jiri Kosina SUSE Labs
Re: [patch 20/24] x86/speculation: Split out TIF update
On Tue, 27 Nov 2018, Thomas Gleixner wrote: > > Does it really have to? > > > > We need this special handling only if the next task has TIF_SPEC_UPDATE > > set, which is one-off event globally (when seccomp marks all its threads > > so due to seccomp filter change), and once all the TIF_SPEC_UPDATE tasks > > schedule at least once, we're in a consistent state again and don't need > > this, as every running task will then have its TIF consistent with MSR > > value. > > And how so? You set the bits is spec_flags. And then you set the TIF_UPDATE > bit which is evaluated once. Yeah, that was a complete brainfart on my side, sorry for the noise, disregard that crap. I blame it all on the dentist appointment I went through before writing the patch :p Thanks, -- Jiri Kosina SUSE Labs
[PATCH V2 3/4] defconfig: arm64: add i.MX system controller thermal support
This patch enables CONFIG_IMX_SC_THERMAL as module. Signed-off-by: Anson Huang --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index abd80c5..9f12324 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -376,6 +376,7 @@ CONFIG_SENSORS_RASPBERRYPI_HWMON=m CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y CONFIG_CPU_THERMAL=y CONFIG_THERMAL_EMULATION=y +CONFIG_IMX_SC_THERMAL=m CONFIG_ROCKCHIP_THERMAL=m CONFIG_RCAR_GEN3_THERMAL=y CONFIG_ARMADA_THERMAL=y -- 2.7.4
[PATCH V2 3/4] defconfig: arm64: add i.MX system controller thermal support
This patch enables CONFIG_IMX_SC_THERMAL as module. Signed-off-by: Anson Huang --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index abd80c5..9f12324 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -376,6 +376,7 @@ CONFIG_SENSORS_RASPBERRYPI_HWMON=m CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y CONFIG_CPU_THERMAL=y CONFIG_THERMAL_EMULATION=y +CONFIG_IMX_SC_THERMAL=m CONFIG_ROCKCHIP_THERMAL=m CONFIG_RCAR_GEN3_THERMAL=y CONFIG_ARMADA_THERMAL=y -- 2.7.4
[PATCH V2 4/4] ARM64: dts: imx: add i.MX8QXP thermal support
Add i.MX8QXP CPU thermal zone support.
Signed-off-by: Anson Huang
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 27 +++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 5e8b554..ef57db6 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
#include "imx8-ca35.dtsi"
@@ -85,6 +86,32 @@
};
};
+ tsens: thermal-sensor {
+ compatible = "nxp,imx8qxp-sc-thermal";
+ tsens-num = <1>;
+ #thermal-sensor-cells = <1>;
+ };
+
+ thermal_zones: thermal-zones {
+ cpu-thermal0 {
+ polling-delay-passive = <250>;
+ polling-delay = <2000>;
+ thermal-sensors = < 355>;
+ trips {
+ cpu_alert0: trip0 {
+ temperature = <107000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu_crit0: trip1 {
+ temperature = <127000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+ };
+
adma_subsys: bus@5900 {
compatible = "simple-bus";
#address-cells = <1>;
--
2.7.4
[PATCH V2 4/4] ARM64: dts: imx: add i.MX8QXP thermal support
Add i.MX8QXP CPU thermal zone support.
Signed-off-by: Anson Huang
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 27 +++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 5e8b554..ef57db6 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
#include "imx8-ca35.dtsi"
@@ -85,6 +86,32 @@
};
};
+ tsens: thermal-sensor {
+ compatible = "nxp,imx8qxp-sc-thermal";
+ tsens-num = <1>;
+ #thermal-sensor-cells = <1>;
+ };
+
+ thermal_zones: thermal-zones {
+ cpu-thermal0 {
+ polling-delay-passive = <250>;
+ polling-delay = <2000>;
+ thermal-sensors = < 355>;
+ trips {
+ cpu_alert0: trip0 {
+ temperature = <107000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu_crit0: trip1 {
+ temperature = <127000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+ };
+
adma_subsys: bus@5900 {
compatible = "simple-bus";
#address-cells = <1>;
--
2.7.4
[PATCH V2 1/4] dt-bindings: thermal: add binding doc for i.MX system controller thermal driver
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as
system controller, the system controller is in charge of system
power, clock and thermal sensors etc. management, Linux kernel
has to communicate with system controller via MU (message unit)
IPC to get temperature from thermal sensors, this patch adds
binding doc for i.MX system controller thermal driver.
Signed-off-by: Anson Huang
---
no change since V1.
.../devicetree/bindings/thermal/imx-sc-thermal.txt | 33 ++
1 file changed, 33 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/imx-sc-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/imx-sc-thermal.txt
b/Documentation/devicetree/bindings/thermal/imx-sc-thermal.txt
new file mode 100644
index 000..2f5b0a2
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/imx-sc-thermal.txt
@@ -0,0 +1,33 @@
+* Temperature Monitor (TEMPMON) on NXP i.MX SoCs with System Controller
+
+Required properties:
+- compatible : Must be "nxp,imx8qxp-sc-thermal";
+- tsens-num : Total number of thermal sensors supported;
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description.
+
+Example:
+tsens: thermal-sensor {
+ compatible = "nxp,imx8qxp-sc-thermal";
+ tsens-num = <1>;
+ #thermal-sensor-cells = <1>;
+};
+
+thermal_zones: thermal-zones {
+ cpu-thermal0 {
+ polling-delay-passive = <250>;
+ polling-delay = <2000>;
+ thermal-sensors = < 355>;
+ trips {
+ cpu_alert0: trip0 {
+ temperature = <107000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu_crit0: trip1 {
+ temperature = <127000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+};
--
2.7.4
[PATCH V2 1/4] dt-bindings: thermal: add binding doc for i.MX system controller thermal driver
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as
system controller, the system controller is in charge of system
power, clock and thermal sensors etc. management, Linux kernel
has to communicate with system controller via MU (message unit)
IPC to get temperature from thermal sensors, this patch adds
binding doc for i.MX system controller thermal driver.
Signed-off-by: Anson Huang
---
no change since V1.
.../devicetree/bindings/thermal/imx-sc-thermal.txt | 33 ++
1 file changed, 33 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/imx-sc-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/imx-sc-thermal.txt
b/Documentation/devicetree/bindings/thermal/imx-sc-thermal.txt
new file mode 100644
index 000..2f5b0a2
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/imx-sc-thermal.txt
@@ -0,0 +1,33 @@
+* Temperature Monitor (TEMPMON) on NXP i.MX SoCs with System Controller
+
+Required properties:
+- compatible : Must be "nxp,imx8qxp-sc-thermal";
+- tsens-num : Total number of thermal sensors supported;
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description.
+
+Example:
+tsens: thermal-sensor {
+ compatible = "nxp,imx8qxp-sc-thermal";
+ tsens-num = <1>;
+ #thermal-sensor-cells = <1>;
+};
+
+thermal_zones: thermal-zones {
+ cpu-thermal0 {
+ polling-delay-passive = <250>;
+ polling-delay = <2000>;
+ thermal-sensors = < 355>;
+ trips {
+ cpu_alert0: trip0 {
+ temperature = <107000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu_crit0: trip1 {
+ temperature = <127000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+};
--
2.7.4
[PATCH V2 2/4] thermal: imx_sc: add i.MX system controller thermal support
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
inside, the system controller is in charge of controlling power,
clock and thermal sensors etc..
This patch adds i.MX system controller thermal driver support,
Linux kernel has to communicate with system controller via MU
(message unit) IPC to get each thermal sensor's temperature,
it supports multiple sensors which are passed from device tree,
please see the binding doc for details.
Signed-off-by: Anson Huang
---
changes since V1:
remove boiler plate license text;
remove unnecessary kfree during probe;
remove build warning of comparing unsigned int with < 0;
drivers/thermal/Kconfig | 11 +++
drivers/thermal/Makefile | 1 +
drivers/thermal/imx_sc_thermal.c | 201 +++
3 files changed, 213 insertions(+)
create mode 100644 drivers/thermal/imx_sc_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 0e69edc..84e850c 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -222,6 +222,17 @@ config IMX_THERMAL
cpufreq is used as the cooling device to throttle CPUs when the
passive trip is crossed.
+config IMX_SC_THERMAL
+ tristate "Temperature sensor driver for NXP i.MX SoCs with System
Controller"
+ depends on ARCH_MXC || COMPILE_TEST
+ depends on OF
+ help
+ Support for Temperature Monitor (TEMPMON) found on NXP i.MX SoCs with
+ system controller inside, Linux kernel has to communicate with system
+ controller via MU (message unit) IPC to get temperature from thermal
+ sensor. It supports one critical trip point and one
+ passive trip point for each thermal sensor.
+
config MAX77620_THERMAL
tristate "Temperature sensor driver for Maxim MAX77620 PMIC"
depends on MFD_MAX77620
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 610344e..1b13f6a 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_DB8500_THERMAL) += db8500_thermal.o
obj-$(CONFIG_ARMADA_THERMAL) += armada_thermal.o
obj-$(CONFIG_TANGO_THERMAL)+= tango_thermal.o
obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
+obj-$(CONFIG_IMX_SC_THERMAL) += imx_sc_thermal.o
obj-$(CONFIG_MAX77620_THERMAL) += max77620_thermal.o
obj-$(CONFIG_QORIQ_THERMAL)+= qoriq_thermal.o
obj-$(CONFIG_DA9062_THERMAL) += da9062-thermal.o
diff --git a/drivers/thermal/imx_sc_thermal.c b/drivers/thermal/imx_sc_thermal.c
new file mode 100644
index 000..890537f
--- /dev/null
+++ b/drivers/thermal/imx_sc_thermal.c
@@ -0,0 +1,201 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "thermal_core.h"
+
+#define IMX_SC_MISC_FUNC_GET_TEMP 13
+#define IMX_SC_C_TEMP 0
+
+struct imx_sc_ipc *thermal_ipc_handle;
+
+struct imx_sc_sensor {
+ struct thermal_zone_device *tzd;
+ u32 resource_id;
+};
+
+struct imx_sc_thermal_data {
+ struct imx_sc_sensor *sensor;
+};
+
+struct imx_sc_msg_req_misc_get_temp {
+ struct imx_sc_rpc_msg hdr;
+ u16 resource_id;
+ u8 type;
+} __packed;
+
+struct imx_sc_msg_resp_misc_get_temp {
+ struct imx_sc_rpc_msg hdr;
+ u16 celsius;
+ u8 tenths;
+} __packed;
+
+static int imx_sc_thermal_get_temp(void *data, int *temp)
+{
+ struct imx_sc_msg_resp_misc_get_temp *resp;
+ struct imx_sc_msg_req_misc_get_temp msg;
+ struct imx_sc_rpc_msg *hdr =
+ struct imx_sc_sensor *sensor = data;
+ int ret;
+
+ msg.resource_id = sensor->resource_id;
+ msg.type = IMX_SC_C_TEMP;
+
+ hdr->ver = IMX_SC_RPC_VERSION;
+ hdr->svc = IMX_SC_RPC_SVC_MISC;
+ hdr->func = IMX_SC_MISC_FUNC_GET_TEMP;
+ hdr->size = 2;
+
+ ret = imx_scu_call_rpc(thermal_ipc_handle, , true);
+ if (ret) {
+ pr_err("read temp sensor %d failed, ret %d\n",
+ sensor->resource_id, ret);
+ return ret;
+ }
+
+ resp = (struct imx_sc_msg_resp_misc_get_temp *)
+ *temp = resp->celsius * 1000 + resp->tenths * 100;
+
+ return 0;
+}
+
+static const struct thermal_zone_of_device_ops imx_sc_thermal_ops = {
+ .get_temp = imx_sc_thermal_get_temp,
+};
+
+static int imx_sc_thermal_register_sensor(struct platform_device *pdev,
+ struct imx_sc_sensor *sensor)
+{
+ struct thermal_zone_device *tzd;
+
+ tzd = devm_thermal_zone_of_sensor_register(>dev,
+ sensor->resource_id,
+ sensor,
+ _sc_thermal_ops);
+ if (IS_ERR(tzd)) {
+ dev_err(>dev, "failed to register sensor: %d\n",
+
[PATCH V2 0/4] Add i.MX System Controller thermal driver support
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller inside, the system controller is in charge of controlling power, clock and thermal sensors etc.. This patch adds i.MX system controller thermal driver support, Linux kernel has to communicate with system controller via MU (message unit) IPC to get each thermal sensor's temperature, it supports multiple sensors which are passed from device tree, please see the binding doc for details. Note that this patch set is based on [V4,5/5] defconfig: arm64: add imx8qxp support, https://patchwork.kernel.org/patch/10677315/ Anson Huang (4): dt-bindings: thermal: add binding doc for i.MX system controller thermal driver thermal: imx_sc: add i.MX system controller thermal support defconfig: arm64: add i.MX system controller thermal support ARM64: dts: imx: add i.MX8QXP thermal support .../devicetree/bindings/thermal/imx-sc-thermal.txt | 33 arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 27 +++ arch/arm64/configs/defconfig | 1 + drivers/thermal/Kconfig| 11 ++ drivers/thermal/Makefile | 1 + drivers/thermal/imx_sc_thermal.c | 201 + 6 files changed, 274 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/imx-sc-thermal.txt create mode 100644 drivers/thermal/imx_sc_thermal.c -- 2.7.4
[PATCH V2 2/4] thermal: imx_sc: add i.MX system controller thermal support
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
inside, the system controller is in charge of controlling power,
clock and thermal sensors etc..
This patch adds i.MX system controller thermal driver support,
Linux kernel has to communicate with system controller via MU
(message unit) IPC to get each thermal sensor's temperature,
it supports multiple sensors which are passed from device tree,
please see the binding doc for details.
Signed-off-by: Anson Huang
---
changes since V1:
remove boiler plate license text;
remove unnecessary kfree during probe;
remove build warning of comparing unsigned int with < 0;
drivers/thermal/Kconfig | 11 +++
drivers/thermal/Makefile | 1 +
drivers/thermal/imx_sc_thermal.c | 201 +++
3 files changed, 213 insertions(+)
create mode 100644 drivers/thermal/imx_sc_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 0e69edc..84e850c 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -222,6 +222,17 @@ config IMX_THERMAL
cpufreq is used as the cooling device to throttle CPUs when the
passive trip is crossed.
+config IMX_SC_THERMAL
+ tristate "Temperature sensor driver for NXP i.MX SoCs with System
Controller"
+ depends on ARCH_MXC || COMPILE_TEST
+ depends on OF
+ help
+ Support for Temperature Monitor (TEMPMON) found on NXP i.MX SoCs with
+ system controller inside, Linux kernel has to communicate with system
+ controller via MU (message unit) IPC to get temperature from thermal
+ sensor. It supports one critical trip point and one
+ passive trip point for each thermal sensor.
+
config MAX77620_THERMAL
tristate "Temperature sensor driver for Maxim MAX77620 PMIC"
depends on MFD_MAX77620
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 610344e..1b13f6a 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_DB8500_THERMAL) += db8500_thermal.o
obj-$(CONFIG_ARMADA_THERMAL) += armada_thermal.o
obj-$(CONFIG_TANGO_THERMAL)+= tango_thermal.o
obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
+obj-$(CONFIG_IMX_SC_THERMAL) += imx_sc_thermal.o
obj-$(CONFIG_MAX77620_THERMAL) += max77620_thermal.o
obj-$(CONFIG_QORIQ_THERMAL)+= qoriq_thermal.o
obj-$(CONFIG_DA9062_THERMAL) += da9062-thermal.o
diff --git a/drivers/thermal/imx_sc_thermal.c b/drivers/thermal/imx_sc_thermal.c
new file mode 100644
index 000..890537f
--- /dev/null
+++ b/drivers/thermal/imx_sc_thermal.c
@@ -0,0 +1,201 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "thermal_core.h"
+
+#define IMX_SC_MISC_FUNC_GET_TEMP 13
+#define IMX_SC_C_TEMP 0
+
+struct imx_sc_ipc *thermal_ipc_handle;
+
+struct imx_sc_sensor {
+ struct thermal_zone_device *tzd;
+ u32 resource_id;
+};
+
+struct imx_sc_thermal_data {
+ struct imx_sc_sensor *sensor;
+};
+
+struct imx_sc_msg_req_misc_get_temp {
+ struct imx_sc_rpc_msg hdr;
+ u16 resource_id;
+ u8 type;
+} __packed;
+
+struct imx_sc_msg_resp_misc_get_temp {
+ struct imx_sc_rpc_msg hdr;
+ u16 celsius;
+ u8 tenths;
+} __packed;
+
+static int imx_sc_thermal_get_temp(void *data, int *temp)
+{
+ struct imx_sc_msg_resp_misc_get_temp *resp;
+ struct imx_sc_msg_req_misc_get_temp msg;
+ struct imx_sc_rpc_msg *hdr =
+ struct imx_sc_sensor *sensor = data;
+ int ret;
+
+ msg.resource_id = sensor->resource_id;
+ msg.type = IMX_SC_C_TEMP;
+
+ hdr->ver = IMX_SC_RPC_VERSION;
+ hdr->svc = IMX_SC_RPC_SVC_MISC;
+ hdr->func = IMX_SC_MISC_FUNC_GET_TEMP;
+ hdr->size = 2;
+
+ ret = imx_scu_call_rpc(thermal_ipc_handle, , true);
+ if (ret) {
+ pr_err("read temp sensor %d failed, ret %d\n",
+ sensor->resource_id, ret);
+ return ret;
+ }
+
+ resp = (struct imx_sc_msg_resp_misc_get_temp *)
+ *temp = resp->celsius * 1000 + resp->tenths * 100;
+
+ return 0;
+}
+
+static const struct thermal_zone_of_device_ops imx_sc_thermal_ops = {
+ .get_temp = imx_sc_thermal_get_temp,
+};
+
+static int imx_sc_thermal_register_sensor(struct platform_device *pdev,
+ struct imx_sc_sensor *sensor)
+{
+ struct thermal_zone_device *tzd;
+
+ tzd = devm_thermal_zone_of_sensor_register(>dev,
+ sensor->resource_id,
+ sensor,
+ _sc_thermal_ops);
+ if (IS_ERR(tzd)) {
+ dev_err(>dev, "failed to register sensor: %d\n",
+
[PATCH V2 0/4] Add i.MX System Controller thermal driver support
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller inside, the system controller is in charge of controlling power, clock and thermal sensors etc.. This patch adds i.MX system controller thermal driver support, Linux kernel has to communicate with system controller via MU (message unit) IPC to get each thermal sensor's temperature, it supports multiple sensors which are passed from device tree, please see the binding doc for details. Note that this patch set is based on [V4,5/5] defconfig: arm64: add imx8qxp support, https://patchwork.kernel.org/patch/10677315/ Anson Huang (4): dt-bindings: thermal: add binding doc for i.MX system controller thermal driver thermal: imx_sc: add i.MX system controller thermal support defconfig: arm64: add i.MX system controller thermal support ARM64: dts: imx: add i.MX8QXP thermal support .../devicetree/bindings/thermal/imx-sc-thermal.txt | 33 arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 27 +++ arch/arm64/configs/defconfig | 1 + drivers/thermal/Kconfig| 11 ++ drivers/thermal/Makefile | 1 + drivers/thermal/imx_sc_thermal.c | 201 + 6 files changed, 274 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/imx-sc-thermal.txt create mode 100644 drivers/thermal/imx_sc_thermal.c -- 2.7.4
Re: [PATCH v3 3/3] thermal: tegra: parse sensor id before sensor register
Hi Daniel,
I updated my patch to parse the sensor id, please take a look.
Wei.
On 28/11/2018 1:44 PM, Wei Ni wrote:
> Since different platforms may not support all 4
> sensors, so the sensor registration may be failed.
> Add codes to parse dt to find sensor id which
> need to be registered. So that the registration
> can be successful on all platform.
>
> Signed-off-by: Wei Ni
> ---
> drivers/thermal/tegra/soctherm.c | 46
> ++--
> 1 file changed, 44 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/thermal/tegra/soctherm.c
> b/drivers/thermal/tegra/soctherm.c
> index 375cadbc24cd..79e4628224d7 100644
> --- a/drivers/thermal/tegra/soctherm.c
> +++ b/drivers/thermal/tegra/soctherm.c
> @@ -1224,6 +1224,44 @@ static void soctherm_init(struct platform_device *pdev)
> tegra_soctherm_throttle(>dev);
> }
>
> +static bool tegra_soctherm_find_sensor_id(int sensor_id)
> +{
> + int id;
> + bool ret = false;
> + struct of_phandle_args sensor_specs;
> + struct device_node *np, *sensor_np;
> +
> + np = of_find_node_by_name(NULL, "thermal-zones");
> + if (!np)
> + return ret;
> +
> + sensor_np = of_get_next_child(np, NULL);
> + for_each_available_child_of_node(np, sensor_np) {
> + if (of_parse_phandle_with_args(sensor_np, "thermal-sensors",
> + "#thermal-sensor-cells",
> + 0, _specs))
> + continue;
> +
> + if (sensor_specs.args_count != 1) {
> + WARN(sensor_specs.args_count > 1,
> + "%s: wrong cells in sensor specifier %d\n",
> + sensor_specs.np->name, sensor_specs.args_count);
> + continue;
> + } else {
> + id = sensor_specs.args[0];
> + if (sensor_id == id) {
> + ret = true;
> + break;
> + }
> + }
> + }
> +
> + of_node_put(np);
> + of_node_put(sensor_np);
> +
> + return ret;
> +}
> +
> static const struct of_device_id tegra_soctherm_of_match[] = {
> #ifdef CONFIG_ARCH_TEGRA_124_SOC
> {
> @@ -1365,13 +1403,15 @@ static int tegra_soctherm_probe(struct
> platform_device *pdev)
> zone->sg = soc->ttgs[i];
> zone->ts = tegra;
>
> + if (!tegra_soctherm_find_sensor_id(soc->ttgs[i]->id))
> + continue;
> z = devm_thermal_zone_of_sensor_register(>dev,
>soc->ttgs[i]->id, zone,
>_of_thermal_ops);
> if (IS_ERR(z)) {
> err = PTR_ERR(z);
> - dev_err(>dev, "failed to register sensor: %d\n",
> - err);
> + dev_err(>dev, "failed to register sensor %s:
> %d\n",
> + soc->ttgs[i]->name, err);
> goto disable_clocks;
> }
>
> @@ -1434,6 +1474,8 @@ static int __maybe_unused soctherm_resume(struct device
> *dev)
> struct thermal_zone_device *tz;
>
> tz = tegra->thermctl_tzs[soc->ttgs[i]->id];
> + if (!tz)
> + continue;
> err = tegra_soctherm_set_hwtrips(dev, soc->ttgs[i], tz);
> if (err) {
> dev_err(>dev,
>
Re: [PATCH v3 3/3] thermal: tegra: parse sensor id before sensor register
Hi Daniel,
I updated my patch to parse the sensor id, please take a look.
Wei.
On 28/11/2018 1:44 PM, Wei Ni wrote:
> Since different platforms may not support all 4
> sensors, so the sensor registration may be failed.
> Add codes to parse dt to find sensor id which
> need to be registered. So that the registration
> can be successful on all platform.
>
> Signed-off-by: Wei Ni
> ---
> drivers/thermal/tegra/soctherm.c | 46
> ++--
> 1 file changed, 44 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/thermal/tegra/soctherm.c
> b/drivers/thermal/tegra/soctherm.c
> index 375cadbc24cd..79e4628224d7 100644
> --- a/drivers/thermal/tegra/soctherm.c
> +++ b/drivers/thermal/tegra/soctherm.c
> @@ -1224,6 +1224,44 @@ static void soctherm_init(struct platform_device *pdev)
> tegra_soctherm_throttle(>dev);
> }
>
> +static bool tegra_soctherm_find_sensor_id(int sensor_id)
> +{
> + int id;
> + bool ret = false;
> + struct of_phandle_args sensor_specs;
> + struct device_node *np, *sensor_np;
> +
> + np = of_find_node_by_name(NULL, "thermal-zones");
> + if (!np)
> + return ret;
> +
> + sensor_np = of_get_next_child(np, NULL);
> + for_each_available_child_of_node(np, sensor_np) {
> + if (of_parse_phandle_with_args(sensor_np, "thermal-sensors",
> + "#thermal-sensor-cells",
> + 0, _specs))
> + continue;
> +
> + if (sensor_specs.args_count != 1) {
> + WARN(sensor_specs.args_count > 1,
> + "%s: wrong cells in sensor specifier %d\n",
> + sensor_specs.np->name, sensor_specs.args_count);
> + continue;
> + } else {
> + id = sensor_specs.args[0];
> + if (sensor_id == id) {
> + ret = true;
> + break;
> + }
> + }
> + }
> +
> + of_node_put(np);
> + of_node_put(sensor_np);
> +
> + return ret;
> +}
> +
> static const struct of_device_id tegra_soctherm_of_match[] = {
> #ifdef CONFIG_ARCH_TEGRA_124_SOC
> {
> @@ -1365,13 +1403,15 @@ static int tegra_soctherm_probe(struct
> platform_device *pdev)
> zone->sg = soc->ttgs[i];
> zone->ts = tegra;
>
> + if (!tegra_soctherm_find_sensor_id(soc->ttgs[i]->id))
> + continue;
> z = devm_thermal_zone_of_sensor_register(>dev,
>soc->ttgs[i]->id, zone,
>_of_thermal_ops);
> if (IS_ERR(z)) {
> err = PTR_ERR(z);
> - dev_err(>dev, "failed to register sensor: %d\n",
> - err);
> + dev_err(>dev, "failed to register sensor %s:
> %d\n",
> + soc->ttgs[i]->name, err);
> goto disable_clocks;
> }
>
> @@ -1434,6 +1474,8 @@ static int __maybe_unused soctherm_resume(struct device
> *dev)
> struct thermal_zone_device *tz;
>
> tz = tegra->thermctl_tzs[soc->ttgs[i]->id];
> + if (!tz)
> + continue;
> err = tegra_soctherm_set_hwtrips(dev, soc->ttgs[i], tz);
> if (err) {
> dev_err(>dev,
>
[PATCH v3 3/3] thermal: tegra: parse sensor id before sensor register
Since different platforms may not support all 4
sensors, so the sensor registration may be failed.
Add codes to parse dt to find sensor id which
need to be registered. So that the registration
can be successful on all platform.
Signed-off-by: Wei Ni
---
drivers/thermal/tegra/soctherm.c | 46 ++--
1 file changed, 44 insertions(+), 2 deletions(-)
diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c
index 375cadbc24cd..79e4628224d7 100644
--- a/drivers/thermal/tegra/soctherm.c
+++ b/drivers/thermal/tegra/soctherm.c
@@ -1224,6 +1224,44 @@ static void soctherm_init(struct platform_device *pdev)
tegra_soctherm_throttle(>dev);
}
+static bool tegra_soctherm_find_sensor_id(int sensor_id)
+{
+ int id;
+ bool ret = false;
+ struct of_phandle_args sensor_specs;
+ struct device_node *np, *sensor_np;
+
+ np = of_find_node_by_name(NULL, "thermal-zones");
+ if (!np)
+ return ret;
+
+ sensor_np = of_get_next_child(np, NULL);
+ for_each_available_child_of_node(np, sensor_np) {
+ if (of_parse_phandle_with_args(sensor_np, "thermal-sensors",
+"#thermal-sensor-cells",
+0, _specs))
+ continue;
+
+ if (sensor_specs.args_count != 1) {
+ WARN(sensor_specs.args_count > 1,
+"%s: wrong cells in sensor specifier %d\n",
+sensor_specs.np->name, sensor_specs.args_count);
+ continue;
+ } else {
+ id = sensor_specs.args[0];
+ if (sensor_id == id) {
+ ret = true;
+ break;
+ }
+ }
+ }
+
+ of_node_put(np);
+ of_node_put(sensor_np);
+
+ return ret;
+}
+
static const struct of_device_id tegra_soctherm_of_match[] = {
#ifdef CONFIG_ARCH_TEGRA_124_SOC
{
@@ -1365,13 +1403,15 @@ static int tegra_soctherm_probe(struct platform_device
*pdev)
zone->sg = soc->ttgs[i];
zone->ts = tegra;
+ if (!tegra_soctherm_find_sensor_id(soc->ttgs[i]->id))
+ continue;
z = devm_thermal_zone_of_sensor_register(>dev,
soc->ttgs[i]->id, zone,
_of_thermal_ops);
if (IS_ERR(z)) {
err = PTR_ERR(z);
- dev_err(>dev, "failed to register sensor: %d\n",
- err);
+ dev_err(>dev, "failed to register sensor %s:
%d\n",
+ soc->ttgs[i]->name, err);
goto disable_clocks;
}
@@ -1434,6 +1474,8 @@ static int __maybe_unused soctherm_resume(struct device
*dev)
struct thermal_zone_device *tz;
tz = tegra->thermctl_tzs[soc->ttgs[i]->id];
+ if (!tz)
+ continue;
err = tegra_soctherm_set_hwtrips(dev, soc->ttgs[i], tz);
if (err) {
dev_err(>dev,
--
2.7.4
[PATCH v3 2/3] thermal: tegra: fix memory allocation
Fix memory allocation to store the pointers to thermal_zone_device. Signed-off-by: Wei Ni Acked-by: Thierry Reding --- drivers/thermal/tegra/soctherm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c index 55cc1f2f6a45..375cadbc24cd 100644 --- a/drivers/thermal/tegra/soctherm.c +++ b/drivers/thermal/tegra/soctherm.c @@ -1339,7 +1339,7 @@ static int tegra_soctherm_probe(struct platform_device *pdev) } tegra->thermctl_tzs = devm_kcalloc(>dev, - soc->num_ttgs, sizeof(*z), + soc->num_ttgs, sizeof(z), GFP_KERNEL); if (!tegra->thermctl_tzs) return -ENOMEM; -- 2.7.4
[PATCH v3 3/3] thermal: tegra: parse sensor id before sensor register
Since different platforms may not support all 4
sensors, so the sensor registration may be failed.
Add codes to parse dt to find sensor id which
need to be registered. So that the registration
can be successful on all platform.
Signed-off-by: Wei Ni
---
drivers/thermal/tegra/soctherm.c | 46 ++--
1 file changed, 44 insertions(+), 2 deletions(-)
diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c
index 375cadbc24cd..79e4628224d7 100644
--- a/drivers/thermal/tegra/soctherm.c
+++ b/drivers/thermal/tegra/soctherm.c
@@ -1224,6 +1224,44 @@ static void soctherm_init(struct platform_device *pdev)
tegra_soctherm_throttle(>dev);
}
+static bool tegra_soctherm_find_sensor_id(int sensor_id)
+{
+ int id;
+ bool ret = false;
+ struct of_phandle_args sensor_specs;
+ struct device_node *np, *sensor_np;
+
+ np = of_find_node_by_name(NULL, "thermal-zones");
+ if (!np)
+ return ret;
+
+ sensor_np = of_get_next_child(np, NULL);
+ for_each_available_child_of_node(np, sensor_np) {
+ if (of_parse_phandle_with_args(sensor_np, "thermal-sensors",
+"#thermal-sensor-cells",
+0, _specs))
+ continue;
+
+ if (sensor_specs.args_count != 1) {
+ WARN(sensor_specs.args_count > 1,
+"%s: wrong cells in sensor specifier %d\n",
+sensor_specs.np->name, sensor_specs.args_count);
+ continue;
+ } else {
+ id = sensor_specs.args[0];
+ if (sensor_id == id) {
+ ret = true;
+ break;
+ }
+ }
+ }
+
+ of_node_put(np);
+ of_node_put(sensor_np);
+
+ return ret;
+}
+
static const struct of_device_id tegra_soctherm_of_match[] = {
#ifdef CONFIG_ARCH_TEGRA_124_SOC
{
@@ -1365,13 +1403,15 @@ static int tegra_soctherm_probe(struct platform_device
*pdev)
zone->sg = soc->ttgs[i];
zone->ts = tegra;
+ if (!tegra_soctherm_find_sensor_id(soc->ttgs[i]->id))
+ continue;
z = devm_thermal_zone_of_sensor_register(>dev,
soc->ttgs[i]->id, zone,
_of_thermal_ops);
if (IS_ERR(z)) {
err = PTR_ERR(z);
- dev_err(>dev, "failed to register sensor: %d\n",
- err);
+ dev_err(>dev, "failed to register sensor %s:
%d\n",
+ soc->ttgs[i]->name, err);
goto disable_clocks;
}
@@ -1434,6 +1474,8 @@ static int __maybe_unused soctherm_resume(struct device
*dev)
struct thermal_zone_device *tz;
tz = tegra->thermctl_tzs[soc->ttgs[i]->id];
+ if (!tz)
+ continue;
err = tegra_soctherm_set_hwtrips(dev, soc->ttgs[i], tz);
if (err) {
dev_err(>dev,
--
2.7.4
[PATCH v3 2/3] thermal: tegra: fix memory allocation
Fix memory allocation to store the pointers to thermal_zone_device. Signed-off-by: Wei Ni Acked-by: Thierry Reding --- drivers/thermal/tegra/soctherm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c index 55cc1f2f6a45..375cadbc24cd 100644 --- a/drivers/thermal/tegra/soctherm.c +++ b/drivers/thermal/tegra/soctherm.c @@ -1339,7 +1339,7 @@ static int tegra_soctherm_probe(struct platform_device *pdev) } tegra->thermctl_tzs = devm_kcalloc(>dev, - soc->num_ttgs, sizeof(*z), + soc->num_ttgs, sizeof(z), GFP_KERNEL); if (!tegra->thermctl_tzs) return -ENOMEM; -- 2.7.4
[PATCH v3 0/3] Fixes for Tegra soctherm
This series fixed some issues for Tegra soctherm Main changes from v2: 1. add codes to parse sensor id to avoid registration failure. Main changes from v1: 1. Acked by Thierry Reding for the patch "thermal: tegra: fix memory allocation". 2. Print out the sensor name when register failed. 2. Remove patch "thermal: tegra: fix coverity defect" Wei Ni (3): thermal: tegra: remove unnecessary warnings thermal: tegra: fix memory allocation thermal: tegra: parse sensor id before sensor register drivers/thermal/tegra/soctherm.c | 54 +++- 1 file changed, 48 insertions(+), 6 deletions(-) -- 2.7.4
[PATCH v3 1/3] thermal: tegra: remove unnecessary warnings
Convert warnings to info as not all platforms may
have all the thresholds and sensors enabled.
Signed-off-by: Wei Ni
---
drivers/thermal/tegra/soctherm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c
index ed28110a3535..55cc1f2f6a45 100644
--- a/drivers/thermal/tegra/soctherm.c
+++ b/drivers/thermal/tegra/soctherm.c
@@ -550,7 +550,7 @@ static int tegra_soctherm_set_hwtrips(struct device *dev,
ret = tz->ops->get_crit_temp(tz, );
if (ret) {
- dev_warn(dev, "thermtrip: %s: missing critical temperature\n",
+ dev_info(dev, "thermtrip: %s: missing critical temperature\n",
sg->name);
goto set_throttle;
}
@@ -569,7 +569,7 @@ static int tegra_soctherm_set_hwtrips(struct device *dev,
set_throttle:
ret = get_hot_temp(tz, , );
if (ret) {
- dev_warn(dev, "throttrip: %s: missing hot temperature\n",
+ dev_info(dev, "throttrip: %s: missing hot temperature\n",
sg->name);
return 0;
}
@@ -600,7 +600,7 @@ static int tegra_soctherm_set_hwtrips(struct device *dev,
}
if (i == THROTTLE_SIZE)
- dev_warn(dev, "throttrip: %s: missing throttle cdev\n",
+ dev_info(dev, "throttrip: %s: missing throttle cdev\n",
sg->name);
return 0;
--
2.7.4
[PATCH v3 0/3] Fixes for Tegra soctherm
This series fixed some issues for Tegra soctherm Main changes from v2: 1. add codes to parse sensor id to avoid registration failure. Main changes from v1: 1. Acked by Thierry Reding for the patch "thermal: tegra: fix memory allocation". 2. Print out the sensor name when register failed. 2. Remove patch "thermal: tegra: fix coverity defect" Wei Ni (3): thermal: tegra: remove unnecessary warnings thermal: tegra: fix memory allocation thermal: tegra: parse sensor id before sensor register drivers/thermal/tegra/soctherm.c | 54 +++- 1 file changed, 48 insertions(+), 6 deletions(-) -- 2.7.4
[PATCH v3 1/3] thermal: tegra: remove unnecessary warnings
Convert warnings to info as not all platforms may
have all the thresholds and sensors enabled.
Signed-off-by: Wei Ni
---
drivers/thermal/tegra/soctherm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c
index ed28110a3535..55cc1f2f6a45 100644
--- a/drivers/thermal/tegra/soctherm.c
+++ b/drivers/thermal/tegra/soctherm.c
@@ -550,7 +550,7 @@ static int tegra_soctherm_set_hwtrips(struct device *dev,
ret = tz->ops->get_crit_temp(tz, );
if (ret) {
- dev_warn(dev, "thermtrip: %s: missing critical temperature\n",
+ dev_info(dev, "thermtrip: %s: missing critical temperature\n",
sg->name);
goto set_throttle;
}
@@ -569,7 +569,7 @@ static int tegra_soctherm_set_hwtrips(struct device *dev,
set_throttle:
ret = get_hot_temp(tz, , );
if (ret) {
- dev_warn(dev, "throttrip: %s: missing hot temperature\n",
+ dev_info(dev, "throttrip: %s: missing hot temperature\n",
sg->name);
return 0;
}
@@ -600,7 +600,7 @@ static int tegra_soctherm_set_hwtrips(struct device *dev,
}
if (i == THROTTLE_SIZE)
- dev_warn(dev, "throttrip: %s: missing throttle cdev\n",
+ dev_info(dev, "throttrip: %s: missing throttle cdev\n",
sg->name);
return 0;
--
2.7.4
[PATCH v2 1/2] mtd: rawnand: denali: remove ->dev_ready() hook
The Denali NAND IP has no way to read out the current signal level
of the R/B# pin. Instead, denali_dev_ready() checks if the R/B#
transition has already happened. (The INTR__INT_ACT interrupt is
asserted at the rising edge of the R/B# pin.) It is not a correct
way to implement the ->dev_ready() hook.
In fact, it has a drawback; in the nand_scan_ident phase, the chip
detection iterates over maxchips until it fails to find a homogeneous
chip. For the last loop, nand_reset() fails if no chip is there.
If ->dev_ready hook exists, nand_command(_lp) calls nand_wait_ready()
after NAND_CMD_RESET. However, we know denali_dev_ready() never
returns 1 unless there exists a chip that toggles R/B# in that chip
select. Then, nand_wait_ready() just ends up with wasting 400 msec,
in the end, shows the "timeout while waiting for chip to become ready"
warning.
Let's remove the mis-implemented dev_ready hook, and fallback to
sending the NAND_CMD_STATUS and nand_wait_status_ready(), which
bails out more quickly.
Signed-off-by: Masahiro Yamada
---
Changes in v2:
- Rebase
drivers/mtd/nand/raw/denali.c | 23 +--
1 file changed, 1 insertion(+), 22 deletions(-)
diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
index 830ea24..ead6e60 100644
--- a/drivers/mtd/nand/raw/denali.c
+++ b/drivers/mtd/nand/raw/denali.c
@@ -204,18 +204,6 @@ static uint32_t denali_wait_for_irq(struct
denali_nand_info *denali,
return denali->irq_status;
}
-static uint32_t denali_check_irq(struct denali_nand_info *denali)
-{
- unsigned long flags;
- uint32_t irq_status;
-
- spin_lock_irqsave(>irq_lock, flags);
- irq_status = denali->irq_status;
- spin_unlock_irqrestore(>irq_lock, flags);
-
- return irq_status;
-}
-
static void denali_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
{
struct mtd_info *mtd = nand_to_mtd(chip);
@@ -288,8 +276,7 @@ static void denali_cmd_ctrl(struct nand_chip *chip, int
dat, unsigned int ctrl)
return;
/*
-* Some commands are followed by chip->legacy.dev_ready or
-* chip->legacy.waitfunc.
+* Some commands are followed by chip->legacy.waitfunc.
* irq_status must be cleared here to catch the R/B# interrupt later.
*/
if (ctrl & NAND_CTRL_CHANGE)
@@ -298,13 +285,6 @@ static void denali_cmd_ctrl(struct nand_chip *chip, int
dat, unsigned int ctrl)
denali->host_write(denali, DENALI_BANK(denali) | type, dat);
}
-static int denali_dev_ready(struct nand_chip *chip)
-{
- struct denali_nand_info *denali = mtd_to_denali(nand_to_mtd(chip));
-
- return !!(denali_check_irq(denali) & INTR__INT_ACT);
-}
-
static int denali_check_erased_page(struct mtd_info *mtd,
struct nand_chip *chip, uint8_t *buf,
unsigned long uncor_ecc_flags,
@@ -1359,7 +1339,6 @@ int denali_init(struct denali_nand_info *denali)
chip->legacy.read_byte = denali_read_byte;
chip->legacy.write_byte = denali_write_byte;
chip->legacy.cmd_ctrl = denali_cmd_ctrl;
- chip->legacy.dev_ready = denali_dev_ready;
chip->legacy.waitfunc = denali_waitfunc;
if (features & FEATURES__INDEX_ADDR) {
--
2.7.4
[PATCH v2 0/2] mtd: rawnand: denali: clean-up unnecessary hook and device reset
I sent this series on September, and Miquel replied this series was applied: http://patchwork.ozlabs.org/patch/967242/ But, It turned out not applied. I rebased it and resending now. Masahiro Yamada (2): mtd: rawnand: denali: remove ->dev_ready() hook mtd: rawnand: denali: remove denali_reset_banks() drivers/mtd/nand/raw/denali.c | 52 +-- 1 file changed, 1 insertion(+), 51 deletions(-) -- 2.7.4
[PATCH v2 1/2] mtd: rawnand: denali: remove ->dev_ready() hook
The Denali NAND IP has no way to read out the current signal level
of the R/B# pin. Instead, denali_dev_ready() checks if the R/B#
transition has already happened. (The INTR__INT_ACT interrupt is
asserted at the rising edge of the R/B# pin.) It is not a correct
way to implement the ->dev_ready() hook.
In fact, it has a drawback; in the nand_scan_ident phase, the chip
detection iterates over maxchips until it fails to find a homogeneous
chip. For the last loop, nand_reset() fails if no chip is there.
If ->dev_ready hook exists, nand_command(_lp) calls nand_wait_ready()
after NAND_CMD_RESET. However, we know denali_dev_ready() never
returns 1 unless there exists a chip that toggles R/B# in that chip
select. Then, nand_wait_ready() just ends up with wasting 400 msec,
in the end, shows the "timeout while waiting for chip to become ready"
warning.
Let's remove the mis-implemented dev_ready hook, and fallback to
sending the NAND_CMD_STATUS and nand_wait_status_ready(), which
bails out more quickly.
Signed-off-by: Masahiro Yamada
---
Changes in v2:
- Rebase
drivers/mtd/nand/raw/denali.c | 23 +--
1 file changed, 1 insertion(+), 22 deletions(-)
diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
index 830ea24..ead6e60 100644
--- a/drivers/mtd/nand/raw/denali.c
+++ b/drivers/mtd/nand/raw/denali.c
@@ -204,18 +204,6 @@ static uint32_t denali_wait_for_irq(struct
denali_nand_info *denali,
return denali->irq_status;
}
-static uint32_t denali_check_irq(struct denali_nand_info *denali)
-{
- unsigned long flags;
- uint32_t irq_status;
-
- spin_lock_irqsave(>irq_lock, flags);
- irq_status = denali->irq_status;
- spin_unlock_irqrestore(>irq_lock, flags);
-
- return irq_status;
-}
-
static void denali_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
{
struct mtd_info *mtd = nand_to_mtd(chip);
@@ -288,8 +276,7 @@ static void denali_cmd_ctrl(struct nand_chip *chip, int
dat, unsigned int ctrl)
return;
/*
-* Some commands are followed by chip->legacy.dev_ready or
-* chip->legacy.waitfunc.
+* Some commands are followed by chip->legacy.waitfunc.
* irq_status must be cleared here to catch the R/B# interrupt later.
*/
if (ctrl & NAND_CTRL_CHANGE)
@@ -298,13 +285,6 @@ static void denali_cmd_ctrl(struct nand_chip *chip, int
dat, unsigned int ctrl)
denali->host_write(denali, DENALI_BANK(denali) | type, dat);
}
-static int denali_dev_ready(struct nand_chip *chip)
-{
- struct denali_nand_info *denali = mtd_to_denali(nand_to_mtd(chip));
-
- return !!(denali_check_irq(denali) & INTR__INT_ACT);
-}
-
static int denali_check_erased_page(struct mtd_info *mtd,
struct nand_chip *chip, uint8_t *buf,
unsigned long uncor_ecc_flags,
@@ -1359,7 +1339,6 @@ int denali_init(struct denali_nand_info *denali)
chip->legacy.read_byte = denali_read_byte;
chip->legacy.write_byte = denali_write_byte;
chip->legacy.cmd_ctrl = denali_cmd_ctrl;
- chip->legacy.dev_ready = denali_dev_ready;
chip->legacy.waitfunc = denali_waitfunc;
if (features & FEATURES__INDEX_ADDR) {
--
2.7.4
[PATCH v2 0/2] mtd: rawnand: denali: clean-up unnecessary hook and device reset
I sent this series on September, and Miquel replied this series was applied: http://patchwork.ozlabs.org/patch/967242/ But, It turned out not applied. I rebased it and resending now. Masahiro Yamada (2): mtd: rawnand: denali: remove ->dev_ready() hook mtd: rawnand: denali: remove denali_reset_banks() drivers/mtd/nand/raw/denali.c | 52 +-- 1 file changed, 1 insertion(+), 51 deletions(-) -- 2.7.4
[PATCH v2 2/2] mtd: rawnand: denali: remove denali_reset_banks()
In nand_scan_ident(), the controller driver resets every NAND chip.
This is done by sending NAND_CMD_RESET. The Denali IP provides
another way to do the equivalent thing; if a bit is set in the
DEVICE_RESET register, the controller sends the RESET command to
the corresponding device. denali_reset_banks() uses it to reset
all devices beforehand.
This redundant reset sequence was needed to know the actual number
of chips before calling nand_scan_ident(); if DEVICE_RESET fails,
there is no chip in that chip select. Then, denali_reset_banks()
sets denali->max_banks to the number of detected chips.
As commit f486287d2372 ("mtd: nand: denali: fix bank reset function
to detect the number of chips") explained, nand_scan_ident() issued
Set Features (0xEF) command to all CS lines, some of which may not be
connected with a chip. Then, the driver would wait for R/B# response,
which never happens.
This problem was solved by commit 107b7d6a7ad4 ("mtd: rawnand: avoid
setting again the timings to mode 0 after a reset"). In the current
code, nand_setup_data_interface() is called from nand_scan_tail(),
which is invoked after the chip detection.
Now, we can really remove the redundant denali_nand_banks() by simply
passing the maximum number of chip selects supported by this IP
(typically 4 or 8) to nand_scan(). Let's leave all the chip detection
process to nand_scan_ident().
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mtd/nand/raw/denali.c | 29 -
1 file changed, 29 deletions(-)
diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
index ead6e60..2302010 100644
--- a/drivers/mtd/nand/raw/denali.c
+++ b/drivers/mtd/nand/raw/denali.c
@@ -1045,29 +1045,6 @@ static int denali_setup_data_interface(struct nand_chip
*chip, int chipnr,
return 0;
}
-static void denali_reset_banks(struct denali_nand_info *denali)
-{
- u32 irq_status;
- int i;
-
- for (i = 0; i < denali->max_banks; i++) {
- denali->active_bank = i;
-
- denali_reset_irq(denali);
-
- iowrite32(DEVICE_RESET__BANK(i),
- denali->reg + DEVICE_RESET);
-
- irq_status = denali_wait_for_irq(denali,
- INTR__RST_COMP | INTR__INT_ACT | INTR__TIME_OUT);
- if (!(irq_status & INTR__INT_ACT))
- break;
- }
-
- dev_dbg(denali->dev, "%d chips connected\n", i);
- denali->max_banks = i;
-}
-
static void denali_hw_init(struct denali_nand_info *denali)
{
/*
@@ -1321,12 +1298,6 @@ int denali_init(struct denali_nand_info *denali)
}
denali_enable_irq(denali);
- denali_reset_banks(denali);
- if (!denali->max_banks) {
- /* Error out earlier if no chip is found for some reasons. */
- ret = -ENODEV;
- goto disable_irq;
- }
denali->active_bank = DENALI_INVALID_BANK;
--
2.7.4
[PATCH v2 2/2] mtd: rawnand: denali: remove denali_reset_banks()
In nand_scan_ident(), the controller driver resets every NAND chip.
This is done by sending NAND_CMD_RESET. The Denali IP provides
another way to do the equivalent thing; if a bit is set in the
DEVICE_RESET register, the controller sends the RESET command to
the corresponding device. denali_reset_banks() uses it to reset
all devices beforehand.
This redundant reset sequence was needed to know the actual number
of chips before calling nand_scan_ident(); if DEVICE_RESET fails,
there is no chip in that chip select. Then, denali_reset_banks()
sets denali->max_banks to the number of detected chips.
As commit f486287d2372 ("mtd: nand: denali: fix bank reset function
to detect the number of chips") explained, nand_scan_ident() issued
Set Features (0xEF) command to all CS lines, some of which may not be
connected with a chip. Then, the driver would wait for R/B# response,
which never happens.
This problem was solved by commit 107b7d6a7ad4 ("mtd: rawnand: avoid
setting again the timings to mode 0 after a reset"). In the current
code, nand_setup_data_interface() is called from nand_scan_tail(),
which is invoked after the chip detection.
Now, we can really remove the redundant denali_nand_banks() by simply
passing the maximum number of chip selects supported by this IP
(typically 4 or 8) to nand_scan(). Let's leave all the chip detection
process to nand_scan_ident().
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mtd/nand/raw/denali.c | 29 -
1 file changed, 29 deletions(-)
diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
index ead6e60..2302010 100644
--- a/drivers/mtd/nand/raw/denali.c
+++ b/drivers/mtd/nand/raw/denali.c
@@ -1045,29 +1045,6 @@ static int denali_setup_data_interface(struct nand_chip
*chip, int chipnr,
return 0;
}
-static void denali_reset_banks(struct denali_nand_info *denali)
-{
- u32 irq_status;
- int i;
-
- for (i = 0; i < denali->max_banks; i++) {
- denali->active_bank = i;
-
- denali_reset_irq(denali);
-
- iowrite32(DEVICE_RESET__BANK(i),
- denali->reg + DEVICE_RESET);
-
- irq_status = denali_wait_for_irq(denali,
- INTR__RST_COMP | INTR__INT_ACT | INTR__TIME_OUT);
- if (!(irq_status & INTR__INT_ACT))
- break;
- }
-
- dev_dbg(denali->dev, "%d chips connected\n", i);
- denali->max_banks = i;
-}
-
static void denali_hw_init(struct denali_nand_info *denali)
{
/*
@@ -1321,12 +1298,6 @@ int denali_init(struct denali_nand_info *denali)
}
denali_enable_irq(denali);
- denali_reset_banks(denali);
- if (!denali->max_banks) {
- /* Error out earlier if no chip is found for some reasons. */
- ret = -ENODEV;
- goto disable_irq;
- }
denali->active_bank = DENALI_INVALID_BANK;
--
2.7.4
linux-next: Tree for Nov 28
Hi all, Changes since 20181127: The vfs tree gained a conflict against the ext3 tree. Non-merge commits (relative to Linus' tree): 5084 5241 files changed, 259238 insertions(+), 151877 deletions(-) I have created today's linux-next tree at git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git (patches at http://www.kernel.org/pub/linux/kernel/next/ ). If you are tracking the linux-next tree using git, you should not use "git pull" to do so as that will try to merge the new linux-next release with the old one. You should use "git fetch" and checkout or reset to the new master. You can see which trees have been included by looking in the Next/Trees file in the source. There are also quilt-import.log and merge.log files in the Next directory. Between each merge, the tree was built with a ppc64_defconfig for powerpc, an allmodconfig for x86_64, a multi_v7_defconfig for arm and a native build of tools/perf. After the final fixups (if any), I do an x86_64 modules_install followed by builds for x86_64 allnoconfig, powerpc allnoconfig (32 and 64 bit), ppc44x_defconfig, allyesconfig and pseries_le_defconfig and i386, sparc and sparc64 defconfig. And finally, a simple boot test of the powerpc pseries_le_defconfig kernel in qemu (with and without kvm enabled). Below is a summary of the state of the merge. I am currently merging 286 trees (counting Linus' and 67 trees of bug fix patches pending for the current merge release). Stats about the size of the tree over time can be seen at http://neuling.org/linux-next-size.html . Status of my local build tests will be at http://kisskb.ellerman.id.au/linux-next . If maintainers want to give advice about cross compilers/configs that work, we are always open to add more builds. Thanks to Randy Dunlap for doing many randconfig builds. And to Paul Gortmaker for triage and bug fixes. -- Cheers, Stephen Rothwell $ git checkout master $ git reset --hard stable Merging origin/master (ef78e5ec9214 ia64: export node_distance function) Merging fixes/master (595c647d341e sparc: suppress the implicit-fallthrough warnings) Merging kbuild-current/fixes (ccda4af0f4b9 Linux 4.20-rc2) Merging arc-current/for-curr (6b04114f6fae arc: [devboards] Add support of NFSv3 ACL) Merging arm-current/fixes (e46daee53bb5 ARM: 8806/1: kprobes: Fix false positive with FORTIFY_SOURCE) Merging arm64-fixes/for-next/fixes (4f9f49646a57 arm64: cpufeature: Fix mismerge of CONFIG_ARM64_SSBD block) Merging m68k-current/for-linus (58c116fb7dc6 m68k/sun3: Remove is_medusa and m68k_pgtable_cachemode) Merging powerpc-fixes/fixes (b2fed34a628d selftests/powerpc: Adjust wild_bctr to build with old binutils) Merging sparc/master (86322ba9571a arch/sparc: Use kzalloc_node) Merging fscrypt-current/for-stable (ae64f9bd1d36 Linux 4.15-rc2) Merging net/master (93143f846b27 Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf) Merging bpf/master (2b9034b5eadd sparc: Adjust bpf JIT prologue for PSEUDO calls.) Merging ipsec/master (4a135e538962 xfrm_user: fix freeing of xfrm states on acquire) Merging netfilter/master (53ca0f2fec39 netfilter: nf_conncount: remove wrong condition check routine) Merging ipvs/master (feb9f55c33e5 netfilter: nft_dynset: allow dynamic updates of non-anonymous set) Merging wireless-drivers/master (2e6e902d1850 Linux 4.20-rc4) Merging mac80211/master (113f3aaa81bd cfg80211: Prevent regulatory restore during STA disconnect in concurrent interfaces) Merging rdma-fixes/for-rc (75b7b86bdb0d IB/mlx5: Fix page fault handling for MW) Merging sound-current/for-linus (b8e0be79d000 Merge tag 'asoc-v4.20-rc4' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus) Merging sound-asoc-fixes/for-linus (8f47ccdd70fd Merge branch 'asoc-4.20' into asoc-linus) Merging regmap-fixes/for-linus (9ff01193a20d Linux 4.20-rc3) Merging regulator-fixes/for-linus (84f59cf6d5fc Merge branch 'regulator-4.20' into regulator-linus) Merging spi-fixes/for-linus (0ca420a3bddf Merge branch 'spi-4.20' into spi-linus) Merging pci-current/for-linus (94ea01a6d9a6 PCI: Fix incorrect value returned from pcie_get_speed_cap()) Merging driver-core.current/driver-core-linus (a66d972465d1 devres: Align data[] to ARCH_KMALLOC_MINALIGN) Merging tty.current/tty-linus (2a48602615e0 tty: do not set TTY_IO_ERROR flag if console port) Merging usb.current/usb-linus (effd14f66cc1 usb: core: quirks: add RESET_RESUME quirk for Cherry G230 Stream series) Merging usb-gadget-fixes/fixes (069caf5950df USB: omap_udc: fix rejection of out transfers when DMA is used) Merging usb-serial-fixes/usb-linus (ccda4af0f4b9 Linux 4.20-rc2) Merging usb-chipidea-fixes/ci-for-usb-stable (a930d8bd94d8 usb: chipidea: Always build ULPI code) Merging phy/fixes (c88520db18ba phy: qcom-qusb2: Fix HSTX_TRIM tuning with fused value for SDM845) Merging staging.current/staging-linus (c648284f6c96 M
linux-next: Tree for Nov 28
Hi all, Changes since 20181127: The vfs tree gained a conflict against the ext3 tree. Non-merge commits (relative to Linus' tree): 5084 5241 files changed, 259238 insertions(+), 151877 deletions(-) I have created today's linux-next tree at git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git (patches at http://www.kernel.org/pub/linux/kernel/next/ ). If you are tracking the linux-next tree using git, you should not use "git pull" to do so as that will try to merge the new linux-next release with the old one. You should use "git fetch" and checkout or reset to the new master. You can see which trees have been included by looking in the Next/Trees file in the source. There are also quilt-import.log and merge.log files in the Next directory. Between each merge, the tree was built with a ppc64_defconfig for powerpc, an allmodconfig for x86_64, a multi_v7_defconfig for arm and a native build of tools/perf. After the final fixups (if any), I do an x86_64 modules_install followed by builds for x86_64 allnoconfig, powerpc allnoconfig (32 and 64 bit), ppc44x_defconfig, allyesconfig and pseries_le_defconfig and i386, sparc and sparc64 defconfig. And finally, a simple boot test of the powerpc pseries_le_defconfig kernel in qemu (with and without kvm enabled). Below is a summary of the state of the merge. I am currently merging 286 trees (counting Linus' and 67 trees of bug fix patches pending for the current merge release). Stats about the size of the tree over time can be seen at http://neuling.org/linux-next-size.html . Status of my local build tests will be at http://kisskb.ellerman.id.au/linux-next . If maintainers want to give advice about cross compilers/configs that work, we are always open to add more builds. Thanks to Randy Dunlap for doing many randconfig builds. And to Paul Gortmaker for triage and bug fixes. -- Cheers, Stephen Rothwell $ git checkout master $ git reset --hard stable Merging origin/master (ef78e5ec9214 ia64: export node_distance function) Merging fixes/master (595c647d341e sparc: suppress the implicit-fallthrough warnings) Merging kbuild-current/fixes (ccda4af0f4b9 Linux 4.20-rc2) Merging arc-current/for-curr (6b04114f6fae arc: [devboards] Add support of NFSv3 ACL) Merging arm-current/fixes (e46daee53bb5 ARM: 8806/1: kprobes: Fix false positive with FORTIFY_SOURCE) Merging arm64-fixes/for-next/fixes (4f9f49646a57 arm64: cpufeature: Fix mismerge of CONFIG_ARM64_SSBD block) Merging m68k-current/for-linus (58c116fb7dc6 m68k/sun3: Remove is_medusa and m68k_pgtable_cachemode) Merging powerpc-fixes/fixes (b2fed34a628d selftests/powerpc: Adjust wild_bctr to build with old binutils) Merging sparc/master (86322ba9571a arch/sparc: Use kzalloc_node) Merging fscrypt-current/for-stable (ae64f9bd1d36 Linux 4.15-rc2) Merging net/master (93143f846b27 Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf) Merging bpf/master (2b9034b5eadd sparc: Adjust bpf JIT prologue for PSEUDO calls.) Merging ipsec/master (4a135e538962 xfrm_user: fix freeing of xfrm states on acquire) Merging netfilter/master (53ca0f2fec39 netfilter: nf_conncount: remove wrong condition check routine) Merging ipvs/master (feb9f55c33e5 netfilter: nft_dynset: allow dynamic updates of non-anonymous set) Merging wireless-drivers/master (2e6e902d1850 Linux 4.20-rc4) Merging mac80211/master (113f3aaa81bd cfg80211: Prevent regulatory restore during STA disconnect in concurrent interfaces) Merging rdma-fixes/for-rc (75b7b86bdb0d IB/mlx5: Fix page fault handling for MW) Merging sound-current/for-linus (b8e0be79d000 Merge tag 'asoc-v4.20-rc4' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus) Merging sound-asoc-fixes/for-linus (8f47ccdd70fd Merge branch 'asoc-4.20' into asoc-linus) Merging regmap-fixes/for-linus (9ff01193a20d Linux 4.20-rc3) Merging regulator-fixes/for-linus (84f59cf6d5fc Merge branch 'regulator-4.20' into regulator-linus) Merging spi-fixes/for-linus (0ca420a3bddf Merge branch 'spi-4.20' into spi-linus) Merging pci-current/for-linus (94ea01a6d9a6 PCI: Fix incorrect value returned from pcie_get_speed_cap()) Merging driver-core.current/driver-core-linus (a66d972465d1 devres: Align data[] to ARCH_KMALLOC_MINALIGN) Merging tty.current/tty-linus (2a48602615e0 tty: do not set TTY_IO_ERROR flag if console port) Merging usb.current/usb-linus (effd14f66cc1 usb: core: quirks: add RESET_RESUME quirk for Cherry G230 Stream series) Merging usb-gadget-fixes/fixes (069caf5950df USB: omap_udc: fix rejection of out transfers when DMA is used) Merging usb-serial-fixes/usb-linus (ccda4af0f4b9 Linux 4.20-rc2) Merging usb-chipidea-fixes/ci-for-usb-stable (a930d8bd94d8 usb: chipidea: Always build ULPI code) Merging phy/fixes (c88520db18ba phy: qcom-qusb2: Fix HSTX_TRIM tuning with fused value for SDM845) Merging staging.current/staging-linus (c648284f6c96 M
[PATCH V2 0/4] Add i.MX system controller RTC driver
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as system controller, the system controller is in charge of system power, clock and secure RTC etc. management, Linux kernel has to communicate with system controller via MU (message unit) IPC to do RTC operation. Since the RTC set time MUST to be done in secure EL3 mode (required by system controller firmware) and ALARM functions needs to be done with general MU IRQ handle, these are NOT ready NOW, so this patch ONLY supports RTC read time for now. Note that this patch set is based on [V4,5/5] defconfig: arm64: add imx8qxp support, https://patchwork.kernel.org/patch/10677315/ Anson Huang (4): dt-bindings: rtc: add binding doc for i.MX system controller RTC driver rtc: add i.MX system controller RTC support defconfig: arm64: add i.MX system controller RTC support ARM64: dts: imx: add i.MX8QXP system controller RTC support .../devicetree/bindings/rtc/rtc-imx-sc.txt | 10 ++ arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 4 + arch/arm64/configs/defconfig | 1 + drivers/rtc/Kconfig| 6 ++ drivers/rtc/Makefile | 1 + drivers/rtc/rtc-imx-sc.c | 107 + 6 files changed, 129 insertions(+) create mode 100644 Documentation/devicetree/bindings/rtc/rtc-imx-sc.txt create mode 100644 drivers/rtc/rtc-imx-sc.c -- 2.7.4
[PATCH V2 1/4] dt-bindings: rtc: add binding doc for i.MX system controller RTC driver
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as
system controller, the system controller is in charge of system
power, clock and secure RTC etc. management, Linux kernel
has to communicate with system controller via MU (message unit)
IPC to do RTC operation, this patch adds binding doc for i.MX
system controller RTC driver.
Signed-off-by: Anson Huang
---
no change since V1.
Documentation/devicetree/bindings/rtc/rtc-imx-sc.txt | 10 ++
1 file changed, 10 insertions(+)
create mode 100644 Documentation/devicetree/bindings/rtc/rtc-imx-sc.txt
diff --git a/Documentation/devicetree/bindings/rtc/rtc-imx-sc.txt
b/Documentation/devicetree/bindings/rtc/rtc-imx-sc.txt
new file mode 100644
index 000..d6e2353
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/rtc-imx-sc.txt
@@ -0,0 +1,10 @@
+* NXP i.MX System Controller Real Time Clock
+
+Required properties:
+- compatible: should be "nxp,imx8qxp-sc-rtc";
+
+Example:
+
+rtc: rtc {
+ compatible = "nxp,imx8qxp-sc-rtc";
+};
--
2.7.4
[PATCH V2 4/4] ARM64: dts: imx: add i.MX8QXP system controller RTC support
Add i.MX8QXP system controller RTC support.
Signed-off-by: Anson Huang
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 9155d45..ef57db6 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -433,4 +433,8 @@
#size-cells = <1>;
ranges = <0x5f00 0x0 0x5f00 0x100>;
};
+
+ rtc: rtc {
+ compatible = "nxp,imx8qxp-sc-rtc";
+ };
};
--
2.7.4
[PATCH V2 2/4] rtc: add i.MX system controller RTC support
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
inside, the system controller is in charge of controlling power,
clock and secure rtc etc..
This patch adds i.MX system controller RTC driver support,
Linux kernel has to communicate with system controller via MU
(message unit) IPC to set/get RTC time and other alarm functions,
since the RTC set time needs to be done in secure EL3 mode (required
by system controller firmware) and alarm functions needs to be done
with general MU IRQ handle, these depend on other components which
are NOT ready, so this patch ONLY enables the RTC time read.
Signed-off-by: Anson Huang
---
changes since V1:
- sort module in Makefile alphabetically;
- remove boiler plate license text;
- use devm_rtc_allocate_device and rtc_register_device to register the
RTC.
drivers/rtc/Kconfig | 6 +++
drivers/rtc/Makefile | 1 +
drivers/rtc/rtc-imx-sc.c | 107 +++
3 files changed, 114 insertions(+)
create mode 100644 drivers/rtc/rtc-imx-sc.c
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index a819ef0..3b9642e 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1677,6 +1677,12 @@ config RTC_DRV_SNVS
This driver can also be built as a module, if so, the module
will be called "rtc-snvs".
+config RTC_DRV_IMX_SC
+ tristate "NXP i.MX System Controller RTC support"
+ help
+ If you say yes here you get support for the NXP i.MX System
+ Controller RTC module.
+
config RTC_DRV_SIRFSOC
tristate "SiRFSOC RTC"
depends on ARCH_SIRF
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 290c173..f97c05e 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -75,6 +75,7 @@ obj-$(CONFIG_RTC_DRV_GOLDFISH)+= rtc-goldfish.o
obj-$(CONFIG_RTC_DRV_HID_SENSOR_TIME) += rtc-hid-sensor-time.o
obj-$(CONFIG_RTC_DRV_HYM8563) += rtc-hym8563.o
obj-$(CONFIG_RTC_DRV_IMXDI)+= rtc-imxdi.o
+obj-$(CONFIG_RTC_DRV_IMX_SC) += rtc-imx-sc.o
obj-$(CONFIG_RTC_DRV_ISL12022) += rtc-isl12022.o
obj-$(CONFIG_RTC_DRV_ISL12026) += rtc-isl12026.o
obj-$(CONFIG_RTC_DRV_ISL1208) += rtc-isl1208.o
diff --git a/drivers/rtc/rtc-imx-sc.c b/drivers/rtc/rtc-imx-sc.c
new file mode 100644
index 000..7212e38
--- /dev/null
+++ b/drivers/rtc/rtc-imx-sc.c
@@ -0,0 +1,107 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define IMX_SC_TIMER_FUNC_GET_RTC_SEC1970 9
+#define IMX_SC_TIMER_FUNC_SET_RTC_TIME 6
+
+struct imx_sc_ipc *rtc_ipc_handle;
+struct rtc_device *rtc;
+
+struct imx_sc_msg_req_timer_get_rtc_time {
+ struct imx_sc_rpc_msg hdr;
+} __packed;
+
+struct imx_sc_msg_resp_timer_get_rtc_time {
+ struct imx_sc_rpc_msg hdr;
+ u32 time;
+} __packed;
+
+static int imx_sc_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+ struct imx_sc_msg_resp_timer_get_rtc_time *resp;
+ struct imx_sc_msg_req_timer_get_rtc_time msg;
+ struct imx_sc_rpc_msg *hdr =
+ int ret;
+
+ hdr->ver = IMX_SC_RPC_VERSION;
+ hdr->svc = IMX_SC_RPC_SVC_TIMER;
+ hdr->func = IMX_SC_TIMER_FUNC_GET_RTC_SEC1970;
+ hdr->size = 1;
+
+ ret = imx_scu_call_rpc(rtc_ipc_handle, , true);
+ if (ret) {
+ pr_err("read rtc time failed, ret %d\n", ret);
+ return ret;
+ }
+
+ resp = (struct imx_sc_msg_resp_timer_get_rtc_time *)
+ rtc_time_to_tm(resp->time, tm);
+
+ return 0;
+}
+
+static const struct rtc_class_ops imx_sc_rtc_ops = {
+ .read_time = imx_sc_rtc_read_time,
+};
+
+static int imx_sc_rtc_probe(struct platform_device *pdev)
+{
+ int ret;
+
+ ret = imx_scu_get_handle(_ipc_handle);
+ if (ret) {
+ if (ret == -EPROBE_DEFER)
+ return ret;
+
+ dev_err(>dev, "failed to get ipc handle: %d!\n", ret);
+ return ret;
+ }
+
+ rtc = devm_rtc_allocate_device(>dev);
+ if (IS_ERR(rtc)) {
+ ret = PTR_ERR(rtc);
+ return ret;
+ }
+
+ rtc->ops = _sc_rtc_ops;
+ rtc->range_min = 0;
+ rtc->range_max = U32_MAX;
+
+ ret = rtc_register_device(rtc);
+ if (ret) {
+ dev_err(>dev, "failed to register rtc: %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct of_device_id imx_sc_dt_ids[] = {
+ { .compatible = "nxp,imx8qxp-sc-rtc", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, imx_sc_dt_ids);
+
+static struct platform_driver imx_sc_rtc_driver = {
+ .driver = {
+ .name = "imx-sc-rtc",
+ .of_match_table = imx_sc_dt_ids,
+ },
+ .probe = imx_sc_rtc_probe,
+};
+module_platform_driver(imx_sc_rtc_driver);
+
+MODULE_AUTHOR("Anson Huang ");
+MODULE_DESCRIPTION("NXP
[PATCH V2 3/4] defconfig: arm64: add i.MX system controller RTC support
This patch enables CONFIG_RTC_DRV_IMX_SC as module by default. Signed-off-by: Anson Huang --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 6d224f7..e3df5dd 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -573,6 +573,7 @@ CONFIG_RTC_DRV_PL031=y CONFIG_RTC_DRV_SUN6I=y CONFIG_RTC_DRV_ARMADA38X=y CONFIG_RTC_DRV_TEGRA=y +CONFIG_RTC_DRV_IMX_SC=m CONFIG_RTC_DRV_XGENE=y CONFIG_DMADEVICES=y CONFIG_DMA_BCM2835=m -- 2.7.4
[PATCH V2 0/4] Add i.MX system controller RTC driver
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as system controller, the system controller is in charge of system power, clock and secure RTC etc. management, Linux kernel has to communicate with system controller via MU (message unit) IPC to do RTC operation. Since the RTC set time MUST to be done in secure EL3 mode (required by system controller firmware) and ALARM functions needs to be done with general MU IRQ handle, these are NOT ready NOW, so this patch ONLY supports RTC read time for now. Note that this patch set is based on [V4,5/5] defconfig: arm64: add imx8qxp support, https://patchwork.kernel.org/patch/10677315/ Anson Huang (4): dt-bindings: rtc: add binding doc for i.MX system controller RTC driver rtc: add i.MX system controller RTC support defconfig: arm64: add i.MX system controller RTC support ARM64: dts: imx: add i.MX8QXP system controller RTC support .../devicetree/bindings/rtc/rtc-imx-sc.txt | 10 ++ arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 4 + arch/arm64/configs/defconfig | 1 + drivers/rtc/Kconfig| 6 ++ drivers/rtc/Makefile | 1 + drivers/rtc/rtc-imx-sc.c | 107 + 6 files changed, 129 insertions(+) create mode 100644 Documentation/devicetree/bindings/rtc/rtc-imx-sc.txt create mode 100644 drivers/rtc/rtc-imx-sc.c -- 2.7.4
[PATCH V2 1/4] dt-bindings: rtc: add binding doc for i.MX system controller RTC driver
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as
system controller, the system controller is in charge of system
power, clock and secure RTC etc. management, Linux kernel
has to communicate with system controller via MU (message unit)
IPC to do RTC operation, this patch adds binding doc for i.MX
system controller RTC driver.
Signed-off-by: Anson Huang
---
no change since V1.
Documentation/devicetree/bindings/rtc/rtc-imx-sc.txt | 10 ++
1 file changed, 10 insertions(+)
create mode 100644 Documentation/devicetree/bindings/rtc/rtc-imx-sc.txt
diff --git a/Documentation/devicetree/bindings/rtc/rtc-imx-sc.txt
b/Documentation/devicetree/bindings/rtc/rtc-imx-sc.txt
new file mode 100644
index 000..d6e2353
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/rtc-imx-sc.txt
@@ -0,0 +1,10 @@
+* NXP i.MX System Controller Real Time Clock
+
+Required properties:
+- compatible: should be "nxp,imx8qxp-sc-rtc";
+
+Example:
+
+rtc: rtc {
+ compatible = "nxp,imx8qxp-sc-rtc";
+};
--
2.7.4
[PATCH V2 4/4] ARM64: dts: imx: add i.MX8QXP system controller RTC support
Add i.MX8QXP system controller RTC support.
Signed-off-by: Anson Huang
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 9155d45..ef57db6 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -433,4 +433,8 @@
#size-cells = <1>;
ranges = <0x5f00 0x0 0x5f00 0x100>;
};
+
+ rtc: rtc {
+ compatible = "nxp,imx8qxp-sc-rtc";
+ };
};
--
2.7.4
[PATCH V2 2/4] rtc: add i.MX system controller RTC support
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
inside, the system controller is in charge of controlling power,
clock and secure rtc etc..
This patch adds i.MX system controller RTC driver support,
Linux kernel has to communicate with system controller via MU
(message unit) IPC to set/get RTC time and other alarm functions,
since the RTC set time needs to be done in secure EL3 mode (required
by system controller firmware) and alarm functions needs to be done
with general MU IRQ handle, these depend on other components which
are NOT ready, so this patch ONLY enables the RTC time read.
Signed-off-by: Anson Huang
---
changes since V1:
- sort module in Makefile alphabetically;
- remove boiler plate license text;
- use devm_rtc_allocate_device and rtc_register_device to register the
RTC.
drivers/rtc/Kconfig | 6 +++
drivers/rtc/Makefile | 1 +
drivers/rtc/rtc-imx-sc.c | 107 +++
3 files changed, 114 insertions(+)
create mode 100644 drivers/rtc/rtc-imx-sc.c
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index a819ef0..3b9642e 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1677,6 +1677,12 @@ config RTC_DRV_SNVS
This driver can also be built as a module, if so, the module
will be called "rtc-snvs".
+config RTC_DRV_IMX_SC
+ tristate "NXP i.MX System Controller RTC support"
+ help
+ If you say yes here you get support for the NXP i.MX System
+ Controller RTC module.
+
config RTC_DRV_SIRFSOC
tristate "SiRFSOC RTC"
depends on ARCH_SIRF
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 290c173..f97c05e 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -75,6 +75,7 @@ obj-$(CONFIG_RTC_DRV_GOLDFISH)+= rtc-goldfish.o
obj-$(CONFIG_RTC_DRV_HID_SENSOR_TIME) += rtc-hid-sensor-time.o
obj-$(CONFIG_RTC_DRV_HYM8563) += rtc-hym8563.o
obj-$(CONFIG_RTC_DRV_IMXDI)+= rtc-imxdi.o
+obj-$(CONFIG_RTC_DRV_IMX_SC) += rtc-imx-sc.o
obj-$(CONFIG_RTC_DRV_ISL12022) += rtc-isl12022.o
obj-$(CONFIG_RTC_DRV_ISL12026) += rtc-isl12026.o
obj-$(CONFIG_RTC_DRV_ISL1208) += rtc-isl1208.o
diff --git a/drivers/rtc/rtc-imx-sc.c b/drivers/rtc/rtc-imx-sc.c
new file mode 100644
index 000..7212e38
--- /dev/null
+++ b/drivers/rtc/rtc-imx-sc.c
@@ -0,0 +1,107 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define IMX_SC_TIMER_FUNC_GET_RTC_SEC1970 9
+#define IMX_SC_TIMER_FUNC_SET_RTC_TIME 6
+
+struct imx_sc_ipc *rtc_ipc_handle;
+struct rtc_device *rtc;
+
+struct imx_sc_msg_req_timer_get_rtc_time {
+ struct imx_sc_rpc_msg hdr;
+} __packed;
+
+struct imx_sc_msg_resp_timer_get_rtc_time {
+ struct imx_sc_rpc_msg hdr;
+ u32 time;
+} __packed;
+
+static int imx_sc_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+ struct imx_sc_msg_resp_timer_get_rtc_time *resp;
+ struct imx_sc_msg_req_timer_get_rtc_time msg;
+ struct imx_sc_rpc_msg *hdr =
+ int ret;
+
+ hdr->ver = IMX_SC_RPC_VERSION;
+ hdr->svc = IMX_SC_RPC_SVC_TIMER;
+ hdr->func = IMX_SC_TIMER_FUNC_GET_RTC_SEC1970;
+ hdr->size = 1;
+
+ ret = imx_scu_call_rpc(rtc_ipc_handle, , true);
+ if (ret) {
+ pr_err("read rtc time failed, ret %d\n", ret);
+ return ret;
+ }
+
+ resp = (struct imx_sc_msg_resp_timer_get_rtc_time *)
+ rtc_time_to_tm(resp->time, tm);
+
+ return 0;
+}
+
+static const struct rtc_class_ops imx_sc_rtc_ops = {
+ .read_time = imx_sc_rtc_read_time,
+};
+
+static int imx_sc_rtc_probe(struct platform_device *pdev)
+{
+ int ret;
+
+ ret = imx_scu_get_handle(_ipc_handle);
+ if (ret) {
+ if (ret == -EPROBE_DEFER)
+ return ret;
+
+ dev_err(>dev, "failed to get ipc handle: %d!\n", ret);
+ return ret;
+ }
+
+ rtc = devm_rtc_allocate_device(>dev);
+ if (IS_ERR(rtc)) {
+ ret = PTR_ERR(rtc);
+ return ret;
+ }
+
+ rtc->ops = _sc_rtc_ops;
+ rtc->range_min = 0;
+ rtc->range_max = U32_MAX;
+
+ ret = rtc_register_device(rtc);
+ if (ret) {
+ dev_err(>dev, "failed to register rtc: %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct of_device_id imx_sc_dt_ids[] = {
+ { .compatible = "nxp,imx8qxp-sc-rtc", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, imx_sc_dt_ids);
+
+static struct platform_driver imx_sc_rtc_driver = {
+ .driver = {
+ .name = "imx-sc-rtc",
+ .of_match_table = imx_sc_dt_ids,
+ },
+ .probe = imx_sc_rtc_probe,
+};
+module_platform_driver(imx_sc_rtc_driver);
+
+MODULE_AUTHOR("Anson Huang ");
+MODULE_DESCRIPTION("NXP
[PATCH V2 3/4] defconfig: arm64: add i.MX system controller RTC support
This patch enables CONFIG_RTC_DRV_IMX_SC as module by default. Signed-off-by: Anson Huang --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 6d224f7..e3df5dd 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -573,6 +573,7 @@ CONFIG_RTC_DRV_PL031=y CONFIG_RTC_DRV_SUN6I=y CONFIG_RTC_DRV_ARMADA38X=y CONFIG_RTC_DRV_TEGRA=y +CONFIG_RTC_DRV_IMX_SC=m CONFIG_RTC_DRV_XGENE=y CONFIG_DMADEVICES=y CONFIG_DMA_BCM2835=m -- 2.7.4
Re: [PATCH v5 1/2] gpio: Add driver for PC Engines APU boards
Hi Florian, Thank you for the patch! Yet something to improve: [auto build test ERROR on gpio/for-next] [also build test ERROR on v4.20-rc4 next-20181127] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Florian-Eckert/Add-device-driver-for-APU2-APU3-GPIOs/20181128-045043 base: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git for-next config: i386-allmodconfig (attached as .config) compiler: gcc-7 (Debian 7.3.0-1) 7.3.0 reproduce: # save the attached .config to linux build tree make ARCH=i386 All error/warnings (new ones prefixed by >>): In file included from drivers/gpio/gpio-apu.c:13:0: >> include/linux/module.h:213:1: error: expected ',' or ';' before 'extern' extern typeof(name) __mod_##type##__##name##_device_table \ ^ >> drivers/gpio/gpio-apu.c:163:1: note: in expansion of macro >> 'MODULE_DEVICE_TABLE' MODULE_DEVICE_TABLE(dmi, apu2_gpio_dmi_table); ^~~ vim +213 include/linux/module.h ^1da177e Linus Torvalds2005-04-16 209 cff26a51 Rusty Russell 2014-02-03 210 #ifdef MODULE cff26a51 Rusty Russell 2014-02-03 211 /* Creates an alias so file2alias.c can find device table. */ ^1da177e Linus Torvalds2005-04-16 212 #define MODULE_DEVICE_TABLE(type, name) \ 0bf8bf50 Matthias Kaehlcke 2017-07-24 @213 extern typeof(name) __mod_##type##__##name##_device_table \ cff26a51 Rusty Russell 2014-02-03 214__attribute__ ((unused, alias(__stringify(name cff26a51 Rusty Russell 2014-02-03 215 #else /* !MODULE */ cff26a51 Rusty Russell 2014-02-03 216 #define MODULE_DEVICE_TABLE(type, name) cff26a51 Rusty Russell 2014-02-03 217 #endif ^1da177e Linus Torvalds2005-04-16 218 :: The code at line 213 was first introduced by commit :: 0bf8bf50eddc7511b52461bae798cbfaa0157a34 module: Remove const attribute from alias for MODULE_DEVICE_TABLE :: TO: Matthias Kaehlcke :: CC: Jessica Yu --- 0-DAY kernel test infrastructureOpen Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation .config.gz Description: application/gzip
Re: [PATCH v5 1/2] gpio: Add driver for PC Engines APU boards
Hi Florian, Thank you for the patch! Yet something to improve: [auto build test ERROR on gpio/for-next] [also build test ERROR on v4.20-rc4 next-20181127] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Florian-Eckert/Add-device-driver-for-APU2-APU3-GPIOs/20181128-045043 base: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git for-next config: i386-allmodconfig (attached as .config) compiler: gcc-7 (Debian 7.3.0-1) 7.3.0 reproduce: # save the attached .config to linux build tree make ARCH=i386 All error/warnings (new ones prefixed by >>): In file included from drivers/gpio/gpio-apu.c:13:0: >> include/linux/module.h:213:1: error: expected ',' or ';' before 'extern' extern typeof(name) __mod_##type##__##name##_device_table \ ^ >> drivers/gpio/gpio-apu.c:163:1: note: in expansion of macro >> 'MODULE_DEVICE_TABLE' MODULE_DEVICE_TABLE(dmi, apu2_gpio_dmi_table); ^~~ vim +213 include/linux/module.h ^1da177e Linus Torvalds2005-04-16 209 cff26a51 Rusty Russell 2014-02-03 210 #ifdef MODULE cff26a51 Rusty Russell 2014-02-03 211 /* Creates an alias so file2alias.c can find device table. */ ^1da177e Linus Torvalds2005-04-16 212 #define MODULE_DEVICE_TABLE(type, name) \ 0bf8bf50 Matthias Kaehlcke 2017-07-24 @213 extern typeof(name) __mod_##type##__##name##_device_table \ cff26a51 Rusty Russell 2014-02-03 214__attribute__ ((unused, alias(__stringify(name cff26a51 Rusty Russell 2014-02-03 215 #else /* !MODULE */ cff26a51 Rusty Russell 2014-02-03 216 #define MODULE_DEVICE_TABLE(type, name) cff26a51 Rusty Russell 2014-02-03 217 #endif ^1da177e Linus Torvalds2005-04-16 218 :: The code at line 213 was first introduced by commit :: 0bf8bf50eddc7511b52461bae798cbfaa0157a34 module: Remove const attribute from alias for MODULE_DEVICE_TABLE :: TO: Matthias Kaehlcke :: CC: Jessica Yu --- 0-DAY kernel test infrastructureOpen Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation .config.gz Description: application/gzip
Re: [PATCH v17 18/23] platform/x86: Intel SGX driver
On Sat, Nov 24, 2018 at 08:45:34AM -0800, Jarkko Sakkinen wrote: > On Fri, Nov 23, 2018 at 04:39:23AM -0600, Dr. Greg wrote: > > Jarkko, when this driver lands it will set the SGX ABI in stone for > > Linux. It would be very, very helpful to the development community if > > there was some official guidance from Intel on whether or not FLC will > > be a universal feature on all hardware and the date that is going to > > happen or has happened. > > I seriously don't know but I can take this message to the mothership... LC enabling is essentially a platform vendors choice, not Intels choice, like many other CPU features that Linux is dependent on. Of course, if Linux ends supporting only LC that will without doubt have a big impact on vendors so in that way it is indirectly also communitys choice. /Jarkko
Re: [PATCH v17 18/23] platform/x86: Intel SGX driver
On Sat, Nov 24, 2018 at 08:45:34AM -0800, Jarkko Sakkinen wrote: > On Fri, Nov 23, 2018 at 04:39:23AM -0600, Dr. Greg wrote: > > Jarkko, when this driver lands it will set the SGX ABI in stone for > > Linux. It would be very, very helpful to the development community if > > there was some official guidance from Intel on whether or not FLC will > > be a universal feature on all hardware and the date that is going to > > happen or has happened. > > I seriously don't know but I can take this message to the mothership... LC enabling is essentially a platform vendors choice, not Intels choice, like many other CPU features that Linux is dependent on. Of course, if Linux ends supporting only LC that will without doubt have a big impact on vendors so in that way it is indirectly also communitys choice. /Jarkko
Re: siginfo pid not populated from ptrace?
Kees Cook writes: > On Tue, Nov 27, 2018 at 4:38 PM, Kees Cook wrote: >> On Tue, Nov 27, 2018 at 3:21 PM, Tycho Andersen wrote: >>> On Mon, Nov 12, 2018 at 12:24:43PM -0700, Tycho Andersen wrote: On Mon, Nov 12, 2018 at 11:55:38AM -0700, Tycho Andersen wrote: > I haven't manage to reproduce it on stock v4.20-rc2, unfortunately. Ok, now I have, seccomp_bpf.c:2736:global.syscall_restart:Expected getpid() (1493) == info._sifields._kill.si_pid (0) global.syscall_restart: Test failed at step #22 >>> >>> Seems like this is still happening on v4.20-rc4, >>> >>> [ RUN ] global.syscall_restart >>> seccomp_bpf.c:2736:global.syscall_restart:Expected getpid() (1901) == >>> info._sifields._kill.si_pid (0) >>> global.syscall_restart: Test failed at step #22 >> >> This fails every time for me -- is it still racey for you? >> >> I'm attempting a bisect, hoping it doesn't _become_ racey for me. ;) > > This bisect to here for me: > > commit f149b31557446aff9ca96d4be7e39cc266f6e7cc > Author: Eric W. Biederman > Date: Mon Sep 3 09:50:36 2018 +0200 > > signal: Never allocate siginfo for SIGKILL or SIGSTOP > > The SIGKILL and SIGSTOP signals are never delivered to userspace so > queued siginfo for these signals can never be observed. Therefore > remove the chance of failure by never even attempting to allocate > siginfo in those cases. > > Reviewed-by: Thomas Gleixner > Signed-off-by: "Eric W. Biederman" > > They are certainly visible via seccomp ;) Well SIGSTOP is visible via PTRACE_GETSIGINFO. I see what is happening now. Since we don't have queued siginfo we generate some as: /* * Ok, it wasn't in the queue. This must be * a fast-pathed signal or we must have been * out of queue space. So zero out the info. */ clear_siginfo(info); info->si_signo = sig; info->si_errno = 0; info->si_code = SI_USER; info->si_pid = 0; info->si_uid = 0; Which allows last_signfo to be set, so despite not really having any siginfo PTRACE_GET_SIGINFO has something to return so does not return -EINVAL. Reconstructing my context that was part of removing SEND_SIG_FORCED so this looks like it will take a little more than a revert to fix this. This is definitely a change that is visible to user space. The logic in my patch was definitely wrong with respect to SIGSTOP and PTRACE_GETSIGINFO. Is there something in userspace that actually cares? AKA is the idiom that the test seccomp_bpf.c is using something that non-test code does? The change below should restore the old behavior. I am just wondering if this is something we want to do. siginfo is allocated with GFP_ATOMIC so if your maching is under memory pressure there is a real chance the allocation can fail. Which would cause whatever is breaking now to break less deterministically then. If we need to fix this do we need to make siginfo allocation more reliable? Eric diff --git a/kernel/signal.c b/kernel/signal.c index 4fd431ce4f91..5c34c55bfea4 100644 --- a/kernel/signal.c +++ b/kernel/signal.c @@ -1057,10 +1057,10 @@ static int __send_signal(int sig, struct kernel_siginfo *info, struct task_struc result = TRACE_SIGNAL_DELIVERED; /* -* Skip useless siginfo allocation for SIGKILL SIGSTOP, +* Skip useless siginfo allocation for SIGKILL, * and kernel threads. */ - if (sig_kernel_only(sig) || (t->flags & PF_KTHREAD)) + if ((sig == SIGKILL) || (t->flags & PF_KTHREAD)) goto out_set; /*
Re: siginfo pid not populated from ptrace?
Kees Cook writes: > On Tue, Nov 27, 2018 at 4:38 PM, Kees Cook wrote: >> On Tue, Nov 27, 2018 at 3:21 PM, Tycho Andersen wrote: >>> On Mon, Nov 12, 2018 at 12:24:43PM -0700, Tycho Andersen wrote: On Mon, Nov 12, 2018 at 11:55:38AM -0700, Tycho Andersen wrote: > I haven't manage to reproduce it on stock v4.20-rc2, unfortunately. Ok, now I have, seccomp_bpf.c:2736:global.syscall_restart:Expected getpid() (1493) == info._sifields._kill.si_pid (0) global.syscall_restart: Test failed at step #22 >>> >>> Seems like this is still happening on v4.20-rc4, >>> >>> [ RUN ] global.syscall_restart >>> seccomp_bpf.c:2736:global.syscall_restart:Expected getpid() (1901) == >>> info._sifields._kill.si_pid (0) >>> global.syscall_restart: Test failed at step #22 >> >> This fails every time for me -- is it still racey for you? >> >> I'm attempting a bisect, hoping it doesn't _become_ racey for me. ;) > > This bisect to here for me: > > commit f149b31557446aff9ca96d4be7e39cc266f6e7cc > Author: Eric W. Biederman > Date: Mon Sep 3 09:50:36 2018 +0200 > > signal: Never allocate siginfo for SIGKILL or SIGSTOP > > The SIGKILL and SIGSTOP signals are never delivered to userspace so > queued siginfo for these signals can never be observed. Therefore > remove the chance of failure by never even attempting to allocate > siginfo in those cases. > > Reviewed-by: Thomas Gleixner > Signed-off-by: "Eric W. Biederman" > > They are certainly visible via seccomp ;) Well SIGSTOP is visible via PTRACE_GETSIGINFO. I see what is happening now. Since we don't have queued siginfo we generate some as: /* * Ok, it wasn't in the queue. This must be * a fast-pathed signal or we must have been * out of queue space. So zero out the info. */ clear_siginfo(info); info->si_signo = sig; info->si_errno = 0; info->si_code = SI_USER; info->si_pid = 0; info->si_uid = 0; Which allows last_signfo to be set, so despite not really having any siginfo PTRACE_GET_SIGINFO has something to return so does not return -EINVAL. Reconstructing my context that was part of removing SEND_SIG_FORCED so this looks like it will take a little more than a revert to fix this. This is definitely a change that is visible to user space. The logic in my patch was definitely wrong with respect to SIGSTOP and PTRACE_GETSIGINFO. Is there something in userspace that actually cares? AKA is the idiom that the test seccomp_bpf.c is using something that non-test code does? The change below should restore the old behavior. I am just wondering if this is something we want to do. siginfo is allocated with GFP_ATOMIC so if your maching is under memory pressure there is a real chance the allocation can fail. Which would cause whatever is breaking now to break less deterministically then. If we need to fix this do we need to make siginfo allocation more reliable? Eric diff --git a/kernel/signal.c b/kernel/signal.c index 4fd431ce4f91..5c34c55bfea4 100644 --- a/kernel/signal.c +++ b/kernel/signal.c @@ -1057,10 +1057,10 @@ static int __send_signal(int sig, struct kernel_siginfo *info, struct task_struc result = TRACE_SIGNAL_DELIVERED; /* -* Skip useless siginfo allocation for SIGKILL SIGSTOP, +* Skip useless siginfo allocation for SIGKILL, * and kernel threads. */ - if (sig_kernel_only(sig) || (t->flags & PF_KTHREAD)) + if ((sig == SIGKILL) || (t->flags & PF_KTHREAD)) goto out_set; /*
Re: [PATCH 1/1] sched/headers: fix thread_info. is overwritten by STACK_END_MAGIC
Hello Kees,
On 2018/11/28 6:38, Kees Cook wrote:
> On Thu, Nov 22, 2018 at 11:54 PM, Wang Dongsheng
> wrote:
>> When select ARCH_TASK_STRUCT_ON_STACK the first of thread_info variable
>> is overwritten by STACK_END_MAGIC. In fact, the ARCH_TASK_STRUCT_ON_STACK
>> is not a real task on stack, it's only init_task on init_stack.
>>
>> Commit 0500871f21b2 ("Construct init thread stack in the linker script
>> rather than by union") added this macro and put task_strcut into
>> thread_union. This brings us the following possibilities:
>> TASK_ON_STACKTHREAD_INFO_IN_TASKSTACK
>> - <-- thread_info & stack
>> NN | | --- <-- task
>>| || |
>> - ---
>>
>> - <-- stack
>> NY | | --- <--
>> task(Including thread_info)
>>| || |
>> - ---
>>
>> - <-- stack & task &
>> thread_info
>> YN | |
>>| |
>> -
>>
>> - <-- stack & task(Including
>> thread_info)
>> YY | |
>>| |
>> -
>> The kernel has handled the first two cases correctly.
>>
>> For the third case:
>> TASK_ON_STACK: Y. THREAD_INFO_IN_TASK: N. this case
>> should never happen, because the task and thread_info will overlap. So
>> when TASK_ON_STACK is selected, THREAD_INFO_IN_TASK must be selected too.
>>
>> For the fourth case:
>> When task on stack, the end of stack should add a sizeof(task_struct) offset.
>>
>> This patch handled with the third and fourth case.
>>
>> Fixes: 0500871f21b2 ("Construct init thread stack in the linker ...")
>>
>> Signed-off-by: Wang Dongsheng
>> Signed-off-by: Shunyong Yang
>> ---
>> arch/Kconfig | 1 +
>> include/linux/sched/task_stack.h | 5 -
>> 2 files changed, 5 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/Kconfig b/arch/Kconfig
>> index e1e540ffa979..0a2c73e73195 100644
>> --- a/arch/Kconfig
>> +++ b/arch/Kconfig
>> @@ -251,6 +251,7 @@ config ARCH_HAS_SET_MEMORY
>> # Select if arch init_task must go in the __init_task_data section
>> config ARCH_TASK_STRUCT_ON_STACK
>> bool
>> + depends on THREAD_INFO_IN_TASK || IA64
> The "IA64" part shouldn't be needed since IA64 already selects it.
>
> Since it's selected, it also can't have a depends, IIUC.
Since the IA64 thread_info including task_struct, it doesn't need to
select THREAD_INFO_IN_TASK.
So we need to allow IA64 select ARCH_TASK_STRUCT_ON_STACK without
THREAD_INFO.
>> # Select if arch has its private alloc_task_struct() function
>> config ARCH_TASK_STRUCT_ALLOCATOR
>> diff --git a/include/linux/sched/task_stack.h
>> b/include/linux/sched/task_stack.h
>> index 6a841929073f..624c48defb9e 100644
>> --- a/include/linux/sched/task_stack.h
>> +++ b/include/linux/sched/task_stack.h
>> @@ -7,6 +7,7 @@
>> */
>>
>> #include
>> +#include
>> #include
>>
>> #ifdef CONFIG_THREAD_INFO_IN_TASK
>> @@ -25,7 +26,9 @@ static inline void *task_stack_page(const struct
>> task_struct *task)
>>
>> static inline unsigned long *end_of_stack(const struct task_struct *task)
>> {
>> - return task->stack;
>> + if (!IS_ENABLED(CONFIG_ARCH_TASK_STRUCT_ON_STACK) || task !=
>> _task)
>> + return task->stack;
>> + return (unsigned long *)(task + 1);
>> }
> This seems like a strange place for the change. It feels more like
> init_task has been defined incorrectly.
The init_task will put into init_stack when ARCH_TASK_STRUCT_ON_STACK is
selected.
include/asm-generic/vmlinux.lds.h:
#define INIT_TASK_DATA(align)\
. = ALIGN(align);\
__start_init_task = .;\
init_thread_union = .;\
init_stack = .;\
KEEP(*(.data..init_task))\
KEEP(*(.data..init_thread_info))\
. = __start_init_task + THREAD_SIZE;\
__end_init_task = .;
So we need end_of_stack to offset sizeof(task_struct).
Cheers,
Dongsheng
Re: linux-next: Tree for Nov 27 (scsi/aha1542)
Hi all,
On Tue, 27 Nov 2018 20:14:58 -0800 Randy Dunlap wrote:
>
> On 11/26/18 8:25 PM, Stephen Rothwell wrote:
> > Hi all,
> >
> > Changes since 20181126:
> >
>
> on i386:
>
> ERROR: "__udivdi3" [drivers/scsi/aha1542.ko] undefined!
>
> somewhere in aha1542_interrupt() according to objdump.
Presumably caused by commit
1794ef2b150d ("scsi: aha1542: convert to DMA mapping API")
--
Cheers,
Stephen Rothwell
pgpgKdyluUPkw.pgp
Description: OpenPGP digital signature
Re: [PATCH 1/1] sched/headers: fix thread_info. is overwritten by STACK_END_MAGIC
Hello Kees,
On 2018/11/28 6:38, Kees Cook wrote:
> On Thu, Nov 22, 2018 at 11:54 PM, Wang Dongsheng
> wrote:
>> When select ARCH_TASK_STRUCT_ON_STACK the first of thread_info variable
>> is overwritten by STACK_END_MAGIC. In fact, the ARCH_TASK_STRUCT_ON_STACK
>> is not a real task on stack, it's only init_task on init_stack.
>>
>> Commit 0500871f21b2 ("Construct init thread stack in the linker script
>> rather than by union") added this macro and put task_strcut into
>> thread_union. This brings us the following possibilities:
>> TASK_ON_STACKTHREAD_INFO_IN_TASKSTACK
>> - <-- thread_info & stack
>> NN | | --- <-- task
>>| || |
>> - ---
>>
>> - <-- stack
>> NY | | --- <--
>> task(Including thread_info)
>>| || |
>> - ---
>>
>> - <-- stack & task &
>> thread_info
>> YN | |
>>| |
>> -
>>
>> - <-- stack & task(Including
>> thread_info)
>> YY | |
>>| |
>> -
>> The kernel has handled the first two cases correctly.
>>
>> For the third case:
>> TASK_ON_STACK: Y. THREAD_INFO_IN_TASK: N. this case
>> should never happen, because the task and thread_info will overlap. So
>> when TASK_ON_STACK is selected, THREAD_INFO_IN_TASK must be selected too.
>>
>> For the fourth case:
>> When task on stack, the end of stack should add a sizeof(task_struct) offset.
>>
>> This patch handled with the third and fourth case.
>>
>> Fixes: 0500871f21b2 ("Construct init thread stack in the linker ...")
>>
>> Signed-off-by: Wang Dongsheng
>> Signed-off-by: Shunyong Yang
>> ---
>> arch/Kconfig | 1 +
>> include/linux/sched/task_stack.h | 5 -
>> 2 files changed, 5 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/Kconfig b/arch/Kconfig
>> index e1e540ffa979..0a2c73e73195 100644
>> --- a/arch/Kconfig
>> +++ b/arch/Kconfig
>> @@ -251,6 +251,7 @@ config ARCH_HAS_SET_MEMORY
>> # Select if arch init_task must go in the __init_task_data section
>> config ARCH_TASK_STRUCT_ON_STACK
>> bool
>> + depends on THREAD_INFO_IN_TASK || IA64
> The "IA64" part shouldn't be needed since IA64 already selects it.
>
> Since it's selected, it also can't have a depends, IIUC.
Since the IA64 thread_info including task_struct, it doesn't need to
select THREAD_INFO_IN_TASK.
So we need to allow IA64 select ARCH_TASK_STRUCT_ON_STACK without
THREAD_INFO.
>> # Select if arch has its private alloc_task_struct() function
>> config ARCH_TASK_STRUCT_ALLOCATOR
>> diff --git a/include/linux/sched/task_stack.h
>> b/include/linux/sched/task_stack.h
>> index 6a841929073f..624c48defb9e 100644
>> --- a/include/linux/sched/task_stack.h
>> +++ b/include/linux/sched/task_stack.h
>> @@ -7,6 +7,7 @@
>> */
>>
>> #include
>> +#include
>> #include
>>
>> #ifdef CONFIG_THREAD_INFO_IN_TASK
>> @@ -25,7 +26,9 @@ static inline void *task_stack_page(const struct
>> task_struct *task)
>>
>> static inline unsigned long *end_of_stack(const struct task_struct *task)
>> {
>> - return task->stack;
>> + if (!IS_ENABLED(CONFIG_ARCH_TASK_STRUCT_ON_STACK) || task !=
>> _task)
>> + return task->stack;
>> + return (unsigned long *)(task + 1);
>> }
> This seems like a strange place for the change. It feels more like
> init_task has been defined incorrectly.
The init_task will put into init_stack when ARCH_TASK_STRUCT_ON_STACK is
selected.
include/asm-generic/vmlinux.lds.h:
#define INIT_TASK_DATA(align)\
. = ALIGN(align);\
__start_init_task = .;\
init_thread_union = .;\
init_stack = .;\
KEEP(*(.data..init_task))\
KEEP(*(.data..init_thread_info))\
. = __start_init_task + THREAD_SIZE;\
__end_init_task = .;
So we need end_of_stack to offset sizeof(task_struct).
Cheers,
Dongsheng
Re: linux-next: Tree for Nov 27 (scsi/aha1542)
Hi all,
On Tue, 27 Nov 2018 20:14:58 -0800 Randy Dunlap wrote:
>
> On 11/26/18 8:25 PM, Stephen Rothwell wrote:
> > Hi all,
> >
> > Changes since 20181126:
> >
>
> on i386:
>
> ERROR: "__udivdi3" [drivers/scsi/aha1542.ko] undefined!
>
> somewhere in aha1542_interrupt() according to objdump.
Presumably caused by commit
1794ef2b150d ("scsi: aha1542: convert to DMA mapping API")
--
Cheers,
Stephen Rothwell
pgpgKdyluUPkw.pgp
Description: OpenPGP digital signature
[PATCH v2 3/3] dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs
The driver now supports i.MX8MQ, so update bindings accordingly. Cc: p.za...@pengutronix.de Cc: Fabio Estevam Cc: cphe...@gmail.com Cc: l.st...@pengutronix.de Cc: Leonard Crestez Cc: "A.s. Dong" Cc: Richard Zhu Cc: Rob Herring Cc: devicet...@vger.kernel.org Cc: linux-...@nxp.com Cc: linux-arm-ker...@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrey Smirnov --- Documentation/devicetree/bindings/reset/fsl,imx7-src.txt | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt b/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt index 1ab1d109318e..2ecf33815d18 100644 --- a/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt +++ b/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt @@ -5,7 +5,9 @@ Please also refer to reset.txt in this directory for common reset controller binding usage. Required properties: -- compatible: Should be "fsl,imx7d-src", "syscon" +- compatible: + - For i.MX7 SoCs should be "fsl,imx7d-src", "syscon" + - For i.MX8MQ SoCs should be "fsl,imx8mq-src", "syscon" - reg: should be register base and length as documented in the datasheet - interrupts: Should contain SRC interrupt @@ -44,4 +46,5 @@ Example: For list of all valid reset indicies see - + for i.MX7 and + for i.MX8MQ -- 2.19.1
[PATCH v2 2/3] reset: imx7: Add support for i.MX8MQ IP block variant
Add bits and pieces needed to support IP block variant found on
i.MX8MQ SoCs.
Cc: p.za...@pengutronix.de
Cc: Fabio Estevam
Cc: cphe...@gmail.com
Cc: l.st...@pengutronix.de
Cc: Leonard Crestez
Cc: "A.s. Dong"
Cc: Richard Zhu
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Cc: linux-...@nxp.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov
---
drivers/reset/Kconfig| 2 +-
drivers/reset/reset-imx7.c | 106 +++
include/dt-bindings/reset/imx8mq-reset.h | 64 ++
3 files changed, 171 insertions(+), 1 deletion(-)
create mode 100644 include/dt-bindings/reset/imx8mq-reset.h
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index c21da9fe51ec..4909aab7401b 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -50,7 +50,7 @@ config RESET_HSDK
config RESET_IMX7
bool "i.MX7 Reset Driver" if COMPILE_TEST
depends on HAS_IOMEM
- default SOC_IMX7D
+ default SOC_IMX7D || SOC_IMX8MQ
select MFD_SYSCON
help
This enables the reset controller driver for i.MX7 SoCs.
diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
index cfbb6346a72e..34ce7448b299 100644
--- a/drivers/reset/reset-imx7.c
+++ b/drivers/reset/reset-imx7.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
struct imx7_src_signal {
unsigned int offset, bit;
@@ -113,6 +114,110 @@ static const struct imx7_src_variant variant_imx7 = {
.prepare = imx7_src_prepare,
};
+enum imx8mq_src_registers {
+ SRC_A53RCR0 = 0x0004,
+ SRC_HDMI_RCR= 0x0030,
+ SRC_DISP_RCR= 0x0034,
+ SRC_GPU_RCR = 0x0040,
+ SRC_VPU_RCR = 0x0044,
+ SRC_PCIE2_RCR = 0x0048,
+ SRC_MIPIPHY1_RCR= 0x004c,
+ SRC_MIPIPHY2_RCR= 0x0050,
+ SRC_DDRC2_RCR = 0x1004,
+};
+
+static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = {
+ [IMX8MQ_RESET_A53_CORE_POR_RESET0] = { SRC_A53RCR0, BIT(0) },
+ [IMX8MQ_RESET_A53_CORE_POR_RESET1] = { SRC_A53RCR0, BIT(1) },
+ [IMX8MQ_RESET_A53_CORE_POR_RESET2] = { SRC_A53RCR0, BIT(2) },
+ [IMX8MQ_RESET_A53_CORE_POR_RESET3] = { SRC_A53RCR0, BIT(3) },
+ [IMX8MQ_RESET_A53_CORE_RESET0] = { SRC_A53RCR0, BIT(4) },
+ [IMX8MQ_RESET_A53_CORE_RESET1] = { SRC_A53RCR0, BIT(5) },
+ [IMX8MQ_RESET_A53_CORE_RESET2] = { SRC_A53RCR0, BIT(6) },
+ [IMX8MQ_RESET_A53_CORE_RESET3] = { SRC_A53RCR0, BIT(7) },
+ [IMX8MQ_RESET_A53_DBG_RESET0] = { SRC_A53RCR0, BIT(8) },
+ [IMX8MQ_RESET_A53_DBG_RESET1] = { SRC_A53RCR0, BIT(9) },
+ [IMX8MQ_RESET_A53_DBG_RESET2] = { SRC_A53RCR0, BIT(10) },
+ [IMX8MQ_RESET_A53_DBG_RESET3] = { SRC_A53RCR0, BIT(11) },
+ [IMX8MQ_RESET_A53_ETM_RESET0] = { SRC_A53RCR0, BIT(12) },
+ [IMX8MQ_RESET_A53_ETM_RESET1] = { SRC_A53RCR0, BIT(13) },
+ [IMX8MQ_RESET_A53_ETM_RESET2] = { SRC_A53RCR0, BIT(14) },
+ [IMX8MQ_RESET_A53_ETM_RESET3] = { SRC_A53RCR0, BIT(15) },
+ [IMX8MQ_RESET_A53_SOC_DBG_RESET]= { SRC_A53RCR0, BIT(20) },
+ [IMX8MQ_RESET_A53_L2RESET] = { SRC_A53RCR0, BIT(21) },
+ [IMX8MQ_RESET_SW_NON_SCLR_M4C_RST] = { SRC_M4RCR, BIT(0) },
+ [IMX8MQ_RESET_OTG1_PHY_RESET] = { SRC_USBOPHY1_RCR, BIT(0) },
+ [IMX8MQ_RESET_OTG2_PHY_RESET] = { SRC_USBOPHY2_RCR, BIT(0) },
+ [IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N]= { SRC_MIPIPHY_RCR, BIT(1) },
+ [IMX8MQ_RESET_MIPI_DSI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(2) },
+ [IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(3) },
+ [IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N] = { SRC_MIPIPHY_RCR, BIT(4) },
+ [IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N]= { SRC_MIPIPHY_RCR, BIT(5) },
+ [IMX8MQ_RESET_PCIEPHY] = { SRC_PCIEPHY_RCR,
+ BIT(2) | BIT(1) },
+ [IMX8MQ_RESET_PCIEPHY_PERST]= { SRC_PCIEPHY_RCR, BIT(3) },
+ [IMX8MQ_RESET_PCIE_CTRL_APPS_EN]= { SRC_PCIEPHY_RCR, BIT(6) },
+ [IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF] = { SRC_PCIEPHY_RCR, BIT(11) },
+ [IMX8MQ_RESET_HDMI_PHY_APB_RESET] = { SRC_HDMI_RCR, BIT(0) },
+ [IMX8MQ_RESET_DISP_RESET] = { SRC_DISP_RCR, BIT(0) },
+ [IMX8MQ_RESET_GPU_RESET]= { SRC_GPU_RCR, BIT(0) },
+ [IMX8MQ_RESET_VPU_RESET]= { SRC_VPU_RCR, BIT(0) },
+ [IMX8MQ_RESET_PCIEPHY2] = { SRC_PCIE2_RCR,
+ BIT(2) | BIT(1) },
+ [IMX8MQ_RESET_PCIEPHY2_PERST] = { SRC_PCIE2_RCR, BIT(3) },
+
[PATCH v2 1/3] reset: imx7: Add plubming to support multiple IP variants
In order to enable supporting i.MX8MQ with this driver, convert it to
expect variant specific bits to be passed via driver data.
Cc: p.za...@pengutronix.de
Cc: Fabio Estevam
Cc: cphe...@gmail.com
Cc: l.st...@pengutronix.de
Cc: Leonard Crestez
Cc: "A.s. Dong"
Cc: Richard Zhu
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Cc: linux-...@nxp.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov
---
drivers/reset/reset-imx7.c | 62 +++---
1 file changed, 45 insertions(+), 17 deletions(-)
diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
index 77911fa8f31d..cfbb6346a72e 100644
--- a/drivers/reset/reset-imx7.c
+++ b/drivers/reset/reset-imx7.c
@@ -17,14 +17,29 @@
#include
#include
+#include
#include
#include
#include
#include
+struct imx7_src_signal {
+ unsigned int offset, bit;
+};
+
+struct imx7_src;
+
+struct imx7_src_variant {
+ const struct imx7_src_signal *signals;
+ unsigned int signals_num;
+ unsigned int (*prepare)(struct imx7_src *imx7src, unsigned long id,
+ bool assert);
+};
+
struct imx7_src {
struct reset_controller_dev rcdev;
struct regmap *regmap;
+ struct imx7_src_variant *variant;
};
enum imx7_src_registers {
@@ -39,10 +54,6 @@ enum imx7_src_registers {
SRC_DDRC_RCR= 0x1000,
};
-struct imx7_src_signal {
- unsigned int offset, bit;
-};
-
static const struct imx7_src_signal imx7_src_signals[IMX7_RESET_NUM] = {
[IMX7_RESET_A7_CORE_POR_RESET0] = { SRC_A7RCR0, BIT(0) },
[IMX7_RESET_A7_CORE_POR_RESET1] = { SRC_A7RCR0, BIT(1) },
@@ -72,17 +83,11 @@ static const struct imx7_src_signal
imx7_src_signals[IMX7_RESET_NUM] = {
[IMX7_RESET_DDRC_CORE_RST] = { SRC_DDRC_RCR, BIT(1) },
};
-static struct imx7_src *to_imx7_src(struct reset_controller_dev *rcdev)
+static unsigned int
+imx7_src_prepare(struct imx7_src *imx7src, unsigned long id, bool assert)
{
- return container_of(rcdev, struct imx7_src, rcdev);
-}
-
-static int imx7_reset_set(struct reset_controller_dev *rcdev,
- unsigned long id, bool assert)
-{
- struct imx7_src *imx7src = to_imx7_src(rcdev);
- const struct imx7_src_signal *signal = _src_signals[id];
- unsigned int value = assert ? signal->bit : 0;
+ const unsigned int bit = imx7src->variant->signals[id].bit;
+ unsigned int value = assert ? bit : 0;
switch (id) {
case IMX7_RESET_PCIEPHY:
@@ -95,10 +100,32 @@ static int imx7_reset_set(struct reset_controller_dev
*rcdev,
break;
case IMX7_RESET_PCIE_CTRL_APPS_EN:
- value = (assert) ? 0 : signal->bit;
+ value = assert ? 0 : bit;
break;
}
+ return value;
+}
+
+static const struct imx7_src_variant variant_imx7 = {
+ .signals = imx7_src_signals,
+ .signals_num = ARRAY_SIZE(imx7_src_signals),
+ .prepare = imx7_src_prepare,
+};
+
+static struct imx7_src *to_imx7_src(struct reset_controller_dev *rcdev)
+{
+ return container_of(rcdev, struct imx7_src, rcdev);
+}
+
+static int imx7_reset_set(struct reset_controller_dev *rcdev,
+ unsigned long id, bool assert)
+{
+ struct imx7_src *imx7src = to_imx7_src(rcdev);
+ const struct imx7_src_variant *variant = imx7src->variant;
+ const struct imx7_src_signal *signal = >signals[id];
+ const unsigned int value = variant->prepare(imx7src, id, assert);
+
return regmap_update_bits(imx7src->regmap,
signal->offset, signal->bit, value);
}
@@ -130,6 +157,7 @@ static int imx7_reset_probe(struct platform_device *pdev)
if (!imx7src)
return -ENOMEM;
+ imx7src->variant = of_device_get_match_data(dev);
imx7src->regmap = syscon_node_to_regmap(dev->of_node);
if (IS_ERR(imx7src->regmap)) {
dev_err(dev, "Unable to get imx7-src regmap");
@@ -138,7 +166,7 @@ static int imx7_reset_probe(struct platform_device *pdev)
regmap_attach_dev(dev, imx7src->regmap, );
imx7src->rcdev.owner = THIS_MODULE;
- imx7src->rcdev.nr_resets = IMX7_RESET_NUM;
+ imx7src->rcdev.nr_resets = imx7src->variant->signals_num;
imx7src->rcdev.ops = _reset_ops;
imx7src->rcdev.of_node = dev->of_node;
@@ -146,7 +174,7 @@ static int imx7_reset_probe(struct platform_device *pdev)
}
static const struct of_device_id imx7_reset_dt_ids[] = {
- { .compatible = "fsl,imx7d-src", },
+ { .compatible = "fsl,imx7d-src", .data = _imx7 },
{ /* sentinel */ },
};
--
2.19.1
[PATCH v2 3/3] dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs
The driver now supports i.MX8MQ, so update bindings accordingly. Cc: p.za...@pengutronix.de Cc: Fabio Estevam Cc: cphe...@gmail.com Cc: l.st...@pengutronix.de Cc: Leonard Crestez Cc: "A.s. Dong" Cc: Richard Zhu Cc: Rob Herring Cc: devicet...@vger.kernel.org Cc: linux-...@nxp.com Cc: linux-arm-ker...@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrey Smirnov --- Documentation/devicetree/bindings/reset/fsl,imx7-src.txt | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt b/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt index 1ab1d109318e..2ecf33815d18 100644 --- a/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt +++ b/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt @@ -5,7 +5,9 @@ Please also refer to reset.txt in this directory for common reset controller binding usage. Required properties: -- compatible: Should be "fsl,imx7d-src", "syscon" +- compatible: + - For i.MX7 SoCs should be "fsl,imx7d-src", "syscon" + - For i.MX8MQ SoCs should be "fsl,imx8mq-src", "syscon" - reg: should be register base and length as documented in the datasheet - interrupts: Should contain SRC interrupt @@ -44,4 +46,5 @@ Example: For list of all valid reset indicies see - + for i.MX7 and + for i.MX8MQ -- 2.19.1
[PATCH v2 2/3] reset: imx7: Add support for i.MX8MQ IP block variant
Add bits and pieces needed to support IP block variant found on
i.MX8MQ SoCs.
Cc: p.za...@pengutronix.de
Cc: Fabio Estevam
Cc: cphe...@gmail.com
Cc: l.st...@pengutronix.de
Cc: Leonard Crestez
Cc: "A.s. Dong"
Cc: Richard Zhu
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Cc: linux-...@nxp.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov
---
drivers/reset/Kconfig| 2 +-
drivers/reset/reset-imx7.c | 106 +++
include/dt-bindings/reset/imx8mq-reset.h | 64 ++
3 files changed, 171 insertions(+), 1 deletion(-)
create mode 100644 include/dt-bindings/reset/imx8mq-reset.h
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index c21da9fe51ec..4909aab7401b 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -50,7 +50,7 @@ config RESET_HSDK
config RESET_IMX7
bool "i.MX7 Reset Driver" if COMPILE_TEST
depends on HAS_IOMEM
- default SOC_IMX7D
+ default SOC_IMX7D || SOC_IMX8MQ
select MFD_SYSCON
help
This enables the reset controller driver for i.MX7 SoCs.
diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
index cfbb6346a72e..34ce7448b299 100644
--- a/drivers/reset/reset-imx7.c
+++ b/drivers/reset/reset-imx7.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
struct imx7_src_signal {
unsigned int offset, bit;
@@ -113,6 +114,110 @@ static const struct imx7_src_variant variant_imx7 = {
.prepare = imx7_src_prepare,
};
+enum imx8mq_src_registers {
+ SRC_A53RCR0 = 0x0004,
+ SRC_HDMI_RCR= 0x0030,
+ SRC_DISP_RCR= 0x0034,
+ SRC_GPU_RCR = 0x0040,
+ SRC_VPU_RCR = 0x0044,
+ SRC_PCIE2_RCR = 0x0048,
+ SRC_MIPIPHY1_RCR= 0x004c,
+ SRC_MIPIPHY2_RCR= 0x0050,
+ SRC_DDRC2_RCR = 0x1004,
+};
+
+static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = {
+ [IMX8MQ_RESET_A53_CORE_POR_RESET0] = { SRC_A53RCR0, BIT(0) },
+ [IMX8MQ_RESET_A53_CORE_POR_RESET1] = { SRC_A53RCR0, BIT(1) },
+ [IMX8MQ_RESET_A53_CORE_POR_RESET2] = { SRC_A53RCR0, BIT(2) },
+ [IMX8MQ_RESET_A53_CORE_POR_RESET3] = { SRC_A53RCR0, BIT(3) },
+ [IMX8MQ_RESET_A53_CORE_RESET0] = { SRC_A53RCR0, BIT(4) },
+ [IMX8MQ_RESET_A53_CORE_RESET1] = { SRC_A53RCR0, BIT(5) },
+ [IMX8MQ_RESET_A53_CORE_RESET2] = { SRC_A53RCR0, BIT(6) },
+ [IMX8MQ_RESET_A53_CORE_RESET3] = { SRC_A53RCR0, BIT(7) },
+ [IMX8MQ_RESET_A53_DBG_RESET0] = { SRC_A53RCR0, BIT(8) },
+ [IMX8MQ_RESET_A53_DBG_RESET1] = { SRC_A53RCR0, BIT(9) },
+ [IMX8MQ_RESET_A53_DBG_RESET2] = { SRC_A53RCR0, BIT(10) },
+ [IMX8MQ_RESET_A53_DBG_RESET3] = { SRC_A53RCR0, BIT(11) },
+ [IMX8MQ_RESET_A53_ETM_RESET0] = { SRC_A53RCR0, BIT(12) },
+ [IMX8MQ_RESET_A53_ETM_RESET1] = { SRC_A53RCR0, BIT(13) },
+ [IMX8MQ_RESET_A53_ETM_RESET2] = { SRC_A53RCR0, BIT(14) },
+ [IMX8MQ_RESET_A53_ETM_RESET3] = { SRC_A53RCR0, BIT(15) },
+ [IMX8MQ_RESET_A53_SOC_DBG_RESET]= { SRC_A53RCR0, BIT(20) },
+ [IMX8MQ_RESET_A53_L2RESET] = { SRC_A53RCR0, BIT(21) },
+ [IMX8MQ_RESET_SW_NON_SCLR_M4C_RST] = { SRC_M4RCR, BIT(0) },
+ [IMX8MQ_RESET_OTG1_PHY_RESET] = { SRC_USBOPHY1_RCR, BIT(0) },
+ [IMX8MQ_RESET_OTG2_PHY_RESET] = { SRC_USBOPHY2_RCR, BIT(0) },
+ [IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N]= { SRC_MIPIPHY_RCR, BIT(1) },
+ [IMX8MQ_RESET_MIPI_DSI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(2) },
+ [IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(3) },
+ [IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N] = { SRC_MIPIPHY_RCR, BIT(4) },
+ [IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N]= { SRC_MIPIPHY_RCR, BIT(5) },
+ [IMX8MQ_RESET_PCIEPHY] = { SRC_PCIEPHY_RCR,
+ BIT(2) | BIT(1) },
+ [IMX8MQ_RESET_PCIEPHY_PERST]= { SRC_PCIEPHY_RCR, BIT(3) },
+ [IMX8MQ_RESET_PCIE_CTRL_APPS_EN]= { SRC_PCIEPHY_RCR, BIT(6) },
+ [IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF] = { SRC_PCIEPHY_RCR, BIT(11) },
+ [IMX8MQ_RESET_HDMI_PHY_APB_RESET] = { SRC_HDMI_RCR, BIT(0) },
+ [IMX8MQ_RESET_DISP_RESET] = { SRC_DISP_RCR, BIT(0) },
+ [IMX8MQ_RESET_GPU_RESET]= { SRC_GPU_RCR, BIT(0) },
+ [IMX8MQ_RESET_VPU_RESET]= { SRC_VPU_RCR, BIT(0) },
+ [IMX8MQ_RESET_PCIEPHY2] = { SRC_PCIE2_RCR,
+ BIT(2) | BIT(1) },
+ [IMX8MQ_RESET_PCIEPHY2_PERST] = { SRC_PCIE2_RCR, BIT(3) },
+
[PATCH v2 1/3] reset: imx7: Add plubming to support multiple IP variants
In order to enable supporting i.MX8MQ with this driver, convert it to
expect variant specific bits to be passed via driver data.
Cc: p.za...@pengutronix.de
Cc: Fabio Estevam
Cc: cphe...@gmail.com
Cc: l.st...@pengutronix.de
Cc: Leonard Crestez
Cc: "A.s. Dong"
Cc: Richard Zhu
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Cc: linux-...@nxp.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov
---
drivers/reset/reset-imx7.c | 62 +++---
1 file changed, 45 insertions(+), 17 deletions(-)
diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
index 77911fa8f31d..cfbb6346a72e 100644
--- a/drivers/reset/reset-imx7.c
+++ b/drivers/reset/reset-imx7.c
@@ -17,14 +17,29 @@
#include
#include
+#include
#include
#include
#include
#include
+struct imx7_src_signal {
+ unsigned int offset, bit;
+};
+
+struct imx7_src;
+
+struct imx7_src_variant {
+ const struct imx7_src_signal *signals;
+ unsigned int signals_num;
+ unsigned int (*prepare)(struct imx7_src *imx7src, unsigned long id,
+ bool assert);
+};
+
struct imx7_src {
struct reset_controller_dev rcdev;
struct regmap *regmap;
+ struct imx7_src_variant *variant;
};
enum imx7_src_registers {
@@ -39,10 +54,6 @@ enum imx7_src_registers {
SRC_DDRC_RCR= 0x1000,
};
-struct imx7_src_signal {
- unsigned int offset, bit;
-};
-
static const struct imx7_src_signal imx7_src_signals[IMX7_RESET_NUM] = {
[IMX7_RESET_A7_CORE_POR_RESET0] = { SRC_A7RCR0, BIT(0) },
[IMX7_RESET_A7_CORE_POR_RESET1] = { SRC_A7RCR0, BIT(1) },
@@ -72,17 +83,11 @@ static const struct imx7_src_signal
imx7_src_signals[IMX7_RESET_NUM] = {
[IMX7_RESET_DDRC_CORE_RST] = { SRC_DDRC_RCR, BIT(1) },
};
-static struct imx7_src *to_imx7_src(struct reset_controller_dev *rcdev)
+static unsigned int
+imx7_src_prepare(struct imx7_src *imx7src, unsigned long id, bool assert)
{
- return container_of(rcdev, struct imx7_src, rcdev);
-}
-
-static int imx7_reset_set(struct reset_controller_dev *rcdev,
- unsigned long id, bool assert)
-{
- struct imx7_src *imx7src = to_imx7_src(rcdev);
- const struct imx7_src_signal *signal = _src_signals[id];
- unsigned int value = assert ? signal->bit : 0;
+ const unsigned int bit = imx7src->variant->signals[id].bit;
+ unsigned int value = assert ? bit : 0;
switch (id) {
case IMX7_RESET_PCIEPHY:
@@ -95,10 +100,32 @@ static int imx7_reset_set(struct reset_controller_dev
*rcdev,
break;
case IMX7_RESET_PCIE_CTRL_APPS_EN:
- value = (assert) ? 0 : signal->bit;
+ value = assert ? 0 : bit;
break;
}
+ return value;
+}
+
+static const struct imx7_src_variant variant_imx7 = {
+ .signals = imx7_src_signals,
+ .signals_num = ARRAY_SIZE(imx7_src_signals),
+ .prepare = imx7_src_prepare,
+};
+
+static struct imx7_src *to_imx7_src(struct reset_controller_dev *rcdev)
+{
+ return container_of(rcdev, struct imx7_src, rcdev);
+}
+
+static int imx7_reset_set(struct reset_controller_dev *rcdev,
+ unsigned long id, bool assert)
+{
+ struct imx7_src *imx7src = to_imx7_src(rcdev);
+ const struct imx7_src_variant *variant = imx7src->variant;
+ const struct imx7_src_signal *signal = >signals[id];
+ const unsigned int value = variant->prepare(imx7src, id, assert);
+
return regmap_update_bits(imx7src->regmap,
signal->offset, signal->bit, value);
}
@@ -130,6 +157,7 @@ static int imx7_reset_probe(struct platform_device *pdev)
if (!imx7src)
return -ENOMEM;
+ imx7src->variant = of_device_get_match_data(dev);
imx7src->regmap = syscon_node_to_regmap(dev->of_node);
if (IS_ERR(imx7src->regmap)) {
dev_err(dev, "Unable to get imx7-src regmap");
@@ -138,7 +166,7 @@ static int imx7_reset_probe(struct platform_device *pdev)
regmap_attach_dev(dev, imx7src->regmap, );
imx7src->rcdev.owner = THIS_MODULE;
- imx7src->rcdev.nr_resets = IMX7_RESET_NUM;
+ imx7src->rcdev.nr_resets = imx7src->variant->signals_num;
imx7src->rcdev.ops = _reset_ops;
imx7src->rcdev.of_node = dev->of_node;
@@ -146,7 +174,7 @@ static int imx7_reset_probe(struct platform_device *pdev)
}
static const struct of_device_id imx7_reset_dt_ids[] = {
- { .compatible = "fsl,imx7d-src", },
+ { .compatible = "fsl,imx7d-src", .data = _imx7 },
{ /* sentinel */ },
};
--
2.19.1
[PATCH v2 0/3] Reset controller support for i.MX8MQ
Everyone: This patch contains changes I made in order to add support for i.MX8MQ to reset-imx7.c in order to enable support of PCIE IP block on i.MX8MQ SoCs (full tree can be found at [github-v1]). NOTE: This patch depens on CONFIG_ARCH_IMX8MQ introduced in [imx8mq] Feedback is welcome! Thanks, Andrey Smirnov Changes since [v1] - Series re-written to use a per-variant LUT instead of using a single table - Changed driver to use "imx8mq" insead of "imx8m" to match other drivers and CONFIG_ARCH_IMX8MQ - Updated list of exported i.MX8MQ resets, add missing and remove bogus ones (hopefully nothing is missing this time) [v1] lkml.kernel.org/r/20181117181131.9330-2-andrew.smir...@gmail.com [github-v1] https://github.com/ndreys/linux/commits/imx8mq-pcie-v1 [imx8mq] https://www.spinics.net/lists/arm-kernel/msg687293.html Andrey Smirnov (3): reset: imx7: Add plubming to support multiple IP variants reset: imx7: Add support for i.MX8MQ IP block variant dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs .../bindings/reset/fsl,imx7-src.txt | 7 +- drivers/reset/Kconfig | 2 +- drivers/reset/reset-imx7.c| 166 -- include/dt-bindings/reset/imx8mq-reset.h | 64 +++ 4 files changed, 220 insertions(+), 19 deletions(-) create mode 100644 include/dt-bindings/reset/imx8mq-reset.h -- 2.19.1
[PATCH v2 0/3] Reset controller support for i.MX8MQ
Everyone: This patch contains changes I made in order to add support for i.MX8MQ to reset-imx7.c in order to enable support of PCIE IP block on i.MX8MQ SoCs (full tree can be found at [github-v1]). NOTE: This patch depens on CONFIG_ARCH_IMX8MQ introduced in [imx8mq] Feedback is welcome! Thanks, Andrey Smirnov Changes since [v1] - Series re-written to use a per-variant LUT instead of using a single table - Changed driver to use "imx8mq" insead of "imx8m" to match other drivers and CONFIG_ARCH_IMX8MQ - Updated list of exported i.MX8MQ resets, add missing and remove bogus ones (hopefully nothing is missing this time) [v1] lkml.kernel.org/r/20181117181131.9330-2-andrew.smir...@gmail.com [github-v1] https://github.com/ndreys/linux/commits/imx8mq-pcie-v1 [imx8mq] https://www.spinics.net/lists/arm-kernel/msg687293.html Andrey Smirnov (3): reset: imx7: Add plubming to support multiple IP variants reset: imx7: Add support for i.MX8MQ IP block variant dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs .../bindings/reset/fsl,imx7-src.txt | 7 +- drivers/reset/Kconfig | 2 +- drivers/reset/reset-imx7.c| 166 -- include/dt-bindings/reset/imx8mq-reset.h | 64 +++ 4 files changed, 220 insertions(+), 19 deletions(-) create mode 100644 include/dt-bindings/reset/imx8mq-reset.h -- 2.19.1
RE: [PATCH] PCI: Mark NXP LS1088 to avoid bus reset bus
Hi,
> -Original Message-
> From: Alex Williamson
> Sent: Tuesday, November 27, 2018 9:39 PM
> To: Bjorn Helgaas
> Cc: Bharat Bhushan ; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; bharatb.ya...@gmail.com; David Daney
> ; Jan Glauber ; Maik
> Broemme ; Chris Blake
>
> Subject: Re: [PATCH] PCI: Mark NXP LS1088 to avoid bus reset bus
>
> On Tue, 27 Nov 2018 09:33:56 -0600
> Bjorn Helgaas wrote:
>
> > [+cc David, Jan, Alex, Maik, Chris]
> >
> > On Tue, Nov 27, 2018 at 08:46:33AM +, Bharat Bhushan wrote:
> > > NXP (Freescale Vendor ID) LS1088 chips do not behave correctly after
> > > bus reset with e1000e. Link state of device does not comes UP and so
> > > config space never accessible again.
> >
> > Previous similar commits:
> >
> > 822155100e58 ("PCI: Mark Cavium CN8xxx to avoid bus reset")
> > 8e2e03179923 ("PCI: Mark Atheros AR9580 to avoid bus reset")
> > 9ac0108c2bac ("PCI: Mark Atheros AR9485 and QCA9882 to avoid bus
> reset")
> > c3e59ee4e766 ("PCI: Mark Atheros AR93xx to avoid bus reset")
> >
> > 1) Please make your subject match (remove the spurious "bus" at the
> > end)
Will correct, added by mistake
> >
> > 2) This should probably be marked for stable (v3.14 and later, since
> > the quirk itself appeared in v3.19 and marked for v3.14 and later
> > stable kernels). Maybe even mark it as "Fixes: c3e59ee4e766..." to
> > connect it.
Ok,
> >
> > 3) The 1957:80c0 PCI ID doesn't appear in
> >
> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpci
> -
> ids.ucw.cz%2Fdata=02%7C01%7Cbharat.bhushan%40nxp.com%7C296
> 02a2efa584249221808d65482945b%7C686ea1d3bc2b4c6fa92cd99c5c301635%7
> C0%7C0%7C636789317139032063sdata=3jkRMa1NljSCp%2BvZP0kgz7D
> PWPJZH8d7JXhCE5vCCMk%3Dreserved=0; can you add it?
> >
Yes, I will add
> > 4) Is there a hardware erratum for this? If so, please include the
> > URL here.
No h/w errata as of now.
> >
> > 5) Can you reproduce the problem using the same endpoint (e1000e) on a
> > different system with a different bridge?
I have multiple LS1088 boards and I can observe problem with all LS1088 boards.
While when I uses same PCI device on other NXP board (LS2088) then it works
fine.
> >
> > 6) Have you looked at this with a PCIe analyzer? It would be very
> > interesting to compare the boot-time or system reboot path with the
> > individual bus reset path you're fixing.
I have not used PCIe analyzer,
> >
> > Since there are several similar reports and they sometimes involve the
> > same devices (both your patch and 822155100e58 mention e1000e), I'm a
> > little suspicious that we're doing something wrong in the bus reset
> > path.
>
> I agree, entirely excluding bus resets is not something to be taken lightly.
> It's
> less than ideal for an endpoint and a fairly major functional gap for a
> downstream port. It should really be considered a last resort.
>
> > I think bus reset uses Secondary Bus Reset in the Bridge Control
> > register. That's a generic mechanism that I would expect to be pretty
> > well-tested. I suspect the BIOS probably uses it in the reboot path,
> > and the device probably works after that.
> >
> > So I wonder if the Linux delay isn't quite long enough, or our first
> > access to the device isn't quite right, e.g., maybe there's some issue
> > with the bus/device number capture (PCIe r4.0, sec 2.2.6.2).
>
> Tweaking the delay would be a reasonable solution, though we are seeing
> some issues where users with lots of assigned devices that require bus
> resets experience long delays as vfio file descriptors are closed sequentially
> on exit.
In pci_reset_secondary_bus() I have tried to increase the delay after reset but
not helped.
Do I need to add delay at some other place as well?
Thanks
-Bharat
> So perhaps we could flag downstream ports requiring an extra delay,
> if that becomes a solution. Your mention of the bus/device number also
> reminds me of the issue we saw on Threadripper where there were patches
> proposed to re-write the secondary and subordinate bus numbers after
> reset. AMD was able to resolve that in a firmware update, but there could
> be something similar occurring here. Thanks,
>
> Alex
>
> > > Signed-off-by: Bharat Bhushan
> > > ---
> > > drivers/pci/quirks.c | 7 +++
> > > 1 file changed, 7 insertions(+)
> > >
> > > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index
> > > 4700d24e5d55..b9ae4e9f101a 100644
> > > --- a/drivers/pci/quirks.c
> > > +++ b/drivers/pci/quirks.c
> > > @@ -3391,6 +3391,13 @@
> DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0033,
> quirk_no_bus_reset);
> > > */
> > > DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CAVIUM, 0xa100,
> > > quirk_no_bus_reset);
> > >
> > > +/*
> > > + * NXP (Freescale Vendor ID) LS1088 chips do not behave correctly
> > > +after
> > > + * bus reset. Link state of device does not comes UP and so config
> > > +space
> > > + * never accessible again.
> > > + */
> > >
[PATCH 25/41] scsi: lpfc: lpfc_nportdisc: Mark expected switch fall-through
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Signed-off-by: Gustavo A. R. Silva --- drivers/scsi/lpfc/lpfc_nportdisc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/scsi/lpfc/lpfc_nportdisc.c b/drivers/scsi/lpfc/lpfc_nportdisc.c index 7d5693cfaa87..e8583496feaf 100644 --- a/drivers/scsi/lpfc/lpfc_nportdisc.c +++ b/drivers/scsi/lpfc/lpfc_nportdisc.c @@ -360,6 +360,7 @@ lpfc_rcv_plogi(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp, case NLP_STE_NPR_NODE: if (!(ndlp->nlp_flag & NLP_NPR_ADISC)) break; + /* fall through */ case NLP_STE_REG_LOGIN_ISSUE: case NLP_STE_PRLI_ISSUE: case NLP_STE_UNMAPPED_NODE: -- 2.17.1
RE: [PATCH] PCI: Mark NXP LS1088 to avoid bus reset bus
Hi,
> -Original Message-
> From: Alex Williamson
> Sent: Tuesday, November 27, 2018 9:39 PM
> To: Bjorn Helgaas
> Cc: Bharat Bhushan ; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; bharatb.ya...@gmail.com; David Daney
> ; Jan Glauber ; Maik
> Broemme ; Chris Blake
>
> Subject: Re: [PATCH] PCI: Mark NXP LS1088 to avoid bus reset bus
>
> On Tue, 27 Nov 2018 09:33:56 -0600
> Bjorn Helgaas wrote:
>
> > [+cc David, Jan, Alex, Maik, Chris]
> >
> > On Tue, Nov 27, 2018 at 08:46:33AM +, Bharat Bhushan wrote:
> > > NXP (Freescale Vendor ID) LS1088 chips do not behave correctly after
> > > bus reset with e1000e. Link state of device does not comes UP and so
> > > config space never accessible again.
> >
> > Previous similar commits:
> >
> > 822155100e58 ("PCI: Mark Cavium CN8xxx to avoid bus reset")
> > 8e2e03179923 ("PCI: Mark Atheros AR9580 to avoid bus reset")
> > 9ac0108c2bac ("PCI: Mark Atheros AR9485 and QCA9882 to avoid bus
> reset")
> > c3e59ee4e766 ("PCI: Mark Atheros AR93xx to avoid bus reset")
> >
> > 1) Please make your subject match (remove the spurious "bus" at the
> > end)
Will correct, added by mistake
> >
> > 2) This should probably be marked for stable (v3.14 and later, since
> > the quirk itself appeared in v3.19 and marked for v3.14 and later
> > stable kernels). Maybe even mark it as "Fixes: c3e59ee4e766..." to
> > connect it.
Ok,
> >
> > 3) The 1957:80c0 PCI ID doesn't appear in
> >
> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpci
> -
> ids.ucw.cz%2Fdata=02%7C01%7Cbharat.bhushan%40nxp.com%7C296
> 02a2efa584249221808d65482945b%7C686ea1d3bc2b4c6fa92cd99c5c301635%7
> C0%7C0%7C636789317139032063sdata=3jkRMa1NljSCp%2BvZP0kgz7D
> PWPJZH8d7JXhCE5vCCMk%3Dreserved=0; can you add it?
> >
Yes, I will add
> > 4) Is there a hardware erratum for this? If so, please include the
> > URL here.
No h/w errata as of now.
> >
> > 5) Can you reproduce the problem using the same endpoint (e1000e) on a
> > different system with a different bridge?
I have multiple LS1088 boards and I can observe problem with all LS1088 boards.
While when I uses same PCI device on other NXP board (LS2088) then it works
fine.
> >
> > 6) Have you looked at this with a PCIe analyzer? It would be very
> > interesting to compare the boot-time or system reboot path with the
> > individual bus reset path you're fixing.
I have not used PCIe analyzer,
> >
> > Since there are several similar reports and they sometimes involve the
> > same devices (both your patch and 822155100e58 mention e1000e), I'm a
> > little suspicious that we're doing something wrong in the bus reset
> > path.
>
> I agree, entirely excluding bus resets is not something to be taken lightly.
> It's
> less than ideal for an endpoint and a fairly major functional gap for a
> downstream port. It should really be considered a last resort.
>
> > I think bus reset uses Secondary Bus Reset in the Bridge Control
> > register. That's a generic mechanism that I would expect to be pretty
> > well-tested. I suspect the BIOS probably uses it in the reboot path,
> > and the device probably works after that.
> >
> > So I wonder if the Linux delay isn't quite long enough, or our first
> > access to the device isn't quite right, e.g., maybe there's some issue
> > with the bus/device number capture (PCIe r4.0, sec 2.2.6.2).
>
> Tweaking the delay would be a reasonable solution, though we are seeing
> some issues where users with lots of assigned devices that require bus
> resets experience long delays as vfio file descriptors are closed sequentially
> on exit.
In pci_reset_secondary_bus() I have tried to increase the delay after reset but
not helped.
Do I need to add delay at some other place as well?
Thanks
-Bharat
> So perhaps we could flag downstream ports requiring an extra delay,
> if that becomes a solution. Your mention of the bus/device number also
> reminds me of the issue we saw on Threadripper where there were patches
> proposed to re-write the secondary and subordinate bus numbers after
> reset. AMD was able to resolve that in a firmware update, but there could
> be something similar occurring here. Thanks,
>
> Alex
>
> > > Signed-off-by: Bharat Bhushan
> > > ---
> > > drivers/pci/quirks.c | 7 +++
> > > 1 file changed, 7 insertions(+)
> > >
> > > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index
> > > 4700d24e5d55..b9ae4e9f101a 100644
> > > --- a/drivers/pci/quirks.c
> > > +++ b/drivers/pci/quirks.c
> > > @@ -3391,6 +3391,13 @@
> DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0033,
> quirk_no_bus_reset);
> > > */
> > > DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CAVIUM, 0xa100,
> > > quirk_no_bus_reset);
> > >
> > > +/*
> > > + * NXP (Freescale Vendor ID) LS1088 chips do not behave correctly
> > > +after
> > > + * bus reset. Link state of device does not comes UP and so config
> > > +space
> > > + * never accessible again.
> > > + */
> > >
[PATCH 25/41] scsi: lpfc: lpfc_nportdisc: Mark expected switch fall-through
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Signed-off-by: Gustavo A. R. Silva --- drivers/scsi/lpfc/lpfc_nportdisc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/scsi/lpfc/lpfc_nportdisc.c b/drivers/scsi/lpfc/lpfc_nportdisc.c index 7d5693cfaa87..e8583496feaf 100644 --- a/drivers/scsi/lpfc/lpfc_nportdisc.c +++ b/drivers/scsi/lpfc/lpfc_nportdisc.c @@ -360,6 +360,7 @@ lpfc_rcv_plogi(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp, case NLP_STE_NPR_NODE: if (!(ndlp->nlp_flag & NLP_NPR_ADISC)) break; + /* fall through */ case NLP_STE_REG_LOGIN_ISSUE: case NLP_STE_PRLI_ISSUE: case NLP_STE_UNMAPPED_NODE: -- 2.17.1
Re: [PATCH v2 00/15] ARM: sunxi: Enable Broadcom-based Bluetooth controllers
Hi, On Thu, Nov 15, 2018 at 5:36 PM Chen-Yu Tsai wrote: > > Hi everyone, > > This is v2 of my Broadcom-based Bluetooth controllers on Allwinner SoC- > based SBCs series. > > Changes since v1: > > - Collected tags > - Re-organize dt binding clocks and clock-names properties > - Simplify check for deferred probe when getting clocks > - Add explanation of Cubietruck's clk_out_a pinmux setting placement > to commit message. > - Add missing "uart-has-rtscts" property to Cubietruck device tree > > Original cover letter follows. > > > On many Allwinner SBCs / developer boards, there is a WiFi+BT combo > module from AMPAK. Inside is either one or two Broadcom chips, depending > on the model. This series enables the Bluetooth controllers for AMPAK > AP6210, AP6212, and AP6330 found on several boards. More will come later > as other SoCs require changes to some other parts. I did not cover the > SCO PCM connections from the controller to the SoC's I2S interface. It > seems no one is actually doing this, so I was not sure how to proceed. > Any suggestions? > > I deliberately left out the netdev mailing list and Dave Miller, as the > only thing that is under net is the binding document. Maybe we should > move that out of Documentation/devicetree/bindings/net/ ? > > Also, I'm not subscribed to the linux-bluetooth ML, so please CC me for > any discussions. > > Patches 1 through 4 are device tree binding changes: > > 1 - Make the external clock name unambiguous, and add a second entry for > the LPO clock. > > 2 - Add regulator supply properties for the VBAT and VDDIO power pins. > > 3 - Add a compatible string for BCM20702A1. > > 4 - Add a compatible string for BCM4330. > > Patches 5 through 13 are changes to the driver, either improvements, > or updates to handle the updated device tree binding. > > 5 - Make the driver handle deferred probing for the external clock. > > 6 - Simplify clock error checking for subsequent clk API calls. > > 7 - Handle clock-names for the main external clock. > > 8 - Support a new external clock, the LPO. > > 9 - Support regulator supplies. > > 10 - Wait a small amount of time after toggling the GPIO for the device > to settle. > > 11 - Add support for BCM20702A1, including its default address. > > 12 - Add BCM4330 compatible string to the driver. > > 13 - Handle default address for BCM43430A0. > > 14 - Enable Broadcom-based serdev Bluetooth for multiple Allwinner ARMv7 > boards. > > 15 - Enable Broadcom-based serdev Bluetooth for the Bananapi M64. > > checkpatch reports an error for both patch 11 and patch 13: > > ERROR: space required after that close brace '}' > > I followed the existing code's style. If this is undesirable, I can send > a follow-up patch fixing the entire code block. > > The first 13 patches should go through the Bluetooth tree, while we, the > sunxi maintainers, will take the last 2. It's been close to two weeks. Any comments or concerns from the Bluetooth maintainers? I'd like to see this in 4.22 if possible. Thanks ChenYu > Thanks > ChenYu > > Chen-Yu Tsai (14): > dt-bindings: net: broadcom-bluetooth: Fix external clock names > dt-bindings: net: broadcom-bluetooth: Add VBAT and VDDIO supplies > dt-bindings: net: broadcom-bluetooth: Add BCM20702A1 compatible string > dt-bindings: net: broadcom-bluetooth: Add BCM4330 compatible string > Bluetooth: hci_bcm: Handle deferred probing for the clock supply > Bluetooth: hci_bcm: Simplify clk_get error handling > Bluetooth: hci_bcm: Use "txco" and "extclk" to get clock reference > Bluetooth: hci_bcm: Add support for LPO clock > Bluetooth: hci_bcm: Add support for regulator supplies > Bluetooth: hci_bcm: Wait for device to come out of reset after power > on > Bluetooth: hci_bcm: Add compatible string for BCM4330 > Bluetooth: btbcm: Add default address for BCM43430A0 > ARM: dts: sunxi: Enable Broadcom-based Bluetooth for multiple boards > arm64: dts: allwinner: a64: bananapi-m64: Add Bluetooth device node > > Maxime Ripard (1): > Bluetooth: hci_bcm: Add BCM20702A1 variant > > .../bindings/net/broadcom-bluetooth.txt | 11 +- > arch/arm/boot/dts/sun7i-a20-cubietruck.dts| 23 > arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 18 +++ > .../boot/dts/sun8i-a83t-cubietruck-plus.dts | 18 +++ > arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts | 14 +++ > .../dts/allwinner/sun50i-a64-bananapi-m64.dts | 14 +++ > drivers/bluetooth/btbcm.c | 13 +- > drivers/bluetooth/hci_bcm.c | 112 +++--- > 8 files changed, 206 insertions(+), 17 deletions(-) > > -- > 2.19.1 >
Re: [PATCH v2 00/15] ARM: sunxi: Enable Broadcom-based Bluetooth controllers
Hi, On Thu, Nov 15, 2018 at 5:36 PM Chen-Yu Tsai wrote: > > Hi everyone, > > This is v2 of my Broadcom-based Bluetooth controllers on Allwinner SoC- > based SBCs series. > > Changes since v1: > > - Collected tags > - Re-organize dt binding clocks and clock-names properties > - Simplify check for deferred probe when getting clocks > - Add explanation of Cubietruck's clk_out_a pinmux setting placement > to commit message. > - Add missing "uart-has-rtscts" property to Cubietruck device tree > > Original cover letter follows. > > > On many Allwinner SBCs / developer boards, there is a WiFi+BT combo > module from AMPAK. Inside is either one or two Broadcom chips, depending > on the model. This series enables the Bluetooth controllers for AMPAK > AP6210, AP6212, and AP6330 found on several boards. More will come later > as other SoCs require changes to some other parts. I did not cover the > SCO PCM connections from the controller to the SoC's I2S interface. It > seems no one is actually doing this, so I was not sure how to proceed. > Any suggestions? > > I deliberately left out the netdev mailing list and Dave Miller, as the > only thing that is under net is the binding document. Maybe we should > move that out of Documentation/devicetree/bindings/net/ ? > > Also, I'm not subscribed to the linux-bluetooth ML, so please CC me for > any discussions. > > Patches 1 through 4 are device tree binding changes: > > 1 - Make the external clock name unambiguous, and add a second entry for > the LPO clock. > > 2 - Add regulator supply properties for the VBAT and VDDIO power pins. > > 3 - Add a compatible string for BCM20702A1. > > 4 - Add a compatible string for BCM4330. > > Patches 5 through 13 are changes to the driver, either improvements, > or updates to handle the updated device tree binding. > > 5 - Make the driver handle deferred probing for the external clock. > > 6 - Simplify clock error checking for subsequent clk API calls. > > 7 - Handle clock-names for the main external clock. > > 8 - Support a new external clock, the LPO. > > 9 - Support regulator supplies. > > 10 - Wait a small amount of time after toggling the GPIO for the device > to settle. > > 11 - Add support for BCM20702A1, including its default address. > > 12 - Add BCM4330 compatible string to the driver. > > 13 - Handle default address for BCM43430A0. > > 14 - Enable Broadcom-based serdev Bluetooth for multiple Allwinner ARMv7 > boards. > > 15 - Enable Broadcom-based serdev Bluetooth for the Bananapi M64. > > checkpatch reports an error for both patch 11 and patch 13: > > ERROR: space required after that close brace '}' > > I followed the existing code's style. If this is undesirable, I can send > a follow-up patch fixing the entire code block. > > The first 13 patches should go through the Bluetooth tree, while we, the > sunxi maintainers, will take the last 2. It's been close to two weeks. Any comments or concerns from the Bluetooth maintainers? I'd like to see this in 4.22 if possible. Thanks ChenYu > Thanks > ChenYu > > Chen-Yu Tsai (14): > dt-bindings: net: broadcom-bluetooth: Fix external clock names > dt-bindings: net: broadcom-bluetooth: Add VBAT and VDDIO supplies > dt-bindings: net: broadcom-bluetooth: Add BCM20702A1 compatible string > dt-bindings: net: broadcom-bluetooth: Add BCM4330 compatible string > Bluetooth: hci_bcm: Handle deferred probing for the clock supply > Bluetooth: hci_bcm: Simplify clk_get error handling > Bluetooth: hci_bcm: Use "txco" and "extclk" to get clock reference > Bluetooth: hci_bcm: Add support for LPO clock > Bluetooth: hci_bcm: Add support for regulator supplies > Bluetooth: hci_bcm: Wait for device to come out of reset after power > on > Bluetooth: hci_bcm: Add compatible string for BCM4330 > Bluetooth: btbcm: Add default address for BCM43430A0 > ARM: dts: sunxi: Enable Broadcom-based Bluetooth for multiple boards > arm64: dts: allwinner: a64: bananapi-m64: Add Bluetooth device node > > Maxime Ripard (1): > Bluetooth: hci_bcm: Add BCM20702A1 variant > > .../bindings/net/broadcom-bluetooth.txt | 11 +- > arch/arm/boot/dts/sun7i-a20-cubietruck.dts| 23 > arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 18 +++ > .../boot/dts/sun8i-a83t-cubietruck-plus.dts | 18 +++ > arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts | 14 +++ > .../dts/allwinner/sun50i-a64-bananapi-m64.dts | 14 +++ > drivers/bluetooth/btbcm.c | 13 +- > drivers/bluetooth/hci_bcm.c | 112 +++--- > 8 files changed, 206 insertions(+), 17 deletions(-) > > -- > 2.19.1 >
